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User Manual: Honeywell H316/H516 Simulator ation

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H316 Simulator Usage
01-Dec-2008
COPYRIGHT NOTICE
The following copyright notice applies to the SIMH source, binary, and documentation:
Original code published in 1993-2008, written by Robert M Supnik
Copyright (c) 1993-2008, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a copy of this
software and associated documentation files (the "Software"), to deal in the Software
without restriction, including without limitation the rights to use, copy, modify, merge,
publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons
to whom the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all copies or
substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL ROBERT M SUPNIK BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
Except as contained in this notice, the name of Robert M Supnik shall not be used in
advertising or otherwise to promote the sale, use or other dealings in this Software
without prior written authorization from Robert M Supnik.

1
2

Simulator Files ............................................................................................................. 3
H316/H516 Features.................................................................................................... 3
2.1
CPU ...................................................................................................................... 4
2.2
Programmed I/O Devices ..................................................................................... 5
2.2.1
316/516-50 Paper Tape Reader (PTR) ......................................................... 5
2.2.2
316/516-52 Paper Tape Punch (PTP) ........................................................... 6
2.2.3
316/516-33 Console Teletype (TTY) ............................................................. 7
2.2.4
316/516-12 Real Time Clock (CLK)............................................................... 8
2.3
316/516 Line Printer (LPT).................................................................................... 8
2.4
4400 Fixed Head Disk (FHD)................................................................................ 9
2.5
4100 7-track Magnetic Tape (MT)....................................................................... 10
2.6
4623/4651/4720 Disk Packs (DP)....................................................................... 11
3 Symbolic Display and Input........................................................................................ 13

This memorandum documents the Honeywell H316/H516 simulator.

1 Simulator Files
The H316 requires the following files:
sim/

scp.h
sim_console.h
sim_defs.h
sim_fio.h
sim_rev.h
sim_sock.h
sim_tape.h
sim_timer.h
sim_tmxr.h
scp.c
sim_console.c
sim_fio.c
sim_sock.c
sim_tape.c
sim_timer.c
sim_tmxr.c

sim/h316/

h316_defs.h
h316_cpu.c
h316_fhd.c
h316_lp.c
h316_mt.c
h316_dp.c
h316_stddev.c
h316_sys.c

2 H316/H516 Features
The Honeywell 316/516 simulator is configured as follows:
device names

simulates

CPU
PTR
PTP
TTY
CLK
LPT
FHD
DP
MT

H316/H516 CPU with 16/32KW memory
316/516-50 paper tape reader
316/516-52 paper tape punch
316/516-33 console terminal
316/516-12 real time clock
316/516 line printer
4400 fixed head disk
4623/4653/4720 disk pack controller with eight drives
4100 seven track magnetic tape with four drives

The H316/H516 simulator implements several unique stop conditions:
-

Decode of an undefined instruction, and STOP_INST is set
Reference to an undefined I/O device, and STOP_DEV is set

-

More than INDMAX indirect references are detected during memory reference address
decoding
DMA/DMC direction does not agree with I/O device operation
A write operation is initiated on a write locked magnetic tape unit (hangs the real system)
A disk write overruns the specified record size (destroys the rest of the track on the real system)
A disk track has an illegal format

The LOAD and DUMP commands are not implemented.

2.1 CPU
CPU options include choice of instruction set, memory size, DMC option, and number of DMA channels.
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET
SET

CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU

HSA
NOHSA
4K
8K
12K
16K
24K
32K
DMC
NODMC
DMA=n

high speed arithmetic instructions
no high speed arithmetic instructions
set memory size = 4K
set memory size = 8K
set memory size = 12K
set memory size = 16K
set memory size = 24K
set memory size = 32K
enable DMC option
disable DMC option
set number of DMA channels to n (0-4)

If memory size is being reduced, and the memory being truncated contains non-zero data, the simulator
asks for confirmation. Data in the truncated portion of memory is lost. Initial memory size is 32K. By
default, the HSA and DMC options are enabled, and four DMA channels are configured.
The CPU includes special show commands to display the state of the DMA channels:
SHOW CPU DMAn

show DMA channel n

CPU registers include the visible state of the processor as well as the control registers for the interrupt
system.
name

size

comments

P
A
B
X
SC
C
EXT
PME
EXT_OFF
DP
SS1..4
ION
INODEF
INTREQ
DEVRDY
DEVENB
CHREQ
DMAAD[0:3]

15
16
16
16
16
1
1
1
1
1
1
1
1
16
16
16
20
16

program counter
A register
B register
index register
shift count
carry flag
extend flag
previous mode extend flag
extend off pending flag
double precision flag
sense switches 1 to 4
interrupts enabled
interrupts not deferred
interrupt requests
device ready flags (read only)
device interrupt enable flags (read only)
DMA/DMC channel requests
DMA channel current address, channels 1 to 4

DMAWC[0:3]
DMAEOR[0:3]
STOP_INST
STOP_DEV
INDMAX
PCQ[0:63]

15
1
1
1
8
15

WRU

8

DMA channel word count, channels 1 to 4
DMA end of range flag, channels 1 to 4
stop on undefined instruction
stop on undefined device
indirect address limit
PC prior to last JMP, JSB, or interrupt;
most recent PC change first
interrupt character

The CPU can maintain a history of the most recently executed instructions. This is controlled by the SET
CPU HISTORY and SHOW CPU HISTORY commands:
SET CPU HISTORY
SET CPU HISTORY=0
SET CPU HISTORY=n
SHOW CPU HISTORY
SHOW CPU HISTORY=n

clear history buffer
disable history
enable history, length = n
print CPU history
print first n entries of CPU history

The maximum length for the history is 65,536 entries.

2.2 Programmed I/O Devices
2.2.1 316/516-50 Paper Tape Reader (PTR)
The paper tape reader (PTR) reads data from a disk file. The POS register specifies the number of the next
data item to be read. Thus, by changing POS, the user can backspace or advance the reader.
The paper tape reader can bet set to operate in binary, ASCII, or Unix ASCII mode:
SET PTR BINARY
SET PTR ASCII
SET PTR UASCII

binary mode
ASCII mode
Unix ASCII mode

The mode can also be set by a switch setting in the ATTACH command:
ATT –B PTR 
ATT –A PTR 
ATT –U PTR 

binary mode
ASCII mode
Unix ASCII mode

In ASCII or Unix ASCII mode, all non-zero characters have the high order bit forced on. In Unix ASCII
mode, newline is converted to CR, and LF is inserted as the following character.
The paper tape reader supports the BOOT command. BOOT PTR copies the absolute binary loader into
memory and starts it running.
The paper tape reader implements these registers:
name

size

comments

BUF
INTREQ
READY
ENABLE
POS
TIME

8
1
1
1
32
24

last data item processed
device interrupt request
device ready
device interrupts enabled
position in the input file
time from I/O initiation to interrupt

STOP_IOE

1

stop on I/O error

Error handling is as follows:
error

STOP_IOE

processed as

not attached

1
0

report error and stop
out of tape

end of file

1
0

report error and stop
out of tape

OS I/O error

x

report error and stop

2.2.2 316/516-52 Paper Tape Punch (PTP)
The paper tape punch (PTP) writes data to a disk file. The POS register specifies the number of the next
data item to be written. Thus, by changing POS, the user can backspace or advance the punch.
The paper tape punch can bet set to operate in binary, ASCII, or Unix ASCII mode:
SET PTP BINARY
SET PTP ASCII
SET PTP UASCII

binary mode
ASCII mode
Unix ASCII mode

The mode can also be set by a switch setting in the ATTACH command:
ATT –B PTP 
ATT –A PTP 
ATT –U PTP 

binary mode
ASCII mode
Unix ASCII mode

In ASCII or Unix ASCII mode, all characters are masked to 7b before being written to the output file. In Unix
ASCII mode, LF is converted to newline, and CR is discarded.
The paper tape punch implements these registers:
name

size

comments

BUF
INTREQ
READY
ENABLE
POWER
POS
TIME
PWRTIME
STOP_IOE

8
1
1
1
1
32
24
24
1

last data item processed
device interrupt request
device ready
device interrupts enabled
device powered up
position in the output file
time from I/O initiation to interrupt
time from I/O request to power up
stop on I/O error

Error handling is as follows:
error

STOP_IOE

processed as

not attached

1
0

report error and stop
out of tape

OS I/O error

x

report error and stop

2.2.3 316/516-33 Console Teletype (TTY)
The console Teletype (TTY) consists of four separate units:
TTY0
TTY1
TTY2
TTY3

keyboard
printer
paper tape reader
paper tape punch

The keyboard and printer (TTY0, TTY1) can be set to one of four modes, KSR, 7P, 7B, or 8B:
mode

input characters

output characters

KSR

7P

lower case converted
to upper case,
high-order bit set
high-order bit cleared

7B
8B

high-order bit cleared
no changes

lower case converted to upper case,
high-order bit cleared,
non-printing characters suppressed
high-order bit cleared,
non-printing characters suppressed
high-order bit cleared
no changes

The default mode is KSR. The Teletype keyboard reads from the console keyboard, and the printer writes
to the simulator console window.
The paper tape reader (TTY2) can bet set to operate in binary, ASCII, or Unix ASCII mode:
SET TTY2 BINARY
SET TTY2 ASCII
SET TTY2 UASCII

binary mode
ASCII mode
Unix ASCII mode

The mode can also be set by a switch setting in the ATTACH command:
ATT –B TTY2 
ATT –A TTY2 
ATT –U TTY2 

binary mode
ASCII mode
Unix ASCII mode

In ASCII or Unix ASCII mode, all non-zero characters have the high order bit forced on. In Unix ASCII
mode, newline is converted to CR, and LF is inserted as the following character.
The paper tape reader is started by program output of XON or by the command SET TTY2 START. The
paper tape reader is stopped by reader input of XOFF or by the command SET TTY2 STOP.
The Teletype paper tape punch (TTY3) can bet set to operate in binary, ASCII, or Unix ASCII mode:
SET TTY3 BINARY
SET TTY3 ASCII
SET TTY3 UASCII

binary mode
ASCII mode
Unix ASCII mode

The mode can also be set by a switch setting in the ATTACH command:
ATT –B TTY3 
ATT –A TTY3 
ATT –U TTY3 

binary mode
ASCII mode
Unix ASCII mode

In ASCII or Unix ASCII mode, all characters are masked to 7b before being written to the output file. In Unix
ASCII mode, LF is converted to newline, and CR is discarded.
The Teletype paper tape punch is started by program output of TAPE or by the command SET TTY3
START. The punch is stopped by program output of XOFF or by the command SET TTY3 STOP.
The TTY implements these registers:
name

size

comments

BUF
MODE
INTREQ
READY
ENABLE
KPOS
KTIME
TPOS
TTIME
RPOS
PPOS

8
1
1
1
1
32
24
32
24
32
32

last data item processed
read/write mode
device interrupt request
device ready
device interrupts enabled
number of keyboard characters input
keyboard polling interval
number of printer characters output
time from I/O initiation to interrupt
current reader character position
current punch character position

2.2.4 316/516-12 Real Time Clock (CLK)
The real time clock (CLK) frequency can be adjusted as follows:
SET CLK 60HZ
SET CLK 50HZ

set frequency to 60Hz
set frequency to 50Hz

The default is 60Hz.
The clock implements these registers:
name

size

comments

INTREQ
READY
ENABLE
TIME

1
1
1
24

device interrupt request
device ready
device interrupts enabled
clock interval

The real-time clock autocalibrates; the clock interval is adjusted up or down so that the clock tracks actual
elapsed time.

2.3 316/516 Line Printer (LPT)
The line printer (LPT) writes data to a disk file. The POS register specifies the number of the next data item
to be written. Thus, by changing POS, the user can backspace or advance the printer.
The line printer can be connected to the IO bus, a DMC channel, or a DMA channel:
SET LPT IOBUS
SET LPT DMC=n
SET LPT DMA=n

connect to IO bus
connect to DMC channel n (1-16)
connect to DMA channel n (1 to 4)

By default, the line printer is connected to the IO bus.

The line printer implements these registers:
name

size

comments

WDPOS
DRPOS
CRPOS
PRDN
RDY
EOR
DMA
INTREQ
ENABLE
SVCST
SVCCH
BUF
POS
XTIME
ETIME
PTIME
STOP_IOE

6
6
1
1
1
1
1
1
1
2
2
8
32
24
24
24
1

word position in current scan
drum position
carriage position
print done flag
ready flag
(DMA/DMC) end of range flag
transfer using DMA/DMC
device interrupt request
device interrupt enable
service state
service channel
buffer
position in the output file
delay between transfers
delay at end of scan
delay for shuttle/line advance
stop on I/O error

Error handling is as follows:
error

STOP_IOE

processed as

not attached

1
0

report error and stop
out of paper

OS I/O error

x

report error and stop

2.4 4400 Fixed Head Disk (FHD)
Fixed head disk options include the ability to set the number of surfaces to a fixed value between 1 and 16,
or to autosize the number of surfaces from the attached file:
SET
SET
:
SET
SET

FHD 1S
FHD 2S

one surface (98K)
two platters (196K)

FHD 16S
FHD AUTOSIZE

sixteen surfaces (1568K)
autosized on ATTACH

The default is one surface.
The fixed head disk can be connected to the IO bus, a DMC channel, or a DMA channel:
SET FHD IOBUS
SET FHD DMC=n
SET FHD DMA=n

connect to IO bus
connect to DMC channel n (1-16)
connect to DMA channel n (1 to 4)

By default, the fixed head disk is connected to the IO bus.
The fixed head disk implements these registers:
name

size

comments

CW1
CW2
BUF
BUSY
RDY
DTE
ACE
EOR
DMA
CSUM
INTREQ
ENABLE
TIME
STOP_IOE

16
16
16
1
1
1
1
1
1
1
1
1
24
1

control word 1 (read write, surface, track)
control word 2 (character address)
data buffer
controller busy flag
transfer ready flag
data transfer error flag
access error flag
(DMA/DMC) end of range
transfer using DMA/DMC
transfer parity checksum
device interrupt request
device interrupt enable
delay between words
stop on I/O error

Error handling is as follows:
error

STOP_IOE

not attached

1
0

processed as
report error and stop
disk not ready

Fixed head disk data files are buffered in memory; therefore, end of file and OS I/O errors cannot occur.

2.5 4100 7-track Magnetic Tape (MT)
Magnetic tape options include the ability to make units write enabled or write locked.
SET MTn LOCKED
SET MTn WRITEENABLED

set unit n write locked
set unit n write enabled

Magnetic tape units can be set to a specific reel capacity in MB, or to unlimited capacity:
SET MTn CAPAC=m
SHOW MTn CAPAC

set unit n capacity to m MB (0 = unlimited)
show unit n capacity in MB

Units can also be set ENABLED or DISABLED.
The magnetic tape controller can be connected to the IO bus, a DMC channel, or a DMA channel:
SET MT IOBUS
SET MT DMC=n
SET MT DMA=n

connect to IO bus
connect to DMC channel n (1-16)
connect to DMA channel n (1 to 4)

By default, the magnetic tape controller is connected to the IO bus.
The magnetic tape controller implements these registers:
name

size

comments

BUF
USEL
BUSY
RDY
ERR

16
2
1
1
1

data buffer
unit select
controller busy flag
transfer ready flag
error flag

EOF
EOR
DMA
MDIRQ
INTREQ
ENABLE
DBUF[0:65535]
BPTR
BMAX
CTIME
XTIME
POS[0:3]
STOP_IOE

1
1
1
1
1
1
8
17
17
24
24
32
1

end of file flag
(DMA/DMC) end of range
transfer using DMA/DMC
motion done interrupt request
device interrupt request
device interrupt enable
transfer buffer
transfer buffer pointer
transfer size (reads)
start/stop time
delay between words
position, units 0 to 3
stop on I/O error

Error handling is as follows:
error

processed as

not attached

tape not ready; if STOP_IOE, stop

end of file

bad tape

OS I/O error

parity error; if STOP_IOE, stop

2.6 4623/4651/4720 Disk Packs (DP)
The disk controller can be configured as a 4623, supporting 10-surface disk packs; a 4651, supporting 2surface disk packs; or a 4720, supporting 20-surface disk packs:
SET DP 4623
SET DP 4651
SET DP 4720

controller is 4623
controller is 4651
controller is 4720

The default is 4651. All disk packs on the controller must be of the same type.
Individual units can be write enabled or write locked:
SET DPn LOCKED
SET DPn WRITEENABLED

set unit n write locked
set unit n write enabled

Units can be also be set ENABLED or DISABLED.
The disk pack controller can be connected to a DMC channel or a DMA channel; it cannot be connected to
the IO bus:
SET DP DMC=n
SET DP DMA=n

connect to DMC channel n (1-16)
connect to DMA channel n (1 to 4)

The disk pack controller supports variable track formatting. Each track can contain between 1 and 103
records, with a minimum size of 1 word and a maximum size of 1893 words. Record addresses are
unconstrained. The simulator provides a command to perform a simple, fixed record size format of a new
disk:
SET DPn FORMAT=k
SET -R DPn FORMAT=k

format unit n with k words per record
format unit n with k records per track

Record addresses can either be geometric (cylinder/track/sector) or simple sequential starting from 0:
SET DPn FORMAT=k
SET -S DPn FORMAT=k

format with geometric record addresses
format with sequential record addresses

Geometric address have the cylinder number in bits<1:8>, the head number in bits<9:13>, and the sector
number in bits <14:16>.
A summary of the current format, and its validity, can be obtained with the command:
SHOW DPn FORMAT

display format of unit n

To accommodate the variable formatting, each track is allocated 2048 words in the data file. A record
consists of a three word header, the data, and a five word trailer:
word
word
word
word
word
word

0
1
2
3
3+n-1
3+n..7+n

record length in words, not including header/trailer
record address
number of extension words used (0-4)
start of data record
end of data record
record trailer: up to four extension words, plus
checksum

A record can "grow" by up to four words without disrupting the track formatting; writing more than four extra
words destroys the formatting of the rest of the track and causes a simulator error.
The disk pack controller implements these registers:
name

size

comments

STA
BUF
FNC
CW1
CW2
CSUM
BUSY
RDY
EOR
DEFINT
INTREQ
ENABLE
TBUF[0:2047]
RPTR
WPTR
BCTR
STIME
XTIME
BTIME

16
16
4
16
16
16
1
1
1
1
1
1
16
11
11
15
24
24
24

status
data buffer
controller function
command word 1
command word 2
record checksum
controller busy
transfer ready
(DMA/DMC) end of range
seek deferred interrupt pending
interrupt request
interrupt enable
track buffer
pointer to start of record in track buffer
pointer to current word in record
bit counter for formatting
seek time, per cylinder
transfer time, per word
controller busy time

Error handling is as follows:
error

processed as

not attached

pack off line; if STOP_IOE, stop

end of file

ignored

OS I/O error

data error; if STOP_IOE, stop

3 Symbolic Display and Input
The H316/H516 simulator implements symbolic display and input. Display is controlled by command line
switches:
-a
-c
-m

display as ASCII character
display as two packed ASCII characters
display instruction mnemonics

Input parsing is controlled by the first character typed in or by command line switches:
' or -a
" or -c
alphabetic
numeric

ASCII character
two packed ASCII characters
instruction mnemonic
octal number

Instruction input uses standard H316/H516 assembler syntax. There are six instruction classes: memory
reference, I/O, control, shift, skip, and operate.
Memory reference instructions have the format
memref{*} {C/Z} address{,1}
where * signifies indirect, C a current sector reference, Z a sector zero reference, and 1 indexed. The
address is an octal number in the range 0 - 077777; if C or Z is specified, the address is a page offset in the
range 0 - 0777. Normally, C is not needed; the simulator figures out from the address what mode to use.
However, when referencing memory outside the CPU, there is no valid PC, and C must be used to specify
current sector addressing.
I/O instructions have the format
io pulse+device
The pulse+device is an octal number in the range 0 - 01777.
Control and operate instructions consist of a single opcode
opcode
Shift instructions have the format
shift n
where n is an octal number in the range 0-77.
Skip instructions have the format
sub-op sub-op sub-op...
The simulator checks that the combination of sub-opcodes is legal.



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