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Colour Television Chassis LC9.1A LA 18560_000_090401.eps 090401 Contents Page Revision List 2 Technical Specifications and Connections 2 Precautions, Notes, and Abbreviation List 5 Mechanical Instructions 9 Service Modes, Error Codes, and Fault Finding 13 Alignments 27 Circuit Descriptions, Abbreviation List, and IC Data Sheets 31 8. IC Data Sheets 36 9. Block Diagrams Wiring Diagram 42" (Frame) 39 Wiring Diagram 47" (Frame) 40 Wiring Diagram 52" (Frame) 41 Block Diagram Video 42 Block Diagram Audio 43 Block Diagram Control & Clock Signals 44 Block Diagram I2C 45 Supply Lines Overview 46 10. Circuit Diagrams and PWB Layouts Diagram Interface Ambilight: Interface + DC-DC (AB1) 47 Interface Ambilight: Dual DC-DC (AB2) 48 Interface Ambilight: Microcontroller (AB3) 49 6 LED Low-Pow: Microcontroller Liteon (AL1) 51 6 LED Low-Pow: Microcontroller Liteon (AL2) 52 6 LED Low-Pow: LED Liteon (AL3) 53 8 LED Low-Pow: Microcontroller Liteon (AL1) 55 8 LED Low-Pow: Microcontroller Liteon (AL2) 56 8 LED Low-Pow: LED Liteon (AL3) 57 8 LED Low-Pow: LED Drive Liteon (AL4) 58 12 LED Low-Pow: Microcontroller Liteon (AL1) 60 12 LED Low-Pow: Microcontroller Liteon (AL2) 61 12 LED Low-Pow: LED Liteon (AL3) 62 12 LED Low-Pow: LED Drive (AL4) 63 Contents 1. 2. 3. 4. 5. 6. 7. Page SSB: DC/DC SSB: Tuner & Analog demodulator SSB: Class-D & Muting SSB: MTK Power SSB: GDDR3 SSB: Flash & EJTAG SSB: Display interface - LVDS SSB: Ambilight SSB: HDMI & MUX SSB: Digital I/O - Ethernet (provisional) SSB: Analog I/O - YPbPr SSB: Analog I/O - Cinch SSB: Side - A/V & USB SSB: VGA SSB: BDS iTV SSB: SRP List Explanation SSB: SRP List (B01) 65 (B02A) 66 (B03) 67 (B04A) 68 (B04B) 69 (B04C) 70 (B04D) 71 (B04E) 72 (B05) 73 (B06A) 74 (B06B) 75 (B06C) 76 (B06D) 77 (B06E) 78 (B07) 79 80 81 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 82-87 PWB 50 50 50 54 54 54 59 59 59 59 64 64 64 64 © Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips. Published by ER/WS 0964 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 18490 2009-Apr-10 EN 2 1. LC9.1A LA Revision List 1. Revision List Manual xxxx xxx xxxx.0 • First release. 2. Technical Specifications and Connections Index of this chapter: 2.1 Technical Specifications 2.2 Directions for Use 2.3 Connections 2.4 Chassis Overview Notes: • Figures can deviate due to the different set executions. • Specifications are indicative (subject to change). 2.1 Technical Specifications For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers. Table 2-1 Described Model numbers 2.2 CTN Styling 42PFL9509/93 Frame Published in: 3122 785 18490 47PFL9509/93 3122 785 18490 52PFL9509/93 3122 785 18490 Directions for Use You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com 2009-Apr-10 Technical Specifications and Connections 2.3 LC9.1A LA 2. EN 3 Connections Rear connectors Side connectors 18490_001_090409.eps 090409 Figure 2-1 Connection overview Note: The following connector colour abbreviations are used (according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. USB2.0 1 2.3.1 Side Connections Cinch: Audio - In Rd - Audio R Wh - Audio L 2 3 4 10000_022_090121.eps 090121 0.5 VRMS / 10 kΩ 0.5 VRMS / 10 kΩ Cinch: Video CVBS - In Ye - Video CVBS 1 VPP / 75 Ω S-Video (Hosiden): Video Y/C - In 1 - Ground Y Gnd 2 - Ground C Gnd 3 - Video Y 1 VPP / 75 Ω 4 - Video C 0.3 VPP / 75 Ω Head phone (Output) Bk - Head phone 32 - 600 Ω / 10 mW jq jq jq H H j j ot Figure 2-2 USB (type A) 1 2 3 4 - +5V - Data (-) - Data (+) - Ground Gnd k jk jk H HDMI: Digital Video, Digital Audio - In (see HDMI 1, 2 & 3) Service Connector (UART) 1 - Ground Gnd 2 - UART_TX Transmit 3 - UART_RX Receive H k j 2009-Apr-10 EN 4 2.3.2 2. LC9.1A LA Technical Specifications and Connections Rear Connections Aerial - In - - IEC-type (EU) Coax, 75 Ω D VGA: Video RGB - In 1 5 10 6 15 11 10000_002_090121.eps 090127 Cinch: Video CVBS - Out, Audio - Out Ye - Video CVBS 1 VPP / 75 ohm Wh - Audio L 0.5 VRMS /10 kohm Rd - Audio R 0.5 VRMS / 10 kohm kq kq kq Cinch: Video CVBS - In, Audio - In Ye - Video CVBS 1 VPP / 75 ohm Wh - Audio L 0.5 VRMS / 10 kohm Rd - Audio R 0.5 VRMS / 10 kohm jq jq jq HDMI 1, 2 & 3: Digital Video, Digital Audio - In Figure 2-3 VGA Connector 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2.4 - Video Red - Video Green - Video Blue - n.c. - Ground - Ground Red - Ground Green - Ground Blue - +5VDC - Ground Sync - n.c. - DDC_SDA - H-sync - V-sync - DDC_SCL 19 18 0.7 VPP / 75 Ω 0.7 VPP / 75 Ω 0.7 VPP / 75 Ω j j j Gnd Gnd Gnd Gnd +5 V Gnd H H H H j H DDC data 0-5V 0-5V DDC clock j j j j Mini Jack: Audio - In Wh - Audio L 0.5 VRMS / 10 kΩ Rd - Audio R 0.5 VRMS / 10 kΩ jo jo CVI: Cinch: Video YPbPr - In, Audio - In Gn - Video Y 1 VPP / 75 Ω Bu - Video Pb 0.7 VPP / 75 Ω Rd - Video Pr 0.7 VPP / 75 Ω Rd - Audio - R 0.5 VRMS / 10 kΩ Wh - Audio - L 0.5 VRMS / 10 kΩ jq jq jq jq jq Chassis Overview Refer to chapter 9. Block Diagrams for PWB/CBA locations. 2009-Apr-10 1 2 E_06532_017.eps 250505 Figure 2-4 HDMI (type A) connector 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 - D2+ - Shield - D2- D1+ - Shield - D1- D0+ - Shield - D0- CLK+ - Shield - CLK- Easylink - n.c. - DDC_SCL - DDC_SDA - Ground - +5V - HPD - Ground Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Data channel Gnd Data channel Control channel j H j j H j j H j j H j jk DDC clock DDC data Gnd j jk H j j H Hot Plug Detect Gnd Precautions, Notes, and Abbreviation List LC9.1A LA 3. EN 5 3. Precautions, Notes, and Abbreviation List Index of this chapter: 3.1 Safety Instructions 3.2 Warnings 3.3 Notes 3.4 Abbreviation List 3.1 Safety Instructions Safety regulations require the following during a repair: • Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA). • Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft! Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the mounted cable clamps. • Check the insulation of the Mains/AC Power lead for external damage. • Check the strain relief of the Mains/AC Power cord for proper function. • Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position (keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ. 4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug. • Check the cabinet for defects, to prevent touching of any inner parts by the customer. 3.2 • Warnings • • • • All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Be careful during measurements in the high voltage section. Never replace modules or other components while the unit is switched “on”. When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable. 3.3 Notes 3.3.1 General • Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and 3.3.2 Schematic Notes • • • • • • 3.3.3 picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3). Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols. All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ). Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω). All capacitor values are given in micro-farads (μ = × 10-6), nano-farads (n = × 10-9), or pico-farads (p = × 10-12). Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF). An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values. The correct component values are listed on the Philips Spare Parts Web Portal. Spare Parts For the latest spare part overview, consult your Philips Spare Part web portal. 3.3.4 BGA (Ball Grid Array) ICs Introduction For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs. BGA Temperature Profiles For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual. 3.3.5 Lead-free Soldering Due to lead-free technology some rules have to be respected by the workshop during a repair: • Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle. • Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications. • Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat. • Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin. 2009-Apr-10 EN 6 3.3.6 3. LC9.1A LA Precautions, Notes, and Abbreviation List 3.4 Alternative BOM identification It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”. The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number. Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number. MODEL : 32PF9968/10 PROD.NO: AG 1A0617 000001 MADE IN BELGIUM 220-240V ~ 50/60Hz 128W VHF+S+H+UHF S BJ3.0E LA 10000_024_090121.eps 090121 Abbreviation List 0/6/12 AARA ACI ADC AFC AGC AM AP AR ASF ATSC ATV Auto TV AV AVC AVIP B/G BLR BTSC Figure 3-1 Serial number (example) 3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR) If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging! 3.3.8 Practical Service Precautions • • It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard. Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution. B-TXT C CEC CL CLR ComPair CP CSM CTI CVBS DAC DBE DDC D/K DFI DFU DMR DMSD DNM 2009-Apr-10 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page Analogue to Digital Converter Automatic Frequency Control: control signal used to tune to the correct frequency Automatic Gain Control: algorithm that controls the video input of the feature box Amplitude Modulation Asia Pacific Aspect Ratio: 4 by 3 or 16 by 9 Auto Screen Fit: algorithm that adapts aspect ratio to remove horizontal black bars without discarding video information Advanced Television Systems Committee, the digital TV standard in the USA See Auto TV A hardware and software control system that measures picture content, and adapts image parameters in a dynamic way External Audio Video Audio Video Controller Audio Video Input Processor Monochrome TV system. Sound carrier distance is 5.5 MHz Board-Level Repair Broadcast Television Standard Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries Blue TeleteXT Centre channel (audio) Consumer Electronics Control bus: remote control bus on HDMI connections Constant Level: audio output to connect with an external amplifier Component Level Repair Computer aided rePair Connected Planet / Copy Protection Customer Service Mode Color Transient Improvement: manipulates steepness of chroma transients Composite Video Blanking and Synchronization Digital to Analogue Converter Dynamic Bass Enhancement: extra low frequency amplification See “E-DDC” Monochrome TV system. Sound carrier distance is 6.5 MHz Dynamic Frame Insertion Directions For Use: owner's manual Digital Media Reader: card reader Digital Multi Standard Decoding Digital Natural Motion Precautions, Notes, and Abbreviation List DNR DRAM DRM DSP DST DTCP DVB-C DVB-T DVD DVI(-d) E-DDC EDID EEPROM EMI EPLD EU EXT FDS FDW FLASH FM FPGA FTV Gb/s G-TXT H HD HDD HDCP HDMI HP I I2 C I2 D I2 S IF IR IRQ ITU-656 Digital Noise Reduction: noise reduction feature of the set Dynamic RAM Digital Rights Management Digital Signal Processing Dealer Service Tool: special remote control designed for service technicians Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394 Digital Video Broadcast - Cable Digital Video Broadcast - Terrestrial Digital Versatile Disc Digital Visual Interface (d= digital only) Enhanced Display Data Channel (VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display. Extended Display Identification Data (VESA standard) Electrically Erasable and Programmable Read Only Memory Electro Magnetic Interference Erasable Programmable Logic Device Europe EXTernal (source), entering the set by SCART or by cinches (jacks) Full Dual Screen (same as FDW) Full Dual Window (same as FDS) FLASH memory Field Memory or Frequency Modulation Field-Programmable Gate Array Flat TeleVision Giga bits per second Green TeleteXT H_sync to the module High Definition Hard Disk Drive High-bandwidth Digital Content Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding. High Definition Multimedia Interface HeadPhone Monochrome TV system. Sound carrier distance is 6.0 MHz Inter IC bus Inter IC Data bus Inter IC Sound bus Intermediate Frequency Infra Red Interrupt Request The ITU Radio communication Sector (ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, ITV LS LATAM LCD LED L/L' LPL LS LVDS Mbps M/N MIPS MOP MOSFET MPEG MPIF MUTE NC NICAM NTC NTSC NVM O/C OSD OTC P50 PAL PCB PCM PDP PFC PIP PLL POD POR PTC PWB LC9.1A LA 3. EN 7 uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz. Institutional TeleVision; TV sets for hotels, hospitals etc. Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences Latin America Liquid Crystal Display Light Emitting Diode Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I LG.Philips LCD (supplier) Loudspeaker Low Voltage Differential Signalling Mega bits per second Monochrome TV system. Sound carrier distance is 4.5 MHz Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor Matrix Output Processor Metal Oxide Silicon Field Effect Transistor, switching device Motion Pictures Experts Group Multi Platform InterFace MUTE Line Not Connected Near Instantaneous Compounded Audio Multiplexing. This is a digital sound system, mainly used in Europe. Negative Temperature Coefficient, non-linear resistor National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air) Non-Volatile Memory: IC containing TV related data such as alignments Open Circuit On Screen Display On screen display Teletext and Control; also called Artistic (SAA5800) Project 50: communication protocol between TV and peripherals Phase Alternating Line. Color system mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M= 3.575612 MHz and PAL N= 3.582056 MHz) Printed Circuit Board (same as “PWB”) Pulse Code Modulation Plasma Display Panel Power Factor Corrector (or Preconditioner) Picture In Picture Phase Locked Loop. Used for e.g. FST tuning systems. The customer can give directly the desired frequency Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set) Power On Reset, signal to reset the uP Positive Temperature Coefficient, non-linear resistor Printed Wiring Board (same as “PCB”) 2009-Apr-10 EN 8 3. PWM QRC QTNR QVCP RAM RGB RC RC5 / RC6 RESET ROM RSDS R-TXT SAM S/C SCART SCL SCL-F SD SDA SDA-F SDI SDRAM SECAM SIF SMPS SoC SOG SOPS SPI S/PDIF SRAM SRP SSB STBY SVGA SVHS SW SWAN SXGA TFT THD TMDS TXT TXT-DW UI uP UXGA V VESA VGA VL VSB WYSIWYR WXGA XTAL XGA 2009-Apr-10 LC9.1A LA Precautions, Notes, and Abbreviation List Pulse Width Modulation Quasi Resonant Converter Quality Temporal Noise Reduction Quality Video Composition Processor Random Access Memory Red, Green, and Blue. The primary color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced. Remote Control Signal protocol from the remote control receiver RESET signal Read Only Memory Reduced Swing Differential Signalling data interface Red TeleteXT Service Alignment Mode Short Circuit Syndicat des Constructeurs d'Appareils Radiorécepteurs et Téléviseurs Serial Clock I2C CLock Signal on Fast I2C bus Standard Definition Serial Data I2C DAta Signal on Fast I2C bus Serial Digital Interface, see “ITU-656” Synchronous DRAM SEequence Couleur Avec Mémoire. Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz Sound Intermediate Frequency Switched Mode Power Supply System on Chip Sync On Green Self Oscillating Power Supply Serial Peripheral Interface bus; a 4wire synchronous serial data link standard Sony Philips Digital InterFace Static RAM Service Reference Protocol Small Signal Board STand-BY 800x600 (4:3) Super Video Home System Software Spatial temporal Weighted Averaging Noise reduction 1280x1024 Thin Film Transistor Total Harmonic Distortion Transmission Minimized Differential Signalling TeleteXT Dual Window with TeleteXT User Interface Microprocessor 1600x1200 (4:3) V-sync to the module Video Electronics Standards Association 640x480 (4:3) Variable Level out: processed audio output toward external amplifier Vestigial Side Band; modulation method What You See Is What You Record: record selection that follows main picture and sound 1280x768 (15:9) Quartz crystal 1024x768 (4:3) Y Y/C YPbPr YUV Luminance signal Luminance (Y) and Chrominance (C) signal Component video. Luminance and scaled color difference signals (B-Y and R-Y) Component video Mechanical Instructions LC9.1A LA 4. EN 9 4. Mechanical Instructions Index of this chapter: 4.1 Cable Dressing 4.2 Service Positions 4.3 Assy/Panel Removal 4.4 Set Re-assembly 4.1 Notes: • Figures below can deviate slightly from the actual situation, due to the different set executions. Cable Dressing 18490_100_090409.eps 090409 Figure 4-1 Cable dressing 42" (Frame styling) 18490_101_090409.eps 090409 Figure 4-2 Cable dressing 47" (Frame styling) 2009-Apr-10 EN 10 4. Mechanical Instructions LC9.1A LA 18490_102_090409.eps 090409 Figure 4-3 Cable dressing 52" (Frame styling) 4.2 Service Positions Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen. For easy servicing of this set, there are a few possibilities created: • The buffers from the packaging. • Foam bars (created for Service). 4.2.1 4.3 Foam Bars The instructions apply to the Roadrunner styling - with AmbiLight. 1 4.3.1 1 Assy/Panel Removal Rear Cover Warning: Disconnect the mains power cord before you remove the rear cover. Note: it is not necessary to remove the stand while removing the rear cover. 1. Remove all screws of the rear cover. 2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set. Required for sets 42" 4.3.2 Speakers Each speaker unit is mounted with two screws. When defective, replace the whole unit. 4.3.3 E_06532_018.eps 171106 Figure 4-4 Foam bars The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See Figure 4-4 for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. 2009-Apr-10 Ambi Light Each Ambi Light unit is mounted on a subframe. Refer to Figure 4-5 for details. Mechanical Instructions 4.3.5 LC9.1A LA 4. EN 11 IR & LED Board / Stand Support For removing the IR & LED board, the stand including support has to be removed When defective, replace the whole unit. 1 2 2 1 4.3.6 3 Caution: It is mandatory to remount screws at their original position during re-assembly. Failure to do so may result in damaging the SSB. 1. Unplug all connectors. 2. Remove the screws that secure the board. 3. The SSB can now be taken out of the set. 3 4.3.7 Keyboard Control Panel 1. Remove the right AmbiLight unit. 2. Remove the connector on the IR/LED board. 3. Release the cable. 4. Release the clip on top of the unit and take the unit out. When defective, replace the whole unit. 2 1 Small Signal Board (SSB) 1 4.3.8 LCD Panel 18560_408_090401.eps 090402 Refer to Figure 4-6 for details. 1. Remove the AmbiLight units as earlier described. 2. Remove the Top Support. 3. Release the LVDS - and other connectors from the SSB. 4. Remove the subframe of the SSB with the SSB still mounted on it. 5. Release all connectors from the PSU. 6. Remove the subframe of the PSU with the PSU still mounted on it. 7. Remove the stand + stand support as earlier described. 8. Release the connectors [1] on the IR & LED Panel. 9. Remove the clips that secure the flare [2]. 10. Remove the flare. 11. Now the LCD Panel can be lifted from the front cabinet. Figure 4-5 Ambi Light unit 1. Remove the Ambi Light cover [1]. 2. Unplug the connector(s) [2]. 3. Remove the subframe [3]. 4. The PWB can now be taken from the subframe. When defective, replace the whole unit. 4.3.4 Main Supply Panel 1. Unplug all connectors. 2. Remove the fixation screws. 3. Take the board out. When defective, replace the whole unit. 2 2 2 2 2 1 2 2 2 18490_103_090410.eps 090410 Figure 4-6 LCD Panel - panel removal 2009-Apr-10 EN 12 4.4 4. LC9.1A LA Mechanical Instructions Set Re-assembly To re-assemble the whole set, execute all processes in reverse order. Notes: • While re-assembling, make sure that all cables are placed and connected in their original position. See figure Figure 4-1, Figure 4-2 or Figure 4-3. • Pay special attention not to damage the EMC foams on the SSB shields. Ensure that EMC foams are mounted correctly. 2009-Apr-10 Service Modes, Error Codes, and Fault Finding LC9.1A LA 5. EN 13 5. Service Modes, Error Codes, and Fault Finding Index of this chapter: 5.1 Test Points 5.2 Service Modes 5.3 Service Tools 5.4 Error Codes 5.5 The Blinking LED Procedure 5.6 Fault Finding and Repair Tips 5.7 Software Upgrading Test Points In the chassis schematics and layout overviews, the test points are mentioned. In the schematics, test points are indicated with “Fxxx” or “Ixxx”, in the layout overviews with a “half-moon” sign. As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. Several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions: • Service Default Mode. • Video: Colour bar signal. • Audio: 3 kHz left, 1 kHz right. 5.2 Service Modes The Service Mode feature is split into four parts: • Service Default Mode (SDM). • Service Alignment Mode (SAM). • Customer Service Mode (CSM). • Computer Aided Repair Mode (ComPair). SDM and SAM offer features, which can be used by the Service engineer to repair/align a TV set. Some features are: • A pre-defined situation to ensure measurements can be made under uniform conditions (SDM). • Activates the blinking LED procedure for error identification when no picture is available (SDM). • The possibility to overrule software protections when SDM is entered via the Service pins. • Make alignments (e.g. White Tone), (de)select options, enter options codes, reset the error buffer (SAM). • Display information (“SDM” or “SAM” indication in upper right corner of screen, error buffer, software version, operating hours, options and option codes, sub menus). The CSM is a Service Mode that can be enabled by the consumer. The CSM displays diagnosis information, which the customer can forward to the dealer or call centre. In CSM mode, “CSM”, is displayed in the top right corner of the screen. The information provided in CSM and the purpose of CSM is to: • Increase the home repair hit rate. • Decrease the number of nuisance calls. • Solved customers' problem without home visit. General Some items are applicable to all Service Modes or are general. These are listed below. Life Timer During the life time cycle of the TV set, a timer is kept (called “Op. Hour”). It counts the normal operation hours (not the Stand-by hours). The actual value of the timer is displayed in SDM and SAM in a decimal value. Every two soft-resets increase the hour by +1. Standby hours are not counted. Software Identification, Version, and Cluster The software ID, version, and cluster will be shown in the main menu display of SDM, SAM, and CSM. The screen will show: “AAAABCD X.YY”, where: • AAAA is the chassis name: LC91. • B is the region indication: E= Europe, A= AP/China, U= NAFTA, L= LATAM. • C is the display indication: L= LCD, P= Plasma. • D is the language/feature indication: 1= Standard, H= Full HD. • X is the main version number: this is updated with a major change of specification (incompatible with the previous software version). Numbering will go from 1 - 9 and A - Z. – If the main version number changes, the new version number is written in the NVM. – If the main version number changes, the default settings are loaded. • YY is the sub version number: this is updated with a minor change (backwards compatible with the previous versions) Numbering will go from 00 - 99. – If the sub version number changes, the new version number is written in the NVM. – If the NVM is fresh, the software identification, version, and cluster will be written to NVM. Display Option Code Selection When after an SSB or display exchange, the display option code is not set properly, it will result in a TV with “no display”. Therefore, it is required to set this display option code after such a repair. To do so, press the following key sequence on a standard RC transmitter: “062598” directly followed by MENU and “xxx”, where “xxx” is a 3 digit decimal value of the panel type: see column “Display Code” in Table 6-5 , or see sticker on the side/ bottom of the cabinet. When the value is accepted and stored in NVM, the set will switch to Stand-by, to indicate that the process has been completed. Display Option Code 39mm PHILIPS ComPair Mode is used for communication between a computer and a TV on I2C /UART level and can be used by a Service engineer to quickly diagnose the TV set by reading out error codes, read and write in NVMs, communicate with ICs and the uP (PWM, registers, etc.), and by making use of a fault finding database. It will also be possible to up and download the software of the TV set via I2C with help of ComPair. To do this, ComPair has to be connected to the TV set via the ComPair connector, which will be accessible through the rear of the set (without removing the rear cover). 27mm 5.1 5.2.1 040 MODEL: 32PF9968/10 PROD.SERIAL NO: AG 1A0620 000001 (CTN Sticker) E_06532_038.eps 240108 Figure 5-1 Location of Display Option Code sticker During this algorithm, the NVM-content must be filtered, because several items in the NVM are TV-related and not SSBrelated (e.g. Model and Prod. S/N). Therefore, “Model” and “Prod. S/N” data is changed into “See Type Plate”. In case a call centre or consumer reads “See Type Plate” in CSM mode, he needs to look to the side/bottom sticker to identify the set, for further actions. 2009-Apr-10 EN 14 5.2.2 5. LC9.1A LA Service Modes, Error Codes, and Fault Finding Service Default Mode (SDM) Purpose Set the TV in SDM mode in order to be able to create a predefined setting for measurements to be made. In this platform, a simplified SDM is introduced (without protection override and without tuning to a frequency of 475.25 MHz). Specifications • Set linear video and audio settings to 50%, but volume to 25%. Stored user settings are not affected. • All service-unfriendly modes (if present) are disabled, since they interfere with diagnosing/repairing a set. These service unfriendly modes are: – (Sleep) timer. – Blue mute/Wall paper. – Auto switch “off” (when there is no “ident” signal). – Hotel or hospital mode. – Child lock or parental lock (manual or via V-chip). – Skipping, blanking of “Not favourite”, “Skipped” or “Locked” presets/channels. – Automatic storing of Personal Preset or Last Status settings. – Automatic user menu time-out (menu switches back/ OFF automatically. – Auto Volume levelling (AVL). How to Activate To activate SDM, use one of the following methods: • Press the following key sequence on the remote control transmitter: “062596” directly followed by the MENU button (do not allow the display to time out between entries while keying the sequence). • Short one of the “Service” jumpers on the TV board during cold start (see Figure 5-2). Then press the mains button (remove the short after start-up). Caution: Activating SDM by shorting “Service” jumpers will override the DC speaker protection (error 1), the General I2C error (error 4), and the Trident video processor error (error 5). When doing this, the service-technician must know exactly what he is doing, as it could damage the television set. Figure 5-3 SDM menu Menu explanation: • HHHHH: Are the operating hours (in decimal). • AAAABCD-X.YY: See paragraph Software Identification, Version, and Cluster for the SW name definition. • ERR: Shows all errors detected since the last time the buffer was erased in format(five errors possible). • OP: Used to read-out the option bytes. See “Options” in the Alignments section for a detailed description. Ten codes (in two rows) are possible. How to Navigate As this mode is read only, there is not much to navigate. To switch to other modes, use one of the following methods: • Command MENU from the user remote will enter the normal user menu (brightness, contrast, colour, etc...) with “SDM” OSD remaining, and pressing MENU key again will return to the last status of SDM again. • To prevent the OSD from interfering with measurements in SDM, command “OSD” or “i+” (“STATUS” or “INFO” for NAFTA and LATAM) from the user remote will toggle the OSD “on/off” with “SDM” OSD remaining always “on”. • Press the following key sequence on the remote control transmitter: “062596” directly followed by the OSD/ STATUS/INFO/i+ button to switch to SAM (do not allow the display to time out between entries while keying the sequence). How to Exit Switch the set to STANDBY by pressing the mains button on the remote control transmitter or on the television set. If you switch the television set “off” by removing the mains (i.e., unplugging the television), the television set will remain in SDM when mains is re-applied, and the error buffer is not cleared. The error buffer will only be cleared when the “clear” command is used in the SAM menu. 1 SDM 18490_201_090409.eps 090409 Figure 5-2 Service jumper (SSB component side) On Screen Menu After activating SDM, the following screen is visible, with SDM in the upper right corner of the screen to indicate that the television is in Service Default Mode. 2009-Apr-10 H_17740_030.eps 230108 Note: • If the TV is switched “off” by a power interrupt while in SDM, the TV will show up in the last status of SDM menu as soon as the power is supplied again. The error buffer will not be cleared. • In case the set is in Factory mode by accident (with “F” displayed on screen), by pressing and hold “VOL-“ and “CH-” together should leave Factory mode. Service Modes, Error Codes, and Fault Finding 5.2.3 Service Alignment Mode (SAM) Purpose • To change option settings. • To display / clear the error code buffer. • To perform alignments. Specifications • Operation hours counter (maximum five digits displayed). • Software version, error codes, and option settings display. • Error buffer clearing. • Option settings. • Software alignments (White Tone). • NVM Editor. • Set screen mode to full screen (all content is visible). How to Activate To activate SAM, use one of the following methods: • Press the following key sequence on the remote control transmitter: “062596” directly followed by the OSD/ STATUS/INFO/i+ button (it depends on region which button is present on the RC). Do not allow the display to time out between entries while keying the sequence. • Or via ComPair. After entering SAM, the following screen is visible, with SAM in the upper right corner of the screen to indicate that the television is in Service Alignment Mode. LC9.1A LA 5. EN 15 How to Navigate • In the SAM menu, select menu items with the UP/DOWN keys on the remote control transmitter. The selected item will be indicated. When not all menu items fit on the screen, use the UP/DOWN keys to display the next / previous menu items. • With the LEFT/RIGHT keys, it is possible to: – Activate the selected menu item. – Change the value of the selected menu item. – Activate the selected sub menu. • When you press the MENU button twice while in top level SAM, the set will switch to the normal user menu (with the SAM mode still active in the background). To return to the SAM menu press the MENU button. • The “OSD/STATUS/INFO/i+” key from the user remote will toggle the OSD “on/off” with “SAM” OSD remaining always “on”. • Press the following key sequence on the remote control transmitter: “062596” directly followed by the MENU button to switch to SDM (do not allow the display to time out between entries while keying the sequence). How to Store SAM Settings To store the settings changed in SAM mode (except the OPTIONS and RGB ALIGN settings), leave the top level SAM menu by using the POWER button on the remote control transmitter or the television set. The mentioned exceptions must be stored separately via the STORE button. How to Exit Switch the set to STANDBY by pressing the mains button on the remote control transmitter or the television set. Note: • When the TV is switched “off” by a power interrupt while in SAM, the TV will show up in “normal operation mode” as soon as the power is supplied again. The error buffer will not be cleared. • In case the set is in Factory mode by accident (with “F” displayed on screen), by pressing and hold “VOL-“ and “CH-” together should leave Factory mode. H_17740_025.eps 230108 Figure 5-4 SAM menu Menu explanation: 1. System Information: • Op. Hour. This represents the life timer. The timer counts normal operation hours, but does not count Stand-by hours. • MAIN SW ID. See paragraph Software Identification, Version, and Cluster for the SW name definition. • ERROR CODES. Shows all errors detected since the last time the buffer was erased. Five errors possible. • OP1 / OP2. Used to read-out the option bytes. See paragraph 6.4 Option Settings in the Alignments section for a detailed description. Ten codes are possible. 2. Clear. Erases the contents of the error buffer. Select the CLEAR menu item and press the MENU RIGHT key. The content of the error buffer is cleared. 3. Options. To set the option bits. See paragraph 6.4 Option Settings in the “Alignments” chapter for a detailed description. 4. RGB Align. To align the White Tone. See White Tone Alignment: for a detailed description. 5. NVM Editor. To change the NVM data in the television set. See also paragraph 5.6 Fault Finding and Repair Tips. 6. NVM Copy. Gives the possibility to copy/load the NVM file to/from an USB stick. NVM data copied to a USB memory device is named “NVM_COPY.BIN”. When copied back to a TV, the file first must have the same name. 2009-Apr-10 EN 16 5.2.4 5. LC9.1A LA Service Modes, Error Codes, and Fault Finding Customer Service Mode (CSM) Purpose The Customer Service Mode shows error codes and information on the TV’s operation settings. A call centre can instruct the customer (by telephone) to enter CSM in order to identify the status of the set. This helps them to diagnose problems and failures in the TV before making a service call. The CSM is a read-only mode; therefore, modifications are not possible in this mode. Specifications • Ignore “Service unfriendly modes”. • Line number for every line (to make CSM language independent). • Set the screen mode to full screen (all contents on screen is visible). • After leaving the Customer Service Mode, the original settings are restored. • Possibility to use “CH+” or “CH-” for channel surfing, or enter the specific channel number on the RC. How to Activate To activate CSM, press the following key sequence on a standard remote control transmitter: “123654” (do not allow the display to time out between entries while keying the sequence). Upon entering the Customer Service Mode, the following screen will appear: Menu Explanation 1. Model Number. Type number, e.g. 42PFL9509/93. (*) 2. Production Serial Number. Product serial no., e.g. SV1A0908123456 (*). SV= Production centre, 1= BOM code, A= Service version change code, 09= Production year, 08= Production week, 123456= Serial number. 3. Software Version. Main software cluster and version is displayed. 4. Option Code 1. Option code information (group 1). 5. Option Code 2. Option code information (group 2). 6. PSU. Indication of the PSU factory ID (= 12nc). 7. SSB. Indication of the SSB factory ID (= 12nc). (*) 8. Display. Indication of the display ID (=12 nc). (*) 9. NVM Version. The NVM software version no. 10. PQ Version. PQ (picture quality) data version. This is a subset of the main SW. 11. Key (HDCP). Indicates if the HDMI keys (or HDCP keys) are valid or not. 12. Audio System. Gives information about the audio system of the selected transmitter. 13. Blank. 14. Video Format. Gives information about the video format of the selected transmitter (480p30/720p60/1080i50/1080i60, etc...). Is applicable to both HDMI and CVI sources. 15. Standby uP SW ID. Shows the Standby Processor software version. 16. Bootloader ID. Shows the Bootloader software ID. 17. Panel code. Gives the number of the panel as stored in NVM. 18. AP uP SW ID.Shows the AL uP software version. (*) If an NVM IC is replaced or initialized, these items must be re-written to the NVM. ComPair will foresee in a possibility to do this. How to Exit To exit CSM, use one of the following methods: • Press the MENU button twice on the remote control transmitter. • Press the POWER button on the remote control transmitter. • Press the POWER button on the television set. 18490_202_090409.eps 090409 Figure 5-5 CSM menu -1- (example) 18490_203_090409.eps 090409 Figure 5-6 CSM menu -2- (example) 2009-Apr-10 Service Modes, Error Codes, and Fault Finding 5.3 Service Tools 5.4 Error Codes 5.3.1 ComPair 5.4.1 Introduction Introduction ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following: 1. ComPair helps you to quickly get an understanding on how to repair the chassis in a short and effective way. 2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. You do not have to know anything about I2C or UART commands yourself, because ComPair takes care of this. 3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available. 4. ComPair features TV software up possibilities. Example: In case of a failure of the I2C bus (CAUSE), the error code for a “General I2C failure” and “Protection errors” is displayed. The error codes for the single devices (EFFECT) is not displayed. All error codes are stored in the same error buffer (TV’s NVM) except when the NVM itself is defective. TO TV TO UART SERVICE CONNECTOR 5.4.2 ComPair II RC in RC out EN 17 The last five errors, stored in the NVM, are shown in the Service menu’s. This is called the error buffer. The error code buffer contains all errors detected since the last time the buffer was erased. The buffer is written from left to right. When an error occurs that is not yet in the error code buffer, it is displayed at the left side and all other errors shift one position to the right. An error will be added to the buffer if this error differs from any error in the buffer. The last found error is displayed on the left. An error with a designated error code may never lead to a deadlock situation. This means that it must always be diagnosable (e.g. error buffer via OSD or blinking LED procedure, ComPair to read from the NVM). In case a failure identified by an error code automatically results in other error codes (cause and effect), only the error code of the MAIN failure is displayed. How to Connect This is described in the ComPair chassis fault finding database. TO I2C SERVICE CONNECTOR 5. Error codes are required to indicate failures in the TV set. In principle a unique error code is available for every: • Activated (SW) protection. • Failing I2C device. • General I2C error. Specifications ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The (new) ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). TO UART SERVICE CONNECTOR LC9.1A LA How to Read the Error Buffer Multi function Optional Power Link/ Mode Switch Activity I2C You can read the error buffer in 3 ways: • On screen via the SAM/SDM/CSM (if you have a picture). Example: – ERROR: 0 0 0 0 0 : No errors detected – ERROR: 6 0 0 0 0 : Error code 6 is the last and only detected error – ERROR: 9 6 0 0 0 : Error code 6 was detected first and error code 9 is the last detected (newest) error • Via the blinking LED procedure (when you have no picture). See paragraph 5.5 The Blinking LED Procedure. • Via ComPair. RS232 /UART PC ComPair II Developed by Philips Brugge HDMI I2C only 5.4.3 Optional power 5V DC E_06532_036.eps 150208 Figure 5-7 ComPair II interface connection Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown! How to Order ComPair II order codes: • ComPair II interface: 3122 785 91020. • ComPair UART interface cable: 3138 188 75051. • Program software can be downloaded from the Philips Service website. Note: If you encounter any problems, contact your local support desk. 5.3.2 LVDS Tool Support of the LVDS Tool has been discontinued. Error codes The layer 1 error codes are pointing to the defective board. They are triggered by LED blinking when CSM is activated. In the LC09M platform, only two boards are present: the SSB and the PSU, meaning only two layer 1 errors are defined (or three in case an additional bolt-on module is added): • 2: SSB • 4: PSU • 6: Bolt-on. The following layer 2 errors have been assigned: • 00: no error • 11: DC protection of speakers, detected by MT539x • 12: +12V protection error (or 12V failure), detected by standby processor during start-up • 13: POK line error • 14: General I2C bus error when all the devices I2C devices on the same bus had no response • 15: I2C error while communicating with the main EEPROM • 16: I2C error while communicating with the PLL/hybrid tuner • 17: I2C error while communicating with the HDMI Mux IC ADV3002 • 18: IF demodulator TDA9886 • 19: Reserved 2009-Apr-10 EN 18 • 5.4.4 5. LC9.1A LA Service Modes, Error Codes, and Fault Finding 21: Digital Bolt-on module communication error (where applicable). 5.6 Notes: • It is assumed that the components are mounted correctly with correct values and no bad solder joints. • Before any fault finding actions, check if the correct options are set. How to Clear the Error Buffer The error code buffer is cleared in the following cases: • By using the CLEAR command in the SAM menu: • If the contents of the error buffer have not changed for 50 hours, the error buffer resets automatically. 5.6.1 Note: If you exit SAM by disconnecting the mains from the television set, the error buffer is not reset. 5.5 The Blinking LED Procedure 5.5.1 Introduction Errors can also be displayed by the blinking LED procedure. The method is to repeatedly let the front LED pulse with as many pulses as the error code number, followed by a period of 1.5 seconds in which the LED is “off”. Then this sequence is repeated. Remark on the Supply Errors The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection. Example (1): error code 4 will result in four times the sequence LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After this sequence, the LED will be “off” for 1.5 seconds. Any RC5 command terminates the sequence. Error code LED blinking is in red colour. 5.5.2 Protections during Start-up During TV start-up, some voltages and IC observers are actively monitored to be able to optimize the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. 5.6.2 Hardware Protections The only real hardware protection in this chassis is (in case of an audio problem) the audio protection circuit that will trigger the uP to switch “off” the TV. Repair Tip • It is also possible that you have an audio DC protection because of an interruption in one or both speakers (the DC voltage that is still on the circuit cannot disappear through the speakers). Caution: (dis)connecting the speaker wires during the ON state of the TV at high volume can damage the audio amplifier. Displaying the Entire Error Buffer Additionally, the entire error buffer is displayed when Service Mode “SDM” is entered. In case the TV set is in protection or Stand-by: The blinking LED procedure sequence (as in SDMmode in normal operation) must be triggered by the following RC sequence: “MUTE” “062500” “OK”. In order to avoid confusion with RC5 signal reception blinking, this blinking procedure is terminated when a RC5 command is received. Software Protections Most of the protections and errors use either the stand-by or the micro processor as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions: • Protections related to supplies: check of the 12V. • Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more. The software is capable of identifying different kinds of errors. Because it is possible that more than one error can occur over time, an error buffer is available, which is capable of storing the last five errors that occurred. This is useful if the OSD is not working properly. Example (2): the content of the error buffer is “12 9 6 0 0” After entering SDM, the following occurs: • 1 long blink of 5 seconds to start the sequence, • 12 short blinks followed by a pause of 1.5 seconds, • 9 short blinks followed by a pause of 1.5 seconds, • 6 short blinks followed by a pause of 1.5 seconds, • 1 long blink of 1.5 seconds to finish the sequence, • The sequence starts again with 12 short blinks. Fault Finding and Repair Tips 5.6.3 NVM Editor In some cases, it can be convenient if one directly can change the NVM contents. This can be done with the “NVM Editor” in SAM mode. With this option, single bytes can be changed. Caution: • Do not change these, without understanding the function of each setting, because incorrect NVM settings may seriously hamper the correct functioning of the TV set! • Always write down the existing NVM settings, before changing the settings. This will enable you to return to the original settings, if the new settings turn out to be incorrect. 2009-Apr-10 Service Modes, Error Codes, and Fault Finding 5.6.4 Hex Dec Description 0x000A 10 Existing value Value 0x0000 0 New value Store Store? 5.6.5 Alternative method: It is also possible to upload the default values to the NVM with ComPair in case the SW is changed, the NVM is replaced with a new (empty) one, or when the NVM content is corrupted. EN 19 Display option code Caution: In case you have replaced the SSB, always check the display option code in SAM, even if you have picture. With a wrong display option code it is possible that you have picture, but that in certain conditions you have unwanted side-effects. Load Default NVM Values It is possible to download default values automatically into the NVM in case a blank NVM is placed or when the NVM first 20 address contents are “FF”. After the default values are downloaded, it is possible to start-up and to start aligning the TV set. To initiate a forced default download the following action has to be performed: 1. Switch “off” the TV set with the mains cord disconnected from the wall outlet (it does not matter if this is from “Standby” or “Off” situation). 2. Short-circuit the SDM jumpers on the SSB (keep short circuited). 3. Press “P+” or “CH+” on the local keyboard (and keep it pressed). 4. Reconnect the mains supply to the wall outlet. 5. Release the “P+” or “CH+” when the set is started up and has entered SDM. When the downloading has completed successfully, the set should be into Stand-by, i.e. red LED on. 5. After replacing an EEPROM (or with a defective/no EEPROM), default settings should be used to enable the set to start-up and allow the Service Default Mode and Service Alignment Mode to be accessed. Table 5-1 NVM editor overview Address LC9.1A LA 5.6.6 Trouble Shooting Tuner section When there is no picture in analog RF mode: 1. Check whether picture is present in AV mode. If not, tuner section is okay. Check video processing section. 2. Check if option settings are correct. Tuner profile in OP10: OPA7..OPA5=000 (China region), 010 (AP region). 3. Check if 5 V supply is available at test points F256, F228, F229 and F219, and if 33 V is available at test point F257. 4. Check if the I2C lines are working correctly (3.3 V). 5. Manually store a known channel and check if there is IF output at tuner pin 11. If not, tuner is faulty. 6. Feed in 105 dBuV at tuner pin 11 and check whether there is CVBS output from IF demodulator IC. If not, IF demodulator might be faulty. Check components in this area. 5.6.7 Trouble Shooting Sound section 18490_209_090409.eps 090409 Figure 5-8 Fault finding tree sound section 2009-Apr-10 EN 20 5.6.8 5. LC9.1A LA Service Modes, Error Codes, and Fault Finding Trouble Shooting HDMI section No Video and Audio for any HDMI input (permanently) Check TMDS signal at pin 1, 3, 4, 6, 7, 9, 10, 12 of connector 1 (if HDMI 1) No Yes Check TMDS signal at pin 37,38,41,42,44,45,47,48 of ADV3002 (if HDMI 1) No Yes Malfuntion of HDMI connector, ensure solderbility of Connector Malfuntion of PCB trace, ensure no broken trace of these signals between connector and ADV3002 Check TMDS signal at pin 25,26,28,29,31,32,34,35 of ADV3002 No Yes Malfuntion of ADV3002 The video and audio path is intact, no video & audio is cause by MTK 5392 malfunction No Video and Audio for any HDMI input (Intermittent and differ within various DVD player) Go to CSM mode using RC key "123654", check item 11: Key(HDCP) Invalid Reload HDCP key Valid check item 19: EDID Version / Check sum As per latest? No Yes Update EDID Check the following possible hardware failure: 1) Supply of EEPROM IC (pin 8 of 7B02). Should be +5V. 2) Connectivity of I2C between EEPROM (7B02) and ADV3002 (7B05). Between pin 5, 6 of 7B02 and pin 61 , 62 of 7B05. Should be +3.8V. 3) Connectivity of DDC line between HDMI connector and ADV3002. (ex: pin 15, 16 of connector HDMI 1 to pin 69 , 70 of ADV3002.) 4) Connectivity of DDC line between ADV3002 and MTK5392. (pin 67, 68 of ADV3002 to test point F836 & F837) 18490_211_090409.eps 090409 Figure 5-9 Fault finding tree HDMI section 2009-Apr-10 Service Modes, Error Codes, and Fault Finding 5.6.9 Start-up/Shut-down Flowcharts On the next pages you will find start-up and shut-down flowcharts, which might be helpful during fault finding. POWER STATES In this chassis, there are six possible power states as follows: • Power OFF • Power ON • STANDBY • SEMI-STANDBY • Special Panel Mode • PROTECTION LC9.1A LA 5. EN 21 SPECIAL PANEL MODE The Special Panel Mode is only used during manufacturing process to program the system EEPROM. In this mode, the SDA0 and SCL0 ports of MT5392 are set to high impedance after SDM and PANEL pins are both detected as “low” during start-up. This mode can be exited using a power recycle. PROTECTION This state is entered when an error has been detected at startup or in the “ACTIVE” mode. All switched power supply lines are turned “off” with only +3V3stby remaining “on”; similar to “STANDBY” mode. This state is indicated by the blinking red front LED with the blinking sequence denoting the type of error detected. When the system enters the protection mode due to a critical error, it should be turned “off” and the failure cause needs to be resolved. The system will function normally again after performing a power recycling once all protection causing failures have been resolved. START-UP SEQUENCE There are two cases of start-up sequences, namely: • AC On and • Standby Wake-up. See also Figure 5-11. 18490_204_090409.eps 090409 Figure 5-10 Power States POWER OFF In “Power OFF” mode, the system is completely switched “off” from AC mains. When AC power is applied, the system checks for last status. Depending on the last standby status stored in the system EEPROM, this mode can then transit to “ON” or “STANDBY” mode. ON This is the normal operating mode, indicated by the “on” LED. All the power supply lines are available and depending on the sub-mode, all the circuits in the system may be active. From this mode it shall be possible to transit to “STANDBY” and “PROTECTION” mode, or to “Power OFF” mode if AC mains are switched “off”. The sub-modes are: • Active Mode (Normal Consumer Mode) • Service Modes • Panel Modes • Factory Modes AC ON In the case of start-up from AC mains, all PSU voltages start to turn “on” as the hardware default of the active “low” STANDBY (controlled by Standby Controller STANDBY signal) signal to the PSU is pulled “low” with respect to ground. The MT5392 starts running boot loader once the hardware reset circuit is released. The system will then check the last standby status from the system EEPROM to determine whether to complete the system start-up (load image, turn on the audio, display etc) or proceed to standby and wait for wakeup command from user. The Standby Controller then proceeds to verify the power status of the +12V and sends the system to protection in case of any failures. Special Panel, SDM, and PANEL modes are detected as well. STANDBY WAKEUP When the system receives a command to wake-up from standby, the Standby Controller sets the STANDBY signal “low” to turn “on” the switched power, and similarly detects for the presence of +12V. The MT5392 waits for +3V3_SW to be available before loading its image. The significance of this voltage detection is due to the flash is also being powered by the same mentioned voltage. The following figure shows the start-up flowchart for both “AC On” and “Standby Wake-up”: STANDBY The total power consumption of the system in this mode shall be equal or less than 150 mW. This state is indicated by white LED when AC mains is switched “on”. Only the standby controller is operational in this state, where only +3V3stby power supply is available. From this mode it shall be possible to transit to the “ACTIVE” or “Power OFF” mode if AC mains are switched “off”. SEMI-STANDBY The semi-standby state is required to perform the following tasks: • AmbiLight wakeup control • PBS SemiStandby. 2009-Apr-10 EN 22 5. Service Modes, Error Codes, and Fault Finding LC9.1A LA Timeout = 6 Sec ? START yes 12V Error [ Protection ] HW Default PSU is ON, and MT5392 POR MT5392 POR and config DRAM decompress bootloader into DRAM (preLoader) NVM Error [ Protection ] Initialize Tuner Tuner No Initialize CEC driver Check T8032 CEC buffer DTV_IRQ = Low MT5392 Bootloader decompressed and running from DRAM T8032 Initialize NVM Wait 100ms No Wait 100ms T8032 with CEC data Yes DTV_IRQ = High 5392 checks POWER_DOWN = HIGH ? Yes Turn on LED1 If not watchdog reboot, Enable 20 seconds watchdog Copy CEC data from T8032 to MT5392 CEC driver buffer Special Panel mode Detection All IIC Port set to High Impedance Yes Switch CEC h/w control from T8032 to MT5392 Is it Ambilight wakeup? SDM & PANEL = LOW? No No Initialize HDMI Switch HDMI Switch Initialize OSD Turn off Philips logo Retrieve/Display Startup Logo No END Check T8032 Status Panel turn on Sequence Error #, failed into Protection mode, Record error in NVM. Yes T8032 reset state Communicate Failed Count <= 3 Communicate Failed Count > 3 T8032 booting NVM Error [ Protecti on ] No Wait for Panel_On_Time_1 based on Panel ID in ms (from Panel Info on Flash) Initialize Application Layer Yes Switch on LVDS Signal Yes T8032 main loop Initialize Philips drivers/Application Retrieve Panel ID from NVM Retrieve Panel Info from Flash data T8032/ARM Communicate ok? No Initialize Middleware Layer Turn on LVDS Power LCD_PWR_ON = LOW Download T8032 Code And kick uP to start to run. Check T8032/ARM communication ready? 1. Version cmd ok. 2. Setup CEC parameters. 3.774 second PWM_DIMMING keep at 100% BACKLIGHT_BOOST at nominal T8032 in reset State? (Cold Boot?) Drop All RC key received before this block Switch RC/OPCTRL control from T8032 to MT5392 and Enable RC Key Wait for Panel_On_Time_2 based on Panel ID in ms (from Panel Info on Flash) Enable T8032 receive IR key Semi-Standby Is it Ambilight wakeup? No NVM status to check Upgrade bit No Panel Initialization Panel Initialization Ambilight off Yes Yes Yes No Check Wakeup Reason from PDWNC module (IR/Keypad HW and CEC) and confirm from T8032 USB Upgrade Start up OK Cold Start? BACKLIGHT_ON_OFF = HIGH Calculate Boot Bank address Switch to Video Path No Check PowerDown No Standby (HW) Check Boot Bank Flag in EEPROM Power on Standby (HW) Yes Blinking LED Yes Received wakeup event BACKLIGHT_ON_OFF = HIGH Any of Upgrade bits at NVM is on? Blank Picture and Switch to Last Source Yes Upgrade success MT5392 Decompress Image from Flash into DRAM Yes Picture Mode Setup & Detection NVM Error [ Protection ] Control PDWNC module to wakeup ARM11 Audio MUTEn = LOW SW_MUTE = LOW Check Last Status and Boot Ctrl Bits from NVM AP: Background Manager Successful? Upgrade Failed Enter Standby? No Is it Ambilight wakeup ? Wakeup event No Yes Yes Receive ARM info (Error code etc) Send error code info to T8032 & CEC on/off status Set Program Counter to DRAM Image to boot into TV Image T8032 main loop in standby mode Setup Wakeup Scenarios on PDWNC module of 5392 2.568 second Wakeup Events (RC/LKB/CEC/Ambilight) To Reboot Standby (HW) SDM and PANEL Mode Detection 1. Check SDM Port and Set SDM Mode Flag If SDM Pin = LOW and System EEPROM First 20 bytes = 0xFF or CH+ on LKB pressed, Load Software Default System EEPROM Data (only when cold start) 2. Check Panel Port If Panel Pin = LoW, Set Panel Mode Flag Watchdog timeout Reboot 3.776 second UnBlank Picture and UnMute Audio MUTEn = HIGH SW_MUTE = HIGH Set Last Status = ON Start PWM_DIMMING and BACKLIGHT_BOOST Note: Startup time from image decompression long enough to satisfy 1sec high time after LAMP ON for proper panel startup Notify T8032 that MT5392 start up is OK Enable 5392 Self-Watchdog thread Thread action: 1. If watchdog reboot, delay 500 seconds to work. 2. Enable Self-watchdog and initial 15 seconds counter 3. Refresh watchdog counter / 0.5 sec 4. Alive check T8032 / 15 seconds AP: Reload UI parameter into program Enable POWER_DOWN INT Enable DC_PROT INT 1. If Boot Ctrl Bits to set always enter standby, then go to standby directly. 2. If Boot Ctrl Bits to set always boot directly, then continue booting. 3. If Boot Ctrl Bits to follow Last Status, then check the Last status go decide to enter standby or continue booting. AP: TV Navigator MT5392 begins initializing the System Video Ready ON Mode 18490_205_090409.eps 090409 Figure 5-11 Start-up flowchart 2009-Apr-10 Service Modes, Error Codes, and Fault Finding LC9.1A LA 5. EN 23 STANDBY SEQUENCE The following flowchart depicts the Standby (plus SemiStandby condition) sequence: RISC START PBS Semistandby Yes No Set Last Status = STANDBY Turn off LED Disable AP RC/LKB key Switch off backlight Turn off LED1 SemiStandby Stop Backlight Dimming PWM_DIMMING = 100% Mute Audio, MUTEn = HIGH Turn Off Backlight BACKLIGHT_ON_OFF = LOW Wait for Panel_Off_Time_2 based on Panel ID in ms (from Panel Flash) Switch off LVDS Signal Wait for Panel_Off_Time_3 based on Panel ID in ms (from Panel Flash) T8032 START Turn Off LVDS Power, LCD_PWR_ON = HIGH Receive Standby Command PWM_Dimming = 0% Disable DC_PROT & POWER_DOWN INT Yes T8032 blinks LED2 according to Error Buffer STANDBY due to Protection? Pass Error Buffer and CEC Info to T8032 No Wait 3000ms to block next startup to ensure PSU properly dischaged Switch IR/GPIO control from RISC to T8032 END (STANDBY) Notify T8032 to go to Standby 18490_206_090409.eps 090409 Figure 5-12 Standby flowchart 2009-Apr-10 EN 24 5. Service Modes, Error Codes, and Fault Finding LC9.1A LA POWERDOWN SEQUENCE The following figure shows the power-down sequence flowchart: START POWER_DOWN INT based on falling edge trigger MT5392 Detects POWER_DOWN INT Reconfirm POWER_DOWN = LOW? Yes Mute Audio Output No Write Protect Flash and System EEPROM Wait for impending Power Off Note: To Avoid False Triggering System Idle END 18490_200_090408.eps 090408 Figure 5-13 Power-down flowchart The power-down condition is detected by the MT5392 POWER_DOWN signal which is an interrupt pin. A “low” level on this line signifies that power-down is detected. The two major activities that occur over this operation is the muting of audio output and write protecting the system flash and EEPROM. DC PROTECTION The following figure shows the DC_PROT interrupt flowchart: START Check DC_PROT = LOW for 3 sec? Yes Mute Audio Output No DC Protection [Protection] Note: To Avoid False Triggering Log Error Code Go to STANDBY END H_17740_037.eps 240108 Figure 5-14 DC Protection flowchart 5.6.10 SSB replacement Follow the instructions in the flowchart in case a SSB has to be swapped. 2009-Apr-10 Service Modes, Error Codes, and Fault Finding LC9.1A LA 5. EN 25 START Set is still operating? No Go to SAM mode and save the TV settings via “NVM Copy to USB”. - Replace SSB board by a Service SSB. - Make the SSB fit mechanically to the set. Start-up set. Set behaviour? Set is starting up normally but no display. Set is starting up & display is OK. Set is starting up in “Factory” mode. Top right corner displayed “F” or “cF” Program “Display Option” code via 062598 MENU, followed by 3 digits code (this code can be found on the side sticker of the set or service manual). Press 5 s. the “Vol -” & “CH -“ button on the local keyboard until the OSD “F” or “cF” dissappeared. After entering “Display Option” code, set is going to Standby (= validation of code). Unplug the mainscord to verify the correct disabling of the factory-mode. Restart the set. No Saved settings on USB stick? Connect PC via ComPair interface to Service connector at side-AV. Yes Launch ComPair with correct FF database Go to SAM mode, and reload settings via “NVM Copy from USB”. Program “Model no.”, “Serial no.”, “IPB/PSU 12NC” and “Display 12NC”. If not already done; Check latest software on Service website. Update all relevant software via USB. Check and perform alignments in SAM according to the Service Manual. E.g. option codes, colour temperature... - Verify “Option Codes” according to back sticker of set or service manual. - Default settings for White drive see Table 6-1 Final check of all menus in CSM. Special attention to “Model no. serial no., panel code & HDCP keys status”. END 18490_207_090409.eps 090409 Figure 5-15 SSB replacement flowchart 2009-Apr-10 EN 26 5. LC9.1A LA 5.7 Software Upgrading 5.7.1 Introduction Service Modes, Error Codes, and Fault Finding It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU or on the Philips website. 5.7.2 Main Software Upgrade Automatic Software Upgrade In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “autorun.upg” (FUS part in the one-zip file). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see DFU). The “autorun.upg” file must be placed in the root of your USB stick. How to upgrade: 1. Copy “autorun.upg” to the root of your USB stick. 2. Insert USB stick in the side I/O while the set is in “On” mode. The set will prompt for software upgrade acknowledge, after which the upgrading will start automatically. As soon as the programming is finished, you have to give a “restart” command, after which the set will restart. In the “Setup” menu you can check if the latest software is running. 5.7.3 Content and Usage of the One-Zip Software File Below you find a content explanation of the One-Zip file, and instructions on how and when to use it. • • • • • 5.7.4 Ambi_clustername_version.zip. Not to be used by Service technicians. Panel_clustername_version.zip. Not to be used by Service technicians. EDID_clustername_version.zip. Contains the EDID content of the different EDID NVMs. See ComPair for further instructions. FUS_clustername_version.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application. NVM_clustername_version.zip. Default NVM content. Must be programmed via ComPair. How to Copy NVM Data to/from USB Write NVM data to USB 1. Insert the USB stick into the USB slot while in SAM mode. 2. Execute the command "NVM Copy" > "NVM Copy to USB", to copy the NVM data to the USB stick. The NVM filename on the USB stick will be named "NVM_COPY.BIN" (this takes a couple of seconds). Write NVM data to TV 1. First, ensure (via a PC) that the filename on the USB stick has the correct format: "NVM_COPY.BIN". 2. Insert the USB stick into the USB slot while in SAM mode. 3. Execute the command "NVM Copy" > "NVM Copy from USB" to copy the USB data to NVM (this takes about a minute to complete). Important: The file must be located in the root directory of the USB stick. 2009-Apr-10 Alignments LC9.1A LA 6. EN 27 6. Alignments The LC9.1A LA chassis comes with the UV1856 analogue tuner. No alignment is necessary, as the AGC alignment is done automatically (standard value: “15”). However in case of problems use the following method (use multimeter and RF generator): • Apply a vision IF carrier of 38.9 MHz (105 dBuV = 178 mVrms) to injection point A258 (input via 50 ohm coaxial cable terminated with an RC network of series 10nF with 120 ohm to ground). • Measure voltage on pin 1 of the tuner (test point F250). • Adjust AGC (via SAM menu: TUNER -> AGC), until voltage on pin 1 is 3.3 +0.5/-1.0 V. • Store settings and exit SAM. Index of this chapter: 6.1 General Alignment Conditions 6.2 Hardware Alignments 6.3 Software Alignments 6.4 Option Settings Note: Figures below can deviate slightly from the actual situation, due to the different set executions. General: The Service Default Mode (SDM) and Service Alignment Mode (SAM) are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or RIGHT keys of the remote control transmitter. 6.1 6.3.2 General Alignment Conditions Perform all electrical adjustments under the following conditions: • Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%). – AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%). – EU: 230 VAC / 50 Hz (± 10%). – LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%). – US: 120 VAC / 60 Hz (± 10%). • Connect the set to the mains via an isolation transformer with low internal resistance. • Allow the set to warm up for approximately 15 minutes. • Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heatsinks as ground. • Test probe: Ri > 10 Mohm, Ci < 20 pF. • Use an isolated trimmer/screwdriver to perform alignments. 6.2 Hardware Alignments There are no hardware alignments foreseen for this chassis, but below find an overview of the most important DC voltages on the SSB. These can be used for checking proper functioning of the DC/DC converters. Description Test Point Specifications (V) Min. 6.3 Typ. Diagram Max. +12VS F124 11.40 12.00 12.60 B01_DC-DC +3V3_STBY F101 3.20 3.30 3.40 B01_DC-DC RGB Alignment Before alignment, choose “Setup” -> “Picture” and set: • “Brightness” to “50”. • “Colour” to “50”. • “Contrast” to “100”. White Tone Alignment: • Activate SAM. • Select “RGB Align“ and choose a colour temperature. • Use a 100% white screen as input signal and set the following values: – All “White point” values initial to “256”. – All “BlackL Offset” values to “0”. In case you have a colour analyser: • Measure with a calibrated (phosphor- independent) colour analyser (e.g. Minolta CA-210) in the centre of the screen. Consequently, the measurement needs to be done in a dark environment. • Adjust the correct x,y coordinates (while holding one of the White point registers R, G or B on “256”) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see Table 6-1 White D alignment values). Tolerance: dx: ± 0.004, dy: ± 0.004. • Repeat this step for the other colour Temperatures that need to be aligned. • When finished return to the SAM root menu and press STANDBY on the RC to store the aligned values to the NVM. Table 6-1 White D alignment values +3V3_SW F133 3.14 3.3 3.46 B01_DC-DC +1V2_SW F131 1.18 1.25 1.31 B01_DC-DC Value Cool (11000 K) Normal (9000 K) Warm (6500 K) +5V_SW F132 4.94 5.2 5.46 B01_DC-DC x 0.278 0.289 0.314 +1V8_SW F125 1.71 1.80 1.89 B01_DC-DC y 0.278 0.291 0.319 +1V0_SW F134 0.99 1.05 1.10 B01_DC-DC +8V_SW F122 7.6 8.0 8.4 B01_DC-DC +5VS F228 4.75 5 5.25 B02_Tuner_IF +VDISP F934 11.40 12.00 12.60 B04D_LVDS +VTUN F123 30 33 36 B01_DC-DC +5V_IF F229 4.75 5 5.25 B02_Tuner_IF +5VTUN F219 4.75 5 5.25 B02_Tuner_IF Software Alignments With the software alignments of the Service Alignment Mode (SAM) the Tuner and RGB settings can be aligned. To store the data: Use the RC button “Menu” to switch to the main menu and next, switch to “Stand-by” mode. If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics). • Set the RED, GREEN and BLUE default values per temperature according to the values in the “Tint settings” table. • When finished return to the SAM root menu and press STANDBY on the RC to store the aligned values to the NVM. Table 6-2 Tint settings 42" Colour Temp. Cool 6.3.1 Tuner Adjustment (RF AGC Take Over Point) R G B 246 248 255 Normal 255 236 180 Warm 210 226 255 Purpose: To keep the tuner output signal constant as the input signal amplitude varies. 2009-Apr-10 EN 28 6. Alignments LC9.1A LA Table 6-3 Tint settings 47" Colour Temp. R G B Cool tbf tbf tbf Normal tbf tbf tbf Warm tbf tbf tbf 6.4 Option Settings 6.4.1 Introduction The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence/absence of these specific ICs (or functions) is made known by the option codes. Table 6-4 Tint settings 52" Colour Temp. R G B Cool tbf tbf tbf Normal tbf tbf tbf Warm tbf tbf tbf Notes: • After changing the option(s), save them with the STORE command. • The new option setting becomes active after the TV is switched “off” and “on” again with the mains switch (the EAROM is then read again). 6.4.2 How To Set Option Codes When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set all option numbers. You can find the correct option numbers in table “Option Codes OP1...OP7” below. How to Change Options Codes An option code (or “option byte”) represents eight different options (bits). When you change these numbers directly, you can set all options very quickly. All options are controlled via ten option bytes (OP1... OPA). Activate SAM and select “Options”. Now you can select the option byte (OP1 to OPA) with the CURSOR UP/ DOWN keys, and enter the new 3 digit (decimal) value. For the correct factory default settings, see Table 6-5 Option code overview. For more detailed information, see Table 6-6 Option codes at bit level (OP1-OP7) . If an option is set (value “1”), it represents a certain decimal value. When all the correct options (bits) are set, the sum of the decimal values of each Option Byte (OP) will give the option code. Table 6-5 Option code overview 2009-Apr-10 CTN Option Code 42PFL9509/93 081 070 212 248 008 118 060 192 076 001 Display Code 183 47PFL9509/93 081 070 212 248 008 118 060 192 076 001 186 52PFL9509/93 081 070 212 248 008 118 060 192 076 001 208 Alignments LC9.1A LA 6. EN 29 Option Bit Overview Below find an overview of the Option Codes on bit level. Table 6-6 Option codes at bit level (OP1-OP7) Option Byte & Bit Dec. Value Option Name Description - will follow in next issue of this manual Byte OP1 Bit 7 (MSB) 128 Reserved Bit 6 64 OPC_MJC_3 Bit 5 32 OPC_MJC_2 Bit 4 16 OPC_MJC Bit 3 8 OPC_REGION_SPECIFIC2 Bit 2 4 OPC_REGION_SPECIFIC Bit 1 2 OPC_REGION2 Bit 0 (LSB) 1 OPC_REGION Bit 7 (MSB) 128 OPC_AV2_SCART2_2 Bit 6 64 OPC_AV2_SCART2 Bit 5 32 Reserved Bit 4 16 Reserved Bit 3 8 OPC_CI_PLUS (Provision Bit 2 4 OPC_LIGHT_SENSOR Bit 1 2 OPC_AMBILIGHT_2 Bit 0 (LSB) 1 OPC_AMBILIGHT Byte OP2 Byte OP3 Bit 7 (MSB) 128 OPC_SideHDMI Bit 6 64 OPC_SideAV_2 Bit 5 32 OPC_SideAV Bit 4 16 OPC_VGA Bit 3 8 Reserved Bit 2 4 OPC_HDMI3 Bit 1 2 OPC_AV3_2 Bit 0 (LSB) 1 OPC_AV3 Bit 7 (MSB) 128 OPC_SHOP_MODE Bit 6 64 OPC_BACKLIGHT_DEEPDIMMING Bit 5 32 OPC_BACKLIGHT_BOOST Bit 4 16 OPC_BACKLIGHT_DIMMING Bit 3 8 OPC_BBD Bit 2 4 OPC_DRAM_IC_3 Byte OP4 Bit 1 2 OPC_DRAM_IC_2 Bit 0 (LSB) 1 OPC_DRAM_IC Bit 7 (MSB) 128 OPC_DIGITAL_OPTION_2 Bit 6 64 OPC_DIGITAL_OPTION Bit 5 32 Reserved Bit 4 16 OPC_ADC (Provision) Bit 3 8 OPC_LIP_SYNC Bit 2 4 OPC_SURROUND_VDOLBY Byte OP5 Bit 1 2 Reserved Bit 0 (LSB) 1 Reserved Byte OP6 Bit 7 (MSB) 128 Reserved Bit 6 64 OPC_VPB_4 Bit 5 32 OPC_VPB_3 Bit 4 16 OPC_VPB_2 Bit 3 8 OPC_VPB Bit 2 4 OPC_MP3_PHOTO Bit 1 2 OPC_VIEW_FOR_YOU Bit 0 (LSB) 1 OPC_VIRGIN_MODE Byte OP7 Bit 7 (MSB) 128 OPD_MHEG (Provision) Bit 6 64 Reserved Bit 5 32 OPC_PIXELPLUS_LINK Bit 4 16 OPC_SYS_AUD_CTRL Bit 3 8 OPC_RC_PASSTHROUGH Bit 2 4 OPC_CEC Bit 1 2 OPC_OAD2 (Provision) Bit 0 (LSB) 1 OPC_OAD (Provision) Bit 7 (MSB) 128 OPC_DEMO_AMBILIGHT Bit 6 64 OPC_DEMO_PP_PLUS Bit 5 32 Reserved Bit 4 16 Reserved Byte OP8 2009-Apr-10 EN 30 6. LC9.1A LA Alignments Option Byte & Bit Dec. Value Option Name Bit 3 8 OPC_TXT2_5 Bit 2 4 OPC_TXT_CC Bit 1 2 OPC_EPG Bit 0 (LSB) 1 Reserved Bit 7 (MSB) 128 Reserved Bit 6 64 OPC_SYS_RECVRY Bit 5 32 Reserved Bit 4 16 Reserved Bit 3 8 OPC_SCENEA Bit 2 4 OPC_ESTICKER Byte OP9 Bit 1 2 Reserved Bit 0 (LSB) 1 Reserved Byte OPA Bit 7 (MSB) 128 Tuner Profile_2 Bit 6 64 Tuner Profile_1 Bit 5 32 Tuner Profile_0 Bit 4 16 Cabinet Profile_4 Bit 3 8 Cabinet Profile_3 Bit 2 4 Cabinet Profile_2 Bit 1 2 Cabinet Profile_1 Bit 0 (LSB) 1 Cabinet Profile_0 2009-Apr-10 Description - will follow in next issue of this manual Circuit Descriptions, Abbreviation List, and IC Data Sheets LC9.1A LA 7. EN 31 7. Circuit Descriptions, Abbreviation List, and IC Data Sheets 7.1 Index of this chapter: 7.1 Introduction 7.2 LCD Power Supply 7.3 DC/DC converters 7.4 Front-End 7.5 Video Processing 7.6 Audio Processing 7.7 HDMI 7.8 Ambi Light Introduction The LC9.1A LA chassis (development name “LC09M”) is an analogue chassis using a Mediatek chipset. It covers screen sizes of 32" to 52" with stylings called “PnS” (xxPFL5xxx), “Frame” (xxPFL7xxx) and “Roadrunner” (xxPFL9xxx). Notes: • Only new circuits (circuits that are not published recently) are described. • Figures can deviate slightly from the actual situation, due to different set executions. • For a good understanding of the following circuit descriptions, please use chapter 9. Block Diagrams and 10. Circuit Diagrams and PWB Layouts. Where necessary, you will find a separate drawing for clarification. Main key components are: • Mediatek MT5392 video processor • NXP TDA8932BT audio processor • ADV3002BSTZ01 HDMI switch • UV1856 tuner and TDA9886 demodulator. Refer to Figure 7-1 for details. 18490_208_090409.eps 090409 Figure 7-1 LC09M Architecture 2009-Apr-10 EN 32 7.1.1 7. LC9.1A LA Circuit Descriptions, Abbreviation List, and IC Data Sheets SSB Cell Layout USB 2 .0 H P 18490_210_090409.eps 090409 Figure 7-2 SSB cell layout 7.2 LCD Power Supply //& The Power Supply Unit (PSU) in this chassis is a buy-in and is a black-box for Service. When defective, a new panel must be ordered and the defective panel must be returned for repair, unless the main fuse of the unit is broken. Always replace the fuse with one with the correct specifications! This part is commonly available in the regular market. 9B',63 $&,QSXW 3)& 9R 9 $XGLR6XSSO\ 9 %ROWRQ6XSSO\ 9 $PELOLJKW 9 )O\EDFN 9B67$1'%< Different PSUs are used in this chassis: • 42" sets use an “LG” PSU (LGIT PLHL-T814A) Integrated Power Board • 47" sets use an “LG” PSU (LGIT PLHL-T819A) Integrated Power Board • 52" sets use an “Delta” PSU (DPS-411AP4A B) Power Supply Unit (without inverter). 67$1'%< +,*+ 2))/2: 21 ,QYHUWHU +9 WR3DQHO +9 WR3DQHO 1RQ ,VRODWHG+RW ,VRODWHG&ROG 18490_213_090410.eps 090410 Refer to Figure 7-3 and Figure 7-4 for details. Figure 7-3 42" and 47" IPB block diagram 2009-Apr-10 Circuit Descriptions, Abbreviation List, and IC Data Sheets LC9.1A LA 7. EN 33 Table 7-1 Pin assignment analogue tuners 5HVRQDQW //& 7R,QYHUWHU 9 5HVRQDQW //& 9B',63 $&,QSXW 3)& 9R 9 $XGLR6XSSO\ 9 %ROWRQ6XSSO\ 9 $PEL/LJKW 9 67$1'%< +,*+ 2))/2: 21 )O\EDFN 9B67$1'%< 1RQ ,VRODWHG+RW DC voltage (V) 1 RF AGC voltage 3.3 - 4.5 (weak or no signal) < 3.3 (strong signal) 2 n.c. 3 I2C-bus address select 0 4 SCL 0 to 3.3 5 SDA 0 to 3.3 6 n.c. 7 supply voltage 8 n.c. 9 fixed tuning voltage 10 n.c. 11 TV IF output 5 +0.5/−0.25 V 33 ,VRODWHG&ROG 18490_214_090410.eps 090410 7.5 DC/DC converters On-board DC-DC converters convert the +12 V coming from the PSU. Refer to Figure 7-5 for details. PSU/iPB : +3V3STBY +3V3STBY / under 15mA STBY To PSU/iPB To PSU/iPB To PSU/iPB Video Processing The video processing is completely handled by the Mediatek MT5392 video processor which features: • Noise reduction • Dynamic skin tone control • White stretch • Blue stretch • Green enhancement • Auto histogram • Pixel Plus III / Perfect Pixel • Active Backlight dimming • Active contrast. Figure 7-4 52" PSU block diagram 7.3 Pin number Description To MT539X PWM dimming Boost PSU/iPB : +12VS +12Vdisp /1000mA +5V_Tuner / 0.17Amax 10uH 10uH DC_DC TPS54386 PWP +5VS / 0.07Amax +5V_SW / 0.771Amax 10uH +1V2_SW / 0.5Amax 10uH +1V8_SW /1.13Amax 10uH +3V3_SW /1.094Amax DC_DC TPS54386 PWP DC_DC ST1S10PH L78M08CDT 2uH +1V0_SW / 2.1Amax +8V_SW / 12mAmax To LCD Panel To Tuner 7.6 To MT539X, USB, HDMI In this chassis, the TDA8932BT Class D Power Amplifier is implemented. For trouble shooting info, refer to paragraph 5.6.7 Trouble Shooting Sound section. To MT539X To MT539X, GDDR3 To MT539X, HDMi MUX, Audio DAC, 7.7 HDMI 7.7.1 Introduction To MT539X Note: Text below is an excerpt from the ”HDMI Specification” that is issued by the HDMI founders (see www.hdmi.org). To MT539X 18490_212_090409.eps 090409 The High-Definition Multimedia Interface is developed for transmitting digital signals from audiovisual sources to television sets, projectors and other video displays. HDMI can carry high quality multi-channel audio data and can carry all standard and high-definition consumer electronics video formats. Content protection technology is available. HDMI can also carry control and status information in both directions. Figure 7-5 DC DC converter block diagram 7.4 Audio Processing To IF Demodulator Front-End Key components for the analogue tuner section (AP region) are: • UV1816E tuner • K7257 video SAW filter • K9362 audio SAW filter • TDA9886T analogue IF demodulator. For trouble shooting info, refer to paragraph 5.6.6 Trouble Shooting Tuner section. HDMI is backward compatible with DVI (1.0). Compared with DVI, HDMI offers extra: • YUV 4:4:4 (3 × 8-bit) or 4:2:2 (up to 2 × 12-bit), where DVI offers only RGB 4:4:4 (3 × 8 bit). • Digital audio in CD quality (16-bit, 32/44.1/48 kHz), higher quality available (8 channels, 192 kHz). • Remote control via CEC bus (Consumer Electronics Control): allows user to control all HDMI devices with the TV's remote control and menus. • Smaller connector (SCART successor). • Less cables: e.g. from 10 audio/9 video cables to 3 HDMI cables. 7.7.2 Implementation In this chassis, the main "Mediatek" Video processor MT5392 combines the HDMI functionality together with the 4:1 "Analog Device" HDMI switch ADV3002. 2009-Apr-10 EN 34 7. Circuit Descriptions, Abbreviation List, and IC Data Sheets LC9.1A LA Refer to 5.6.8 Trouble Shooting HDMI section for repair info. The ADV3002 features: • 4 HDMI inputs • 1 HDMI output • EDID replication • 5 V combiner. Refer to Figure 7-6 for the HDMI implementation. 7.7.3 EDID architecture The ADV3002 HDMI switch combines the conventional separate EDIDs (for each HDMI port) into one integrated EDID, shared by all HDMI ports. The EDID data can be copied to a USB stick for further analysis or editing. 18490_215_090410.eps 090410 Figure 7-6 HDMI implementation 7.8 Ambi Light The Ambi Light architecture in this platform has been entirely renewed. The characteristics are: • Additional DC/DC board generating 12/16/24 V (optional) • ARM processor (on DC/DC panel or AL board) • Low-power LEDs • SPI interface from ARM to LED drivers • I2C upgradeable via USB • Each AL module has a temperature sensor. The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards. Refer to Figure 7-7 for the Ambi Light architecture. 18310_203_090317.eps 090317 Figure 7-7 Interface between Ambi Light and SSB 7.8.1 ARM controller Refer to Figure 7-8 below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102). 2009-Apr-10 Circuit Descriptions, Abbreviation List, and IC Data Sheets SC L S E L1 S E L2 S da1 Sck S c l1 P 0. 7 t bd P 0. 8 M A T0.0 AR M M ISO M A T1.0 t bd Tx D RxD SPI C LO C K SPI LATC H SPI LATC H 2 (only on dc/dc for aurea) t bd M OSI Tx d0 t bd R x d0 P 0. 10 SPI D ATA O U T PW M C LO C K SPI D ATA R ETU R N BLAN K PR O G C S EEPR O M TEM P 18310_204_090318.eps 090318 7.8.2 Figure 7-8 ARM controller interface ARM S o ut LED driver communication (via SPI bus) A m b ilig h t m o d u le 2 S in o ut16 o ut16 S P I d ata in LED D R IV E R 1 EN 35 Refer to Figure 7-9 below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards. Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface. The SPI bus is a synchronous serial data link standard that operates in full duplex mode. Am b ilig h t m o d u le 1 7. For debugging purposes, the working principle is given below: • At start-up the controller will read-out matrix data from the EEPROM devices (via SPI DATA RETURN) • Before operation, the driver current is set via SPI, with driver in DC mode • During normal operation the controller receives RGB-, configuration-, operation mode- and topology data via I2C • The controller converts the I2C RGB data via the matrixes to SPI LED data • Via data return the controller receives error data (if applicable). Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I2C (via USB). The controller can receive matrix values via I2C, which will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness. LED D R IV E R 2 A m b ilig h t m o d u le N S o ut S in o ut16 SD A LC9.1A LA LED D R IV E R N S o ut SPI d ata return SPI c lo c k (SC LK) SPI latc h (XLAT ) PR O G (VPR G ) BLAN K PW M C LO C K ( G SC LK) 18310_205_090318.eps 090318 Figure 7-9 SPI communication between ARM controller and LED drivers The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below: • Data from the ARM controller is linked through the drivers, which are connected in cascade • SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK are going directly from the controller to each driver • SPI DATA RETURN is linked from the last driver to the controller: controller decides which driver returns data. 7.8.3 Temperature Control Refer to Figure 7-10 for signal interfacing between the ARM controller and the temperature sensor on the AL boards. Am bilight m odule 1 Vcc Am bilight m odule 2 Vcc Pull-up TEMP SENSOR Am bilight m odule N Vcc Pull-up TEMP SENSOR Pull-up TEMP SENSOR ARM 18310_206_090318.eps 090318 Figure 7-10 Communication between ARM controller and temperature sensor Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction. 2009-Apr-10 EN 36 8. IC Data Sheets LC9.1A LA 8. IC Data Sheets This section shows the internal block diagrams and pin layouts of ICs that are drawn as "black boxes" in the electrical diagrams (with the exception of "memory" and "logic" ICs). 8.1 Diagram B02, Type TDA9886T (IC7113), Demodulator Block Diagram external reference VIF-PLL filter CVAGC pos TOP TAGC 9 14 VAGC 4 MHz or (1) AFC REF VPLL 19 16 21 15 CBL CAGC neg TUNER AGC crystal DIGITAL VCO CONTROL RC VCO VIF-AGC AFC DETECTOR VIF2 2 17 CVBS video output 2 V (p-p) [1.1 V (p-p) without trap] VIDEO TRAPS VIF-PLL VIF1 1 4.5 to 6.5 MHz TDA9885 TDA9886 8 AUD AUDIO PROCESSING AND SWITCHES SINGLE REFERENCE QSS MIXER/ INTERCARRIER MIXER AND AM-DEMODULATOR SIF2 24 SIF1 23 5 DEEM de-emphasis network MAD SUPPLY SIF-AGC OUTPUT PORTS NARROW-BAND FM-PLL DETECTOR I2C-BUS TRANSCEIVER 6 AFD CAF CAGC 20 18 13 3 22 11 10 7 VP AGND n.c. OP1 OP2 SCL SDA DGND SIOMAD 12 4 FMPLL sound intercarrier output and MAD select (1) Not connected for TDA9885. FM-PLL filter Pin Configuration VIF1 1 24 SIF2 VIF2 2 23 SIF1 OP1 3 22 OP2 FMPLL 4 21 AFC 20 VP DEEM 5 AFD 6 DGND 7 TDA9885 TDA9886 19 VPLL 18 AGND AUD 8 17 CVBS TOP 9 16 VAGC(1) SDA 10 15 REF SCL 11 14 TAGC SIOMAD 12 13 n.c. Figure 8-1 Internal block diagram and pin configuration 2009-Apr-10 G_16510_059.eps 090325 IC Data Sheets 8.2 LC9.1A LA 8. EN 37 Diagram B03, Type TDA8932BT (IC7510), Audio Amplifier Block Diagram OSCREF OSCIO 10 VDDA 31 8 28 IN1P 2 OSCILLATOR 29 DRIVER HIGH PWM MODULATOR VSSD IN1N INREF IN2P CTRL 26 DRIVER LOW 3 12 21 MANAGER 20 15 DRIVER HIGH PWM MODULATOR IN2N 27 22 CTRL 23 DRIVER LOW 14 PROTECTIONS: OVP, OCP, OTP, UVP, TF, WP VDDP1 OUT1 VSSP1 BOOT2 VDDP2 OUT2 VSSP2 VDDA STABILIZER 11 V DIAG BOOT1 4 25 STAB1 VSSP1 VDDA STABILIZER 11 V CGND POWERUP 7 6 REGULATOR 5 V 18 DREF VSSD 5 VDDA 11 30 TEST STAB2 VSSP2 MODE ENGAGE 24 VSSA TDA8932 13 19 HVPREF HVP1 HVP2 HALF SUPPLY VOLTAGE 9 VSSA 1, 16, 17, 32 VSSD(HW) Pin Configuration VSSD(HW) 1 32 VSSD(HW) IN1P 2 31 OSCIO IN1N 3 30 HVP1 DIAG 4 29 VDDP1 ENGAGE 5 28 BOOT1 POWERUP 6 27 OUT1 CGND 7 VDDA 8 VSSA 9 26 VSSP1 TDA8932T 25 STAB1 24 STAB2 OSCREF 10 23 VSSP2 HVPREF 11 22 OUT2 INREF 12 21 BOOT2 TEST 13 20 VDDP2 IN2N 14 19 HVP2 IN2P 15 18 DREF VSSD(HW) 16 17 VSSD(HW) G_16860_045.eps 300107 Figure 8-2 Internal block diagram and pin configuration 2009-Apr-10 EN 38 8. LC9.1A LA IC Data Sheets Personal Notes: 10000_012_090121.eps 090121 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 39 9. Block Diagrams Wiring Diagram 42" (Frame) WIRING DIAGRAM 42" (FRAME) 1M83 (AL1) 1M85 (AL4) 8M85 8319 LCD DISPLAY (1004) TO BACKLIGHT TO BACKLIGHT 4. SPI-LATCH 1G50 (B04D) 8G50 B AMBI_SCL_OUT GND AMBI_SDA_OUT I2S_SEL1 I2S_SEL2 +3V3_SW GND 1. 2. 3. 4. 5. 6. 7. SSB (1150) 1M20 (B04c) 8. 7. 6. 5. 4. 3. 2. 1. 8M20 CN5 12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V +5V_SW KEYBOARD LED1 +3V3STBY LED2 IR GND LIGHT-SENSOR 1M95 (B01) 11. N.C 10. GNDSND 9. +24VAUDIO 8. +12VS 7. +12VS 6. +12VS 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3STBY 8M95 1M99 (B01) 8M99 AL 12. GND 11. N.C 10. N.C 9. POWER-OK 8. GND 7. BACKLIGHT_BOOST 6. PWM_DIMMING 5. BL_ON_OFF 4. GND 3. GND 2. +12VDISP 1. +12VDISP 1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. GND 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. GND 1. SCL 1735 (B03) 8308 8735 1. N 2. L AL CN1 (1176) FUSE 4. 3. 2. 1. INLET (1175) (1005) 1. GND 2. GND ... ... 38. +VDISP 39. +VDISP 40. +VDISP 41. +VDISP AMBI-LIGHT MODULE MAIN POWER SUPPLY IPB 42 PLHL-T814A 11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST 1M59 (B04E) 8M59 51. GND ... ... ... 4. +VDISP 3. +VDISP 2. +VDISP 1. +VDISP 6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V 1G51 (B04D) 1. HV2 2. N.C. 3. HV2 CN3 1. HV1 2. N.C. 3. HV1 CN7 (1114) SPEAKER_RIGHTSPEAKER_RIGHT+ SPEAKER_LEFTSPEAKER_LEFT+ 1736 (B03) 3. SPEAKER_RIGHT2. N.C. 1. SPEAKER_LEFT+ Board Level Repair + - SPEAKER RIGHT (5212) Component Level Repair Only For Authorized Workshop IR LED PANEL (1112) + - KEYBOARD CONTROL 5. PWM-CLOCK-BUF 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF 8G51 CN4 AMBI-LIGHT MODULE 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 3. SPI-DATA-RETURN 8316 CN2 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND P2 P1 3P 8P SPEAKER LEFT (5211) 18490_400_090401.eps 090410 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 40 Wiring Diagram 47" (Frame) WIRING DIAGRAM 47" (FRAME) 1M85 (AL1) 8M85 TO BACKLIGHT 8319 8316 LCD DISPLAY (1004) AMBI-LIGHT MODULE TO BACKLIGHT 1. HV2 2. N.C. 3. HV2 8M59 6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V (1005) 1G50 (B04D) 1. GND 2. GND ... ... 38. +VDISP 39. +VDISP 40. +VDISP 41. +VDISP 8G50 1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. SPI-DATA-IN 1. SCL SSB (1150) 8M60 1M20 (B04c) 8. 7. 6. 5. 4. 3. 2. 1. 1M59 (AB1) 7. GND 6. +3V3 5. CONTROL2 4. CONTROL1 3. SDA 2. GND 1. SCL (1028) 1M84 (AB1) 1M99 (B01) 12. GND 11. N.C 10. N.C 9. POWER-OK 8. GND 7. BACKLIGHT_BOOST 6. PWM_DIMMING 5. BL_ON_OFF 4. GND 3. GND 2. +12VDISP 1. +12VDISP 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH1CONN 3. SPI-DATA-RETURN 2. SPI-CLOCK-BUF 1. SPI-LATCH2CONN 1. N 2. L (1077) CN1 FUSE 1735 (B03) 4. 3. 2. 1. 8735 SPEAKER_RIGHTSPEAKER_RIGHT+ SPEAKER_LEFTSPEAKER_LEFT+ 1736 (B03) 3. SPEAKER_RIGHT2. N.C. 1. SPEAKER_LEFT+ AL AL 8308 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BU 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF 1M95 (B01) 11. N.C 10. GNDSND 9. +24VAUDIO 8. +12VS 7. +12VS 6. +12VS 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3STBY DC-DC INTERFACE INLET 1M85 (AL1) AMBI-LIGHT MODULE AB +5V_SW KEYBOARD LED1 +3V3STBY LED2 IR GND LIGHT-SENSOR 8M84 8M20 Board Level Repair + - SPEAKER RIGHT (5212) Component Level Repair Only For Authorized Workshop 1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. SPI-DATA-IN 1. SCL IR LED PANEL (1112) P2 P1 3P 8P + - 1M85 (AL1) 1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BU 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND (1077) 8M95 8M99 1M90 (AB1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND 8M82 12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V 6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V 8M83 CN5 1M83 (AL1) AMBI-LIGHT MODULE B AMBI_SCL_OUT GND AMBI_SDA_OUT I2S_SEL1 I2S_SEL2 +3V3_SW GND 11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST 1M59 (B04E) CN4 MAIN POWER SUPPLY IPB 47 PLHC-T819A 1. 2. 3. 4. 5. 6. 7. 1G51 (B04D) 51. GND ... ... ... 4. +VDISP 3. +VDISP 2. +VDISP 1. +VDISP 1M85 (AL1) 1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BU 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND (1114) KEYBOARD CONTROL AL CN3 1. HV1 2. N.C. 3. HV1 (1078) CN2 8G51 CN7 (1078) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BU 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF AL AMBI-LIGHT MODULE 1M83 (AL1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND SPEAKER LEFT (5211) 18490_401_090401.eps 090410 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 41 Wiring Diagram 52" (Frame) WIRING DIAGRAM 52" (FRAME) 1M85 (AL4) MAIN POWER SUPPLY PSU DPS-411AP4A B 1G50 (B04D) 1. GND 2. GND ... ... 38. +VDISP 39. +VDISP 40. +VDISP 41. +VDISP 8G50 (1005) B AMBI_SCL_OUT GND AMBI_SDA_OUT I2S_SEL1 I2S_SEL2 +3V3_SW GND 1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. SPI-DATA-IN 1. SCL 1. 2. 3. 4. 5. 6. 7. 11. FAN_PWM 10. GND_SND 9. +VSND 8. +12V 7. +12V 6. +12V 5. GND1 4. GND1 3. GND1 2. STANDBY 1. 3V3_ST 1M59 (B04E) AL (1178) CN7 CN4 CN3/1316 12. N.C. 11. N.C. 10. GND3 9. GND3 8. GND3 7. GND3 6. GND3 5. 24Vinv 4. 24Vinv 3. 24Vinv 2. 24Vinv 1. 24Vinv 1G51 (B04D) 51. GND ... ... ... 4. +VDISP 3. +VDISP 2. +VDISP 1. +VDISP INVERTER 6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V 8M59 14. PDIM_Select 13. PWM 12. On/Off 11. Vbri 10. GND3 9. GND3 8. GND3 7. GND3 6. GND3 5. 24Vinv 4. 24Vinv 3. 24Vinv 2. 24Vinv 1. 24Vinv SSB (1150) 1M20 (B04c) 8. 7. 6. 5. 4. 3. 2. 1. 1M59 (AB1) 7. GND 6. +3V3 5. CONTROL2 4. CONTROL1 3. SDA 2. GND 1. SCL 1M84 (AB1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH1CONN 3. SPI-DATA-RETURN 2. SPI-CLOCK-BUF 1. SPI-LATCH2CONN AMBI-LIGHT MODULE FUSE 1735 (B03) 1. N 2. L CN1 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF 1M99 (B01) 12. GND 11. N.C 10. N.C 9. POWER-OK 8. GND 7. BACKLIGHT_BOOST 6. PWM_DIMMING 5. BL_ON_OFF 4. GND 3. GND 2. +12VDISP 1. +12VDISP 4. 3. 2. 1. 8735 INLET 1M85 (AL4 1M95 (B01) 11. N.C 10. GNDSND 9. +24VAUDIO 8. +12VS 7. +12VS 6. +12VS 5. GND 4. GND 3. GND 2. STANDBY 1. +3V3STBY DC-DC INTERFACE SPEAKER_RIGHTSPEAKER_RIGHT+ SPEAKER_LEFTSPEAKER_LEFT+ 1736 (B03) 3. SPEAKER_RIGHT2. N.C. 1. SPEAKER_LEFT+ AL AL 8308 +5V_SW KEYBOARD LED1 +3V3STBY LED2 IR GND LIGHT-SENSOR 8M84 8M20 Board Level Repair + - SPEAKER RIGHT (5212) Component Level Repair Only For Authorized Workshop 1M83 (AL1) 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK 6. +3V3 5. CONTROL-2 4. CONTROL-1 3. SDA 2. SPI-DATA-IN 1. SCL IR LED PANEL (1112) P2 P1 3P 8P + - 1M85 (AL4) 1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BUF 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND (1177) 8M95 1M90 (AB1) INVERTER CONNECTOR 8M60 8M99 AB (1177) 8M82 12. GND1 11. I2C_DATA 10. I2C_SCL 9. INV_OK 8. A/P_DIM 7. BOOST 6. DIM 5. BL_ON_OFF 4. GND1 3. GND1 2. +12V 1. +12V 6. GND 5. +24V 4. GND 3. +24V 2. GND 1. +24V 8319 8M83 CN5 (1179) AMBI-LIGHT MODULE AMBI-LIGHT MODULE 8G51 CN2/1319 8316 (1178) INVERTER CONNECTOR LCD DISPLAY (1004) 1M83 (AL1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND 14. GND 13. VLED2 12. GND 11. VLED1 10. PROG 9. TEMP-SENSOR 8. EEPROM-CS 7. BLANK-BUF 6. +3V3 5. PWM-CLOCK-BUF 4. SPI-LATCH 3. SPI-DATA-RETURN 2. SPI-DATA-OUT 1. SPI-CLOCK-BUF 8M85 1M85 (AL4) 1. SPI-CLOCK-BUF 2. SPI-DATA-OUT 3. SPI-DATA-RETURN 4. SPI-LATCH 5. PWM-CLOCK-BUF 6. +3V3 7. BLANK-BUF 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND (1114) KEYBOARD CONTROL AL AMBI-LIGHT MODULE 1M83 (AL1) 1. SCL 2. SPI-DATA-IN 3. SDA 4. CONTROL-1 5. CONTROL-2 6. +3V3 7. BLANK 8. EEPROM-CS 9. TEMP-SENSOR 10. PROG 11. VLED1 12. GND 13. VLED2 14. GND SPEAKER LEFT (5211) 18490_402_090401.eps 090410 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 42 Block Diagram Video VIDEO B02A TUNER & ANALOG DEMOD B04 MT5392: 7211 12134M0 11 IF_ATV 5 1 VIF1 1 4 2 VIF2 38MHz 1212 TUNER SUPPLY 23 SIF1 5 24 SIF2 DC_PWR VST 9 6210 RF_AGC 2 SOUND TRAPS 4.5 to 6.5 Mhz CVBS 17 7213 EF SINGLE REFERENCE QSS MIXER SIOMAD 12 INTERCARRIER MIXER AND AM-DEMODULATOR 14 TAGC TUNER AGC LVDS_A_TXo CVBS_RF AD29 GND_CVBS_RF AD28 SIF_OUT MAD SIF AGC 38MHz 1G50 1 DIDITAL VCO COTROL VIF-PLL 1 1 RC VCO DEMODULATOR 4 B04D LVDS 15 REF 2252 1211 2 B06B AVI 20 AB27 SIF_OUT_GND 3 CVBS0 TO DISPLAY LVDS_A_TXe CVBSN 32 MPX0_P 38 AB26 MPX0_N 39 40 I2C-BUS TRANSCEIVER VIF AGC 41 +VDISP SDA 1204 UV1856/ABHN-5 IF1 +5VS 7212 TDA9886T/V4 2240 SAW_SW SCL SAW_SW B04C (CONTROL) B04D DISPLAY INTERFACE - LVDS 7701 MT5392RHMJ (I2C) 3261 1G51 51 +VTUN QUAD LVDS 1920x1080 100/120Hz 50 1 DRX2+ 3 DRX2DRX1+ 4 6 7 DRX1DRX0+ 9 10 DRXC+ 12 DRXC- SOY AH17 SY1P_1 SY1P Y1P AJ18 9 SPB1P_1 SPB1P_1 PB1P AJ19 7 SPR1P_1 PB1R AH19 SY1N Y1N AH18 SPBR1N PBR1N AK19 1D14 12 PR Y DRX0- SPR1P_1 1 2 19 18 HDMI 2 CONNECTOR 1 CRX2+ 3 CRX2CRX1+ 4 6 7 CRX1CRX0+ 9 10 CRXC+ 12 CRXC- 1 2 19 18 TO DISPLAY PB1P 4 PR1P 3 2 +VDISP Y1N 1 PBR1N 1E19 VIDEO IN 7 CVBS4 AF28 SCART_CVBS1 AJ20 1E17 1 BRX2+ 3 BRX2BRX1+ 4 6 7 VIDEO OUT SC1_CVBS_OUT 7 DACOUT1 AF28 CVBS_4 SYNC_SCT1 CVBS_4 BRX1BRX0+ 9 10 BRXC+ 12 BRXC- BRX0- B06D SIDE-AV & USB 1F18 ARX2+ 3 ARX2ARX1+ 4 6 7 ARX1ARX0+ 9 10 ARXC+ 12 ARXC- CVBS 1F12 1 SY0 AF30 SC0 AF29 SY_0 SC_0 1F21 1 3 SVHS IN 5 1 1 4 2 ARX0- B06D SIDE-AV & USB B06D CVBS-SPDIF_USB 2 USB_DM0 USB_DP0 USB_DM0 USB_DP0 AAJ5 AK5 2 3 4 B06E VGA USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG MP3 10 1G16 DRX2+ CRX2CRX1+ 59 57 47 45 DRX2DRX1+ CRX1CRX0+ 56 IN_C 54 44 IN_D 42 DRX1DRX0+ CRX0- 53 41 DRX0- CRXC+ 51 38 DRXC+ CRXC- 50 37 DRXC- BRX2+ 11 BRX2BRX1+ 10 8 HDMI SWITCH 7 IN_B 5 BRX0- 4 BRXC+ 2 BRXC- 1 ARX2+ 23 ARX2ARX1+ 22 20 ARX1ARX0+ 19 IN_A 17 ARX0- 16 ARXC+ 14 ARXC- 13 1 48 6 60 11 CRX2+ BRX1BRX0+ 1 VGA_R VGA_Rp RP 2 VGA_G VGA_Gp GP 3 13 14 VGA_B H-SYNC VGA_Bp BP HSYNC 5 7B05 ADV3002BSTZ01 15 1 2 19 18 LVDS_B_TXe Y1P CRX0- 1B05 HDMI SIDE CONNECTOR SOY1 B06C ANALOG I/O - CINCH 1B04 HDMI 3 CONNECTOR 49 40 11 PB 1B07 LVDS_B_TXo 3 2 HDMI 1 CONNECTOR MT5392 B06B ANALOG I/O - YPBPR 1B02 4 19 18 1 2 B05 HDMI & MUX I2C V-SYNC VSYNC VGA CONNECTOR AK17 RP AK16 GP AH15 BP AK14 HSYNC AJ14 VSYNC RN GN VGA_Bn BN OUT_DATAD2_+ OUT_DATAD2_- RX0+ RX0RX1+ RX1- 29 25 RX2+ 26 RX2- FLASH 512Mx8 RN AJ16 GN AJ15 BN W30 B04B DREAM_IF B04B GDDR3 XTAL1 7702 HYB18H1G321AF XTALO AK6 HDMI_RXC_B_N AJ6 HDMI_RXC_B_P AK7 HDMI_RX0_B_N AJ7 HDMI_RX0_B_P AK8 HDMI_RX1_B_N AJ8 HDMI_RX1_B_P AK9 HDMI_RX2_B_N AJ9 HDMI_RX2_B_P RXC+ RXC- NAND_PDDD(0-7) AJ17 B05 HDMI_XTAL_LDO 1B10 27M OUT_DATAD1_- 7810 NAND512W3A2CN6E PDD VGA_Rn VGA_Gn W29 34 OUT_CLK_+ 35 OUT_CLK_31 OUT_DATAD0_+ 32 OUT_DATAD0_28 OUT_DATAD1_+ B04C FLASH & EJTAG B04C FLASH_IF DDR3 RDQ DQ(0-31) RA RA(0-12) 18490_403_090401.eps 090410 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 43 Block Diagram Audio AUDIO B04 TUNER & ANALOG DEMOD 7211 12134M0 1211 5 2 IF1 11 IF_ATV 1 4 38MHz 1212 TUNER 1 VIF1 B06B AVI 20 SUPPLY 2 VIF2 4 5 VST 9 6210 RF_AGC 24 SIF2 CVBS_RF MAD AD29 GND_CVBS_RF AD28 SIF_OUT AB27 SIF_OUT_GND 7510 TDA8932BTW/N2 CVBS0 B06B 9 10 DRXC+ AUDIO L/R IN 12 DRXC- DRX0- 1 CRX2+ 3 CRX2CRX1+ 4 6 7 PGA_2OUTR 9 10 CRXC+ 12 CRXC- B06B ALI_DAC 1735 1 AUDIO_LS_L AOUTL 2 M29 AUDIO_LS_R AOUTR 14 CLASS D POWER AMPLIFIER SPEAKER_LEFT- 2 SPEAKER_RIGHT+ 3 SPEAKER_RIGHT- 4 22 DC_PROT AV3_L_IN U29 U28 AV3_R_IN MUTE_C AIN_2_L B04A (CONTROL) AIN_2_R SW_MUTE ANTI_PLOP MUTE_M B06D 4 L_MON_OUT 6 R_MON_OUT N30 N29 7D10 B03 MUTE_M PGA_0OUTR HPOUTL HPOUTR MUTE_M DVI_AUL_IN 3 DVI_AUR_IN B06C B06B SIDE-AV & USB PGA_0OUTL M28 HP_LOUT M27 HP_ROUT 1F22 2 3 B04C (CONTROL) 1D11 2 DC-DETECTION MT5392 HP_DET 4 1 HEADPHONE 1 B06D CVBS-SPDIF_USB BRX2+ 3 BRX2BRX1+ 4 6 7 B06C 1E19 BRX1BRX0+ 9 10 BRXC+ 12 BRXC- AV IN AUDIO L/R BRX0- 5 AIN0_L 52 3 AIN0_L 53 AV OUT AUDIO L/R ARX2ARX1+ 5 L_MON_OUT 3 R_MON_OUT ARXC+ 12 ARXC- 37 36 7E02 ARX1ARX0+ 9 10 SC2-IN-L USB_DM0 USB_DP0 USB_DM0 USB_DP0 AAJ5 AK5 2 3 4 USB 2.0 CONNECTOR SIDE SW UPLOAD JPEG MP3 SC2-IN-R 1E17 ARX2+ 4 6 7 1F21 1 ANALOG I/O - CINCH 1 1 3 2 1 2 19 18 1 2 5 M30 1D52 CRX0- B03 MUTE_C SC1-OUT-L SC1-OUT-R MUTE_C ARX0- B06C ANALOG I/O - CINCH B04C B04C FLASH_IF FLASH & EJTAG 1F18 DRX2+ CRX2+ 60 CRX2CRX1+ 59 57 47 45 DRX2DRX1+ CRX1CRX0+ 56 IN_C 54 44 IN_D 42 DRX1DRX0+ 41 DRX0- 38 DRXC+ 37 DRXC- CRX0- 53 CRXC+ 51 CRXC- 50 BRX2+ 11 BRX2BRX1+ 10 8 HDMI SWITCH BRX1BRX0+ 7 IN_B 5 BRX0- 4 BRXC+ 2 ARXC+ 34 OUT_CLK_+ 1 35 OUT_CLK_31 23 OUT_DATAD0_+ 32 22 OUT_DATAD0_28 20 OUT_DATAD1_+ 19 IN_A OUT_DATAD1_- 29 25 17 OUT_DATAD2_+ 16 26 OUT_DATAD2_14 ARXC- 13 ARX0- SPEAKER_LEFT+ 7511÷7513 3 AUDIO L/R OUT CRX1CRX0+ 48 ARX1ARX0+ MUTE MUTE POWER_DOWN B04A (CONTROL) MPX0_P PGA_2OUTL 5 DRX1DRX0+ 7B05 ADV3002BSTZ01 ARX2ARX1+ MUTEn B04A AB26 MPX0_N 1D14 DRX2DRX1+ 4 6 7 3 BRXC- 27 7A60 ANALOG I/O - YPBPR DRX2+ 1 ARX2+ 6 B04C (CONTROL) 1B05 HDMI SIDE CONNECTOR B04A CVBSN 1B04 HDMI 3 CONNECTOR STANDBYn 4 1 2 19 18 7213 EF I2C-BUS TRANSCEIVER VIF AGC 1B07 HDMI 2 CONNECTOR CVBS 17 +VTUN 3 1 2 TUNER AGC 3261 1 19 18 SOUND TRAPS 4.5 to 6.5 Mhz (I2C) 1B02 HDMI 1 CONNECTOR VIF-PLL SIF AGC 14 TAGC HDMI & MUX 19 18 B05 1 DIDITAL VCO COTROL SINGLE REFERENCE QSS MIXER SIOMAD 12 INTERCARRIER MIXER AND AM-DEMODULATOR 23 SIF1 38MHz DC_PWR RC VCO DEMODULATOR 1 B06B ALI_ADAC 15 REF SDA 1204 UV1856/ABHN-5 CLASS-D & MUTING +5VS 7212 TDA9886T/V4 2240 SAW_SW SCL SAW_SW B04C (CONTROL) B03 MT5392: 7701 MT5392RHMJ 2252 B02A SIDE AV AUDIO L/R 5 SAV_L_IN R28 8 SAV_R_IN T28 AIN_6_L 7810 NAND512W3A2CN6E AIN_6_R PDD B05 HDMI_XTAL_LDO W29 1B10 27M RXC+ RXCRX0+ RX0RX1+ RX1RX2+ RX2- W30 B04B DREAM_IF NAND_PDDD(0-7) B04B FLASH 512Mx8 GDDR3 XTAL1 7702 HYB18H1G321AF XTALO AK6 HDMI_RXC_B_N AJ6 HDMI_RXC_B_P AK7 HDMI_RX0_B_N AJ7 HDMI_RX0_B_P AK8 HDMI_RX1_B_N AJ8 HDMI_RX1_B_P AK9 HDMI_RX2_B_N AJ9 HDMI_RX2_B_P DDR3 RDQ DQ(0-31) RA RA(0-12) 18490_404_090401.eps 090410 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 44 Block Diagram Control & Clock Signals CONTROL + CLOCK SIGNALS B04C FLASH & EJTAG B04B GDDR3 7701 MT5392RHMJ 7702 HYB18H1G321AF B04B DREAM_IF RDQ DQ(0-31) RA RA(0-12) RCLK0 RCLK0 DDR3 M2 RCLK0p J11 M3 RCLK0n J10 B04C FLASH & EJTAG B04C FLASH_IF 7810 NAND512W3A2CN6E FLASH 512Mx8 NAND_PDDD(0-7) PDD MT5392 7810 M25P16 A13 NAND_PDD(1) 5 B9 POOE E10 POCE_0 AJ4 PDD_0 NAND_POOE 6 SERIAL_POCE NAND_PDD(0) 1 2 PDD_1 16M FLASH B04C GPIO 2843 AJ2 SDM 2833 AJ1 GPIO_16 GPIO_20 GPIO_15 PANEL B03 B06D B06D B06D DC_PROT AH5 USB_PWE AG6 USB_OC AF7 HP_DET G30 GPIO_14 GPIO_20 GPIO_24 AK2 EDID_WC B28 LCD_PWR_ON B22 SAW_SW D28 BL_ON_OFF B05 B06E B04D B02A B01 GPIO_0 GPIO_1 GPIO_2 GPIO_17 B04C SPIO_UART_IIC D_1 LVDS_SELECT E9 B01 7815 OPWM_1 OPWM_2 K27 BACKLIGHT_BOOST B01 PWM_DIMMMING C5 B01 1813 L32 UART_RX 3 L31 UART_TX 2 UART SERVICE CONNECTOR 1 1812 IR AK11 OIRI B04A PM_DEMOD UART_RX 2 UART_TX 3 7602 RES STANDBYn OPWRSB OPCTRL_0 OPCTRL_5 OPCTRL_3 OPCTRL_4 OPCTRL_2 OPCTRL_8 AH14 STANDBYn AJ12 HDMI_CEC AF12 POWER_DOWN AG11 MUTEn AF13 SW_MUTE AG12 LED1 AH13 LED2 FOR DEBUGGING ONLY B01 B03 B05 B03 B03 B03 B06D SIDE-AV & USB B06D CVBS_SPDIF_USB 7F01 TPS2041BD OUT EN OC 1M20 1 AK29 LIGHT_SENSOR AJ29 KEYBOARD 2 AJ28 1F21 1 ADIN_6 ADIN_4 ADIN_3 AJ5 USB_DM0 AK5 USB_DP0 USB20-DM0 USB20-DP0 1 POWER-OK B03 2 3 3 2 B01 AK28 B03 USB_OC 4 4 B02A RF_AGC_MON USB_PWE USB 2.0 CONNECTOR SIDE ADIN_5 3 4 TO IR/LED PANEL AND KEYBOARD CONTROL 5 +3V3STBY 6 7 8 +5V_SW 18490_405_090401.eps 090407 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 45 Block Diagram I2C I²C B05 FLASH & EJTAG B04D HDMI & MUX 3B38 J30 DISPLAY INTERFACE - LVDS VDDO_3V3 3830 B04C 3831 +3V3_SW SDA 3B39 B04C CONTROLLER 7701 MT5392RHMJ OSDA0 SCL 75 1 73 67 72 HDMI CONNECTOR 3 UART SERVICE CONNECTOR 2 1 70 69 VGA 1B07 DC_5V 16 CRX-DDC-DAT HDMI CONNECTOR 2 15 1G16 5 1 1B02 DRX-DDC-DAT 16 DRX-DDC-CLK 15 HDMI CONNECTOR 1 +5V_COMBINED +3V3STBY B06E 12 4G12 15 4G11 SDA_VGA SCL_VGA VGA CONNECTOR 5 4G14 UA0TX 3 3865 15 3B54 UART_TX 1813 3864 BRX-DDC-CLK DRX-5V 3B55 38A8 3M10 AK13 UA0RX 3M09 UART_RX 16 CRX-DDC-CLK 71 3823 1B04 BRX-DDC-DAT CRX-5V 68 +3V3STBY AJ13 RES 4G13 DDC-SCL 74 49 LVDS3_SCL_DISP 11 38A9 AK10 3917 10 DDC-SDA 3B20 3B19 AJ10 OSCL2 +5V_COMBINED FOR DEBUGGING ONLY OSDA2 HDMI CONNECTOR SIDE 15 ERR 17 6 3B51 4 MT539X 15 BRX-5V 3B53 ERR 15 ARX-DDC-CLK 1G51 50 3916 LVDS3_SDA_DISP 3G16 HDMI MUX 3 16 6 38A4 EEPROM (NVM) 1B05 ARX-DDC-DAT 3G15 76 3B46 7B05 ADV3002BSTZ 1818 2 7 3B50 38A3 ARX-5V 27 3B52 GPIO-18 SYS_EEPROM_WE 40 7812 M24C64 7815 L28 6 3B47 5 389F SPIO_UART IIC RES +3V3_SW 389D ERR 14 3838 J29 3839 OSCL0 6 7G11 M24C02 3891 L28 3B34 1812 2 3B35 3888 3890 3889 RES EEPROM 7G12 EDID_SDA B04C L29 3 EDID_WC 7 EDID_SCL 1 5 4 6 7B07 B04C FOR DEBUGGING ONLY B04E EDID_WC 7 6 7B02 M24C02 EEPROM (EDID) AMBILIGHT 5A14 OSCL1 K29 AMBI-SCL 5A16 3A13 AMBI-SDA 3A10 K30 OSDA1 3A11 +3V3_SW 1M59 3 1 5 5A10 6 +3V3_SW TO AMBILIGHT DRIVERS 2 7 B04A MTK POWER B02A TUNER & ANALOG DEMOD TUNER_SDA TUNER_SCL 5 4 3241 CLK L28 L29 3244 DATA 5215 PM_DEMOD 5214 B04A 3607 +3V3_SW 3606 B04 10 11 1204 UV1856/ABHN 7212 TDA9886T/V4 MAIN TUNER ANALOG DEMODULATOR ERR 16 ERR 18 18490_406_090401.eps 090407 2009-Apr-10 Block Diagrams LC9.1A LA 9. EN 46 Supply Lines Overview SUPPLY LINES OVERVIEW B01 +12V +12V GND1 GND1 BL-ON_OFF DIM BOOST A/P_DIM INV_OK MAIN I2C POWER SUPPLY I2C GND1 3V3_ST CN5 1 B04E DC / DC B02A 1M99 1 +12VDISP +5V_SW B04d 2 2 3 3 4 4 5 5 BL_ON_OFF 6 6 PWM_DIMMING 7 7 BACKLIGHT_BOOST 8 TUNER & ANALOG DEMOD 9 9 10 11 11 12 12 B03 B04C CONTROL 5216 +5VTUN 5217 +5VS 5218 +5V_IF VDDA 5502 VDD B06D CONTROL N.C. +3V3_SW +3V3_SW +3V3STBY +3V3STBY +5V_SW +12VS B01 HDMI 1 CONNECTOR +3V3STBY +1V2-STANDBY B03,B04a,c, B07 B04A MTK POWER HDMI 2 CONNECTOR +1V0_SW GND1 GND1 GND1 +12V +12V +12V 3 3 4 4 5 5 B04A CONTROL 6 7 7 8 8 B03,B04a 7201 B01 +8V_SW IN OUT COM B04a B01 GND_SND 11 11 1B07 18 CRX-5V B01 B06A DIGITAL IO - ETHERNET (PROVISIONAL) +3V3STBY 5NA1 +3V3AN +1V8_SW +1V8_SW 5NA2 +3V3DN +8V_SW +8V_SW B01 +12VS +3V3_SW +3V3_SW +12VS B06B B01 GDDR3 ANALOG I/O - YPbPr +3V3_SW +12V_1 +3V3_SW +3V3_SW +1V8_SW B02a,B03,B04c, B05,B06e B04a,c,e,B05, B06a,b,d B06D B04C FLASH & EJTAG B01 +3V3_SW B01 +1V8_SW B04a,b +3V3_SW +3V3_SW +3V3_FLASH B06E +1V2_SW +3V3STBY B04a,B05 SIDE-AV & USB +3V3_SW 5810 +3V3STBY B01 +5V_SW B01 +5V_SW 5814 1M20 5 5815 8 GNDSND N.C. DRX-5V +3V3STBY B01 10 1B02 18 B01 B03 10 BRX-5V +3V3_SW +1V8_SW +5V_SW +24VAUDIO 9 1B04 18 +3V3_SW B04B B04a 9 ARX-5V +1V2_SW B04a 7116 TPS54386PWP 1,14 3 5104 Non Synchronous 5115 Converter 12 1B05 18 +1V0_SW SENSE+1V0_MT5392 7117 TPS54386PWP 1,14 3 5117 Non Synchronous 5116 Converter 12 5103 +1V2_SW +1V2_SW B01 5101 +5V_COMBINED B01 +12VS 7117 TPS54386PWP 5108 7 DCDC Converter 3 +VSND SENCE+1V0_MT5392 B01 5100 6B07 +1V0_SW B01 STANDBY B01 6 HDMI 3 CONNECTOR B01 7201 2 HDMI SIDE CONNECTOR B01 +5V_SW VDDO_3V3 +1V2_SW B01 N.C. 5B01 +5V_SW B01 3530 TO AMBI LIGHT +3V3_SW +5V_SW B01 +24VAUDIO 1M59 6 HDMI & MUX +3V3_SW B01 1M95 1 2 B05 CLASS-D & MUTING +24VAUDIO B04C CONTROL IN OUT COM STANDBY 5A10 B01 B04C CONTROL POWER-OK +3V3_SW +5V_SW +12VS CN4 1 +3V3_SW B01 B01 8 10 AMBILIGHT N.C. VGA +5V_SW +5V_SW 6G13 DC_5V TO IR/LED PANEL B07 B01 BDS iTV +3V3STBY +3V3STBY CN7 +24V HV2 N.C. HV2 +24V GND 2 3 4 TO AMBILIGHT MODULE DISPLAY INTERFACE - LVDS +12VDISP B01 7910 5 6 +12VDISP 5910 +VDISP 5911 7911 LCD_PWR_ON 3 2 CN3 1 N.C. HV1 3 2 CN2 1 HV1 GND +24V GND B04D 1 TO DISPLAY 2009-Apr-10 5912 18490_407_090401.eps 090406 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 47 10. Circuit Diagrams and PWB Layouts Interface Ambilight: Interface + DC-DC 2 1 A 3 1 6 5 4 2 3 8 7 4 5 9 6 7 INTERFACE + SINGLE DC-DC 12 8 13 1100 A6 1101 A7 1M59 C2 1M84 A2 1M85 A2 1M90 D2 2100 A6 2101 B5 2102 C6 2103 D6 2104 D5 2105 D9 2106 D9 2107 E9 2108 D3 2109 E3 3100 B5 3101 C5 3102 D6 3103 D9 3104 D6 3105 D5 3106 D5 3107 D5 3108 E9 3109 D2 3110 D3 3111 E8 3112 B6 5100 A8 5101 A8 5102 A7 5103 B8 5104 B8 5105 B8 5106 B8 5107 A6 5108 A6 6100 C8 7100 B7 9101 C3 9102 C3 9103 C3 9104 C3 F101 B3 F102 B3 F103 B3 F104 B3 F105 B3 F106 B3 F107 A7 F108 B3 F109 B3 F110 B3 F111 B3 F112 B3 F113 B3 F114 B5 F115 C2 F116 D2 F117 D2 F118 D2 F119 D2 F120 D2 F121 E2 F122 E2 9 2n2 I102 SCL 15K 220p 3102 330R 18 1% 30R 30R 30R 30R 5106 I104 D GND_HS 100n 3K3 2107 3108 100K +24V 3111 +24V 1% +24V 1735446-6 E E +12V c001 VLED1 +16V c002 VLED2 H 1 I NC 100p RES F121 F122 F123 F124 2109 G VIA TIM_CAP I106 1M90 1 2 3 4 5 6 1 VFB 2 GND I105 33K 3107 1M0 3106 3104 100n +3V3 2103 2 2104 RES 3105 1735446-7 1 SDA CONTROL1 CONTROL2 C 20 21 22 23 24 25 26 27 28 29 30 31 12K RES 3110 100R 100p RES 3109 100R BOOT_IN I108 +16V 2108 D F116 F117 F118 F119 F120 17 16 VSW 3K3 F115 14 10 11 12 13 SWI_COL I103 2102 SPI-LATCH2CONN SPI-LATCH2 SWI_EMIT 3103 47R DRV_COL 100n 6 7 8 9 LVI_OUT LPK_SENSE 15 100n 2106 5 I101 Φ 2105 SPI-LATCH1 SPI-LATCH1CONN B SS24 502382-1470 1M59 1 2 3 4 5 6 7 30R 5103 5105 VCC 4 3101 * 3 VLED2 7100 NCP3163BMNR2G 16 9103(RES) 9104 * +16V 100R F114 9101 9102 (RES) * * 0R1 RES VLED1 E 2.0A T 63V 3100 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG C A I109 6100 502382-1470 * 1101 F107 19 16 +3V3 F113 F125 10u +16V +12V 10n D SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH1CONN PWM-CLOCK-BUF 3112 B F101 F102 F103 F104 F105 F106 F108 F109 F110 F111 F112 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2101 C 1M84 220n 1M85 2100 * 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 5102 T 3.0A 32V 30R SPI-LATCH2CONN 5104 I100 1100 +24V F126 F 5100 RES +24VF 30R 5101 RES 30R 5108 RES A owner. 11 5107 RES B All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright 10 2 3 4 5 6 8 7 A F123 E2 F124 E2 F125 B3 F126 A2 I100 A6 I101 C6 I102 C6 I103 C6 I104 D9 I105 D5 I106 D7 I108 D6 I109 A8 c001 E2 c002 E2 B C D E F G H 9 I STUFFING DIVERSITIES FOR DC/DC INTERFACE AMBI 2K9 See the stuffing diversities table in the case of components marked with one star (*) DC/DC INTERFACE 1101 1M85 5103/5104 5105/5106 VLED1 VLED2 CHN SETNAME CLASS_NO 3104 328 58341 3104 328 58351 J 3104 328 58361 3104 328 58371 in out out out in out out out in out out out out 24V 16V in in out 12V 12V 08-06-19 1 16V 16V 08-08-06 2 12V 16V 08-10-23 3 DC-DC INTERFACE 1 2 3 4 5 7 6 MGr 8 08-06-19 2 08-08-06 3 08-09-18 4 08-10-23 5 NAME Peter Van Hove CT 3104 313 6325 AMBI 2K9 1 CHECK ******** SUPERS. DATE 9 3 08-06-06 ** C 10 130 1 J 08-12-06 A3 *** ROYAL PHILIPS ELECTRONICS N.V. 2008 11 12 13 18310_600_090305.eps 090305 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 48 Interface Ambilight: Dual DC-DC 1 2 3 4 5 6 9 8 7 10 12 11 13 A A 2 1 3 4 5 6 7 2200 A4 2201 A4 2202 A5 2203 A5 2204 B3 2205 B6 2206 B1 2207 B2 2208 B7 2209 B7 2210 B8 2211 C3 2212 C4 2213 C6 2214 C3 2215 C6 2216 C2 2217 C7 2218 D1 2219 D2 2220 D7 2221 D3 2222 D5 2223 D8 2224 D8 3200 A3 3201 A6 3202 B3 3203 B6 3204 B3 3205 B6 3206 D3 3207 D2 3208 D7 3209 D5 3210 D3 3211 D3 3212 D6 3213 D6 5200 B2 5201 B7 6200 B2 6201 B7 7200 B4 9201 B5 9202 C4 F200 B2 F201 C7 F202 D3 F203 B5 F204 B4 F207 C4 I200 A3 I201 A6 I204 B2 I205 B6 I206 B6 I208 B3 I209 B6 I210 C6 I211 C3 I212 C3 8 DUAL DC-DC +24VF B A 2202 220n 2203 100u 35V RES 220n 2200 100u 35V 2201 A I200 3200 I201 RES 3201 VSW D ** 9202 1n0 2211 ** VIA2 I211 F207 E 2216 RES * I209 * I210 * GND_HS C RES 2217 I212 F201 +12V 3K3 * 2220 * 33K 3213 3K3 1% 3212 D * 10u 2223 * F202 10u VLED1 2224 2222 RES 22n * 47K 1% 10u RES 3K3 3209 * I213 I214 RES 2221 22n 3208 22n 33K 3211 ** I215 3210 ** 3K9 1% ** 68K 1% 4u7 4u7 D 2219 RES 2218 RES 22n 3207 RES 3206 +16V F B 220u 25V * RES 22u I216 +12V RES 2210 16 17 18 19 20 21 22 23 24 25 26 10u 22u I206 * 6201 * (VLED1) * 2209 5201 2208 I205 15 4 4u7 GND 2212 2214 C 1n0 ** 47n SS24 ILIM2 SEQ BP F203 13 12 6 8 10R 9 10 11 BOOT2 SW2 EN2 FB2 3205 I217 I208 Φ * 6R8 1n0 10R ** 3204 ** SS24 10u 6200 ** 4u7 2206 ** 100u 35V 2207 B BOOT1 SW1 EN1 FB1 3203 2213 2 3 5 7 I204 +16V PVDD2 * 1n0 F204 47n 6R8 PVDD1 2205 2215 ** 14 7200 TPS54283PWP 2204 9201 **5200 F200 6R8 ** 1 6R8 3202 (VLED2) owner. All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright C 7200 : TPS54383 in case of 16V or dual dc-dc converter G The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371). E E The components marked with two stars (**) belong to the 16V versions (3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371). H 1 3 2 4 5 6 7 I213 D5 I214 D4 I215 D3 I216 B5 I217 B4 B C D E F G H 8 I I CHN SETNAME 1 CLASS_NO DC-DC INTERFACE J 08-06-19 1 08-08-06 2 08-10-23 3 NAME Peter Van Hove CHECK 1 2 3 4 5 7 6 8 3104 313 6325 AMBI 2K9 SUPERS. DATE 9 3 08-06-09 130 C 10 08-06-19 2 08-08-06 3 08-09-18 4 08-10-23 5 08-12-06 2 J A3 ROYAL PHILIPS ELECTRONICS N.V. 2008 11 12 13 18310_601_090305.eps 090305 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 49 Interface Ambilight: Microcontroller 1 2 3 4 6 5 8 7 10 9 12 11 16 15 14 13 18 17 20 19 A A 1 2 4 3 5 6 7 8 9 10 1300 E2 1301 H5 1302 C4 2300 A3 2301 A4 2302 A5 2303 A4 2304 B8 2305 B10 2306 B9 2307 B10 2308 D4 2309 D5 2310 F6 2311 F7 2312 F7 2313 F7 2314 F7 2315 F7 2316 F8 2318 G2 2319 G6 2320 H5 2321 H4 2322 H4 2323 H4 2324 H4 3300-2 D5 3300-3 D7 3300-4 D7 3301-1 D6 3301-2 E5 3301-3 E6 3301-4 D7 3302-1 D7 3302-2 D6 3302-3 E6 3302-4 D6 3303-1 E6 3303-2 D6 3303-3 E6 3304-1 D6 3304-2 D7 3304-3 D7 3304-4 D7 3305-1 E7 3305-2 G8 3305-3 G9 3305-4 G8 3306-1 E8 3306-2 E8 3306-3 E8 3306-4 E8 3307-1 E8 3307-2 F8 3307-4 F8 3308-1 F8 3308-2 F8 3308-4 F8 3309-1 F8 3309-4 F8 3310 A10 3311 A8 3312 A10 3313 B8 3314 B8 3315 B10 3316 B10 3317 B8 3318 C10 3319 C8 3320 C5 3321 C5 3322 D5 3323 D5 3324 D7 3325 D6 3326 D6 3327 D6 3328 E5 3329 E5 3330 E8 3331 E8 3332 E3 3333 F2 3334 G5 3335 G5 3336 G6 3337 G6 3338 E8 3339 F1 7300-1 B9 7300-2 A10 7301 A4 7302 E3 7303 F2 9300 E3 9301 F3 9302 F3 11 B MICROCONTROLLER 3310 RES 7301 LD2985BM18R 7 6 4 RES 10K 10n 3314 3313 2304 F302 +3V3 F303 2305 3 RST GND CD NC 5 1K5 1% 2307 10n 3316 4 10K 6 10K 7 10K 5 10K 8 10K 8 10K 5 10K 7 10K 5 10K 7 10K 3 3300-3 2 3304-2 4 3304-4 2 3302-2 4 3302-4 2 3303-2 RES 10K 1 3301-1 1 3304-1 4 3301-4 3324 8 10K 5 10K 6 10K 8 10K 1 3302-1 4 3300-4 3 3304-3 1 3305-1 10K 3327 10K I305 3329 3 3301-3 3 3302-3 1 3303-1 3 3303-3 3326 I310 2 7 3300-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3325 RES 10K 100p 2309 31 I316 I319 I321 6 2 1 4 1 7 8 5 8 4 2 4 2 5 7 5 7 3308-1 1 3309-4 5 3309-1 8 I320 I300 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R 100R CONTROL1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-OUT SPI-LATCH1 SPI-LATCH2 PWM-CLOCK-BUF TEMP-SENSOR EEPROM-CS BLANK-BUF PROG F320 8 100R 4 1 100R 100R E TEMP-SENSOR CONTROL2 I302 F SCL SDA I307 UD-MD I322 F309 F310 F311 F312 F313 3334 22R 3335 3 100p 10K 4 owner. G 5 1 100n K 3 I308 2318 9305 RES F317 IN 3333 1K0 3339 2 I315 I318 I317 100p 2316 6 F 7303 NCP303LSN10T1 27 I313 I314 100p 2315 F308 3306-3 RES 3330 3331 3306-2 3306-1 3306-4 3307-1 3338 3307-4 3307-2 3308-4 3308-2 I311 I312 100p 2314 RES +3V3 F307 I306 100p 2313 +3V3 4 13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16 100n 2312 RES 9302 RES 9303 J 26 10K RES 9301 VSSA MICROCTRL 100p 2311 +3V3 C D 2310 3332 I Φ P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 RTXC1 P0.6|MOSI0|CAP0.2 RTXC2 P0.7|SSEL0|MAT2.0 P0.8|TXD1|MAT2.1 RTCK P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 VBAT P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA X2 100p 2308 20 25 RES 9300 VSS X1 42 12 17 40 1300 E 16M9 11 7 19 43 7302 LPC2103FBD48 3301-2 2 3328 3322 7 10K F306 D H 3318 10K RES 5 B3B-PH-SM4-TBT(LF) G I304 1 1K8 1% RES 3319 10K F305 4 100R 1 2 3 RES F304 100R 3323 F 10K 3320 3321 RES 1302 47K 2 +3V3 +3V3 C B 10n RES 3315 8 1K5 1% RES 3317 7300-1 LM393PT F316 +3V3 100n 2306 C300 B E 4 3305-4 2 5 10K 7 3305-2 10K 3 3305-3 6 10K G +3V3 F314 F315 10K 10K 3336 1 2 100p 3337 H 100n 2324 100n 100n 2323 H 100n 2322 3 4 +1V8 RES 1301 SKHUBHE010 9307 +3V3 100n L 2320 100R 2319 I309 2321 is prohibited without the written consent of the copyright 1K5 3312 1% 1% 3311 5 +3V3 All rights reserved. Reproduction in whole or in parts A 7300-2 LM393PT F301 10n 2 D 100K RES 8 COM -T 10K 4 BP 1K5 I303 4u7 INH +3V3 +3V3 +1V8 2302 1u0 2300 3 5 OUT 2303 C IN 2301 1 +3V3 +3V3 F300 100n A M 1 2 3 4 5 6 7 8 9 10 9303 F3 9305 G1 9307 H4 C300 B8 F300 A5 F301 A8 F302 A10 F303 B11 F304 C4 F305 C4 F306 D4 F307 F3 F308 F3 F309 G6 F310 G6 F311 G8 F312 G8 F313 G8 F314 G5 F315 H4 F316 C9 F317 F1 F320 E9 I300 E9 I302 F9 I303 A4 I304 C10 I305 E6 I306 E7 I307 G6 I308 G2 I309 G5 I310 D5 I311 E7 I312 E7 I313 E7 I314 F7 I315 F7 I316 F8 I317 F6 I318 F7 I319 F5 I320 F8 I321 F6 I322 G5 B C D E F G H I J K L M 11 N N O O CHN SETNAME CLASS_NO DC-DC INTERFACE P 08-06-19 1 08-08-06 2 08-10-23 3 AMBI 2K9 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 3104 313 6325 15 3 SUPERS. DATE 16 08-06-09 130 C 17 1 08-06-19 2 08-08-06 3 08-09-18 4 08-10-23 5 08-12-06 P A2 3 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18310_602_090305.eps 090410 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 50 1M59 Layout DC/DC Interface Ambilight Personal Notes: 1302 5201 1M85 2208 2209 3338 2219 2300 5200 3331 2310 2322 9102 3307 9101 2316 3308 2323 2311 3306 3309 2206 2315 7301 2303 2321 2319 3324 3326 2312 2223 6200 2301 2302 1301 9201 9104 9103 2224 1101 2218 9202 5102 1100 1M90 2200 2210 7200 2202 2201 2203 2220 6201 1M84 2207 F115 2108 F108 F102 F103 F106 F109 c001 I302 F113 F101 F119 F116 F105 F111 I300 F110 F126 F112 F304 2212 2306 3317 3319 F207 3209 I104 I216 I212 3103 I102 3206 2204 2221 I214 F204 I204 F123 F107 5107 I200 5108 I211 I208 5100 7100 I108 I215 3204 3200 3202 3211 2214 2211 3310 3318 2305 3315 F104 3210 F314 I304 F316 2102 3104 2104 3108 F303 7300 I103 2106 2105 2216 2100 F301 2304 3314 3311 I309 3105 3106 3107 2107 F302 3316 2307 3312 F125 C300 3313 I316 F200 I105 I109 5101 2109 F114 F315 6100 3207 F317 3112 2101 I100 I101 3301 2324 9307 3208 F308 3303 I319 I201 2205 3212 I106 F320 I307 2313 3325 3329 3327 3328 2320 3335 3205 F203 3213 I308 F120 2217 3333 F309 F300 I320 I322 I318 7303 3111 I315 I314 I321 2222 I217 I303 3337 3336 9301 I209 I213 F201 I206 1300 2318 3102 2103 F311 F305 I313 I310 7302 I205 3201 3203 2308 2309 F313 F310 2314 5104 2215 2213 F202 F312 I317 3302 F118 I210 3322 3323 3334 3305 I306 3304 5105 3320 3321 3330 F306 I311 I312 F117 3110 5103 c002 3300 I305 5106 3339 9305 9302 3332 9300 9303 3109 F122 F307 3101 3100 F124 F121 10000_012_090121.eps 090121 31043136325.5 18310_550_090309.eps 090309 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 51 6 LED Low-Pow: Microcontroller Liteon 1 3 2 A 4 5 2 1 4 3 8 7 6 9 10 6 5 8 7 13 12 11 14 9 16 15 10 11 12 19 18 17 13 MICROCONTROLLER LITEON B 3134 +3V3 7101 LD2985BM18R F106 RES 10n 3137 10K 2105 3111 10n 3139 1K5 1% 100n 4 8 C 5 10K 10K 6 10K 7 10K 5 10K 8 10K 8 7 10K 5 10K 7 10K 5 CD NC 4 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 2 4 3102-4 3103-1 1 3 3102-3 3101-3 3 3102-2 5 10K 6 10K 8 10K 4 3101-4 3112 8 10K 1 10K 3115 3 3114 3106-3 3105-1 3102-1 1 RES 10K 3104-1 1 3106-2 2 4 3 1 3105-3 3106-1 3104-3 3 3104-2 2 3116 10K 5 1 2 3 1 8 7 6 8 2 4 2 4 7 5 7 5 3126-1 1 8 3127-1 3127-4 1 4 8 5 I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R E CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG TEMP-SENSOR F CONTROL-2 SCL SDA 100R 100R 100p 100p 2131 100p 2126 100p 2124 RES 100p 2123 100p 2122 RES 100p 2117 100p 2116 100p 2115 4 UD-MD I111 I110 I113 I114 I115 3130 3131 F112 9106 RES 100n 2112 9119 10K 4 7 3103-2 22R G 5 3103-4 2 100R VLED1 3105-4 7 10K 100p 2110 100p 3117 7 19 43 5 +3V3 2114 RES 10K 1 100n SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF RST GND 3104-4 4 10K 9121 RES 3 IN 3120 10K 3119 1u0 2130 7110 NCP303LSN10T1 6 3103-3 3 6 10K 10K +3V3 VLED2 +3V3 15 16 F103 +1V8 100n 2113 100n 100n 2121 H 2119 H F104 +3V3 27 100n 2120 L 10K RES 10K +3V3 VLED1 4 F102 10K 3132 RES 9103 9104 RES 2111 K 3141 1 D 3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4 100p 3133 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 1M2A G 10K RES 9102 +3V3 13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16 2118 RES +3V3 26 31 2109 3118 F109 1 2 3 4 5 6 7 8 9 10 11 12 13 14 20 25 9101 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF 2 owner. M 1 2 3 4 5 6 7 8 9 10 11 12 1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11 2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10 3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10 3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7 3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4 3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11 3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12 3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11 7101 A7 7102 E6 7110 F4 7116-1 B11 A 7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11 B C D E F G H I J K L M 13 N N 1X03 REF EMC HOLE O O SETNAME 5 4 3 2 CHN 1 is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts F133 F135 F136 F139 F137 VSSA P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 P0.5|MISO0|MAT0.1 RTXC1 P0.6|MOSI0|CAP0.2 RTXC2 P0.7|SSEL0|MAT2.0 P0.8|TXD1|MAT2.1 RTCK P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 VBAT P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 P0.13|DTR1|MAT1.1 DBGSEL P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 P0.16|EINT0|MAT0.2 RST P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA MICROCTRL 42 1M84 Φ VSS X1 X2 17 40 16M9 1101 OUT 12 2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K 100R 15 16 3105-2 2 F108 15 16 3123 10K F105 VLED2 11 J 3 F107 VLED1 VLED2 RES 8 3140 EEPROM-CS TEMP-SENSOR PROG 10K 3107 3108 +3V3 47K 2 +3V3 +3V3 E F B 10n RES 3138 1K8 1% RES +3V3 SDA CONTROL-1 CONTROL-2 F138 F134 7116-1 LM393PT F118 SCL 2108 +3V3 1.5A T 7102 LPC2103FBD48 I F117 2107 VLED1-F 1K5 1% RES VLED1 G 1 2 3 4 5 6 7 8 9 10 11 12 13 14 7 6 +3V3 C140 33p 2125 9112 9114 10u 35V 15 16 1105 D H 3136 5 2106 VLED2 3109 F 1% 1% F116 VLED1 100R 3110 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 7116-2 LM393PT 1K5 +1V8 1M1A E A 100K RES 4 BLANK EEPROM-CS TEMP-SENSOR PROG 3135 4 BP COM +3V3 +3V3 4u7 INH 100n 3 2102 SPI-LATCH PWM-CLOCK 5 OUT 10n 9109 9110 IN 2104 CONTROL-1 CONTROL-2 1 +3V3 1u0 SPI-CLOCK SDA 2101 9107 9108 -T 10K 9113 RES SCL SPI-DATA-RETURN 2 +3V3 1u0 2128 B SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2 9111 RES 10u 35V 2129 D F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132 2127 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 F101 1K5 IN 1M83 2103 A 20 1 CLASS_NO DRIVER 6LED LITEON P 2008-08-08 2 2008-10-27 3 2K9 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8204 000 8857 15 16 2 2008-08-08 3 2008-10-27 P SUPERS. DATE 2008-06-10 3 2008-06-02 130 C 17 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18310_610_090305.eps 090410 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 52 6 LED Low-Pow: Microcontroller Liteon 1 2 1 A 4 3 2 3 7 6 5 4 8 9 5 11 10 6 7 12 14 13 9 8 15 10 16 11 18 17 12 13 MICROCONTROLLER LITEON INPUT BUFFER A B +3V3 100p 2217 100R EN 7 33p 2201 14 100n 10K 1 RES 1K0 9209 7214 F202 1 D 3 D Q (64K) 7201-4 74HCT125PW C S 3204 7 HOLD +3V3 12 +3V3 10K W M95010-WDW6 4 +3V3 13 RES 1K0 3220 11 3209 GND 27R EN C 100p 10K 3203 6 2 14 2 Φ 7 5 1 33p B 8 VCC 33p 3 +3V3 3219 3 3207 7212 PDTC144EU +3V3 2209 7201-1 74HCT125PW 2 2202 7209 PDTC144EU B 3210 2214 +3V3 10K 3213 C A 2218 +3V3 C 9212 RES E 3223 100p 100R EN 2219 F207 +3V3 9213 D D 9214 RES +3V3 7201-3 74HCT125PW 14 F G 8 10 F208 3212 100R 7 EN 100p 2220 RES 3121 9 100R E E 20 19 H 2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7 2217 B12 2218 C12 2219 D12 2220 E9 3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8 3223 C11 3224 H11 6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10 F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9 A B C D E F G H F F I 2216 2215 1u0 100n 3216 4 5 24 H 100R L 3214 26 +3V3 10K XLAT SCLK SIN SOUT XHALF 1 XERR VIA I +3V3 +3V3 F209 H L 23 6216 33p 2211 GND GND_HS K F213 3K3 3 IREF F212 3221 27 3215 1K2 MODE 3K3 F204 3224 100R 3222 6 3217 F211 470R K BLANK 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 J G F210 SML-310 2 0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15 GSCLK 30 31 32 33 25 M Φ VCC LED DRIVER PWM CONTROL G 29 J 28 7215 TLC5946PWP owner. is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts I I M +3V3 1 N 2 3 4 5 6 7 8 9 10 11 12 13 N O O 1 DRIVER 6LED LITEON P 2008-08-08 2 2008-10-27 3 NAME 2 3 4 5 6 7 8 9 10 11 12 13 14 P A2 SUPERS. CHECK 1 8204 000 8857 2K9 15 DATE 16 C 17 18 19 20 18310_611_090305.eps 090410 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 53 6 LED Low-Pow: LED Liteon 4 3 2 1 1 A 5 2 6 3 4 9 8 7 5 10 11 7 6 12 14 13 9 8 16 15 10 11 17 18 19 13 12 LED LITEON B A A VLED1-F VLED2 C B GREEN 5 RED 6 BLUE 4 GREEN 2 5 RED 1 6 BLUE 3 9305-2 5 RED 2 4 9305-4 5 5 RED 1 6 BLUE 1 1 9305-1 8 6 BLUE 2 8 9313-1 1 9312-4 9312-3 6 5 GREEN 4 7004 LTW-E500T-PH1 4 3 9310-1 1 8 9310-4 3 GREEN GND_HS 9310-2 7 2 3 2 7003 7 GREEN 7 7 2 4 GND_HS GND_HS 2 7002 LTW-E500T-PH1 3 B 3 8 9318-1 1 5 RED 2 5 9318-4 4 6 BLUE 1 3 9303-3 6 GREEN 2 9315-2 7 4 9303-4 5 RED 4 9315-4 5 GND_HS GND_HS G R C BLUE GND_HS G 7 C 4 7 E 7001 LTW-E500T-PH1 7000 LTW-E500T-PH1 7 9301 9309-2 D 4 VLED2 7 VLED1-F 5 B R B B F 9320-1 8 9320-4 5 9320-2 7 8 3335 9319-1 390R 3345 1 4 2 1 2 390R 3342 3346 560R E 3339 4 G 390R 1 1K5 9306-1 560R 9306-4 1K5 3344 D 5 3341 3340 G 3336 8 D R 9304-2 7 3354 560R 3311 390R 3348 1K5 3312 560R 3358 390R 1K5 560R 3357 390R 3349 3353 560R 1K5 E 3360 H 560R 3315 3384 VLED1-F VLED1-F 3334 F308 F 3303 1K0 Place jumper 9325, 9326, 9327 7315 BC847BW F348 8 9311-1 F329 1 VLED1-F H 5 10K 3306 10K 9326 F328 F303 G 1K5 6 if VLED < 17V 10K 3304 Place jumper 9314, 9316, 9317 10K 3325 560R 1K5 3323 F302 3326 3366 1K5 3321 9311-4 1K5 3320 1K5 3322 if VLED < 17V K L 3363 560R 1K5 3391 G 560R 3364 1K5 3390 J 1K5 F326 1K5 3389 owner. H 3308 F330 10K 1K0 9327 7316 BC847BW 3309 is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts 1K5 3388 10K 3387 560R 7317 BC847BW 10K F 3301 560R 10K 3331 I 1K5 3317 F325 F307 9311-3 1K5 3370 3362 4 560R 1K5 3316 3 3369 1K5 3385 M I I N 1 2 4 3 5 6 7 8 9 10 11 12 20 3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1 7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8 9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13 A B C D E F G H I J K L M N 13 O O CHN SETNAME 1 CLASS_NO DRIVER 6LED LITEON P 2008-08-08 2 2008-10-27 3 2K9 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8204 000 8857 15 16 2 2008-08-08 3 2008-10-27 P 130 3 SUPERS. DATE 2008-06-10 2008-06-02 C 17 A2 3 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18310_612_090305.eps 090305 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 54 F108 3335 3345 3348 3351 3317 3316 3315 3313 3312 3311 3310 3314 3320 3319 3318 3323 3322 3321 7005 3309 3308 3307 9311 9319 9304 9303 9327 7316 3303 3302 3301 7317 9325 9326 7315 3306 3305 3304 7004 2127 3111 2105 3137 3140 3135 7116 3123 9312 9320 9310 3113 F130 F107 F215 9318 7212 7210 7209 3134 3141 9315 F120 F132 F105 F123 F127 F349 F214 1M2A F139 F209 F213 F104 F109 I124 F137 1M1A F126 F212 F101 I126 F344 F106 F345 F116 F347 7214 2118 2115 3112 3105 F135 F346 F348 2214 3203 3205 3125 C140 2107 3213 3204 7102 9104 9103 3118 9101 2114 3101 2131 2124 2121 3104 2113 2123 3126 3138 3136 2106 3139 2108 2209 3210 3130 2120 7110 7003 I115 3124 3131 2112 3116 9119 1M84 2111 2117 2116 3115 2126 I111 9106 2119 3127 2122 3106 I114 3142 7002 1101 I113 9313 3120 3119 9121 3117 3114 I110 3103 3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362 2110 2109 3109 3108 3110 3107 9102 2102 2103 3132 3133 2104 7101 3331 9309 3332 9317 9308 9307 9305 3330 3333 3327 7306 9306 3326 3328 3325 2210 7305 3211 2219 3217 9314 7001 2216 3214 2215 3215 3223 9213 3207 2217 9209 9316 3222 7307 3334 7215 3221 3224 2101 3218 9108 7201 9208 3219 2203 9212 3128 3129 3102 2125 6216 2211 3216 1105 2130 2129 2128 9114 9110 3121 2220 2201 3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353 9301 3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336 2218 3220 3212 9211 3209 9210 9214 7000 3342 3339 9302 9107 2202 1M83 9109 9112 9111 9113 Layout 6 LED Low-Pow F122 F128 F326 F134 F328 F202 F133 F329 F325 F327 F118 F203 F136 I125 F103 F112 F210 F305 F102 F206 F340 F208 F205 F307 F304 F204 F302 F124 F138 F207 F211 F303 F117 F121 F343 F125 F342 F341 F330 F308 F129 F131 18310_551_090309 090309 3104 313 6313.3 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 55 8 LED Low-Pow: Microcontroller Liteon 2 1 A 4 3 1 5 6 3 2 8 7 9 5 4 7 6 12 11 10 13 9 8 16 15 14 10 11 17 12 18 13 MICROCONTROLLER LITEON B 3134 BLANK EEPROM-CS TEMP-SENSOR PROG 1K5 1% 2108 10n 3139 2107 4 C 5 10K 10K 6 10K 7 10K 5 10K 8 10K 8 7 10K 5 10K 7 10K CD NC BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 2 4 3102-4 3103-1 1 3 3102-3 3101-3 3 3102-2 5 10K 6 10K 8 10K 4 3101-4 3112 8 10K 1 10K 3115 3 3106-3 3114 1 3105-1 3102-1 1 RES 10K 3104-1 1 4 3106-2 2 3 3105-3 3106-1 3104-3 3 3104-2 2 3116 10K 5 1 2 3 1 8 7 6 8 2 4 2 4 7 5 7 5 3126-1 1 8 3127-1 3127-4 1 4 8 5 I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R E CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG TEMP-SENSOR F CONTROL-2 SCL SDA 100R 100R 100p 100p 2131 100p 2124 RES 100p 2126 100p 2123 100p 2122 RES 100p 2117 100p 2116 4 UD-MD I111 I110 I113 I114 I115 3130 3103-4 3131 9106 RES 2112 100n 9119 10K 7 2 F112 G 5 4 3103-2 22R 100R VLED1 3105-4 7 10K 100p 2110 3117 31 7 19 43 5 +3V3 100p 2115 10K 4 100n 2111 5 1 3104-4 4 10K 9121 RES SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF RST GND 6 3103-3 3 6 10K 10K +3V3 VLED2 +3V3 15 16 F103 +1V8 100n 2113 100n 100n 2121 H 2119 H 3 IN 3120 10K 3119 1u0 2130 7110 NCP303LSN10T1 27 100n 2120 L F104 +3V3 4 F102 2114 RES +3V3 1M2A K 10K RES 10K RES 9103 9104 RES VLED1 26 10K RES 9102 10K 3132 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 2 G 3141 1 2 D 3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4 2118 RES +3V3 +3V3 13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16 100p 3133 3118 100p 2109 9101 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF F109 owner. M 1 2 3 4 5 6 7 8 9 10 11 12 1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11 2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10 3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10 3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7 3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4 3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11 3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12 3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11 7101 A7 7102 E6 7110 F4 7116-1 B11 A 7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11 B C D E F G H I J K L M 13 N N 1X03 REF EMC HOLE O O SETNAME 5 4 3 2 CHN 1 is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts F133 F135 F136 F139 F137 VSSA P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 X2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 RTXC1 P0.5|MISO0|MAT0.1 RTXC2 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0 RTCK P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2 VBAT P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 DBGSEL P0.13|DTR1|MAT1.1 P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 RST P0.16|EINT0|MAT0.2 P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA MICROCTRL 42 20 25 1M84 Φ VSS X1 17 40 16M9 1101 12 2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K 100R 15 16 3105-2 2 F108 OUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 RES 1K8 1% RES 10K F105 VLED2 15 16 47K F107 VLED1 11 J B 10n RES 3138 8 1K5 1% RES 3140 EEPROM-CS TEMP-SENSOR PROG 10K 3107 3108 +3V3 +3V3 VLED2 3 +3V3 3123 +3V3 SDA CONTROL-1 CONTROL-2 F138 F134 7116-1 LM393PT F118 SCL E F F117 100n +3V3 1.5A T 7102 LPC2103FBD48 I 4 RES 10K 10n 3137 2105 3111 VLED1-F VLED1 D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 +3V3 C140 33p 2125 9112 9114 10u 35V 10u 35V 2129 15 16 G H 7 6 2106 1105 3109 F 8 5 F106 VLED1 VLED2 100R 3110 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 3136 F116 1M1A E 7116-2 LM393PT 1K5 +1V8 1% 1% 3135 4 BP COM A 100K RES +3V3 4u7 INH 100n 3 2102 SPI-LATCH PWM-CLOCK 5 OUT 10n 9109 9110 IN 2104 CONTROL-1 CONTROL-2 1 +3V3 1u0 SPI-CLOCK SDA -T 10K 9113 RES 9107 9108 F101 2 +3V3 SCL SPI-DATA-RETURN 2101 SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2 9111 RES 1u0 2128 D B F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132 2127 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 +3V3 +3V3 7101 LD2985BM18R 1K5 IN 1M83 2103 A 20 19 CLASS_NO DRIVER 6LED LITEON P 2008-08-08 8204 000 8857 2K9 2 1 2008-06-10 2 2008-08-08 3 ?? P 3 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 DATE 16 130 3 SUPERS. 2008-06-02 C 17 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_500_090403.eps 090410 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 56 8 LED Low-Pow: Microcontroller Liteon 1 2 1 A 5 4 3 2 3 7 6 4 8 9 5 11 10 6 7 12 14 13 9 8 16 15 10 11 18 17 12 13 MICROCONTROLLER LITEON INPUT BUFFER A +3V3 B +3V3 14 100p 2217 7 B 2 9210 RES SPI-DATA-RETURN (64K) 7201-4 74HCT125PW S 3204 7 HOLD 12 SPI-CLOCK +3V3 10K W M95010-WDW6 +3V3 14 C 3209 4 +3V3 F206 3220 11 13 RES 1K0 27R EN SPI-CLOCK-BUF 100p Q 2218 Φ 9211 C 9212 RES 2 BLANK +3V3 F207 RES 1K0 3223 6 4 100R EN 7 33p 2203 3211 +3V3 14 E 7201-2 74HCT125PW 5 BLANK-BUF 100p SPI-CLOCK-BUF 2219 D 10K RES 3205 PWM-CLOCK-BUF 9209 GND 3 100R EN 7 F203 1 33p 2201 1 3 EEPROM-CS-LOCAL 3219 3 1 8 33p 10K 3203 6 33p 2209 2 C F205 RES 1K0 VCC 5 D +3V3 SPI-DATA-IN 7214 1 7210 PDTC144EU 100n SPI-CS 2202 SPI-CS F202 +3V3 EEPROM-CS PWM-CLOCK 3207 7212 PDTC144EU 3 7201-1 74HCT125PW 2 10K 3210 2214 7209 PDTC144EU B 10K 3213 C A 9208 RES +3V3 +3V3 9213 D 9214 RES D SPI-DATA-OUT-FIL +3V3 7201-3 74HCT125PW 14 F 3121 G 9 8 100R 10 F208 3212 DATA-RETURN-SWITCH 100R 7 EN 100p 2220 RES SPI-DATA-RETURN E E H F B C D E F G H I 2215 1u0 100n 28 Φ 1K2 3 4 5 24 SPI-CLOCK-BUF SPI-DATA-IN SPI-DATA-OUT 3216 100R SPI-DATA-OUT-FIL L 27 3214 26 +3V3 10K IREF XLAT SCLK SIN SOUT XHALF 1 XERR VIA I K PWM-R2 +3V3 +3V3 F214 PWM-G2 F215 PWM-B2 F209 EEPROM-CS-LOCAL DATA-RETURN-SWITCH H EEPROM-CS-LOCAL DATA-RETURN-SWITCH L 23 6216 33p 2211 GND GND_HS PWM-B1 F213 3K3 F204 PWM-G1 F212 3K3 100R MODE 3221 SPI-LATCH 3218 RES 3215 1K2 6 F211 3222 H 3217 29 K PROG BLANK 470R 33p 0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15 GSCLK PWM-R1 SML-310 2 30 31 32 33 25 2210 J G F210 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 3224 VCC LED DRIVER PWM CONTROL G PWM-CLOCK-BUF BLANK-BUF owner. is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts A +3V3 2216 7215 TLC5946PWP M 2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7 2217 B12 2218 C12 2219 D12 2220 E9 3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8 3223 C11 3224 H11 6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10 F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9 F I J 20 19 I M +3V3 1 N 2 3 4 5 6 7 8 9 10 11 12 13 N O O CHN SETNAME CLASS_NO DRIVER 6LED LITEON P 2008-08-08 8204 000 8857 2K9 2 1 2008-06-10 2 2008-08-08 3 ?? P 3 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SUPERS. DATE 16 130 3 2008-06-02 C 17 A2 2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_501_090403.eps 090410 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 57 8 LED Low-Pow: LED Liteon 1 3 2 1 A 6 5 4 2 3 7 8 4 9 5 11 10 7 6 12 13 9 8 15 14 10 16 19 13 12 11 18 17 LED LITEON B A A VLED2 9307 9308 VLED1-F C B BLUE 2 5 RED 1 6 BLUE 9305-2 GREEN 2 5 RED 2 4 9305-4 1 6 BLUE 1 1 9305-1 3 5 5 RED 8 6 BLUE 3 4 GREEN 2 8 9318-1 1 5 RED 2 4 9303-4 1 5 9318-4 4 6 BLUE 1 1 9303-1 GND_HS 3 9303-3 3 GREEN 5 5 RED 8 6 BLUE GND_HS 7 2 4 9315-4 5 1 1 9315-1 8 5 7 9313-4 9313-2 B 2 9315-2 3 4 9313-1 2 9312-1 1 7005 LTW-E500T-PH1 4 6 1 9312-3 8 8 9312-4 6 5 9318-3 4 7004 LTW-E500T-PH1 6 3 3 8 9310-1 1 5 9310-2 9310-4 2 7 GREEN 4 9309-4 4 5 9309-2 9309-1 1 7003 LTW-E500T-PH1 4 7 GND_HS 7 GND_HS 7 GND_HS 2 4 3 G R C GND_HS G 7 RED 6 GREEN 7 5 4 3 7 C GREEN 7 9302 9301 R B F345 F344 F340 F341 F342 B F 8 5 6 9319-4 9319-3 3 9320-2 7 2 9319-1 9320-4 5 4 4 9320-1 8 1 1 RED6 1 9304-1 8 4 9304-4 5 RED6 BLUE6 BLUE6 390R 3348 1K5 3312 560R 3358 390R 3351 1K5 3313 560R 390R 1K5 3314 560R 1K5 3315 560R 1K5 3316 560R 1K5 3317 560R VLED1-F VLED1-F F307 10K 9325 PWM-B2 Place jumper 9325, 9326, 9327 if VLED < 17V VLED1-F VLED1-F F327 F303 7315 BC847BW 3305 560R 1K5 3321 560R 1K5 3322 560R 1K5 3323 560R 3306 PWM-R1 F328 VLED1-F 1K0 3368 G F348 F349 GREEN-2 H 7316 BC847BW 3308 9316 F305 10K 3307 F329 7306 BC847BW 10K 3327 F304 3333 3366 3367 F347 PWM-R2 VLED1-F H F 1K5 1K0 10K 3326 owner. 1K5 3320 3364 8 if VLED < 17V 1K0 560R 3365 RED-2 Place jumper 9314, 9316, 9317 9314 3328 K 560R 1K5 3319 6 10K 3325 F302 7305 BC847BW 1K5 3318 9311-1 1K5 3362 3363 9311-3 G 3301 PWM-B1 1K5 3391 9326 3374 560R 1K0 3361 F330 1K0 9327 1K5 3390 F326 10K 560R 3302 3304 1K5 3389 3373 1K0 BLUE-2 7317 BC847BW E 10K 560R 3334 3303 1K5 3388 F308 10K 560R 3372 F325 7307 BC847BW 9317 1K5 3387 3371 10K 3331 3370 560R 3359 3360 1 1K5 3386 D 3357 3 1K5 3385 3369 10K 10K 3309 GREEN-2 3330 is prohibited without the written consent of the copyright 7 10K 560R All rights reserved. Reproduction in whole or in parts 9304-2 560R 1K5 3384 560R L 2 3354 1K5 3311 5 560R J GREEN6 3310 1K5 3356 3352 F GREEN6 3335 390R 3345 9311-4 560R 1 390R 3 1K5 3353 3349 9306-3 390R 3342 6 390R 3339 1K5 3350 4 1K5 3347 560R 3355 I 390R 3337 9306-1 1K5 3344 560R H RED-1 BLUE-1 9306-4 560R 560R 3343 3346 E G 3336 8 3341 5 3338 3340 G R GREEN-1 3332 D F346 F343 4 E 4 7002 LTW-E500T-PH1 7001 LTW-E500T-PH1 7000 LTW-E500T-PH1 2 7 VLED2 VLED1-F D 8 B RED-2 M BLUE-2 PWM-G1 I PWM-G2 I N 1 2 3 4 5 6 7 8 9 10 11 12 20 3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1 7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8 9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13 A B C D E F G H I J K L M N 13 O O CHN SETNAME CLASS_NO DRIVER 6LED LITEON P 2008-08-08 8204 000 8857 2K9 2 1 2008-06-10 2 2008-08-08 3 ?? P 3 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SUPERS. DATE 16 3 2008-06-02 130 C 17 3 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_502_090403.eps 090403 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 58 8 LED Low-Pow: LED Drive Liteon 1 2 3 4 5 6 9 8 7 11 10 13 12 15 14 16 18 17 19 20 A A 1 3 2 4 5 6 8 7 9 1M3A E2 1M85 D2 3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7 3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8 3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8 7006 A5 7007 A7 10 B LED DRIVE C A A 7006 LTW-E500T-PH1 D B GREEN-1 4 GREEN RED-1 5 RED BLUE-1 6 BLUE 7007 LTW-E500T-PH1 2 3 1 4 GREEN 5 RED 6 BLUE GND_HS 3 1 B 7 7 GND_HS E 2 C D E C C F B F 1M85 1 2 3 4 5 6 7 8 9 10 11 12 13 14 G D H G GREEN-2 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 J F BLUE-2 VLED1 H VLED2 15 16 3536 3538 3541 560R 1K5 3544 390R 3537 560R SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF 3543 1K5 3547 390R 3539 560R 3546 1K5 3550 390R 3542 560R 3549 1K5 3553 390R BLANK-BUF EEPROM-CS TEMP-SENSOR PROG +3V3 560R E I 1K5 3556 3552 J VLED1 560R VLED2 1K5 3584 3555 560R 15 16 1K5 3586 3570 K 560R G 3571 1K5 3587 560R 3572 1K5 3588 560R 1K5 3589 3573 560R L F 1K5 3585 3569 560R owner. D RED-2 1M3A I is prohibited without the written consent of the copyright +3V3 3540 E All rights reserved. Reproduction in whole or in parts SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF K G 1K5 3590 3574 560R L 1K5 3591 1K5 M 1 2 3 4 5 6 9 8 7 M 10 1X04 REF EMC HOLE N N O O CHN SETNAME CLASS_NO 2LED + CONNECTOR P 2008-05-23 1 2008-08-08 2 2008-10-31 3 2K9 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8204 000 8874 15 16 2008-05-23 2 2008-08-08 3 0 P SUPERS. DATE 1 130 1 2008-04-20 C 17 A2 1 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_503_090403.eps 090403 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 59 F326 F134 F328 F202 F133 F329 F325 F327 F118 F203 F136 F308 F330 I125 F103 F112 F210 F305 F122 F128 F102 F206 F304 F204 F302 F343 F340 F208 F205 F307 F121 F138 F207 F211 F303 F117 7007 1M1A F129 F131 F124 F137 F126 F212 F101 F213 3536 3537 3539 3542 3552 3555 3549 3570 3546 3571 3543 3572 3540 3573 3538 3569 3574 7006 F123 F127 I124 F125 F342 F341 1M2A F104 F109 1X04 F120 F132 F105 F139 F209 3541 3553 3544 3588 3547 3587 3550 3586 3556 3591 3584 3590 3585 3589 3335 3345 3348 3351 F130 F108 F214 I126 F344 F106 F345 F107 F215 F349 F116 1M3A F347 9311 9304 9319 9303 3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362 7005 2127 7316 F135 F346 F348 1M85 3314 3320 3319 3318 3323 3322 3321 9315 3309 3308 3307 3303 3302 3301 9327 7317 3306 3305 3304 9326 3140 3135 9325 9312 3203 3205 3123 7116 7214 3134 3141 7315 2105 3137 3111 7004 7209 2214 3204 7212 7210 2107 3213 9320 3105 C140 9310 2111 3113 3125 3210 7102 3126 9318 2131 2115 3112 3101 2124 2121 2209 7003 2123 3131 2112 3116 9119 9106 2113 I111 I114 7110 3138 3136 2106 3139 2108 2118 3130 2120 3104 I115 I113 2122 9102 3117 3114 2119 3127 3317 3316 3315 3313 3312 3311 3310 2110 2109 3109 3108 3110 3107 3106 2117 2116 3115 2126 3103 3124 3142 7002 1101 9313 1M84 3120 3119 9121 9104 9103 3118 9101 2114 2102 2103 7101 3331 9308 9307 9309 3332 9317 7307 3334 9305 3330 3333 3327 7306 9306 2210 3326 3328 3325 9316 7305 I110 2104 7215 3215 2216 3214 2215 3217 9314 3222 3132 3133 3102 2125 3128 3129 2101 3218 2219 2129 2128 3221 3224 2211 3216 9213 3207 2217 9209 3223 7001 2220 2201 7201 9208 3219 2203 9212 3211 3121 6216 9113 1105 2130 9114 9110 9302 9107 2202 3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353 9108 3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336 9301 3342 3339 2218 3220 3212 9211 3209 9210 9214 1X03 7000 1M83 9109 9112 9111 Layout 8 LED Low-Pow 18490_550_090326.eps 090326 31043136314.3 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 60 12 LED Low-Pow: Microcontroller Liteon 3 2 1 A 4 1 5 6 3 2 8 7 9 5 4 7 6 12 11 10 13 9 8 16 15 14 10 11 17 12 18 13 MICROCONTROLLER LITEON B 3134 10n 3139 1K5 1% 100n 2107 4 8 C 5 10K 10K 6 10K 7 10K 5 10K 8 10K 8 7 10K 5 10K 7 10K RST GND CD NC 1 4 100n 5 2111 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 2 4 3102-4 3101-3 3 3103-1 1 3 3102-3 3102-2 5 10K 6 10K 8 10K 4 3101-4 3112 8 10K 1 10K 3115 3 3106-3 3114 1 3105-1 3102-1 1 RES 10K 3104-1 1 3106-2 2 4 3 3106-1 3104-3 3 3105-3 3104-2 2 3116 10K 5 1 2 3 1 8 7 6 8 2 4 2 4 7 5 7 5 3126-1 1 8 3127-1 3127-4 1 4 8 5 I124 100R 100R 100R 100R 100R 100R I125 100R 100R 100R 100R 100R 100R I126 100R E CONTROL-1 PWM-CLOCK-BUF SPI-CLOCK-BUF SPI-DATA-RETURN SPI-DATA-IN SPI-LATCH SPI-LATCH-2 TEMP-SENSOR EEPROM-CS BLANK-BUF PROG TEMP-SENSOR F CONTROL-2 SCL SDA 100R 100R 100p 100p 2131 100p 2126 100p 2124 RES 100p 2122 RES 100p 2123 100p 2117 100p 2116 100p 2115 4 UD-MD I111 I110 I113 I114 I115 3130 3103-4 3131 9106 RES 2112 100n 9119 10K 7 2 F112 G 5 4 3103-2 22R 100R VLED1 3105-4 7 10K 100p 2110 100p 3117 7 19 43 5 +3V3 2114 RES IN 3104-4 4 10K 9121 RES 3 6 10K 7110 NCP303LSN10T1 3120 10K 3119 1u0 2130 F104 +3V3 27 3103-3 3 6 10K 10K +3V3 VLED2 +3V3 15 16 F103 +1V8 100n 2113 100n 100n 2121 H 2119 H 10K RES 10K +3V3 VLED1 4 F102 10K 3132 RES 9103 9104 RES 100n 2120 L 3141 1 2 D 3124-4 3128 3129 3124-1 3124-2 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4 100p 3133 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG 1M2A K 10K RES 9102 +3V3 13 14 18 21 22 23 24 28 29 30 35 36 37 41 44 45 46 47 48 1 2 3 32 33 34 38 39 8 9 10 15 16 MICROCTRL 2118 RES +3V3 26 31 2109 3118 F109 G 20 25 9101 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF 2 owner. M 1 2 3 4 5 6 7 8 9 10 11 12 1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11 2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6 2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10 3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10 3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7 3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4 3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11 3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12 3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11 7101 A7 7102 E6 7110 F4 7116-1 B11 A 7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11 B C D E F G H I J K L M 13 N N 1X03 REF EMC HOLE O O SETNAME 5 4 3 2 CHN 1 is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts F133 F135 F136 F139 F137 VSSA P0.0|TXD0|MAT3.1 P0.1|RXD0|MAT3.2 P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1 RTXC1 P0.5|MISO0|MAT0.1 RTXC2 P0.6|MOSI0|CAP0.2 P0.7|SSEL0|MAT2.0 RTCK P0.8|TXD1|MAT2.1 P0.9|RXD1|MAT2.2 VBAT P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4 P0.12|DSR1|MAT1.0|AD0.5 DBGSEL P0.13|DTR1|MAT1.1 P0.14|DCD1|SCK1|EINT1 P0.15|RI1|EINT2 RST P0.16|EINT0|MAT0.2 P0.17|CAP1.2|SCL1 P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0 P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7 P0.27|TRST|CAP2.0 P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2 P0.30|TDI|MAT3.3 P0.31|TDO VDD_1V8 VDD_3V3 VDDA X2 42 1M84 Φ VSS X1 17 40 16M9 1101 12 2 7 3101-2 10K 10K 6 10K 6 10K 8 10K 6 10K 3113 RES 10K 100R 15 16 3105-2 2 F108 OUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 RES 1K8 1% RES 10K F105 VLED2 15 16 47K F107 VLED1 11 J B 10n RES 3138 8 1K5 1% RES 3140 EEPROM-CS TEMP-SENSOR PROG 10K 3107 3108 +3V3 +3V3 VLED2 3 +3V3 3123 +3V3 SDA CONTROL-1 CONTROL-2 F138 F134 7116-1 LM393PT F118 SCL E F 4 10K +3V3 1.5A T 7102 LPC2103FBD48 I F117 2108 VLED1-F D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 6 RES 2105 10n 3137 3111 1105 VLED1 G H 7 +3V3 C140 33p 2125 9112 9114 10u 35V 15 16 3109 F 3136 5 F106 2106 100R 3110 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1% 1% F116 1M1A E 7116-2 LM393PT 1K5 +1V8 2 BLANK EEPROM-CS TEMP-SENSOR PROG 3135 4 BP COM A 100K RES +3V3 4u7 INH 2102 3 OUT 100n SPI-LATCH PWM-CLOCK IN 10n 9109 9110 +3V3 F101 5 2104 CONTROL-1 CONTROL-2 1 1u0 SPI-CLOCK SDA 2101 9107 9108 -T 10K 9113 RES SCL SPI-DATA-RETURN VLED1 VLED2 10u 35V 2129 B +3V3 2127 D 9111 RES 1u0 2128 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SCL SPI-DATA-IN SDA CONTROL-1 CONTROL-2 +3V3 +3V3 7101 LD2985BM18R F120 F121 F122 F123 F124 F125 F126 F127 F128 F129 F130 F131 F132 1K5 IN 1M83 2103 A 20 19 CLASS_NO DRIVER 6LED LITEON P 2008-08-08 8204 000 8857 2K9 2 1 2008-06-10 2 2008-08-08 3 ?? P 3 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 DATE 16 130 3 SUPERS. 2008-06-02 C 17 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_510_090403.eps 090410 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 61 12 LED Low-Pow: Microcontroller Liteon 1 2 1 A 4 3 2 3 7 6 5 4 8 5 11 10 9 6 7 12 14 13 9 8 15 10 17 16 11 12 19 18 13 MICROCONTROLLER LITEON INPUT BUFFER A +3V3 B +3V3 2 7201-4 74HCT125PW S 3204 7 HOLD 100p 2217 +3V3 12 SPI-CLOCK +3V3 10K W M95010-WDW6 3209 4 +3V3 F206 3220 11 13 RES 1K0 27R EN SPI-CLOCK-BUF 9211 C 9212 RES 2 BLANK +3V3 F207 RES 1K0 3223 6 4 100R EN 7 33p 2203 3211 +3V3 14 E 7201-2 74HCT125PW 5 BLANK-BUF 100p SPI-CLOCK-BUF 2219 10K RES 3205 14 9210 RES SPI-DATA-RETURN 100p Q (64K) C 2218 Φ D GND 3 7 B 14 1 F203 1 PWM-CLOCK-BUF 9209 7 10K 3203 33p 2209 6 3 EEPROM-CS-LOCAL 100R EN 8 33p 5 2 C 3219 3 1 VCC 1 7210 PDTC144EU F205 RES 1K0 SPI-DATA-IN 7214 D +3V3 33p 2201 SPI-CS 2202 SPI-CS F202 +3V3 EEPROM-CS PWM-CLOCK 3207 7212 PDTC144EU 3 7201-1 74HCT125PW 2 10K 3210 2214 7209 PDTC144EU B 10K 3213 C 100n +3V3 +3V3 A 9208 RES 9213 D 9214 RES D SPI-DATA-OUT-FIL +3V3 7201-3 74HCT125PW 14 F 3121 G 8 100R 10 F208 3212 DATA-RETURN-SWITCH 100R 7 EN 100p 2220 RES SPI-DATA-RETURN 9 E E H F B C D E F G H I 2216 2215 1u0 100n 28 Φ 3216 100R SPI-DATA-OUT-FIL L 3214 26 +3V3 10K XLAT SCLK SIN SOUT XHALF 1 XERR VIA +3V3 I +3V3 F214 PWM-G2 F215 PWM-B2 F209 EEPROM-CS-LOCAL DATA-RETURN-SWITCH H EEPROM-CS-LOCAL DATA-RETURN-SWITCH L 23 6216 33p 2211 GND GND_HS K PWM-R2 3K3 4 5 24 PWM-B1 F213 3K3 3 IREF F212 3221 1K2 SPI-CLOCK-BUF SPI-DATA-IN SPI-DATA-OUT 27 MODE PWM-G1 3222 F204 BLANK 29 3218 RES 3215 1K2 SPI-LATCH H 6 100R PWM-R1 F211 470R 2 33p 3217 PROG 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 SML-310 2210 K 0 1 2 3 4 5 6 7 OUT 8 9 10 11 12 13 14 15 GSCLK 30 31 32 33 25 J G F210 3224 VCC LED DRIVER PWM CONTROL G PWM-CLOCK-BUF BLANK-BUF owner. is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts A +3V3 7215 TLC5946PWP M 2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7 2217 B12 2218 C12 2219 D12 2220 E9 3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3 3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8 3223 C11 3224 H11 6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7 9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10 F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9 F I J 20 I M +3V3 1 N 2 3 4 5 6 7 8 9 10 11 12 13 N O O CHN SETNAME CLASS_NO DRIVER 6LED LITEON P 2008-08-08 8204 000 8857 2K9 2 1 2008-06-10 2 2008-08-08 3 ?? P 3 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SUPERS. DATE 16 130 3 2008-06-02 C 17 A2 2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_511_090403.eps 090410 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 62 12 LED Low-Pow: LED Liteon 1 3 2 1 A 6 5 4 2 3 7 8 4 9 5 11 10 7 6 12 13 9 8 15 14 10 16 19 13 12 11 18 17 LED LITEON B A A VLED2 9308 9307 VLED1-F C B BLUE 2 5 RED 1 6 BLUE 4 GREEN 2 5 RED 1 6 BLUE 3 7 7 GREEN 2 4 9305-4 5 5 RED 1 1 9305-1 8 6 BLUE 3 4 GREEN 2 8 9318-1 1 5 RED 1 5 9318-4 4 6 BLUE GND_HS GREEN 2 4 9303-4 5 5 RED 1 1 9303-1 8 6 BLUE B 2 9315-2 7 2 4 9315-4 5 1 1 9315-1 8 3 5 7 9313-4 4 9313-2 8 4 9313-1 9312-1 1 6 2 9312-3 7005 LTW-E500T-PH1 3 9303-3 3 1 9312-4 8 6 5 9318-3 4 7004 LTW-E500T-PH1 6 3 3 9310-1 1 8 9310-4 5 9310-2 7 4 4 9309-4 4 7 2 9309-1 5 9309-2 1 9305-2 GND_HS GND_HS GND_HS 7003 LTW-E500T-PH1 2 3 G R C GND_HS GND_HS G 7 RED 6 GREEN 7 5 4 3 7 GREEN 2 7 C 4 7002 LTW-E500T-PH1 7001 LTW-E500T-PH1 7000 LTW-E500T-PH1 7 R B F345 F344 F340 F341 F342 B F 8 5 6 9319-1 9319-4 9319-3 3 9320-2 7 1 9320-4 5 2 4 8 9304-4 5 560R 3358 390R 3351 1K5 3313 560R 390R 1K5 3314 560R 1K5 3315 560R 1K5 3316 560R 1K5 3317 560R 1K5 3318 560R 1K5 3319 560R 3365 1K5 3320 560R 1K5 3321 560R 1K5 3322 560R 1K5 3323 560R VLED1-F VLED1-F F307 10K 9325 Place jumper 9325, 9326, 9327 if VLED < 17V VLED1-F VLED1-F F327 F303 F328 3306 VLED1-F G F348 F349 GREEN-2 H 7316 BC847BW 3308 9316 F305 10K 3307 F329 7306 BC847BW 10K 3327 F304 1K0 3368 F347 PWM-R2 VLED1-F 3333 3367 1K5 1K0 10K 3326 owner. 7315 BC847BW 3305 PWM-R1 H 3366 8 if VLED < 17V 1K0 F RED-2 Place jumper 9314, 9316, 9317 9314 3328 K 3364 6 10K 3325 F302 7305 BC847BW 3362 3363 9311-1 1K5 9326 G 3301 PWM-B2 PWM-B1 1K5 3391 10K 3374 560R 3361 F330 1K0 9327 1K5 3390 1K0 3304 560R 1K0 BLUE-2 E 10K 1K5 3389 3373 3302 F326 10K 560R 3334 3303 1K5 3388 F308 7317 BC847BW 9317 560R 3372 F325 7307 BC847BW 10K 1K5 3387 3371 10K 560R 3359 3360 9311-3 1K5 3386 3370 10K 10K 3309 GREEN-2 3330 is prohibited without the written consent of the copyright 9304-1 1K5 3312 D 3357 1 1K5 3385 3369 560R L 1 4 390R 3348 1K5 3384 560R All rights reserved. Reproduction in whole or in parts RED6 BLUE6 9304-2 560R 3 560R J RED6 BLUE6 7 2 3354 1K5 3311 5 3352 F GREEN6 3310 1K5 3356 3355 I GREEN6 3335 390R 3345 9311-4 560R 9320-1 8 390R 4 1K5 3353 3349 1 390R 3342 3 1K5 3350 9306-3 560R 6 390R 3339 4 1K5 3347 1 560R 3343 9306-4 390R 3337 9306-1 1K5 3344 5 560R 3340 560R H RED-1 BLUE-1 8 3341 3346 E G 3336 3338 3331 G R GREEN-1 3332 D F346 F343 4 E 9302 9301 D 8 B VLED2 VLED1-F RED-2 M BLUE-2 PWM-G1 I PWM-G2 I N 1 2 3 4 5 6 7 8 9 10 11 12 20 3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12 3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12 3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2 3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12 3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13 3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1 3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1 7000 C2 7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1 9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5 9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8 9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13 A B C D E F G H I J K L M N 13 O O CHN SETNAME CLASS_NO DRIVER 6LED LITEON P 2008-08-08 8204 000 8857 2K9 2 1 2008-06-10 2 2008-08-08 3 ?? P 3 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 3 SUPERS. DATE 16 2008-06-02 130 C 17 3 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_512_090403.eps 090403 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 63 12 LED Low-Pow: LED Drive 1 2 3 4 7 6 5 9 8 10 12 11 13 14 18 17 16 15 19 20 A A 1 2 B 3 5 4 7 6 9 8 10 11 12 LED DRIVE A A C RED-1 5 RED BLUE-1 6 BLUE 7007 LTW-E500T-PH1 2 3 1 4 GREEN 5 RED 6 BLUE 1 GND_HS 4 GREEN 5 RED 6 BLUE 3 1 4 GREEN 5 RED 6 BLUE GND_HS 7 7 GND_HS 7009 LTW-E500T-PH1 7008 LTW-E500T-PH1 3 7010 LTW-E500T-PH1 3 1 4 GREEN 5 RED 6 BLUE 1 4 GREEN 5 RED 6 BLUE GND_HS GND_HS B 7011 LTW-E500T-PH1 3 3 1 GND_HS 7 GREEN 7 4 7 7006 LTW-E500T-PH1 GREEN-1 7 B D E C C 2 2 2 2 2 1M3A F2 1M85 D2 3536 E11 3537 E11 3538 E9 3539 F11 3540 F9 3541 E10 3542 F11 3543 F9 3544 F10 3546 F9 3547 F10 3549 F9 3550 F10 3552 F9 3553 F10 3555 G10 3556 F10 3569 G9 3570 G9 3571 G9 3572 G9 3573 H9 3574 H9 3584 G10 3585 G10 3586 G10 3587 G10 3588 G10 3589 H10 3590 H10 3591 H10 7006 B2 7007 B3 7008 B5 7009 B6 7010 B7 7011 B8 B C D E F F D G E H D 1M85 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF +3V3 G GREEN-2 BLANK-BUF EEPROM-CS TEMP-SENSOR PROG RED-2 BLUE-2 VLED1 E VLED2 1M3A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 3541 560R 1K5 3544 390R 3537 390R 3539 J 560R SPI-CLOCK-BUF SPI-DATA-OUT SPI-DATA-RETURN SPI-LATCH PWM-CLOCK-BUF 3543 1K5 3547 560R 3546 1K5 3550 390R 3542 560R 3549 1K5 3553 390R BLANK-BUF EEPROM-CS TEMP-SENSOR PROG +3V3 560R 1K5 3556 3552 560R VLED2 J 1K5 3584 3555 560R 15 16 1K5 3585 3569 560R G 1K5 3586 3570 K 560R 3571 1K5 3587 560R 3572 1K5 3588 560R 1K5 3589 3573 560R L I F VLED1 owner. is prohibited without the written consent of the copyright All rights reserved. Reproduction in whole or in parts F 3536 3538 3540 I H 15 16 K 1K5 3590 3574 H G 560R L H 1K5 3591 1K5 M M 1 3 2 5 4 6 7 8 10 9 11 12 1X04 REF EMC HOLE N N O O CHN SETNAME 2 CLASS_NO 2008-10-29 6 LED + CONNECTOR P 2008-08-14 2 2008-10-29 3 NAME Peter Van Hove CHECK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8204 000 8898 2K9 LITEON 15 P SUPERS. DATE 16 130 1 2008-07-30 C 17 A2 1 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18560_513_090403.eps 090403 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 64 3364 3365 3366 3367 3363 3368 3354 3357 3358 3359 3360 3361 3362 F108 I124 F137 F126 F212 F101 F104 F109 1M1A F122 F128 F129 F131 F326 F134 F328 F202 F133 F329 F325 F327 F118 F203 F136 F308 F330 I125 F103 F112 F210 F305 F102 F206 F340 F208 F205 F307 F304 F204 F302 F121 F138 F207 F211 F303 F117 7011 3536 3537 3539 3542 F123 F127 F139 F209 F213 3541 3553 3544 3588 3547 3587 3550 3586 3556 3591 3584 3590 3585 3589 3552 3555 3549 3570 3546 3571 3543 3572 3540 3573 3538 3569 3574 F120 F132 F105 F214 F124 F130 1M2A I126 F344 F106 F345 F107 F215 F349 F116 F347 1X04 F343 F125 F342 F341 F135 F346 F348 1M3A 7010 7008 7007 7009 3335 3345 3348 3351 7006 9319 9303 9304 9312 1M85 9311 3309 3308 3307 9327 7316 3306 3305 3304 3303 3302 3301 9325 9326 7317 7315 3314 3320 3317 3319 3316 3318 3315 3323 3313 3322 3312 3321 3311 3310 9315 2127 3111 2105 3137 3140 3135 3123 7116 3134 3141 7004 7209 3204 2214 9310 2111 7212 7210 3213 7214 3203 3205 C140 2107 9318 3105 3210 9106 3117 3114 3113 3125 2209 7003 3102 2113 2124 2121 3138 3136 2106 3139 2108 9320 3101 7102 3104 3130 2120 2123 2131 3126 2122 3124 3131 2112 3116 9119 7110 2118 I114 2117 2116 3115 2126 2115 3112 9102 2119 I111 3127 7005 3107 3110 2110 2109 3109 3108 1101 I113 9313 1M84 3120 3119 9121 3106 I115 3142 7002 I110 3103 9104 9103 3118 9101 2114 2102 3132 3133 2103 7101 3332 9317 3331 9309 3330 3333 3327 7307 3334 9305 9316 7306 9306 9308 9307 2104 7215 2210 3217 9314 3326 3328 3325 3221 3224 6216 7001 2216 3214 2215 7305 2219 3222 3215 9113 9208 3219 3223 3128 3129 2101 3218 2220 2201 3207 2217 9209 9213 2203 9212 7201 3211 3121 2129 2128 2125 2211 3216 1105 2130 9114 9110 9302 9107 2202 3385 3389 3384 3390 3356 3391 3350 3386 3347 3387 3344 3388 3341 3353 9108 3338 3374 3340 3369 3343 3373 3346 3372 3349 3371 3352 3370 3355 3337 3336 9301 3342 3339 2218 3220 3212 9211 3209 9210 9214 1X03 7000 1M83 9109 9112 9111 Layout 12 LED Low-Pow 18490_551_090326.eps 090331 31043136335.2 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 65 9 10 SSB: DC/DC 3 2 6 3 7 8 5 4 6 12 11 7 8 13 9 10 DC / DC 11 F126 F111 F112 1 2 3 4 5 6 7 8 9 10 11 12 F113 F114 F115 F116 F117 F118 F119 F120 3 IN RES C 100p 100p 10n 2120 2121 2122 3100 1M95 1n0 1n0 F100 F101 F102 F103 F104 F105 F106 F107 F108 F109 F110 1 2 3 4 5 6 7 8 9 10 11 I100 STANDBY 68R RES 2111 STBY 3V3 3V 0V 0V 0V 0V RES 2110 ON 3V3 0V 12V 12V 12V 25V ONLY FOR ANALOG TUNER 5107 1n0 RES 2109 10u 100n 2171 2127 2 1u0 2125 +3V3STBY 1M95 PIN 1 2 6 7 8 9 +12VS B +8V_SW COM D E POWER-OK RES 4100 RES 4101 100p F122 1 OUT A BL_ON_OFF PWM_DIMMING BACKLIGHT_BOOST 68R 68R 100p I111 30R 3101 3102 RES 2119 1-1735446-2 7100 L78L08ACU 5100 +12VDISP RES 2118 STBY 0V 0V 0V 0V 0V C +12VS 13 12 C +12VS +24VAUDIO GNDSND 10u 5102 1n0 1n0 RES 2115 100n 2169 100n RES 2114 1n0 RES 2113 D I103 GNDSND 7101 2N7002 I102 1 220R 3103 G 1K0 3104 2 100p 2128 3 6102 BAV99 2129 22u 35V 6101 PDZ33-B F123 D 220u +VTUN 34V RES 2112 1-1735446-1 F +12VS_1 GNDTUN VIA1 VIA2 I110 220R 1% 1K0 1% 3173 11 2K2 VIA F SENSE+1V0_MT5392 3172 10p RES 1K5 2161 10 +1V0_SW 3171 7103-2 ST1S10PH 10u 2164 2159 100u 6.3V SS34 10R 3131 3125 I135 15 4u7 2160 10R 3130 SS34 6123 10u 2162 100u 6.3V 10p 2158 RES 2163 1K8 1% 18K 1% RES 3107 3138 GND_HS 4 6124 GND I134 22u 9 22u 2u0 3 2105 8 F134 2104 A 4 SW 5101 2103 VFB GND P HS I109 220u 25V VIN SYNC 7 22u INH 10u 10u 2108 10p RES 5 4K7 1% 6 22u 33R I130 16 17 2 10K 1% RES +3V3_SW 10u I108 5108 +12VS A F133 5116 2106 ILIM2 SEQ BP I129 10u 2107 9 10 11 I132 BOOT2 SW2 EN2 FB2 3136 1R0 I128 2101 I131 BOOT1 SW1 EN1 FB1 2153 33n I127 13 12 6 8 2102 470p 10p 2156 F RES 2154 3140 I 100K 1% 10u PVDD2 Φ 2155 2 3 5 7 7103-1 1 ST1S10PH 14 PVDD1 I126 3122 2152 33n I125 E 470p 3135 1R0 I124 2168 10u 4n7 3199 7117 TPS54386PWP 1 5117 F132 +5V_SW 2157 H 2123 10u 2100 BZX384-C6V2 SW RES 2150 100u 16V 6100 E J G G 1X05 REF EMC HOLE 2132 10u 2133 10u 16 17 2165 33n I118 3134 1R0 I119 +1V2_SW 10p RES 2166 3139 I120 220R 1% 10u GND_HS H F131 5115 1X01 REF EMC HOLE 1X02 REF EMC HOLE 1X07 REF EMC HOLE 10p RES 2142 390R 1% 2140 100u 6.3V 3119 I123 15 10u VIA1 VIA2 I117 13 12 6 8 2144 BOOT2 SW2 EN2 FB2 4u7 4 2141 PVDD2 ILIM2 SEQ BP GND 10R Φ 6122 BOOT1 SW1 EN1 FB1 SS34 470p 2138 3109 6103 SS34 10u 2137 2136 6.3V 10p RES 2135 9 I122 10 11 I136 100u M M 1K2 1% 2 3 5 7 33n 10p RES 2134 1K5 1% I104 3106 PVDD1 I107 2167 10u 3105 I106 3108 1R0 2139 I105 470p 5104 F125 +1V8_SW Oval screw hole of 5mm x 4.02mm Round screw hole of 4.02mm 7116 14 TPS54386PWP 1 10R H I 1X08 REF EMC HOLE 10u 2131 100u 16V L 1X03 REF EMC HOLE 1X12 REF EMC HOLE +12VS_1 F124 5103 +12VS 3129 K 1X06 REF EMC HOLE I Round screw hole of 4.5mm N 1 2 3 4 5 6 7 8 9 10 11 20 19 1M99 1M99 PIN ON 1 12V 5 3V 6 >1.5V 7 1.5V 9 3V A B 18 17 16 100p B 15 14 100p 1 A 5 4 2124 2 2116 1 6101 D1 6102 D2 6103 I2 6122 I5 6123 F2 6124 F5 7100 B2 7101 D3 7103-1 E10 7103-2 F10 7116 H4 7117 E4 F100 C11 F101 C11 F102 C11 F103 C11 F104 C11 F105 C11 F106 C11 F107 C11 F108 C11 F109 C11 F110 C11 F111 A11 F112 A11 F113 A11 F114 A11 F115 A11 F116 A11 F117 A11 F118 A11 F119 A11 F120 B11 F122 B3 F123 D1 F124 G3 F125 H1 F126 A11 F131 H6 F132 F1 F133 F7 F134 F11 I100 C3 I102 D3 I103 D2 I104 I1 I105 H2 I106 H3 I107 H3 I108 E9 I109 E10 I110 F11 I111 B2 I117 H4 I118 H5 I119 H5 I120 H5 I122 I3 I123 I5 I124 F2 I125 E3 I126 E3 I127 E4 I128 E5 I129 E5 I130 F5 I131 F1 I132 F3 I134 F3 I135 F5 I136 I3 1M95 C10 1M99 A10 1X01 I10 1X02 I10 1X03 G11 1X05 G9 1X06 G9 1X07 I11 1X08 G12 1X12 G10 2100 F11 2101 F12 2102 F12 2103 F12 2104 F13 2105 F13 2106 F8 2107 F9 2108 F9 2109 B11 2110 C11 2111 C12 2112 D11 2113 D11 2114 D11 2115 D12 2116 B11 2118 B11 2119 B11 2120 B12 2121 B12 2122 B12 2123 E5 2124 B11 2125 B2 2127 B3 2128 D2 2129 D2 2131 H3 2132 H3 2133 H3 2134 H1 2135 I1 2136 I1 2137 I2 2138 I3 2139 I4 2140 I6 2141 I3 2142 I7 2144 I6 2150 E4 2152 E3 2153 E5 2154 F1 2155 F7 2156 F3 2157 F5 2158 F2 2159 F6 2160 F3 2161 F7 2162 F2 2163 F1 2164 F6 2165 H4 2166 H7 2167 H3 2168 E5 2169 D11 2171 B3 3100 C12 3101 A11 3102 A11 3103 D3 3104 D3 3105 H1 3106 I1 3107 F1 3108 H2 3109 I3 3119 I6 3122 F6 3125 F6 3129 I4 3130 F3 3131 F5 3134 H5 3135 E3 3136 E5 3138 F1 3139 H6 3140 F1 3171 F12 3172 F11 3173 F11 3199 F11 4100 A11 4101 A11 5100 B1 5101 F10 5102 D3 5103 G2 5104 H2 5107 C1 5108 F8 5115 H5 5116 F6 5117 F2 6100 E3 A B C D E F G H I J K L M N 13 12 O O CHN DC377215 SETNAME CLASS_NO 3PC332 P MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 2 3 -- -- -- 1 2008-11-21 2 2009-02-03 3 LC09M PCB SB SSB NAME Tee Chor Kimp SV 4 5 6 7 8 9 10 11 12 13 1 3 14 CHECK DATE 16 2009-03-05 1 2009-02-03 3139 123 6451 P 15 SUPERS. 15 15 2 2008-11-21 10 C 17 130 1 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18490_500_090402.eps 090402 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 66 SSB: Tuner & Analog demodulator 1 2 3 5 4 5 6 8 7 6 7 8 9 10 RES 5219 TUNER & ANALOG DEMODULATOR 11 RES 3215 I211 I210 30R RES 2253 11 12 12 13 14 14 13 15 15 17 16 18 16 19 20 RF_AGC_MON A 330K I212 +5V_IF RES 3217 A 10 9 A 100n A 4 3 330K 2 1 +5V_IF B S 2 Φ I215 A 3251 6 B1 GND C B Common Testpoints With LC09M Analog I216 5K6 F234 3214 39K 3 4 1 3213 8K2 7 B0 E +5VTUN 6210 4208 SAW FILTERS SDA 2200 100n 100n 100n 100n 5208 4n7 F257 2267 2266 2265 2261 33R 2259 100n 2212 F252 100n A258 A225 MT3 14 15 4211 120R 3228 10R 120R 3230 I226 TUNER_SDA I227 TUNER_SCL TUNER AGC VIF AGC 2K2 6211 E G +VTUN F 1K0 2263 10u H 3231 1213 I230 I231 330R 2228 22p +5VS 2229 4M0 I 2233 1n5 RC VCO DIGITAL VCO CONTROL 3234 1n0 I234 I232 G 2235 REF 15 220n 2232 470n I235 VPLL 19 2231 I233 VAGC 16 9 TAGC 14 TOP J F AFC 21 I228 3232 0V DEMODULATOR 7212 OFWK9352M 38M0 7211 BC847B RES H TDA9886/V3 RESERVED J AFC DETECTOR I213 5210 H +12VS VIF2 2V 2 VIF2 VIF1 2V 1 VIF1 SOUND TRAPS 4.5 to 6.5 Mhz VIF-PLL CVBS 17 F215 2V1 7213 BC847B 7210 L78M05CDT 23 SIF1 8 I238 DEEM 5 2236 F218 10n OUT 3 5211 H F219 4V9 +5VTUN 33R COM 2218 22u 2219 10n K F227 3254 MAD IN 2 2V AUDIO PROCESSING AND SWITCHES 1u0 SIF1 AUD SINGLE REFERENCE QSS MIXER INTERCARRIER MIXER AND AM-DEMODULATOR 2210 SIF2 1R0 24 3212 47R 1 I237 3235 K 2V I214 3211 47R 33R 1V5 SIF2 D GND 10R 3261 22n 1SS356 3221 RES 2225 15p 5214 2262 100n G E SIF1 SIF2 A212 IF_ATV 4207 F F214 3 A213 4 O1 5 O2 IGND IF1 5215 RES RES 4204 5213 NC3 2226 15p I 3223 1 I 2 4205 RES 3226 18K G 100R 2230 1212 F230 I222 22K A259 RF_AGC F217 SAW_SW VST 11 E 390n MT1 MT2 NC2 9 10 MT4 F D Note: DIA 1.2MM FT Test Keep spaceing 3.5mm VS 8 RES 2211 100n C 5212 K7280M 38M 10n 3222 2K2 NC1 7 GND RES 4206 F256 100n A211 3 I218 2221 10n 2258 6 VIF1 VIF2 15R F255 2260 33R A210 5 4 O1 O2 +5V_IF 4209 5207 L SCL 5 I ISWI 3219 6K8 RF OUT 4 M TU AS L 100n 2 3 H 100n H 2216 AGC +5V_IF PLL 13 MT MT 16 ANT_PWR B1 RF_AGC SCL SDA B2 VTU_TP NC IF_AGC DIF2 DIF1 AIF F201 F202 F203 F204 F205 F206 F207 F208 F209 F210 F211 A214 1 F251 2215 33R 1 2 3 4 5 6 7 8 9 10 11 12 14 TUNER 15 1201 TDTC-G321D E F250 4n7 5206 4210 D 1204 M F213 IF_ATV 1.2mm dia FT, with 2.5mm spacing 12 13 2214 1 2 F216 C F237 1211 BAS316 C D F236 RF_AGC 2213 22u B I261 F235 100n B 0R 8 3262 RES 7215 74LVC2G53DC 5 VCC CVBS_RF I239 3255 75R 2240 3236 47p 5217 F228 I243 10n 2245 2250 100R RES 3244 10u 3238 2241 10n 2242 22u 5K6 M +5VS 390p RES 4214 I247 3243 I248 5218 7214 BC847B F229 J +5V_IF 10u 2248 22u 18K 100R 3242 150R I250 22K 3245 2251 2249 10n N RES 3246 I252 SIF_OUT I +5VS +5V_SW 2243 I245 I251 N L 33R F260 I241 2V3 4 FMPLL 2V1 7 DGND 12 SIOMAD 1n0 1n0 2246 1R0 GND_CVBS_RF I249 3241 TUNER_SDA 2237 470n 22K TUNER_SCL J 6 3256 3240 2247 22K RES 3210 11 SCL I242 I244 10n M 10 SDA 3 OP1 +5VS 2244 I240 AFD 5216 22 OP2 NC 13 VP 20 +5VS NARROW-BAND FM-PLL DEMODULATOR I2 C-BUS TRANSCEIVER L 18 AGND I OUTPUT PORTS 220R 75R SIF AGC SUPPLY K 3247 I253 SIF_OUT_GND O 15p 2252 1R0 K O 1R0 CHN DC377215 SETNAME CLASS_NO 3PC332 P L MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 1 2 "200" ~ "299" 4 3 2 3 5 4 6 5 7 8 6 9 7 10 8 11 9 12 13 10 -- -- -- 1 2008-11-21 2 2009-02-03 3 NAME Evelyn/Lee Boon Hiong SV CHECK 14 11 LC09M PCB SB SSB 15 12 16 13 2009-03-05 2009-02-03 3139 123 6451 P 15 SUPERS. DATE 2 1 2008-11-21 10 C 17 13 0 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 14 2 19 15 20 L 1201 C2 1204 C6 1211 C14 1212 D14 1213 G6 2210 H13 2211 H14 2212 E4 2213 C8 2214 C3 2215 C4 2216 D3 2218 H15 2219 H16 2221 D12 2225 E7 2226 F7 2228 G6 2229 G7 2230 G4 2231 G5 2232 G5 2233 G8 2235 G10 2236 H9 2237 I9 2240 I10 2241 I15 2242 I14 2243 I9 2244 I4 2245 J9 2246 J6 2247 J6 2248 J14 2249 J15 2250 J6 2251 J6 2252 K7 2253 A8 2258 D4 2259 E3 2260 D4 2261 E3 2262 F8 2263 F9 2265 E3 2266 E3 2267 E3 2268 D4 3210 J5 3211 H13 3212 H14 3213 B9 3214 B9 3215 A8 3217 A9 3219 C13 3221 D12 3222 D12 3223 D11 3226 E11 3228 E7 3230 F7 3231 G6 3232 G4 3234 G9 3235 H9 3236 I9 3238 I9 3240 J7 3241 J6 3242 J10 3243 J7 3244 J6 3245 J8 3246 K6 3247 K6 3251 B8 3254 I10 3255 I10 3256 I10 3261 F9 3262 B8 4204 C13 4205 D13 4206 D13 4207 E6 4208 C8 4209 E6 4210 D4 4211 C13 4214 J8 5206 C3 5207 D3 5208 D4 5210 H13 5211 H15 5212 C14 5213 C11 5214 E7 5215 E7 5216 I13 5217 I13 5218 J13 5219 A7 6210 C8 6211 D13 7210 H14 7211 D12 7212 G4 7213 H9 7214 J8 7215 B8 A210 C14 A211 C14 A212 D14 A213 D14 A214 D3 A225 E3 A258 E5 A259 E5 F201 D3 F202 D3 F203 D3 F204 D3 F205 D3 F206 D3 F207 D3 F208 D3 F209 D3 F210 D3 F211 D3 F213 C2 F214 G5 F215 H9 F216 C11 F217 D11 F218 H14 F219 H16 F227 H10 F228 I15 F229 J15 F230 D13 F234 B16 F235 B16 F236 B16 F237 C16 F250 C5 F251 C5 F252 E5 F255 D5 F256 D5 F257 D5 F260 I10 I210 A9 I211 A8 I212 A8 I213 H13 I214 H14 I215 B8 I216 B9 I218 D13 I222 D11 I226 E8 I227 E8 I228 G5 I230 G7 I231 G6 I232 G7 I233 G5 I234 G8 I235 G5 I237 H10 I238 H9 I239 I9 I240 I9 I241 I13 I242 I6 I243 I9 I244 I6 I245 I8 I247 J7 I248 J10 I249 J6 I250 J8 I251 J7 I252 K5 I253 K5 I261 B16 16 18490_501_090402.eps 090402 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 67 SSB: Class-D & Muting 2 1 1 4 3 2 3 A 6 5 4 5 6 7 7 9 8 8 9 10 11 10 11 12 12 13 13 14 15 14 16 15 17 16 18 19 20 A CLASS-D & MUTING A B A B RES AOUTL B I510 3500 B +3V3_SW DATAI 6 9 DEEM PCS 14 VOL I515 100n D RES 3559 I516 VOR 16 TO INDIA SUBWOOFER AOUTR 2 470R F580 AOUTL F548 2530 2531 3537 2536 10K 2567 3540 2540 10n BAS316 39K 100n RES 7518 2SD2653K 2545 100n GNDSND MUTE STANDBYn 7504 BSS84 AOUTR RES 2559 22R NC 31 11 -8V2 I588 18 4V7 I589 5 3V2 F536 6 -2V6 F593 13 GNDSND IN1N OUT2 DIAG IN2N HVP1 INREF HVP2 BOOT1 BOOT2 OSCIO STAB1 STAB2 HVPREF DREF ENGAGE VIA POWERUP TEST CGND VSSA VSSP 3565 I527 VSSD|HW 2528 1n0 I571 27 2554 EMC F547 4 2V6 2532 1n0 25 24 2541 I586 2544 2546 15n 5508 220R 100n 2542 34 35 36 37 38 39 40 41 I583 220n 3542 10R GNDSND GNDSND GNDSND 1n0 F543 F544 F546 1 2 3 4 GNDSND 2543 I585 3541 I 22R 220n GNDSND I590 2547 1n0 100K I595 7511 BC857BW I596 3549 F550 J DC_PROT 3550 7513 BC857BW 7508 BC847BW GNDSND 100K GNDSND GNDSND K GNDSND 47K 4n7 3511 10K 3553 GNDSND 7515-1 BC857BS 6 L 3516 L I523 J 3525 3526 4K7 2513 POWER_DOWN I544 3527 4K7 1u0 I543 3V3 M J I535 7505 2SD2653K 1K0 7506 BC857BW HP_LOUT 47K 4n7 RES 2512 +3V3STBY 3524 F525 M MUTING CIRCUIT N I546 0V BAT54C 6503 F535 K I554 3528 I552 MUTE 7507 BC847BW 10K O K O 3529 22K CHN F538 MUTEn DC377215 SETNAME CLASS_NO 3PC332 P MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 1 2 2 -- -- -- 1 2008-11-21 2 2009-02-03 3 LC09M PCB SB SSB NAME Roger Poon & Jason Ong 3 4 3 5 4 I 7503 2SD2653K 1K0 N GNDSND HP_ROUT 1 RES 2510 I599 F524 2 H F539 3552 47K G DC-DETECTION K L F H 440054-4 GNDSND I LEFT + LEFTRIGHT+ RIGHT - TO SPEAKERS GNDSND 5505 I584 22u 15n 1735 F542 220R 2537 470n I582 I587 470u 25V 2534 1n0 19 28 8V9 21 3V9 2555 GNDSND I576 GNDSND 30 470u 25V 5507 SPEAKER_LEFT+ SPEAKER_LEFTSPEAKER_RIGHT+ SPEAKER_RIGHT- GNDSND 22 2552 1n0 GNDSND 7519 2SD2653K 1K0 1n0 I570 OUT1 IN2P OSCREF G GNDSND 2524 470n GNDSND VDDP Φ CLASS D POWER AMPLIFIER IN1P RES 2521 RES 2520 100n 3531 GNDSND 10K 3523 2565 I530 H 100n SW_MUTE 2549 2550 1 RES 2569 J 47u 25V 3 47K 2 4n7 1R0 3564 RES 3520 100K F579 100n I526 1K0 RES 3519 RES 3521 3563 6502 100K I562 12K GNDSND +3V3STBY OFF_MUTE I575 I566 220n 3548 I 1u0 2539 2 -2V8 3 -2V8 15 RES 2533 -2V8 220p 14 -2V8 I580 12 -7V6 I581 10 I573 1u0 1u0 I577 I578 3538 RES 47K 4n7 3562 AOUTR RES 2568 10K 3561 47K 3 I572 2519 VDDA RES 2529 220p 12K 220n 3532 10R 1n0 1n0 1n0 1n0 10K 2 7102 BC857BW 1 I559 10K 3534 9 47K BAT54C G F569 1u0 7 6500 3 RES 3517 2527 470n 5 3535 3536 F545 3560 I525 4 BC857BS 7501-2 I522 56K 2511 1K8 3533 10K 470u 16V 4K7 F541 GNDSND 7510 TDA8932BTW 2 I560 3513 E RES 2561 RES 2562 RES 2563 RES 2564 2 RES 3515 I524 4K7 H 3514 RES 6501 BAS316 F AOUTL I521 I568 2518 I565 4u7 10n 5503 22u 4u7 3 2523 RES 2566 MUTE_C BC857BS 3512 D F 1736 1 2 3 2556 1 10K 4502 7516 BC857BW 1 3557 F523 7501-1 TO SUBWOOFER OUT GNDSND 100n 47K 2 7517 BC847BW 3 1K0 E 1735446-3 3556 2522 I598 VDD 29 20 10K 1K0 47K VDDA GND_HS 4 I519 3510 6 1 3555 3566 I518 VDD 2516 220u 35V 5 3554 F522 F540 1 16 17 32 E GNDSND I564 30R 5502 +24VAUDIO MUTE_M 33 I597 3 8 +12VS AUDIO_LS_L 470R 26 23 F +12VS 24V 2515 100n 7515-2 BC857BS 1502 1 MTJ-032-21B-43 NI FE LF 100n 47u 16V 2509 2508 3509 +5V_SW VDDA AUDIO_LS_R 470R G 24V 1n0 I563 1n0 3502 10R 100K 5 3530 RES 2560 VREF-DAC 3544 VSSD 15 VSSA 12 3508 3507 D C NOISE SHAPER 470R E 47u 16V 2501 2500 7 2553 1R0 1R0 RES 3558 MUTE 10 +3V3_SW INTERPOLATION FILTER DAC 8 I513 SFOR1 SYSCLK I512 D 11 DAC F518 AOMCLK 3501 1R0 DE-EMPHASIS C C I511 SFOR0 100K 3 VDDD DIGITAL INTERFACE 100n BCK WS 2502 F516 AOSDATA0 1 2 47u 16V 2503 F515 AOLRCK 4 VDDA F512 AOBCK C 13 1R0 7500 UDA1334BTS 6 5 7 8 6 9 7 10 11 9 8 "500 - 599" 14 13 12 10 11 CHECK SV 15 12 16 13 2009-03-05 2009-02-03 3139 123 6451 P SUPERS. DATE 2 1 10 15 2008-11-21 C 17 130 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 14 3 19 15 20 L 1502 C16 1735 E16 1736 D16 2500 A5 2501 A5 2502 B5 2503 B5 2508 C4 2509 C4 2510 H5 2511 E3 2512 I5 2513 I3 2515 C13 2516 D13 2518 D13 2519 D14 2520 D15 2521 D15 2522 E10 2523 E10 2524 E13 2527 E8 2528 E12 2529 E9 2530 E8 2531 E8 2532 E11 2533 E9 2534 E12 2536 F8 2537 F13 2539 F8 2540 F8 2541 F11 2542 F13 2543 F14 2544 F11 2545 F8 2546 F11 2547 F12 2549 G9 2550 G8 2552 G12 2553 G15 2554 E13 2555 E14 2556 G15 2559 C15 2560 C16 2561 F15 2562 F16 2563 F16 2564 F16 2565 G4 2566 E7 2567 F7 2568 F5 2569 G5 3500 A5 3501 B5 3502 C5 3507 C2 3508 C2 3509 D5 3510 E3 3511 H6 3512 E2 3513 E3 3514 E1 3515 E1 3516 H5 3517 F1 3519 F2 3520 F3 3521 F2 3523 G4 3524 I6 3525 I5 3526 I3 3527 I3 3528 J5 3529 J5 3530 C12 3531 D14 3532 E12 3533 E8 3534 E8 3535 E8 3536 E8 3537 E8 3538 F8 3540 F8 3541 F14 3542 F12 3544 G15 3548 G16 3549 G15 3550 G15 3552 H4 3553 H4 3554 D5 3555 D5 3556 D6 3557 E6 3558 C3 3559 C5 3560 E5 3561 F5 3562 F6 3563 F5 3564 G6 3565 G5 3566 D5 4502 E4 5502 D12 5503 D12 5505 F12 5507 E15 5508 E15 6500 E4 6501 E1 6502 F3 6503 J4 7102 F5 7500 A4 7501-1 E2 7501-2 E2 7503 H6 7504 F4 7505 I6 7506 I4 7507 J5 7508 G16 7510 E10 7511 F15 7513 G16 7515-1 H5 7515-2 D5 7516 D6 7517 E4 7518 F6 7519 G6 F512 B3 F515 B3 F516 B3 F518 B3 F522 E2 F523 E4 F524 H6 F525 I6 F535 J6 F536 F9 F538 K3 F539 H13 F540 D12 F541 E7 F542 E16 F543 E16 F544 E16 F545 E7 F546 E16 F547 E11 F548 F7 F550 G16 F569 E9 F579 E9 F580 D6 F593 G9 I510 A5 I511 B5 I512 B2 I513 C2 I515 C3 I516 C5 I518 D2 I519 D3 I521 E2 I522 E2 I523 H5 I524 E1 I525 E4 I526 F5 I527 G5 I530 G3 I535 I5 I543 I3 I544 I3 I546 J4 I552 J5 I554 J5 I559 F4 I560 E3 I562 F2 I563 C13 I564 D13 I565 D13 I566 D14 I568 E8 I570 E12 I571 E11 I572 E8 I573 E9 I575 E9 I576 E12 I577 E8 I578 E8 I580 F9 I581 F9 I582 F11 I583 F13 I584 F12 I585 F14 I586 F11 I587 F11 I588 F9 I589 F9 I590 F12 I595 G12 I596 G15 I597 D5 I598 D6 I599 H4 16 18490_502_090402.eps 090402 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 68 SSB: MTK Power 1 2 3 1 A 4 2 3 5 4 6 5 7 6 8 9 8 7 10 9 10 11 11 12 12 13 MTK POWER A A A +1V0_SW 2632 2633 2634 2627 2628 2629 2630 2631 2622 2623 2624 2625 2626 2619 2620 2621 2614 2615 2616 2617 2618 2612 2613 2610 2611 2609 2608 26A1 2687 5606 +3V3STBY 2688 100n 30R I618 1u0 F 100n 1u0 H 5607 2689 2690 2691 100n +3V3STBY 30R I623 5608 +3V3STBY 2692 30R +8V_SW I636 30R I637 ADAC1 AVDD80 ADAC2 AG20 1u0 2694 100n 2695 4u7 2693 5609 DVDD12_VGA ADAC1 ADAC2 DVSS12_VGA BC847BW 3602 10K 100R 100R 100R 100R 100R LCD_CLK_SCL LED2 3615 3609 100R 100R 7605-1 BC847BS POWER_DOWN 1 2 2 3 3 4 4 10K 10K 5 5 2604 2605 2606 100n 100n 100n 100n 2636 2637 2638 100n 100n 100n 4u7 2602 2603 100n 2600 2601 100n 100n 2635 100n 2699 AH11 AG10 AH10 CHN 5602 30R 4u7 2667 100n 2666 100n 2665 2664 100n 100n 100n 2663 2661 2662 100n 100n PM_DEMOD OPWRSB 0 1 2 3 4 OPCTRL 5 6 7 8 0 1 OPWR_5V 2 CLK DATA IF_AGC CLK VALID TS0 SYNC DATA TUNER TUNER_SCL TUNER_SDA L29 L28 K28 B30 A30 C30 C29 DVSS "600 - 699" 7 6 6 7 LC09M PCB SB SSB 1 2 2009-02-03 3 NAME Hwang Zhen SV C C D E D F E G F H G SETNAME 3PC332 -- -- -- B I DC377215 2008-11-21 B T12 T13 T14 T15 T16 T17 U10 U12 U13 U14 U15 U16 U17 U18 V10 V12 V13 V14 V15 V16 V17 W12 W13 W14 W15 W16 W17 Y10 Y12 Y13 Y14 Y15 Y16 Y17 Y18 AA4 AA11 AA13 AA16 AA17 AA18 AB16 U21 U22 U23 U24 V20 V21 V22 V23 V24 W20 W21 W22 W23 W24 Y6 Y20 Y21 Y22 Y23 Y24 T21 T23 T24 M10 DVSS CLASS_NO MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 I614 AH14 AJ12 AF11 AG12 AG11 AF13 AF12 AG13 AH12 AH13 4601 4602 4603 ARX-5V BRX-5V CRX-5V 220n J 1K0 2698 3624 4 I616 I617 AF20 3618 RES 3619 1 5 1K0 BZX384-C8V2 6 I629 2 I630 3623 100R 4K7 1u0 100n 2697 F615 +12VS 2607 3610 3611 3612 3613 3614 3617 6601 3622 15K F616 3621 26A0 Φ 3608 6600 1K0 30R 7701-4 MT5391 RES FOR ITV BZX384-C3V3 I +3V3_SW +3V3_SW STANDBYn HDMI_CEC DTV_IRQ LED1 MUTEn SW_MUTE POWER_DOWN LCD_CLK_SDA +3V3STBY 7605-2 BC847BS 3 H AVSS80 L25 K25 5610 2696 G L26 K26 STANDBY 4K7 1u0 G +3V3STBY +3V3STBY 7602 3607 +3V3STBY 30R 4K7 5605 2668 F614 3606 I633 10K 2686 26A4 3604 1u0 100n +3V3STBY 10K 10K 5604 30R 3605 RES 3603 I632 RES FOR ITV 26A3 E +3V3_SW E8 G8 G25 H25 F9 AJ3 AH4 AG5 AF6 F26 VCC3IO 10K 2685 100n 4K7 4K7 F 4u7 R25 N25 P25 Y27 AD26 AC27 AC26 AB28 V26 AH8 K14 K15 K16 K17 K18 T26 AF16 AG26 AH26 Y29 Y28 AG8 AG7 AF23 AG22 Y30 3601 T25 N26 P26 Y26 AD27 AC28 AC29 AC30 U25 AH9 E18 E15 E24 E21 R26 AG16 AG27 AJ27 AA28 AA27 AH6 AH7 AG23 AG21 W28 30R N10 V11 E16 E23 U11 AB18 AF17 AG17 AF19 AG24 AB11 AH25 E20 U4 U3 U5 AB6 AB5 AC4 AD2 AD3 AE6 AF5 AG4 AB3 4K7 2680 100n 5603 DLL1 DLL1 AVSS12 DLL2 DLL2 AVDD12 LVDSA HDMI LVDSB LVDSA MEMPLL LVDSB PLLG MEMPLL RGBADC_1 PLLG RGBADC_2 RGBADC_1 RGBFE RGBADC_2 SYSPLL RGBFE USB SYSPLL VGAPLL USB VGAPLL VOPLL VOPLL AADC AVSS33 AADC ADAC1 AVDD33 ADAC1 ADAC2 APLL ADAC2 APLL CVBS1 CVBS1 CVBS2 CVBS2 CVBS3 CVBS3 DEMOD1 DEMOD1 DIG HDMI DIG HDMI LVDS_1 LVDSA LVDS_2 LVDSB LVDS_3 LVDSC LVDS_4 LVDSD LVDS_5 REF_AADC REF_AADC REG REG SRV SRV STB STB SYSPLL1 SYSPLL1 SYSPLL2 SYSPLL2 USB_1 USB_1 USB_2 USB_2 VDAC VDAC VDAC_BG VDAC_BG XTAL XTAL 3600 2679 100n 100n 100n 2678 100n 100n 2669 2670 I631 2684 100n 26A2 100n 2683 4u7 100n 100n 100n 2682 E 2681 D 100n 100n 100n POWER & GROUND N11 W10 AB12 E17 E22 T10 AB20 AF18 AG18 AG19 AH24 AB10 AJ25 E19 VCC2IO VCCK 100n Φ 3625 3626 2659 7701-14 MT5391 M4 N6 P6 T2 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 2658 2654 2657 4u7 2655 D 2656 F613 C1 D2 E3 V4 F4 G5 H6 L2 L3 2660 4u7 2652 2651 2650 2648 2649 2647 2646 2645 2644 2643 2641 2642 2640 2639 2677 100n 30R 5601 C 30R 2653 DIGITAL POWER A1 A2 B1 B2 C2 C3 D3 D4 D5 E4 E5 E6 F5 F6 G6 L11 L12 L15 M19 P19 P10 R11 M11 R18 V18 Y11 K13 AA12 AB15 AA10 AA14 AB13 5600 100n 100n Φ +1V2_SW +3V3_SW E1 T18 F11 G3 H2 H3 J4 J6 K5 R4 R5 R6 W18 N18 D27 E26 W11 AA15 AB14 K12 L18 AA3 AA5 AB17 AD6 AE5 AF4 AG2 AG3 L13 L14 L16 M12 M13 M14 M15 M16 M17 M18 N12 N13 N14 N15 N16 N17 P11 P12 P13 P14 P15 P16 P17 P18 R10 R12 R13 R14 R15 R16 R17 T11 L19 L17 N19 R19 T19 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 7701-12 MT5391 F612 C Φ DIGITAL GROUND +1V8_SW 4u7 2676 2675 7701-13 MT5391 100n 2673 2674 1u0 1u0 100n B 100n 2671 2672 B SENSE+1V0_MT5392 100n 26A5 100u 6.3V F611 DATE 8 15 2008-11-21 8 10 10 9 2009-02-03 J 130 4 A3 ROYAL PHILIPS ELECTRONICS N.V. 2008 C 9 2009-03-05 1 3139 123 6451 SUPERS. CHECK 2 11 10 12 11 13 H 2600 B8 2601 B8 2602 B8 2603 B8 2604 B9 2605 B9 2606 B9 2607 B9 2608 A3 2609 A3 2610 A3 2611 A3 2612 A3 2613 A3 2614 A3 2615 A4 2616 A4 2617 A4 2618 A4 2619 A4 2620 A4 2621 A4 2622 A4 2623 A4 2624 A4 2625 A5 2626 A5 2627 A5 2628 A5 2629 A5 2630 A5 2631 A5 2632 A5 2633 A5 2634 A5 2635 B8 2636 B8 2637 B8 2638 B8 2639 B2 2640 B2 2641 B2 2642 B3 2643 B3 2644 B3 2645 B3 2646 B3 2647 B4 2648 B4 2649 B4 2650 B4 2651 B4 2652 B4 2653 B5 2654 C1 2655 C2 2656 C2 2657 C2 2658 C2 2659 C2 2660 D8 2661 D8 2662 D8 2663 D8 2664 D8 2665 D9 2666 D9 2667 D9 2668 D9 2669 D2 2670 D2 2671 A1 2672 A1 2673 A2 2674 A2 2675 A2 2676 A2 2677 B2 2678 D2 2679 D2 2680 D2 2681 D1 2682 D1 2683 D2 2684 D2 2685 D2 2686 E2 2687 E2 2688 E2 2689 E2 2690 E2 2691 F2 2692 F2 2693 F1 2694 F2 2695 F2 2696 G2 2697 G2 2698 G2 2699 C8 26A0 C8 26A1 A3 26A2 D1 26A3 D1 26A4 E2 26A5 A2 3600 E5 3601 E6 3602 E6 3603 E6 3604 E6 3605 E6 3606 E9 3607 E9 3608 F7 3609 F7 3610 F7 3611 F7 3612 F7 3613 F7 3614 F7 3615 F7 3617 G6 3618 G6 3619 G6 3621 G4 3622 G3 3623 G2 3624 G2 3625 E6 3626 E6 4601 G7 4602 G7 4603 G7 5600 B5 5601 B1 5602 D9 5603 D2 5604 D2 5605 E2 5606 E2 5607 E2 5608 F2 5609 F2 5610 G2 6600 G4 6601 G2 7602 E5 7605-1 G4 7605-2 G3 7701-12 B6 7701-13 B11 7701-14 C4 7701-4 E8 F611 A2 F612 B4 F613 C2 F614 D9 F615 G2 F616 G4 I614 F7 I616 F7 I617 F7 I618 E2 I623 F2 I629 G3 I630 G3 I631 D2 I632 D2 I633 E2 I636 F2 I637 F3 12 18490_503_090402.eps 090402 2009-Apr-10 Circuit Diagrams and PWB Layouts SSB: GDDR3 1 2 3 1 4 2 3 10. 5 4 EN 69 6 5 7 6 8 9 8 7 9 10 1 0 10 12 11 11 13 12 12 B A B 100n 100n 2767 2768 2766 100n 2765 100n 2764 100n 100n 100n 2763 2762 100n 100n 2761 2760 100n 100n 2759 100n 2758 100n 2757 100n 2756 100n 2755 100n 2753 2754 2752 100n 100n 2751 100n 2780 2779 100n 100n 100n 2778 2777 2776 100n 100n 2774 100n 2775 100n 2773 100n 100n A 2772 100n 100n 2769 B 2771 GDDR3 A 2770 A LC9.1A LA B RES FOR EMC F710 +1V8_SW I RA(12) RESET MF SEN 0 1 2 3 ZQ D3 D10 P10 P3 A4 V5 N4 AG1 100n 2749 100n 100n 2729 100n 2739 100n 2738 100n 2737 100n 2736 100n 2735 100n 100n 2734 2732 100n 2731 1K0 1% 2k4 1% RES 3719 100n 3712 47K A1 A12 C1 C4 C9 C12 E1 E4 E9 E12 J4 J9 N1 N4 N9 N12 R1 R4 R9 R12 V1 V12 D_RVREF2 47K D_RVREF0 RRESET RDQS0 RDQS1 RDQS2 RDQS3 3718 A3 A10 G1 G12 J1 J12 L1 L12 V3 V10 VREF VSS VDD F E B1 B4 B9 B12 D1 D4 D9 D12 G2 G11 L2 L11 P1 P4 P9 P12 T1 T4 T9 T12 VSSQ VDDQ G F H I 3723 RFU CHN DC377215 SETNAME CLASS_NO 3PC332 J MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 3 2 2 3 4 4 5 5 "700 - 799" 7 6 6 7 LC09M PCB SB SSB 1 -- -- -- 1 G 270R 1% 2K2 H 2728 100n 2727 2726 100n 2725 100n 100n 2711 100n 2740 100n 2724 100n 2722 100n 2710 100n 2720 100n 100n 2719 2717 3710 100n 2741 2742 WDQS0 WDQS1 WDQS2 WDQS3 2k4 1% V9 A9 V4 J2 J3 RDQS J2 AB2 AC2 G2 I714 RES 3721 RRESET 0 1 2 3 4 5 6 7 8 9 10 11 AP RVREF RRESET REXTDN RDQS0 RDQS1 RDQS2 RDQS3 1K0 1% K4 H2 K3 M4 K9 H11 K10 L9 K11 M9 K2 L4 BA J3 AB1 AC3 G1 A2 A11 F1 F12 K1 K12 M1 M12 V2 V11 3715 RA(0) RA(1) RA(2) RA(3) RA(4) RA(5) RA(6) RA(7) RA(8) RA(9) RA(10) RA(11) 0 1 2 WDQS 0 1 2 3 RDQ RBA0 RBA1 RBA2 H1 H12 100n G4 G9 H10 WDQS RDQS 0 1 2 3 P3 W1 W3 Φ POWER +1V8_SW 2745 RBA0 RBA1 RBA2 0 1 2 3 0 1 2 D 7702-2 HYB18H512321BF-14 30R D2 D11 P11 P2 DM RBA +1V8_SW 100n 3714 WDQS0 WDQS1 WDQS2 WDQS3 0 1 2 3 RDQM0 RDQM1 RDQM2 RDQM3 0 1 2 3 5714 E3 E10 N10 N3 K4 AB4 AC5 H1 RDQM 2750 RDQM0 RDQM1 RDQM2 RDQM3 RAS CAS WE RWE 100n H3 F4 H9 CKE CS U1 RWE 47K RRAS RCAS RWE CK DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 30R H4 F9 B2 B3 C2 C3 E2 F3 F2 G3 B11 B10 C11 C10 E11 F10 F11 G10 M11 L10 N11 M10 R11 R10 T11 T10 M2 L3 N2 M3 R2 R3 T2 T3 E 5713 RCKE RCS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 DQ 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 D_RVREF1 1K0 2743 1% J11 J10 RRAS RCAS 3713 RCLK0p RCLK0n N2 P4 N5 NC RCKE RCS 100n RES 3720 H Φ MAIN RA 2k4 1% 2746 F 62R RRAS RCAS RCAS1 RCLK1 3716 G 62R RCLK0p RCLK0n RCKE RCS RCS1 M2 M3 AF2 AF3 N1 W2 T5 NC RCLK0 2K2 E 3711 DRAM_IF 3722 F 3724 7702-1 HYB18H512321BF-14 0 1 2 3 4 5 6 7 8 9 10 11 12 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 150R 1% +1V8_SW E P2 P5 P1 T4 V3 V1 U2 T3 V2 T1 N3 R2 R3 K1 L1 K2 K3 M6 M5 L4 L5 AA1 Y2 AA2 Y3 W4 W5 Y4 Y5 AD5 AA6 AE4 AD4 AD1 AE2 AE1 AE3 H5 J5 G4 H4 F2 E2 F3 D1 3717 RA(0) RA(1) RA(2) RA(3) RA(4) RA(5) RA(6) RA(7) RA(8) RA(9) RA(10) RA(11) RA(12) D 30R 5712 7701-5 MT5391 Φ G C +1V8_SW D D 100n 100n C 2716 2715 2714 100n 2713 100n 100n C 100u 6.3V 2712 2747 C 2008-11-21 2 2009-02-03 3 SV CHECK DATE 8 15 2008-11-21 8 10 10 9 J 130 5 H A3 ROYAL PHILIPS ELECTRONICS N.V. 2008 C 9 2009-03-05 2009-02-03 3139 123 6451 SUPERS. NAME Hwang Zhen 2 1 2710 B9 2711 B10 2712 B6 2713 B7 2714 B7 2715 B7 2716 B8 2717 B8 2719 B8 2720 B8 2722 B9 2724 B10 2725 B11 2726 B11 2727 B11 2728 B11 2729 B12 2731 C9 2732 C9 2734 C10 2735 C10 2736 C10 2737 C11 2738 C11 2739 C11 2740 B10 2741 C8 2742 D8 2743 E7 2745 F8 2746 F7 2747 B6 2749 B12 2750 E8 2751 A7 2752 A7 2753 A7 2754 A7 2755 A8 2756 A8 2757 A8 2758 A9 2759 A9 2760 A9 2761 A9 2762 A10 2763 A10 2764 A10 2765 A11 2766 A11 2767 A11 2768 A11 2769 A3 2770 A3 2771 A4 2772 A4 2773 A4 2774 A4 2775 A5 2776 A5 2777 A5 2778 A5 2779 A6 2780 A6 3710 C8 3711 D3 3712 D8 3713 E7 3714 E8 3715 F8 3716 F7 3717 F6 3718 F4 3719 D8 3720 F7 3721 F9 3722 F7 3723 G4 3724 D2 5712 C8 5713 D7 5714 D8 7701-5 C6 7702-1 C3 7702-2 D10 F710 B6 I714 E7 11 10 12 11 13 12 18490_504_090402.eps 090402 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 70 SSB: Flash & EJTAG 5 6 7 7 8 680R 1% 3825 100R I820 LIGHT_SENSOR 5813 3827 5814 3828 3835 5815 RES 30R 100R 30R 100R 100R 30R I821 I822 IR LED2 3874 100n 100n 10K 4800 2810 8 4K7 4 RES 3845 I838 I839 BOOST_CONTROL BACKLIGHT_CONTROL 1R0 1R0 BACKLIGHT_BOOST 1K0 7815 BC847BW 2 1u0 1 10K DRX-5V 1R0 F859 38A3 38A4 F864 I853 1 2 3 4 6 TRAP0 Normal mode ICE mode CPU model mode SCAN mode OLT Mode 5 4K7 TRAP1 PDWNC Normal PDWNC SCAN TRAP2 XTAL 27MHZ XTAL 60MHZ XTAL 48MHZ XTAL 54MHZ 4K7 3888 3889 +3V3STBY N K I850 3890 I849 1R0 3891 1R0 F853 F855 F856 1 2 3 4 6 1 2 4 3 5 4 6 5 7 8 2812 37 12 5 VOUT ER GND SUB 4u7 4u7 2835 2836 K 1 I843 L I I852 ONDA[ 2 ] 0 0 0 1 1 ONDA[ 1 ] 0 0 1 0 0 M ONDA[ 0 ] 0 1 0 0 1 J 6 7 OPCTRL8(0) 0 1 PALE(0) 0 0 1 1 PCLE(0) 0 1 0 1 OPWM2 (0) TRAP3 0 Serial Boot 0 OneNAND Boot NAND Boot 1 Large NAND Boot (1G bit) 1 OPWM1 (0) 0 1 0 1 TRAP4 NORMAL FT MODE TEST MODE OLT TEST MODE TN0 0 1 0 1 TP0 0 0 1 1 N K SETNAME CLASS_NO 3PC332 10 9 DC377215 LC09M PCB SB SSB 5 MULTI 12NC : 3139 123 64502 BD 12NC : 3139 123 64512 3 2811 3898 4 2827 100n BAS316 4K7 4K7 10K 3876 3877 O CHN B4B-PH-SM4-TBT(LF) 2 H 1812 P 1 BAS316 F843 ORESET B4B-PH-SM4-TBT(LF) L 100n +3V3_SW +3V3_SW 100n 10K 330R 3837 4K7 AK27 AF27 AE27 K6 L6 AB7 AC6 AF9 AG9 AF14 AG14 AJ26 AK26 AF8 6814 ORESET TN_0 TP_0 TN_1 TP_1 TN_2 TP_2 TN_HDMI TP_HDMI TN_VGA TP_VGA TN_PLLG TP_PLLG EVSS JTMS JTDI JTDO JTCK JTRST Φ 3861 C27 C26 A27 B27 D26 7820 BD45292G VDD 3 4820 1818 100R 100R J UART_TX J F849 SDA SCL UART_RX G 2 JTMS JTDI JTDO JTCK JTRST 4K7 4K7 1K0 6810 Φ MISC_JTAG +3V3_SW 389F 502382-1170 389D 1814 1811 JTDO 33R M O I 3856 3852-4 3852-3 3852-2 3852-1 3863 10K RES 3858 6811 12 7701-1 MT5391 JTRST JTDI JTMS JTCK MSJ-035-10A B AG PPO 6813 BZX384-C6V8 6812 UART (SERVICE) 1813 3 7 8 1 L 1 2 3 4 5 6 7 8 9 10 11 13 10K F848 1817 3871 3869 2u2 10K 33R 4K7 3873 UART_RX 5 4 2 F847 VSS +3V3STBY 3872 3868 I855 F H 3850 I841 BAS316 1K0 33R BZX384-C6V8 I I842 100R 3865 4K7 I834 CLE ALE CE RE WE WP R B G 10K 10K 10K 10K 10K RES 389C 7816 BC847BW 2826 +3V3STBY NAND_PARB 16 17 9 8 18 19 7 NC E +3V3_SW 1K0 3848 680R 3846 3847 PWM DIMMING I840 3859 I832 0 1 2 3 IO 4 5 6 7 +3V3_SW 4K7 F841 NAND_PCLE NAND_PALE NAND_POCE NAND_POOE NAND_POWE RES 3881 3882 3883 FOR DEBUGGING ONLY +3V3_SW PWM_DIMMING 4818 4819 NAND_POWE NAND_PALE NAND_PCLE NAND_PARB NAND_PDD(2) NAND_PDD(3) NAND_PDD(4) NAND_PDD(5) NAND_PDD(6) NAND_PDD(7) 512Mx8 29 30 31 32 41 42 43 44 F 1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 40 45 46 47 48 [FLASH] NAND_PDD(0) NAND_PDD(1) NAND_PDD(2) NAND_PDD(3) NAND_PDD(4) NAND_PDD(5) NAND_PDD(6) NAND_PDD(7) 1R0 3851 AK11 H MII-RXCLK MII-TXCLK E14 C12 B13 A3 C10 A11 C13 A10 C11 B12 7810 NAND512W3A2CN6 VCC Φ 3857 38A1 38A2 I835 POWE PALE PCLE PARB 2 3 4 PDD 5 6 7 SERIAL_POCE NAND_POCE NAND_POOE NAND_PDD(0) NAND_PDD(1) 4K7 4K7 4K7 4K7 22R RES 3879 38A9 4822 3841 3 3842 4802 4803 4804 4805 4806 4807 4808 4809 4810 4811 4812 4813 4814 4815 4816 4817 E10 B10 B9 B11 A13 36 4 2823 3840 1K0 I833 MII-MDIO MII-MDC MII-MDINT MII-RX-ER MII-CRS MII-RX-DV MII-RXD(0) MII-RXD(1) MII-RXD(2) MII-RXD(3) MII-TXD(0) MII-TXD(1) MII-TXD(2) MII-TXD(3) MII-TXEN MII-COL 2824 AJ11 K27 C5 SDA SCL AMBI_SDA AMBI_SCL DDC-SDA DDC-SCL I827 0 POCE 1 POOE 0 PDD 1 0 1 2 3 4 5 6 ONDA 7 8 9 10 11 12 13 8 9 10 11 ONDD 12 13 14 15 ONDOE 0 ONDCE 1 13 SDA 10p 1 2 3 0 1 2 ADR A5 C7 B7 D8 B5 B6 A8 B8 C9 C8 A7 F10 A4 B4 D13 F13 D11 E11 F12 E12 E13 D10 C4 C6 B3 Φ FLASH_IF 4K7 SCL 5 22R 10p 4K7 EEPROM 4K7 F835 F836 F837 I825 +3V3_SW 3834 7701-2 MT5391 3880 (8Kx8) WC 6 2822 0 1 2 J30 J29 K30 K29 AJ10 AK10 220R RES 3899 7 F860 I829 3839 D I819 100n Φ 22R 3838 RES 3878 OSDA0 OSCL0 OSDA1 OSCL1 OSDA2 OSCL2 OIRI UART_TX +3V3_SW +3V3_SW 4K7 4K7 7812 M24C64-RDW 33R 7814 BC847BW RC2 4K7 3894 3864 4K7 3822 10K 7 389A 389B 3830 3831 1R0 38A6 3829 F826 F829 +3V3_SW K F814 3 389J 4K7 3893 J D 1 +3V3_SW 10K 10K 2813 F825 3826 10K RC1 +3V3_SW OPWM C 6 C E 4K7 4K7 47p F861 U0RX U0TX U2RX U2TX U2CTS U2RTS 5 D +3V3_SW 7701-3 MT5391 3 Φ 16M FLASH 5812 30R +3V3_SW +3V3_SW AJ13 AK13 H26 G26 H27 G27 Q 5811 +3V3_SW Φ 100R 100R 100R F862 2 VSS 2837 3823 38A8 3884 3885 VCC F811 1R0 +3V3_SW 10K 10K RES 38A5 1n0 1n0 1n0 1n0 1n0 1n0 1n0 2815 2816 2817 2818 2819 2820 2821 I G UART_RX UART_TX BOLT_ON_UART_RXD BOLT_ON_UART_TXD +3V3_FLASH C W +3V3_SW SPIO_UART_IIC 3821 NAND_PDD(0) 4K7 CLK CMD 0 SDIO 1 D 2 B 389G 7822 M25P16 HOLD G F8 D7 F7 E9 D6 E7 B F812 +3V3_FLASH LAN-RST F832 4102 F810 30R HP_DET SAW_SW PBS_I2C_SCL BL_ON_OFF F831 LVDS_SELECT PBS_SPI_DO 20 +3V3_SW +3V3_FLASH +3V3_SW I814 100R 1R0 PBS_SPI_CLK PBS_SPI_DI 19 5810 I810 10K +5V_SW 38A7 4K7 18 4K7 1R0 RES 389L SERIAL_POOE SERIAL_POCE LCD_PWR_ON LED1 KEYBOARD E H 16 +3V3STBY I823 I824 F F 15 17 F813 +3V3STBY RES FRONT CONTROL RES 389K 14 16 SERIAL_PDD1 3820 1R0 S 3824 1735446-8 3816 1R0 I816 EDID_WC 3866 F819 15 I811 NAND_POOE 3818 F820 F821 F822 F823 F824 F827 F828 14 13 A 3813 F865 F867 HP_DETECT SYS_EEPROM_WE 3832 3833 E 13 12 4K7 AK2 AJ1 AJ2 G30 H28 A28 B28 A29 B29 D30 D28 E28 H29 14 15 16 17 18 19 GPIO 20 21 22 23 24 25 26 1M20 D 4K7 389H 0 1 2 3 4 5 6 GPIO 7 8 9 10 11 12 13 I812 I813 SPDIF_IN 1 2 3 4 5 6 7 8 12 NAND_PDD(1) 2833 Φ GPIO AH5 AG6 AF7 AH2 G29 F868 AH1 E29 F29 F30 F28 G28 D29 E27 AH3 100R 100R AOMCLK AOLRCK AOBCK AOSDATA0 D 11 11 +3V3_SW SDM RES 3812 3814 PANEL 10K 10K 3892 10K 3810 3811 DC_PROT USB_PWE USB_OC DDC_RESET 7701-8 MT5391 HDMI_RESET C 10 10 +3V3_SW +3V3_SW C 9 +3V3_SW B B 9 A FLASH & EJTAG A 8 RES 3897 A 4 6 100n 3 5 4K7 2 4 8 1 3 389I 2 2834 1 8 11 9 "800 - 899" 13 14 12 10 11 -- -- -- 1 2008-11-21 2 2009-02-03 3 NAME Hwang Zhen 15 12 DATE 16 13 2009-03-05 2009-02-03 3139 123 6451 P SUPERS. CHECK 2 1 130 15 2008-11-21 C 17 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 19 18 14 6 15 20 L 1811 I4 1812 K8 1813 H5 1814 I4 1817 H7 1818 I10 1M20 C1 2810 B11 2811 D15 2812 D15 2813 D7 2815 D2 2816 D2 2817 D2 2818 D2 2819 D2 2820 D2 2821 D2 2822 E6 2823 E6 2824 F8 2826 G6 2827 H14 2833 B7 2834 B7 2835 H15 2836 H16 2837 G5 3810 B2 3811 B2 3812 B3 3813 B7 3814 B3 3816 A12 3818 B7 3820 B12 3821 C10 3822 C13 3823 F2 3824 C3 3825 C3 3826 D6 3827 D3 3828 D3 3829 D6 3830 D5 3831 D5 3832 D5 3833 D5 3834 D14 3835 D3 3837 E14 3838 E5 3839 E5 3840 F8 3841 F8 3842 F7 3845 G7 3846 G4 3847 G5 3848 G5 3850 G7 3851 G9 3852-1 G10 3852-2 G9 3852-3 G9 3852-4 G9 3856 G10 3857 H14 3858 H6 3859 H4 3861 H15 3863 H10 3864 H2 3865 H2 3866 C5 3868 H3 3869 I3 3871 I8 3872 I8 3873 I8 3874 C5 3876 H14 3877 H14 3878 F6 3879 F6 3880 D10 3881 G11 3882 G11 3883 G11 3884 G2 3885 G2 3888 J8 3889 J8 3890 K7 3891 K7 3892 B3 3893 G2 3894 G2 3897 C13 3898 E14 3899 F14 389A G14 389B G14 389C G6 389D I9 389F I10 389G B13 389H A7 389I A7 389J D7 389K E2 389L F2 38A1 G4 38A2 G4 38A3 I9 38A4 J9 38A5 D4 38A6 D4 38A7 E4 38A8 G2 38A9 F5 4102 F2 4800 C5 4802 E10 4803 E10 4804 E10 4805 E10 4806 E10 4807 E10 4808 E10 4809 E10 4810 F10 4811 F10 4812 F10 4813 F10 4814 F10 4815 F10 4816 F10 4817 F10 4818 F10 4819 F10 4820 H11 4822 F4 5810 B11 5811 D14 5812 D7 5813 D3 5814 D3 5815 D3 6810 H14 6811 H6 6812 I3 6813 I3 6814 H16 7701-1 H12 7701-2 D12 7701-3 F3 7701-8 B4 7810 D16 7812 D7 7814 E6 7815 F8 7816 G6 7820 H15 7822 B12 F810 A13 F811 C11 F812 B13 F813 B13 F814 C13 F819 C2 F820 C2 F821 D2 F822 D2 F823 D2 F824 D2 F825 D7 F826 D6 F827 D2 F828 D2 F829 E5 F831 E5 F832 E5 F835 F4 F836 F4 F837 F4 F841 H4 F843 H14 F847 H4 F848 H4 F849 I4 F853 K8 F855 K8 F856 K8 F859 I10 F860 E6 F861 G2 F862 G2 F864 J10 F865 B5 F867 B5 F868 B3 I810 B11 I811 A10 I812 B3 I813 B3 I814 B7 I816 B10 I819 D15 I820 C3 I821 D3 I822 D3 I823 D3 I824 D3 I825 E11 I827 E11 I829 E6 I832 F14 I833 F8 I834 F14 I835 F7 I838 G7 I839 G7 I840 G6 I841 G6 I842 H5 I843 H15 I849 K2 I850 K2 I852 I13 I853 J10 I855 F14 16 18490_505_090402.eps 090402 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 71 SSB: Display interface - LVDS 1 2 1 3 2 A 5 4 3 5 4 6 7 6 7 8 8 9 9 10 10 11 11 12 12 14 13 14 15 15 16 16 18 17 17 19 20 A DISPLAY INTERFACE - LVDS A LVDS B 7701-6 MT5391 G B F984 F985 LVDS_A_TXeCLKp_1 LVDS_A_TXeCLKn_1 F986 F987 F988 F989 F990 F991 LVDS_A_TXe2p_1 LVDS_A_TXe2n_1 LVDS_A_TXe1p_1 LVDS_A_TXe1n_1 LVDS_A_TXe0p_1 LVDS_A_TXe0n_1 1n0 +VDISP C RES 4910 RES 4911 RES 4912 8 3 7 2 6 1 5 I911 3913 I910 5910 30R 5911 30R 5912 30R 7910 SI4835BDY 47K 6913 BZX384-C6V8 2916 3915 I913 47R 1u0 3914 I912 47K I914 C +VDISP FOR DEV. USE ONLY 1901 1902 1905 1906 LVDS_A_TXe4p_1 LVDS_A_TXe4n_1 LVDS_A_TXe3p_1 LVDS_A_TXe3n_1 RES 2919 E 10n LVDS_SELECT 1907 F 1908 LVDS_A_TXe2p LVDS_A_TXe2n LVDS_A_TXe1p LVDS_A_TXe1n LVDS_A_TXe0p LVDS_A_TXe0n 1909 LVDS_A_TXeCLKp LVDS_A_TXeCLKn RES 2920 F980 F981 F982 F983 RES 2917 LVDS_A_TXe4p LVDS_A_TXe4n LVDS_A_TXe3p LVDS_A_TXe3n LVDS_A_TXo2p_1 LVDS_A_TXo2n_1 LVDS_A_TXo1p_1 LVDS_A_TXo1n_1 LVDS_A_TXo0p_1 LVDS_A_TXo0n_1 F974 F975 F976 F977 F978 F979 1903 DLW21S LVDS_A_TXo2p LVDS_A_TXo2n LVDS_A_TXo1p LVDS_A_TXo1n LVDS_A_TXo0p LVDS_A_TXo0n LVDS_A_TXoCLKp_1 LVDS_A_TXoCLKn_1 F972 F973 1904 DLW21S DLW21S LVDS_A_TXoCLKp LVDS_A_TXoCLKn F969 F970 F971 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 44 46 48 50 4 LVDS_A_TXo4p_1 LVDS_A_TXo4n_1 LVDS_A_TXo3p_1 LVDS_A_TXo3n_1 F968 LVDS_A_TXo4p LVDS_A_TXo4n LVDS_A_TXo3p LVDS_A_TXo3n 100n LVDS_B_TXo0p LVDS_B_TXo0n LVDS_B_TXo1p LVDS_B_TXo1n LVDS_B_TXo2p LVDS_B_TXo2n LVDS_B_TXo3p LVDS_B_TXo3n LVDS_B_TXo4p LVDS_B_TXo4n LVDS_B_TXoCLKp LVDS_B_TXoCLKn LVDS_B_TXe0p LVDS_B_TXe0n LVDS_B_TXe1p LVDS_B_TXe1n LVDS_B_TXe2p LVDS_B_TXe2n LVDS_B_TXe3p LVDS_B_TXe3n LVDS_B_TXe4p LVDS_B_TXe4n LVDS_B_TXeCLKp LVDS_B_TXeCLKn DLW21S C20 D20 C21 D21 C22 D22 C24 D24 C25 D25 C23 D23 A21 B21 A22 B22 A23 B23 A25 B25 A26 B26 A24 B24 DLW21S E 0P 0N 1P 1N 2P 2N BO 3P 3N 4P 4N CKP CKN 0P 0N 1P 1N 2P 2N BE 3P 3N 4P 4N CKP CKN DLW21S D LVDS DLW21S C 0P 0N 1P 1N 2P 2N AO 3P 3N 4P 4N CKP CKN 0P 0N 1P 1N 2P 2N AE 3P 3N 4P 4N CKP CKN TP_VPLL TN_VPLL DLW21S C C14 D14 C15 D15 C16 D16 C18 D18 C19 D19 C17 D17 A14 B14 A15 B15 A16 B16 A18 B18 A19 B19 A17 B17 A20 B20 B +12VDISP 1G50 DLW21S LVDS_A_TXo0p LVDS_A_TXo0n LVDS_A_TXo1p LVDS_A_TXo1n LVDS_A_TXo2p LVDS_A_TXo2n LVDS_A_TXo3p LVDS_A_TXo3n LVDS_A_TXo4p LVDS_A_TXo4n LVDS_A_TXoCLKp LVDS_A_TXoCLKn LVDS_A_TXe0p LVDS_A_TXe0n LVDS_A_TXe1p LVDS_A_TXe1n LVDS_A_TXe2p LVDS_A_TXe2n LVDS_A_TXe3p LVDS_A_TXe3n LVDS_A_TXe4p LVDS_A_TXe4n LVDS_A_TXeCLKp LVDS_A_TXeCLKn +5V_SW LVDS#2 Φ RES 4913 RES 4914 RES 4915 B 4916 4917 4918 A D 13 3912 1K0 D I915 6912 SML-310 F966 7911 PDTC114ET E LCD_PWR_ON D F 43 45 47 49 51 E LVDS CONNECTOR ITEM # 50HZ 100HZ 1G50 YES NO 1G51 YES YES F992 G 1910 1911 F H # RESERVED FOR DISPLAY I2C CONTROL 1912 DLW21S H DLW21S F DLW21S FX15SC-41S-0.5SH LVDS#1 F993 6914 1G51 BZX384-C6V8 F994 6915 I BZX384-C6V8 G LVSD3_SDA_DISP LVDS3_SCL_DISP LVDS_SELECT J DLW21S DLW21S 1924 1925 DLW21S DLW21S LVDS_B_TXe0n LVDS_B_TXe0p LVDS_B_TXe1n LVDS_B_TXe1p DLW21S LVDS_B_TXe3n LVDS_B_TXe3p DLW21S LVDS_B_TXe4n LVDS_B_TXe4p 10n F923 F924 F925 F926 F927 LVDS_B_TXe0n_1 LVDS_B_TXo0p_1 LVDS_B_TXo1n_1 LVDS_B_TXo1p_1 LVDS_B_TXo2n_1 LVDS_B_TXo2p_1 F928 F929 LVDS_B_TXeCLKn_1 LVDS_B_TXeCLKp_1 F930 F931 F932 F933 LVDS_B_TXe3n_1 LVDS_B_TXe3p_1 LVDS_B_TXe4n_1 LVDS_B_TXe4p_1 F922 100u 16V 100n DLW21S G J H K L I M J N FI-RE51S-HF 2904 DLW21S DLW21S 1929 1930 1931 I 7 6 5 4 3 2 1 F934 +VDISP N 2903 J 1927 LVDS_B_TXeCLKn LVDS_B_TXeCLKp 1928 LVDS_B_TXe2n LVDS_B_TXe2p M LVDS_B_TXo3n_1 LVDS_B_TXo3p_1 LVDS_B_TXo4n_1 LVDS_B_TXo4p_1 RES 2921 LVDS_B_TXo4n LVDS_B_TXo4p L F918 F919 F920 F921 F916 F917 LVDS_B_TXoCLKn LVDS_B_TXoCLKp LVDS_B_TXo3n LVDS_B_TXo3p LVDS_A_TXoCLKn_1 LVDS_B_TXoCLKp_1 DLW21S LVDS_B_TXo2n LVDS_B_TXo2p K 1922 LVDS_B_TXo1n LVDS_B_TXo1p LVDS_B_TXo0n_1 LVDS_B_TXe0p_1 LVDS_B_TXo1n_1 LVDS_B_TXo1p_1 LVDS_B_TXo2n_1 LVDS_B_TXo2p_1 F910 F911 F912 F913 F914 F915 1923 LVDS_B_TXo0n LVDS_B_TXo0p owner. is prohibited without the written consent of the copyright 10p RES 10p RES 22R 22R NC NC 1926 I All rights reserved. Reproduction in whole or in parts H 2901 2902 3916 3917 SDA SCL 61 59 57 55 53 60 58 56 54 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 1901 B8 1902 B8 1903 C8 1904 C8 1905 C8 1906 D8 1907 D8 1908 D8 1909 E8 1910 E8 1911 E8 1912 F8 1922 H8 1923 H8 1924 I8 1925 I8 1926 I8 1927 J8 1928 J8 1929 J8 1930 K8 1931 K8 1932 K8 1933 L8 1G50 B11 1G51 F12 2901 G10 2902 G10 2903 K11 2904 K11 2916 C13 2917 D11 2919 E11 2920 C10 2921 I10 3912 C15 3913 C13 3914 C14 3915 C13 3916 G10 3917 G10 4910 B14 4911 B14 4912 B14 4913 B12 4914 B12 4915 B12 4916 B13 4917 B13 4918 B13 5910 B14 5911 B14 5912 C14 6912 C15 6913 C13 6914 F10 6915 G10 7701-6 A3 7910 C14 7911 C15 F910 H10 F911 H10 F912 H10 F913 H10 F914 H10 F915 H10 F916 H10 F917 H10 F918 H10 F919 H10 F920 I10 F921 I10 F922 I10 F923 I10 F924 I10 F925 I10 F926 I10 F927 I10 F928 I10 F929 I10 F930 J10 F931 J10 F932 J10 F933 J10 F934 J11 F966 C16 F968 B9 F969 B9 F970 B9 F971 B9 F972 B9 F973 B9 F974 B9 F975 B9 F976 C9 F977 C9 F978 C9 F979 C9 F980 C9 F981 C9 F982 C9 F983 C9 F984 C9 F985 C9 F986 C9 F987 D9 F988 D9 F989 D9 F990 D9 F991 D9 F992 E12 F993 F10 F994 G10 I910 B14 I911 B13 I912 C14 I913 C13 I914 C13 I915 C15 K K O O CHN DC377215 SETNAME 1932 DLW21S CLASS_NO 1933 MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 L 1 1 2 2 3 3 DLW21S P 3PC332 -- -- -- 1 2008-11-21 2 2009-02-03 3 NAME Kyaw Aung Aung SV 4 5 4 7 6 5 6 8 7 9 10 8 11 9 LC09M PCB SB SSB 12 10 13 11 14 12 DATE 15 13 10 130 17 7 A2 L ROYAL PHILIPS ELECTRONICS N.V. 2008 C 14 2009-02-03 P 15 2008-11-21 16 2009-03-05 1 3139 123 6451 SUPERS. CHECK 2 18 15 19 16 20 17 18490_506_090403.eps 090403 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 72 SSB: Ambilight 1 2 3 4 5 6 8 7 9 10 11 12 13 AMBILIGHT A A B B 1 2 3 4 5 6 A A TO DRIVE AMBILIGHT DRIVERS +3V3_SW 1R0 3A13 1R0 4K7 RES 3A12 1M59 AMBI_SCL_OUT 100R 3A16 B AMBI_SDA FA20 3A15 AMBI_SDA_OUT I2S_SEL1 I2S_SEL2 100R 3A17 1R0 1 2 3 4 5 6 7 B 33p D E 1735446-7 2A14 2A13 1R0 33p RES 3A19 1R0 2A12 33p 3A18 2A11 +3V3_SW 33p 120R 30R 5A10 RES 5A16 E FA17 FA18 FA19 FA13 FA14 FA16 FA15 1R0 C 1n0 RES 3A14 4K7 120R AMBI_SCL 3A11 D 3A10 5A14 2A10 All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright owner. C 1M59 B6 2A10 B3 2A11 B3 2A12 B3 2A13 B4 2A14 C6 3A10 B3 3A11 B3 3A12 B3 3A13 B4 3A14 B2 3A15 B5 3A16 B2 3A17 B5 3A18 B3 3A19 B4 5A10 B5 5A14 B2 5A16 B2 FA13 B6 FA14 B6 FA15 B6 FA16 B6 FA17 B6 FA18 B6 FA19 B6 FA20 B1 C C F F 2 1 4 3 6 5 G G H H I I CHN DC377215 SETNAME CLASS_NO 3PC332 J MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 2 3 4 5 6 "A00 - A99" 7 -- -- -- 1 2008-11-21 2 2009-02-03 3 LC09M PCB SB SSB NAME Fong King Hou SV 8 DATE 9 2009-03-05 2009-02-03 J 3139 123 6451 SUPERS. CHECK 2 1 15 2008-11-21 10 C 10 130 8 A3 ROYAL PHILIPS ELECTRONICS N.V. 2008 11 12 13 18490_507_090403.eps 090403 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 73 SSB: HDMI & MUX 1 2 1 3 2 4 3 4 5 5 6 6 7 7 8 8 9 9 10 11 10 11 12 12 13 14 13 15 15 14 16 17 16 18 19 20 A A A A HDMI & MUX 1B02 4B17-2 DC1R019WBER220 FB57 1B03 L 21 23 1 4B01-1 8 4 4B02-4 5 3 4B02-3 6 2 4B02-2 7 1 4B02-1 8 4B37 4B38 4B39 FB44 DC1R019JBAR190 M 21 23 25 26 CRX2CRX1+ CRX1CRX0+ CRX0CRXC+ CRXCCEC CRX-DDC-CLK CRX-DDC-DAT FB40 FB42 FB45 1n0 3B61 3K3 3K3 3B35 3B34 1K0 ADR SDA CRX-5V CRX-HPD DC1R019WBER220 IB1149 IB1239 ARXCARXC+ ARX0ARX0+ ARX1ARX1+ ARX2ARX2+ 13 14 16 17 19 20 22 23 BRXCBRXC+ BRX0BRX0+ BRX1BRX1+ BRX2BRX2+ 1 2 4 5 7 8 10 11 CRXCCRXC+ CRX0CRX0+ CRX1CRX1+ CRX2CRX2+ 50 51 53 54 56 57 59 60 DRXCDRXC+ DRX0DRX0+ DRX1DRX1+ DRX2DRX2+ 37 38 41 42 44 45 47 48 J EDID 0 SEL 1 A SCL I2C SDA 0 I2C_ADDR 1 + + + + + + + + + + + + 10K 3B73 10K 3B72 1u0 470n 2B17 2B11 H 2K2 3B43 RESETB + + + + F 3B37 7B04 BC847BW DDC_SCL DDC_SDA B DDC_SCL DDC_SDA C DDC_SCL DDC_SDA CLK DATA0 ENABLE SCL SDA D IN_A DATA1 COM DATA2 DDC_SCL DDC_SDA DDC_SCL DDC_SDA OUT_CLK CLK DATA0 + OUT_DATA0 + OUT_DATA1 + OUT_DATA2 + IN_B DATA1 DATA2 CLK DATA0 IN_C HPD DATA1 DATA2 PSV CLK DATA0 A B C D A B C D TX_EN IN_D DATA1 AMUXVCC DATA2 3B46 47K 47K 3B47 ARX-DDC-CLK ARX-DDC-DAT 75 76 47K 3B50 47K 3B51 3B52 47K 3B53 CRX-DDC-CLK CRX-DDC-DAT 3B54 47K 3B55 69 70 DRX-DDC-CLK DRX-DDC-DAT 67 68 IB03 DDC-SCL IB02 DDC-SDA 35 34 RXCRXC+ 32 31 RX0RX0+ 29 28 RX1RX1+ 26 25 3B56 6 3 58 55 IB01 DDC-SDA DDC-SCL AK6 AJ6 AK7 AJ7 AK8 AJ8 AK9 AJ9 RXC+ RXCRX0+ RX0RX1+ RX1RX2+ RX2- Φ HDMI_XTAL_LDO C CB 0 0B RX0 1 1B 2 2B IB14 3B58 64 1K0 3B59 W29 W30 J27 XTALI XTALO VCXO LDO STB_SCAN VOUT12_STB ACT_SCAN VOUT12_ACT SCAN_MAIN VOUT10 AE26 AF26 W26 W27 AG15 AF15 IB04 H K XTALO FB51 L FB52 ARX-5V BRX-5V CRX-5V DRX-5V IB16 XTALI J ARX-HPD BRX-HPD CRX-HPD DRX-HPD 80 79 78 77 24 2K2 7701-7 MT5391 RX2RX2+ 1K0 10K G DDC_RESET DRX-DDC-CLK 1K0 3B57 3B65 FB10 3B49 7B06 BC847BW CRX-DDC-CLK 71 72 47K I 100R BRX-DDC-CLK BRX-DDC-DAT 47K 2K2 3B48 ARX-DDC-CLK BRX-DDC-CLK 73 74 3B44 7B09 BC847BW I 1K0 +1V2_SW +5V_COMBINED M +3V3_SW J 21 30 46 AVEE 100R 3B22 10K 10K 3B36 100R +5V_COMBINED 1B10 IB0912 IB1015 1 2 3 3B19 10K 10K 0 1 2 820K CRX2+ FB37 FB38 SCL 2K2 9 18 33 43 52 2K0 6K8 RES 3B40 K 1B07 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 24 5 G 3B33 7B03 BC847BW 10n All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright owner. HDMI CONNECTOR 2 4 4B01-4 5 6 100R (256x8) EEPROM 63 61 62 1u0 3B66 3B67 27 40 J 3 4B01-3 6 2 4B01-2 7 FB08 FB09 WC Φ 2B51 36 3B32 Φ 7 AVCC IN CEC OUT 6B07 2B50 100R 3B63 3B64 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 10n 2B26 3B10 3B45 SCL SDA 1B06 100n 2B25 2B24 66 65 BAT54 I 1R0 1R0 RES 3B68 RES 3B69 I RES FOR FLECS RES 4 6K8 7B05 ADV3002BST 1R0 3B70 H +5V_COMBINED 10K DC1R019JBAR190 HDMI_RESET CEC HDMI_CEC G E RES 6K8 3B76 3B11 RES FOR FLECS F 3B75 RES 21 23 3B38 H +5V_COMBINED VDDO_3V3 2K0 F +5V_COMBINED RES 3B39 4B35 4B36 7B07 BC847BW 10K 7B02 M24C02-WMN6 8 +3V3STBY +5V_COMBINED 3K3 8 4B04-1 1 4B34 RES 6 4B04-3 3 7 4B04-2 2 G D +5V_COMBINED EDID_SCL EDID_SDA 6B06 8 4B03-1 1 5 4B04-4 4 FB07 3B62 EDID_WC VDDO_3V3 BAT54 E 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 27K 6 4B03-3 3 7 4B03-2 2 3B71 5 4B03-4 4 RES 3B41 F E +5V_COMBINED FI-RE21S-HF-R1500 27p 4B17-1 BRX2+ ARX-5V ARX-HPD DC1R019JBAR190 DC1R019WBER220 2B29 BRX-5V BRX-HPD DRX-5V DRX-HPD D FB30 FB31 FB33 27M0 BRX2- FB27 23 25 27 29 31 C 27p 4B17-3 21 23 FB32 ARXCCEC ARX-DDC-CLK ARX-DDC-DAT FB28 FB29 2B48 BRX1+ FB23 FB24 FB21 FB22 FB26 C ARX0ARXC+ 4K7 BRX-DDC-CLK BRX-DDC-DAT FB18 FB20 21 23 25 26 FB25 DRX-DDC-CLK DRX-DDC-DAT 30R 30R 4B17-4 CEC FB17 FB19 VDDO_3V3 +3V3_SW ARX1ARX0+ 3B24 4B16-1 BRX1- DRXCNC FB11 5B01 5B07 BRX0+ DRX0DRXC+ ARX2ARX1+ 2K2 BRXCCEC FB16 DRX1DRX0+ ARX2+ 2K2 3B20 BRX0BRXC+ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 DRX2DRX1+ 4B40 4B16-2 2 3 DLW21S 4B16-3 BRX0- 2 3 DLW21S 1 1B11 4 BRXC+ 2 3 DLW21S BRX1BRX0+ DRX2+ 10K 21 23 25 26 BRX2BRX1+ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 24 3B60 E D BRXC- BRX2+ 3 2 DLW21S D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22 24 1 1B14 4 C CEC 1 1B12 4 1B04 1 1B13 4 HDMI CONNECTOR 3 C B 1B05 220u 25V 1B01 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 24 26 28 30 4B11-4 4B11-3 4B11-2 4B11-1 4B18 4B16-4 BRX-HPD BRX-5V BRX-DDC-DAT BRX-DDC-CLK B HDMI CONNECTOR SIDE HDMI CONNECTOR 1 2B16 HDMI-DTV 33R B B N HDMI SIDE HDMI 1 HDMI 2 CONNECTOR HORIZONTAL HORIZONTAL HORIZONTAL ITEM NO 1H03 1H05 1H04 HDMI 1 HDMI 2 HDMI 3 VERTICAL VERTICAL VERTICAL 1H01 1H00 1H02 Y Y N Y N N Y Y Y N N N N +5V_SW 1B08 N N N K O 15 P L FB47 For DTV only HDMI PNS 1+1 HDMI PNS 2+1 HDMI FRAME 3+1 HDMI FLECS 2+0 32"_42" HDMI FLECS 2+0 22" Y Y Y Y N N N N Y Y N Y Y N N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 DTV_IRQ BOLT_ON_UART_RXD BOLT_ON_UART_TXD FB53 FB54 FB55 FB56 FB48 4B28 SPDIF_IN FB06 FB05 4B29 4B30 DTV_L_IN DTV_R_IN FB49 K O CVBS_IN_DTV CHN CLASS_NO 3PC332 501331-1409 MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 1 2 -- -- -- 1 2008-11-21 2 2009-02-03 3 LC09M PCB SB SSB NAME Fong King Hou 3 2 SETNAME DC377215 4 3 5 4 6 5 7 8 6 9 7 10 8 11 9 "B00 - B99" 13 14 12 10 11 SV 15 12 DATE 16 13 2009-03-05 2009-02-03 3139 123 6451 P 15 SUPERS. CHECK 2 1 2008-11-21 10 C 17 130 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 14 9 19 15 20 L 1B01 B6 1B02 B9 1B03 D6 1B04 B1 1B05 B11 1B06 H2 1B07 H3 1B08 J6 1B10 H16 1B11 B5 1B12 C5 1B13 C5 1B14 D5 2B11 B15 2B16 B14 2B17 B14 2B24 E9 2B25 E9 2B26 E10 2B29 G16 2B48 H16 2B50 J10 2B51 J10 3B10 F10 3B11 F7 3B19 F13 3B20 F13 3B22 H16 3B24 I15 3B32 E14 3B33 E15 3B34 E10 3B35 E10 3B36 F14 3B37 F15 3B38 F7 3B39 F7 3B40 F7 3B41 F7 3B43 F14 3B44 F15 3B45 F8 3B46 G10 3B47 G10 3B48 G14 3B49 G15 3B50 G10 3B51 G11 3B52 G11 3B53 G11 3B54 G11 3B55 G11 3B56 I10 3B57 I10 3B58 I10 3B59 I11 3B60 D12 3B61 E12 3B62 D10 3B63 G8 3B64 G8 3B65 I10 3B66 G8 3B67 G8 3B68 F8 3B69 F8 3B70 F6 3B71 F7 3B72 F10 3B73 F10 3B75 E12 3B76 F9 4B01-1 H2 4B01-2 H2 4B01-3 H2 4B01-4 H2 4B02-1 I2 4B02-2 I2 4B02-3 I2 4B02-4 H2 4B03-1 E5 4B03-2 E5 4B03-3 E5 4B03-4 D5 4B04-1 E5 4B04-2 E5 4B04-3 E5 4B04-4 E5 4B11-1 B3 4B11-2 B3 4B11-3 B3 4B11-4 B3 4B16-1 C3 4B16-2 C3 4B16-3 C3 4B16-4 B3 4B17-1 D3 4B17-2 D3 4B17-3 C3 4B17-4 C3 4B18 B3 4B28 K7 4B29 K7 4B30 K7 4B34 E5 4B35 E5 4B36 E5 4B37 I2 4B38 I2 4B39 I2 4B40 D12 5B01 B15 5B07 I15 6B06 F7 6B07 J10 7701-7 H14 7B02 E12 7B03 E14 7B04 F14 7B05 F9 7B06 G14 7B07 D11 7B09 F14 FB05 K7 FB06 K7 FB07 D11 FB08 E11 FB09 F11 FB10 G15 FB11 B15 FB16 C2 FB17 C9 FB18 C2 FB19 C9 FB20 C2 FB21 C9 FB22 C9 FB23 D2 FB24 D2 FB25 C8 FB26 C9 FB27 D2 FB28 C12 FB29 C12 FB30 C12 FB31 C12 FB32 C11 FB33 C12 FB37 I4 FB38 I4 FB40 I4 FB42 I4 FB44 I3 FB45 I3 FB47 J9 FB48 K7 FB49 K7 FB51 H15 FB52 I15 FB53 J7 FB54 J7 FB55 J7 FB56 K7 FB57 D11 IB01 G15 IB02 H12 IB03 H12 IB04 H15 IB09 G8 IB10 G8 IB11 G8 IB12 G8 IB14 I12 IB16 I12 16 18490_508_090406.eps 090406 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 74 SSB: Digital I/O - Ethernet (provisional) 1 2 A 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A DIGITAL I/O - ETHERNET (PROVISIONAL) B B 1 C 2 4 3 5NA1 5 6 7 8 9 +3V3AN FNAD +3V3_SW 820K 25M 3NB3 49R9 9NA2 49R9 3NAE 27p RJ45 FNA4 TPOP TPOM TPIP 27p 2NAF 10n 10n 2NA9 10n 2NA8 2NA7 2NA6 30R 100u 16V 3NAD 10n +3V3DN FNAE 1NA2 +3V3_SW A +3V3AN 2NAE 5NA2 E 10n 2NA5 10n 2NA4 10n 2NA3 2NA1 2NA2 30R A 100u 16V D B FNA6 FNA8 TPIM 11 FNAF LAN-RST 28 64 63 MII-TXD(0) MII-TXD(1) MII-TXD(2) MII-TXD(3) H 3NA3 INAR D 1K0 3NAM RES 3NAN 1K0 1K0 3NAP RES 3NAQ 1K0 1K0 +3V3DN 3NAR RES 3NAT 1K0 1K0 +3V3DN RES 3NAU 3NAV 1K0 1K0 +3V3DN 3NAW RES 3NAY +3V3DN J K F +3V3DN 100R 19 18 MII-MDC MII-MDIO MII-MDINT 42 41 61 1K0 1K0 3NB1 RES 3NB2 1K0 1K0 5 4 3 2 1 6 INAZ 9NA3 27 39 45 62 9 13 16 17 22 COL CRS RESET IREF 0 CFG 1 RIP 0 1 2 TXD 3 4 TX_ER 0 1 2 3 4 RX_ER RXD TX_EN TX_CLK RX_CLK RX_DV P RX N TX P N R10 TR LED L C S C IO MD INT 0 1 2 MF 3 4 TEST TEST_SE FDE NC PWRDWN GNDE 59 60 YELLOW 11 13 100n 100n 2NAD FNAB B FNAA FNAC 14 1840419-1 GNDLAN GNDLAN GNDLAN C MII-CRS 3NA5 15 29 GNDLAN GNDLAN MII-COL GREEN 9 12 INAS GNDLAN 4K99 1% NC 47 46 44 43 51 MII-RXD(0) MII-RXD(1) MII-RXD(2) MII-RXD(3) MII-RX-ER 49 48 MII-RXCLK MII-RX-DV TPOP 21 23 D TPOM INAY INAT INAU INAV INAW 38 37 36 35 34 3NA6 3NA7 3NA9 3NAB 3NAC 1K5 270R 270R 1K5 1K5 RJLED_G RJLED_Y 3NA8 3NAA 1K5 1K5 +3V3DN 26 33 E 8 30 31 32 NC GNDLAN GNDA 25 40 50 E RES 3NAL 1K0 +3V3DN 3NA4 TPIM 1K0 GNDLAN VCCA ETHERNET TRANSCEIVER X2 4K7 I RES 3NAJ 3NB5 +3V3DN INAP INAQ 3NAK 4K7 3NAH 54 53 MII-TXEN MII-TXCLK TPIP 3NB4 +3V3DN 1K0 is prohibited without the written consent of the copyright owner. 1K0 55 56 57 58 52 Φ VCCE X1 10 7 10 14 20 24 C G 12 10K 3NA2 7NA1 E-STE100P 10p 2NAC +3V3AN GNDLAN +3V3DN 10p 2NAB +3V3DN 1u0 2NAA F 1NA1 1 2 3 4 FNA7 5 6 FNA9 7 NC 8 FNA5 5NA3 All rights reserved. Reproduction in whole or in parts 10 GNDLAN F +3V3DN +3V3DN L 1 2 3 4 5 7 6 8 9 1NA1 B10 1NA2 B5 2NA1 A2 2NA2 A2 2NA3 A3 2NA4 A3 2NA5 A3 2NA6 B2 2NA7 B2 2NA8 B3 2NA9 B3 2NAA B8 2NAB B8 2NAC B8 2NAD B9 2NAE A5 2NAF B5 3NA2 C3 3NA3 D4 3NA4 D4 3NA5 C6 3NA6 D6 3NA7 D6 3NA8 D7 3NA9 E6 3NAA E7 3NAB E6 3NAC E6 3NAD A8 3NAE A8 3NAH D1 3NAJ D2 3NAK E1 3NAL E2 3NAM E1 3NAN E2 3NAP E1 3NAQ E2 3NAR E1 3NAT E2 3NAU F1 3NAV F2 3NAW F1 3NAY F2 3NB1 F1 3NB2 F2 3NB3 B5 3NB4 F3 3NB5 F3 5NA1 A2 5NA2 B2 5NA3 B3 7NA1 C5 9NA2 A8 9NA3 E4 FNA4 B9 FNA5 B9 FNA6 B9 FNA7 B9 FNA8 B9 FNA9 B9 FNAA B10 FNAB B10 FNAC B10 FNAD A3 FNAE B3 FNAF C3 INAP D1 INAQ D1 INAR D4 INAS C7 INAT D6 INAU E6 INAV E6 INAW E6 INAY D6 INAZ E4 C D E F G H I J K L 10 M M N N O O CHN DC377215 SETNAME CLASS_NO 3PC332 P MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 2 3 " XNA0 ~ XNBZ " 4 5 6 7 8 9 10 11 12 13 14 -- -- -- 1 2008-11-21 2 2009-02-03 3 LC09M PCB SB SSB NAME Hwang Zhen SV CHECK DATE 16 2009-03-05 1 2009-02-03 3139 123 6451 P SUPERS. 15 2 15 2008-11-21 10 C 17 130 10 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18490_509_090406.eps 090406 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 75 SSB: Analog I/O - YPbPr 1 2 3 4 5 6 7 8 10 9 11 12 13 14 15 16 18 17 19 20 ANALOG I/O - YPbPr A B 1D01 D13 1D03 F13 1D04 C13 1D08 D12 1D11 F1 1D13 F1 1D14 B1 1D15 B2 C 1D25-1 E13 1D25-2 E13 1D25-3 F13 2D10 A6 2D11 B6 2D12 B11 2D13 C3 2D14 B4 1D17 G1 1D18 C2 1D19 G13 1D20 D2 1D21 D2 1D22 E12 1D23 D2 1D24 D12 2D25 D4 2D27 D13 2D28 C12 2D29 D4 2D30 C6 2D31 B11 2D33 F2 2D34 F10 2D15 B6 2D16 B12 2D17 B6 2D18 B12 2D19 B12 2D20 C4 2D21 C6 2D22 C4 2D35 F10 2D37 G2 2D38 F2 2D39 G2 2D40 D3 2D41 D3 2D46 G8 2D47 G8 2 1 A 3 2D64 F8 2D65 G4 2D66 G4 2D67 A11 2D68 F7 2D69 G7 2D70 D12 2D71 D11 2D56 E10 2D57 F11 2D58 F10 2D59 F11 2D60 C11 2D61 E7 2D62 E8 2D63 F7 2D48 E9 2D49 F9 2D50 B3 2D51 C3 2D52 C4 2D53 D4 2D54 F3 2D55 G3 2D72 E11 2D73 E11 2D74 E12 3D10 A5 3D11 B4 3D12 B5 3D13 B3 3D14 B5 5 4 3D32 G2 3D33 D4 3D34 D4 3D35 E4 3D36 E4 3D41 G8 3D42 G8 3D43 E10 3D23 D11 3D24 D11 3D25 F12 3D26 F10 3D27 F12 3D28 C12 3D29 B11 3D30 F2 3D15 B4 3D16 B5 3D17 C3 3D18 C4 3D19 C5 3D20 C3 3D21 C4 3D22 C5 6 3D44 F10 3D45 F3 3D46 G3 3D47 E11 3D48 F11 3D49 F10 3D50 D8 3D51 E9 7 3D52 B4 3D53 B11 3D54 A11 3D55 E11 3D56 E11 3D57 B4 3D58 B4 3D59 C4 8 6D22 E12 7701-11 F6 7D10-1 E12 7D10-2 F12 7D11 E8 FD12 D11 FD13 B4 FD14 B1 6D11 F13 6D12 B2 6D13 G1 6D14 C2 6D15 G13 6D16 D2 6D17 D2 6D18 D2 4D00 D12 5D00 C13 5D01 B2 5D02 B2 5D03 C2 5D05 E11 6D09 D12 6D10 F1 9 11 10 B ID32 F12 ID34 F2 ID35 F3 ID36 F3 ID37 F9 ID38 F10 ID42 G3 ID43 F12 ID14 E11 ID22 C4 ID25 D4 ID26 D4 ID28 D4 ID29 D4 ID30 E9 ID31 E10 FD24 E13 FD25 F1 FD26 F12 FD27 G1 FD28 E13 FD29 F13 ID12 C13 ID13 C13 FD15 B1 FD17 B1 FD18 B4 FD19 B1 FD20 C1 FD21 C3 FD22 C1 FD23 D12 C 12 13 D D A Near IC MT5391 3D10 2D10 Φ AVI 1R0 4n7 RU / AP E SPBR1N SPBR1N 3D19 2D21 100R 10n PBR1N SPR1P 2D30 68R 10n CVBS2 CVBS3 CVBS4 GND_CVBS_RF 2D16 10n 10n 2D28 6D09 3D23 100R 3D24 100R 15p 47p 6D22 1R0 30K 30K ID42 DTV_R_IN DTV_L_IN N 1 2 3 4 220u 6.3V 2D47 220u 6.3V 3D41 3D42 33R 33R PESD5V0S1BA 1D03 1n0 1n0 47K RES 2D56 RES 2D34 6 1R0 FD29 7D10-2 BC847BS 1n0 RES 2D59 10u AUDIO_LS_R AUDIO_LS_L HP_ROUT HP_LOUT ID43 3D27 3 5 1K0 F 1D25-3 FD26 3D48 470R 1n0 10u 2D46 ID38 3D44 4n7 3D49 10u 2D69 ID37 RES 2D35 2D68 6D11 10u 2D64 100n 2D63 2D49 R_MON_OUT L_MON_OUT K 4 L 5 MSP-303H-BBB-432-03 NI RED MUTE_M G M 10u 2D66 100n 2D65 1n0 SAV_R_IN SAV_L_IN P28 P29 N29 N30 N28 N27 M29 M30 M27 M28 1 R_MON_OUT MSP-303H-BBB-432-03 NI WHITE PESD5V0S1BA 1D19 30K ADAC_VCM VCMCOUPLE 0OUTR 0OUTL 1OUTR PGA 1OUTL 2OUTR 2OUTL HPOUTR HPOUTL 2 1K0 J E 3 6 ID32 3D25 1D25-1 1 6D15 3D46 10u 0_R 0_L 1_R 1_L 2_R 2_L 3_R AIN 3_L 4_R 4_L 5_R 5_L 6_R 6_L VMID_AADC 2 MSP-303H-BBB-432-03 NI YELLOW 4 1D25-2 FD24 7D10-1 BC847BS 1R0 47K RES 2D58 2D55 1R0 V27 V28 V29 V30 U28 U29 U26 U27 T29 T30 R29 R30 T28 R28 T27 FD28 3D47 470R 4n7 3D26 3D36 3D35 AIN0_R AIN0_L AIN1_R AIN1_L AV3_R_IN AV3_L_IN DVI_AUR_IN DVI_AUL_IN 1n0 3D32 1n0 6D13 RES 2D37 PESD5V0S1BA 1D17 FD27 G RES 2D38 1n0 6D10 1D11 30K 10u RES 2D39 L 1R0 RES 2D33 1 3 2 1D13 YKB21-5157V PESD5V0S1BA F Φ ALI_ADAC ID36 ID31 3D43 RES 2D57 ID30 10u 33p 3D55 PESD5V0S1BA 1D22 ID14 1u8 2D74 5D05 DACOUT2 I MTJ-032-21B-43 NI FE LF 2D27 33p 10K 3D56 10u OFF_MUTE D SPDIF 1 SC2_CVBS_OUT 3D51 7D11 BC847BW CON_JACK 1D01 2 1D24 2D71 3D50 7701-11 MT5391 3D45 H GND FD23 2D73 1n0 RES MUTE_M ID35 VS ID12 ID29 K 2D54 1D04 1734806-2 ID13 PESD5V0S1BA 1D08 100R FD12 180R ID34 100n C +3V3_SW IN ID26 2D48 3D30 G 5D00 3D28 L_MON_OUT FD25 F HSYNC VSYNC SC1_FB RESERVE FOR FLEX 1n0 2D53 B SIF_OUT SIF_OUT_GND 2D18 2D19 PR1P 10u 2D29 1n0 RES 1R0 RES 2D41 1u0 100n 3D22 75R 2D72 PESD5V0S1BA ID28 E M CVBS_RF 100R 100R 3D53 3D29 47n 47n 100p SPR1P_1 2D61 J SC0 2D70 2D52 10u 3D34 6D18 10n PB1P ASPDIF_OUT I 1D23 68R Y1N E SY0 CVBS_IN_DTV 100R 3D54 47n 4D00 ID25 RES 2D25 1n0 RES 2D40 PESD5V0S1BA 6D16 1D20 PESD5V0S1BA 1D21 6D17 D 3D59 1R0 3D33 3D16 10n 2D17 2D60 1R0 2D15 100R AF30 AG29 2D67 AH30 AF29 AG28 AH29 AD29 2D12 AE28 2D31 AE29 AE30 AF28 AD28 AA26 AB27 AB26 AJ30 AB30 AB29 AA29 AK14 AJ14 AJ23 AK20 NC 15p RES 2D22 15p 2D13 75R 3D20 3D21 60R 3D14 Y1P 0 SCT0 SYNC SCT1 SY 1 RP 2 RN 0 SOG SC 1 GP 2 GN 0 BP 1 2 BN CVBS 3 SOY0 4 Y0P N Y0N AF PB0P P PBR0N MPX0 N PR0P D2S SOY1 DC_DEMOD Y1P Y1N ADCIN N_DEMOD PB1P P_DEMOD PBR1N HSYNC PR1P VSYNC 0 FB 1 30R ID22 1R0 is prohibited without the written consent of the copyright owner. SPB1P 1R0 5D03 10n 15p 2D51 15p RES 3D18 FD21 FD22 H All rights reserved. Reproduction in whole or in parts SPB1P_1 SY1N 1R0 MSP-636H2-01 C 2D11 68R 100n FD20 3D58 1R0 3D17 1D18 6D14 FD19 3D12 AH23 AJ20 AK17 AJ17 AH16 AK16 AJ16 AH15 AJ15 AH20 AJ21 AH21 AJ22 AK22 AH22 AH17 AJ18 AH18 AJ19 AK19 AH19 47p 60R SY1P SCART_CVBS0 SCART_CVBS1 RP RN SOG GP GN BP BN SOY0 Y0P Y0N PB0P PBR0N PR0P 15p 2D14 3D15 PESD5V0S1BA 3 2 1 15p 5D02 SY1P_1 SY1N 1R0 FD18 FD17 4 G 75R RES 3D52 6 5 3D57 1R0 2D20 PR FD13 S0Y1 2D62 8 7 1R0 3D13 6D12 FD15 3D11 60R 75R B F PB 1D15 9 5D01 PESD5V0S1BA FD14 12 11 10 2D50 1D14 A 5 6 7 8 9 10 12 11 N 13 O O CHN DC377215 SETNAME CLASS_NO 3PC332 P MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 2 3 "D00 - D99" 4 5 6 7 8 9 10 11 12 13 14 -- -- -- 1 2008-11-21 2 2009-02-03 3 LC09M PCB SB SSB NAME Kyaw Aung Aung SV CHECK 15 16 2009-03-05 1 2009-02-03 3139 123 6451 P 15 SUPERS. DATE 2 2008-11-21 10 C 17 130 11 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 19 20 18490_510_090406.eps 090406 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 76 SSB: Analog I/O - Cinch 1 3 2 2 1 3 4 5 5 4 6 6 7 7 8 8 9 9 10 10 11 12 11 12 13 15 14 13 15 14 16 17 20 A 3 IE95 3E99 4 0001 IE96 3EA0 MUTE_C 7E02-1 BC847BS 2 1K0 1 C IE21 1n0 6E26 RES 2E55 1n0 1R0 RES 2E23 470R RES FOR FLECS 3E68 1E35 60R 3E02 SY1N I PB0P 100R 2E46 1R0 3E55 IE24 CVBS_SC2 3E79 Y0N 68R PESD5V0S1BA 1E26 75R 3E43 15p 2E40 6E16 IE56 5E15 1R0 1E24 6E14 75R IE14 3E36 15p 2E33 FE38 3E73 4E12 SC1_CVBS_OUT 7 8 1R0 PB0P-SC1 E 6 FE39 FE36 SC1_B 9 SC1_G 10 11 12 G F 60R H 3E38 4n7 1R0 2E25 3E23 10n 68R 2E28 3E26 IE42 10n 100R Near IC IE34 4E13 Y0P-SC1 IE13 3E81 I 5E12 60R 1R0 3E27 YON-SC1 G 1R0 J SC1_CVBS_OUT 75R 47p 3E57 Near IC 2E47 1R0 15p J 10n 3E47 IE78 PBR0N-SC1 RES 2E59 47n 4n7 RES 2E71 AP IE17 IE20 5E19 3E56 DACOUT1 1R0 K 47p 2E70 47p 2E69 75R 1u8 3E54 H K LA 3E59 4n7 1R0 IE89 CVBS_SC1 3E78 PR 1R0 L 75R 100R 2E48 47p 3E60 3EA3 47n 2E49 SCART_CVBS0 2E89 15p CVBS3 RES 2E72 All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright owner. SCART_CVBS1 3EA2 3E35 2E35 AP 2E88 2E32 SOY0 Y0P CVBS4 100R 10 11 FE47 12 1R0 G 3E46 10n PESD5V0S1BA 5E13 2E43 5 PESD5V0S1BA 1E20 3E01 1R0 DF13-40DP-1.25V 6E03 75R 60R PBR0N 75R SY1P 1R0 SY1P_SC2 Near IC 9 F 4 60R 6E10 SY1P 1R0 8 FE48 D 1E17 MSP-636H1-01 15p 3EA9 SY1P_1 SC1_CVBS_OUT 5E14 1R0 1 2 3 FE35 5E16 3E75 2E50 1R0 AIN1_L-SC1 AIN1_R-SC1 3E04 IE72 4E11 PR0P-SC1 15p 3E24 SPB1P 68R 7 FE49 PB1P_SC2 PESD5V0S1BA 1E02 SPB1P 3E42 10n 6 PR1P_SC2 PESD5V0S1BA 1E01 3EA8 SPB1P_1 1n0 RES 2E57 1R0 2E39 PR0P 5 15p 75R 15p 3E12 3E08 FE26 2E26 IE01 SPBR1N AIN0_L-SC2 AIN0_R-SC2 SC2_CVBS_OUT ASPDIF_OUT +3V3_SW 4 FE18 6E04 CVBS_SC2 HSYNC VSYNC FE50 FE51 5E17 60R 15p RES 2E07 4E06 4E07 IE25 1R0 1E19 1 MSP-636H1-01 2 3 RES 2E63 3E07 SPR1P PESD5V0S1BA 1E03 IE99 SPR1P 1R0 E CVI-1 AVout RES 2E65 FE15 2E06 3EA7 1R0 15p FE14 SPR1P_1 3E70 CVI-2 AVin LA 15p 3E06 SY1P_1 SPR1P_1 2E04 SPB1P_1 1R0 1R0 1E18 0001 CVBS_SC1 1R0 IE26 AIN1_L-SC1 15p 6E32 PESD5V0S1BA RES 2E24 1n0 RES 2E58 PGA0OUTL-SC1 PGA0OUTR-SC1 1n0 1R0 10u 6E02 41 30K 2E86 10u 3E96 30K 3E71 75R H AIN0_L-SC2 15p 3E03 F AIN1_L 3E97 AIN0_L IE29 2E02 G LA 2E87 15p E PR0P-SC1 RES 2E05 F 4E10 15p D PB0P-SC1 Y0P-SC1 RES 2E03 E 4E08 4E09 D PESD5V0S1BA 1E14 PGA0OUTL-SC1 47K D 3E17 10u 3E94 2E84 L_MON_OUT 1 2 3 4 5 6 7 8 9 10 11 12 13 3EA4 14 15 3EA5 16 3EA6 17 18 19 20 NC 21 22 23 24 HSYNC_B 25 VSYNC_B 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 42 1E10 6E28 RES 2E51 1n0 C 1n0 RES 2E14 1R0 6 AP B 3E66 10u 4n7 C IE16 AIN1_R-SC1 B 1n0 PESD5V0S1BA 1E13 1n0 RES 2E54 1R0 2E82 3E92 30K 6E30 10u 30K LA 3E67 RES 2E18 IE18 AIN0_R-SC2 RES 2E16 2E83 3E93 1n0 FE11 RES 2E53 AIN1_R AIN0_R PESD5V0S1BA 1R0 B C FE32 3E64 IE11 PGA0OUTR-SC1 470R 47K 3E10 10u 4n7 2E80 R_MON_OUT B A 7E02-2 BC847BS 5 1K0 3E90 ANALOG I/O - CINCH MUTE_C RES 2E10 A I 19 18 AP A H 16 L I LOCATION NEAR 1D14 M M J J N N K K O O CHN DC377215 SETNAME CLASS_NO 3PC332 P L MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 1 2 1 2 2009-02-03 3 NAME Kyaw Aung Aung/Roger Poon 3 2 -- -- -2008-11-21 LC09M PCB SB SSB 4 3 5 4 6 5 7 9 8 6 7 10 8 11 1 1 9 "E00 - E99" 13 14 12 10 11 SV CHECK 15 12 16 13 2009-03-05 2009-02-03 3139 123 6451 P SUPERS. DATE 2 1 15 2008-11-21 10 C 17 130 A2 ROYAL PHILIPS ELECTRONICS N.V. 2008 18 14 12 19 15 20 L 1E01 F9 1E02 F9 1E03 E9 1E10 B15 1E13 C9 1E14 C15 1E17 D16 1E18 D9 1E19 D10 1E20 G15 1E24 F15 1E26 E15 1E35 D1 2E02 G8 2E03 G8 2E04 F8 2E05 F8 2E06 E8 2E07 E8 2E10 B13 2E14 C14 2E16 C9 2E18 C13 2E23 D14 2E24 D9 2E25 G12 2E26 G14 2E28 G12 2E32 F12 2E33 F14 2E35 G12 2E39 E12 2E40 E14 2E43 E12 2E46 G6 2E47 H8 2E48 I12 2E49 I14 2E50 H14 2E51 B14 2E53 C14 2E54 C8 2E55 C14 2E57 D14 2E58 D8 2E59 G13 2E63 F13 2E65 E13 2E69 H13 2E70 H14 2E71 H8 2E72 I14 2E80 B12 2E82 B13 2E83 B6 2E84 C12 2E86 D12 2E87 D6 2E88 G6 2E89 H12 3E01 F8 3E02 G8 3E03 G8 3E04 F8 3E06 F8 3E07 E8 3E08 E8 3E10 B12 3E12 E8 3E17 C13 3E23 G12 3E24 G14 3E26 G12 3E27 G14 3E35 F12 3E36 F14 3E38 G12 3E42 E12 3E43 E14 3E46 E12 3E47 E14 3E54 H12 3E55 G6 3E56 H14 3E57 H8 3E59 I12 3E60 I14 3E64 B14 3E66 B14 3E67 C8 3E68 C14 3E70 D14 3E71 D8 3E73 F14 3E75 E14 3E78 I14 3E79 G8 3E81 G14 3E90 B14 3E92 B12 3E93 C6 3E94 C14 3E96 D12 3E97 D6 3E99 A12 3EA0 C12 3EA2 G6 3EA3 H12 3EA4 D1 3EA5 E1 3EA6 E1 3EA7 E4 3EA8 F4 3EA9 F4 4E06 E2 4E07 E2 4E08 D2 4E09 D2 4E10 D2 4E11 E13 4E12 F13 4E13 G13 5E12 G14 5E13 F9 5E14 F9 5E15 F14 5E16 E14 5E17 E9 5E19 H13 6E02 G9 6E03 F9 6E04 E9 6E10 G14 6E14 F15 6E16 E15 6E26 C15 6E28 B15 6E30 C9 6E32 D9 7E02-1 C13 7E02-2 A13 FE11 C6 FE14 E10 FE15 E10 FE18 E10 FE26 E16 FE32 B15 FE35 E15 FE36 F15 FE38 F15 FE39 E15 FE47 F10 FE48 F10 FE49 E9 FE50 E2 FE51 E2 IE01 E6 IE11 B14 IE13 G14 IE14 F14 IE16 B13 IE17 H12 IE18 B8 IE20 H14 IE21 C14 IE24 G8 IE25 E8 IE26 D14 IE29 D8 IE34 G13 IE42 G13 IE56 F13 IE72 E13 IE78 E13 IE89 I14 IE95 A12 IE96 C12 IE99 E6 16 18490_511_090406.eps 090406 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 77 SSB: Side - A/V & USB 1 2 3 1 2 3 5 4 6 8 9 8 7 10 9 10 11 11 12 12 13 A 3F10 2F10 100R 47n +3V3_SW SY0 SC0 Near IC 2F14 100R 47n 3F19 3F49 3F22 3F23 LIGHT_SENSOR POWER-OK KEYBOARD RF_AGC_MON SAV_R_IN AH28 AH27 AK30 AJ29 AK29 AJ28 AK28 100R 100R 100R 1R0 0 1 2 3 4 5 6 RC1 15p RES 2F23 47p 75R 2F15 3F16 USB 30K C D 3F37 OC_ +5V_SW 3 2 10u 2F20 30K 6F17 6F15 1F03 1F01 5 E D USB_OC FF21 IF22 3F24 1n0 RES 2F25 1n0 2F18 30R NUP1301ML3 10u 1R0 RES IF21 2 1 IN 3 USB_PWE 4 EN_ 2 OUT 8 FF19 NUP1301ML3 2F32 FF17 6F16 BZX384-C6V8 IF20 3F33 5F13 FF16 1 5V 2 DM 3 DP FF29 4 5 1F02 1n0 2F24 RES 1n0 2F16 PESD5V0S1BA 6F13 FF18 1 7 1F21 RIGHT 1F19 C USB_DP0 USB_DM0 100u 16V 3F38 10u 1R0 292303-4 F AK3 AK5 AJ5 AK4 AJ4 FF15 6 2F19 IF19 GND 3F32 RES 6F20 1F16 2F33 IF18 6 MTJ-032-37BAA-432 NI 8 9 1F18-3 7 RED FF20 DACOUT1 DACOUT2 IF24 1 PESD5V0S1BA FF14 (RED) VRT DP0 USB DM0 DP1 DM1 FF12 FF28 7F01 TPS2041BD HP_DET MTJ-032-37BAA-432 NI 5 (WHITE) 6 1F18-2 4 WHITE ADIN B 100n AF22 AF21 AJ24 AK24 RC2 HP_ROUT LEFT FS VREF DAC OUT1 OUT2 HP_LOUT 1F18-1 1 YELLOW D 100n ASPDIF_OUT 100n 2F17 2 1R0 3F21 PESD5V0S1BA 6F12 1F14 CVBS MTJ-032-37BAA-432 NI (YELLOW) IF16 3F31 J28 CVBS2 SAV_L_IN FF13 Φ CVBS_SPDIF_USB 2F43 ASPDIF_OUT RES 2F34 3F40 47n 560R 5K1 1% 2F12 B IF14 7701-10 MT5391 10K 3F48 RES 2F22 3F13 100R MDC-013V1-B 1F12 A 15p RES 2F21 47p 47p 75R 2F13 1R0 3F14 PESD5V0S1BA 1F11 FF11 1 E IF12 3F30 FF27 Y 3 0R F IF23 3F25 E 15K RES 3F27 E 15K 0R RES 3F28 All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright owner. 75R 2F11 FF10 C 4 5 6F11 2 B D 7 3F39 15p SVHS IN 1R0 3F11 PESD5V0S1BA 6F10 1F10 B C 5 IF10 3F29 C 6 SIDE - A/V & USB A A 4 RES G 2F36 4F00 CVBS2 1 2 3 4 5 6 7 8 9 10 11 FF30 HEADPHONE 2F37 FF23 3F26 L_MON_OUT 3F43 47R MUTE 3F44 100R SC2_CVBS_OUT 3F45 47R FF31 100p 2F39 100p F H 1-1735446-1 1n0 RES 2F35 1n0 RES 100R 3F46 SAV_R_IN 2F31 6F18 2F38 FF32 FF33 FF34 FF35 FF36 1R0 PESD5V0S1BA 1n0 1F23 1n0 RES 2F29 PESD5V0S1BA RES 1n0 FF38 3F36 RIGHT RES 1R0 3F41 1R0 1F24 6F19 G 3F42 100R LEFT 2F28 3F35 FF25 3 7 8 FF26 1 MSJ-035-10A B AG PPO H 100p 4F01 SC0 SAV_L_IN 1R0 FF24 2F30 5 4 2 RES F 1F22 G 1M36 100p 3F47 R_MON_OUT 2F40 FF37 47R 100p HP_LOUT 5F14 HP_ROUT 5F15 2F41 100p 2F42 100p 30R I I G 30R CHN DC377215 SETNAME CLASS_NO 3PC332 H J MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 1 2 2 3 3 4 4 5 5 "F00 - F99" 7 6 6 7 LC09M PCB SB SSB 1 -- -- -2008-11-21 2 2009-02-03 3 NAME Kyam Aung Aung/Roger Poon SV CHECK 8 8 10 15 2008-11-21 10 9 J 130 A3 13 ROYAL PHILIPS ELECTRONICS N.V. 2008 C 9 2009-03-05 2009-02-03 3139 123 6451 SUPERS. DATE 2 1 11 10 12 11 13 H 1F01 D7 1F02 D7 1F03 D7 1F10 A3 1F11 B3 1F12 B2 1F14 C3 1F16 D3 1F18-1 C2 1F18-2 D2 1F18-3 D2 1F19 D3 1F21 D6 1F22 F2 1F23 F4 1F24 F3 1M36 F11 2F10 A5 2F11 A4 2F12 B5 2F13 B4 2F14 B5 2F15 C4 2F16 C4 2F17 D10 2F18 D4 2F19 D10 2F20 D8 2F21 A4 2F22 B4 2F23 C4 2F24 C4 2F25 D4 2F28 F6 2F29 F4 2F30 F4 2F31 F5 2F32 D5 2F33 C4 2F34 B11 2F35 F6 2F36 F9 2F37 F9 2F38 F9 2F39 G9 2F40 G9 2F41 G9 2F42 G9 2F43 B9 3F10 A4 3F11 A3 3F13 B4 3F14 B3 3F16 B4 3F19 C9 3F21 C3 3F22 C9 3F23 C9 3F24 E9 3F25 E9 3F26 F3 3F27 E10 3F28 E10 3F29 A4 3F30 B4 3F31 B4 3F32 C4 3F33 D4 3F35 F4 3F36 F5 3F37 D5 3F38 C5 3F39 B11 3F40 C11 3F41 F3 3F42 F8 3F43 F8 3F44 F8 3F45 F8 3F46 G8 3F47 G8 3F48 B8 3F49 C9 4F00 F9 4F01 F9 5F13 D9 5F14 G9 5F15 G9 6F10 A3 6F11 B3 6F12 C3 6F13 D3 6F15 D7 6F16 D8 6F17 D8 6F18 F5 6F19 F3 6F20 C3 7701-10 B10 7F01 C10 FF10 B3 FF11 B2 FF12 B11 FF13 B3 FF14 C3 FF15 C10 FF16 D7 FF17 D7 FF18 D4 FF19 D7 FF20 D2 FF21 D10 FF23 F2 FF24 F2 FF25 F2 FF26 F2 FF27 B3 FF28 B11 FF29 D7 FF30 F11 FF31 F11 FF32 F11 FF33 F11 FF34 F11 FF35 F11 FF36 F11 FF37 G11 FF38 F3 IF10 A4 IF12 B4 IF14 B11 IF16 B4 IF18 C4 IF19 C5 IF20 D4 IF21 D5 IF22 E11 IF23 E11 IF24 B11 12 18490_512_090406.eps 090406 2009-Apr-10 Circuit Diagrams and PWB Layouts 3 1 2 A 3 5 4 6 5 7 6 8 9 9 8 7 10 10 11 11 B 12 13 A +5V_SW FG16 EDID_WC B 3G33 3G32 10K IG02 B 12 A VGA 6G13 A 4 EN 78 BAS316 2 10. 10K SSB: VGA 1 LC9.1A LA B EDID_SDA EDID_SCL 7G12 BC847BW 1G12 2K2 6G12 3G12 15p 2G12 C IG01 C 5G11 H_SYNC 6G11 2K2 3G11 15p 2G11 30R D 1G11 D PESD5V0S1BA HSYNC DC_5V RES 3G35 DC_5V VGA_Gn FG13 1R0 G FG14 FG20 FG15 5G13 6G16 3G26 60R BAS316 150R FG19 10K 3G16 10K RES 4G14 RES 4G13 3G15 8 ADR 5 SDA F 1 2 3 0 1 2 E G 1n0 2G24 F SCL 1226-00B-15S-FAE-02 100n 2G25 DC_5V SDA_VGA EEPROM 6 4 100R 3G25 4G12 FG18 (256×8) WC 6K2 10n 1R0 FG17 SCL_VGA 4G11 RES 3G38 3G24 FG11 Φ 330p 2G19 2G23 VGA_G 60R 1R0 7G11 M24C02-WMN6 7 2G22 3G22 FG12 5G15 3G21 VGA_Gp 17 8 15 7 14 6 13 5 12 4 11 3 10 2 9 1 16 330p 68R 1R0 100n 6K2 2G21 3G20 10n 4n7 1G16 RES 3G37 GN 2G17 3G19 VGA_Bn F H H 100R 60R RN I 1G15 3G30 10n 1R0 VGA_R PESD5V0S1BA 2G29 5G16 6G17 68R 3G28 75R 2G26 VGA_Rp 3G29 3G27 5p6 10n 2G27 RP G 3G31 VGA_Rn I 1R0 CHN DC377215 3PC332 J MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 1 2 2 3 3 4 5 5 6 2009-02-03 3 SV 7 6 2 NAME Kyaw Aung Aung/ Roger Poon "G00" - "G99" 4 LC09M PCB SB SSB 1 -- -- -2008-11-21 CHECK 15 2008-11-21 8 10 10 9 2009-03-05 2009-02-03 J 130 14 H A3 ROYAL PHILIPS ELECTRONICS N.V. 2008 C 9 2 1 3139 123 6451 SUPERS. DATE 8 7 G SETNAME CLASS_NO H D 4G15 1G14 E SOG 10n 100R PESD5V0S1BA GP 3G18 6G15 F 2G16 2G18 BN E 6K2 2G14 VGA_B 1G13 60R PESD5V0S1BA 5G14 1R0 6G14 3G10 75R VGA_Bp 75R 68R 5p6 3G13 10n 3G14 2G13 2G10 BP 3G23 E 5p6 owner. D All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright C 3G34 V_SYNC 30R 33R 5G12 VSYNC PESD5V0S1BA C 1G11 C7 1G12 B7 1G13 D7 1G14 E7 1G15 F7 1G16 E8 2G10 D6 2G11 C6 2G12 B6 2G13 D3 2G14 D11 2G16 D3 2G17 D3 2G18 E6 2G19 E3 2G21 E10 2G22 E10 2G23 E3 2G24 F6 2G25 F6 2G26 F3 2G27 F6 2G29 G3 3G10 D5 3G11 C7 3G12 B7 3G13 D4 3G14 D6 3G15 D10 3G16 D10 3G18 D4 3G19 D5 3G20 D4 3G21 D5 3G22 E4 3G23 E6 3G24 E4 3G25 E5 3G26 E6 3G27 F4 3G28 F5 3G29 F6 3G30 G4 3G31 G5 3G32 B10 3G33 A9 3G34 B10 3G35 D11 3G37 E9 3G38 E10 4G11 D9 4G12 E9 4G13 D9 4G14 D9 4G15 D11 5G11 C6 5G12 B6 5G13 E5 5G14 D6 5G15 D6 5G16 F6 6G11 C7 6G12 B7 6G13 A10 6G14 D7 6G15 E7 6G16 E5 6G17 F7 7G11 D11 7G12 B10 FG11 E8 FG12 D8 FG13 E8 FG14 E8 FG15 E8 FG16 A9 FG17 D11 FG18 E11 FG19 E8 FG20 E8 IG01 B10 IG02 B10 11 10 12 11 13 12 18490_513_090406.eps 090406 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 79 SSB: BDS iTV 2 1 3 4 5 6 8 7 9 10 11 13 BDS iTV A A 2 1 4 3 5 6 1H11 C1 1H12 C3 1H13 A3 1H14 A6 1H16 A1 2H12 D4 2H13 D5 2H14 D5 2H15 D5 2H19 B7 2H20 B7 2H21 D1 2H22 D2 2H23 D2 2H24 D2 2H25 D2 2H26 D2 2H27 D4 2H28 D4 2H29 D5 3H16 A4 3H17 A4 3H20 D5 3H21 D5 3H22 D5 3H23 D5 3H24 D5 4H10 D6 4H11 D6 4H12 D6 4H13 D6 5H10 A4 5H11 B4 5H12 C5 FH11 D1 FH14 A4 FH15 A4 FH16 A4 FH17 B4 FH18 C4 FH19 C4 FH20 C4 FH21 C4 FH22 D4 FH23 D4 FH24 D4 FH25 D4 FH26 D4 FH27 B4 FH30 A7 FH31 A1 FH32 A1 FH33 A1 FH34 A1 FH35 B1 FH36 B1 7 B A 1H13 PBS_SPI_DI PBS_SPI_CLK PBS_SPI_DO PBS_I2C_SCL FH31 FH32 FH33 FH34 FH35 FH36 RC1 RC2 1H14 1 2 3 4 5 7 6 SDA_CLOCK SCL_CLOCK FH14 FH15 FH16 5H10 3H16 3H17 FH17 5H11 30R 100R 100R +3V3STBY LCD_CLK_SDA LCD_CLK_SCL 4 30R +5V_SW FH27 1 2 3 5 AOUTL FH30 AOUTR BM03B-SRSS-TBT BM05B-SRSS-TBT 1n0 1 2 3 4 5 6 7 8 10 1n0 2H20 9 D A 1H16 2H19 C BM08B-SRSS-TBT B B E +3V3STBY C FH11 100p 100p 2H26 100p 2H25 SC1_AOUTL SC1_AOUTR 100p 2H24 11 1 2 3 4 5 6 7 8 9 10 12 FH18 FH19 FH20 FH21 FH22 FH23 FH24 FH25 FH26 5H12 3H20 3H21 3H22 3H23 3H24 30R 100R 100R 100R 100R 100R RES 4H10 RES 4H11 RES 4H12 RES 4H13 SCL SDA RC1 DDC_RESET STANDBY SC1_CVBS_OUT AMBI_SCL AMBI_SDA D 100p 100p 2H29 100p 2H15 100p 2H14 100p 2H13 15p 2H12 2H27 BM10B-SRSS-TBT 15p 2H28 D G SC1_B SC1_G SC1_CVBS_OUT SC1_FB 1n0 2H23 9 BM08B-SRSS-TBT C 1H12 1n0 2H22 F 1H11 1 2 3 4 5 6 7 8 10 2H21 All rights reserved. Reproduction in whole or in parts is prohibited without the written consent of the copyright owner. 12 B C D E F G H H 1 2 3 4 5 6 7 I I CHN DC377215 SETNAME CLASS_NO 3PC332 J MULTI 12NC : 3139_123_64502 BD 12NC : 3139_123_64512 1 2 3 4 5 6 "H00" - "H99" 7 -- -- -- 1 2008-11-21 2 2009-02-03 3 LC09M PCB SB SSB NAME Alexi Jebakumar SV CHECK 8 9 2009-03-05 1 2009-02-03 J 3139 123 6451 15 SUPERS. DATE 2 2008-11-21 10 C 10 130 15 A3 ROYAL PHILIPS ELECTRONICS N.V. 2008 11 12 13 18490_514_090406.eps 090406 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 80 SSB: SRP List Explanation Example Net Name Diagram +12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x) -12-15V AP1 (4x) -12-15V AP4 (6x) -12-15V AP5 (14x) -12-15V AP6 (6x) -12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x) -DC-F AP1 (2x) -DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) AP5 (2x) GND-SA GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x) SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x) -SUB-SPEAKER AP5 (1x) -SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x) 1.1. Personal Notes: Introduction SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100% correct. In addition, in the current crowded schematics there is often none or very little place for these references. Some of the PWB schematics will use SRP while others will still use the manual references. Either there will be an SRP reference list for a schematic, or there will be printed references in the schematic. 1.2. Non-SRP Schematics There are several different signals available in a schematic: 1.2.1. Power Supply Lines All power supply lines are available in the supply line overview (see chapter 6). In the schematics (see chapter 7) is not indicated where supplies are coming from or going to. It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic). +5V Outgoing 1.2.2. +5V Incoming Normal Signals For normal signals, a schematic reference (e.g. B14b) is placed next to the signals. B14b 1.2.3. signal_name Grounds For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated. 1.3. SRP Schematics SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used. A reference is created for all signals indicated with an SRP symbol, these symbols are: +5V name name +5V Power supply line. name Stand alone signal or switching line (used as less as possible). name Signal line into a wire tree. name name Switching line into a wire tree. name Bi-directional line (e.g. SDA) into a wire tree. name Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets). Remarks: • When there is a black dot on the "signal direction arrow" it is an SRP symbol, so there will be a reference to the signal name in the SRP list. • All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep it concise. • Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included in the SRP reference list, but only with one reference. Additional Tip: When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader: • Select the signal name you want to search for, with the "Select text" tool. • Copy and paste the signal name in the "Search PDF" tool. • Search for all occurrences of the signal name. • Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to "zoom in" to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete schematic. PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version. 10000_031_090121.eps 090121 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 81 SSB: SRP List Netname Diagram AOUTR +12VDISP +12VDISP +12VS +12VS +12VS +12VS +12VS_1 +1V0_SW +1V0_SW +1V2_SW +1V2_SW +1V8_SW +1V8_SW +1V8_SW +24VAUDIO +24VAUDIO +3V3_FLASH +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3_SW +3V3AN +3V3DN +3V3STBY +3V3STBY +3V3STBY +3V3STBY +3V3STBY +5V_COMBINED +5V_IF +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5V_SW +5VS +5VTUN +8V_SW +VDISP +VTUN 5V AIN0_L AIN0_L AIN0_L-SC2 AIN0_R AIN0_R AIN0_R-SC2 AIN1_L AIN1_L AIN1_L-SC1 AIN1_R AIN1_R AIN1_R-SC1 AMBI_SCL AMBI_SCL AMBI_SCL AMBI_SCL_OUT AMBI_SDA AMBI_SDA AMBI_SDA AMBI_SDA_OUT AOBCK AOBCK AOLRCK AOLRCK AOMCLK AOMCLK AOSDATA0 AOSDATA0 AOUTL AOUTL AOUTR B01 (1×) ARX0B04D (1×) ARX0+ B01 (5×) ARX1B02A (1×) ARX1+ B03 (2×) ARX2B04A (1×) ARX2+ B01 (2×) ARX-5V B01 (1×) ARX-5V B04A (1×) ARXCB01 (1×) ARXC+ B05 (1×) ARX-DDC-CLK B01 (1×) ARX-DDC-DAT B04A (1×) ARX-HPD B04B (5×) ASPDIF_OUT B01 (1×) ASPDIF_OUT B03 (1×) ASPDIF_OUT B04C (3×) AUDIO_LS_L B01 (1×) AUDIO_LS_L B03 (2×) AUDIO_LS_R B04A (1×) AUDIO_LS_R B04C (24×)AV3_L_IN B04E (2×) AV3_R_IN B05 (2×) BACKLIGHT_BOOST B06A (2×) BACKLIGHT_BOOST B06B (1×) BACKLIGHT_CONTROL B06C (1×) BL_ON_OFF B06D (1×) BL_ON_OFF B06A (3×) BN B06A (14×) BN B01 (1×) BOLT_ON_UART_RXD B03 (2×) BOLT_ON_UART_RXD B04A (9×) BOLT_ON_UART_TXD B04C (5×) BOLT_ON_UART_TXD B05 (1×) BOOST_CONTROL B05 (8×) BP B02A (5×) BP B01 (1×) BRX0B02A (1×) BRX0+ B03 (1×) BRX1B04C (1×) BRX1+ B04D (1×) BRX2B05 (1×) BRX2+ B06D (1×) BRX-5V B06E (1×) BRX-5V B02A (5×) BRXCB02A (2×) BRXC+ B01 (1×) BRX-DDC-CLK B04D (3×) BRX-DDC-DAT B01 (1×) BRX-HPD B06D (1×) CEC B06B (1×) CRX0B06C (1×) CRX0+ B06C (1×) CRX1B06B (1×) CRX1+ B06C (1×) CRX2B06C (1×) CRX2+ B06B (1×) CRX-5V B06C (1×) CRX-5V B06C (1×) CRXCB06B (1×) CRXC+ B06C (1×) CRX-DDC-CLK B06C (1×) CRX-DDC-DAT B04C (1×) CRX-HPD B04E (1×) CVBS_IN_DTV B07 (1×) CVBS_IN_DTV B04E (1×) CVBS_RF B04C (1×) CVBS_RF B04E (1×) CVBS_SC1 B07 (1×) CVBS_SC2 B04E (1×) CVBS2 B03 (1×) CVBS2 B04C (1×) CVBS3 B03 (1×) CVBS3 B04C (1×) CVBS4 B03 (1×) CVBS4 B04C (1×) DACOUT1 B03 (1×) DACOUT1 B04C (1×) DACOUT2 B03 (3×) DACOUT2 B07 (1×) DC_5V B03 (3×) B07 (1×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B04A (1×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B06B (1×) B06C (1×) B06D (1×) B03 (1×) B06B (1×) B03 (1×) B06B (1×) B06B (1×) B06B (1×) B01 (1×) B04C (1×) B04C (1×) B01 (1×) B04C (1×) B06B (1×) B06E (1×) B04C (1×) B05 (1×) B04C (1×) B05 (1×) B04C (1×) B06B (1×) B06E (1×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B04A (1×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (4×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B04A (1×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (1×) B06B (1×) B02A (1×) B06B (1×) B06C (1×) B06C (1×) B06B (1×) B06D (2×) B06B (1×) B06C (1×) B06B (1×) B06C (1×) B06C (1×) B06D (1×) B06B (1×) B06D (1×) B06E (3×) DC_PROT DC_PROT DDC_RESET DDC_RESET DDC_RESET DDC-SCL DDC-SCL DDC-SDA DDC-SDA DM DP DRX0DRX0+ DRX1DRX1+ DRX2DRX2+ DRX-5V DRX-5V DRXCDRXC+ DRX-DDC-CLK DRX-DDC-DAT DRX-HPD DTV_IRQ DTV_IRQ DTV_L_IN DTV_L_IN DTV_R_IN DTV_R_IN DVI_AUL_IN DVI_AUR_IN EDID_SCL EDID_SCL EDID_SDA EDID_SDA EDID_WC EDID_WC EDID_WC GN GN GND_CVBS_RF GND_CVBS_RF GNDLAN GNDSND GNDSND GNDTUN GP GP HDMI_CEC HDMI_CEC HDMI_RESET HDMI_RESET HP_DET HP_DET HP_DETECT HP_LOUT HP_LOUT HP_LOUT HP_ROUT HP_ROUT HP_ROUT HSYNC HSYNC HSYNC I2S_SEL1 I2S_SEL2 IF_ATV IR JTCK JTDI JTDO JTMS JTRST KEYBOARD KEYBOARD L_MON_OUT L_MON_OUT L_MON_OUT LAN-RST LAN-RST LCD_CLK_SCL B03 (1×) LCD_CLK_SCL B04C (1×) LCD_CLK_SDA B04C (1×) LCD_CLK_SDA B05 (1×) LCD_PWR_ON B07 (1×) LCD_PWR_ON B04C (1×) LED1 B05 (2×) LED1 B04C (1×) LED2 B05 (2×) LED2 B06D (1×) LIGHT_SENSOR B06D (1×) LIGHT_SENSOR B05 (2×) LVDS_A_TXe0n B05 (2×) LVDS_A_TXe0p B05 (2×) LVDS_A_TXe1n B05 (2×) LVDS_A_TXe1p B05 (2×) LVDS_A_TXe2n B05 (2×) LVDS_A_TXe2p B04C (1×) LVDS_A_TXe3n B05 (2×) LVDS_A_TXe3p B05 (2×) LVDS_A_TXe4n B05 (2×) LVDS_A_TXe4p B05 (2×) LVDS_A_TXeCLKn B05 (1×) LVDS_A_TXeCLKp B05 (2×) LVDS_A_TXo0n B04A (1×) LVDS_A_TXo0p B05 (1×) LVDS_A_TXo1n B05 (1×) LVDS_A_TXo1p B06B (1×) LVDS_A_TXo2n B05 (1×) LVDS_A_TXo2p B06B (1×) LVDS_A_TXo3n B06B (1×) LVDS_A_TXo3p B06B (1×) LVDS_A_TXo4n B05 (1×) LVDS_A_TXo4p B06E (1×) LVDS_A_TXoCLKn B05 (1×) LVDS_A_TXoCLKp B06E (1×) LVDS_B_TXe0n B04C (1×) LVDS_B_TXe0p B05 (1×) LVDS_B_TXe1n B06E (1×) LVDS_B_TXe1p B06B (1×) LVDS_B_TXe2n B06E (1×) LVDS_B_TXe2p B02A (1×) LVDS_B_TXe3n B06B (1×) LVDS_B_TXe3p B06A (10×) LVDS_B_TXe4n B01 (2×) LVDS_B_TXe4p B03 (26×) LVDS_B_TXeCLKn B01 (1×) LVDS_B_TXeCLKp B06B (1×) LVDS_B_TXo0n B06E (1×) LVDS_B_TXo0p B04A (1×) LVDS_B_TXo1n B05 (1×) LVDS_B_TXo1p B04C (1×) LVDS_B_TXo2n B05 (1×) LVDS_B_TXo2p B04C (1×) LVDS_B_TXo3n B06D (1×) LVDS_B_TXo3p B04C (1×) LVDS_B_TXo4n B03 (1×) LVDS_B_TXo4p B06B (1×) LVDS_B_TXoCLKn B06D (2×) LVDS_B_TXoCLKp B03 (1×) LVDS_SELECT B06B (1×) LVDS_SELECT B06D (2×) MII-COL B06B (1×) MII-COL B06C (1×) MII-CRS B06E (1×) MII-CRS B04E (1×) MII-MDC B04E (1×) MII-MDC B02A (2×) MII-MDINT B04C (1×) MII-MDINT B04C (2×) MII-MDIO B04C (2×) MII-MDIO B04C (2×) MII-RXCLK B04C (2×) MII-RXCLK B04C (2×) MII-RXD(0) B04C (1×) MII-RXD(0) B06D (1×) MII-RXD(1) B06B (2×) MII-RXD(1) B06C (1×) MII-RXD(2) B06D (1×) MII-RXD(2) B04C (1×) MII-RXD(3) B06A (1×) MII-RXD(3) B04A (1×) MII-RX-DV B07 (1×) B04A (1×) B07 (1×) B04C (1×) B04D (1×) B04A (1×) B04C (1×) B04A (1×) B04C (1×) B04C (1×) B06D (1×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04D (2×) B04C (1×) B04D (2×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) MII-RX-DV MII-RX-ER MII-RX-ER MII-TXCLK MII-TXCLK MII-TXD(0) MII-TXD(0) MII-TXD(1) MII-TXD(1) MII-TXD(2) MII-TXD(2) MII-TXD(3) MII-TXD(3) MII-TXEN MII-TXEN MUTE MUTE MUTE_C MUTE_C MUTE_M MUTE_M MUTEn MUTEn NAND_PALE NAND_PARB NAND_PCLE NAND_PDD(0) NAND_PDD(1) NAND_PDD(2) NAND_PDD(3) NAND_PDD(4) NAND_PDD(5) NAND_PDD(6) NAND_PDD(7) NAND_POCE NAND_POOE NAND_POWE OFF_MUTE OFF_MUTE PB0P PB0P PB0P-SC1 PB1P PBR0N PBR0N PBR1N PBS_I2C_SCL PBS_I2C_SCL PBS_SPI_CLK PBS_SPI_CLK PBS_SPI_DI PBS_SPI_DI PBS_SPI_DO PBS_SPI_DO PGA0OUTL-SC1 PGA0OUTR-SC1 POWER_DOWN POWER_DOWN POWER-OK POWER-OK PR0P PR0P PR0P-SC1 PR1P PWM_DIMMING PWM_DIMMING R_MON_OUT R_MON_OUT R_MON_OUT RC1 RC1 RC1 RC2 RC2 RC2 RF_AGC RF_AGC_MON RF_AGC_MON RJLED_G RJLED_Y RN RN B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B04C (1×) B06A (1×) B03 (2×) B06D (1×) B03 (1×) B06C (2×) B03 (1×) B06B (2×) B03 (1×) B04A (1×) B04C (2×) B04C (2×) B04C (2×) B04C (3×) B04C (3×) B04C (2×) B04C (2×) B04C (2×) B04C (2×) B04C (2×) B04C (2×) B04C (2×) B04C (3×) B04C (2×) B03 (1×) B06B (1×) B06B (1×) B06C (1×) B06C (1×) B06B (1×) B06B (1×) B06C (1×) B06B (1×) B04C (1×) B07 (1×) B04C (1×) B07 (1×) B04C (1×) B07 (1×) B04C (1×) B07 (1×) B06C (1×) B06C (1×) B03 (1×) B04A (2×) B01 (1×) B06D (1×) B06B (1×) B06C (1×) B06C (1×) B06B (1×) B01 (1×) B04C (1×) B06B (2×) B06C (1×) B06D (1×) B04C (1×) B06D (1×) B07 (2×) B04C (1×) B06D (1×) B07 (1×) B02A (2×) B02A (1×) B06D (1×) B06A (1×) B06A (1×) B06B (1×) B06E (1×) RP RP RX0RX0+ RX1RX1+ RX2RX2+ RXCRXC+ S0Y1 SAV_L_IN SAV_L_IN SAV_R_IN SAV_R_IN SAW_SW SAW_SW SC0 SC0 SC1_AOUTL SC1_AOUTR SC1_B SC1_B SC1_CVBS_OUT SC1_CVBS_OUT SC1_FB SC1_FB SC1_G SC1_G SC2_CVBS_OUT SC2_CVBS_OUT SC2_CVBS_OUT SCART_CVBS0 SCART_CVBS0 SCART_CVBS1 SCART_CVBS1 SCL SCL SCL SCL SDA SDA SDA SDA SENSE+1V0_MT5392 SERIAL_PDD0 SERIAL_POCE SIF_OUT SIF_OUT SIF_OUT_GND SIF_OUT_GND SIF1 SIF2 SOG SOG SOY0 SOY0 SPB1P SPB1P SPB1P_1 SPB1P_1 SPBR1N SPBR1N SPDIF_IN SPDIF_IN SPR1P SPR1P SPR1P_1 SPR1P_1 STANDBY STANDBY STANDBY STANDBYn STANDBYn SW_MUTE SW_MUTE SY0 SY0 SY1N SY1N SY1P SY1P B06B (1×) B06E (1×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B05 (2×) B06B (1×) B06B (1×) B06D (2×) B06B (1×) B06D (2×) B02A (1×) B04C (1×) B06B (1×) B06D (2×) B07 (1×) B07 (1×) B06C (1×) B07 (1×) B06C (2×) B07 (2×) B06B (1×) B07 (1×) B06C (1×) B07 (1×) B06B (1×) B06C (1×) B06D (1×) B06B (1×) B06C (1×) B06B (1×) B06C (1×) B04C (3×) B04D (1×) B05 (1×) B07 (1×) B04C (3×) B04D (1×) B05 (1×) B07 (1×) B01 (1×) B04C (1×) B04C (2×) B02A (1×) B06B (1×) B02A (1×) B06B (1×) B02A (2×) B02A (2×) B06B (1×) B06E (1×) B06B (1×) B06C (1×) B06B (1×) B06C (2×) B06B (1×) B06C (2×) B06B (1×) B06C (1×) B04C (1×) B05 (1×) B06B (1×) B06C (2×) B06B (1×) B06C (2×) B01 (1×) B04A (1×) B07 (1×) B03 (1×) B04A (1×) B03 (1×) B04A (1×) B06B (1×) B06D (1×) B06B (1×) B06C (1×) B06B (1×) B06C (2×) SY1P_1 SY1P_1 TPIM TPIP TPOM TPOP TUNER_SCL TUNER_SCL TUNER_SDA TUNER_SDA UART_RX UART_TX USB_OC USB_OC USB_PWE USB_PWE VDD VDDA VDDO_3V3 VIF1 VIF2 VSYNC VSYNC VSYNC Y0N Y0N Y0P Y0P Y0P-SC1 Y1N Y1P B06B (1×) B06C (2×) B06A (2×) B06A (2×) B06A (2×) B06A (2×) B02A (2×) B04A (1×) B02A (2×) B04A (1×) B04C (3×) B04C (3×) B04C (1×) B06D (1×) B04C (1×) B06D (1×) B03 (2×) B03 (2×) B05 (3×) B02A (2×) B02A (2×) B06B (1×) B06C (1×) B06E (1×) B06B (1×) B06C (1×) B06B (1×) B06C (1×) B06C (1×) B06B (1×) B06B (1×) 18490_600_090406.eps 090406 3139 123 6451.1 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 82 Layout Small Signal Board (Overview top side) 1G51 7210 2765 2770 2769 5712 3710 2741 2F21 3F14 3894 2F13 2F43 3F30 2F22 2772 3607 2D69 2F15 3818 3813 3893 3833 2742 3712 3719 2F11 3F11 Part 1 18490_552a_090326.eps 3915 6913 2760 1M36 2F42 6F12 3F21 3832 3831 3839 2823 2771 1H16 3826 3829 2822 3838 3830 5F14 5F15 6F11 3914 3913 1204 1201 7814 7812 7911 2916 3912 389J 2813 5911 5912 5910 6912 7910 2919 5812 1F12 3606 2773 2D68 1F22 3E17 5213 3715 3721 2745 3E92 2E82 3221 2221 3222 3D29 4F01 3E54 3E59 2E48 3E35 2E32 3E42 2E39 1D03 2D21 2D30 3E46 2E43 2D15 3D19 2D17 3D16 3D22 3D14 3E23 2E25 3E55 2E46 2D11 3D12 3E38 2E35 2G26 3G27 2G29 2D74 2D72 2D73 1812 1D11 2NAD 2NAB 3NAE 2NAA 3NAD 2D54 2NAC 7103 2106 3D23 3D24 3G37 3G16 3G15 2G22 5G13 6G13 2G21 7G11 1D24 1D01 3G38 3G35 2103 2107 3G32 7G12 2G14 6G16 2G24 2G25 3G33 5115 3G34 1NA1 3H17 1H13 6D10 3D30 1D13 3D46 6D13 1G16 9NA2 5NA3 2D38 5G15 5G14 5G16 2D39 2D37 2D33 2G27 3G30 3G29 3G31 3G28 3E26 2E28 3D10 2D10 38A8 2G23 2G13 2G19 3G13 3G22 2G17 3G24 2G16 3G25 3G20 3608 3G18 3G19 3G21 3G23 3G10 2G10 6D22 1D25 3G14 38A638A7 3600 3601 3602 38A5 2834 2833 1X05 2D71 2D27 2F17 2F19 2150 1X07 5116 Part 2 18490_552b_090326.eps 2B17 6124 2159 4H11 4H13 4H12 4H10 3B50 3B57 3B51 3B46 3B56 3B47 3H24 1813 4B11 1E19 1B07 1B04 4B16 1E35 1H11 1E17 1D04 4B04 1D14 1B05 1H14 2500 2502 2511 2509 2508 1502 1X08 3B71 2567 2H22 3558 3B69 2H21 5503 3B68 2566 2529 3534 2530 3535 2527 3533 2501 2554 3H23 2H19 2541 3532 2H29 2H20 2552 2546 2534 3H22 2H15 2550 7510 2547 2528 2516 2H27 2531 3536 3537 2536 3538 2533 6B06 3H21 3542 2544 3B20 3B19 3H20 3B70 2H28 2545 5505 2H14 3B54 3B59 3B55 3B52 3B53 1H12 2H13 7B05 1B02 2H12 2555 1F21 4B17 7117 4B02 5117 5101 4B01 2129 3D55 1D19 3D32 3G26 2158 6123 3513 3D26 2D56 3H16 7116 5100 5108 5107 3D47 6D11 6D15 3F23 3D45 2140 5104 2136 7100 3D43 2D57 2D34 3D48 2D55 4G15 5103 2D48 3D25 3D27 2D35 3D56 3D44 2D58 3F49 2G18 2626 1M20 7602 1817 2D49 3D54 3F19 5D05 2776 2780 2779 2D31 1D22 2777 2D67 4F00 3EA3 2F10 3F10 2F12 3F13 2E88 3EA2 2D59 2753 2F14 3F16 2E89 6103 6122 2131 3219 3D53 7D10 2D12 2747 26A5 1X03 7211 3223 3226 2D16 5714 3D49 1M95 4204 4205 2D18 2D19 3714 2750 3F48 1M99 4211 4206 1212 3E97 2E87 3E96 2E86 6211 3E93 2E83 2B29 3B22 2B48 1B10 2778 1736 1735 1211 2D62 3D51 2D64 2D61 7D11 7701 2D63 3D50 2774 2775 1B08 2E80 3E10 5212 2E84 7702 1F18 1F14 5NA2 2F38 3F45 2F39 3F44 3F47 2F40 2F41 3F31 2F23 2NA6 2F36 2F37 1F10 2211 2210 2219 5211 5210 5216 1F11 2NA1 1X12 2D46 2D47 5NA1 6F10 5A10 3F29 2A12 2A13 3A18 3A19 3A12 3A13 3211 3212 1G50 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 2A14 2903 3917 1M59 1X02 1818 2904 2901 6914 3916 6915 2902 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1X01 1B06 4B03 1B03 1X06 1B01 18490_552_090326.eps 090327 31391236451.2 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 83 Layout Small Signal Board (Part 1 top side) 1G51 7210 3832 7814 3826 3829 2822 3838 3830 7812 3831 3839 2823 3913 2916 3914 7911 2F42 Part 1 3915 6913 2760 2765 2770 2769 2F15 2F21 3710 2741 5712 3818 3813 3F14 3894 2F13 2F43 3F30 2F22 3893 3833 2772 3607 2D69 2773 2D68 1F22 3E17 3714 2750 3222 3219 2D16 3D53 2D31 3D29 4F01 2D49 3E54 3E59 2E48 3D26 2D56 6D22 6D11 6D15 2D74 1817 2D73 3F23 1D03 3E23 2E25 3E35 2E32 3E42 2E39 3D47 3D55 3D48 3E46 2E43 3E26 2E28 2D21 3E55 2E46 2D30 3D22 3E38 2E35 1D19 2NAD 2NAA 2NAB 3NAE 3NAD 2D38 2NAC 3 1G16 9NA2 5NA3 3D30 6D10 6D13 2D37 1D13 3D46 2D39 3D32 D11 3D45 2D55 2D54 5G16 5G15 1812 1D25 2D33 2D10 2D15 3D19 3D10 3D16 3D14 2D11 2D17 3D12 3D43 2D57 2D34 3F49 2G29 2G26 3G30 2G23 3G31 2G19 3G22 3G27 2G17 3G28 2G27 3G29 3G25 3G20 3G21 2D48 3D25 3D27 2D35 2G18 3G23 2D58 3G14 5G14 2834 3G24 2G13 2G16 3G18 3608 6103 6122 2140 2833 2G10 3G10 38A638A7 3600 3601 3602 38A5 7602 3G19 3G13 2626 2747 26A5 38A8 3F48 2D72 3D44 3D56 3D54 3F19 5D05 2776 2780 2779 2D67 4F00 3EA3 2F10 3F10 2F12 3F13 2E88 3EA2 1D22 2777 2E89 2D59 2D12 2F14 3F16 7D10 5714 2136 7211 3223 3226 3D49 1M20 3221 2221 2D18 2D19 2778 1X03 4204 4205 6211 5213 3715 3721 2745 3E92 2E82 4211 4206 1212 3E93 2E83 3E97 2E87 3E96 2E86 5212 2D62 3D51 2D61 7D11 2D64 3D50 2774 2775 2D63 1211 2B29 3B22 2B48 1B10 2753 1B08 2E80 3E10 7701 1F12 3606 2E84 7702 1F11 1H16 6F11 2771 2742 3712 3719 1M36 5F14 5F15 2F11 3F11 7910 3912 6912 389J 2813 5911 5912 5910 2919 5812 1204 1201 1F14 5NA2 2F38 3F45 1F18 2F39 3F44 3F47 2F40 2F41 6F12 3F21 2NA6 2F36 2F37 3F31 2F23 2211 2210 2219 5211 5210 5216 6F10 2NA1 1X12 1F10 5NA1 3F29 5A10 2D46 2D47 2A12 2A13 3A18 3A19 3A12 3A13 3211 3212 1G50 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 2A14 2903 3917 2904 2901 6914 3916 6915 2902 1M59 1X02 1818 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1X01 2009-Apr-10 18490_552a_090326.eps 090627 7103 2106 7G11 1 2NAD 3NAE 2NAA 2NAB 3NAD 2D38 2D 1D24 1D01 3G34 1H13 2D33 1NA1 3H17 1X05 2D71 2D27 2F17 2F19 Part 2 5116 6124 2159 4H11 1F21 4H13 4H12 4H10 3B50 3B57 3B51 3B46 3B56 3B47 3H24 3B54 3B59 3B55 3B52 3B53 6B06 3B71 1B05 1813 4B11 1E19 1B07 1B04 4B16 1E35 1H11 1E17 1H14 2H21 2H22 2566 2567 2500 2502 2511 2508 1502 4B04 1D04 1X08 2509 3B69 2H19 5503 3558 2501 2554 2529 3534 2530 3535 2527 3533 3B68 2H20 2541 3532 3H23 2550 7510 2547 2516 2552 2546 2534 3H22 2H15 2H29 3B20 3B19 3H21 2H27 2531 3536 3537 2536 3538 2533 3B70 3H20 3542 2544 2528 2555 2H28 2545 5505 2H14 7B05 1B02 1H12 2H13 4B17 7117 2B17 4B02 5117 1X07 5101 2150 2158 6123 3513 6D10 3D23 3G16 2G22 5G13 6G13 3G15 3G38 3G35 2103 2107 3G32 7G12 3D24 3G37 2G14 2G24 3G26 6G16 5115 2G21 2H12 1736 1735 1D13 3D46 1G16 4B01 2129 6D13 2D37 2NAC 3D30 3H16 7116 5100 5108 5107 1M99 7100 2D39 3D32 4G15 5103 EN 84 2D55 3G33 2131 10. 2G25 1M95 1X03 5104 2136 6103 6122 2140 Layout Small Signal Board (Part 2 top side) LC9.1A LA 1D11 Circuit Diagrams and PWB Layouts 1D14 1B06 4B03 1B03 1X06 1B01 18490_552b_090326.eps 090327 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 85 3F38 2F16 F927 IF19 FA15 FA16 FA14 FA13 FA19 FA18 I853 F920 F915 F917 F913 F859 F912 F925 F916 F918 F914 F922 F929 F923 F993 F919 3A14 5A14 389D F921 F928 F930 2A10 3A10 F864 F924 F926 FA17 F931 3F43 IF20 2F25 3F33 2F32 3F37 2F18 IF21 389F FF18 FF20 IF18 2F24 3F32 2F33 3F42 6F13 1F19 FF14 3F46 1F16 6F20 Layout Small Signal Board (Overview bottom side) 2921 F910 38A4 38A3 F911 3A17 FF30 F932 2A11 3A11 3A16 5A16 3A15 I261 A259 F994 F934 F933 FF37 CXXX 2638 2604 2606 3848 2764 2759 3611 2736 2710 2739 2715 FB49 4B30 2711 2762 2752 3812 3892 F867 389I 3814 2758 FB48 5815 2837 F828 3835 3824 I823 F827 F824 5814 F823 3827 F822 5813 F821 I822 I821 FD29 FF28 FG19 FH17 2G12 I123 2132 F131 2133 I119 I107 I105 I122 I120 I104 7F01 2171 2127 2125 3531 2519 I100 2520 F523 FE14 F522 3566 7504 7516 FD17 5D03 6D16 1D18 FD15 2D13 ID25 3D20 3D21 2D22 FD21 2D52 2D20 FD18 2D25 3D15 2E72 3E78 2E49 3E60 5D02 3D17 ID26 6502 3523 2565 I521 I530 I560 ID28 ID22 1D20 I524 6501 F580 3D33 3D36 3D18 2D51 I522 I518 3D35 I598 3557 3556 1D15 1D08 I513 FH30 2D40 6D12 5D01 FD14 3508 I512 6D14 2D50 2D14 3D11 3507 IE95 3E99 7517 7500 I510 F518 3EA0 3D13 FE32 F516 2503 2E55 3E94 3E68 2E18 6E26 ID12 IE21 7E02 IE11 3510 3520 I519 3501 I511 7501 6500 I516 3515 3514 3500 3559 3521 7519 ID29 FD20 FD19 1D21 1E10 1D23 3560 3564 2569 2D53 2E70 2521 3512 3517 I525 2D29 7518 3565 2559 FE15 1E13 F115 2824 I565 3D34 FH11 2E69 3D52 6D09 F542 F539 I526 FD13 6E30 4B36 4B35 2D28 F543 5507 I566 2E50 F541 3E56 3E90 2E51 2E10 3E64 5D00 6E28 ID13 1E18 F544 I570 2560 IE20 IE96 2D70 IE18 2561 2562 2563 2564 I582 F569 3562 2H23 4D00 3D28 1B11 1B13 1B12 1B14 1E14 FE35 FE18 2E54 3E67 2E16 C051 F547 I568 F545 3509 2H24 F548 3E66 2E14 3E71 2E24 2537 2524 2D41 IE24 2E57 2E58 IE29 6E32 7815 3841 3879 3845 I576 3549 7513 I596 7102 FE39 FB45 2E23 3E70 F546 3544 I595 I515 IE26 2553 5508 2556 I587 5502 2522 I564 2523 I581 2549 2532 F512 2E53 2120 6503 3621 2513 I580 F515 IE16 7511 7508 I583 I588 2539 2540 3540 IE78 F849 FB27 F112 6D18 FD28 3EA7 IE01 2E71 3E79 3E57 2E47 2543 3519 IE25 F113 2116 3548 I590 4502 5E17 3101 F126 I559 FF12 4E06 F114 I835 2124 3102 F550 6D17 FE50 3842 I573 2568 6E04 FE49 2542 3561 4E07 3541 F593 I527 FE51 1E26 4B39 4B38 2E06 3E07 3E12 2E07 FB37 1E03 3B36 4B37 7B04 4B18 3B37 IE99 FB40 5E16 3D59 FB38 I838 F111 I554 I572 2E40 3E43 5E19 6E16 FB23 FB20 F116 I571 IE89 3EA6 FB16 2E65 3E75 F117 3840 F123 2518 IE72 3D57 F118 I103 3550 IE14 F119 2122 I552 F579 2515 F536 3E47 3D58 3EA9 3EA5 FB42 3528 4101 2119 4100 2118 5102 7101 2128 I585 3530 2E33 3E36 3E73 2E63 IE17 7B09 2163 3107 3138 3140 2154 I102 I584 I586 3502 4E10 4E11 3EA8 3EA4 FB24 3B43 F535 2H26 IE56 3529 I563 5E15 FE38 I546 I575 I577 2H25 4E12 6E14 1E02 FE26 4E08 3B44 FB18 I124 I578 FH26 3E27 F540 3E08 I630 F615 IE34 1E24 6E03 3E81 2E59 IE42 3E04 5E14 5E12 6E10 2E03 3E02 4E13 2E04 4E09 3E06 2E05 5E13 FE48 3E01 6E02 FB26 FB09 3E03 2E02 3B10 3B73 FB08 7B02 3B75 4B40 7B06 FB33 3B34 3B61 3B60 3B72 3B35 FB07 7B07 FH24 2E26 3E24 I543 7507 FH23 IE13 3527 I589 1E20 6601 1E01 3B76 F538 3526 2698 3623 FH25 2B51 2B50 FG16 3624 I629 5H12 FH21 FE36 I544 7506 3622 FH20 3B40 6B07 3B62 7605 FH22 3B58 FB57 3865 3864 6600 F616 FH19 FB10 3135 2121 I131 I125 2156 3130 2164 3563 2B26 3B32 F100 F120 2152 3104 3103 I126 I134 I130 6100 I129 2155 3131 3122 2161 3125 2160 I132 F132 3B33 IB02 6813 I135 3B63 7B03 FB47 IB09 F101 2109 2168 2153 3136 2157 F133 2110 I127 I128 FB25 FB19 IB11 IB10 FB29 6812 F103 6102 3B11 2B25 IB14 FB28 1811 F104 3100 2111 FB22 FE47 1814 F105 FB17 3B39 3B663B67 2B24 F868 3B45 IB03 3B48 3172 3173 IB12 IB16 FB30 F106 I111 2162 3B64 3B41 F848 I110 6101 3B38 5B01 3B65 2B11 FB11 3F28 6F16 2B16 2F20 1F02 1F01 IF22 FH18 3868 3869 3171 3811 3810 FB21 FB32 F107 I833 FF21 6F17 3F27 1F03 Part 2 18490_552b_090326.eps 5F13 IF23 FF16 F847 I109 2101 2123 3F25 F108 2115 F102 6F15 3B49 3199 2100 I108 2108 2105 2104 2102 3F24 FB31 2112 2169 F611 FNAB FF15 F110 F124 2137 F122 IG02 4G13 FNAA FF17 2113 I136 4G11 IG01 FF19 I106 F125 5H11 FF29 2167 3108 F109 5G12 3G12 2144 FG17 2G11 6G12 FG18 FD23 FG20 FG12 6G11 3G11 5G11 4G14 FD12 FNA6 4G12 FG11 FNA8 2114 I118 FH15 2135 2138 3106 3105 3109 I117 2165 3134 FH14 FH16 F819 FG13 2134 FG14 1G15 1G14 1G13 FD27 2139 FD25 ID34 FNA5 2142 3119 2141 FNA7 1G11 FNA9 FNA4 5H10 INAS 3139 3129 2166 1D17 FG15 F856 3825 2821 F820 I820 1G12 I849 6G14 3891 F855 3889 6G15 I850 6G17 3890 ID35 F853 FB54 F865 I824 3888 FB55 FB53 FD26 38A9 3885 3884 2757 I852 2755 2661 3F40 2665 5602 2666 IF24 I812 F837 FB06 4B28 F710 F836 FD24 FB05 2729 2740 2738 3724 2763 4B29 I813 3605 4601 4602 4603 3625 3615 3626 ID31 2768 2714 2720 2717 2713 3711 2636 F613 I616 3614 3823 7820 I843 F861 2734 2749 2719 2712 2737 2727 2716 2637 2656 2657 5601 2655 I617 F982 F981 I816 5810 389C 2826 3847 38A2 3850 3858 6811 3880 3878 3881 2754 2602 2641 2612 2735 2732 5713 2610 2633 2632 FB52 ID38 FH27 2605 2634 2601 2680 2647 2675 2648 2678 2646 2679 3618 3603 3861 ID43 ID14 2687 2688 I614 ID32 2728 3718 3723 F612 4822 I633 ID37 ID30 3F39 2F34 FB51 2686 26A4 2690 IF14 FH31 2724 2722 2731 2608 2674 FH32 2756 2607 I618 F843 3F22 6810 6814 3857 5607 2827 2689 2835 2836 3851 3871 3873 3872 3852 FH36 FH35 FH33 2628 2699 2681 2672 3877 3876 ID42 ID36 2682 2669 2613 2625 2614 2627 2643 2645 2D60 3856 3863 2766 2767 I714 3713 2746 2629 3720 2615 3716 I623 2671 F216 2743 2677 IB01 I218 I222 3619 3604 3610 3609 3613 3617 3612 F230 2692 2691 3B24 5608 IB04 5218 F217 F841 2635 2603 2726 2640 2644 2685 I631 5B07 2D66 2249 2630 2631 2639 2616 2725 I636 5604 5603 2676 2684 2670 2683 2654 I632 2668 2609 F134 2623 26A1 2617 2694 5609 26A3 5600 A211 2D65 5605 2642 A210 FA20 38A1 3846 FE11 I562 26A2 2695 F229 2248 2663 2619 2660 2624 2653 2673 F614 2659 2658 2651 2649 5606 2650 2F31 3F36 2F28 2664 2662 2696 2667 I637 2652 I814 2F30 FF23 FF38 1F23 1F24 2697 5610 2693 6F19 6F18 I914 I913 7816 4918 4913 4917 4915 4916 4914 FH34 3866 3874 F831 2F29 FF25 F992 I911 26A0 2600 4102 3882 F832 3F41 3F35 3897 3822 F811 3883 F862 FF26 2F35 3F26 F988 I915 F966 I910 F835 I827 FF24 2917 I811 I842 2761 F237 389K 389L Part 1 18490_552a_090326.eps A225 F989 F991 3816 F810 F814 3821 I840 I839 F990 3820 7822 4800 3NA2 3NAB 3NAC 2263 I241 IF12 F813 389G F228 F986 4804 2NA8 3NB5 2NA7 3NA6 4803 4811 4810 3NA7 4802 3NA9 3NA8 3NAA 2810 I841 F252 F978 3NAY 3NAJ 3NAL 3NA4 9NA3 F204 2226 2218 F860 I829 A258 A214 I810 2751 5217 2260 2258 2225 F210 FF10 2242 2245 4808 INAT 3261 F257 2246 3210 2267 FNAC 2259 5208 4818 I825 I244 A213 I250 F985 F987 389H I242 F209 F983 F984 F812 3722 3717 2241 I231 7213 F208 I226 I243 F980 4806 2611 2622 2618 2620 I248 I245 2236 3238 2243 F211 3255 2240 3256 F260 2233 2247 I228 3242 4214 3240 A212 F227 IF10 I237 3243 3245 FF27 FF11 3236 3235 3234 2235 7214 3254 I239 F236 2237 I238 INAU F979 4815 2621 I251 I240 4809 INAY INAV FNAE F256 2262 7212 4807 F829 F826 F207 F973 F976 F977 2920 4816 3NA3 I214 INAW F972 F975 2812 4813 4805 4820 I235 I234 4817 4814 4812 F825 F969 I834 INAR F255 5811 I819 F971 F968 F974 3834 3837 I832 3NB4 7NA1 INAZ I252 I227 3NAK 4819 C002 I232 F215 2232 2228 3231 2244 3228 3247 3246 2252 2250 3241 3244 2251 2261 F206 F219 FNAF 4209 4207 2212 2266 2265 2200 3516 1213 I249 I233 2231 IF16 5207 2811 3NAH 2NA9 2NA3 F235 F205 5215 5214 I523 I230 INAQ 3230 I247 2229 F524 3D41 3511 2510 FF13 7503 2512 2NA4 I210 3217 3213 F214 2230 3232 3214 7810 INAP I213 F218 F213 F234 I253 3552 3553 I599 2213 I216 3525 7505 3524 6210 3554 7515 3D42 F525 FF36 2215 4208 7215 I211 3251 FF34 FF35 3215 2253 3262 4210 I597 5219 3555 I535 F203 I212 I215 FF33 F970 3899 3898 389B 389A I855 3NAU 3NAW FB56 3NAT 3828 2820 2819 2818 2817 2816 2815 3NAQ 4912 4911 4910 3NB1 3NAN 3NAP 3NB2 I912 2NAE 2216 FF32 3859 3NB3 2NAF 3NAV 3NA5 F251 2NA5 2NA2 F202 3NAR 1NA2 FNAD 2214 5206 3NAM F250 F201 FF31 FB44 4B34 FD22 18490_553_090326.eps 090327 31391236451.2 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 86 2F24 F927 IF19 FA15 FA16 FA14 FA13 FA19 FA18 I853 389D F920 F915 F917 F913 F859 F912 F925 F930 F916 F918 F914 F922 F929 F923 F993 F919 3A14 5A14 389F F864 F921 F928 2A10 3A10 IF20 2F25 3F33 2F32 3F37 2F18 IF21 F924 F926 FA17 F931 3F43 38A4 FF20 3F38 2F16 38A3 FF18 IF18 3F32 2F33 3F42 6F13 1F19 FF14 3F46 6F20 1F16 Layout Small Signal Board (Part 1 bottom side) 2921 F910 F933 FF37 F911 3A17 FF30 F932 2A11 3A11 5A16 3A16 3A15 I261 A259 F994 F934 3NAY 3NAJ 3NAL 3NA4 F981 4804 5810 2NA8 3848 2759 389C 2826 6811 FH36 3812 3892 2715 2714 5815 3835 3824 2837 I823 5814 I821 F823 F822 5813 F821 F820 INAS FNA9 FNA7 FNA5 ID34 FD25 FG14 FG13 1G15 1G14 1G13 FD27 3825 2821 I820 F819 FG19 2 F856 1D17 FG15 6G14 I849 6G15 6G17 ID35 3891 F827 F824 I850 F855 3889 F828 3827 FF28 3890 FB05 F865 F867 FD29 F853 FB55 FB54 FB48 I822 3888 3885 2758 2752 2757 2755 I852 2761 2661 3F40 2665 IF24 FD26 F837 FB06 4B28 FB53 I824 38A9 4B29 3884 F836 FD24 4B30 FB56 2717 2720 2713 2699 5602 2666 2656 2657 5601 2655 FB49 2711 2636 I812 3814 2763 3828 2820 2819 2818 2817 2816 2815 3625 2729 2740 2738 3724 2727 2716 2637 3711 2768 2739 2602 5713 2641 3626 ID31 3611 I843 ID38 2710 2735 F861 2734 2749 2719 2712 2737 2728 2732 I813 I616 2736 2605 2634 2601 3718 3723 F710 F613 3605 4601 4602 4603 ID32 7820 ID43 FH27 I617 3615 3861 ID14 2687 2688 FB52 FH31 2724 2722 2731 F612 I614 ID37 2628 2638 2604 2606 FH32 2762 3F39 2F34 4822 2686 26A4 I633 ID30 IF14 FH33 2607 2608 2674 FB51 2726 FH35 2756 I618 F843 2690 6810 3857 5607 2827 2689 6814 3F22 2835 2836 3851 3871 3873 3872 3852 2766 2635 2603 2743 CXXX 2681 2672 3877 3876 2613 2625 2614 2627 2643 2645 2D60 ID42 ID36 2682 2669 2671 F216 I222 3856 3863 I911 I914 I913 F841 FH34 I714 3713 2746 2629 3720 2615 3716 I623 3619 3604 3610 3609 3613 3617 3612 3614 3823 I218 2640 3618 3603 F217 2692 2691 3B24 5608 IB04 IB01 2610 2633 2632 2249 5218 F230 2680 2647 2675 2648 2678 2646 2679 5604 5603 2676 2684 2670 2683 2654 I632 2612 2685 26A3 2630 2631 2639 2616 2725 2644 2D66 2D65 I631 2677 A211 2668 F134 I636 5600 FE11 I562 5609 2659 2658 2651 2649 5606 2650 A210 2248 FA20 38A1 3846 2663 2619 2660 2624 2609 2623 26A1 2617 26A2 2695 F229 2653 2673 F614 5B07 I637 2652 2F31 3F36 2F28 2F29 2664 2662 2696 2667 2694 2697 5610 2693 5605 2642 2F30 I814 FF23 FF38 1F23 1F24 3866 3874 F831 6F19 6F18 I842 7816 26A0 2600 4102 3882 F832 FF25 F992 4918 4913 4917 4915 4916 4914 2767 I827 IF12 FF24 3897 3822 F811 3883 F862 FF26 3F41 3F35 I915 F966 I241 F228 2F35 3F26 2754 F835 F237 F988 I811 F814 3821 3858 3847 38A2 3850 3881 Part 1 3816 F810 I910 I840 I839 A225 F989 F991 2917 I912 4802 4803 4811 4810 3NB5 2NA7 3NA6 3NA7 3NA9 3NAA I816 9NA3 4800 3NA2 3NAB 3NAC 2263 F252 A258 A214 F813 389G 3261 F257 F986 F990 3820 3859 2218 2810 I841 2246 3210 2267 F860 I829 3880 3878 A213 I250 2226 F204 F210 I810 INAT 2751 5217 2245 FNAC 4808 389K 389L I244 F209 I243 2259 5208 4818 I825 I245 FF10 2242 F208 F985 F987 F812 3722 3717 2241 2233 2247 I226 F983 F984 4816 2621 I231 I228 I242 FNAE F256 F979 4815 389H I248 3242 4214 3240 INAU 2920 4813 389I F260 IF10 I237 7213 A212 3236 3235 3234 2235 F826 F207 F236 F211 FF11 I239 3255 2240 3256 3243 3245 F227 7214 3254 FF27 2236 3238 2243 4809 INAY INAV F973 F980 4805 4807 INAW F972 F977 3834 3837 4806 3NA3 I214 I252 2237 I238 I234 4814 4812 F825 F969 F976 I834 4819 F255 F971 F975 2812 I832 2611 2622 2618 2620 7212 I251 I240 7NA1 INAZ F974 5811 I819 3NB4 4817 F829 I227 3NAK INAR 4820 I235 FNAF 3NA8 I232 2232 2228 3231 2244 F206 F219 C002 3516 F215 2231 1213 I249 I233 3228 3247 3246 2252 2250 3241 3244 2251 2261 7810 2811 3NAH 2NA9 2NA3 5207 F205 2262 5215 5214 F234 F235 2260 2258 2225 2213 2230 3232 3214 I523 I230 INAQ I210 3230 I247 IF16 2NA4 4209 4207 2212 2266 2265 2200 I599 3217 3213 F214 2229 F524 3D41 3511 2510 7503 2512 FF13 6210 3525 7505 3524 FF36 3552 3553 7515 3D42 F525 FF35 F218 F213 5219 3251 I216 3NAU F968 3NAW INAP I213 I253 I597 3554 2215 4208 7215 I211 3555 I535 FF34 F203 I212 I215 FF33 3215 2253 3262 4210 2216 FF32 F970 3899 3898 389B 389A I855 F982 3NAT F978 3NAQ 4912 4911 4910 3NAP 3NAN 3NAR 3NB2 2764 2NAE 7822 3NB3 2NAF 3NAV 3NA5 F251 2NA5 F202 2NA2 5206 3NB1 1NA2 FNAD 2214 3NAM F250 F201 FF31 18490_553a_090326.eps 090326 2009-Apr-10 Circuit Diagrams and PWB Layouts LC9.1A LA 10. EN 87 1G15 1G14 1G13 FG19 FD23 FH17 5G12 3G12 2144 FG17 2G11 6G12 FG18 5G11 3G11 FG20 FG12 6G11 FD12 FNA6 4G14 FNA8 FH16 4G12 FG11 2G12 2132 I123 F131 2133 I119 I107 I105 I122 I120 I104 2171 2127 I100 5102 7101 3D15 2D20 2E72 3E78 2E49 3E60 5D02 3D17 FD17 5D03 6D16 FD18 1D18 FD15 2D13 ID25 3D20 3D21 2D22 FD21 2D25 3D18 2D51 2120 F115 I521 I560 3D35 F580 ID28 ID22 1D20 3517 6502 I530 ID26 2D40 3D36 2D52 3557 3556 6501 3523 2565 7517 I598 I512 1E10 7504 F522 FH30 I524 ID29 FD20 FD19 1D21 1D23 FE14 3508 6D14 2D50 3D11 3D13 2D14 FD14 6D12 3E99 IE11 5D01 3EA0 3507 IE95 FE15 1E13 3566 F518 7E02 1D15 1D08 I513 7516 7500 I510 3D33 2503 2E55 3E94 3E68 2E18 6E26 FE32 IE21 F516 I522 I518 3510 3520 I519 3501 7501 6500 I516 3515 3514 3559 I511 3512 F523 3521 3500 6D18 3560 7519 2D53 3565 I525 3564 2569 2E69 2D29 FH11 3E56 2521 2559 I526 FD13 6E30 4B36 4B35 6D09 I833 2824 2162 2520 3D34 2E50 F541 2E70 3D52 2D28 ID12 6E28 2D70 5D00 F542 I566 3502 3562 2H23 4D00 ID13 2E54 3E67 2E16 F543 I565 2560 IE20 3509 2H24 IE96 FE18 1E18 F544 F539 2519 I568 F545 3E90 2E51 2E10 3E64 1B11 1B12 1B13 1B14 1E14 FE35 3E66 2E14 IE18 F546 5507 2518 3531 IE78 F548 3D28 6E32 C051 2561 2562 2563 2564 I582 2D41 IE24 2E57 2E58 3E71 2E24 2537 F547 7102 FE39 FB45 IE29 2553 5508 2524 F593 3563 IE01 2E23 3E70 3548 2556 I596 I576 I515 IE26 F112 I570 F512 2E53 7815 3841 3879 3845 6100 I595 F515 IE16 3101 3544 7513 5502 2522 I587 I589 2549 2532 I564 2523 I581 F569 F849 FB27 2116 7511 7507 2121 6503 3621 2513 I580 3519 FD28 4E06 I583 6D17 IE25 3EA7 2E71 3E79 3E57 2E47 2543 I559 5E17 F113 3102 F126 4502 FF12 F114 I835 2124 F550 3561 6E04 FE49 2539 2540 3540 7518 5E19 6E16 4E07 1E26 FE51 FE50 2E06 3E07 3E12 2E07 1E03 FB37 4B37 7B04 4B18 3B37 IE99 FB40 4B39 4B38 3842 I573 2E40 3E43 3D59 FB38 3B36 I838 I571 3EA6 FB23 FB20 2542 I590 I572 I527 3B43 FB16 F116 I588 F536 2E65 3E75 F117 3840 F123 3550 IE14 F118 F111 3541 I552 I586 2515 F119 2122 I554 I585 I577 2H25 4E10 4E11 3D57 IE89 5E16 7B09 IE72 3EA9 3EA5 F535 3528 I563 3E47 3D58 FB24 3529 4101 2119 4100 2118 I584 I575 2H26 IE56 I546 F579 3530 2E33 3E36 3E73 2E63 I543 I578 FH26 3E27 5E15 FE38 3EA8 3EA4 5E12 6E10 4E12 6E14 1E02 FE26 4E08 I630 F615 IE34 3E08 FB42 3E81 2E59 F540 1E24 6E03 FE48 FH24 2E26 3E24 IE42 IE17 2E02 5E14 FB09 3E01 2E03 3E02 4E13 2E04 4E09 3E06 2E05 5E13 3E04 FB08 3E03 3B10 3B73 3B35 3B34 3B61 6E02 FB26 7B02 3B75 4B40 7B06 2128 7508 IE13 2698 3623 6601 FH23 2568 2B50 FE36 FH25 6B07 2B51 1E20 3B76 3B60 3B72 3624 I629 5H12 FH21 1E01 F538 I544 3527 3526 7506 3622 FH20 3B40 FG16 7605 FH22 3B58 3B44 3865 3864 6600 F616 F100 I103 FB17 7B03 2B26 3B62 FB07 7B07 FB18 2163 3107 3138 3140 2154 I102 F132 FH19 FB33 I124 6102 I131 2156 3130 3135 3104 3103 I126 I129 I134 I130 I125 2164 FB25 FB19 3B32 F101 2109 F120 2152 3B63 3B33 FB10 6813 I132 FB22 IB09 2110 2168 6101 F868 IB11 FB47 FB57 6812 F103 3549 2B25 IB10 IB02 1811 2125 2104 2108 3B11 3B39 3B663B67 2B24 3B45 FB29 1814 F104 3100 2111 IB12 IB14 3B48 3172 3173 3B38 3B64 FE47 FB28 2155 3131 3122 2161 3125 2160 5B01 3B65 2B11 F133 FB11 3F28 6F16 2F20 1F02 1F01 2B16 IB03 FB30 I110 F105 I111 I127 I135 IF22 IB16 F848 2101 3171 2153 2157 IF23 3B41 3868 3869 F106 3811 3810 3F27 6F17 1F03 Part 2 I128 FH18 F847 I108 I109 3136 FB21 FB32 3B49 3199 2100 2123 5F13 FF16 F107 F102 6F15 3F25 F108 2115 2169 2102 3F24 FB31 2112 2137 F611 2105 7F01 FF21 FF15 F110 F124 F122 IG02 4G13 FNAB FF17 2113 I136 4G11 IG01 FNAA FF19 I106 F125 5H11 FF29 2167 3108 F109 I118 FH15 2114 I117 2165 3134 FH14 2134 1G11 FD27 2135 2138 3106 3105 3109 FD25 ID34 FNA5 2139 FNA7 1G12 FNA9 FNA4 5H10 INAS 2142 3119 2141 F856 3139 3129 2166 1D17 Layout Small Signal Board (Part 2 bottom side) FB44 FD22 4B34 18490_553b_090326.eps 090410 2009-Apr-10 www.s-manuals.com
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.4 Linearized : No Page Mode : UseOutlines XMP Toolkit : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39 Format : application/pdf Creator : Title : Philips Chassis LC9.1A LA - Service Manual. www.s-manuals.com. Subject : Philips Chassis LC9.1A LA - Service Manual. www.s-manuals.com. Create Date : 2009:04:10 15:21:42Z Creator Tool : FrameMaker 7.2 Modify Date : 2014:06:13 10:28:47+03:00 Metadata Date : 2014:06:13 10:28:47+03:00 Producer : Acrobat Distiller 8.1.0 (Windows) Document ID : uuid:680a411d-c47e-41c2-8bb2-aca38de7a1b4 Instance ID : uuid:0f9281ee-f004-4555-b36f-cd3dcfa118ee Page Count : 88 Page Layout : SinglePage Keywords : Philips, Chassis, LC9.1A, LA, -, Service, Manual., www.s-manuals.com. Warning : [Minor] Ignored duplicate Info dictionaryEXIF Metadata provided by EXIF.tools