Quanta BU2 Schematics. Www.s Manuals.com. R1a Schematics

User Manual: Motherboard Quanta BU2 DA0BU2MB8F0 - Schematics. Free.

Open the PDF directly: View PDF .
Page Count: 36

Download
Open PDF In Browser	View PDF

1

2

3

4

5

6

7

8

01

BU2 SYSTEM DIAGRAM

PCB STACK UP
LAYER 1 : TOP
LAYER 2 : SGND
A

DDRII 667/800 MHz

DDRII-SODIMM1

LAYER 3 : IN1

AMD Lion
Sabie
Griffin

PAGE 8

LAYER 4 : SVCC

S1G2 Processor

DDRII 667/800 MHz

DDRII-SODIMM2

LAYER 5 : IN2

CPU THERMAL
SENSOR

A

14.318MHz

PAGE 6

638P (uPGA)/35W
PAGE 4,5,6,7

PAGE 8

CPU_CLK

LAYER 6 : IN3
LAYER 7 : SGND1

NBGFX_CLK

CLOCK GEN

NBGPP_CLK

ICS9LPRS480AKLFT

SBLINK_CLK

HT LINK

SLG8SP628VTR
RTM880N-795

LAYER 8 : BOT

PCI-E
X1

X1

LAN
Marvell
PCIE-LAN
B

X1

NORTH BRIDGE

X1

Express Card

Mini PCI-E Card

(NEW CARD)

HD-DVD
(ROBSON/TV)

(Wireless LAN)

PAGE 24

PAGE 23

PAGE 23

8040T/8072
(10/100/GagaLAN)

PAGE 24

CRT
PAGE 19

RS780M

Mini PCI-E Card

21mm X 21mm, 528pin BGA

LED Driver

LED Panel

PAGE 17
NAND FLASH CARD

SBSRC_CLK

IDE/133

0,10,11

SATA0 150MB

SATA - HDD

SYSTEM CHARGER(ISL88731)

SYSTEM POWER ISL6237IRZA-T

SB700

SATA1 150MB

SATA - CD-ROM

2

Felice
PAGE 25

5

Webcam
PAGE 17
X1

6

Fingerprint
PAGE 25

PAGE 19

C

4.3W(Int)

SATA2 150MB

Azalia

PAGE 12,13,14,15,16

PAGE 20

PCMCIA

O2 OZ129T

Controller

PAGE 32
G-Sensor
LIS3L02AQ3

CB1410

SMBUS

MDC/FM TUNER

LPC

PAGE 19

DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116REGR)

PAGE 34

Keyboard
CIR

PAGE 29
PAGE 28

Touch Pad
Kill SW

PAGE 25
PAGE 29

PAGE 27

DISCHARGE 1.5/1.25/1.2/1.1V

PAGE 35

PAGE 26
PCMCIA

WINBOND KBC
WPC8763LDG

PAGE 21
MDC/FM TUNER
Module

PAGE 28

VR (AUDIO CONN)
PAGE 27
FAN

FLASH

PAGE 27

Digital MIC

PAGE 28

HP
Amplifier
G1412

Audio
Amplifier
G1441

PAGE 27

PAGE 26

AUDIO CONN
(HP/ MIC)

SPI
PAGE 6

PAGE22

PAGE21

CONEXANT
CX20561

CONNECTOR

PAGE 33

PAGE 16,26

PAGE 27

IEEE1394
CONN

Memory
CardReader

PAGE 22

PAGE 22

PCI ROUTING
IDSEL
TABLE
REQ0# / GNT0# AD17

INTERUPT
INTE#

OZ129T

REQ1# / GNT1# AD18

INTF#

CB1410

PAGE 26

Document Number

4

5

6

7

Rev
1A

BLOCK DIAGRAM

Date: Wednesday, January 30, 2008
3

D

PROJECT : BU2
Quanta Computer Inc.

Conn

Size
Custom

2

DEVICE

SPEAKER

NB4
1

NEW CARD
PAGE 24

4.5W(Ext)

E-SATA

VCCP +1.1V AND +1.2V(MAX8717)

7

Bluetooth
PAGE 25

PCI BUS / 33MHz

21mm X 21mm, 528pin BGA

PAGE 20

PAGE 31
CPU CORE ISL6265A

1

USB2.0 Ports
X4 PAGE 20,23

SOUTH BRIDGE

PAGE 20

PAGE 30

4,8

USB2.0

PAGE 23

D

Mini PCI-E Card x1
HD DVD DECODER x1

PAGE 17

PCIE X4

PAGE 24

C

B

LVDS
PAGE 17

PAGE 9,10,11
RJ45/RJ11 Board

PAGE 3

HDMI/CEC
PAGE 18

Sheet

1
8

of

35

5

4

3

INDEX

2

1

02

Power Sequence

PAGE#

DESCRIPTION

NOTE
AC IN

1

SCHEMATIC BLOCK DIAGRAM

2

SYSTEM INFORMATION

3

CLOCK GENERATOR_SLG8SP628

4

S1G2 HT I/F 1/4

5

S1G2 DDRII MEMORY I/F 2/4

6

S1G2 CTRL & DEBUG 3/4

7

S1G2 PWR & GND 4/4

3V/5VPCU

D

D

8

DDR2 SODIMMS: A/B CHANNEL

9

RS740/RS780-HT LINK/PCIE I/F 1/4

10

RS740/RS780-SYSTEM I/F 3/5

11

RS740/RS780-POWER5/5

12

SB700-PCIE/PCI/CPU/LPC 1/4

13

SB700-ACPI/GPIO/USB 2/4

14

SB700-ACPI/GPIO/USB 2/4

15

SB700-PWR/DECOUPLING 4/4

16

SB700-STRAPS & PWRGD

NBSWON#
DNBSWON#

LCD/LED PANEL/LID/CAMERA

18

HDMI/HDMI-CEC(R5F211A)

19

CRT & G-SENSOR(LIS3L02A)

20

SATA HDD/ODD & ESATA/USB

21

PCMCIA(CB1410) -OPTION

22

OZ129T(5IN1/1394)

23

MINI CARD & NAND FLASH CARD

24

NEW CARD & RJ45 BOARD/BEEP

25

TP/FP/BT/PB/FELICA/MMB CONN

26

CONEXANT(CX205601)/SPK/AMP

27

JACK/VR/FM/MIC/MDC/AMPLIFIER

28

EC(KBC)-WPCPC8763/WPC8769

29

KEYBOARD/LED/KILL SW/HOLE

30

CHARGER (ISL6251A)

31

SYSTEM 5V/3V (ISL6237)

32

AMD GRIFFIN (ISL6265)

33

+NB_CORE (RT8202)

34

DDR 1.8V(TPS51116)

35

DISCHARGE (1.25V/1.5V)

SB700 SMBUS

S5_ON/S5

SMBCLK0
SMBCLK1

Mini Card/New Card (+3VS5)

SMBDAT1

PCIE_WAKE#

SMBCLK2

HDMI CEC (+3VS5)

SMBDAT2

SUSC

SMBUS Function Define
DDR / DDR THER / CLOCK GEN (+3V)

SMBDAT0

RSMRST#

SUSB

C

17

SB700 SM BUS

C

SUSON

KBC(EC) SM BUS

MAINON
VR_ON

KBC SMBUS
CPU_CORE

MBCLK

BATTERY (+3VPCU)

MBDAT

VRM_PWRGD

2ND_MBCLK
2ND_MBDATA

1.2_ON

3ND_MBCLK
3ND_MBDATA

NB_CORE

SMBUS Function Define

CPU THER / SENSOR/EC (+3V/PCU)
HDMI CEC / TOUCH SEN(+3VS5)

HWPG

B

B

ECPWROK
NB_PWRGD_IN
SB_PWRGD_IN
CPU CLK IN
CPU RESET
CPU POWER OK
CPU_LDTSTOP#

A

A

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

SYSTEM INFORMATION

Date: Thursday, November 08, 2007
1

Sheet

2

of

35

5

4

3

2

1

03

CLK_GEN_SLG8SP628
+3V

+3V_CLK_VDD

+1.2V

+1.2V_CLK_VDDIO

L45

L46

BK1608HS600

BK1608HS600

D

C448

C238

C453

C232

C233

C472

C474

C241

C454

C473

C455

C463

C458

C452

22u/10V_8

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

22u/10V_8

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

ICS9LPRS480

P/N :

SLG8SP628

P/N : AL8SP628000

RTM880N-796

P/N : AL000880000

Clock chip has internal serial terminations
for differencial pairs, external resistors are
reserved for debug purpose.

Place within 0.5"
of CLKGEN

R369

U31

+3V_CLK_VDD

BK1608HS600
C461
2.2u/6.3V_6

C

+1.2V_CLK_VDDIO

1
7
10
18
24
33
43
46
52
60

C460
2

CG_XIN
33p/50V_4

1

Y6
14.318MHZ
C462

11
17
25
34
47

CG_XOUT

33p/50V_4
CG_XIN
CG_XOUT

61
62

Rev:2A 12/07 Cahnge C460/C462 Load Capacitance For Matching Crystal..
2
3

(8,13) PCLK_SMB
(8,13) PDAT_SMB
CLK_PD#

New Card CLKREQ#
B

(13,24) NEW_CLKREQ#

NEW_CLKREQ#
C227
0.1u/10V_4

T43
T41
T38
T39

51
23
45
44
39
38

+3V_CLK_VDD
R368
R371

VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDDREF
VDD48

ATIG0T
ATIG0C
ATIG1T
ATIG1C
SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C

VDDSRC_IO0
VDDSRC_IO1
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO
GND48
GNDDOT
GNDSRC0
GNDSRC1
GNDATIG
GNDSB_SRC
GNDSATA
GNDCPU
GNDHTT
GNDREF

SRC0T
SRC0C
SRC1T
SRC1C
SRC2T
SRC2C
SRC3T
SRC3C
SRC4T
SRC4C

QFN64

SRC6T/SATAT
SRC6C/SATAC
SRC7T/27M_SS
SRC7C/27M_NS

X1
X2
SMBCLK
SMBDAT

HTT0T/66M
HTT0C/66M

PD#
CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#

SLG8SP628
8.2K_4
8.2K_4

CPUK8_0T
CPUK8_0C

48MHz_0
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27

CPUCLKP_R
CPUCLKN_R

RP63

30
29
28
27

NBGFX_CLKP_R
NBGFX_CLKN_R

RP66

37
36
32
31

SBLINK_CLKP_R
SBLINK_CLKN_R
SBSRC_CLKP_R
SBSRC_CLKN_R

RP62

22
21
20
19
15
14
13
12
9
8

NBGPP_CLKP_R
NBGPP_CLKN_R
CLK_PCIE_NEW_R
CLK_PCIE_NEW#_R
CLK_PCIE_MINI_R
CLK_PCIE_MINI#_R
CLK_PCIE_MINI2_R
CLK_PCIE_MINI2#_R
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

RP67

RP64

RP68
RP72
RP71
RP73

*261/F_4

1
3

2 0_4P2R_4
4

1
3

2 0_4P2R_4
4

NBGFX_CLKP
NBGFX_CLKN

(10)
(10)

1
3
1
3

2 0_4P2R_4
4
2 0_4P2R_4
4

SB_REFCLKP
SB_REFCLKN
SBSRC_CLKP
SBSRC_CLKN

(10)
(10)
(12)
(12)

1
3
1
3
1
3
1
3
1
3

2
4
2
4
2
4
2
4
2
4

CPU_CLKP
CPU_CLKN

NBGPP_CLKP
NBGPP_CLKN
NEW@0_4P2R_4
0_4P2R_4

0_4P2R_4

CLK_PCIE_MINI
CLK_PCIE_MINI#

0_4P2R_4
0_4P2R_4

CLK_PCIE_LAN
CLK_PCIE_LAN#

(6,12)
(6,12)

To CPU

To NB

C

To NB
To SB

T101
T102
CLK_PCIE_NEW (12,24)
CLK_PCIE_NEW# (12,24)

To New Card
To Mini PCIE Slot

CLK_PCIE_MINI2 (12,23)
CLK_PCIE_MINI2# (12,23)

To Mini PCIE Slot
To LAN Controller

NB CLOCK INPUT TABLE
42
41
6
5

T40
T42
T45
T44

54
53

NBHT_REFCLKP_R
NBHT_REFCLKN_R

64

CLK_48M_USB_R

59
58
57

SEL_HTT66
SEL_SATA
SEL_27

RP65

2 0_4P2R_4
4

1
3

R385

33_4

R178
R374

TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6
TGND7
TGND8
TGND9

+3V_CLK_48
L49

50
49

HT_REFCLKP
HT_REFCLKN
CLK_48M_USB

158/F_4
90.9/F_4

(10)
(10)
(13)

EXT_NB_OSC (10)

NB CLOCKS

RX780

HT_REFCLKP

100M DIFF

RS780

HT_REFCLKN

100M DIFF

100M DIFF

REFCLK_P

14M SE (1.8V)

14M SE (1.1V)

To NB
To SB

REFCLK_N

NC

GFX_REFCLK

100M DIFF

100M DIFF(IN/OUT)*

vref

GPP_REFCLK

100M DIFF

NC or 100M DIFF OUTPUT

GPPSB_REFCLK

100M DIFF

RX780

1.8V 82.5R/130R

RES CHIP 82.5 1/16W +-1%(0402) --> CS08252FB11
RES CHIP 130 1/16W +-1%(0402)L-F --> CS11302FB15

RS780

1.1V 158R/90.9R

RES CHIP 158 1/16W +-1%(0402) --> CS11582FB00
RES CHIP 90.9 1/16W +-1%(0402) --> CS09092FB15

B

FOR EXTERMAL/INTERNAL CLOCK

+3V_CLK_VDD

R377
8.2K_4

1

66 MHz 3.3V single ended HTT clock

0*

100 MHz differential HTT clock

1*

100 MHz non-spreading differential SRC clock

0

100 MHz spreading differential SRC clock

CLK_PCIE_MINI
CLK_PCIE_MINI#

4
2

3
1

RP70
0_4P2R_4

CLK_PCIE_LAN
CLK_PCIE_LAN#

2
4

1
3

RP45
0_4P2R_4

PCIE_CLK_MINI (12,23)
PCIE_CLK_MINI# (12,23)

SEL_HTT66
SEL_SATA
SEL_HTT66
SEL_27

PCIE_CLK_LAN (12,24)
PCIE_CLK_LAN# (12,24)

SEL_SATA
R380
8.2K_4

R373
8.2K_4

1

27MHz and 27M SS outputs

0*

100 MHz SRC clock

Place Close to Drivers Side

SEL_27

A

100M DIFF

To NB

NB_OSC

NEW_CLKREQ#
CLK_PD#

R181
*8.2K_4

100M DIFF

R4004/R4005 (value may change)

65
66
67
68
69
70
71
72
73
74

+3V

4
16
26
35
40
48
55
56
63

D

A

* default

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

Date: Thursday, July 24, 2008
5

4

3

2

Rev
1A

CLOCK GENERATOR_SLG8SP628
1

Sheet

3

of

35

5

4

3

2

1

04
U26A

+1.2V_VLDT

+1.2V_VLDT

D

C

B

D

D1
D2
D3
D4

VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3

HT LINK

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

AE2
AE3
AE4
AE5

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3

HT_CPU_NB_CAD_H0 (9)
HT_CPU_NB_CAD_L0 (9)
HT_CPU_NB_CAD_H1 (9)
HT_CPU_NB_CAD_L1 (9)
HT_CPU_NB_CAD_H2 (9)
HT_CPU_NB_CAD_L2 (9)
HT_CPU_NB_CAD_H3 (9)
HT_CPU_NB_CAD_L3 (9)
HT_CPU_NB_CAD_H4 (9)
HT_CPU_NB_CAD_L4 (9)
HT_CPU_NB_CAD_H5 (9)
HT_CPU_NB_CAD_L5 (9)
HT_CPU_NB_CAD_H6 (9)
HT_CPU_NB_CAD_L6 (9)
HT_CPU_NB_CAD_H7 (9)
HT_CPU_NB_CAD_L7 (9)
HT_CPU_NB_CAD_H8 (9)
HT_CPU_NB_CAD_L8 (9)
HT_CPU_NB_CAD_H9 (9)
HT_CPU_NB_CAD_L9 (9)
HT_CPU_NB_CAD_H10 (9)
HT_CPU_NB_CAD_L10 (9)
HT_CPU_NB_CAD_H11 (9)
HT_CPU_NB_CAD_L11 (9)
HT_CPU_NB_CAD_H12 (9)
HT_CPU_NB_CAD_L12 (9)
HT_CPU_NB_CAD_H13 (9)
HT_CPU_NB_CAD_L13 (9)
HT_CPU_NB_CAD_H14 (9)
HT_CPU_NB_CAD_L14 (9)
HT_CPU_NB_CAD_H15 (9)
HT_CPU_NB_CAD_L15 (9)

(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

(9)
(9)
(9)
(9)

HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1

J3
J2
J5
K5

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

Y1
W1
Y4
Y3

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

(9)
(9)
(9)
(9)

(9)
(9)
(9)
(9)

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

N1
P1
P3
P4

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

R2
R3
T5
R5

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

(9)
(9)
(9)
(9)

+1.2V

+1.2V_VLDT

R82

0_8

R81

0_8

Place close to socket

C221

C220

C219

C71

C218

C80

C72

4.7u/6.3V_6

4.7u/6.3V_6

0.22u/6.3V_4

0.22u/6.3V_4

180P_4

180P_4

4.7u/6.3V_6

C

* If VLDT is connected only on one side,
one 4.7uF cap should be added to
the island side

B

SOCKET_638_PIN

C26

A

CPU

D26

E26

F26

G26

E25

F25

G25

B25

C25

A24

B24

C24

D24

E24

F24

G24

A23

B23

C23

D23

E23

F23

G23

A22

B22

C22

D22

E22

F22

G22

A21

B21

C21

D21

E21

F21

G21

A20

B20

C20

D20

E20

F20

A19

B19

C19

D19

E19

F19

A18

B18

C18

D18

E18

F18

G18

D25

H26

J26

K26

L26

M26

H25

J25

K25

L25

M25

H24

J24

K24

L24

M24

N24

H23

J23

K23

L23

M23

N23

H22

J22

K22

L22

M22

N22

N26

P26

R26

N25

P25

R25

P24

R24

P23

P22

R23

R22

T26

U26

V26

W26

Y26

AA26

AB26

AC26

AD26

T25

U25

V25

W25

Y25

AA25

AB25

AC25

AD25

T24

U24

V24

W24

Y24

AA24

AB24

AC24

AD24

AE24

AF24

T23

T22

U23

V23

W23

Y23

AA23

AB23

AC23

AD23

AE23

AF23

U22

V22

W22

Y22

AA22

AB22

AC22

H21

J21

K21

L21

M21

N21

P21

R21

T21

H20

J20

K20

L20

M20

N20

P20

R20

T20

AD22

AE22

AF22

U21

V21

W21

Y21

AA21

AB21

AC21

AD21

AE21

AF21

U20

V20

Y20

AA20

AB20

AC20

AD20

H19

J19

K19

L19

M19

N19

P19

R19

T19

AE20

AF20

U19

V19

Y19

AA19

AB19

AC19

AD19

AE19

H18

J18

K18

L18

M18

N18

P18

R18

T18

AF19

U18

V18

Y18

AA18

AB18

AC18

AD18

AE18

AF18

W18

AE25

A17

B17

C17

D17

E17

F17

G17

H17

J17

K17

L17

M17

N17

P17

R17

T17

U17

V17

W17

Y17

AA17

AB17

AC17

AD17

AE17

AF17

A16

B16

C16

D16

E16

F16

G16

H16

J16

K16

L16

M16

N16

P16

R16

T16

U16

V16

W16

Y16

AA16

AB16

AC16

AD16

AE16

AF16

A15

B15

C15

D15

E15

F15

G15

H15

J15

K15

L15

T15

U15

V15

W15

Y15

AA15

AB15

AC15

AD15

AE15

AF15

A14

B14

C14

D14

E14

F14

G14

H14

J14

K14

L14

T14

U14

V14

W14

Y14

AA14

AB14

AC14

AD14

AE14

AF14

A13

B13

C13

D13

E13

F13

G13

H13

J13

K13

L13

T13

U13

V13

W13

Y13

AA13

AB13

AC13

AD13

AE13

AF13

A12

B12

C12

D12

E12

F12

G12

H12

J12

K12

L12

T12

U12

V12

W12

Y12

AA12

AB12

AC12

AD12

AE12

AF12

A11

B11

C11

D11

E11

F11

G11

H11

J11

K11

L11

M11

N11

P11

R11

T11

U11

V11

W11

Y11

AA11

AB11

AC11

AD11

AE11

AF11

A10

B10

C10

D10

E10

F10

G10

H10

J10

K10

L10

M10

N10

P10

R10

T10

U10

V10

W10

Y10

AA10

AB10

AC10

AD10

AE10

AF10

A9

B9

C9

D9

E9

F9

H9

J9

K9

L9

M9

N9

P9

R9

T9

U9

V9

G9

W9

Y9

AA9

AB9

AC9

AD9

AE9

B8

C8

D8

E8

F8

H8

J8

K8

L8

M8

N8

P8

R8

T8

U8

V8

W8

AA8

AB8

AC8

AD8

AE8

AF8

B7

C7

D7

E7

F7

H7

J7

K7

L7

M7

N7

P7

R7

T7

U7

V7

W7

AA7

AB7

AC7

AD7

AE7

AF7

A6

B6

C6

D6

E6

K6

L6

M6

N6

P6

R6

T6

U6

V6

W6

AA6

AB6

AC6

AD6

A5

B5

C5

D5

L5

M5

N5

P5

R5

T5

U5

V5

W5

C4

D4

L4

M4

P4

R4

T4

U4

V4

C3

P3

R3

T3

U3

A4

B4

A3

B3

A1

F6

G6

H6

J6

AE6

AF6

E5

F5

G5

H5

J5

K5

Y5

AA5

AB5

AC5

AD5

AE5

AF5

E4

F4

G4

H4

J4

K4

W4

Y4

AA4

AB4

AC4

AD4

AE4

AF4

D3

E3

F3

G3

H3

J3

K3

L3

V3

W3

Y3

AA3

AB3

AC3

AD3

AE3

C2

D2

E2

F2

G2

H2

J2

K2

L2

M2

N2

P2

R2

T2

U2

V2

W2

Y2

AA2

AB2

AC2

AD2

AE2

C1

D1

E1

F1

G1

H1

J1

K1

L1

M1

N1

P1

R1

T1

U1

V1

W1

Y1

AA1

AB1

AC1

AD1

M3

N4

N3

Y6

A

AF9

A8

A7

PROJECT : BU2
Quanta Computer Inc.

BGA638_50_26SQ_S1G2_OEM

Size
B
NB4

Document Number

Rev
1A

S1G2 HT I/F 1/4

Date: Thursday, July 24, 2008
5

4

3

2

Sheet
1

4

of

35

A

B

C

D

E

05

+1.8VSUS

CPU

R327
1K/F_4

+1.8VSUS

R324
R325

D10
C10
B10
AD10
M_ZP
M_ZN

39.2F_4
39.2F_4

AF10
AE10

T32

MEM_MA_RESET#

H16

T15
T14

MEM_MA1_ODT0
MEM_MA1_ODT1

T19
V22
U21
V19

T11
T10

CPU_MA1_CS_L0
CPU_MA1_CS_L1

T20
U19
U20
V20

T26
T24

CPU_MA_CLK_H5
CPU_MA_CLK_L5
MEM_MA_CLK1_P
MEM_MA_CLK1_N
MEM_MA_CLK7_P
MEM_MA_CLK7_N
CPU_MA_CLK_H4
CPU_MA_CLK_L4

N19
N20
E16
F16
Y16
AA16
P19
P20

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19

(8) MEM_MA0_ODT0
(8) MEM_MA0_ODT1

(8) MEM_MA0_CS#0
(8) MEM_MA0_CS#1

J22
J20

(8) MEM_MA_CKE0
(8) MEM_MA_CKE1

(8)
(8)
(8)
(8)

MEM_MA_CLK1_P
MEM_MA_CLK1_N
MEM_MA_CLK7_P
MEM_MA_CLK7_N
T23
T17

(8) MEM_MA_ADD[0..15]
3

(8) MEM_MA_BANK0
(8) MEM_MA_BANK1
(8) MEM_MA_BANK2

R20
R23
J21

(8) MEM_MA_RAS#
(8) MEM_MA_CAS#
(8) MEM_MA_WE#

R19
T22
T24

VTT1
VTT2
VTT3
VTT4

MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9

MEMZP
MEMZN

VTT_SENSE

RSVD_M1

MEMVREF

MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1

RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0

MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

MA_CKE0
MA_CKE1

MB_CKE0
MB_CKE1

MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4

MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MA_BANK0
MA_BANK1
MA_BANK2

MB_BANK0
MB_BANK1
MB_BANK2

MA_RAS_L
MA_CAS_L
MA_WE_L

MB_RAS_L
MB_CAS_L
MB_WE_L

R323

Processor Memory Interface
C398

C388

1000P_4

0.1u/10V_4

U26C
(8) MEM_MB_DATA[0..63]

1K/F_4

W10
AC10
AB10
AA10
A10
Y10

CPU_VTT_SENSE

W17

MEMVREF_CPU

B18

MEM_MB_RESET#

W26
W23
Y26

MEM_MB1_ODT0

V26
W25
U22

CPU_MB1_CS_L0

CPU_VTT_SENSE

(34)

T97
MEM_MB0_ODT0 (8)
MEM_MB0_ODT1 (8)
T83
MEM_MB0_CS#0 (8)
MEM_MB0_CS#1 (8)
T18

J25
H26

MEM_MB_CKE0 (8)
MEM_MB_CKE1 (8)

P22
R22
A17
A18
AF18
AF17
R26
R25

CPU_MB_CLK_H5
CPU_MB_CLK_L5
MEM_MB_CLK1_P
MEM_MB_CLK1_N
MEM_MB_CLK7_P
MEM_MB_CLK7_N
CPU_MB_CLK_H4
CPU_MB_CLK_L4

P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

T22
T19
MEM_MB_CLK1_P (8)
MEM_MB_CLK1_N (8)
MEM_MB_CLK7_P (8)
MEM_MB_CLK7_N (8)
T85
T87
MEM_MB_ADD[0..15]

R24
U26
J26

MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2

U25
U24
U23

MEM_MB_RAS# (8)
MEM_MB_CAS# (8)
MEM_MB_WE# (8)

(8)

(8)
(8)
(8)

SOCKET_638_PIN

MEM_MA_CLK1_P

MEM_MB_CLK1_P

(8) MEM_MB_DM[0..7]

2

C439

C435
1.5P_4

1.5P_4
MEM_MA_CLK1_N

MEM_MB_CLK1_N

MEM_MA_CLK7_P

MEM_MB_CLK7_P
C64

C399
1.5P_4

(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)

1.5P_4
MEM_MA_CLK7_N

Place close to CPU within 1500 mils

MEM_MB_CLK7_N

+SMDDR_VTERM

C390

C389

C225

C224

C397

C394

C392

C396

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

0.22u/6.3V_4

0.22u/6.3V_4

0.22u/6.3V_4

0.22u/6.3V_4

MEM_MB_DQS0_P
MEM_MB_DQS0_N
MEM_MB_DQS1_P
MEM_MB_DQS1_N
MEM_MB_DQS2_P
MEM_MB_DQS2_N
MEM_MB_DQS3_P
MEM_MB_DQS3_N
MEM_MB_DQS4_P
MEM_MB_DQS4_N
MEM_MB_DQS5_P
MEM_MB_DQS5_N
MEM_MB_DQS6_P
MEM_MB_DQS6_N
MEM_MB_DQS7_P
MEM_MB_DQS7_N

MEM:DATA
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63

C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

A12
B16
A22
E25
AB26
AE22
AC16
AD12
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7

G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12

MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63

E12
C15
E19
F24
AC24
Y19
AB16
Y13

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13

MEM_MA_DATA[0..63]

(8)

4

To SODIMM socket A (near)

PLACE THEM CLOSE
TO CPU WITHIN 1"

4

+SMDDR_VTERM

U26B

To SODIMM socket B (Far)

+SMDDR_VTERM

MEM_MA_DM[0..7]

(8)

MEM_MA_DQS0_P
MEM_MA_DQS0_N
MEM_MA_DQS1_P
MEM_MA_DQS1_N
MEM_MA_DQS2_P
MEM_MA_DQS2_N
MEM_MA_DQS3_P
MEM_MA_DQS3_N
MEM_MA_DQS4_P
MEM_MA_DQS4_N
MEM_MA_DQS5_P
MEM_MA_DQS5_N
MEM_MA_DQS6_P
MEM_MA_DQS6_N
MEM_MA_DQS7_P
MEM_MA_DQS7_N

(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)

3

2

SOCKET_638_PIN

+SMDDR_VTERM
1

1

C391

C395

C400

C393

C198

C94

C222

C223

1000P_4

1000P_4

1000P_4

1000P_4

180P_4

180P_4

180P_4

180P_4

PROJECT : BU2
Quanta Computer Inc.

Place close to socket
Size
Custom
NB4

Document Number

Date: Thursday, July 24, 2008
A

B

C

D

Rev
1A

S1G2 DDRII MEMORY I/F 2/4
E

Sheet

5

of

35

4

3

2

1

CPU THERM

C444

10u/6.3V_8

C437

C438

C436

4.7u/6.3V_6

0.22u/6.3V_4

3300P_4

C440

(3,12) CPU_CLKP

U26D

3900P_4

2

*100u/6.3V_3528

CPU CLK
W/S= 15 mil/20mil

R352
169/F_6
C441

(3,12) CPU_CLKN

CPU_CLKIN_P
CPU_CLKIN_N

3900P_4

(12) CPU_PWRGD
(10,12) CPU_LDT_STOP#

D

SideBand Temp sense I2C
place them to CPU within 1.5"

CPU POWER-UP

+1.2V_VLDT

+1.8V

C577

0.1U/10V_4

R106
R110

Rev:3A 01/29 Change to S0 domain save power during S3 since SB .

CPU_LDT_RST#

R354

300_4

CPU_LDT_STOP#

R353

300_4

CPU_PWRGD

R355

300_4

CPU_LDT_REQ#_CPU

R356

300_4

+3V
20K/F_04

C68

C

2

TEST23

H10
G9

TEST18
TEST19

T78
T76
T75
T74
T79
*300_4

R326
R347

0_4

E9
E8

CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTEN
CPU_TEST27_SINGLECHAIN

AB8
AF7
AE7
AE8
AC8
AF8

CPU_TEST9_ANALOGIN

R77

0_4

CPU_LDT_RST#

CPU_LDT_RST# (10,12)

0_4

CPU_LDT_REQ# (10)

TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27

C2
AA6

TEST9
TEST6

A3
A5
B3
B5
C1

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

Rev:3C 05/09 Follow AMD Design Guide add termination resistor.

H_THRMDC
H_THRMDA

VDDIO_FB_H
VDDIO_FB_L

+1.8VSUS

DBREQ_L

E10

CPU_DBREQ#

TDO

AE9

CPU_TDO

CPU_THERMTRIP_L#

1
3
Q12
MMBT3904

SYS_SHDN#

R61

*0_4

(31)

CPU_THERMTRIP#

(13)

Rev:3A 02/05 System will Leakage when system into G3 mode.
J7
H8

CPU_TEST28_H_PLLCHRZ
CPU_TEST28_L_PLLCHRZ

TEST17
TEST16
TEST15
TEST14

D7
E7
F7
C7

CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0

TEST7
TEST10

C3
K8

TEST8

C4

TEST29_H
TEST29_L

C9
C8

RSVD10
RSVD9
RSVD8
RSVD7
RSVD6

300_4
(32)
(32)

route as differential
as short as possible
testpoint under package

TEST28_H
TEST28_L

T28
T29

+1.8VSUS

T95
T35
T98
T96

+1.8VSUS

+3V

R55

R78

R86

300_4

10K_4

*10K_4

CPU_PROCHOT_L#
CPU_TEST29_H_FBCLKOUT
CPU_TEST29_L_FBCLKOUT

T36
T37

C

1
3
Q15
MMBT3904
R84

H18
H19
AA7
D5
C5

+1.8VSUS

0_4

AMD_PROCHOT#

(28)

CPU_PROCHOT#

(12)

+1.8VSUS

SOCKET_638_PIN
R80

R79

300_4

10K_4

Rev:3A 01/29 Change pull-up Resistors to 2.2K

+5V

CNTR_VREF

Q16
MMBT3904
1

+1.8VSUS

R307

FANPWR = 1.6*VSET

R73
R62

(34)
(34)

CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L

+3V

CPU FAN

0_4
0_4

100K_4

AD7

CPU_TEST25_BYPASSCLK_H
CPU_TEST25_BYPASSCLK_L

R97
R100

R68

CPU_TEST18_PLLTEST0
CPU_TEST19_PLLTEST1

R577
R357
R358
R578

D

1K_4

CPU_TEST23_TSTUPD

3

R65

CPU_THERMDC
CPU_THERMDA

DBRDY
TMS
TCK
TRST_L
TDI

For Debug Only

*FDV301N

W7
W8

G10
AA9
AC9
AD9
AF9

34.8K/F_4

2 *SHORT_ PAD1

THERMDC
THERMDA

H6
G6

+1.8VSUS

Q14

1

HT_REF0
HT_REF1

R74
FDV301N

2

CPU_LDT_REQ#_CPU

R6
P6

VDDIO_FB_H
VDDIO_FB_L

CPU_LDT_RST_HTPA#

3

1

SIC
SID
ALERT_L

VDDNB_FB_H
VDDNB_FB_L

4.7K_4

FDV301N
G5

AF4
AF5
AE6

CPU_THERMTRIP_L#
CPU_PROCHOT_L#
CPU_MEMHOT_L#

VDD1_FB_H
VDD1_FB_L

0.1U/10V_4

R76

CPU_SIC
CPU_SID
CPU_ALERT

AF6
AC7
AA8

VDD0_FB_H
VDD0_FB_L

T25
T31
*300_4
*300_4
*300_4
*300_4

Q13

2

*0_4

THERMTRIP_L
PROCHOT_L
MEMHOT_L

Y6
AB6

Q11

1

CPU_SVC_R
CPU_SVD_R

A6
A4

(16,28,32) VRM_PWRGD

RESET_L
PWROK
LDTSTOP_L
LDTREQ_L

(32) CPU_VDD1_RUN_FB_H
(32) CPU_VDD1_RUN_FB_L

+1.8VSUS

CNTR_VREF

2

R75

M11
W18

(32) CPU_VDD0_RUN_FB_H
(32) CPU_VDD0_RUN_FB_L

+1.8VSUS
R63

SVC
SVD

W9
Y9

Rev:3A 01/29 Change to 4.7K

CNTR_VREF

KEY1
KEY2

F6
E6

T77

+3V

CLKIN_H
CLKIN_L

B7
A7
F10
C6

CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

Rev:2A 12/06 Add 0.1u For AMD CPU issue.

VDDA1
VDDA2

CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU

CPU_HTREF0
CPU_HTREF1

44.2/F_4
44.2/F_4

F8
F9
A9
A8

06

+1.8VSUS

3

C226

+2.5V_CPU_VDDA_RUN

1

1

CPU

250mA

2

L44
0805CS_820EGTS_8
82NH 2% 400MA

2

5

+2.5V

CPU_MEMHOT_L#

3

CPU_MEMHOT# (8,13)

10K_4
C32

(28) FANSIG

R72

R88

2.2K_4

2.2K_4

*1K_4

Reserve Test Port

C378

2.2u/16V_6

*.01u/16V_4

CN18

U3

0_4

1
4

(28) VFAN

TH_FAN_POWER

3
5
6
7
8

VIN

VO
GND
/FON GND
GND
VSET GND

C377

C376

10u/16V_8

.01u/16V_4

1
2
3

R70

*0_4

CPU_SIC

(13) SB_SDATA3

R71

*0_4

CPU_SID

Q18
SMBALERT#

FAN_CON

G995

G995/Pin1- internal pull high (+5V)

(13) SB_SCLK3

2

2
R25

B

R69

3

+1.8VSUS

CPU_DBREQ#

R591

300_4

CPU_TEST20_SCANCLK2

R594

300_4

CPU_TEST21_SCANEN

R592

300_4

CPU_TEST23_TSTUPD

R595

300_4

CPU_TEST24_SCANCLK1

R593

300_4

B

CPU_ALERT

1
*BSS138_NL/SOT23

Rev:3A/3C 05/09 AMD CPU noise sensitivity be added termination resistor.
CPU_PWRGD

CPU H/W MONITOR

+1.8VSUS

+3V

R156

0_4

R161

*2.2K_4

R164

*220_4

R154

0_4

R159

1K_4

R163

*220_4

CPU_PWRGD_SVID_REG

HDT Connector

(32)

+1.8VSUS

2

+3V

(19,28) 2ND_MBCLK

Q21

3

C387

Rev:3A 02/29 GMT G781 Reverse R133 0 Ohm For Thermal Sensor issue.
R95

1

10K_4

R103
10K_4

R105

CPU_SVC_R

CPU_SVC (32)

R109

10K_4

+1.8VSUS

200_4

RHU002N06
+3V_THERM C114

0.1u/10V_4

+3V

(19,28) 2ND_MBDATA

CPU_SVD_R

3

1

LM86_SMD
R108

A

8
7
*0_4

SCLK

VCC

SDA

DXP

2

SMBALERT#

6

ALERT#

DXN

3

THERM_SHD#

4

OVERT#

GND

5

RHU002N06

H_THRMDA

1

+1.8VSUS

H_THRMDC

1K_4

R160

*220_4

CPU_SVD (32)

Serial VID Data

CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

R89
R92

R133

2
4
6
8
10
12
14
16
18
20
22
24
25

KEY

330_4

VFIX MODE

*0_4

VID Override Circuit

1

ADDRESS: 98H

Q17
MMBT3904
3
C82

SVD

Voltage Output(CPU Power)

0

0

1.4V

0

1

1.2V

1

0

1.0V

1

1

0.8V

SVC

A

*HDT CONN

SYS_SHDN#

*1u/16V_6

Serial VID

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

4

3

2

Rev
1A

S1G2 CTRL & DEBUG 3/4

Date: Thursday, July 24, 2008
5

CPU_LDT_RST_HTPA#

10K_4

MAX6657,G781P8,W83L771G

OVERT# Check EC Setting Degree

0_4

R155

CN22

1
3
5
7
9
11
13
15
17
19
21
23

2200P_4

MSOP
ADM1032
(14) PM_THERM#

R153

+3V

C96

2

2

U12
LM86_SMC

Q22

*0.1u/10_4

Serial VID Clock

1

Sheet

6

of

35

5

4

3

2

1

07

CPU
U26F
D

U26E

CPU_CORE0

C

CPU VDDNB_CORE

+1.8VSUS

G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11

VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23

K16
M16
P16
T16
V16

VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12

CPU_CORE1

VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2

VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

+1.8VSUS

SOCKET_638_PIN
B

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

D

BOTTOM SIDE DECOUPLING

CPU_CORE0

C151

C176

C171

C192

C191

C170

C157

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

0.22u/6.3V_4

0.01u/16V_4

180P_4

C86

C85

C116

C89

C136

C106

C132

C139

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

0.22u/6.3V_4

0.01u/16V_4

0.01u/16V_4

180P_4

CPU_CORE1

CPU VDDNB_CORE

+1.8VSUS
C

C92

C105

C117

C172

C133

C101

C141

C183

C110

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

0.22u/6.3V_4

0.22u/6.3V_4

180P_4

180P_4

DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS

C97

C95

C174

C138

C99

C142

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

0.22u/6.3V_4

0.22u/6.3V_4

C165

C100

C177

C178

C119

0.22u/6.3V_4

0.22u/6.3V_4

0.01u/16V_4

0.01u/16V_4

180P_4

B

+1.8VSUS

SOCKET_638_PIN

PROCESSOR POWER AND GROUND
A

A

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

Date: Wednesday, December 19, 2007 Sheet
5

4

3

2

Rev
1A

S1G2 PWR & GND 4/4
1

7

of

35

5

4

3

TERMINATOR DECOUPLING CAPACITOR

+SMDDR_VTERM

2

DDR2 TERMINATOR

C195

C115

C163

C212

C414

C111

C415

C175

C193

C152

C144

C208

C196

C430

C179

C207

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

+SMDDR_VTERM

1

+SMDDR_VTERM
+SMDDR_VTERM

MEM_MA0_CS#0
MEM_MA_RAS#

RP24

4
2

3 47_4P2R_4
1

MEM_MA_CAS#
MEM_MA_WE#

RP56

4
2

3 47_4P2R_4
1

MEM_MA0_ODT1
MEM_MA0_CS#1

RP55

4
2

3 47_4P2R_4
1

MEM_MB0_CS#0
MEM_MB_RAS#

RP23

4
2

3 47_4P2R_4
1

MEM_MB_WE#
MEM_MB_CAS#

RP22

4
2

3 47_4P2R_4
1

MEM_MA_BANK2
MEM_MA_CKE0
MEM_MA_ADD9
MEM_MA_ADD12
MEM_MA_ADD5
MEM_MA_ADD8
MEM_MA_ADD1
MEM_MA_ADD3
MEM_MA_BANK0
MEM_MA_ADD10
MEM_MA_ADD7
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_CKE1

RP61

MEM_MA_ADD6
MEM_MA_ADD11
MEM_MA_ADD2
MEM_MA_ADD4
MEM_MA_BANK1
MEM_MA_ADD0
MEM_MA_ADD13
MEM_MA0_ODT0

RP32

RP60
RP59
RP58
RP57
RP36
RP38

4
2
4
2
4
2
4
2
4
2
4
2
4
2

3
1
3
1
3
1
3
1
3
1
3
1
3
1

47_4P2R_4

4
2
4
2
4
2
4
2

3
1
3
1
3
1
3
1

47_4P2R_4

+SMDDR_VTERM

47_4P2R_4
47_4P2R_4
47_4P2R_4
47_4P2R_4
47_4P2R_4
47_4P2R_4

MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_ADD7
MEM_MB_ADD14
MEM_MB_CKE1
MEM_MB_ADD15

RP39

MEM_MB_ADD6
MEM_MB_ADD11
MEM_MB_ADD2
MEM_MB_ADD4
MEM_MB_BANK1
MEM_MB_ADD0
MEM_MB0_ODT0
MEM_MB_ADD13

RP33

RP34
RP31
RP28
RP25
RP37
RP40

4
2
4
2
4
2
4
2
4
2
4
2
4
2

3
1
3
1
3
1
3
1
3
1
3
1
3
1

47_4P2R_4

4
2
4
2
4
2
4
2

3
1
3
1
3
1
3
1

47_4P2R_4

47_4P2R_4
47_4P2R_4
47_4P2R_4
47_4P2R_4
47_4P2R_4
47_4P2R_4

D

D

C145

C126

0.1u/10V_4

0.1u/10V_4

C216

C186

0.1u/10V_4

0.1u/10V_4

C410

C412

0.1u/10V_4

C426

0.1u/10V_4

C125

0.1u/10V_4

C213

0.1u/10V_4

C143

0.1u/10V_4

0.1u/10V_4

C112
0.1u/10V_4

C214

C201

0.1u/10V_4

C124

0.1u/10V_4

C419

0.1u/10V_4

MEM_MB0_CS#1
MEM_MB0_ODT1

0.1u/10V_4

RP19

3 47_4P2R_4
1

4
2

+1.8VSUS

MEM_MA_DQS0_P
MEM_MA_DQS1_P
MEM_MA_DQS2_P
MEM_MA_DQS3_P
MEM_MA_DQS6_P
MEM_MA_DQS4_P
MEM_MA_DQS5_P
MEM_MA_DQS7_P

13
31
51
70
131
148
169
188

(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)

MEM_MA_DQS0_N
MEM_MA_DQS1_N
MEM_MA_DQS2_N
MEM_MA_DQS3_N
MEM_MA_DQS6_N
MEM_MA_DQS4_N
MEM_MA_DQS5_N
MEM_MA_DQS7_N

11
29
49
68
129
146
167
186

(5)
(5)
(5)
(5)

30
32
164
166

MEM_MA_CLK1_P
MEM_MA_CLK1_N
MEM_MA_CLK7_P
MEM_MA_CLK7_N

B

MEM_MA_CKE0
MEM_MA_CKE1

(5) MEM_MA_CKE0
(5) MEM_MA_CKE1
(5)
(5)
(5)
(5)
(5)

MEM_MA_RAS#
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA0_CS#0
MEM_MA0_CS#1

(5) MEM_MA0_ODT0
(5) MEM_MA0_ODT1
R58
R56

10K_4
10K_4

(3,13) PDAT_SMB
(3,13) PCLK_SMB
C63

+3V
+1.8VSUS

C237

CKE0
CKE1

MEM_MA0_ODT0
MEM_MA0_ODT1

114
119

DIM1_SA0
DIM1_SA1

198
200

SA0
SA1

PDAT_SMB
PCLK_SMB

195
197

SDA
SCL

C235

C230

2.2u/6.3V_6

1000P_4

DDRII

CK0
CK0
CK1
CK1

108
113
109
110
115

SMVREF_DIM

A

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

MEM_MA_RAS#
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA0_CS#0
MEM_MA0_CS#1

0.1u/10V_4

0.1u/10V_4

79
80

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

199
1
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54

RAS
CAS
WE
S0
S1
ODT0
ODT1

VDDspd
VREF
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20

NC1
NC2
NC3
NC4
NC/TEST

81
82
87
88
95
96
103
104
111
112
117
118
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA14
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA11
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA30
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA31
MEM_MA_DATA26
MEM_MA_DATA55
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA52
MEM_MA_DATA54
MEM_MA_DATA51
MEM_MA_DATA53
MEM_MA_DATA48
MEM_MA_DATA32
MEM_MA_DATA36
MEM_MA_DATA39
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59

50
69
83
120
163

MEMHOT_DIMM#_1
MEM_MA_RESET#1

(5)

(5) MEM_MB_ADD[0..15]

(5) MEM_MB_BANK0
(5) MEM_MB_BANK1
(5) MEM_MB_BANK2

(5) MEM_MB_DM[0..7]

VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34

196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133

10
26
52
67
130
147
170
185

11
29
49
68
129
146
167
186

(5)
(5)
(5)
(5)

MEM_MB_CLK1_P
MEM_MB_CLK1_N
MEM_MB_CLK7_P
MEM_MB_CLK7_N

30
32
164
166

+3V

+1.8VSUS

R57
R60

10K_4
10K_4

C62
C231

R175

R173

*0_4

1K/F_4

C234

R176

0.1u/10V_4

1K/F_4

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1

108
113
109
110
115

MEM_MB0_ODT0
MEM_MB0_ODT1

114
119

ODT0
ODT1

DIM2_SA0
DIM2_SA1

198
200

SA0
SA1

PDAT_SMB
PCLK_SMB

195
197

SDA
SCL

199

VDDspd

C228

C229

2.2u/6.3V_6

1000P_4

+1.8VSUS

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

79
80

1
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54

CN24

BA0
BA1
BA2

MEM_MB_RAS#
MEM_MB_CAS#
MEM_MB_WE#
MEM_MB0_CS#0
MEM_MB0_CS#1

SMVREF_DIM

0.1u/10V_4

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

MEM_MB_CKE0
MEM_MB_CKE1

0.1U/10V_4

SMVREF_DIM

DDR SO-DIMM SOCKET 1.8V

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM6
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM7

MEM_MB_DQS0_N
MEM_MB_DQS1_N
MEM_MB_DQS2_N
MEM_MB_DQS3_N
MEM_MB_DQS6_N
MEM_MB_DQS4_N
MEM_MB_DQS5_N
MEM_MB_DQS7_N

T90

+SMDDR_VREF

107
106
85

(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)

(5) MEM_MB0_ODT0
(5) MEM_MB0_ODT1

MEMHOT_DIMM#

MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2

13
31
51
70
131
148
169
188

(5) MEM_MB_RAS#
(5) MEM_MB_CAS#
(5) MEM_MB_WE#
(5) MEM_MB0_CS#0
(5) MEM_MB0_CS#1

0_4

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84

MEM_MB_DQS0_P
MEM_MB_DQS1_P
MEM_MB_DQS2_P
MEM_MB_DQS3_P
MEM_MB_DQS6_P
MEM_MB_DQS4_P
MEM_MB_DQS5_P
MEM_MB_DQS7_P

(5) MEM_MB_CKE0
(5) MEM_MB_CKE1

R157

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)

+3V

(H=5.6)

SMbus Address A0

MEM_MA_DATA[0..63]

CKE0
CKE1
RAS
CAS
WE
S0
S1

SO-DIMM
(REVERSE)

(5)
(5)
(5)
(5)
(5)
(5)
(5)
(5)

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

10
26
52
67
130
147
170
185

BA0
BA1
BA2

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VREF
VSS0
VSS1
oVSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

NC1
NC2
NC3
NC4
NC/TEST

47_4P2R_4
47_4P2R_4

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA14
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA15
MEM_MB_DATA11
MEM_MB_DATA16
MEM_MB_DATA21
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA17
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA25
MEM_MB_DATA29
MEM_MB_DATA27
MEM_MB_DATA31
MEM_MB_DATA28
MEM_MB_DATA24
MEM_MB_DATA30
MEM_MB_DATA26
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA34
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA35
MEM_MB_DATA39
MEM_MB_DATA45
MEM_MB_DATA40
MEM_MB_DATA43
MEM_MB_DATA47
MEM_MB_DATA44
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA46
MEM_MB_DATA57
MEM_MB_DATA60
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA56
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63

50
69
83
120
163

MEMHOT_DIMM#_2
MEM_MB_RESET#2

MEM_MB_DATA[0..63]

RP29
RP27
RP21

(H=10.1)

VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34

SMbus Address A2
3

C

C200

C158

C162

C169

C184

C173

10U/10V_8

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

C189

C180

C190

C148

C194

C166

C202

10U/10V_8

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1U/10V/04

+1.8VSUS

B

R158

0_4

MEMHOT_DIMM#

T91

Rev:2A 12/13 No-Sutff DDRII H/W Montor Circuit.

*0.1u/10V_4

R376

U30

*10K_4
+3V

7
6
5

A0
A1
A2

+VS
O.S

PDAT_SMB
PCLK_SMB

1
2

SDA
SCL

GND

8
3

MEMHOT_DIMM#

R375

*0_4

CPU_MEMHOT# (6,13)

4
A

*DS75U+T&R

ADDRESS: 92H

Close DDR2 socket

PROJECT : BU2
Quanta Computer Inc.

DDR SO-DIMM SOCKET 1.8V
Size
Custom

Document Number

2

Rev
1A

DDR2 SODIMMS: A/B CHANNEL

Date: Thursday, July 24, 2008
4

47_4P2R_4

C128

NB4
5

47_4P2R_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

+1.8VSUS

C449

196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133

47_4P2R_4

08

(5)

+3V

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM6
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM7

CN25

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

107
106
85

RP20

59
60
65
66
71
72
77
78
121
122
127
128
132

(5) MEM_MA_DM[0..7]

MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

SO-DIMM
(REVERSE)

(5) MEM_MA_BANK0
(5) MEM_MA_BANK1
(5) MEM_MA_BANK2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

C

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

59
60
65
66
71
72
77
78
121
122
127
128
132

(5) MEM_MA_ADD[0..15]

RP26

47_4P2R_4

+1.8VSUS

81
82
87
88
95
96
103
104
111
112
117
118

+1.8VSUS

RP30

1

Sheet

8

of

35

5

4

3

2

1

09

RS780

RS780 Display Port Support (muxed on GFX)
GFX_TX0,TX1,TX2 and TX3
DP0

AUX0 and HPD0

D

D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18

HT_NB_CPU_CAD_H8 (4)
HT_NB_CPU_CAD_L8 (4)
HT_NB_CPU_CAD_H9 (4)
HT_NB_CPU_CAD_L9 (4)
HT_NB_CPU_CAD_H10 (4)
HT_NB_CPU_CAD_L10 (4)
HT_NB_CPU_CAD_H11 (4)
HT_NB_CPU_CAD_L11 (4)
HT_NB_CPU_CAD_H12 (4)
HT_NB_CPU_CAD_L12 (4)
HT_NB_CPU_CAD_H13 (4)
HT_NB_CPU_CAD_L13 (4)
HT_NB_CPU_CAD_H14 (4)
HT_NB_CPU_CAD_L14 (4)
HT_NB_CPU_CAD_H15 (4)
HT_NB_CPU_CAD_L15 (4)

HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N

H24
H25
L21
L20

HT_NB_CPU_CLK_H0 (4)
HT_NB_CPU_CLK_L0 (4)
HT_NB_CPU_CLK_H1 (4)
HT_NB_CPU_CLK_L1 (4)

HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

M24
M25
P19
R18

HT_RXCALP
HT_RXCALN

HT_TXCALP
HT_TXCALN

B24
B25

(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)

HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W 21
W 20
V21
V20
U20
U21
U19
U18

HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N

(4)
(4)
(4)
(4)

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

T22
T23
AB23
AA22

HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N

(4)
(4)
(4)
(4)

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

M22
M23
R21
R20
C23
A24

R134

300/F_4

HT_RXCALP
HT_RXCALN

HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N

PART 1 OF 6

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1
HT_TXCALP
HT_TXCALN

RS780M

Close to NB within 1"

R131

(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)

T80
T9
PCIE_RXP1
PCIE_RXN1
PCIE_RXP2
PCIE_RXN2
PCIE_RXP3
PCIE_RXN3
T21
T20
(23) PCIE_RXP5
(23) PCIE_RXN5
(24)
(24)
(23)
(23)
(24)
(24)

(4)
(4)
(4)
(4)

300/F_4
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)

Close to NB within 1"

B

PCIE_SB_NB_RX0P
PCIE_SB_NB_RX0N
PCIE_SB_NB_RX1P
PCIE_SB_NB_RX1N
PCIE_SB_NB_RX2P
PCIE_SB_NB_RX2N
PCIE_SB_NB_RX3P
PCIE_SB_NB_RX3N

D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N

AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

U25D

A

MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)

AD16
AE17
AD17

MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)

W 12
Y12
AD18
AB13
AB18
V14

MEM_RASb(NC)
MEM_CASb(NC)
MEM_W Eb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)

V15
W 14

MEM_CKP(NC)
MEM_CKN(NC)

AE12
AD12

SBD_MEM/DVO_I/F

PAR 4 OF 6
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14

MEM_COMPP(NC)
MEM_COMPN(NC)

MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)

AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21

MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)

Y17
W 18
AD20
AE21

MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)

W 17
AE19

IOPLLVDD18(NC)
IOPLLVDD(NC)

AE23
AE24

IOPLLVSS(NC)

AD23

MEM_VREF(NC)

AE18

AUX1 and HPD1

Close to North Bridge

U25B

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7

HYPER TRANSPORT CPU I/F

Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25

(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

GFX_TX0P_C
GFX_TX0N_C
GFX_TX1P_C
GFX_TX1N_C
GFX_TX2P_C
GFX_TX2N_C
GFX_TX3P_C
GFX_TX3N_C

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

PCIE_TXP0_C
PCIE_TXN0_C
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP2_C
PCIE_TXN2_C
PCIE_TXP3_C
PCIE_TXN3_C
PCIE_TXP4_C
PCIE_TXN4_C
PCIE_TXP5_C
PCIE_TXN5_C

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C

PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)

AC8
AB8

NB_PCIECALRP
NB_PCIECALRN

R93
R98

PART 2 OF 6

PCIE I/F GFX

U25A

C

D

GFX_TX4,TX5,TX6 and TX7
DP1

PCIE I/F GPP

PCIE I/F SB

C422
C423
C424
C425
C420
C418
C417
C416

0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4

HDMI_DATA2P
HDMI_DATA2N
HDMI_DATA1P
HDMI_DATA1N
HDMI_DATA0P
HDMI_DATA0N
HDMI_CLKP
HDMI_CLKN

T88
T89

HDMI_DATA2P (18)
HDMI_DATA2N (18)
HDMI_DATA1P (18)
HDMI_DATA1N (18)
HDMI_DATA0P (18)
HDMI_DATA0N (18)
HDMI_CLKP (18)
HDMI_CLKN (18)

Blue

HDMI_CLKP
HDMI_DATA0P
HDMI_DATA1P
HDMI_DATA2P

R539
R536
R537
R538

HDMI_CLKN
HDMI_DATA0N
HDMI_DATA1N
HDMI_DATA2N

80.6/F_4
80.6/F_4
80.6/F_4
80.6/F_4

Rev:3A 02/05 Added the EMI Solution.

C401
C402
C403
C405
C407
C406

0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4

C409
C408

0.1u/10V_4
0.1u/10V_4

C78
C77
C76
C75
C73
C74
C83
C84

0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4

T12
T8
PCIE_TXP1
PCIE_TXN1
PCIE_TXP2
PCIE_TXN2
PCIE_TXP3
PCIE_TXN3
T16
T13
PCIE_TXP5
PCIE_TXN5

(24)
(24)
(23)
(23)
(24)
(24)
(23)
(23)

PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N

1.27K/F_4
2K/F_4

C

(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)

B

+1.1V_VDD_PCIE

RS780M
GPP0

40mils wdith or more
+1.8V
+1.8_IOPLLVDD18_NB

R328

0_6

+1.1V_IOPLLVDD

R329

0_6

X

GPP1

PCIE LAN(Marvell)

GPP2

Wireless Lan

GPP3

EXPRESS CARD (NEW CARD)

GPP4
GPP5

Don't support in RS740M

X
Robson/HD Decoder

+1.1V

A

SPM_VREF1
+1.8V
R91

*1K/F_4

R87

PROJECT : BU2
Quanta Computer Inc.

*1K/F_4

Size
Custom
NB4

Document Number

RS740/RS780-HT LINK/PCIE I/F 1/4

Date: Thursday, July 24, 2008
4

Green

To HDMI CONN

RS780M

5

Red

3

2

1

Sheet

9

of

35

Rev
1A

5

4

3

2

1

+3V
L19

RS780

0.135A

10

+3V_AVDD_NB

BLM18PG221SN1D_6
C215

C578

2.2u/6.3V_6

0.1u/10V_4

+1.8V
R343

+1.8V_AVDDDI_NB

0_6

Rev:2A 12/06 Add 0.1u For CRT Screen Flicker.

C210
2.2U/6.3V_6

TV_C/R_SYS

Without TV-Out feature

CLOSE TO NB

G18
G17
E18
F18
E19
F19

(19) CRT_R
(19) CRT_G
(19) CRT_B
R125

R126

140/F_4

150/F_4

150/F_4

(19)
(19)
(19)
(19)

+1.1V
L39
BLM18PG221SN1D_6

HSYNC
VSYNC
DDCCLK
DDCDAT

HSYNC
VSYNC
DDCCLK_INT
0_4
0_4
DDCDAT_INT

R132
R130

C428

R123

715/F_6

DAC_RSET_NB

+1.1V_PLLVDD
+1.8V_PLLVDD18

2.2u/6.3V_6
+1.8V

+1.8V_VDDA18HTPLL

L41
BLM18PG221SN1D_6

+1.8V_VDDA18PCIEPLL
C209

+1.8V

20mils width

L18

2.2u/6.3V_6

+1.8V_VDDA18HTPLL

(16) NB_PWRGD_IN

BLM18PG221SN1D_6

C

E17
F17
F15

C429
2.2u/6.3V_6

20mils width

L14

R139
R142

(3) EXT_NB_OSC

+1.8V_VDDA18PCIEPLL

EXT@0_4
EXT@0_4

A11
B11
F8
E8
G14
A12
D14
B12
H17
D7
E7

NB_RST#_IN
NB_PWRGD_IN
NB_LDT_STOP#
NB_ALLOW_LDTSTOP

D8
A10
C10
C12

HT_REFCLKP
HT_REFCLKN

C25
C24

NB_REFCLK_P
NB_REFCLK_N

E11
F11

BLM18PG221SN1D_6
C149

C131

10u/6.3V_8

2.2u/6.3V_6

+1.1V

R141

EXT@4.7K_4

R140

T2
T1

(3) NBGFX_CLKP
(3) NBGFX_CLKN

EXT@4.7K_4

External CLK

T86
T84

(17) INT_LVDS_EDIDCLK
(17) INT_LVDS_EDIDDATA
(18) HDMI_DDC_DATA
(18) HDMI_DDC_CLK
T92
T93

GPP_REFCLKP
GPP_REFCLKN

U1
U2

SB_REFCLKP
SB_REFCLKN

V4
V3

HDMI_DDC_DATA
HDMI_DDC_CLK
RS740_DFT_GPIO1

B9
A9
B8
A8
B7
A7

+NB_CORE_ON

(33) +NB_CORE_ON

B10
G11

RS780_AUX_CAL

T94

C8

AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)

TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)

PART 3 OF 6

C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)

CRT/TVOUT

2.2U/6.3V_6

150R Termination < 1000 mils trace

F12
E12
F14
G15
H15
H14

RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)

TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)

DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SCL(PCE_RCALRN)
DAC_SDA(PCE_TCALRN)

TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)

DAC_RSET(PWM_GPIO1)
VDDLTP18(NC)
VSSLTP18(NC)

PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)
VDDA18HTPLL
VDDA18PCIEPLL1
VDDA18PCIEPLL2
SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
HT_REFCLKP
HT_REFCLKN

A22
B22
A21
B21
B20
A20
A19
B19

INT_TXLOUT0+
INT_TXLOUT0INT_TXLOUT1+
INT_TXLOUT1INT_TXLOUT2+
INT_TXLOUT2T33
T30

TXLOUT3+
TXLOUT3-

(17)
(17)
(17)
(17)
(17)
(17)

B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17

INT_TXLCLKOUT+ (17)
INT_TXLCLKOUT- (17)

+1.8V
L15
BLM18PG221SN1D_6

PLL PWR
LVTM

C211

Rev:3A 02/13 Follow A13 silicon Change R120 From 150 To 140ohm For Unbalanced power bus IR drop. .

R120

D

U25C
+1.8V_AVDDQ_NB

BLM18PG221SN1D_6

VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)

PM

L40

A13 +1.8V_VDDLTP18_NB
B13

C197
2.2u/6.3V_6

A15 +1.8V_VDDLT_18_NB
B15
A14 +3V_VDLT33_NB
B14

+1.8V
L16
BLM21PG221SN1D_8

C14
D15
C16
C18
C20
E20
C22

C187

C199

0.1u/10V_4

4.7u/6.3V_6

+3V
L42
C

*BLM21PG221SN1D_8
C427

RS740M Only

*2.2u/6.3V/06

I

REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
GFX_REFCLKP
GFX_REFCLKN

I/O

GPP_REFCLKP
GPP_REFCLKN

I/O

CLOCKs

D

I

LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)

E9
F7
G12

INT_LVDS_ON
LVDS_ENA_BL
LVDS_BKL_EN

R341

0_4

TMDS_HPD0
TMDS_HPD1

R129

0_4

R121

0_4

INT_LVDS_DIGON

(17)

GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
I2C_CLK
I2C_DATA
DDC_DATA0/AUX0N
DDC_CLK0/AUX0P
AUX1P(NC)
AUX1N(NC)

MIS.

TMDS_HPD(NC)
HPD(NC)
TVCLKIN(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N

STRP_DATA
RSVD

TESTMODE

D9
D10
D12

SUS_STAT#_NB

AE8
AD8

R_NB_THRMDA
R_NB_THRMDC

D13

TEST_EN

R128

TMDS_HPD
T27

(18)

SUS_STAT# (13)
T81
T82

1.8K_4

AUX_CAL(NC)

RS780M

North Bridge RESET

LVDS BLON

+VDDG_NB

+3V

R136

STRAP DEBUG BUS GPIO

+15V

R351

R345

10K_4

10K_4

DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEB

R135

(12,14) A_RST#

0_4

NB_RST#_IN

2

NB_REFCLK_P
NB_REFCLK_N

+3V

NB_LCD_CONTROL

3

1 RP35
3 *INT@0_4P2R_4

2

*4.7K_4
2
4

(12) SB_DISP_CLKP
(12) SB_DISP_CLKN

R137

(6,12) CPU_LDT_RST#

*0_4

4
2

3K_4

R144

*3K_4

HSYNC

3

2N7002E-G

+1.8V
R115

HT NB

+3V

1

3 RP44
1 *INT@0_4P2R_4

2

(3) HT_REFCLKP
(3) HT_REFCLKN
(12) SB_NBHT_REFCLKP
(12) SB_NBHT_REFCLKN

R145

For Side Port Enables/Disable
0 : Enable(Default) 1 : Disable

Q55

2
+VDDG_NB

HT_REFCLKP
HT_REFCLKN

B

1

FOR SB INTERNAL CLOCK

1

B

NB_PWRGD_IN

2
Q54

Q24

BSS138_NL/SOT23
NB_LDT_STOP#

3

3K_4

R147

*3K_4

VSYNC

Enables the Test Debug Bus using GPIO.(RS780 -->VSYNC#)
1 : Enable(Defult) 0 : Disable

1

1

(6,12) CPU_LDT_STOP#

R146

*4.7K_4

*BSS138/SOT23
SB_REFCLKP
SB_REFCLKN

(3) SB_REFCLKP
(3) SB_REFCLKN
4
2

(12) SB_PCIE_NB_CLKP
(12) SB_PCIE_NB_CLKN

3 RP41
1 *INT@0_4P2R_4

R542

AUX CAL Value need update

0_4
INT_LVDS_ON

R340

2.7K_4
+3V

North Bridge A-Link

+VDDG_NB
+1.8V

R338

*10K_4

R339

2.2K_4

+NB_CORE_ON

NB_LCD_CONTROL
2
(6) CPU_LDT_REQ#

R119

0_4

1

Rev:3A 02/13 Support a Two-Step Voltage Control of North Bridge Core voltage.

*4.7K_4
LVDS_BKL_EN

Q25

3

1

INT_LVDS_BLON

NB_ALLOW_LDTSTOP

3

R150

*1K_4

TV_C/R_SYS

R127

*1K_4

RS740_DFT_GPIO1

R342

150/F_4

RS780_AUX_CAL

(17)

Q56

Reserve Pin

A

FDV301N

*BSS138/SOT23
R543

(12) ALLOW_LDTSTOP

R350

2.7K_4

0_4

Rev:2A 12/07 Change Q56 P/N For VGS 0.65V3V_S5

L15
M12
M14
N13
P12
P14
R11
R15
T16

+VDD33_18

IDE/FLSH I/O

R192

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

R481

+1.2V_CKVDD

SATA I/O

+1.8V

Part 3 of 5

604mA

AVSSC

GROUND

C323

1u/10V_4

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12

CORE S0

C325

10u/6.3V_8

L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21

A-LINK I/O

2

C550

VDD33_18--3.3V IDE I/O power
1.8V flash memory I/O power

+1.2V_VCC_SB_R

SB700

PCI/GPIO I/O

1
C557

A11 Chip Bug
use A12 Chip Can Remove

U34C

0.8A

0_8

100u/6.3V_3528

15

Rev:2A 12/10 The VDD Power Pin to be connected to S0_1.2V Power For A12 Chip.

+3.3V_SB_R
R500

1

PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.

+3V
D

2

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50

PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21

Part 5 of 5

AVSSCK

A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24

C

P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25

B

L17

SB700

+3V_AVDDCK
L29

+1.2V

+1.2V_AVDDCK

+3V_S5

L31

+3V_AVDDC

L26

BLM18PG221SN1D_6

BLM18PG221SN1D_6

BLM18PG221SN1D_6
C296

C255

C319

C321

2.2u/6.3V_6

2.2u/6.3V_6

10u/6.3V_8

0.1u/10V_4

A

A

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

Date: Friday, May 09, 2008
5

4

3

2

Rev
1A

SB700-PWR/DECOUPLING 4/4
Sheet
1

15

of

35

5

4

2

1

16

It must ready refore RSMRST#

SB700
D

3

+3V

+3V

+3V

+3V

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

+3V_S5

R495

R515

R502

R511

R415

R409

R475

R505

R423

R421

*10K_4

*10K_4

10K_4

10K_4

*10K_4

*10K_4

*10K_4

*10K_4

*2.2K_4

2.2K_4

(12) PCI_CLK2

(12,23) PCLK_DEBUG

(12) PCI_CLK3

(12) RTC_CLK

(12) PCI_CLK4

GPIO16

D

(13) ACZ_RST#

(12) PCI_CLK5

(13) SB_GPIO17

(12,28) PCLK_591

(13) SB_GPIO16

R494

R508

R503

R497

R413

R410

R499

R506

R427

R420

10K_4

10K_4

*10K_4

*10K_4

10K_4

10K_4

*10K_4

10K_4

2.2K_4

*2.2K_4

GPIO17
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

C

REQUIRED
STRAPS

PULL
HIGH

PCI_CLK2

PCI_CLK3

PCI_CLK4

PCI_CLK5

LPC_CLK0

BOOTFAIL
TIMER
ENABLED

USE
DEBUG
STRAPS

RESERVED

RESERVED

ENABLE PCI
MEM BOOT

LPC_CLK1

RTC_CLK

ACZ_RST#

GP17

CLKGEN
ENABLED

INTERNAL
RTC

EC
ENABLED

ROM TYPE:

PULL
HIGH

GP16

C

H, H = Reserved

DEFAULT

H, L = SPI ROM

PULL
LOW

BOOTFAIL
TIMER
DISABLED

IGNORE
DEBUG
STRAPS

DISABLE PCI
MEM BOOT

CLKGEN
DISABLED

PULL
LOW

DEFAULT
DEFAULT

DEFAULT

DEFAULT

EXT. RTC
(PD on X1,
apply 32KHz
to RTC_CLK)

EC
DISABLED

L, H = LPC ROM

DEFAULT

L, L = FWH ROM

DEFAULT

DEBUG STRAPS
+3V_S5

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
(12,21,22)
(12,21,22)
(12,21,22)
(12,21,22)
(12,21,22)
(12,21,22)

B

AD28
AD27
AD26
AD25
AD24
AD23

NB/SB POWER GOOD CIRCUIT

+3V

R184

R186

*10K_4

10K_4

Rev:3B 04/12 Change the +3V_S5 to +3V Domain to Meet SB PWRGOOD Timing.
Rev:3A 01/29 Move C243 Capacitor to Meet SB PWRGOOD timing.
R182

B

0_4

SB_PWRGD_IN

(13)

NB_PWRGD_IN

(10)

C243
R428

R431

R432

R435

R439

R442

*2.2K_4

*2.2K_4

*2.2K_4

*2.2K_4

*2.2K_4

*2.2K_4

+1.8V

*2.2u/6.3V_6

+1.8V

R189
U16

Use 2.2K PD.
(6,28,32) VRM_PWRGD

D12
1

CH501H-40PT
2

D11
1

CH501H-40PT
2

1

NC VCC

2

A

3

GND

Y

5

C244

0.1u/10V_4
300_4

4

R187

*33_4
+3V

*NL17SZ17DFT2G

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

USE
LONG
RESET

USE PCI
PLL

USE ACPI
BCLK

USE IDE
PLL

USE DEFAULT
PCIE STRAPS

RESERVED

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

PCI_AD28

(28) ECPWROK

AL17SZ17000
IC(5P) NL17SZ17DFT2G(SOT-353)
R191

REQUIRED
STRAPS

PULL
HIGH

PULL
LOW
A

USE
SHORT
RESET

BYPASS
PCI PLL

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

*10K_4
(13,28) SUSB#

D10
1

CH501H-40PT
2

R185

*0_4

R190

WD_PWRGD (13)

C580

NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V
Do NOT share it with SB_PWRGD when use Internal Clk Gen
(Need SB PLL initialize firstly)

USE EEPROM
PCIE STRAPS

0_4

1000P_4
A

Rev:2A 12/07 Add 1N Capacitor to Smoothing NB_PWRGD_IN.

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

SB700-STRAPS & PWRGD

Date: Thursday, July 24, 2008
1

Sheet

16

of

35

5

Panel Source

4

INT_TXLCLKOUTINT_TXLCLKOUT+

(10) INT_TXLCLKOUT(10) INT_TXLCLKOUT+

3

RP7

3
1

4
2

LCD@0_4P2R_4

LCD_TXLCLKOUTLCD_TXLCLKOUT+

RP2

3
1

4
2

*LED@0_4P2R_4

LED_TXLCLKOUT+
LED_TXLCLKOUT-

2

HALL Sensor

1

R279

+3VPCU

17

100K_4

+3V
1
RP10

3
1

RP4

LCD@0_4P2R_4

4
2

3
1

LCD_TXLOUT2LCD_TXLOUT2+
LED_TXLOUT2+
LED_TXLOUT2-

*LED@0_4P2R_4

4
2

D67

(28) EC_DISPON
INT_TXLOUT1INT_TXLOUT1+

(10) INT_TXLOUT1(10) INT_TXLOUT1+

RP9

INT_TXLOUT0INT_TXLOUT0+

(10) INT_TXLOUT0(10) INT_TXLOUT0+

4
2

LCD@0_4P2R_4

RP3

3
1

4
2

*LED@0_4P2R_4

LED_TXLOUT1+
LED_TXLOUT1-

RP8

3
1

4
2

LCD@0_4P2R_4

LCD_TXLOUT0LCD_TXLOUT0+

3
1

4
2

*LED@0_4P2R_4

LED_TXLOUT0+
LED_TXLOUT0-

RP6

3
1

4
2

LCD@0_4P2R_4

LCD_EDIDCLK
LCD_EDIDDATA

RP1

3
1

4
2

*LED@0_4P2R_4

LED_EDIDDATA
LED_EDIDCLK

C345

1K_4

0.1u/10V_4

EC2648-B3-F_ECS

BAS316
D

LCD_TXLOUT1LCD_TXLOUT1+

3
1

R174

R567

DISPON

*0_4

D9

BAS316

LID591#

(28)

+3V

R172

3

D

LID591#

2
MR1

Rev:3A 02/13 Reserve DISPON Pin By EC Control.

3

INT_TXLOUT2INT_TXLOUT2+

(10) INT_TXLOUT2(10) INT_TXLOUT2+

10K_4

(10) INT_LVDS_EDIDCLK
(10) INT_LVDS_EDIDDATA

Rev:2A 12/07 Modified Display ON Circuit to Avoid Flash When into S3/S4/S5
3

Q60
2N7002
1

INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA

BLON

2

3

RP5

Q32
2

(28) EC_FPBACK#

2
DTC144EU

R171

0_4

R170

*100K_4

INT_LVDS_BLON

(10)

1

1

Q59
2N7002

+3V

Panel Power

R15

4.7K_4

INT_LVDS_EDIDCLK

R16

4.7K_4

INT_LVDS_EDIDDATA

CAMERA Module

+15V
+3V

C

C

330K_6

R302

Q3
LCDONG

2

USBP2-_LCD
USBP2+_LCD

L6

4
1

USBP2-_LED
USBP2+_LED

L5

1
4

4
1

3
2

1
4

2
3

3
2

*DLW21HN900SQ2L_C

2
3

*DLW21HN900SQ2L_C

LCDVCC

AO3404

100K_4
Q2

0_6

+5V

CCD_POWER

3
C373

10u/10V_8

R301

C369

*1000p/50V_4

*4.7K_4

C370

*0.1u/10V_4

Q49
*AO3413

C12

C10

C15

0.1u/16V_4

0.01u/16V_4

10u/6.3V_6

22_8
LCDDISCHG

1

3

2N7002

T1

3

Q4

2

(10) INT_LVDS_DIGON

65mil

R6

2

65mil

LCDVCC1

2

L4

1

3

0.01u/25V_4

1

+5V

C374
R14

0_8

USBP2USBP2+

USBP2-_LCD
USBP2+_LCD

RP12

2
4

1
3

LCD@0_4P2R_4

USBP2-_LED
USBP2+_LED

RP11

4
2

3
1

*LED@0_4P2R_4

USBP2- (13)
USBP2+ (13)

3

+3VPCU

65mil

+

3

R303

PDTC143TT

2

CCD_POWERON

LCDON#

2

*100K_4

1

Q1

1

R13

(28)

1

2N7002

Q48
*DTC144EU

TOSHIBA LED Panel Module

+3V

1

B

2
2

3

44
43
42
41

F2
LCD_VADJ

R8

LCD_VADJ_O2

**LED@0_4

1

*LED@LITTLE-0603-2A-32V

C16
LED_VIN

L34

Rev:2A 12/07 The Reserve AND Gate For LED Power-up sequence.

R12
C19

*LED@33n_4
*LED@499/F_4

C375

LED PWR : 0.015A
D22

LEDAGND
*LED@10U/25V_1206

LED_SW

PAD

18
17
16
15
14
13
25

7
8
9
10
11
12

LEDAGND

GND
GND
FPWM
Vlevel
GND
PWMI/EN

PGND
PGND
OVP
IIN0
IIN1
IIN2

NC
NC
IIN5
IIN4
RSET
IIN3

1
2
3
4
5
6

R11
*LED@1M_6

24
23
22
21
20
19

*LED@0.1u/50V_6
U1

VDC
VIN
COMP
FAULT
LX
LX

C18

*LED@1u/16V_6

**LED@47p/50V_4
*LED@200K_4

LED_PWR
*LED@B140

C17

C587
R10

A

**LED@1n_4

*LED@10UH-88mR

LCD_VADJ_O2

C372

C371

*LED@10u/35V_1210

*LED@10u/35V_1210

LED_OVP
R7
*LED@37K/F_4

LEDAGND

LED_GND6
LED_GND5
LED_GND4
LED_GND3

*LED@ISL97636
R5
*LED@35.7K_4
SW1

2

1 **JUMPER PAD

Rev:3A 02/05 Modified the PCB Footprint.
Rev:3A 02/05 Modified Circuit For LED Panel Black-Screen issue.

45

5

DISPON
VIN

LCD Panel Module

U40
*LED@NC7SZ08P5X_NL
4
46

LED Panel Drive IC
B

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

CCD_POWER

INVCC0 : 0.67A
+3V
LCDVCC

LED_VDD(From LCD_VCC) :
4A(Rush current) 0.31A(Typ)

USBP2-_LED
USBP2+_LED

R20

VIN
+

LCD@0_8

INVCC0

C27

C25

LCD@1000p_4

LCD@0.1u/50V_6

C24
LCD@10u/25V_1210

LED_TXLOUT2+
LED_TXLOUT2LED_TXLOUT1+
LED_TXLOUT1LED_TXLOUT0+
LED_TXLOUT0-

+3V

LED_EDIDDATA
LED_EDIDCLK
LED_GND1
LED_GND2
LED_GND3
LED_GND4
LED_GND5
LED_GND6

CN5

Rev:3B 04/02 Del the CN7(Reserve) CONN For Space Limiting.

LED_TXLCLKOUT+
LED_TXLCLKOUT-

(26) INT_MIC
C14

C13

**LED@1000p_6

**LED@1000p_6

(10) INT_LVDS_PWM
(28) CONTRAST

CCD_POWER
ADOGND
MIC_DATA
DISPON
LCD_VADJ
LCD_EDIDCLK
LCD_EDIDDATA

ADOGND

R19

0_4

R17
R18

*0_4
0_4

USBP2+_LCD
USBP2-_LCD

LED_PWR

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31

LCDVCC

LCD_TXLCLKOUT+
LCD_TXLCLKOUTLCD_TXLOUT0+
LCD_TXLOUT0LCD_TXLOUT1+
LCD_TXLOUT1LCD_TXLOUT2+
LCD_TXLOUT2-

A

ADOGND
MIC_DATA

C22
LCD@1000p_6

C21
LCD@1000p_6

CN1
*LED@LED_PANEL
C11

PROJECT : BU2
Quanta Computer Inc.

**LED@100p_6
LEDAGND

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32

LCD@LCD_PANEL

Rev:3B 04/12 Stuff C21/C22 For EMI Suggest.

LED_GND2
LED_GND1

LEDAGND

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32

Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

LCD/LED PANEL/LID/CAMERA

Date: Thursday, July 24, 2008
1

Sheet

17

of

35

5

4

3

2

1

+3V

HDMI

1 HDM@0_4P2R_4
3

2
4

ESD3
L38

4
1

HDMITX2P
HDMITX2N

*HDM@WCM2012-90_C

3
2

1
2
3
4
5

HDMITX1P
HDMITX1N
(9) HDMI_DATA1P
(9) HDMI_DATA1N

RN3

2
4

L37

4
1

1 HDM@0_4P2R_4
3

1
2
VCC
4
5

10
9
GND
7
6

18

R344
HDM@4.7K_4

HDMITX2P
HDMITX2N

10
9
8
7
6

1

RN4

(9) HDMI_DATA2P
(9) HDMI_DATA2N

Q53
HDM@2SK3541

RN5
2
4

(10) HDMI_DDC_CLK
(10) HDMI_DDC_DATA

HDMITX1P
HDMITX1N

HM_DDCCLK
HM_DDCDATA

1
3

2

CEC_DDCCLK

3

HDM@0_4P2R_4

C431

*HDM@.1U_4

+3V

*HDM@RCIamp0514M

D

D

R346
1

*HDM@WCM2012-90_C

3
2

HDM@4.7K_4

Q52
HDM@2SK3541

2
RN2

(9) HDMI_DATA0P
(9) HDMI_DATA0N

CEC_DDCDATA

3

1 HDM@0_4P2R_4
3

2
4

ESD2
L36

4
1

RN1

2
4

HDMITX0P
HDMITX0N

*HDM@WCM2012-90_C

3
2

1
2
3
4
5

HDMICLKP
HDMICLKN

L35

4
1

10
9
GND
7
6

HDMICLKP
HDMICLKN

Place to HDMI Signal Pairs/ESD Side.

*HDM@RCIamp0514M

CN23

R114

HDM@750_4 HDMITX2P

R113

HDM@750_4 HDMITX2N

R111

HDM@750_4 HDMITX1P

R107

HDM@750_4 HDMITX1N

HDMITX2P

Rev:2A 12/07 Change HDMI CONN Footprint.
Rev:3A 02/05 Change HDMI CONN Footprint.

+5V

*HDM@WCM2012-90_C

3
2

HDMITX2N
HDMITX1P

2

HDMITX0N
HDMICLKP

+5VPCU

ESD1

F3
D3

+5VPCU

1 HDM@RSX101M

2

DDC5V
HDMI_HP

1
2
VCC
4
5

HDM@POLY SWITCH 1.1A/6V_1206
C87

C

C404

*HDM@10u/10V_8

10
9
GND
7
6

HDM@FDV301N

HDMI_DDCCLK
HDMI_DDCDATA

10
9
8
7
6

1

1
2
3
4
5

R282
DDC5V
HDMI_HP

1

R104

HDM@750_4 HDMITX0P

R101

HDM@750_4 HDMITX0N

R99

HDM@750_4 HDMICLKP

R96

HDM@750_4 HDMICLKN

2
HDM@100K_4

R331

HDM@6.8K_4

HDMICLKN
CEC

R330

HDM@6.8K_4

HDMI_DDCCLK
HDMI_DDCDATA
DDC5V
HDMI_HP

*HDM@RCIamp0514M

SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0GND
CK+
CK Shield GND
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HDMITX1N
HDMITX0P
Q20

HDMI_DDCCLK
HDMI_DDCDATA

*HDM@.1U_4

HDMITX0P
HDMITX0N

10
9
8
7
6

3

(9) HDMI_CLKP
(9) HDMI_CLKN

1 HDM@0_4P2R_4
3

1
2
VCC
4
5

C432

HDM@0.1u/10V_4

20

23
22

C

21

HDMI@CON

Rev:3A 02/05 Change PIN20/21/22/23 To Ground For ESD. EMI GROUND

CEC@0.1u/10V_4

R39

R41

C36

CEC@2.2K_4

CEC@2.2K_4

CEC@4.7K_4P2R_4

R31
R32

CEC@47K_4
CEC@47K_4
2 CEC@4.7K_4P2R_4
4
T4

XOUT_CEC
XIN_CEC

4
6

XOUT
XIN

CEC-RESET#
CEC-MODE

3
8

RESET
MODE

5
15
14
11

B

VSS
NC
NC
NC

SCL
SDA
DDCSDA
DDCSCL
TEST1
TEST0

13
12

CEC OUT
CEC IN
HPDET
NC

RP18 4
2

10
9

CEC_OUT
CEC_IN

19
2

HPDET

CEC@R5F211A4SP

1
3
CEC_DDCDATA

Y1
*CEC@8MHz

2

VCC
VCC

CEC_SCLK
CEC_SDATA
CEC_DDCDATA
CEC_DDCCLK

Q10
CEC@FDV301N

1

C35

*CEC@22p_6

XOUT_CEC

HDMI_DDCDATA

3

CEC_POWER

3 CEC@4.7K_4P2R_4
1

CEC_POWER

CEC_POWER

TO HDMI CONN
2

CEC_POWER

1
20
18
17

XIN_CEC

RP17

U7
7
16

*CEC@22p_6
1

C58

CEC@1u/10V_6

2

C47

RP14 1
3

Clock/Test Pad

CEC_POWER

HDMI-CEC

CEC_POWER

2
4

CEC_POWER

CEC_DDCCLK

C42

*CEC@0.1u/10V_4

Q9
CEC@FDV301N

1

U4
Vcc
Reset#
GND

HDMI_DDCCLK

3

3
1
2

B

CEC-RESET#

T5

*CEC@G691L308T73UF

Rev:3A 03/03 Change the CECC V1.10 (P/NR5F211A4C22SP)

Rev:2A 12/07 Level Shift Circuit Wrong Change to Pull-up CEE_POWER Domain.

CEC_POWER

U6

CEC_POWER

C43

CEC@0.1u/10V_4

5

1
2
3

4

+3V_S5

+3VPCU

R42

R40

*CEC@0_4

CEC@0_4

+5VPCU

R49

*CEC@0_6

+3VPCU

R29

CEC@0_6

CEC_POWER

U9
C59

CEC@0.1u/10V_4

5

HPDET

*CEC@TC7SET14FU

1
2
3

4

CEC_POWER

+3VPCU

CEC_POWER

CEC@0.1u/10V_4

5
4

(28) CEC_EC_HP

D2

CEC@10K_4

CEC@CH500H-40

Q7
CEC@2N7002

CEC_IN
1
2
3

R51

CEC@1.2K/F_4

R28

3

U10
C53

R37

2

CEC@NL17SZ17

HDMI_HP

CEC_SCLK

3

CEC@NL17SZ17

CEC

1
CEC@470K_4

A

TO HDMI CONN

CEC_SDATA

3

4
2

3 *CEC@0_4P2R_4
1

SB_SCLK2 (13)
SB_SDATA2 (13)

1

RP15

4
2

3 CEC@0_4P2R_4
1

3ND_MBCLK (25,28)
3ND_MBDATA (25,28)

CEC_SDA_R

Q8
CEC@2N7002

3

2

CEC@0.1u/10V_4

Q6
CEC@2SK3541

5

C54

RP16

2

R50
+3V

CEC_SCL_R

1

CEC@27K_4

1
R48

CEC@1K_4

4
2
3

PLTRST# (12,23,24,28)

CEC_OUT

R34

CEC@27K_4

Q5

1

U8

PROJECT : BU2
Quanta Computer Inc.

CEC@2SK3541
R30

CEC@TC7SH08FU
CEC@100K_4

2

(10) TMDS_HPD

Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

HDMI/HDMI-CEC(R5F211A)

Date: Thursday, July 24, 2008
1

Sheet

18

of

35

A

5

4

3

2

1

19

+5V_CRT2

Rev:3A 03/03 Change the LC Value For Reduce EMI Noise..
D21
2

+5V

SSM14
1

C1

0.1u/10V_4

F1
2

+5V_CRT2

FUSE1A6V_POLY-1A-6V

1

16

CRT

CN17
CRT_CONN

(10) CRT_R
(10) CRT_G
D

(10) CRT_B

L3

BLM18BA470SN1_6

CRT_R1

L2

BLM18BA470SN1_6

CRT_G1

L1

BLM18BA470SN1_6

6
1
7
2
8
3
9
4
10
5

CRT_B1

C9

R4

C8

R3

C7

C2

C3

C4

140/F_4

6.8p_4

150/F_4

6.8p_4

150/F_4

6.8p_4

6.8p_4

6.8p_4

6.8p_4

MTW355

CRT_SENSE#

(28)

12
13

D

14
15

17

R2

D1

11

Rev:3A 02/13 Follow A13 silicon Change R2 From 150 To 140ohm For Unbalanced power bus IR drop. .
U24
1

+5V_CRT2
+5V
C368

7
8

0.22u/10V_6

2

+3V
CRT_R1
CRT_G1
CRT_B1

3
4
5
6

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1
VIDEO_1
VIDEO_2
VIDEO_3

DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2

GND

16
14
15
13

VSYNC1
HSYNC1

R297
R298

39_4
39_4

VSYNC
HSYNC

10
11

DDCCLK
DDCDAT

9
12

CRTDCLK
CRTDDAT

VSYNC
HSYNC

VSYNC1_CRT
HSYNC1_CRT

L32
L33

(10)
(10)

DDCCLK
DDCDAT

CRTVSYNC
CRTHSYNC

BLM18BA220SN1_6
BLM18BA220SN1_6

+5V_CRT2

(10)
(10)

R296

R1

6.8K_4

6.8K_4

C365

C366

10p_4

10p_4

CM2009
+3V

+5V

C

C367

C6

0.1u/10V_4

0.1u/10V_4

DDCCLK

R299

4.7K_4

DDCDAT

R300

4.7K_4

C364

C5

10p_4

10p_4

+3V
C

G-SENSOR

+3V_HDP
+3V_HDP
2
4

U27
+3V_HDP

RP54

U28

2
3

C434

SHDN

4

VO

C433

GND

*GS@10u/10V_8

VIN

NC

NC

NC

1

**GS@22p_6

B

U13
*GS@33n/16V_4
16
7

4
5

+3V_HDP

6

ACCELY

7

AXSTST

C130

*GS@33n/16V_4

C154

*GS@33n/16V_4

ACCELX
ACCELY
ACCELZ
AXSTST

18
17
15
2

GND
HD_PINT

11
10
9

C185
(13) HDPACT

*GS@0.1u/10V_4
8

ACCELX

(12) HDPINT

R118

*GS@1K_4

9

5
R122

VCC
VCC
ACCELX
ACCELY
ACCELZ
AXSTST
HDPACT
HDPPD
HDPINT

HDPSCL
HDPSDA
RESET
MODE
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved

+3V_HDP

1
20

KXP84_SCL
KXP84_SDA

3
8

G-RESET#

R335
R334

*GS@10K_4
*GS@10K_4

4
6
12
13
14
19

XIN_G
XOUT_G

R332
R333

*GS@10K_4
*GS@10K_4

VSS
*GS@R5F21174

10

HDPPD selection

*GS@47K/F_6
11

HDPPD

0

NC

Normal Mode
FS (Full Scale) selection

12

NC
13

PD
14

Voutz
15

FS

C413

+3V_HDP
C129

3

NC

16

2

2
Voutx

NC

Reserved

XOUT_G

44

43

42

41

40

39

38

37

36

KXP84_SCL

1

NC

NC

NC

NC

NC

NC

NC

NC

35

Reserved

17

A

NC

34

ST

Reserved

**GS@8 MHz

*GS@2N7002

2

Vouty

Reserved

22

+3V_HDP

Reserved

**GS@22p_6

Y5

1

VDD

*GS@LIS3L02AQ3

Reserved

23

NC

18

24

GND

Reserved

25

NC

19

26

NC

Reserved

27

+3V_HDP

NC

20

28

NC

NC
29

NC

NC

30

NC

NC

Reserved

31

NC

21

32

C411

Q50

3

(6,28) 2ND_MBCLK

XIN_G

+3V_HDP

ADDRESS: 32H

B

33

KXP84_SDA

1

*GS@G913-C

*GS@0.1u/10V_4

U14

G-RESET#

*GS@G691L308T73UF-SOT23

*GS@2N7002

3

(6,28) 2ND_MBDATA

5

SET

*GS@4.7K_4P2R_4
1
3

+5VPCU

Q51
2

1

(28,34,35) MAINON

3
1
2

Vcc
Reset#
GND

FS

R143

0
2g Full-Scale

+3V_HDP

1
Power-down mode
A

+3V_HDP

1
6g Full-Scale
C155

C146

*GS@0.1u/10V_4

*GS@0.1u/10V_4

**GS@10K_4
FS

ACCELZ

PD (Power Down) selection

R138

0
PD

*GS@10K_4

Normal Mode

PROJECT : BU2
Quanta Computer Inc.

1
Power-down mode
Size
Custom

Close to Pin 7 and Pin 16
NB4

Document Number

Date: Thursday, July 24, 2008
5

4

3

2

Rev
1A

CRT & G-SENSOR(LIS3L02A)
Sheet
1

19

of

35

5

4

3

SATA HDD

2

1

20

USB & ESATA
C456

U29
RT9711BPF

CN19

2
3

(28) USB_EN#1

SATA_TXP0
SATA_TXN0

SATA_TXP0 (14)
SATA_TXN0 (14)

SATA_RXN0
SATA_RXP0

SATA_RXN0 (14)
SATA_RXP0 (14)

R23
C37

C40

*4.7u/10V_8

*0.1u/10V_4

*0_8

IN1
IN2
EN#
GND
GND-C

USBPWR

8
7
6

OUT3
OUT2
OUT1

+3V_S5
R362

5

OC#

(13,28) USBOC#5

*10K_4

D

Rev:2A 12/07 Change USB Over Current to +3V_S5 Domain.

+3V

ESATA Re-Driver IC

+5VSATA

0_8

ESATA_TXN1

+5V

R553

R554

R555

1K_4

1K_4

1K_4

1K_4

R564
R565

10K_4
10K_4

+1.8V

D61

D62

1

R26

ESATA_TXP1
R552

1

+3.3VSATA

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

4
1
9

0.1u/10V_4

10u/10V_8

R549
R550

*0_4
*0_4

*100u/6.3V_3528

Rev:3B 04/18 Change HDD Control From Channel/2 to Channel/0 For Spin Down Issue.
(14) SATA_TXP1
(14) SATA_TXN1

SATA_TXP1
SATA_TXN1

(14) SATA_RXP1
(14) SATA_RXN1

SATA_RXP1
SATA_RXN1

U42

1
2
3
4
5
6
7
8
9
10

C

+5VSATA
U44
*CM1213-04SO

SATA_TXN0

3

CH1

CH4

VN

VP

CH2

CH3

+3V

SATA_RXN0

6

D44

5
SATA_RXP0

4

11
12
13
14
15
16
17
18

2

1

1

Clamp-VPORT_6

+1.8V

100_4

VDD
AO+
AOGND
AGND
VDD
BI+
BIGND
IREF

2

SATA_TXP0

VDD
A+
AGND
AVDD
VDD
BO+
BOGND
VDD

Clamp-EGA_4

28
27
26
25
24
23
22
21
20
19

ESATA_TX1P_R
ESATA_TX1N_R

C591
C596

4700P_4
4700P_4

ESATA_TXP1
ESATA_TXN1

ESATA_RXP1_R C597
ESATA_RXN1_R C598

4700P_4
4700P_4

ESATA_RXP1
ESATA_RXN1

ESATA_RXP1
ESATA_RXN1
D60

R548

*470_4

C

D59

1

+1.8V

Clamp-EGA_4

Close IC, no stub at
High-speed trace on PCB
R551
layout.

24

Serial_ATA

2

0.1u/10V_4

1

C33

2

C28

2

C44
+

C31

2

GND24

1
2
3
4
5
6
7

37
36
35
34
33
32
31
30
29

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

USBPWRIN

POLY SWITCH 1.5A

GND
NC2
NC1
SEL0_A
SEL1_A
SEL2_A
SEL3_A
EN_A
EN_B

GND1
RXP
RXN
GND2
TXN
TXP
GND3

D

F4

+5VPCU
23

CLKIN+
CLKINSEL0_B
SEL1_B
SEL2_B
SEL3_B
OUT+
OUT-

GND23

1u/16V_8

Clamp-EGA_4

Clamp-EGA_4

PI2EQX3201

Rev:3A 01/29 Added Varistor ESD Solution.
Rev:3B 04/18 Remove D51/D52/D53/D54 Varistor And Change to U44 CM1213-04SO ESD Protection Arrays.

R557

R558

R559

R560

R533

R547

1K_4

1K_4

1K_4

1K_4

*0_4

*0_4

Rev:3A 02/13 Added the Re-Driver IC For ESATA.
USBPWR
BUSBP10-

0dB

0

1.0X

0

1

6.5dB

1.2X

1

-3.5dB

Rev:3A 02/22 Change the SATA ODD to be Channel 4 For IDE Legacy class Mode..

CN35

SATA_TXP4 (14)
SATA_TXN4 (14)

2
Clamp-EGA_4

D35

Clamp-VPORT_6

Clamp-EGA_4

B

Clamp-EGA_4

R556

*0_4

ESATA_RXP1

SATA_RXN1

R561

*0_4

ESATA_RXN1

SATA_TXN1

R562

*0_4

ESATA_TXN1

SATA_TXP1

R563

*0_4

ESATA_TXP1

Rev:3A 03/03 Stuff the D4/D5/D32/D34/35 Varistor For ESD Solution.

USBPWR
R231

8
9
10
11
12
13

1K_4

Device Present
R230

0_8

+5V

7

+5VSATA_ODD
C282

C274

C293

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

10u/10V_8

+ C421
CN26

Shield

SATA ODD

11
10
9
8
7
6
5

ESATA_RXP1
ESATA_RXN1
SATA_TXP4
SATA_TXN4

D57

*AVLC 18S_4

1

USB/ESATA

2

1

D56

2

1
*AVLC 18S_4

SATA_RXP4

D55

2

2

1

D58

ESATA_TXN1
ESATA_TXP1

Shield

A

SATA_RXN4

GND
B+
BGND
AA+
GND

*AVLC 18S_4

VCC
DD+
GND

R348

0_6

R378

0_6

1
2

BUSBP10-

3

BUSBP10+

4

L43
2
3

2
3

1
4

1
4

USBP10- (13)
USBP10+ (13)

*RFCM1632100M3_C

L47
3
2

(13) USBP7(13) USBP7+

3
2

BUSBP7BUSBP7+

4
1

A

0_6
R379

0_6

USB_SYSTEM1(ALW) 0.75A

PROJECT : BU2
Quanta Computer Inc.
Size
Custom

Rev:3A 01/29 Delete R133 For ESD Solution.
NB4
3

4
1

*RFCM1632100M3_C
R349

Document Number

2

Rev
1A

SATA HDD/ODD & ESATA/USB

Date: Tuesday, August 19, 2008
4

USB2_CONN

USB_SYSTEM2(ALW) 0.75A

GROUND

*AVLC 18S_4

Rev:3A 01/29 Added Varistor ESD Solution.

100u/6.3V_3528

12

C269

Shield

15

5

4
3
2
1

BUSBP7BUSBP7+

+ C445
100u/6.3V_3528

Rev:3A 02/05 Added PIN12/14 To Ground For ESD. USBPWR

6

8

CN28

SATA_RXN4 (14)
SATA_RXP4 (14)

5

SATA_RXN4
SATA_RXP4

SATA_RXP1

Shield

GND15

SATA_TXP4
SATA_TXN4

14

DP
+5V
+5V
RSVD
GND
GND

1
2
3
4
5
6
7

13

GND1
RXP
RXN
GND2
TXN
TXP
GND3

Clamp-EGA_4

D34

14

15

GND14

2

B

D32

1

1

1

D5

2

4.5dB

D4

1

2.5dB

0

BUSBP7+

0dB

2

1

1

BUSBP7-

BUSBP10+

1

0

De-Emphasis

1

0

Swing

SEL3_X

2

0

Eq

SEL2_X

1

SATA ODD

SEL0_X SEL1_X

1

Sheet

20

of

35

5

4

+3V

3

2

+3V

C285

C335

C286

C313

C334

PCLK_PCM

C488

C326

C317

C304

R232

**CB@22_4

*CB@0.1u/10V_4

*CB@0.1u/10V_4

*CB@0.1u/10V_4

*CB@0.1u/10V_4

*CB@0.1u/10V_4

*CB@0.1u/10V_4

*CB@0.1u/10V_4

PCLK_PCM_M

C302

21

**CB@10p_4

C309
CB_RSMRST#

*CB@0.1u/10V_4

1

*CB@0.1u/10V_4

R457

**CB@0_6

R463

*CB@100K_6

PCIRST#

*CB@0.1u/10V_4
C536

delay 10ms at least

+3V

*CB@0.22u/10V_6
A_CCD1#
A_CCD2#

D

PCM_PME#

*CB@43K_4

+5V

SHDN#
VPPD0
VPPD1
AVCC
AVCC
AVCC
AVPP
12V

16
15
14
13
12
11
10
9

C6
D9
CVS1/VS1
CVS2/VS2

L12
A4
CCD1#/CD1#
CCD2#/CD2#

CCLKRUN#/WP/IOIS16#
CRST#/RESET
CCLK/A16

A2
J13
E10
RSVD/D2
RSVD/D14
RSVD/A18

M12
N12
VPPD1
VPPD0

M13
N13

A_CAD0
A_CAD1
A_CAD3
A_CAD5
A_CAD7
A_CC/BE0#
A_CAD9
A_CAD11
A_CAD12
A_CAD14
A_CC/BE1#
A_CPAR
A_CPERR#
A_CGNT#
A_CINT#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17

A_CCLK
A_CIRDY#
A_CC/BE2#
A_CAD18
A_CAD20
A_CAD21
A_CAD22
A_CAD23
A_CAD24
A_CAD25
A_CAD26
A_CAD27
A_CAD29
A_CRSVD/D2
A_CCLKRUN#

18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

A_CCD1#
A_CAD2
A_CAD4
A_CAD6
A_CRSVD/D14
A_CAD8
A_CAD10
A_CVS1#
A_CAD13
A_CAD15
A_CAD16
A_CRSVD/A18
A_CBLOCK#
A_CSTOP#
A_CDEVSEL#

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51

A_CTRDY#
A_CFRAME#
A_CAD17
A_CAD19
A_CVS2#
A_CRST#
A_CSERR#
A_CREQ#
A_CC/BE3#
A_CAUDIO
A_CSTSCHG
A_CAD28
A_CAD30
A_CAD31
A_CCD2#

52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

AVCC
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0

AVPP

AVCC

CCBE0#/CE1#
CCBE1#/A8
CCBE2#/A12
CCBE3#/REG#
CPAR/A13

H13
E11
A11
B7
D13

A_CC/BE0#
A_CC/BE1#
A_CC/BE2#
A_CC/BE3#
A_CPAR

*CB@CB1410

D5
B9
B12

VCCA1
VCCA2
VCC8
VCC9
VCC10

CSTOP#/A20
CDEVSEL#/A21
CTRDY#/A22
CIRDY#/A15
CFRAME#/A23
C12
B13
A13
A12
B11

F3
G1
K2
N4
L6
L9
H11

U35

VPPD0
VPPD1
AVCC

AVPP

AVPP
+3V

AVCC

*CB@10p/50V_4

PCMCIA SOCKET

GND
D3 - CAD0
D4 - CAD1
D5 - CAD3
D6 - CAD5
D7 - CAD7
CE1- CCBE0
A10- CAD9
OE - CAD11
A11- CAD12
A9 - CAD14
A8 - CCBE1
A13- CPAR
A14- CPERR
WE/PGM - CGNT
RDY/BSY,IRQ*INT
VCC
VPP1
A16- CCLK
A15- CIRDY
A12- CCBE2
A7 - CAD18
A6 - CAD20
A5 - CAD21
A4 - CAD22
A3 - CAD23
A2 - CAD24
A1 - CAD25
A0 - CAD26
D0 - CAD27
D1 - CAD29
D2 - RFU
WP,IOIS16-CKRUN
GND

C

GND
CD1- CCD1
D11- CAD2
D12- CAD4
D13- CAD6
D14- RFU
D15- CAD8
CE2- CAD10
RFSH,VS*1-CVS1
IORD-CAD13
IOWR-CAD15
A17- CAD16
A18- RFU
A19- CBLOCK
A20- CSTOP
A21- CDEVSEL
VCC

B

VPP2
A22- CTRDY
A23- CFRAME
A24- CAD17
A25- CAD19
NC - CVS2
RESET-CRST
WAIT-CSERR
INPACK-CREQ
REG- CCBE3
BVD2,SP-CAUDIO
BVD1,STSCHG-C*
D8 - CAD28
D9 - CAD30
D10- CAD31
CD2- CCD2
GND

+3V

69
70
71
72
73
74

+3V

VCCD0#
VCCD1#
3.3V
3.3V
5V
5V
GND
OC#

G13
A7
D12
C8
B4

1
2
3
4
5
6
7
8

D3
H2
L4
M8
K11
F12
C10
B6

+3V

U17
VCCD0#
VCCD1#

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

CBE0#
CBE1#
CBE2#
CBE3#
PAR
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

(12,22) CBE0#
(12,22) CBE1#
(12,22) CBE2#
(12,22) CBE3#
(12,22) PAR

VCCD1#
VCCD0#

L11
M9
L8

M10
G_RST#

SUSPEND#
SPKROUT
RI_OUT#/PME#

B1
A1

H1
G4

F4
IDSEL

N5
N1
J3
E1
M2

PCIGNT#
PCIREQ#

CBE0#
CBE1#
CBE2#
CBE3#
PAR

B

CSERR#/WAIT#
CPERR#/A14

: GNT1#

CGNT#/WE#
CREQ#/INPACK#

Grant Indicate

A5
C13

: INTF#

Request Indicate : REQ1#

C11
B8

: AD18

Interrupt Pin

CAUDIO/BVD2/SPKR#
CSTSCHG/BVD1/STSCHG#
CINT#/READY/IREQ#
CBLOCK#/A19

ID Select

*CB@43K_6

T50
T112

T110
T111
T114

R179

B5
C5
D6
D11

AJ014100T41

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CN15
AVCC

A_CVS1#
A_CVS2#

PCM_SUS#

ENE1410

N8
K7
L7
N7
M7
N6
M6
K6
M5
L5
K5
M4
K4
N3
M3
N2
J2
J1
H4
H3
G3
G2
F1
F2
E2
E3
E4
D1
D2
D4
C1
C2

PCICLK
PCIRST#

M1
L3
L2
L1
K3
K1
J4
C

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

SERR#
PERR#
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#

AD[31..0]

(12,16,22) AD[31..0]

*CB@10p/50V_4

A_CRSVD/D2
A_CRSVD/D14
A_CRSVD/A18
A_CCD1#
A_CCD2#

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

(12,22) FRAME#
(12,22) IRDY#
(12,22) TRDY#
(12,22) DEVSEL#
(12,22) STOP#
(12) PERR#
(12) SERR#

C523

GND
GND
GND
GND
GND
GND

*CB@47_4 PCM_IDSEL

D

C287

VPPD1
VPPD0

+3V

M11
N11
L10
N10
K9
N9
K8

(12,22) PCIRST#
(12) PCLK_PCM

*CB@0_4

MFUNC6
MFUNC5
MFUNC4
MFUNC3
MFUNC2
MFUNC1
MFUNC0

(12) REQ1#
(12) GNT1#

AD18

VCCD1#
VCCD0#

R239

INTF#
SERIRQ
PCI_PME#
R229
PCMSPK
CB_RSMRST#
REQ1#
GNT1#
R233
PCIRST#
PCLK_PCM

(12) INTF#
(12,23,28) SERIRQ
(13,22) PCI_PME#
(24) PCMSPK

*CB@CARDBUS

*CB@ENE CP-2211
+5V

AVPP
R_A_CCLK

A

C239

C240

C250

C484

*CB@4.7u/10V_6

*CB@0.1u/10V_4

*CB@4.7u/10V_6

*CB@0.1u/10V_4

+3V

C242

C257

C307

C491

C256

*CB@4.7u/10V_6

*CB@0.1u/10V_4

*CB@4.7u/10V_6

*CB@0.1u/10V_4

*CB@0.1u/10V_4

*CB@0.1u/10V_4

*CB@10_4

A_CCLK
A_CRST#
A_CCLKRUN#
A_CFRAME#
A_CIRDY#
A_CTRDY#
A_CDEVSEL#
A_CSTOP#
A_CPERR#
A_CSERR#
A_CREQ#
A_CGNT#
A_CBLOCK#
A_CINT#
A_CSTSCHG
A_CAUDIO

AVCC

C236

R197

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

4

3

2

Rev
1A

PCMCIA(CB1410) -OPTION

Date: Thursday, July 24, 2008
5

A

CARDBUS
1

Sheet

21

of

35

A

B

C

D

OZ129 CardReader/1394
ID Select

: AD17

Interrupt Pin

: INTE#

Grant Indicate

+3V

+3VARUN
C476

L57

C520

C518

C519

4.7u/6.3V_6

0.1u/10V_4

0.1u/10V_4

MC_PWR_3V#

4
1
9

1u/16V_8

BK1608HS220_6

30mil

U32
RT9711BPF
2
3

: GNT0#

+3V

22

5 IN 1 Card Reader

Request Indicate : REQ0#
4

E

IN1
IN2

OUT3
OUT2
OUT1

EN#
GND
GND-C

OC#

VCC_XD

VCC_XD

VCC_XD

8
7
6

+3V
R381

5

C459

C483

C481

C482

4.7u/6.3V_6

0.01u/16V_4

0.01u/16V_4

0.01u/16V_4

4

*10K_4

+1.8V

C475

C477

C500

C248

C493

C487

4.7u/6.3V_6

0.1u/10V_4

0.1u/10V_4

4.7u/6.3V_6

0.1u/10V_4

0.1u/10V_4

VCC_XD

VCC_XD

R416

100/F_4

OZ129_IDSEL

(12,21)
(12,21)
(12,21)
(12,21)

2

CBE3#
CBE2#
CBE1#
CBE0#

(12) PCLK_OZ129
(12,21) DEVSEL#
(12,21) FRAME#
(12,21) IRDY#
(12,21) TRDY#
(12,21) STOP#
(12,21) PAR
(12) REQ0#
(12) GNT0#
(12,21) PCIRST#
(12) INTE#
(13,21) PCI_PME#
(12,28) CLKRUN#

5
45
42
39
40
41
43
44
17
18
1
11
3
6

IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
REQ#
GNT#
PCI_RST#
INTA#
PME#
CLKRUN#

106

TPBIAS
TPA+
TPATPB+
TPBMC_3V#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#
MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#
NC1
NC2
NC6
NC7
NC5
NC3
NC4
NC8

R453

5.9K/F_4

83
84

1394_XIN
1394_XOUT

76
75
74
72
71

TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N

4
113
111
112
107
108
110
117
114

MC_PWR_3V#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#

95
93
89
87
88
90
94
96
119
100
118
109
105
101
98
99
97

MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#

15p_4

Y7

SD_D0
SD_D1
SD_D2
SD_D3
SD/MS_CLK
SD_CMD
SD_CD#
SM_WPI#/SD_WP

R404
R397
R390
R391
R402
R393
R405
R479

33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4

SD-VCC
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CLK
SD-CMD
SD-C/D
SD-WP

19
29
40

SD-VSS1
SD-VSS2
SD-GND

24.576MHz
C489

15p_4

Better than 50ppm

MS_D0/XD_D2
MS_D1/XD_D7
MS_D2/XD_D1
MS_D3/XD_D0

R401
R395
R400
R394

0_4
0_4
0_4
0_4

MS_CD#
MS_BS/XD_D3

R406
R403

0_4
0_4

12
22
24
20
16
14
18
26

MS_D0/XD_D2_C
MS_D1/XD_D7_C
MS_D2/XD_D1_C
MS_D3/XD_D0_C
SD/MS_CLK_C
MS_CD#_C
MS_BS/XD_D3_C

MS-VCC
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-SCLK
MS-INS
MS-BS

10
28
42

XD-VCC

38

XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP

2
3
4
5
6
7
8
13

XD_CD#_C
XD_R/B#_C
XD_RE#_C
XD_CE#_C
XD_CLE_C
XD_ALE_C
XD_WE#_C
XD_WPO#_C

23
27
30
32
33
35
36
37

MS_D3/XD_D0_C
MS_D2/XD_D1_C
MS_D0/XD_D2_C
MS_BS/XD_D3_C
XD_D4_C
R396
XD_D5_C
R398
XD_D6_C
R399
MS_D1/XD_D7_C

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

MS-VSS1
MS-VSS2
GND1

XD-GND1
XD-GND2
GND2

R407
R384
R408
R386
R387
R388
R389
R392

0_4
0_4
0_4
0_4
0_4
0_4
0_4
0_4

XD_CD#
XD_R/B#
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WPO#

0_4
0_4
0_4

XD_D4
XD_D5
XD_D6

3

1
17
43

CARD_READER

Rev:2A 12/07 Modified the CN36 Footprint For Open Issue.

1394
TPBIAS0

2
8
9
10
13
126
127
128

C501

1u/10V_4
2

R433

R436

L48
2
3

56.2/F_4

2
3

56.2/F_4

1
4

1
4

*CL-2M2012-121JT

MEDIA_ACTV

12
16
33
66
68
104
115
116
121
123
124

78

2

C/BE3#
C/BE2#
C/BE1#
C/BE0#

REF

1

PCI_VCC
PCI_VCC
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCA
3.3VCCA
3.3VCCA
3.3VCCA

28
38
46
55

C494

XI
XO

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

(25) TP_XD_LED

OZ129_IDSEL
PCLK_OZ129

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

TEST0
TEST1

85
86
TPA0P
TPA0N

AGND
AGND
AGND
AGND
AGND
AGND

AD17

19
20
21
22
23
24
25
27
29
30
31
32
34
35
36
37
47
48
49
50
51
52
53
54
57
58
59
60
61
62
63
64

65
69
70
77
80
82

3

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

14
15
91
92
120
125

U33
AD[31..0]

(12,16,21) AD[31..0]

1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD

26
56
7
102
103
122
67
73
79
81

CN36
21
SD_D0_C
31
SD_D1_C
34
SD_D2_C
9
SD_D3_C
11
SD/MS_CLK_C
25
SD_CMD_C
15
SD_CD#_C
39
SM_WPI#/SD_WP_C 41

RN6

3 0_4P2R_4
1

4
2

L1394_TPA0+
L1394_TPA0-

OZ129T
TPB0N
TPB0P
L56

CN31
5
L1394_TPB0L1394_TPA0L1394_TPA0+
L1394_TPB0+

RN7

2 0_4P2R_4
4

1
3

1
3
4
2

6
7

L1394_TPB0L1394_TPB0+

8

BK1608HS220_6
1394_CONN
R443

R441

56.2/F_4

56.2/F_4

L50
4
1

4
1

3
2

3
2

*CL-2M2012-121JT

1394_COM

Rev:2A 12/07 Change New Part Number.

C515
R448
PCLK_OZ129

270p_4
5.1K/F_4

R450

1

1

*22_4

C522

PROJECT : BU2
Quanta Computer Inc.

*22p/50V_4

Size
Custom
NB4

Document Number

A

B

C

D

Rev
1A

OZ129T(5IN1/1394)

Date: Thursday, July 24, 2008
E

Sheet

22

of

35

5

4

3

+3V

+1.5V +3V

1.5V_VCC(RUN) 0.5A
3.3V_VCC(RUN) 1A
3.3V_AUX(S5) 0.005A

Rev:3A 03/03 Reserve the 39/41Pin to +3.3Vaux For Support WiMax.

SERIRQ_DEBUG
LDRQ#0_DEBUG
PLTRST#_DEBUG
PCLK_C_DEBUG

R462

0_4

D

(9) PCIE_TXP5
(9) PCIE_TXN5
(9) PCIE_RXP5
(9) PCIE_RXN5

(3,12) PCIE_CLK_MINI
(3,12) PCIE_CLK_MINI#

To BT

R204
R199

(25) WCS_CLK
(25) WCS_DAT

0_4
0_4

WCS_CLKR
WCS_DATR

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
NC
NC

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
NC
NC
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

23

15
13
11
9
7
5
3
1

GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#

NC
NC
NC
NC
NC
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

R247

RP52

*10K_4

*4.7K_4R2R_4
2

Reserve For Debug Card

*0_4
*0_4
*0_4
*0_4

+3V

+3V_S5

4
2

+3V_S5

*0_4

WiMAX_LED#_B
WL_NC40
USBP4+_C
USBP4-_C

R244
R242
R235
R236

*0_4
*0_4
0_4
0_4

WiMAX_LED# (29)

Q37
*2N7002E

3

(13,24) SB_SMBDATA1

USBP4+ (13)
USBP4- (13)

3
1

*0_4

R478

WL_SMDATA

1

R222

D

0_4

WL_SMDATA
WL_SMCLK
+3V
PLTRST#
RF_EN_WLAN1

R228

0_4 RF_EN

LFRAME#_PCIE
LAD3_PCIE
LAD2_PCIE
LAD1_PCIE
LAD0_PCIE

R220
R216
R211
R212
R208

*0_4
*0_4
*0_4
*0_4
*0_4

PLTRST# (12,18,24,28)
RF_EN (28)
3

(13,24) SB_SMBCLK1
LFRAME# (12,28)
LAD3 (12,28)
LAD2 (12,28)
LAD1 (12,28)
LAD0 (12,28)

WL_SMCLK

1

R225

+3V

Reserve For Debug Card

WLAN_MINIPCI

Q36
*2N7002E

2

R566

CN34
R253
R251
R248
R246

1

+3V

MINI CARD 1 5.6H_WLAN
(12,21,28) SERIRQ
(12) LDRQ#0
(12,18,24,28) PLTRST#
(12,16) PCLK_DEBUG

2

0_4

+1.5V

+3V_S5

Q35
(13,24) PCIE_WAKE#

3

WLAN_WAKE#

1

2

2N7002E-LF
R195

+3V_S5

C

C251

C252

C343

C265

C322

C312

C314

10u/10V_8

0.1u/10V_4

10u/10V_8

0.1u/10V_4

0.01u/25V_4

1u/16V_6

0.1u/10V_4

10K_4

+3V

MINI Card 2 5.6H_TV/HD DVD DECODER

C

4
2

+1.5V +3V

RP53

(9) PCIE_RXP2
(9) PCIE_RXN2

(3,12) CLK_PCIE_MINI2
(3,12) CLK_PCIE_MINI2#

GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
WAKE#

NC
NC
NC
NC
NC
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

B

3

(13,24) SB_SMBDATA1

USBP8+_C
USBP8-_C

R425
R429

0_4
0_4

USBP8+ (13)
USBP8- (13)

+3V

*0_4

Q40
2N7002E

3

(13,24) SB_SMBCLK1
R451

WL_HD_SMDATA

1

WL_HD_SMDATA
WL_HD_SMCLK

PLTRST#
RF_EN_WLAN2

Q39
2N7002E

3
1

15
13
11
9
7
5
3
1

2

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
NC
NC
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

2

(9) PCIE_TXP2
(9) PCIE_TXN2

NC
C-Link_RST
C-Link_DAT
C-Link_CLK
GND
NC
NC
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
NC
NC

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

4.7K_4R2R_4

1.5V_VCC(RUN) 0.5A
3.3V_VCC(RUN) 1A

CN33
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

WL_HD_SMCLK

1

RF_EN

+3V

MINIPCI_2

13"

+1.5V

1

C542

C486

C534

C510

C485

10u/10V_8

0.1u/10V_4

10u/10V_8

0.1u/10V_4

0.001u_4

WLAN
B

2

TV/HD DVD DECODER

NAND FLASH MEMORY CARD
+1.8V

Flash moduel operate at 1.8V
Pin2, 20 is NC for Flash module

+1.8V_FLASH

CN29
R367
42

NC

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26

+1.8V
PERST#
PDD7
GND
PDD6
PDD5
+1.8V
PDD4
PDD3
GND
PDD2
PDD1
PDD0
PDIOW#
+1.8V

25
24
23
22
21

PDIORDY#
PDA1
+1.8V
PDA0
PDCS1#

0_6

*1u/10V_4

*1u/10V_4

*1u/10V_4

22u/10V_8

IDE_RST#_B
PDD7

(14)
(14)
(14)
(14)
(14)
(14)
(14)
(14)
(14)
(14)
(14)

PDD6
PDD5

PDD2
PDD1
PDD0
PDIOW#

PDDREQ
PDIOW#
PDIOR#
PDIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

PDDREQ
PDIOW#
PDIOR#
PDIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
PDA2
PDCS3#

NC
PDD8
PDD9
GND
PDD10
PDD11
GND
PDD12
PDD13
GND
PDD14
PDD15
PDREQ
GND
PDIOR#

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6

PDIORDY
PDA1
PDA0
PDCS1#

GND
PDACK#
PIDE_INTR
PDA2
PDCS3#

5
4
3
2
1

PDMA66_R
PDD8
PDD9

R370

*0_4

PDD10
PDD11

+1.8V

PDMA66 (13)
C457

R372

*47n/25V_6

*100K_4

PDD12
PDD13

(13) HDD_AUX_RST#

(12,18,24,28)

PLTRST#

D6
1

*CH501H-40PT
2

D7
1

*CH501H-40PT
2

2

C451

1

C450

2

C447

PDD[0..15]

(14) PDD[0..15]

41
+3V

C446

PDD4
PDD3

A

NC

Q29
*DTC144EU

R166
*10K_4

PDD14
PDD15
PDDREQ

1

3

R165

*0_4

IDE_RST#_B

A

PDIOR#

PDDACK#
IRQ14
PDA2_R
PDCS3#

R365

*0_4

PROJECT : BU2
Quanta Computer Inc.

PDA2

*MEMORY_CARD

Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

MINI CARD & NAND FLASH CARD

Date: Thursday, July 24, 2008

Sheet
1

23

of

35

5

4

3

2

CN14

NEW CARD(BTO)
3.3VOUT
3.3VOUT

+3V_S5

17

AUXIN

AUXOUT

15

+NEW_3VAUX

+1.5V

12
14

1.5VIN
1.5VIN

1.5VOUT
1.5VOUT

11
13

+NEW_1.5V

6
20

SYSRST#
SHDN#

1
10
9

18
16
7

STBY#
CPPE#
CPUSB#

RCLKEN
NC
GND

D

(12,18,23,28) PLTRST#
RCLKEN

PERST#
OC#

(9) PCIE_RXP3
(9) PCIE_RXN3

+NEW_3V

3
5

VDD_3.3V(S5) 0.275A
VDD_3.3V(RUN) 1.3A
VDD_1.5V(RUN) 0.65A
Rev:2A 12/07 Support the New Card's Hot Plug Function.

CPPE#
CPUSB#

8
19

R529
R530

PERST#_R

R213

R237

NEW@47K_4

NEW@0_4
NEW@0_4

NEW_CLKREQ#

R183

CPPE#
NEW_CLKREQ#_RR
+NEW_3V

NEW@0_4

Q33

PERST#
+NEW_3VAUX

*NEW@DTC144EU

NEW_DET# (13)

3

(13,23) PCIE_WAKE#

1
+NEW_1.5V

PERST#

NEW@0_4

C272

NEW@OZ27C10LN-C1

(3,12) CLK_PCIE_NEW
(3,12) CLK_PCIE_NEW#

+3V_S5

2

3.3VIN
3.3VIN

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

(9) PCIE_TXP3
(9) PCIE_TXN3

U18

2
4

+3V

1

+3V_S5

R177

NEW_SMDATA
NEW_SMCLK

NEW@0_4

*NEW@3300P_4
R169
R168

(13) USBP3+
(13) USBP3-

NEW CARD'S POWER SWITCH

CPUSB#
USBP3+_R
USBP3-_R

NEW@0_4
NEW@0_4

Rev:2A 12/11 Swap the New Card From USB7 to USB3 For OHCI Controllers.

27
28
29
30

GND1
GND27
PETp0 GND28
PETn0 GND29
GND2
GND30
PERp0
PERn0
GND3
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
W AKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_DGND4

24

D

NEW@NEWCARD

Rev:3A 03/03 As check with AE regarding to PERST# do not add any delay into PERST#

+3V

5

+NEW_3V

4
2

(3,13) NEW_CLKREQ#

NEW_CLKREQ#

1

R180

*NEW@10K_4

+3V_S5

R188

*NEW@10K_4

+3V_S5

3

3

NEW@2N7002E

3

(13,23) SB_SMBDATA1

U15
*NEW@NC7SZ32P5X

NEW@4.7K_4P2R_4

3
1

2

Q31

C

NEW_CLKREQ#_RR

4
2

RP43

1

NEW_SMDATA

2

RCLKEN
C

Q34
*NEW@2N7002E
*NEW@0_4

1

R223

+NEW_3V

2

Q30

3

(13,23) SB_SMBCLK1

+3V

+3V_S5

+NEW_3VAUX
NEW_SMCLK

1

C320

+NEW_3V

+NEW_1.5V

C324

NEW@0.1u/10V_4
R226

+1.5V

NEW@2N7002E
C295

C294

C316

C262

C253

C249

NEW@0.1u/10V_4

NEW@0.1u/10V_4

NEW@0.1u/10V_4

NEW@4.7u/10V_8

NEW@0.1u/10V_4

NEW@0.1u/10V_4

C271

C283

NEW@0.1u/10V_4
NEW@4.7u/10V_8

NEW@0.1u/10V_4

*NEW@0_4

RJ45/USB BOARD

PC-BEEP

CN6

B

B

USB & LAN BOARD(ALW) +5VPCU 1.5A

+5VPCU

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

(28) USB_EN#0
(13,28) USBOC#0

+3V

+3V_S5
R261

(21) PCMSPK

(26) FM_RIGHT
(26) FM_LEFT
(13) FM_CLK
(12) FM_INT
(13) FM_DATA
(28) LOM_DISABLE#

+3V
*CB@0_4

+3V

C338

*CB@0.1u/10V_4
C337

*CB@0.1u/10V_4

2
*CB@0.1u/50V_6

PCMSPK_DELAY

4

D14

1

2
3

1

U19

1
U20

2

*CB@CHN217

C342

R270

*CB@0.1u/10V_4

*CB@10K_4

*CB@TC7SH08FU
PCM-1

2
PCM-3

3

C352

(13) USBP0(13) USBP0+
PCBEEP (26)

(3,12) PCIE_CLK_LAN
(3,12) PCIE_CLK_LAN#
(9) PCIE_TXN1
(9) PCIE_TXP1

*CB@0.1u/50V_6

(9) PCIE_RXP1
(9) PCIE_RXN1

D15

1

*CB@0.1u/50V_6

C354

*CB@SN74LVC1G86DCKR
4

3

*CB@0.1u/10V_4

C340

5

PCM-2

3

5

C341

(12,18,23,28) PLTRST#
(13,23) PCIE_WAKE#

*CB@CHN217
PCM-4

A

R287

*CB@200K/F_4

(13) SPKR

PCM-5

R265

Foe New Card Stuff Only.
C359

R292

*CB@0.1u/50V_6

*CB@86.6K/F_4

+3V

NEW@0_4

(13) FM_DETECT

Rev:2A 12/07 Change Connector From 30 to 32 pin For Added FM Detect.
Rev:3A 02/05 Change Connector PCB Footprint.

A

LAN_CONN

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

NEW CARD & RJ45 BOARD/BEEP

Date: Thursday, July 24, 2008
1

Sheet

24

of

35

5

4

LED BOARD

3

2

Felica
CN13
+5V_FELICA

CN12

+5VPCU
+5V
(28) BATLED1#
(28) BATLED0#
(28) PWRLED#
(28) SUSLED_EC

D

IDE_LED#

(22) TP_XD_LED
(28,30) ACIN

25

TP BOARD

Rev:3A 02/05 NC PIN3 To Follow LED
Board
1
2
3
4
5
6
7
8
9
10
11
12

1

1
2
3
4
5
6

(13) USBP1(13) USBP1+

1
2
3
4
5
6
7
8
9
10
11
12

T34

Rev:3C 12/07 Change R476 Resistor PCB Footprint From 0605 to 0805.
+5V

FA@FELICA_CONN

C66

4.7u/10V_8

C69

0.1u/10V_4

R476

27_8
D

CN10
+5V_TP
(28) TPDATA
(28) TPCLK

1
2
3
4
5
6

TPDATA
TPCLK
TP_LED_ON_C

LED_CONN

Rev:2A 12/07 Change CONN Footprint.
R152

1

+5V

C217
2

C70

C79

*10P_4

*10P_4

TP_LED_ON A-test no use for
TP Module shorterm solution.
Vendor sample A-test this pin is
4-way button not LED.

TP_CONN

+5V_FELICA

3

Rev:2A 12/07 Apply isolate TP_LED_ON From EC to Mainstream TP

FA@10u/10V_8

R162

C203

FA@1000p/50V_4

FA@4.7K_4

C206

FA@0.1u/10V_4

+

+5V

*FA@0_8

Q27

+3VPCU

FA@AO3413

3
Q38
MMBT3906

R272

10K_4

330_4
2

R288

2

1

3

IDE_LED#

2

C

R221

IDE_LED#_B

R217

FELICA_PWRON

(28)

1

(28) TP_LED_ON

0_4

SATA_LED# (14)
1

+3V

10K_4

Q28
FA@DTC144EU

Q78
MMBT3904
3

R295

C

TP_LED_ON_C

*0_4

Bluetooth Module
Rev:3D 07/23 Remove R59 and Added control BT Reset by EC GPIO77
Rev:2A 12/07 Change Low cost pin1 From MX1 to MX5
+3VPCU
(28,29) MX5
(28,29) MX2
(28,29) MY1

B

1
2
3
4

(13) USBP5(13) USBP5+

Low cost
5

+3V_FINGERPRINT

6

CN11

FP_CONN

(28,29) MX3
(13) LOW_DET
(28,29) MX4
(28) FN0#
(28) FN1#

CN9
1
2
3
4
5
6
7
8
9
10

(13) USBP6+
(13) USBP6(23) WCS_CLK

CN2

(28) BT_RESET
(23) WCS_DAT

1
2
3
4
5
6
7
8
9
10

(28) BT_EN

R64

+3V

0_4

USB_DETACH

C599

12

MMB

11

FINGER-PRINT

B

*100p_4

USB_DETACH: Low USB Connect
High USB Disconnect

BT_CONN

LOW@MMB_LOWCOST

Rev:3A 03/03 Reserve C599 Capacitors to Bluetooth Enable For EMI..

+3V

Rev:2A 12/07 Change CONN Footprint.

0_8

1

+3V

+3V_FINGERPRINT

3

2

C122

POWER BOARD

CN3

10u/10V_8

R94

C108

*1000p/50V_4

*4.7K_4

C107

*0.1u/10V_4

+

R102

7
(18,28) 3ND_MBCLK
(18,28) 3ND_MBDATA

Q23
*AO3413

(28) KEY_INT
+5VPCU
+3VPCU

Main strem

1
2
3
4
5
6

CN4
8

MAIN@MMB_BL123-06R-6P-L

3

1
2
3
4

(28) PWRLED#
(28) NBSWON#
+5VPCU

2

1

A

PB_CONN

FP_PWRON (28)

A

Q19
*DTC144EU

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

TP/FP/BT/PB/FELICA/MMB CONN

Date: Tuesday, August 19, 2008
1

Sheet

25

of

35

5

4

3

CODEC(CX20561)

2

Rev:3A 02/05 Added the EMI Solution.

R541

0_4

R540

0_4

R419

0_4

1

26

INT SPK AMP

ADOGND

+5V

PBY160808T-301Y-N_6

L59

*PBY160808T-301Y-N_6

VEN

5

VIN

ADOGND
+3AVDD
+AZA_VDD
C526

C540

10u/10V_8

0.1u/10V_4

L60

C531

C548

C567

C533

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

10u/10V_8

PBY160808T-301Y-N_6

R480

0_4

R447

0_4

C562

+3V

VOUT

ADJ

L58

+3VSUS

4

GND

+3V_S5

*0_6

2

D

*G961-18ADJTEU(SOT89-5)
3

U37
R501

R285

1

ADOGND

D

*36K/F_4

*1u/16V_6
ADOGND

R271
*12K/F_4

ADOGND
ADOGND
R438

0_4
+3AVDD

Rev:3B 04/12 Stuff R438/R447 0ohm For EMI Suggest.
C525

C530

10u/10V_8

ADOGND
C565

C570

0.1u/10V_4

10u/10V_8

0.1u/10V_4

+5V
R264

R518

+5V_VDD

0_6

0_4

C558

C574

C575

10u/10V_8

0.1u/10V_4

*0.1u/10V_4

ADOGND

SECNTL (27)

ADOGND

ADOGND

R472
R467

0.1u/10V_4

0_4

DIB_P
DIB_N

PCBEEP_C

12

PC_BEEP

SPDIF_OUT_C

48

S/PDIF

*10K_4
*10K_4

GPIO2
GPIO1
EAPD#

45
46
47

MIC1_BIASB
MIC1-LL
MIC1-RR

MICBIASC
PORTC_L
PORTC_R

18
16
17

MIC1_BIASC
FM_LINEIN_L
FM_LINEIN_R

PORTD_L
PORTD_R

27
28

MIC_L
MIC_R

20
21

MONO
STEREO_L
STEREO_R

29
30
31

SENSEA

13

SENSEA

VREF

24

CX20561_VILT

FLY_P
FLY_N

39
37

CX20561_FLY_P
CX20561_FLY_N

VREF_LO
VREF_HI
RESERVED_32
RESERVED_33

22
23
32
33

CX20561_RVD22
CX20561_RVD23

Rev:3B 04/18 Del the R476/R477 By EMI Suggest .
1
2

DMIC_CLOCK
DMIC_1/2

CX20561-12Z

PC Beep GAIN CONTROL
GAIN

GPIO1

GPIO2

10K

10K

AVSS_25
AVSS_38

SPKR-R-1 R527

10.5K/F_6

SPKR-R-2

18

RIN1

MIC1-L (27)

2
17

LIN2
RIN2

MIC1-VREFO

*0_4

R520
C564
R525
C572

16K/F_6
330p_4
16K/F_6
330p_4

ADOGND

C362
C344

4.7u/6.3V_6
4.7u/6.3V_6

G1441_RBY
G1441_PBY

16
3

ADOGND

R526

0_4

G1441_SE/BTL

11

INSPKR+

MIC1-R (27)

R254
R255

*0_4
*0_4

MIC1-R
MIC1-L

R512
R517

*10K_4
*10K_4

FM_LINEIN_LLL
FM_LINEIN_RRR

R266
R267

10K_4
10K_4

G1441_SHDN
C555
C560

FM_LINEIN_LL
FM_LINEIN_RR

2.2u/6.3V_6
2.2u/6.3V_6

C552
C559

INT_MIC_R

2.2u/6.3V_6
2.2u/6.3V_6

SPKR-L
SPKR-R

R262
R257

R466

5.1K/F_4

R468

5.11K/F_4

R469

10K/F_4

R471

20K/F_4

4.7K_4
0_4

5

C339

10u/10V_8

R263

1K_4

+3AVDD
PORT_A# (27)
PORT_B# (27)
PORT_C# (12)

1u/10V_4

C571

C566

10u/10V_8

0.1u/10V_4

4
15

RBYPASS
LBYPASS
SHDN
SE/BTL
G1441

FM_LEFT (24)
FM_RIGHT (24)

VOL

20

IN1/IN2

13

ROUT+
ROUTLOUT+
LOUT-

19
12
24
7

ADOGND
C

INSPKR+
INSPKRINSPKL+
INSPKL-

ADOGND
+3AVDD

INT_MIC (17)
ADOGND

INT SPEAKER
If Int Mic change to
Port C, and Remove
FM.Than NC R469

CN30
INSPKRINSPKR+
INSPKLINSPKL+

L23
L22
L21
L20

INSPKR-N
INSPKR+N
INSPKL-N
INSPKL+N

BK1608LL121_6
BK1608LL121_6
BK1608LL121_6
BK1608LL121_6

1
25
36
4

D36
C556

D37

D38

D40

INT_SPK

B

25
38

CX20561-12Z Not support digital MIC
CX20561-13Z support digital MIC

7
41

DVSS_7
DVSS_41

B

MIC2_INT_L
MIC2_INT_R

R252

2.2u/6.3V_6

LVDD
RVDD

26
40
36

GPIO2
GPIO1
EAPD#/GPIO0

19
14
15

MIC1-R

C576

INSPKL+

1

R456

43
42

MICBIASB
PORTB_L
PORTB_R

MIC1-L

2.2u/6.3V_6

LIN1

SPKR-R

Clamp-VPORT_6
C346

C347

1u/10V_4

1u/10V_4

Clamp-VPORT_6

2

C528

(24) PCBEEP
(27) SPDIF_OUT

BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

2.2u/6.3V_6

C543

1

25
22
21
10
9

(27) DIB_P
(27) DIB_N

6
10
8
5

C538

SPKR-L-2

1

ACZ_SDIN20561

34
35

10.5K/F_6

2

33_4

PORTA_L
PORTA_R

(27)

SPKR-L-1 R519

1

R460

RESET#

MIC1-VREFO

2.2u/6.3V_6

2

(13) BIT_CLK_AUDIO
(13) ACZ_SYNC_AUDIO
(13) ACZ_SDIN0
(13) ACZ_SDOUT_AUDIO

11

MIC1-VREFO

0_4

C563

1

(13) ACZ_RST#_AUDIO

R260

SPKR-L

2

C

VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44

U36
0.1u/10V_4

AVDD_26
AVDD_40
AVEE

9
4
3
44

C529

HPL (27)
HPR (27)

6
8
23

Rev:3A 02/05 Page29 : Modify the Speaker Gain To 9.7dB.

U38

Determining HDA use +1.5V/+3V

ADOGND

14

*0_4

ADOGND

CT
NC
SECNTL

R258
+AZA_VDD_IO

VDD3

0_4
*0_4

THRMPAD
GND/HS
GND/HS
GND/HS
GND/HS

R459
R458

+3V_S5
+3VSUS

Clamp-VPORT_6

Clamp-VPORT_6

ESD Protect
ADOGND
+5V_VDD

0dB
-6dB

omit

omit

-12dB

10K

omit

ADOGND
R268
ADOGND

100K_4

+3AVDD

G1441_SHDN

omit

10K

D17

(28) AMP_MUTE#
EAPD#

Reserve INTMIC

Reserve FM

MIC1-LL
MIC1-RR

2

MTW355
10K_4

Rev:3A 02/05 Stuff C539/C544 For INT MIC Recording Noise.

A

1

D16

1

2

*MTW355

MUTE#

FM_LINEIN_L
FM_LINEIN_R

Q42

2

2N7002E

H : AMP turn on
L : AMP power down

1

-18dB

3

R283

MIC2_INT_L
MIC2_INT_R

ADOGND
A

Rev:2A 12/07 NC D16 For there has "Bo-Bo" Sound while plug-in/out Headphone.
C544

C539

C547

C545

C561

C551

0.1u/10V_4

0.1u/10V_4

*100p_4

*100p_4

*100p_4

*100p_4

MUTE# (27)

CN38
CN16
INT_MIC_R

2
1
*INT_MIC

ADOGND

1
52
63
4

FM_LINEIN_LLL
FM_LINEIN_RRR

ADOGND

ADOGND

ADOGND

ADOGND

ADOGND

ADOGND

ADOGND

PROJECT : BU2
Quanta Computer Inc.

ADOGND

*FM_LINEIN
Size
Custom
NB4

Document Number

Date: Thursday, July 24, 2008
5

4

3

2

Rev
1A

CONEXANT(CX205601)/SPK/AMP
1

Sheet

26

of

35

5

4

VR

+3V

R274

10K_4

R276

10K_4

3

2

1

27

FM TUNER & MDC

Rev:2A 12/07 Change New Part Number.

VR1
0_4

R289

VR_UP

0_4

2

VR_DN

A

3

D

COM

B

7

DIGVOL_DN

(28) DIGVOL_DN

R275

6

DIGVOL_UP

(28) DIGVOL_UP

1
R571

4

4

5

5

C349

0.1u/10V_4

0.1u/10V_4

CN20

1
3
5
7
9
11

L62

3
2

4
1

R570

*0_6

(26) DIB_P
(26) DIB_N

C350

*0_6

DIB_P_R
DIB_N_R

3
4
2
1
RFCM1632100M3_C

SB_GPIO7
SB_GPIO27
FM_INT
DIB_P
DIB_N
FM_SUSCLK

+3V
GND
NC
FM_L
FM_R
NC

2
4
6
8
10
12

+3V
C50
D

0.1u/10V_4

MDC/FM
VR_XRE094_NOBLE

Rev:3B 04/18 Added the common mode choke on DIB_P/N For EMI Solution.

+3V

SYSTEM MIC

+3V

C581
C360

U23
*0.1u/10V_4

*0.1u/10V_4

5

Vcc

5

DIGVOL_UP

4

Q

1
2
3

VR_UP

1

D

4

4.7K_4

CN32

(26) MIC1-L

VR_DN

(26) MIC1-R

3

GND

R417

(26) MIC1-VREFO

U41

2

CLK

MIC1-L

L52

BK1608LL121_6

MIC1-L1

MIC1-R

L54

BK1608LL121_6

MIC1-R1
PORT_B#

(26) PORT_B#

*NL17SZ17

1
2
6
3
4

8

C358
*SN74LVC1G79DBVR

7

5
MIC_JACK

C496

C490

0.1u/10V_4

0.1u/10V_4

*0.1u/10V_4

Normal OPEN Jack

+3AVDD
C

C

D41

DIGVOL_DN

Rev:2A 12/07 Reserve U41 to Solve VR Not Smooth.

C348

CNXT suggestion can not over 100P

1

PORT_B#

ADOGND

3

*0.1u/10V_4

Rev:3A 02/05 Change L52/L54 And Stuff C496/C490 For INT MIC Recording Noise.
2
*DA204U
ADOGND

HP JACK

HP Amplifier
Rev:2A 12/11 3G/GPRS ExpressCard noise in HP.
Rev:3A 02/05 Change R545/R546 Meet HP Jack Signal Measure.
R273

G1412_HPL

C357

*G1412@0_4
HP_JD

(26) HPR

R545

0_6

HPL_1

L61

BK1608LL121_6

HPL_SYS

R546

0_6

HPR_1

L55

BK1608LL121_6

HPR_SYS

C588

5
4
10
3
2
1

C353

C351

*G1412@4.7u/6.3V_6

*G1412@.1u/10V_4

C568

*G1412@10u/10V_6

HPL_2

C569

*G1412@10u/10V_6

HPR_2

C589

C513

C546

0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

C582

C583

*100p_4

*100p_4

9

B

R278

HPL_2

Drive
IC

+3AVDD

LED

(26) SECNTL

Rev:2A 12/07 Change HPL/HPR Series Resistor From 0ohm to 10u(C582/C583) And Stuff R445/R478.

R291

3
15

*G1412@100K_4

D18

1

2 *G1412@MTW355

D19

1

2 **G1412@MTW355

HPR_2
ADOGND

4

+3AVDD

7
8
6

(26) MUTE#

ADOGND

*G1412@10K_6

-

INL

+

HP_JACK

ADOGND

R269

6
10

+NVDD
G1412MUTE#
*G1412@10K_6

1
16
8

ADOGND

SVDD
PVDD
SVSS
NVDD

OUTL
NC1
NC2
NC3
NC4
SGND
PGND
TPAD

G1412_HPL

5

ADOGND

9
11
12
14
2
13
17

ADOGND

+NVDD
C363
*G1412@4.7u/6.3V_6

SHDNR#
SHDNL#
INR

ADOGND

+
-

OUTR

7
ADOGND

*G1412@G1412

SPDIF_OUT (26)

Rev:2A 12/13 CN37 9/10# Shield Pin to ADGND For ESD issue.
Rev:3A 02/05 Change C588/C589 To 0.1u For Enhance Avoid 3G Noise And Meet HP Jack Signal Measure

+5V
(26) PORT_A#

*G1412@47P_4

U21

CN37

B

(26) HPL

*G1412@10K_6

*G1412@0_4

R290

G1412_HPR

+3AVDD
R277

+3V_SPD

C355

*G1412@47P_4

PORT_A#
R280

3

+5V
Q46
2N7002

*G1412@10K_6

G1412_HPR

R294

HP_JD

10K_4

C361

*G1412@4.7U/6.3V_6

R293

2

1

3

C590

+3V_SPD

1

+3V

A

D63

+3AVDD

HP_JD

2

0.1u/10V_4

2

Q45
2N7002

1

3

22K_4

1

D64

2

Q58
BSS84

2

A

Clamp-VPORT_6

Clamp-VPORT_6

+NVDD

U22

1

VOUT

2

VIN

3

C-

C+

6

/SHDN

5

GND

G1412MUTE#

PROJECT : BU2
Quanta Computer Inc.

4

1

ADOGND
*G1412@G5930
ADOGND

Rev:3A 02/05 Added the ESD Protect.

Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

JACK/VR/FM/MIC/MDC/AMPLIFIER

Date: Thursday, July 24, 2008
1

Sheet

27

of

35

5

4

3

2

1

SM BUS PU

EC(KBC)

+3V

+3VPCU

EC_VDD R24
+A3VPCU
L8
BLM18AG601SN1_6

D68
C49

C51

0.1u/10V_4

10u/10V_8

*0_6
DNBSWON#_uR
DIGVOL_UP
DIGVOL_DN

BD520WS

28

+3VPCU

Rev:3D 07/23 Add D68 to Avoid +3V Voltage Leakage.

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
FN0#
FN1#
3ND_MBCLK
3ND_MBDATA

R53
R45
R44
R52
R321
R314
R35
R33

4.7K_4
4.7K_4
4.7K_4
4.7K_4
4.7K_4
4.7K_4
4.7K_4
4.7K_4

CRT_SENSE#

R311

4.7K_4

C55
0.1u/10V_4

C45
0.1u/10V_4 U5

C383

C48

C384

10u/10V_8

*0.1u/10V_4

*0.1u/10V_4

*0.1u/10V_4

8769AGND

D

4

C57
0.1u/10V_4

C34

0.1u/10V_4

VDD

C38
0.1u/10V_4

102

C381
0.1u/10V_4

VCC1
VCC2
VCC3
VCC4
VCC5

C56
10u/10V_8

AVCC

D

19
46
76
88
115

+3V
C39

H=1.6mm

I/O Base Address

Rev:2A 12/07 Add D57,D58 to Avoid Voltage Leakage.

I/O Address

121

(13) GATEA20

Rev:2A 12/13 Add D49,D50 to Avoid Voltage Leakage.

122

(13) RCIN#

R534

0_4

SCI#_uR

D23

(13) SCI#

BAS316

(17) EC_FPBACK#

6
124

(18) CEC_EC_HP

D50

(12,18,23,24) PLTRST#

7
*BAS316

123

(24) USB_EN#0

125

(12,21,23) SERIRQ

9

(20) USB_EN#1
PCLK_591

(29)
(29)
(25,29)
(25,29)
(25,29)
(25,29)
(29)
(29)

C

R310
*22_4
C379

SMBUS Table
1

Devices
Battery

2

CPU Thermal Sensor
3D Sensor
EC EEPROM

3

HDMI CEC
Touch Sensor

MY0

(30) MBCLK
(30) MBDATA
(6,19) 2ND_MBCLK
(6,19) 2ND_MBDATA
(18,25) 3ND_MBCLK
(18,25) 3ND_MBDATA

(6) AMD_PROCHOT#
B

54
55
56
57
58
59
60
61

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

(29) MY0
(25,29) MY1
(29) MY2
(29) MY3
(29) MY4
(29) MY5
(29) MY6
(29) MY7
(29) MY8
(29) MY9
(29) MY10
(29) MY11
(29) MY12
(29) MY13
(29) MY14
(29) MY15
(29) MY16
(29) MY17

*10p_4

SMBUS

29

D65

*BAS316

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

MBCLK
70
MBDATA
69
2ND_MBCLK
67
2ND_MBDATA 68
3ND_MBCLK 119
3ND_MBDATA 120
24
HWPG
28

Rev:3A 02/05 System will Leakage when system into G3 mode.
+5V
R319
R320

10K_4
10K_4

TPCLK
TPDATA

(25) TPCLK
(25) TPDATA
T3
(25) FP_PWRON
(29) FN_F10
(25) FELICA_PWRON

TPCLK
TPDATA

R43

20M_6

CLKRUN/GPIO11
GA20
KBRST

LPC

ECSCI/GPIO54

DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97

D/A

LDRQ/GPIO24
GPIO41(VBAT)
LPCPD/GPIO10

GPIO

LRESET
PWUREQ/GPIO67
SERIRQ
SMI/GPIO65

KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57
SCL1/GPIO17
SDA1/GPIO22
SCL2/GPIO73
SDA2/GPIO74
SCL3/GPIO23
SDA3/GPIO31
SCL4/GPO47
SDA4/GPIO53

8768_32KX1

77

32KX1/32KCLKIN

8768_32KX2

79

32KX2

R322

EC_VBAT

111
113
93
32
118
62
65
22
16
81
66

D46

TEMP_MBAT (30)
USBOC#0 (13,24)
FN0# (25)
FN1# (25)
DIGVOL_UP (27)
DIGVOL_DN (27)
NBSWON# (25)
SUSB# (13,16)

BAS316

R309

*0_4

BADDR1-0

ICM (30)
VFAN (6)

Index

Data

00

XOR TREE TEST MODE

01

CORE DEFINED

10

2Eh

2Fh

11

164Eh

164Fh

SHBM=0: Enable shared memory with host BIOS
Rev:2A 12/07 Stuff R38 And NC R36 For Boardcom BT issue.

SUSLED_EC (25)

Rev:3A 02/13 Reserve the DISPON Pin By EC Control.
RF_LED (29)
AMP_MUTE# (26)
ID (30)
D/C# (30)
EC_DISPON (17)

BADDR0

BADDR0

R36

*10K_4

BADDR1

BT_EN

R38

10K_4

SHBM

RF_EN

R316

10K_4

Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware

LED_LOGO (29)

BADDR0
BT_EN
CRT_SENSE#

ID

BT_EN (25)
CRT_SENSE# (19)
LID591# (17)

BATLED0#
BATLED1#

PWRLED#

+3VPCU

U11
2ND_MBCLK
2ND_MBDATA

CONTRAST (17)
KILL_SW (29)
BATLED0# (25)
BATLED1# (25)
SUSON (34,35)
MAINON (19,34,35)
TP_LED_ON (25)
PWRLED# (25)

6
5

C

A0
A1
A2

1
2
3

VCC
GND

8
4

SCL
SDA

7

WP

C61

24LC08BT-I
0.1u/10V_4

ADDRESS: A0H

31
63
117
64
26
15

+1.2V_ON (33,35)
FANSIG (6)
LOM_DISABLE# (24)
ACIN (25,30)
S5_ON (31,35)
VRON (32)

84
83
82
91

BT_RESET (25)
RF_EN (23)

SPI FLASH

+3VPCU

Rev:3D 07/23 Bluetooth can't work issue.
SPI

FIR
CIR

SPI_DI/GPIO77
SPI_DO/GPO76/SHBM
SPI_SCK/GPIO75
GPIO81
IRRX1/GPIO72/SIN2
IRRX2_IRSL0/GPIO70
IRTX/GPIO71/SOUT2
CIRRXM/GPIO46/TRST
GPIO34/CIRRXL
CIRTX1/GPIO16
CIRTX2/GPIO30
F_SDI/F_SDIO1
F_SDO/SDIO0
F_CS0
F_SCK

PS/2

5
18
45
78
89
116

EC

TA1/GPIO56
TB1/GPIO14
TA2/GPIO20
TB2/GPIO01
TA3/GPIO51
TB3/GPIO36

FIU

PSCLK1/GPIO37
PSDAT1/GPIO35
PSCLK2/GPIO26
PSDAT2/GPIO27
PSCLK3/GPIO25
PSDAT3/GPIO12

80

110
112

TIMER

SMB

72
71
10
11
12
13

ICM_EC

no wake-up
GPO82/TRIS
capability GPO84/BADDR0

A_PWM/GPIO15
B_PWM/GPIO21
C_PWM/GPIO13
D_PWM/GPIO32
PWM
E_PWM/GPIO45
F_PWM/GPIO40/CLKIN48
G_PWM/GPIO66
H_PWM/GPIO33

USBOC#0_uR
FN0#
FN1#
DIGVOL_UP
DIGVOL_DN
NBSWON#

101
105
106
107

17
20
21
25
27

SOUT_CR/GPO83/BADDR1
SIN_CR/CIRRX/GPIO87
SER
GPIO06

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

97
98
99
100
108
96
95
94

GPIO42/TCK
GPIO43/TMS
wake-up
GPIO44/TDI
capability
GPIO50/TDO
CIRTX2/GPIO52/RDY

RF_EN
DNBSWON#_uR

D30

RSMRST#_uR R47

0_4

PWROK_EC

0_4

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR

R46

U2

DNBSWON# (13)
RSMRST# (13)
SUSC# (13)
ECPWROK (16)
KEY_INT (25)

CIRRX2

SPI_SDI_uR

R306

33_4

SPI_SDI

2

SO

SPI_SDO_uR

R304

33_4

SPI_SDO

5

SI

SPI_SCK_uR

R305

33_4

SPI_SCK

6

SCK

1

CE

SPI_CS0#_uR
+3VPCU

R22

10K_4

Winbond

Rev:2A 12/07 Add D57,D58 to Avoid Voltage Leakage.

EON

USBOC#5_uR

VCC_POR

VCC_POR#

R315

104

VREF_uR

R313

D47

BAS316
4.7K_4
0_4

HOLD

7

C23

WP

3

0.1u/10V_4

VSS

4

2nd sorce
MXIC

85

VDD

8

W25X80VSSIG

NUMLED (29)
CAPSLED (29)

30

VREF

BAS316

75
73
74
23
14
114
109

CLKOUT/GPIO55

VCORF

*BAS316

A/D

AGND

8

AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04
AD6/GPIO03
AD7/GPIO07

MX25L8005M2C-15G

AKE5GFK0Z09

W25X80VSSIG

AKE3GFP0N08

EN25F80-75HCP

AKE3GZP0Q00

B

USBOC#5 (13,20)
+3VPCU

+A3VPCU

INTERNAL KEYBOARD STRIP SET
+3VPCU

44

PCLK_591

D49

(12,22) CLKRUN#

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

103

0_4

3
126
127
128
1
2

GND1
GND2
GND3
GND4
GND5
GND6

R535

(12,23) LFRAME#
(12,23) LAD0
(12,23) LAD1
(12,23) LAD2
(12,23) LAD3
(12,16) PCLK_591

MY0

R312

10K_4

33K/F_4
1

4
L7

C386

0_6

C385
2

VCORF_uR

Y2

WPC8769LDG: AJ087690F08 (w/CIR)

CIR

C380

3

6.8p_4

WPC8763LDG: AL008763B00 (w/o CIR)

1u/16V_6

32.768KHZ

8769AGND
8769AGND

WPCE775L:

AJ007750F00 (w/o CIR)

WPCE775C:

AJ007750F01 (w/CIR)

R521

R317

*0_4

*0.1u/10V_4

R523

BAS316

D25

BAS316

D27

BAS316

D26

BAS316

D29

BAS316

D24

BAS316

D66

*BAS316

R318

0_4

2

*CIR@10K_4

CIRRX2

CCD_POWERON (17)

HWPG

D48

20 mlis

1

For WPCE775

(34) HWPG_1.8V

CIR@0.1u/16V_4

U39
CIR_VCC

Rev:2A 12/13 Reserve the ESD Protect.

10K_4
D28

C573

C382
EC_VBAT

A

CIR@0_4
*CIR@0_4

+5VPCU

+A3VPCU

For WPC8763

R308

Rev:2A 12/07 Apply R528/R531/R532 Pull-up For Battery LED issue.

VCC

1

OUT

3
4

GND
GND

A

CIR@FM-2138SC-5CN

2

(33) HWPG_1.2V_NB

+5VPCU

R522

+3V

(31) SYS_HWPG

+3VPCU

6.8p_4

*CIR@Clamp-VPORT_6

(35) HWPG_CPUIO
(35) HWPG_1.1V_NB
(35) HWPG_1.2V_S5
(6,16,32) VRM_PWRGD

NBSWON#

+3VPCU
BATLED0#
BATLED1#
PWRLED#

R528
R531
R532

10K_4
10K_4
10K_4

G4

1

PROJECT : BU2
Quanta Computer Inc.

2 *SHORT_ PAD1

C579
0.1u/10V_4
Size
Custom

Rev:2A 12/07 Short Pad to Replaced Power S/W.

Rev:3A 02/08 Reserve the CPU PWRGOOD Diode For Sequence Timing.
5

NB4

Document Number

4

3

2

Rev
1A

EC(KBC)-WPCPC8763/WPC8769

Date: Friday, August 01, 2008
1

Sheet

28

of

35

5

4

3

390_4

8 *100px4
6
4
2

MY3
MY5
MY14
MY6

7
5
3
1

8 *100px4
6
4
2

MY2
MY1
MY0
MY4

C29

RF_LED_R

2

R21

KILL SW

R284

(28) KILL_SW

1

+3VPCU

3

1

+3V

KILL_SW

3

HOLE20
6
5
4

7
8
9

HOLE5
H-C189D118P2-8

HOLE8
*H-C98D98N

HOLE23
*O-BU2G-1

*H-C295D98P2-8

H-TC157BC197D118P2-8

D43

*MAIN@Clamp-VPORT_6

PAD5
*EMI_PAD

PAD6
*EMI_PAD

*MAIN@Clamp-VPORT_6

EMI

1

1

+5V

+5V

+5V

VIN

VIN

VIN

PAD2
*EMI_PAD

C20

C442

C26

C41

C46

C60

0.1u/50V_6

0.1u/50V_6

0.1u/50V_6

0.1u/50V_6

0.1u/50V_6

0.1u/50V_6

PAD3
*EMI_PAD

PAD4
*EMI_PAD

C600

+1.8VSUS

1

*H-C256D98P2-8

+1.8VSUS

+1.8VSUS

+NB_CORE

+NB_CORE

+NB_CORE

C586

C585

C584

C52

C592

C593

C594

C595

0.1u/50V_6

0.1u/50V_6

0.1u/50V_6

0.1u/50V_6

330p_4

330p_4

330p_4

330p_4

1

PROJECT : BU2
Quanta Computer Inc.

H-TC157BC197D118P2-8

Size
Custom

3

A

HOLE17
H-C189D118P2-8

Document Number

2

Rev
1A

KEYBOARD/LED/KILL SW/HOLE

Date: Thursday, July 24, 2008
4

+NB_CORE

Rev:2A 12/11 EMI Solution the add Ground Pad And 0.1u Cap on 1.8VSUS Plane.
Rev:3A 02/05 EMI Solution the add 0.1u Cap on +NB_CORE Plane.
HOLE18
H-C189D118P2-8

1

1

HOLE16
H-C189D118P2-8

1

HOLE12
6
5
4

HOLE15
H-C189D118P2-8

+1.8VSUS

1000P_4

NB4
5

PAD1
*EMI_PAD

+3V_S5

MINI CARD

1
2
3

H-TC157BC197D118P2-8

1

*H-TC256BC217D98P2-8

7
8
9

1
2
3

1
2
3

H-TC157BC197D118P2-8

HOLE11
6
5
4

7
8
9

HOLE13
6
5
4

7
8
9

1

1
2
3

1
2
3

*H-C295D98P2-8

HOLE3
6
5
4

7
8
9

1
2
3

HOLE1
6
5
4

7
8
9

1
2
3
HOLE10
6
5
4

7
8
9

D42

*H-C295D98P2-8

NB

HOLE6
6
5
4

LOGO_2

D20
DA204U

HOLE19
*H-C98D98N

1

1
2
3

*H-C295D98P2-8

CPU
7
8
9

LOGO_1
10K_4

1
2
3
HOLE4
6
5
4

*H-C295D98P2-8

1
2
3

A

1

C

HOLE14
6
5
4

7
8
9

*H-C295D98P2-8

7
8
9

1
2
3

1
2
3
*H-C295D98P2-8

LOGO_2

+3VPCU

CAPSLED (28)
FN_F10 (28)
NUMLED (28)

150_4

1
2
3
HOLE9
6
5
4

7
8
9

MAIN@2N7002

B

HOLE2
6
5
4

*H-C295D98P2-8

HOLE22
6
5
4

7
8
9

Q43

MAIN@2N7002

2

7
8
9

1
2
3

1
2
3
*H-C295D98P2-8

2

Q44

*MAIN@0.1u/10V_4

Rev:3B 04/18 ESD Solution the Added the Ground Pad.

7
8
9

LED_LOGO

2

C356

1

7
8
9

LED_LOGO

(28) LED_LOGO

*BZ5V6

KEYBOARD_CONN

HOLE7
6
5
4

Mainstream --> White
Low Cost --> N/A

3
WiMAX_R_LED

Rev:2A 12/09 Modified the Footprint.

HOLE21
6
5
4

LED1

Q41
*BSS84

1

2

HOLE

NAIN@99-113UNC/V90/TR8

LED2

SW2

K_LED_P

B

3

(23) WiMAX_LED#

MY16

100p_4

1

D45

35
MY17

2

2
WiMAX_R

1

*LED_B_LTST-C190TBKT

1

7
5
3
1

MAIN@99-113UNC/V90/TR8

2

3

MY7
MY13
MY12
MY15

WiMAX_R_LED

*100_4

1

8 *100px4
6
4
2

LED3
R524

+5V

MY2 (28)
MY1 (25,28)
MY0 (28)
MY4 (28)
MY3 (28)
MY5 (28)
MY14 (28)
MY6 (28)
MY7 (28)
MY13 (28)
MY8 (28)
MY9 (28)
MY10 (28)
MY11 (28)
MY12 (28)
MY15 (28)
MX7 (28)
MX2 (25,28)
MX3 (25,28)
MX4 (25,28)
MX0 (28)
MX5 (25,28)
MX6 (28)
MX1 (28)

1

7
5
3
1

MY17 (28)

K_LED_P
MY2
MY1
MY0
MY4
MY3
MY5
MY14
MY6
MY7
MY13
MY8
MY9
MY10
MY11
MY12
MY15
MX7
MX2
MX3
MX4
MX0
MX5
MX6
MX1
K_LED_P
CAPSLED
FN_F10
NUMLED

1

MX0
MX5
MX6
MX1

MAIN@150_4

2

8 *100px4
6
4
2

R281

MAIN@150_4

1

7
5
3
1

MY17

R286

D

WiMAX LED

MY16 (28)

LOGO_1

MX7
MX2
MX3
MX4

100p_4

+5V

3

8 *100px4
6
4
2

C30

+5V

RF_LED (28)

2

7
5
3
1

K_LED_P
MY16

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

C

CP1

R513

1

CP2

RF_LED_R

2 LED_Y_LTST-C190KFKT

1

1

CP3

LED4

36

2

CP5

MX6
MX4
MX7
MX3

1 10Kx8
2
3
4
5

Rev:2A 12/07 Updated the LED1/LED2 Footprint And Part Number.
Rev:3A 02/05 Change R281/R286 and R375 To 150ohm For LED Light Not Enough

1

CP4

MY16/MY17 for 17"only

CN8

RP13

10
9
8
7
6

29

Satellite LED

Mainstream --> Orange
Low Cost --> Orange

+3VPCU

D

1

W-LAN&BT LED

INT KEYBOARD
MX5
MX0
MX1
MX2

2

1

Sheet

29

of

35

5

4

3

VA
PF1
LITTLE-7A_1206
1
2

PJ1

1
2
3
4

3

1

1

30

REV.B modify

0.02_7520
PR32

PD3
PDS1040S-13
1

PL2
HI0805R800R-00_8

2

PQ20
FDD6685
3
4

VA2

2

VIN

3

4

2
PC1
0.1u/50V_6

20277-04XX-4P-L

2200p/50V_6

PL1
HI0805R800R-00_8

PC2
0.1u/50V_6

PR51
220K/F_6

0.1u/50V_6

PR14
33K_6

PC4
2200p/50V_6

0.1u/50V_6

PQ19
FDD6685

1

PC26

PD4

PC5

1

1

PC13

D

D

P4SMAJ20A
PC11
0.1u/50V_6

2

1

6

2

5

PR60
PR52
220K/F_6

REV.B modify

3
PR191
*10K/F_6

PD13
ACIN_1

(25,28) ACIN

2

4

2

+3VPCU

PQ4
DMN601K-7

CSIP_1

*ZD12V
PR189
*6.8K/F_6

D/C# (28)

PQ9
IMD2AT108

CSIN_1

1

PR15
10K_6

0_6

3

PD1
SW1010CPT

modify 1207

PR190
*10K/F_6

1

PC8
0.1u/50V_6

VIN
PL7
HI0805R800R-00_8
PR187

VA3

PC101
1u/16V_6

10K_4

PR135
10/F_6

PR134
10/F_6

REV.B modify

PC107
0.1u/50V_6

C

PR133
4.7_6

PC92
1u/16V_6

C

ISL88731_VDDP

PD10
RB500V

11
PD5
3 TEMP_MBAT

(28) MBDATA

9

VDDP

VCC

VDDSMB

BOOT

SDA

UGATE

PR132
PC99
2.7_6
.1u/25V_8
88731B_1
25 88731B_2

24

PC98
0.1u/50V_6
PC97
2200p/50V_6
PQ24
FDS8878

ISL88731_UGATE

10

SCL

PHASE

23

ISL88731_PHASE

13

ACOK

LGATE

20

ISL88731_LGATE

PGND

19

CSOP

18 CSOP

A:(9/7) Add ESD diode base on EC FAE suggestion
PR128
49.9/F_6

PC95
0.1u/50V_6
DCIN
22

88731ACSET

REV.B modify
REV.C modify

B

+3VPCU
PR77
10K_6

VREF

4

ICOMP

5

NC

CSON
NC

HI0805R800R-00_8
PL4

100p/50V_6

1

PR136
2.21K/F_6

PC36

17 CSON
PR130
0_4
16

15

GND

29

GND
12

NC

HI0805R800R-00_8

TEMP_MBAT

8

ID (28)

BAT-V

2

PR124
PC89
.01u/50V_6

CSOP_1

*2.2/F_6

PC83
*2200p/50V_6

PC88
2200p/50V_6
CSOP_1

PC85
10u/25V_1206

VBF
VCOMP
NC

PL5
ID

14

6

1

PC93
0.1u/50V_6

CSON_1

PC86
10u/25V_1206

B

CSON_1

PR129
10/F_6
PR131
100_4

BAT-V

ICM

MBAT+

BAT-V

PU6
ISL88731

PC39

2

PC38

0.1u/50V_6
PR74

47p/50V_6

100K/F_6

+3VPCU

ISL88731 thermal pad
tie to Pin12

PC108
.01u/50V_6

47p/50V_6
PR79
100_4

PR78
100_4

ICM
MBDATA (28)

MBCLK

PC110
*1u/16V_6

1

1

A

PR73
PD8
*100K/F_6
ZD3.6V

PC111
.01u/50V_6

PC112
*.01u/50V_6

A

PC105
*3300p/50V_6

PC37
.01u/50V_6

PROJECT : BU2
Quanta Computer Inc.

2

2

2

PD7
ZD3.6V

ICM (28)

TEMP_MBAT (28)

MBCLK (28)

1

CN21

3

22K/F_6
PC34

14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACIN

88731LR

PQ23
FDS6690AS
PR127
10/F_6

7

PR76
*100K_4

PR138

2

PR122
0.03_3720

PL6
PCMC063T-6R8MN

4

DCIN

PR137
82.5K/F_6

REV.B modify

5
6
7
8

(28) MBCLK

3
2
1

*DA204U

2

2

*DA204U

PC96
10u/25V_1206

4

3
2
1

PD6
3 ID

CSSN

PC102
0.1u/50V_6

1

1

+3VPCU

NC
GND
GND
GND
GND
CSSP

+3VPCU
+3VPCU

5
6
7
8

21

27

1
33
32
31
30
28

CSIP

26

REV.C modify

CSIN

Size
Custom
NB4

Document Number

Date: Thursday, July 24, 2008
5

4

3

2

Rev
1A

CHARGER (ISL88731)
1

Sheet

30

of

35

5

4

MAIND

3

2

1

MAIND (34,35)

SUSD

SUSD (35)

31

Rev:2A 12/12 Move the Short Pad.

Rev:2A 12/12 Move the Short Pad.

PR182
2

1

(6) SYS_SHDN#

0_4

VIN
VL

VIN

D

2

D

PC154

VL
4.7u/10V_8
2

1

+

1

PR173
390K_4

2

0.1u/50V_6

8
7
6
5

4
PR159
PR172
115K/F_4

8
7
6
5
4
3
2
1

OCP : 8A

OCP: 10A
+5VPCU

PR176
*0_4

PR179
2.2/F_6

PC160

4

5V_DL

PQ36
FDS6690AS

2

PC149

1

+
PC158

1
PR166

PR181
0_4

PC153
0.1u/50V_6

1
2
3

PC151
2.2n/50V_6

1

1

PR180
1/F_6
2
PR192
*0_6

PC148
0.1u/50V_6

2

1

OCP:10A

3
2
1

+3VPCU

PR104
2.2/F_6

4
PQ35
FDS6690AS

C

PR155
0_6

PC159

PC157

+

0.1u/50V_6

330u/6.3V_6X5.7

PC65
2.2n/50V_6

PC141
0.1u/50V_6

3V_DL

PR156
*0_6

PC155
0.1u/50V_6

PD11
1PS302

1
PC156
0.1u/50V_6

2

1

+15V_ALWP
22_8

PR171
*200K_4

REFIN2

*39K/F_4

PR107
22_8

+3VPCU

PR1
1M_6
+5VPCU

+3VPCU
S5D

4

5
6
7
8

5
6
7
8

SUSD

PQ39
FDC653N_NL

3

3

3

3

B

2

+3VPCU

S5D
3

SYS_HWPG (28)

9/13 Stuff the PR178.

9/07 Add PR155.

+15V

+1.2V_S5

PR185
22_8

*0_6

PR177
0_6

DDPWRGD_R

1
2
5
6

PR8
1M_6

Iocp=8-(2.48/2)=6.67A
Vth=6.67A*15mOhm=100.05mV
R(Ilim)=(100.05mV*10)/5uA
~200.1K

PR178
10K_6

PQ38
FDC653N_NL

3

4

+3V_S5

PR168

+3VPCU

PR169

08/29 Del PQ15.
VIN

0_6

OCP:8A

PR162
+15V

REF

L(ripple current)
=(19-3.3)*3.3/(2.2u*0.5M*19)
~2.48A

REV.B modify

2

1

*0_6

8/27 Add SYS_HWPG.
PR153

PR193

PD12
1PS302

PR154

PC145
1u/16V_6

3V_DL

3

Iocp=10-(4.18/2)=7.91A
Vth=7.91A*15mOhm=131mV
R(Ilim)=(105mV*10)/5uA
~237K

SKIP

PR170
0_6

VL

0_6

PC146
0.1u/50V_6

L(ripple current)
=(19-5)*5/(2.2u*0.4M*19)
~4.18A

2
2

+3VSUS

+3V_S5

PQ17
DMN601K-7

PQ1
DMN601K-7

MAIND 4

MAIND 4
PQ40
FDS8878

1

PQ43
DMN601K-7

A

3
2
1

PQ41
FDS8884
3
2
1

2

PR7
1M_6

1

1

2
PQ3
DTC144EU

1

A

3V_LX

SKIP
DDPWRGD_R
3V5V_EN

PR163
1/F_6
2

1

3

(28,35) S5_ON

PR160
196K/F_6
2

REFIN2
1

0.1u/50V_6
330u/6.3V_6X5.7

B

PU11
ISL6237

32
31
30
29
28
27
26
25

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

1
2
5
6

10u/25V_1206

35
34
33

8
7
6
5

5V_LX
2

+5VPCU

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD
PAD
PAD
PAD

1
2
3

PL13
2.2uH
C

9
10
11
2
12
237K/F_6 DDPWRGD_R 13
3V5V_EN
14
15
16
37
36

17
18
19
20
21
22
23
24

+5VPCU

+3VPCU
PL12
2.2uH

9/12 PR44 Change to 196K.

3
2
1

PQ37
FDS8878

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

5V_DH

PQ33
FDS8878

3V_DH

*0_6

BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2

4

PC132
10u/25V_1206
PC130
2.2n/50V_4

9/07 Add PR154.

REF

1

3V5V_EN

09/07 Change PC123 placement

PC128
0.1u/50V_6

PC142
5
6
7
8

2

PC147
*0.01u/16V_4

5
6
7
8

PC134
*10u/25V_1206

PR161
0_4
1

0.1u/50V_6

1

PC133
100u/25V_6X7.7

PC136
10u/25V_1206

2

PC131
2.2n/50V_6

PC144
1u/10V_6

PR183
39K/F_4
PC129
0.1u/50V_6

PR167
0_4

PC150

PROJECT : BU2
Quanta Computer Inc.

09/12 Addition
+5V

+3V
Size
Custom
NB4

Document Number

5

4

3

2

Rev
1A

SYSTEM 5V/3V (ISL6237)

Date: Thursday, July 24, 2008

Sheet
1

31

of

35

B

C

D

LGATE_NB

PQ25
FDS6900AS

PR125

VFIXEN VID Codes

PR48
44.2K/F_4

1

8

7

6

PHASE_NB
PR55 PR58
0_4
0_4

PC28
0.1u/50V_6

PC106
10u/25V_1206
UGATE_0

PC100
10u/25V_1206

PC109
0.1u/50V_6

4

20A

PR64
1/F_6

0_4

PR12

0_4

4
5
PR11

3

6

33

PHASE_0

2

4
PQ28
AOL1412

PC32
2200p/50V_6

1

1

1

3

+
2.2/F_6

PR25

PR31

0_6

0_6

+

PC59
330u_2V_7343

ISP_0

+

PC126
330u_2V_7343

31

LGATE_0

+5VPCU

UGATE_1

1
2
3

PC104
10u/25V_1206

PC118
0.1u/50V_6

PQ26
AOL1414

20A

UGATE_1

CPU_CORE1

2.2/F_6

+

4

2

LGATE_1

PQ29
AOL1412

PC33
2200p/50V_6

PR69

PR63

0_6

0_6

PC58
330u_2V_7343

1
+

+
2

PR67

2

PC29
0.1u/50V_6

0.36uH
2

1

PL10
1

2

1

1

4

25

3

26

PC103
10u/25V_1206

4

PHASE_1

5

27

PR66 1/F_6

PC120
330u_2V_7343

2

PC162
*330u_2V_7343

ISN_1
PC17
0.1u/50V_6

2

1

18.2K/F_4

CPU_CORE0

1

28

2

PR34

2

1

1

VIN

PC30
2.2u/10V_6

2

LGATE_1

2

2

1

5

29

ISN_1

ISP_1
23

30

PR30 PR35 PR43 PR44
0_4
0_4
0_4
0_4
PR40
3.92K/F_4

PC161
*330u_2V_7343

ISN_0

32

1
2
3
ISP_0

Close to
CPU socket

4

PR68

PC31
0.1u/50V_6

2

UGATE_0

2

1

34

24

VW_1
22

13

PC14
1000p/50V_6

2

BOOT_1
COMP_1

PR22
6.81K/F_4
2
1

UGATE_1

VW_0
ISP_0

PC12
180p/50V_4

COMP_0

21

12

PHASE_1

FB_1

11

FB_0

VDIFF_1

2

PGND_1

20

1

PC10
2 1200p/50V_4

LGATE_1

VDIFF_0

19

10

OCSET

VSEN_1

PR23
1K/F_4

PVCC

RTN_1

8

PC9
4700p/25V_6

1

LGATE_0

RBIAS

18

PR24
10K/F_4

9

PR16
54.9K/F_4

PU1
ISL6265

ENABLE

17

PR17
255/F_4

PR18
107K/F_4

1

35

10K_4
7

2

PGND_0

RTN_0

R27

SVC

CPU_CORE0

0_4

(28) VRON

*0_4

PHASE_0

VSEN_0

PR20

Pin 49 is GND Pin

SVD

16

1

UGATE_0

1
2
3

PR13
(6) CPU_SVD
(6) CPU_SVC
(6) CPU_PWRGD_SVID_REG

BOOT_0

PWROK

0_4
3

PR10
10K_6

PGOOD

1/F_6

2

2
PR19

ISN_0

PQ5
DTC144EU

0_4
+3V

2

+1.8VSUS

15

PR28

VRM_PWRGD

14

(6,16,28)

0.36uH
2

36
PR65

3

PL11
1
3

BOOT_NB

PQ27
AOL1414

5

PHASE_NB

UGATE_NB

LGATE_NB

PGND_NB

RTN_NB

OCSET_NB

FSET_NB

FB_NB

OFS/VFIXEN

VSEN_NB

1

COMP_NB

10K/F_6

VCC

+3V

PR29

VIN

GND

1
2
3

40

41

42

43

*10K/F_4

44

*0_4

PR38

46

PR39

47

0_4
49

PR37
+5VPCU

48

1

UGATE_NB
+3V

1

0.8

2

1.0

1

LGATE_NB

1

0

VIN
PR59
11.3K/F_6

2

1
1

PC15
0.1u/50V_6

1

1.2

2

1.4

1

2

0

0

2

0

5

1
PC20
33p/50V_4
PC21
1200p/50V_4

1

Output

Rev:2A 12/12 Move the Short Pad.

PC19
1000p/50V_6

2

1

10/F_6

VIN

SVD

SVC

0_8

1

PR49

1

0.8

2

0.9

1

2

0

1

UGATE_NB
PR46
22.1K/F_4

45

1

PC18
1u/25V_8

5

1.0

PC90
0.1u/50V_6

37

1.1

1

38

0

0

PC119
330u_2V_7343

39

0

PC91
10u/25V_1206

4

+5VPCU

Output

2

SVD

PC94
10u/25V_1206

G1

SVC

S1/D2

PR57
10/F_6

PR126 10/F_6

Metal VID Codes

2

PC44
10u/25V_1206

(6) CPU_VDDNB_RUN_FB_L

4

1

1
+

2

4
1

PR53
10/F_6

2

X

D1

O

O

G2

X

X

D1

X

+5V

S2

+3.3V

VIN

(6) CPU_VDDNB_RUN_FB_H

1

X

2

O

3

VFIX

2

GND

SVI

1

OFS/VFIXEN

32

PL8
2.5uH_7.5A

3A
CPU VDDNB_CORE

Offset &
Droop
O

E

2

A

PC27

PR61

2

PR56
6.81K/F_4

0.1u/50V_6

18.2K/F_4
ISP_1

1

(6) CPU_VDD0_RUN_FB_H

1

ISN_0

PR27
10/F_6

PC25
1000p/50V_6

(6) CPU_VDD0_RUN_FB_L

PR62
3.92K/F_4

ISN_1

Parallel
PR36
10/F_6

1

Close to
CPU socket

PC24
1200p/50V_4

2

2
PC22
4700p/25V_6

(6) CPU_VDD1_RUN_FB_L

PR50

(6) CPU_VDD1_RUN_FB_H

1K/F_4

2

1

1

PR42
10/F_6

PC23
180p/50V_4

PR47
255/F_4

1

CPU_CORE1

1

PR45
10/F_6
PR54
54.9K/F_4

PROJECT : BU2
Quanta Computer Inc.
Size
C
NB4

Document Number

A

B

C

D

Rev
1A

AMD GRIFFIN CPU (ISL6265)

Date: Thursday, July 24, 2008
E

Sheet

32

of

35

1

2

3

4

5

33

VIN-1.2V
VIN
+5VPCU
PR120

9/12 Add CPU_COREPG

10_6

PR115
1M_6

PR112
0_6

PR113
*10K/F_6

4
PQ18
FDS8878

PC3
0.1u/50V_6

PC80
10u/25V_1206

VOUT

PHASE

11

2

VDD

OC

10

3

FB

4

PGOOD

VDDP

9

LGATE

8

PL3
2.5uH

PHASE-1.2V
PR119

+NB_CORE

5.36K/F_6

9/07 Change net to +NB_CORE.

PR5

+

GND

PGND

7

5

NC

TPAD

17

14

NC

2.2/F_6

4
PQ21
FDS6690AS

Rds*OCP=RILIM*20uA

PR116

PC77

3.65K/F_6

*33p/50V_6

PC7

GND

6

LGATE-1.2V

2

PU5
RT8202

UGATE-1.2V

1

1

OCP: 6A
3
2
1

12

5
6
7
8

13

UGATE

18

2

PC75

1

PC74

BOOT

TON

2

PC79

1

(28) HW PG_1.2V_NB

EN/DEM

16

GND

PR121
10K_6

1u/16V_6

4.7u/10V_8

9/07 Change PR101 to 3.65K.

2.2n/50V_6
PC84
PC6
560u/2.5V_6X5.7 10u/10V_8

PR118
10K/F_6

21

0.1u/50V_6

15

GND

PC76

20

47K_6
+3V

GND

PR111

Rev:2A 12/12 Move the Short Pad.

PC78
0.1u/50V_8

19

(28,35) +1.2V_ON

A

PC82

*0.1u/50V_6

3
2
1

*0_6

1

PR114

2

(35) CPU_COREPG

PC81

REV:D No-Stuff the PR113

5
6
7
8

PD9
RB500V

REV. C mount
A

B

*1n/50V_6

0.01u/50V_6
1.2V_FB

REV. C

TON=3.85p*RTON*Vout/(Vin-0.5)

VOUT=(1+R2/R3)*0.75

B

9/07 Change PR102 to 10K.

PR119 change to 5.36Kohm

6A OCP --- OC=4.53K
FDS6690AS Rds=15mOhm

Frequency=Vout/(Vin*TON)

1/30 modify
+5VPCU
PR117
1.2V_FB

HI --- 1.0V
LOW --- 1.1V

3

PR96
35.7K/F_6

10K/F_6
PR123
10K/F_6

REV. B change to 35.7Kohm

1

2

PQ22
DMN601K-7

C

PR194

2

1

C

PR188
*0_6

100/F_6

REV. C add 0ohm

3

PC87
0.022u/50V_6

9/07 Change net to +NB_CORE.
2

VIN

(10)

9/12 Addition PR156, PQ43.

3

3

PR102
22_8

3

PR41
22_8

1

+1.2V

PR9
1M_6

+NB_CORE_ON

PQ49
DMN601K-7

+NB_CORE

PR6
1M_6

2

2

2

(28,35) +1.2V_ON
PQ32
DMN601K-7
1

1

1

PQ2
DTC144EU

PQ7
DMN601K-7

D

D

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

Date: Thursday, July 24, 2008
1

2

3

4

Rev
1A

+NB_CORE (RT8202)
Sheet
5

33

of

35

5

4

3

2

1

34
D

D

9/10 Change PQ27 to AO1414.
+1.8VSUS
VIN

PC40

5

10u/10V_1206

*0_6
1
2

+SMDDR_VTERM
PC43

PR81

10u/10V_8

10u/10V_8

0_6

4
5

DRVH

VTT

VBST

VTTSNS

LL

GND

DRVL

VTTGND

PGND

19
PC115

20

PC123
2.2n/50V_6

PC42
10u/25V_1206

+SMDDR_VREF

PR147

0_6

7
5VIN

8

PC121
9
0.033u/50V_6
5VIN

10

MODE
VTTREF

*0_6

PR149

0_6

S5

COMP
VDDSNS

V5IN
PGOOD

VDDQSET

21
22
23
24
25
26
27

PR144
0_6
PR148

S3

DIS_MODE

CS

OCP: 12.44A

PL9
18

+1.8VSUS
2.2uH

17

+

16
PR142
S3_1.8V

11

S5_1.8V

12

PR141
PR70

*0_6

MAINON

0_6

(19,28,35)

SUSON (28,35)

5VIN

14

*2.2/F_6

4
1
2
3

C

6

GND
GND
GND
GND
GND
GND
GND

3
DIS_MODE

PC41
10u/25V_1206

9/07 Change PL12 to 2R2uH.

0.1u/50V_6

5

PC45

VLDOIN

Rev:2A 12/12 Move the Short Pad.
PQ31
AOL1414

4
1
2
3

PR82

(5) CPU_VTT_SENSE

PU7
TPS51116

PC114

PR71
13

+3VPCU

PC124
560u/2.5V_6X5.7

PC122
10u/10V_8

*2.2n/50V_6

100K/F_6

15

C

PQ30
AOL1412

9/14 Modify

(10u*PR35)/Rdson+Delta_I/2=Iocp

PC116
PR140
5.1K/D_6

*1n/50V_6
PR84
FOR DDR II
5VIN

+5VPCU

HWPG_1.8V

(6) VDDIO_FB_H
(6) VDDIO_FB_L

PR83

*0_6

PR80

*0_6

Allen 0929

R2
R1

(28)

PR143
S3_1.8V

S5_1.8V

PC113

9/14 Modify

0_6
2

PR139
0_6

1

0_6
+1.8VSUS

4.7u/6.3V_6

PR145
*110K/F_6

PR146
*76.8K/F_6

B

B

R1=(100*Vout-R2)K

+1.8VSUS
S3_1.8V

S5_1.8V

if tune Vout PR38 un-mount, PR156 PR165 mount
1
2
5
6

PC117
*0.1u/50V_6

MAIND

PQ14
FDC653N_NL

3

8/27 Add CAP for Delay time.

4

(31,35) MAIND

PC35
*0.1u/50V_6

+1.8V

A

A

PROJECT : BU2
Quanta Computer Inc.
Size
Custom
NB4

Document Number

Date: Thursday, July 24, 2008
5

4

3

2

Rev
1A

DDR 1.8V(TPS51116)
1

Sheet

34

of

35

5

4

3

2

1

PQ12
AOL1414

35

+1.8VSUS

PC48

0.1u/50V_6

10u/6.3V_6

PR110
100K_4

+5VPCU

4

9/12 Change net to +3VSUS

+3VSUS

3
2
1

5
PC47

9338DRV

0_6
+1.2V (3,4,11,12,14,15,33)

100K_4

2

(19,28,34) MAINON

0_6

+5VPCU

1

(28,33) +1.2V_ON
*0_6

EN
VCC

HWPG_1.2V_S5

6

(28)

+1.2V_S5

D

NC

5
PR106
17.4K/F_6

PC70
10u/10V_8

0.8V
Vout1 = (1+Rg/Rh)*0.5

PR94
10K_6

2
PU2
G9338

0.1u/50V_6

PD15
+

1

1A

VIN
GND
GND

PR95
14.7K/F_6

5

ADJ

3
8
9

VO

7

PC50
0.01u/16V_4

Rg

PC46
PR93

6

DRV

1
9338EN 4

PR88

PGD

*10K_6

GND

PR92
MAINON

VEN

1

3

(28) HWPG_CPUIO

VPP PGOOD

2

+3VPCU

4.5A

2

PR87

PR109
10K/F_6

(28,31) S5_ON

+3VSUS

D

PU4
RT9025-25PSP
4

+1.2V

ADJ

PC69
0.1u/25V_6

04/12 Rev:3B Change P/N.
PR89

PC73
10u/4V_8

*Clamp-VPORT_6

PC71
0.1u/25V_6

PC72
*0.1u/50V_6
PR108
34K/F_6

Rh

(33) CPU_COREPG
PC52
0.1u/50V_6

PC51
10u/6.3V_6

PC125
560u/2.5V_6X5.7

Vout =0.8(1+R1/R2)
=1.2V

PC49
*1u/16V_6

04/20 Rev:3B Added the Varistor in +1.2V Domain.

9/12 Add CPU_COREPG

+3VSUS
+3VSUS

REV.B Change P/N.

2
3
8
9

VEN
VIN
GND
GND

to +1.8VSUS.

HWPG_1.1V_NB

6

VO

(28)

MAINON

+1.1V

PC63
0.1u/25V_6

2
3
8
9

+1.8VSUS

2A
NC

PR101
13K/F_6

VPP PGOOD
VEN
VIN
GND
GND

VO

C

1

T99

6

+1.5V

1.5A
NC

5
PR174
30.1K/F_6

PC61
10u/10V_8
PC68
10u/4V_8

PC60
100K_6

PC139
0.1u/25V_6

PC138
*0.1u/50V_6
PR175
34K/F_6

PR100
34K/F_6

8/27 Add C for Delay time

Vout =0.8(1+R1/R2)
=1.5V

Vout =0.8(1+R1/R2)
=1.1V
9/12 Modify
VIN

+1.8VSUS

+3VSUS

PC152
10u/10V_8

0.8V

0.8V
PC62
10u/4V_8

PR151
10K/F_6

5

7

REV.C Change

1

ADJ

PR98
10K/F_6

+1.8VSUS

4

VPP PGOOD

DEL HWPG_1.5V

PU10
RT9025-25PSP

7

4
(19,28,34) MAINON

PC67
0.1u/25V_8

PU8
RT9025-25PSP

ADJ

PC127
0.1u/25V_6

C

PR164
*100K_4

+5VPCU

PR150
100K_4

+5VPCU

+3VSUS

+SMDDR_VTERM

+15V

B

B

PR165
*100K_4

+5VPCU
PR85
22_8

PR152
22_8

PR86
22_8

PR103
1M_6

PC137
0.1u/25V_6

PU9
RT9025-25PSP
4

MAINON

3

3

SUSD (31)

3

3

SUSD
3

SUS_ON_G

3
8
9

+3VSUS
2

2

2

2

(28,34) SUSON
PQ15
DMN601K-7

PC64
*2.2n/25V_4

VPP PGOOD
VEN
VIN
GND
GND

VO

1

T100

6

+2.5V

0.75A
NC

5
PR158
73.2K/F_6

PC135
10u/10V_8

1

PQ13
DMN601K-7
1

1

PQ34
DMN601K-7
1

PQ11
DMN601K-7

1

PQ10
DTC144EU

2

7

PR72
1M_6

2

PR105
10K/F_6

ADJ

PR75
1M_6

0.8V
PC143
10u/4V_8

+3V

PR21
1M_6
A

+5V

PR184
22_8

8/27 Add C for Delay time
+1.8V

PR186
22_8

+15V

PR99
22_8

Vout =0.8(1+R1/R2)
=2.5V
PR33
1M_6
A

3

MAIND (31,34)

3

3

MAIND
3

MAINON_ON_G
3

PC66
*0.1u/50V_6
PR157
34K/F_6

9/12 Modify
VIN

PC140
0.1u/25V_6

2

1

2

PQ44
DMN601K-7

PQ16
DMN601K-7

PQ8
DMN601K-7

PC16
*2.2n/25V_4

PROJECT : BU2
Quanta Computer Inc.

1

2
PQ42
DMN601K-7

1

2

1

PQ6
DTC144EU

1

PR26
1M_6

2

(19,28,34) MAINON

Size
Custom
NB4

Document Number

Date: Thursday, July 24, 2008
5

4

3

2

Rev
1A

DISCHARGE (1.25V/1.5V/1.2V)
1

Sheet

35

of

35

www.s-manuals.com



---

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.4
Linearized                      : No
XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Producer                        : A-PDF Watermark 3.8.0
Modify Date                     : 2014:06:20 09:54:47+03:00
Create Date                     : 2008:09:05 17:37:14+08:00
Creator Tool                    : PDFCreator Version 0.9.5
Metadata Date                   : 2014:06:20 09:54:47+03:00
Document ID                     : c3bf06fa-7d89-11dd-0000-d2ebe0e72b8b
Instance ID                     : uuid:f038eee8-3953-4b40-9745-7f441f1e5e42
Format                          : application/pdf
Title                           : Quanta BU2 - Schematics. www.s-manuals.com.
Creator                         : 
Description                     : 
Subject                         : Quanta BU2 - Schematics. www.s-manuals.com.
Image 0020 Watermark            : {AEDE16B8-CCE5-4561-84F6-EC148F66AB19}
Page Count                      : 36
Keywords                        : Quanta, BU2, -, Schematics., www.s-manuals.com.
Image Watermark                 : {AEDE16B8-CCE5-4561-84F6-EC148F66AB19}
Warning                         : [Minor] Ignored duplicate Info dictionary

EXIF Metadata provided by EXIF.tools