Quanta BY7D Schematics. Www.s Manuals.com. R1a 20120312 Schematics
User Manual: Motherboard Quanta BY7D DABY7DMB8C0 - Schematics. Free.
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5 4 3 2 1 01 14" BY7D Brazos 2.0 Block Diagram 3&%67$&.83 /$<(5 723 /$<(5 *1' D 80$ AMD FUSION APU /$<(5 ,1 Zacate/Ontario /$<(5 69&& 413-BALL /$<(5 ,1 DDRIII-SODIMM2 DDRIII-SODIMM1 /$<(5 ,1 PG 12 PG 11 ',6&5(7( INT_HDMI HDMI PG 25 LVDS PG 30 CRT PG 30 EXT_HDMI D INT_LVDS 19mmX19mm BGA EXT_LVDS INT_CRT /$<(5 *1' SINGLE CHANNEL DDR3 DISPLAY PORT X2 DX11 IGP 4 X1 PCIE GEN2 GPP 1 X4 UMI-LINK GEN1 VGA DAC /$<(5 %27 EXT_CRT Graphics PCI-E X4 PG 3,4,5 Seymour XTX 95$0''5 29mm X 29mm PAGE 21, 22 PG 13,14,15,16,17,18,19,20 VGA AMD Seymour XTX X'TAL 27.0MHz C POWER SYSTEM ISL88731CHRTZ-T RT8223P TPS51216RUKR TPS51211DSCR TPS51211DSCR TPS51211DSCR OZ8380ALN ISL95870AHRUZ UMI LINK DP1(x4) 2.5GT /s UMI(x4) DMI SATA 0 SATA - HDD Con. USB2.0 P31 USB2-0 USB 2.0 (Port0~13) P24 SATA USB2-5 SATA 1 SATA - ODD Con. USB2.0 Con. P31 Card Reader 3 IN 1 (AU6437B53-GDL-GR) P29 PCIE AR8152(10/100) PG 26 Mini Card I (WIFI) PG 26 USB3.0 USB2.0 (P7) USB3-0 USB 3.0 (Port0~3) USB2-10 USB3.0 Con. P24 FCH BATTERY B RTC USB3-1 24.5mm X 24.5mm P7 USB3.0 re-driver IC P24 X'TAL 32.768KHz LPC P6, 7, 8, 9, 10 SPI P39 P40 P40 P41 P42 P29 P30 Hudson M3L P38 CHARGER P36 +15V +3VPCU +3V_S5 +3V +3V_GPU +5VPCU +5V_S5 +5V P37 CCD AMD PCI-E, 1X (port0) PG 28 USB2-6 P37 Card Reader Con. PCI-E, 1X (port2) RJ45 C P36 B DISCHARGE USB2-11 USB3.0 Con. P38 +SMDDR_VTERM +SMDDR_VREF P24 Azalia IHDA +1.5VSUS +1.5V +1.5V_GPU SPI Share SPI flash +1.0V +1.0V_GPU P39 +1.1V_S5 +1.1V +1.8V +1.8V_GPU P40 PG 34 Audio Codec CX20671-21Z PG 27 NPCE885L PG 34 A FAN PG 32 Keyboard PG 33 Touch Pad LED PG 33 PG 35 Hall Sensor PG 30 Touch Pad/B Con. PG 33 Power/B Con. PG 33 HP PG 27 PORT-B PORT-A EC MIC JACK PG 27 P41 CPU_CORE CPU_VDDNB_CORE INT. SPEAKER PG 27 P42 +VGPU_CORE DMIC PG 27 Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Monday, March 12, 2012 Rev 1A Block Diagram 5 4 3 2 Sheet 1 1 of 45 A 1 2 3 4 M_A_DQ[0..63] M_ADD1 ONTARIO (2.0) PART 1 OF 5 M_DATA0 M_DATA1 7 8 03 (11,12) M_ADD2 M_DATA2 M_ADD3 M_DATA3 M_ADD4 M_DATA4 M_ADD5 M_DATA5 M_ADD6 M_DATA6 M_ADD7 M_DATA7 M_A_BS#0 R18 M_A_BS#1 T18 M_A_BS#2 F16 M_ADD9 M_DATA8 M_ADD10 M_DATA9 M_ADD11 M_DATA10 M_ADD12 M_DATA11 M_ADD13 M_DATA12 M_ADD14 M_DATA13 M_ADD15 M_DATA14 M_BANK1 M_DATA16 M_BANK2 M_DATA17 M_DM0 M_DATA19 M_DM1 M_DATA20 M_DM2 M_DATA21 M_DM3 M_DATA22 M_DM4 M_DATA23 M_DM6 M_DATA24 M_DM7 M_DATA25 A16 B16 B20 A20 E23 E22 J22 J23 R22 P22 W22 V22 AC20 AC21 AB16 AC16 M_DQS_H0 M_DATA27 M_DQS_L0 M_DATA28 M_DQS_H1 M_DATA29 M_DQS_L1 M_DATA30 M_DQS_H2 M_DATA31 M_DQS_L2 MEMORY I/F M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7 M_DQS_H3 M_DQS_L3 M_DQS_H4 M_DQS_L4 M_DQS_H5 M_DQS_L5 M_DQS_H6 M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DQS_L6 M_DATA39 M_DQS_L7 M_DATA40 M17 M16 M19 M18 N18 N19 L18 L17 M_CLK_H0 M_DATA42 M_CLK_L0 M_DATA43 M_CLK_H1 M_DATA44 M_CLK_L1 M_DATA45 M_CLK_H2 M_DATA46 M_CLK_L2 M_DATA47 (11,12) M_A_RST# (11,12) M_A_EVENT# L23 N17 M_RESET_L M_DATA50 M_EVENT_L M_DATA51 (11,12) M_A_CKE0 (11,12) M_A_CKE1 F15 E15 M_CKE0 M_DATA54 M_CKE1 M_DATA55 W19 V15 U19 W15 M0_ODT0 M_DATA58 M0_ODT1 M_DATA59 M1_ODT0 M_DATA60 M1_ODT1 M_DATA61 M_CLK_L3 M_DATA48 M_DATA52 M_DATA53 M_DATA56 M_DATA57 M_A_ODT0 M_A_ODT1 M_A_ODT2 M_A_ODT3 M_DATA62 M_A_CS#0 M_A_CS#1 M_A_CS#2 M_A_CS#3 T17 W16 U17 V16 M0_CS_L0 (11,12) M_A_RAS# (11,12) M_A_CAS# (11,12) M_A_WE# U18 V19 V17 M_RAS_L (12) (12) (11) (11) M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 H21 H23 K22 K21 G23 H20 K20 K23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 N23 P21 T20 T23 M20 P20 R23 T22 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 (7) (7) UMI_RXP0 UMI_RXN0 AA12 Y12 P_UMI_RXP0 P_UMI_TXP0 P_UMI_RXN0 P_UMI_TXN0 (7) (7) UMI_RXP1 UMI_RXN1 AA10 Y10 P_UMI_RXP1 P_UMI_TXP1 (7) (7) UMI_RXP2 UMI_RXN2 AB10 AC10 P_UMI_RXP2 P_UMI_RXN2 P_UMI_TXN2 V20 V21 Y23 Y22 T21 U23 W23 Y21 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 (7) (7) UMI_RXP3 UMI_RXN3 AC7 AB7 P_UMI_RXP3 P_UMI_TXP3 P_UMI_RXN3 P_UMI_TXN3 PEG_TXN[3:0] PEG_TXP[3:0] (13) PEG_TXP[3:0] (13) PEG_RXN[3:0] PEG_RXP[3:0] PEG_RXN[3:0] (13) PEG_RXP[3:0] (13) A U5038A VDD_10 PEG_RXP0 PEG_RXN0 AA6 Y6 P_GPP_RXP0 PEG_RXP1 PEG_RXN1 AB4 AC4 P_GPP_RXP1 P_GPP_RXN1 P_GPP_TXN1 PEG_RXP2 PEG_RXN2 AA1 AA2 P_GPP_RXP2 P_GPP_TXP2 P_GPP_RXN2 P_GPP_TXN2 PEG_RXP3 PEG_RXN3 Y4 Y3 P_GPP_RXP3 R9782 2K/F_4 ON_ZVDD Y14 P_GPP_TXP0 P_GPP_RXN0 P_GPP_RXN3 P_GPP_TXN0 ONTARIO (2.0) PART 2 OF 5 P_GPP_TXP1 P_ZVDD_10 P_UMI_RXN1 P_GPP_TXP3 P_GPP_TXN3 P_ZVSS P_UMI_TXN1 P_UMI_TXP2 AB6 AC6 C_PEG_TXP0 C_PEG_TXN0 C5562 C5563 EV@0.1U/10V_4X EV@0.1U/10V_4X PEG_TXP0 PEG_TXN0 AB3 AC3 C_PEG_TXP1 C_PEG_TXN1 C5564 C5565 EV@0.1U/10V_4X EV@0.1U/10V_4X PEG_TXP1 PEG_TXN1 Y1 Y2 C_PEG_TXP2 C_PEG_TXN2 C5566 C5567 EV@0.1U/10V_4X EV@0.1U/10V_4X PEG_TXP2 PEG_TXN2 V3 V4 C_PEG_TXP3 C_PEG_TXN3 C5568 C5569 EV@0.1U/10V_4X EV@0.1U/10V_4X PEG_TXP3 PEG_TXN3 AA14 ON_ZVSS R9783 1.27K/F_4 AB12 UMI_TXP0_C C5570 AC12 UMI_TXN0_C 0.1U/10V_4X C5571 0.1U/10V_4X UMI_TXP0 (7) UMI_TXN0 (7) AC11 UMI_TXP1_C C5572 AB11 UMI_TXN1_C 0.1U/10V_4X C5573 0.1U/10V_4X UMI_TXP1 (7) UMI_TXN1 (7) AA8 UMI_TXP2_C C5574 UMI_TXN2_C Y8 0.1U/10V_4X C5575 0.1U/10V_4X UMI_TXP2 (7) UMI_TXN2 (7) AB8 UMI_TXP3_C C5576 AC8 UMI_TXN3_C 0.1U/10V_4X C5577 0.1U/10V_4X UMI_TXP3 (7) UMI_TXN3 (7) FT1_ONTARIO M_DATA63 B +1.5VSUS M_CLK_H3 M_DATA49 (12) (12) (11) (11) C23 D23 F23 F22 C22 D22 F20 F21 PEG_TXN[3:0] M_DQS_H7 M_DATA41 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CLKP2 M_A_CLKN2 M_A_CLKP3 M_A_CLKN3 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_DM5 M_DATA26 (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) (11,12) C18 A19 B21 D20 A18 B18 A21 C20 M_BANK0 M_DATA18 M_A_DM0 D15 M_A_DM1 B19 M_A_DM2 D21 M_A_DM3 H22 M_A_DM4 P23 M_A_DM5 V23 M_A_DM6 AB20 M_A_DM7 AA16 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_ADD8 M_DATA15 (11,12) M_A_DM[7..0] B14 A15 A17 D18 A14 C14 C16 D16 PCIE I/F (11,12) M_A_BS#[2..0] M_ADD0 UMI I/F M_A_A0 R17 M_A_A1 H19 M_A_A2 J17 M_A_A3 H18 M_A_A4 H17 M_A_A5 G17 M_A_A6 H15 M_A_A7 G18 M_A_A8 F19 M_A_A9 E19 M_A_A10T19 M_A_A11F17 M_A_A12E18 M_A_A13 W17 M_A_A14E16 M_A_A15G15 A B 6 U5038E (11,12) M_A_A[15:0] (12) (12) (12) (12) (11) (11) (11) (11) 5 Y20 M_A_DQ48 AB22 M_A_DQ49 AC19 M_A_DQ50 AA18 M_A_DQ51 AA23 M_A_DQ52 AA20 M_A_DQ53 AB19 M_A_DQ54 Y18 M_A_DQ55 +M_VREF R9784 1K/F_4 AC17 M_A_DQ56 Y16 M_A_DQ57 AB14 M_A_DQ58 AC14 M_A_DQ59 AC18 M_A_DQ60 AB18 M_A_DQ61 AB15 M_A_DQ62 AC15 M_A_DQ63 R9786 1K/F_4 C5578 C5579 0.1U/10V_4X 1000P/50V_4X R9787 M_A_EVENT# 1K/F_4 +1.5VSUS M0_CS_L1 M1_CS_L0 M1_CS_L1 M_VREF M23 M_ZVDDIO_MEM_S M22 +M_VREF M_CAS_L M_WE_L 39.2/F_4 R9789 +1.5VSUS FT1_ONTARIO C C D D Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A ONTARIO MEM & PCIE I/F(1/3) 1 2 3 4 5 6 7 Sheet 8 3 of 45 1 CNTR_VREF CNTR_VREF 04 +3V +1.8V IHM@0.1U/10V_4X LTDP0_TXN0 LTDP0_AUXN A3 B3 (30) INT_LCD_TXLOUT1+ (30) INT_LCD_TXLOUT1- D6 C6 LTDP0_TXP1 LTDP0_HPD D3 LTDP0_TXN1 A6 B6 LTDP0_TXP2 LTDP0_TXN2 D8 C8 LTDP0_TXP3 C5589 *0.1U/10V_4X R9807 R9808 0_4 0_4 DAC_BLUE DAC_BLUEB CLKIN_H CLKIN_L D2 D1 (7) CLK_DP_NSSCP (7) CLK_DP_NSSCN DAC_REDB DAC_GREEN DAC_GREENB LTDP0_TXN3 V2 V1 DISP_CLKIN_H J1 J2 SVD DAC_VSYNC SID DAC_SDA DAC_ZVSS D12 TEST4 R1 R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5 APU_SIC APU_SID P3 P4 APU_LDT_RST#_R APU_PWRGD_R T3 T4 RESET_L TEST15 PWROK TEST16 APU_PROCHOT#_VDDIO APU_THERMTRIP_L# APU_ALERT# U1 U2 T2 PROCHOT_L N2 N1 P1 P2 M4 M3 M1 TDI F4 G1 F3 VDDCR_NB_SENSE TEST36 VDDCR_CPU_SENSE TEST37 F1 VSS_SENSE SIC TEST5 TEST6 TEST14 TEST19 ALERT_L TEST25_H TEST25_L TEST APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ# TEST18 TEST28_H TDO TEST28_L TCK TEST31 JTAG *IV@1000P/16V_4X UMA boot issue 1027 B2A THERMTRIP_L CTRL TEST17 C5590 TMS TRST_L TEST33_H TEST33_L DBRDY TEST34_H DBREQ_L TEST34_L TEST35 (41) CPU_VDDNB_FB_H (41) CPU_VDD_FB_H R9818 R9819 0_4 0_4 (41) CPU_VDDNB_FB_L R9820 0_4 VDDCR_NB_SENSE VDDCR_CPU_SENSE VDDIO_MEM_S_SENSE R9821 (41) CPU_VDD_FB_L 0_4 B4 W11 V5 ф>ĂLJŽƵƚEŽƚĞх /&& Z Ed/>ZKhd/E' 1 for debug only +3V (30) (30) фϮϬϭϭϬϵϮϬͺ>ŝŶĐĂŶх W,͕ŝƐŶΖƚŝŶƐƚĂůůĞĚďLJĚĞĨĂƵůƚ *100K_4 INT_CRT_RED_R R9800 IV@0_4 INT_CRT_RED INT_CRT_GRE_R R9801 IV@0_4 INT_CRT_GRE INT_CRT_BLU_R R9802 IV@0_4 INT_CRT_BLU INT_CRT_RED (30) INT_CRT_GRE (30) INT_CRT_BLU (30) (6) Near CPU EMI 0928 INT_CRT_HSYNC INT_CRT_VSYNC (30) (30) INT_CRT_DDCCLK INT_CRT_DDCDAT R9805 499/F_4 (34) APU_BP0_TSTCLK_USCLK0 APU_BP2_SCANSHIFTEN_USDATA0 APU_BP3_SCANSHIFTEND_USDATA1 R9810 R9811 R9812 R9813 R9803 *0_4 R9804 0_4 6 APU_SIC 1 APU Q9001A 2N7002KDW_115MA +3V (6) APU_TEST28_H_PLLCHARZ APU_TEST28_L_PLLCHARZ APU_TEST31_MEM_TEST C5591 C5592 APU_TEST34_H_TSTCLKIN_H APU_TEST34_L_TSTCLKIN_L APU_TEST36 APU_TEST37_GIO_TSTDTM0_CLKINIT SDATA3 (34) 2ND_MBDATA 1K/F_4 1K/F_4 510/F_4 510/F_4 APU_TEST33_H_M_CLKTST_H APU_TEST33_H_M_CLKTST_L K3 T1 RSVD_1 DMAACTIVE_L RSVD_2 TEST25_H TEST25_L R9815 R9816 ŖŏŏłŎņŅŠĸŠńłőŠŊĴĴĸŠŃ 51/F_4 51/F_4 *0_4 R9809 0_4 3 APU_SID 4 APU Q9001B 2N7002KDW_115MA R9814 (8) APU_TALERT# +1.8V T5051 T5052 T5053 0.1U/10V_4X 0.1U/10V_4X T5054 T5055 R9817 *1K/F_4 T5056 T5057 R9806 Whϰ͘ϳ<ƚŽнϯsWhŝŶ T5049 T5050 0_4 APU_ALERT# HDT(Hardware Debug Tool ) Connector T5058 APU_FDO ON_DMAACTIVE# R9822 0_4 DMAACTIVE_L (7) ONTARIO (2.0) RSVD_3 +1.8V PART 3 OF 5 FT1_ONTARIO R9824 1K/F_4 R9823 1K/F_4 +1.8V CN24 +1.8V T5059 T5060 T5061 SCLK3 2ND_MBCLK Whϰ͘ϳ<ƚŽнϯsWhŝŶ (30) (30) T5042 T5043 T5044 T5045 T5046 T5047 T5048 APU_TEST6_DIRECRACKMON TEST18 TEST19 TEST25_H TEST25_L +3V SMbus VDDIO_MEM_S_SENSE TEST38 AMD FAE suggest connect to voltage regulator R9799 DP0_HPD F2 D4 DAC_SCL SVC INT_LCD_EDIDCLK INT_LCD_EDIDDATA E1 E2 DAC_HSYNC DISP_CLKIN_L APU_SVC APU_SVD C12 D13 A12 B12 A13 B13 DAC_RED INT_LCD_EDIDCLK INT_LCD_EDIDDATA (25) (25) (25) 2 LTDP0_AUXP INT_HDMI_AUXP INT_HDMI_AUXN INT_HDMI_HPD R9796 *34.8K/F_4 C5585 *0.1U/10V_4X G7 *SHORT_ PAD1 5 LTDP0_TXP0 (30) INT_LCD_TXLCLKOUT+ (30) INT_LCD_TXLCLKOUT- ф>ĂLJŽƵƚEŽƚĞх ůŽƐĞƚŽWh C1 B5 A5 (7) CLK_APU_HCLKP (7) CLK_APU_HCLKN APU_RST# B2 C2 TDP1_HPD (30) INT_LCD_TXLOUT2+ (30) INT_LCD_TXLOUT2- (30) INT_LCD_TXLOUT0+ (30) INT_LCD_TXLOUT0- (7) APU_RST# (7) APU_PWRGD TDP1_AUXN TDP1_AUXP TDP1_TXN3 APU_LDT_RST_HTPA# 3 Q5024 *BSS138_200MA 1 INT_LVDS_BLON (30) INT_LVDS_DIGON (30) INT_DPST_PWM (30) 2 TDP1_TXP3 TDP1_TXN2 APU_RST# IV@0_4 IV@0_4 IV@0_4 IV@10K/F_4 GND TDP1_TXP2 A10 B10 150/F_4 R9791 R9795 R9797 R9798 GND D10 C10 PEG_HDMI_TXCP PEG_HDMI_TXCN R9793 GND PEG_HDMI_TXDP0 PEG_HDMI_TXDN0 G2 H2 H1 GND IHM@0.1U/10V_4X C5582 IHM@0.1U/10V_4X C5587 H3 DP_BLON DP_DIGON DP_VARY_BL GND IHM@0.1U/10V_4X C5588 TDP1_TXN1 GND IHM@0.1U/10V_4X C5583 DP_ZVSS GND TDP1_TXP1 TDP1_TXN0 DP MISC INT_HDMI_TXCP INT_HDMI_TXCN B9 A9 VGA DAC INT_HDMI_TXDP0 INT_HDMI_TXDN0 (25) INT_HDMI_TXCP (25) INT_HDMI_TXCN A8 B8 PEG_HDMI_TXDP1 PEG_HDMI_TXDN1 DISPLAYPORT 1 (25) INT_HDMI_TXDP0 (25) INT_HDMI_TXDN0 IHM@0.1U/10V_4X C5581 ANALOG/DISPLAY/MISC PEG_HDMI_TXDP2 PEG_HDMI_TXDN2 TDP1_TXP0 C5584 IHM@0.1U/10V_4X C5586 IHM@0.1U/10V_4X C5580 DISPLAYPORT 0 (25) INT_HDMI_TXDP1 (25) INT_HDMI_TXDN1 INT_HDMI_TXDP1 INT_HDMI_TXDN1 CLK INT_HDMI_TXDP2 INT_HDMI_TXDN2 SER (25) INT_HDMI_TXDP2 (25) INT_HDMI_TXDN2 R9794 *0_4 R9792 *20K/F_4 R9790 *1K/F_4 2 U5038B R9825 1K/F_4 VDDCR_NB_SENSE VDDCR_CPU_SENSE VDDIO_MEM_S_SENSE R9829 0_4 R9830 R9831 R9832 ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽWh 1 3 5 7 9 11 13 15 17 19 APU_TRST# *10K/F_4 *10K/F_4 *10K/F_4 2 4 6 8 10 12 14 16 18 20 R9826 APU_TCK R9827 APU_TMS R9828 APU_TDI APU_TDO APU_PWRGD_R APU_LDT_RST#_R APU_DBRDY R9833 APU_DBREQ# R9834 R9835 1K/F_4 1K/F_4 1K/F_4 +1.8V 1K/F_4 *0_4 *0_4 TEST19 TEST18 *HDR10X2_DEBUG фϮϬϭϭϬϵϬϱͺ>ŝŶĐĂŶх ĐŚŽŽƐĞƚŚĞϭŬŽŚŵ A Thermal Management Signals 3 2 CPU_COREPG (10,41) 1 Q9002 2N7002K_300MA 1K_4 R9841 1K_4 +3V 100K_4 +1.8V R9836 1K/F_4 +1.8V R9839 1K/F_4 R9842 1K_4 APU_THERMTRIP_L# 1 R9849 3 Q9004 METR3904-G_200MA R9843 R9844 R9845 APU_SVC APU_SVD APU_PWRGD 0_6 SYS_SHDN# SYS_SHDN# R9846 R9847 R9848 (14,37) VFIX MODE 0_4 0_4 0_4 CPU_SVC CPU_SVD CPU_PWRGD_SVID_REG CPU_SVC (41) CPU_SVD (41) CPU_PWRGD_SVID_REG VID Override Circuit SVC SVD 0 0 1 1 0 1 0 1 TO POWER IC (41) Voltage Output 1.1V 1.0V 0.9V 0.8V *220_4 *220_4 *220_4 To indicate SVI interface is active +3V R9850 *10K_4 +3V 1 3 R9851 Q9006 *METR3904-G_200MA *0_6 WhϭϬ<ƚŽнϯsͺ^ϱŝŶ&, APU_THERMTRIP# (6) &387KHUPDOVHQVRU+:FRQWURO R9852 1K/F_4 APU_ALERT# R9853 1K/F_4 APU_SIC R9854 1K/F_4 APU_SID (near CPU) +3VPCU +3VPCU +3VPCU +1.8V R9855 R9856 *10K_4 *330_4 R9857 470K_4 U5039 +3VPCU R9858 150_4 +3VPCU_HW_SD 5 VCC 4 HYST C5593 R9860 300/F_4 APU_RST# R9861 300/F_4 APU_PWRGD SET 1 GND 2 OT# 3 R9859 34K/F_4 2 R9838 R9840 2 APU_PROCHOT#_VDDIO PV stage:add +1.5VSUS option R540 R541 for Caspian CPU power leakge issue Serial VID SI Change from AMD request 2 ,34) APU_PROCHOT#_VDDIO +3V A 0.1U/16V_4Y R9862 1K/F_4 +3V INT_LCD_EDIDCLK INT_LCD_EDIDDATA INT_CRT_RED INT_CRT_GRE INT_CRT_BLU R9864 R9865 R9866 R9867 R9868 THER_SHD# 1 Q9005 3 SYS_SHDN# *METR3904-G_200MA G708T1U APU_TEST36 5VHW .RKP 7 7 7 6KXWGRZQRQ GHJUHH фϯͺϮϬϭϮϬϯϮϭх ĐŚĂŶŐĞZϵϴϱϵƚŽϯϰ<ŽŚŵĨŽƌƚŚĞƌŵĂů +\VWHUHVLVLV& R9863 0_4 ;dŚĞƌŵĂůƐŚƵƚĚŽǁŶƚĞŵƉĞƌĂƚƵƌĞ͗hDŝƐϳϯĚĞŐƌĞĞ͕/^ŝƐϳϰĚĞŐƌĞĞͿ *IV@2.2K_4 *IV@2.2K_4 IV@150/F_4 IV@150/F_4 IV@150/F_4 Quanta Computer Inc. PROJECT :BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A ONTATIO DISPLAY/CLK/MI(2/3) 1 Sheet 4 of 45 1 E5 E6 F5 F7 G6 G8 H5 H7 J6 J8 L7 M6 M8 N7 R8 VDDCR_CPU_1 VDD_18_1 VDDCR_CPU_2 VDD_18_2 VDDCR_CPU_3 VDD_18_3 VDDCR_CPU_4 VDD_18_4 VDDCR_CPU_5 VDD_18_5 VDDCR_CPU_6 VDD_18_6 VDDCR_CPU_7 VDD_18_7 U8 W8 U6 U9 W6 T7 V7 VDD_18 R9869 C5595 1U/6.3V_4X C5597 10U/6.3V_8X C5594 1U/6.3V_4X C5596 0.1U/10V_4X C5599 1U/6.3V_4X C5598 0.1U/10V_4X Ϯ CPU_CORE Ϯ CPU_CORE CPU_CORE C5602 *10U/6.3V_8X *10U/6.3V_8X ϮϬϭϭϬϵϭϱĚĚ ;ĨŽƌzϱůĂLJŽƵƚͿ 10U/6.3V_8X C5603 C5604 10U/6.3V_8X 10U/6.3V_8X C5605 C5606 10U/6.3V_8X 10U/6.3V_8X C5607 C5608 10U/6.3V_8X C5609 10U/6.3V_8X C5610 1U/6.3V_4X 1U/6.3V_4X C5611 C5612 1U/6.3V_4X 1U/6.3V_4X C5613 C700 C701 ESD@39P/50V_4N ESD@39P/50V_4N фϯͺϮϬϭϮϬϯϬϲх ƌĞƐĞƌǀĞĨŽƌ ^ VDDCR_CPU_10 VDDCR_CPU_11 VDDCR_CPU_12 VDDCR_CPU_13 фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ VDDCR_CPU_14 VDDCR_CPU_15 VDDCR_NB_1 VDD_18_DAC W9 R9870 VDDAN_18_DAC *0/short_6 CPU_CORE +1.8V CPU_VDDNB_CORE CPU_VDDNB_CORE ϭϱϬŵ VDDCR_NB_2 VDDCR_NB_3 VDDCR_NB_4 ONTARIO (2.0) VDDCR_NB_5 C5624 10U/6.3V_8X PART 4 OF 5 VDDCR_NB_6 VDDCR_NB_9 T5062 VDDCR_NB_13 VDDCR_NB_14 VDDPL_10 U11 0.1U/10V_4X C5618 C5619 0.1U/10V_4X 0.1U/10V_4X C5620 C5621 0.1U/10V_4X 1U/6.3V_4X C5625 C5626 1U/6.3V_4X C5622 0.1U/10V_4X C5623 1U/6.3V_4X 1U/6.3V_4X C5627 C5628 1U/6.3V_4X C703 C702 ESD@39P/50V_4N ESD@39P/50V_4N +1.0V VDDCR_NB_11 VDDCR_NB_12 0.1U/10V_4X C5616 C5617 0.1U/10V_4X фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ VDDCR_NB_8 VDDCR_NB_10 0.1U/10V_4X C5614 C5615 0.1U/10V_4X C5629 1U/6.3V_4X VDDCR_NB_7 VDDPL_10 R9871 ϮϬϬŵ *0/short_6 CPU_VDDNB_CORE CPU_VDDNB_CORE +1.8V VDDCR_NB_15 C5630 10U/6.3V_8X VDDCR_NB_16 VDDCR_NB_17 C5631 0.1U/10V_4X C5632 1U/6.3V_4X VDDCR_NB_18 VDD_10 VDDCR_NB_19 +1.0V VDDCR_NB_20 VDDCR_NB_21 VDDCR_NB_22 VDD_10_1 VDD_10_3 G16 G19 E17 J16 L16 L19 N16 R16 R19 W18 U16 C5601 VDDCR_CPU_9 VDD_10_2 +1.5VSUS C5600 +1.8V VDDCR_CPU_8 POWER E8 E11 E13 F9 F12 G11 G13 H9 H12 K11 K13 L10 L12 L14 M11 M12 M13 N10 N12 N14 P11 P13 *0/short_8 1U/6.3V_4X CPU_VDDNB_CORE ϭϬ 05 фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ U5038C CPU_CORE ϭϭ VDDIO_MEM_S_1 VDD_10_4 U13 W13 V12 T12 0.1U/10V_4X C5642 C5641 10U/6.3V_8X VDDIO_MEM_S_2 C5640 10U/6.3V_8X VDDIO_MEM_S_3 VDDIO_MEM_S_4 C5643 1U/6.3V_4X VDDIO_MEM_S_5 VDDIO_MEM_S_6 0.1U/10V_4X C5644 C5645 1U/6.3V_4X R9872 *0/short_6 R9873 *0/short_6 R9874 *0/short_6 10U/6.3V_8X C5633 C5634 10U/6.3V_8X ϱ͘ϱ 10U/6.3V_8X C5635 C5636 10U/6.3V_8X C5637 10U/6.3V_8X C5638 *220P/50V_4X C5639 *220P/50V_4X C718 C719 ESD@39P/50V_4N ESD@39P/50V_4N EMI 1206 CPU_VDDNB_CORE +1.0V фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ VDDIO_MEM_S_7 VDDIO_MEM_S_8 VDDIO_MEM_S_9 0.1U/10V_4X C5646 C5647 0.1U/10V_4X +3V VDDIO_MEM_S_10 VDDIO_MEM_S_11 VDD_33 ϱϬϬŵ A4 0.1U/10V_4X C5648 C5649 0.1U/10V_4X 0.1U/10V_4X C5650 C5651 0.1U/10V_4X 0.1U/10V_4X C5652 C5653 0.1U/10V_4X C5654 0.1U/10V_4X C720 C721 ESD@39P/50V_4N ESD@39P/50V_4N C5655 фϯͺϮϬϭϮϬϯϬϳх ƌĞƐĞƌǀĞĨŽƌ ^ FT1_ONTARIO 1U/6.3V_4X GND +1.5VSUS +1.5VSUS 1U/6.3V_4X C5659 C5660 1U/6.3V_4X C5658 1U/6.3V_4X A +1.5VSUS 1U/6.3V_4X C5661 10U/6.3V_8X C5656 C706 C704 C707 C711 C712 ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N A U5038D +1.5VSUS VSS_1 ONTARIO (2.0) VSS_50 VSS_2 PART 5 OF 5 VSS_51 VSS_3 VSS_52 VSS_4 VSS_53 VSS_5 VSS_54 VSS_6 VSS_55 VSS_7 VSS_56 VSS_8 VSS_57 VSS_9 VSS_58 VSS_10 VSS_59 VSS_11 VSS_60 VSS_12 VSS_61 VSS_13 VSS_62 VSS_14 VSS_63 VSS_15 VSS_64 VSS_16 VSS_65 VSS_17 VSS_66 VSS_18 VSS_67 VSS_19 VSS_68 VSS_20 VSS_69 VSS_21 VSS_70 VSS_22 VSS_71 VSS_23 VSS_72 VSS_24 VSS_73 VSS_25 VSS_74 VSS_26 VSS_27 VSS_28 VSS_29 GROUND A7 B7 B11 B17 B22 C4 D5 D7 D9 D11 D14 B15 D17 D19 E7 E9 E12 E20 F8 F11 F13 G4 G5 G7 G9 G12 G20 G22 H6 H11 H13 J4 J5 J7 J20 K10 K14 L4 L6 L8 L11 L13 L20 L22 M7 N4 N6 N8 N11 C5657 10U/6.3V_8X VSS_75 VSS_76 VSS_77 VSS_78 VSS_30 VSS_79 VSS_31 VSS_80 VSS_32 VSS_81 VSS_33 VSS_82 VSS_34 VSS_83 VSS_35 VSS_84 VSS_36 VSS_85 VSS_37 VSS_86 VSS_38 VSS_87 VSS_39 VSS_88 VSS_40 VSS_89 VSS_41 VSS_90 VSS_42 VSS_91 VSS_43 VSS_92 VSS_44 VSS_93 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_94 VSS_95 VSS_96 VSS_97 VSSBG_DAC N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11 0.1U/10V_4X C5662 C5663 0.1U/10V_4X 0.1U/10V_4X C5664 C5665 0.1U/10V_4X 0.1U/10V_4X C5666 C5667 0.1U/10V_4X 0.1U/10V_4X C5668 C5669 0.1U/10V_4X C5670 0.1U/10V_4X +1.5VSUS C713 C714 C715 C716 ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N фϯͺϮϬϭϮϬϯϬϲх ƌĞƐĞƌǀĞĨŽƌ ^ EMC CAPS place capacitors under BGA +1.5VSUS C5671 180P/50V_4N CPU_CORE C5672 C5673 180P/50V_4N180P/50V_4N VDD_18 CPU_VDDNB_CORE C5674 C5675 180P/50V_4N180P/50V_4N VDDAN_18_DAC VDD_10 +1.5VSUS 0.1U/10V_4X C5676 C5677 180P/50V_4N VDDPL_10 C5678 0.1U/10V_4X +3V C5684 C5679 180P/50V_4N C5680 180P/50V_4N C5681 180P/50V_4N C5682 180P/50V_4N C5683 180P/50V_4N 0.1U/10V_4X FT1_ONTARIO GND GND Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A ONTARIO POWER & DECOUP(3/3) 1 Sheet 5 of 45 5 4 3 2 1 EŽƚĞ͗ W/ ͺZ^dϮηĂƐƐĞƌƚĞĚĚƵƌŝŶŐƚƌĂŶƐŝƚŝŽŶƚŽ^ϯͬ^ϰͬ^ϱ ƚŽƌĞƐĞƚW/ ĚĞǀŝĐĞƐŝŶƚŚĞ&, &Žƌ>E͕t>E +3V_S5 NC,no install by default R678 (26,28) FCH_PCIE_RST# 06 33_4 C844 150P/50V_4N PCIE_RST2# R344 T84 T77 (34) SLP_S3# (34) SLP_S5# (34) DNBSWON# (10) FCH_PWRGD FCH_TEST2 *2.2K_4 D For Dimm +3V R272 2.2K_4 SMB_RUN_CLK R270 2.2K_4 SMB_RUN_DAT R271 *10K_4 GPIO65 (34) (4) APU_THERMTRIP# 2.2K_4 SMB_LAN_CLK R384 2.2K_4 SMB_LAN_DAT C379 LPCPD# фϯͺϮϬϭϮϬϭϯϬх ĂĚĚĨŽƌ D/;Kd͗ͲϵϬϵϬ͕ϱϮϰϬͿ +3V_S5 SMB_LAN_CLK APU_THERMTRIP# USB_SC_OC# USB_NORMAL_OC# FCH_JTAG_TCK C601 E@2200P/50V_4X 33P/50V_4N R430 R432 (34) RSMRST_GATE# EŽƚĞ͗ ^>Ϭͬ^Ϭ͗ĨŽƌ^Dh^ŝŶƚŚĞ^ϬƉŽǁĞƌĚŽŵĂŝŶ ^>ϭͬ^ϭ͗ĨŽƌ^Dh^ŝŶƚŚĞ^ϱƉŽǁĞƌĚŽŵĂŝŶ +3V RSMRST# 0_4 22K_4 PCBEEP SMB_RUN_CLK SMB_RUN_DAT SMB_LAN_CLK SMB_LAN_DAT GPIO62 FCH_PCIE_WLAN_CLKREQ# (27) PCBEEP (11,12,33) SMB_RUN_CLK (11,12,33) SMB_RUN_DAT (26,28) SMB_LAN_CLK (26,28) SMB_LAN_DAT T34 (28) FCH_PCIE_WLAN_CLKREQ# PCIE_WAKE# PWR_BTN# 10K_4 2.2K_4 GPIO51 GPIO65 EŽƚĞ͗ 'ĞǀĞŶƚϭϮ͗ϭϴηŝŶƚĞŐƌĂƚĞĚWhϭϬ<ƚŽнϯsͺ^ϱ ;/ŶƚĞŐƌĂƚĞĚWhŝƐŶŽƚƐƵƉƉŽƌƚĞĚǁŚĞŶƚŚĞƉŝŶ ŝƐĐŽŶĨŝŐƵƌĞĚĨŽƌh^ŽǀĞƌĐƵƌƌĞŶƚĨƵŶĐƚŝŽŶͿ FCH_JTAG_TCK FCH_JTAG_TDI FCH_JTAG_RST# T92 T93 T94 SPI_HOLD# (8) SPI_HOLD# EŽƚĞ͗Dϯ>ĚŽĞƐŶΖƚŚĂǀĞs'ͺWĨƵŶĐƚŝŽŶ EŽƚĞ͗ 'W/Kϰϴ͗ϲϱŝŶƚĞŐƌĂƚĞĚWhϴ͘Ϯ<ƚŽнϯs EŽƚĞ͗ >>η͕t< ηĂŶĚWtZͺdEŶĞĞĚƉƵůůƵƉƚŽ нϯsWhŽŶůLJŝĨ^ϱнŵŽĚĞŝƐƐƵƉƉŽƌƚĞĚ (24,34) USB_SC_OC# (24,34) USB_NORMAL_OC# USB_SC_OC# USB_NORMAL_OC# FCH_BLINK GEVENT6# GEVENT17# GEVENT16# FCH_JTAG_TDO FCH_JTAG_TCK FCH_JTAG_TDI FCH_JTAG_RST# T81 T79 T83 T86 T87 R711 R710 *0_4 *0_4 5 4 3 2 1 To Azalia HDaudio interface are +3V_S5 ACZ_SDOUT (27) ACZ_SDOUT (27) ACZ_SYNC (27) ACZ_BITCLK R392 R391 33_4 ACZ_SYNC_R ACZ_BITCLK R406 33_4 ACZ_BCLK_R 33_4 ACZ_RST#_R ACZ_BCLK_R ACZ_SDOUT_R ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2_R ACZ_SDIN3_R ACZ_SYNC_R ACZ_RST#_R 6 7 8 9 10 T65 T42 R357 ACZ_SDIN0 (27) ACZ_SDIN0 AG24 AE24 AE26 AF22 AH17 AG18 AF24 AD26 AD25 T7 R7 AG25 AG22 J2 AG26 V8 W8 Y6 V10 AA8 AF25 M7 R8 T1 P6 F5 P5 J7 T8 T71 KSO_5 T66 T67 T68 T69 T70 T72 T73 T74 T75 T76 T78 T82 T85 T88 T89 T90 T91 PCIE_RST2#/GEVENT4# RI#/GEVENT22# SPI_CS3#/GBE_STAT1/GEVENT21# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD HUDSON-M3 Part 4 of 5 TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1# PME#/GEVENT3# LPC_SMI#/GEVENT23# LPC_PD#/GEVENT5# SYS_RESET#/GEVENT19# WAKE#/GEVENT8# IR_RX1/GEVENT20# THRMTRIP#/SMBALERT#/GEVENT2# WD_PWRGD CLK_REQ4#/SATA_IS0#/GPIO64 CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47 SCL1/GPIO227 SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61 IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOWN#/GPIO51 DDR3_RST#/GEVENT7#/VGA_PD GBE_LED0/GPIO183 SPI_HOLD#/GBE_LED1/GEVENT9# GBE_LED2/GEVENT10# GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# G8 USB_RCOMP B9 USB_FSD1P/GPIO186 USB_FSD1N H1 H3 T157 T156 H6 H5 T159 T158 USB_FSD0P/GPIO185 USB_FSD0N K19 J19 J21 PS2_DAT/SDA4/GPIO187 PS2_CLK/CEC/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 H10 G10 USB_HSD12P USB_HSD12N K10 J12 R647 11.8K/F_6 D HUB3 G12 F12 USBP11+ USBP11- USBP11+ USBP11- (24) (24) Reserve USB2.0/3.0 option (Left Up) USB_HSD10P USB_HSD10N K12 K13 USBP10+ USBP10- USBP10+ USBP10- (24) (24) USB3.0 S&C (Right) USB_HSD9P USB_HSD9N B11 D11 USB_HSD8P USB_HSD8N E10 F10 C10 A10 USBP7+ USBP7- USBP7+ USBP7- USB_HSD6P USB_HSD6N H9 G9 USBP6+_LCD USBP6-_LCD USBP6+_LCD (30) USBP6-_LCD (30) CCD on LVDS USB_HSD5P USB_HSD5N A8 C8 USBP5+ USBP5- USBP5+ USBP5- Card Reader USB_HSD4P USB_HSD4N F8 E8 USB_HSD3P USB_HSD3N C6 A6 USB_HSD2P USB_HSD2N C5 A5 USB_HSD7P USB_HSD7N USB_HSD1P USB_HSD1N (28) (28) WLAN (29) (29) HUB1 T170 T171 C1 C3 USBP0+ USBP0- USBSS_CALRP USBSS_CALRN C16 A16 USBSS_CALRP USBSS_CALRN USBP0+ USBP0R646 R642 USB2.0 debug port (Left Down) (24) (24) U3@1K/F_4 U3@1K/F_4 +FCH_VDD_11_SSUSB_S USB_SS_TX3P USB_SS_TX3N A14 C14 USB_SS_RX3P USB_SS_RX3N C12 A12 USB_SS_TX2P USB_SS_TX2N D15 B15 USB_SS_RX2P USB_SS_RX2N E14 F14 USB_SS_TX1P USB_SS_TX1N F15 G15 USB3_TXP1 USB3_TXN1 USB3_TXP1 (24) USB3_TXN1 (24) USB_SS_RX1P USB_SS_RX1N H13 G13 USB3_RXP1 USB3_RXN1 USB3_RXP1 (24) USB3_RXN1 (24) h^ͺ^^ͺdyͬZyϯ͕ϮWͬE͕h^ͺ,^ϭϯ͕ϭϮ͕ϵ͕ϰWͬE͕h^ͺ&^ϭ͕ϬWͬE ƐŝŐŶĂůƉĂŝƌƐĚŽŶŽƚĞdžŝƐƚŽŶ,ƵĚƐŽŶͲDϯ>ͬϯ> USB_SS_TX0P USB_SS_TX0N J16 H16 USB3_TXP0 USB3_TXN0 USB3_TXP0 (24) USB3_TXN0 (24) J15 K15 USB3_RXP0 USB3_RXN0 USB3_RXP0 (24) USB3_RXN0 (24) SCL2/GPIO193 SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 EC_PWM3/EC_TIMER3/GPIO200 H19 G19 G22 G21 E22 H22 J22 H21 EMBEDDED CTRL KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208 HUB2 C USBP2+ USBP2- E1 E3 USB_HSD0P USB_HSD0N SMB_EC_CLK R318 SMB_EC_DAT R315 SCLK3 SDATA3 MBCLK MBDATA *0_4 *0_4 SCLK3 SDATA3 USB3.0 Port 2 USB3.0 S&C EŽƚĞ͗ ^>Ϯͬ^Ϯ͗ĨŽƌ^Dh^ŝŶƚŚĞ^ϱƉŽǁĞƌĚŽŵĂŝŶ ^>ϯͬ^ϯ͗ĨŽƌ^Dh^ŝŶƚŚĞ^ϱƉŽǁĞƌĚŽŵĂŝŶ MBCLK (34,36) MBDATA (34,36) (4) (4) +3V_S5 EC_PWM2 R15 0_4 EC_PWM2 (10) K21 K22 F22 F24 E24 B23 C24 F18 +3V_S5 +3V B R599 10K_4 SMB_EC_CLK R600 10K_4 SMB_EC_DAT R14 0_4 R593 10K_4 SCLK3 R594 *0_4 R595 10K_4 SDATA3 ^>Ϯͬ^Ϯ͗ ^Dh^/ŵƉůĞŵĞŶƚĞĚ͗WhϮ͘Ϯ<ƚŽнϯsͺ^ϱ ^Dh^EŽƚ/ŵƉůĞŵĞŶƚĞĚ͗WhϭϬ<ƚŽнϯsͺ^ϱ ^>ϯͬ^ϯ͗ >ŽǁsŽůƚĂŐĞ^Dh^/ŵƉůĞŵĞŶƚĞĚ͗WhϭϬ<ƚŽWhͺs/K;нϯsͿ >ŽǁsŽůƚĂŐĞ^Dh^EŽƚ/ŵƉůĞŵĞŶƚĞĚ͗WhϭϬ<ƚŽнϯsͺ^ϱ KSO_[17:0] provided test points (follow checklist) Hudson-M3 +3V_S5 EŽƚĞ͗ h^Ϯ͘ϬĂŶĚh^ϯ͘ϬƐŝŐŶĂůƉĂŝƌĐŽŵďŝŶĂƚŝŽŶƐƚŽĂƐŝŶŐůĞh^ϯ͘ϬĐŽŶŶĞĐƚŽƌ͗ Ʉh^ͺ^^ͺdyͬZyϭWͬEĂŶĚh^ͺ,^ϭϭWͬE Ʉh^ͺ^^ͺdyͬZyϬWͬEĂŶĚh^ͺ,^ϭϬWͬE ф>ĂLJŽƵƚEŽƚĞх h^WͬEƉĂŝƌƐǁŝƚŚƚƌĂĐĞůĞŶŐƚŚƐƵƉƚŽϭϬΗ USB_SS_RX0P USB_SS_RX0N PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192 KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/XDB0/GPIO223 KSO_15/XDB1/GPIO224 KSO_16/XDB2/GPIO225 KSO_17/XDB3/GPIO226 USB_RCOMP_SB USB_HSD13P USB_HSD13N USB_HSD11P USB_HSD11N BLINK/USB_OC7#/GEVENT18# USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GEVENT17# USB_OC4#/IR_RX0/GEVENT16# USB_OC3#/AC_PRES/TDO/GEVENT15# USB_OC2#/TCK/GEVENT14# USB_OC1#/TDI/GEVENT13# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST# F21 E20 F20 A22 E18 A20 J18 H18 G18 B21 K18 D19 A18 C18 B19 B17 A24 D17 USBCLK/14M_25M_48M_OSC RSMRST# AB3 AB1 AA2 Y5 Y3 Y1 AD6 AE4 D21 C20 D23 C22 *22P/50V_4N ACZ_RST# T9 T10 V9 AE22 AG19 R9 C26 T5 U4 K1 V7 R10 AF19 *10KX8 (8,33) BOARD_ID10 ACZ_SDOUT_R ACZ_SYNC C571 (27) ACZ_RST# 33_4 R734 U3A AB6 R2 W7 T3 W2 J4 N7 U2 FCH_PCIE_LAN_CLKREQ# BOARD_ID8 BOARD_ID9 T29 R407 R375 B GEVENT23# SYS_RST# PCIE_WAKE# GEVENT20# APU_THERMTRIP# R288 10K/F_4 WD_PWRGD (26) FCH_PCIE_LAN_CLKREQ# (8) BOARD_ID8 (8) BOARD_ID9 +3V_S5 C EC_A20GATE EC_KBRST# EC_EXT_SCI# (26,28) PCIE_WAKE# T80 R396 10K_4 10K_4 10K_4 10K_4 FCH_TEST0 FCH_TEST1 FCH_TEST2 T100 For Lan&WiFi R685 R368 R374 R377 0_4 PWR_BTN# T95 (34) EC_A20GATE (34) EC_KBRST# (34) EC_EXT_SCI# ><ͺZ Y'ηEŽƚ/ŵƉůĞŵĞŶƚĞĚ͗ůĞĂǀĞƵŶĐŽŶŶĞĐƚĞĚ +3V_S5 GEVENT22# GEVENT21# SLP_S3# SLP_S5# DNBSWON# R682 FCH_PWRGD USB MISC D43 B130LAW-7-F_1A *0_4 R438 USB 2.0 FCH_TEST1 USB 3.0 *2.2K_4 2 ACPI / WAKE UP EVENTS USB 1.1 R382 1 (7,28,29,34) PLTRST# GPIO FCH_TEST0 USB OC *2.2K_4 HD AUDIO R383 R662 10K_4 2 G2 EC will Conflict with FCH, did not mount R315&R318 SYS_RST# 1 EC *SHORT_PAD I2Ce_1(M) FCH I2Cf_2(M) Device Charger I2C_Device(S) Battery ALL/S5 A A I2Ce_2(M) +3V_S5 EEPROM I2Ce_3(M) R286 *10K_4 2 G5 ALL VGA Thermal I2Cf_3(M) KSO_5 1 APU APU S5 I2Cf_1(M) Lan WLan S5 I2Cf_0(M) Dimm Clk Gen S0 Quanta Computer Inc. *SHORT_PAD PROJECT :BY7D Size Document Number Rev 1A FCH 1/5(GPIO/USB/AZ) Date: 5 4 3 2 Wednesday, March 21, 2012 1 Sheet 6 of 45 5 4 3 2 1 WhͺW/ ͺZ^dη/^&KZW/ s/ ^KEWh 07 +3V APU_PCIE_RST# R670 5 &Žƌ'Wh 33_4 C709 C710 PCIE_TXP_WLAN_C PCIE_TXN_WLAN_C 0.1U/10V_4X 0.1U/10V_4X C705 C708 PCIE_TXP_LAN_C PCIE_TXN_LAN_C PCIE_RXP_WLAN PCIE_RXN_WLAN PCIE_RXP_LAN PCIE_RXN_LAN (26) PCIE_RXP_LAN (26) PCIE_RXN_LAN From LAN C CLK_DP_NSSCP CLK_DP_NSSCN RP22 2 4 AA27 AA26 W27 V27 V26 W26 W24 W23 CLK_CALRN F27 G30 G28 1 0X2 INT_CLK_DP_NSSCP INT_CLK_DP_NSSCN 3 R26 T26 2K/F_4 TP62 TP63 (4) CLK_DP_NSSCP (4) CLK_DP_NSSCN V33 V31 W30 W32 AB26 AB27 AA24 AA23 INT_CLK_FCH_SRCP INT_CLK_FCH_SRCN R274 +1.1V_CKVDD AF29 AF31 H33 H31 To CPU (4) CLK_APU_HCLKP (4) CLK_APU_HCLKN To GPU (13) CLK_PCIE_VGAP (13) CLK_PCIE_VGAN CLK_APU_HCLKP CLK_APU_HCLKN RP20 2 4 1 0X2 INT_CLK_APU_HCLKP INT_CLK_APU_HCLKN 3 CLK_PCIE_VGAP CLK_PCIE_VGAN RP23 2 4 1 0X2 INT_CLK_PCIE_VGAP INT_CLK_PCIE_VGAN 3 T24 T23 J30 K29 H27 H28 (28) CLK_PCIE_WLANP (28) CLK_PCIE_WLANN CLK_PCIE_WLANP CLK_PCIE_WLANN RP12 1 0X2 INT_CLK_PCIE_WLANP INT_CLK_PCIE_WLANN 3 2 4 TP64 TP65 (26) CLK_PCIE_LANP (26) CLK_PCIE_LANN CLK_PCIE_LANP CLK_PCIE_LANN R722 R723 0_4 0_4 INT_CLK2P INT_CLK2N F33 F31 INT_CLK_PCIE_LANP INT_CLK_PCIE_LANN E33 E31 фϯͺϮϬϭϮϬϭϯϭх ĐŚĂŶŐĞƚŽϬŽŚŵĨŽƌůĂLJŽƵƚƌŽƵƚŝŶŐ Note: CLK_FCH_SRCP/N is 100MHZ SSC J27 K26 Note: CLK_DP_NSSCP/N is 100MHZ non-SSC M23 M24 M27 M26 Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC Note: CLK_APU_HCLKP/N is 100MHZ SSC Note: CLK_PCIE_VGAP/N is 100MHZ SSC N25 N26 R23 R24 Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable N27 R27 C380 Card Reader (29) CLK_48M_CARD 15P/50V_4C CLK_48M_CARD R277 22_4 CLK_48M_CARD_R J26 HUDSON-M3 Part 1 of 5 UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N PCIE_CALRP PCIE_CALRN GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38 PCICLK4/14M_OSC/GPO39 GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N PCIRST# AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42 GNT0# GNT1#/GPO44 GNT2#/SD_LED/GPO45 GNT3#/CLK_REQ7#/GPIO46 CLKRUN# LOCK# CLK_CALRN PCIE_RCLKP PCIE_RCLKN DISP_CLKP DISP_CLKN DISP2_CLKP DISP2_CLKN APU_CLKP APU_CLKN SLT_GFX_CLKP SLT_GFX_CLKN GPP_CLK0P GPP_CLK0N INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35 GPP_CLK1P GPP_CLK1N R715 0_4 25M_X1 C31 25M_X2 C33 GPP_CLK4P GPP_CLK4N GPP_CLK5P GPP_CLK5N GPP_CLK6P GPP_CLK6N LPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ/GPIO48 GPP_CLK7P GPP_CLK7N GPP_CLK8P GPP_CLK8N PCI_CLK1 0_4 0_4 PCI_CLK3 PCI_CLK4 DMA_ACTIVE# PROCHOT# APU_PG LDT_STP# APU_RST# AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9 32K_X2 25M_X2 27P/50V_4N S5_CORE_EN RTCCLK INTRUDER_ALERT# VDDBT_RTC_G D PCI_CLK3 (10) PCI_CLK4 (10) R365 EV@0_4 фϯͺϮϬϭϮϬϮϬϲх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ D37 *RB500V-40_100MA R681 1 2 RTC Circuitry(RTC) +3V_RTC R655 +3VRTC 510/F_6 1 2 1U/10V_4X R435 +VCCRTC_2 C537 +3V 20MIL GPU_RST# PCI_AD23 (10) PCI_AD24 (10) PCI_AD25 (10) PCI_AD26 (10) PCI_AD27 (10) GFXPG_1V_EN (34,39,42) +3VPCU D38 *RB500V-40_100MA 20MIL PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 *0_4 GFXPG_1V_EN HUDSON_MEMHOT# *0/short_6 D27 BAT54C-7-F_200MA +3VRTC 20MIL R680 R428 *2.2K_4 1K/F_4 20MIL C +BAT I/O Power Well DOS Net GPIO GFXPG_1V_EN GPIO28 DGPU_PWRGD I +3.3V "0->1" PE_GPIO0 GPIO44 DGPU_RST# O +3.3V "0->1" PE_GPIO1 GPIO45 DGPU_PWREN O +3.3V "0->1" CN21 50273-0027N-001 T40 T39 CLKRUN# CLKRUN# (34) AF18 AE18 AC16 AD18 NMP@22_4 22_4 PCLK_DEBUG (28) PCLK_591 (34) B25 D25 D27 C28 A26 A29 A31 B27 AE27 AE19 LPC_CLK0_R LPC_CLK1_R G25 E28 E26 G26 F26 DMAACTIVE_L APU_PROCHOT#_VDDIO APU_PWRGD APU_STOP# APU_RST# G2 32K_X1 32K_X2 G4 32K_X2 USE GROUND GUARD FOR 32K_X1 AND 32K_X2 H7 F1 F3 E6 S5_CORE_EN RTC_CLK INTRUDER_ALERT# +3V_RTC R608 R611 LDRQ#0 LDRQ#1 22_4 22_4 T38 T30 1 SERIRQ PCLK_DEBUG C805 *15P/50V_4C PCLK_591 C434 *15P/50V_4C 32K_X1 (4,34) T41 RTC_CLK (10,34) +3V_RTC +3V_RTC C562 18P/50V_4C Y7 32.768KHZ_10 R390 20M_4 APU_RST# (4) *0.1U/10V_4X *1M/F_4 B (34) T31 R656 560_4 2 For EMI LPC_CLK0 (10) LPC_CLK1 (10) LAD0 (28,34) LAD1 (28,34) LAD2 (28,34) LAD3 (28,34) LFRAME# (28,34) DMAACTIVE_L (4) APU_PROCHOT#_VDDIO APU_PWRGD (4) R352 20MIL Hudson-M3 фϯͺϮϬϭϮϬϮϬϳх ĐŚĂŶŐĞϯϵϳ͕ϯϴϭƚŽϮϳƉ&;ĐƌLJƐƚĂůǀĞŶĚŽƌƐƵŐŐĞƐƚͿ DĂŝŶƐŽƵƌĐĞ͗'ϲϮϱϬϬϬϳϯϳ ϮŶĚƐŽƵƌĐĞ͗'ϲϮϱϬϬϬϰϴϲ LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# SERIRQ C534 25M_X1 PCI_CLK1 (10) T135 14M_25M_48M_OSC S5 PLUS C381 1M/F_4 0_4 R436 R433 R280 R281 GPP_CLK3P GPP_CLK3N R273 1 Y6 25MHZ_30 R434 PCI_CLK3_R PCI_CLK4_R AB5 2 27P/50V_4N PCI_CLK1_R GPP_CLK2P GPP_CLK2N 32K_X1 C397 AF3 AF1 AF5 AG2 AF6 1 0.1U/10V_4X 0.1U/10V_4X (28) PCIE_RXP_WLAN (28) PCIE_RXN_WLAN From WLAN PERST#_BUF (13) 2 (26) PCIE_TXP_LAN (26) PCIE_TXN_LAN To LAN 590/F_4 PCIE_CALRP 2K/F_4 PCIE_CALRN R275 R276 PCIE_RST# A_RST# 3 AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32 AB33 AB31 AB28 AB29 Y33 Y31 Y28 Y29 (28) PCIE_TXP_WLAN (28) PCIE_TXN_WLAN To WLAN PERST#_BUF *EV@TC7SH08FU(F) 1 2 AE2 AD5 UMI_RXP0_C UMI_RXN0_C UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3 UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3 +1.1V_PCIE_VDDR B U5034 4 3 PCIE_RST#_R A_RST# LPC 33_4 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X PCI CLKS C767 C764 C765 C766 C770 C771 C773 C774 PCI INTERFACE R669 UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3 UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3 APU PLTRST# (6,28,29,34) PLTRST# (3) (3) (3) (3) (3) (3) (3) (3) To LAN 1 150P/50V_4N 150P/50V_4N PCI EXPRESS INTERFACES C842 (3) (3) (3) (3) (3) (3) (3) (3) To WLAN 2 APU_PCIE_RST# 4 U3E D To CPU GPU_RST# EV@0.1U/10V_4X C843 CLOCK GENERATOR &Žƌ>WĚĞǀŝĐĞƐ͕ĂƌĚƌĞĂĚĞƌ C5559 +BAT EŽƚĞ͗ W/ ͺZ^dηĂƐƐĞƌƚĞĚĚƵƌŝŶŐƚƌĂŶƐŝƚŝŽŶƚŽ^ϯͬ^ϰͬ^ϱ ƚŽƌĞƐĞƚW/ ĚĞǀŝĐĞƐŝŶƚŚĞWh ͺZ^dηĂƐƐĞƌƚĞĚĚƵƌŝŶŐƚƌĂŶƐŝƚŝŽŶƚŽ^ϯͬ^ϰͬ^ϱ ƚŽƌĞƐĞƚĂůůĚĞǀŝĐĞƐŝŶƚŚĞ&,ŽƌĐŽŶŶĞĐƚĞĚƚŽŝƚ͕ ĞdžĐĞƉƚƚŚĞW/ůŽŐŝĐŝŶƚŚĞ&,͘ C560 18P/50V_4C S5_CORE_EN is necessary to connect enable pin of +3VPCU/+5VPCU regulator for S5+ mode implementation INTRUDER_ALERT# Left not connected (FCH has 50-kohm internal pull-up to VBAT). C531 0.1U/10V_4X G6 *SHORT_PAD A A Quanta Computer Inc. PROJECT :BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A FCH 2/5(ACPI/PCI/CLK) 5 4 3 2 1 Sheet 7 of 45 5 4 3 2 1 08 ^W/^ŚĂƌĞĚ&ůĂƐŚ U3B PLACE SATA AC COUPLING CAPS CLOSE TO HUDSON-M2/M3 SATA HDD/SSD +3V_S5 +3VPCU (31) SATA_TXP0 (31) SATA_TXN0 AK19 AM19 (31) SATA_RXN0 (31) SATA_RXP0 AL20 AN20 (31) SATA_TXP1 (31) SATA_TXN1 AN22 AL22 (31) SATA_RXN1 (31) SATA_RXP1 AH20 AJ20 SATA_TX0P SATA_TX0N HUDSON-M3 SATA_RX0N SATA_RX0P D ^dͺdyͬZyϱ͗ϮWͬEĂŶĚ^dͺ/^ϱ͗ϮηĚŽŶŽƚĞdžŝƐƚŽŶ,ƵĚƐŽŶͲDϯ>ͬϯ> ^dͺdyͬZyϳ͕ϲWͬEĂŶĚ^dͺ/^ϳ͕ϲηŽŶůLJĞdžŝƐƚŽŶ,ƵĚƐŽŶͲϰ͘ AN24 AL24 AL26 AN26 AJ26 AH26 AN29 AL28 AK27 AM27 AL29 AN31 AL31 AL33 PLACE SATA_CAL RES VERY CLOSE TO BALL OF HUDSON-M2/M3 C AH33 AH31 AJ33 AJ31 R581 +1.1V_AVDD_SATA R583 931/F_4 R652 1K/F_4 SATA_CALRP SATA_CALRN 10K/F_4 SATA_LED# AF28 AF27 AD22 AF21 SD CARD SATA_RX2N SATA_RX2P SATA_TX3P SATA_TX3N GBE LAN AH24 AJ24 SATA_TX2P SATA_TX2N SATA_RX3N SATA_RX3P SATA_TX4P SATA_TX4N SATA_RX4N SATA_RX4P SATA_TX5P SATA_TX5N SERIAL ATA AM23 AK23 SATA_RX1N SATA_RX1P SATA_RX5N SATA_RX5P SPI ROM AJ22 AH22 SATA_TX1P SATA_TX1N NC6 NC7 NC10 NC11 VGA_BLUE NC12 NC13 VGA_HSYNC/GPO68 VGA_VSYNC/GPO69 R648 *10K/F_4 VGA_DAC_RSET SATA_ACT#/GPIO67 AUX_VGA_CH_P AUX_VGA_CH_N AUXCAL SATA_X1 BOARD_ID1 BOARD_ID11 FCH_PROCHOT#_C BOARD_ID2 BOARD_ID3 BOARD_ID4 B (4) APU_TALERT# SATA_X2 Remove Zero Power ODD funciton T138 R717 BOARD_ID5 BOARD_ID6 BOARD_ID7 0_4 SB_TALERT# AH16 AM15 AJ16 AK15 AN16 AL16 K6 K5 K3 M6 VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71 SATA_CALRP SATA_CALRN VGA MAINLINK AG21 SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/SPI_WP#/GPIO161 VGA_GREEN Integrated Clock Mode: Leave unconnected. +3V GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST# GBE_PHY_INTR VGA_RED NC8 NC9 VGA DAC SATA ODD Part 2 of 5 SD_CLK/SCLK_2/GPIO73 SD_CMD/SLOAD_2/GPIO74 SD_CD#/GPIO75 SD_WP/GPIO76 SD_DATA0/SDATI_2/GPIO77 SD_DATA1/SDATO_2/GPIO78 SD_DATA2/GPIO79 SD_DATA3/GPIO80 FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54 FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58 HW MONITOR TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173 TEMPIN3/TALERT#/GPIO174 ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N ML_VGA_HPD/GPIO229 VIN0/GPIO175 VIN1/GPIO176 VIN2/SDATI_1/GPIO177 VIN3/SDATO_1/GPIO178 VIN4/SLOAD_1/GPIO179 VIN5/SCLK_1/GPIO180 VIN6/GBE_STAT3/GPIO181 VIN7/GBE_LED3/GPIO182 NC1 NC2 NC3 NC4 NC5 AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14 AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9 V6 V5 V3 T6 V1 R718 0_4 R496 D 10K_4 U18 FCH_SPI_CS0# FCH_SPI_CLK FCH_SPI_SO FCH_SPI_SI (34) FCH_SPI_CS0# (34) FCH_SPI_CLK (34) FCH_SPI_SO (34) FCH_SPI_SI R376 FCH_SPI_SI_R 33_4 1 6 5 2 3 C557 *22P/50V_4N CE# SCK SI SO HOLD# VDD WP# VSS R372 10K_4 8 7 R488 10K_4 SPI_HOLD# (6) 4 C551 0.1U/10V_4X W25Q16BVSSIG FCH_SPI_WP GBE_PHY_INTR R342 FCH_SPI_SO_R FCH_SPI_CLK_R FCH_SPI_CS0#_R FCH_SPI_WP L30 R380 R386 R387 10K_4 33_4 33_4 33_4 W25Q32BVSSIG:AKE391P0N00 W25Q16BVSSIG:AKE38FP0N01 +3V_S5 FCH_SPI_SI FCH_SPI_SO FCH_SPI_CLK FCH_SPI_CS0# A-stage Socket: DG008000031 91960-0084L T45 L32 T46 M29 T47 M28 N30 T48 T49 M33 N32 T50 T51 K31 T52 V28 V29 T53 T54 U28 T55 T31 T33 T29 T28 R32 R30 P29 P28 T56 T57 T58 T59 T60 T61 T62 T63 C29 N2 M3 L2 N4 P1 P3 M1 M5 R719 *0_4 C +1.5VSUS +3V_S5 R425 *1K/F_4 R426 *1K/F_4 VIN_VDDIO VIN_VDDR R429 *1K/F_4 C599 *0.1U/10V_4X R427 *1K/F_4 C596 *0.1U/10V_4X T64 VIN0 VIN1 VIN2 MEM_P1V5 MEM_P1V35 VIN_VDDIO VIN_VDDR VIN7 R359 R674 R676 10K_4 10K_4 10K_4 R675 10K_4 T43 T44 AG16 AH10 A28 G27 L4 %RDUG,' UMA SKU VGA SKU ULU3 ULU2 UR3 UR2 ,' ,' ,' ,' ,' ,' ,' ,' ,' ,' R317 R333 R320 R310 R693 R538 R424 EV@10K_4 ULU2@10K_4 UR2@0_4 LAN@10K_4 HDMI@10K_4 CRT@10K_4 Thames@10K_4 NS&C@10K_4 NBT@10K_4 NCEC@10K_4 BOARD_ID5 BOARD_ID6 BOARD_ID7 R683 R677 R422 S&C@10K_4 BT@10K_4 CEC@10K_4 IMR@10K_4 BOARD_ID10 R423 TEXTURE@10K_4 R312 R334 R322 R297 R692 R736 R704 IV@10K_4 ULU3@10K_4 UR3@10K_4 NLAN@10K_4 NHDMI@10K_4 NCRT@10K_4 Seymour@10K_4 +3V_S5 R684 R671 R699 R703 Hudson-M3 BOARD ID SETTING BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID8 BOARD_ID9 BOARD_ID11 +3V B ,' (6) BOARD_ID8 (6) BOARD_ID9 (6,33) BOARD_ID10 H L BOARD_ID8 BOARD_ID9 BOARD_ID10 H L H L W/O LAN W LAN W/O S&C W S&C W/O BT W BT H L H L H L A A W/O CEC W CEC W/O HDMI W HDMI W/O CRT W CRT Metal/IMR TEXTURE H L H L H L H L Quanta Computer Inc. Seymour Thames H L PROJECT :BY7D Size Document Number Date: Wednesday, March 21, 2012 FCH 3/5(SATA/VGA/GND/SPI) 5 4 3 2 1 Sheet 8 of Rev 1A 45 4 +3V_S5 47mA 11mA 14mA 11mA 12mA H24 V22 U22 T22 L18 D7 AH29 AG28 *2.2U/6.3V_6X M31 +VDDPL_3.3V +FCH_VDDPL_33_SSUSB_S +FCH_VDDPL_33_SUSB_S +FCH_VDDPL_33_PCIE +FCH_VDDPL_33_SATA L44 U3@HCB1608KF-221T20_2A R412 C508 U3@2.2U/6.3V_6X C496 U3@0.1U/10V_4X C756 L73 HCB1608KF-221T20_2A +3V L31 Y22 V23 V24 V25 C829 1U/10V_4X EŽƚĞ͗ sW>ͺϯϯͺ͕sW>ͺϯϯͺD>͕sEͺϯϯͺ͗ s'ƚƌĂŶƐůĂƚŽƌŝƐƐƵƉƉŽƌƚĞĚ͗dŝĞƚŽнϯ͘ϯsͺ^Ϭ͘ s'ƚƌĂŶƐůĂƚŽƌŝƐŶŽƚƐƵƉƉŽƌƚĞĚ͗dŝĞƚŽ'E͘ sEͺϭϭͺD>͕sW>ͺϭϭͺ͗ s'ƚƌĂŶƐůĂƚŽƌŝƐŶŽƚƐƵƉƉŽƌƚĞĚ͗dŝĞƚŽ'E͘ TRACE WIDTH >=15mil HCB1608KF-221T20_2A C383 2.2U/6.3V_4X C393 *0.1U/10V_4X AB10 AB11 AA11 AA9 AA10 C +3V L32 CORE S0 VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8 LDO_CAP VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8 VDDPL_11_DAC VDDAN_11_ML_1 VDDAN_11_ML_2 VDDAN_11_ML_3 VDDAN_11_ML_4 VDDIO_33_GBE_S VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9 VDDAN_11_SATA_10 GBE LAN C832 2.2U/6.3V_6X VDDPL_33_SYS VDDPL_33_DAC VDDPL_33_ML VDDAN_33_DAC VDDPL_33_SSUSB_S VDDPL_33_USB_S VDDPL_33_PCIE VDDPL_33_SATA T14 T17 T20 U16 U18 V14 V17 V20 Y17 TRACE WIDTH >=15mil VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2 VDDIO_GBE_S_1 VDDIO_GBE_S_2 R300 C478 C477 C490 0.1U/10V_4X 0.1U/10V_4X 1U/10V_4X C489 1U/10V_4X C498 C497 10U/6.3V_8X 1U/10V_4X TRACE WIDTH >=30mil C460 1U/10V_4X C459 1U/10V_4X C513 2.2U/6.3V_4X *0/short_8 C514 2.2U/6.3V_4X L42 HCB1608KF-181T15_1.5A +1.1V L29 HCB1608KF-181T15_1.5A +1.1V L30 HCB1608KF-181T15_1.5A +1.1V C442 C404 C484 C474 0.1U/10V_4X 0.1U/10V_4X 22U/6.3V_8X 1U/10V_4X +1.1V_PCIE_VDDR AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27 PCIE_VDDR--PCIE I/O power TRACE WIDTH >=100mil 1088mA C407 C445 C430 0.1U/10V_4X 0.1U/10V_4X 1U/10V_4X C415 1U/10V_4X C391 C398 22U/6.3V_8X 1U/10V_4X +1.1V_AVDD_SATA AVDD_SATA--SATA phy power TRACE WIDTH >=50mil 1337mA C467 1U/10V_4X C451 1U/10V_4X C472 C466 C412 C387 0.1U/10V_4X 0.1U/10V_4X 22U/6.3V_8X 1U/10V_4X HCB1608KF-221T20_2A L47 HCB1608KF-221T20_2A C520 C552 C540 C545 C519 0.1U/10V_4X 22U/6.3V_8X10U/6.3V_8X 10U/6.3V_8X 1U/10V_4X EMI EŽƚĞ͗ sEͺϯϯͺh^ͺ^͗ /Ĩ^ϱtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϯ͘ϯsͺ^ϱƌĂŝů͘ sZͺϭϭͺ^͕sEͺϭϭͺh^ͺ^͗ /Ĩ^ϱtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϭ͘ϭsͺ^ϱƌĂŝů͘ sZͺϭϭͺ^^h^ͺ^͕sEͺϭϭͺ^^h^ͺ^͗ /Ĩh^ϯ^ϱtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϭ͘ϭsͺ^ϱƌĂŝů͘ /Ĩh^ϯŝƐŶŽƚƵƐĞĚ͕ƚŝĞƚŽ'E͘ +1.1V_S5 HCB1608KF-221T20_2A HCB1608KF-221T20_2A C505 0.1U/10V_4X +FCH_VDD_11_SSUSB_S C518 C587 0.1U/10V_4X 10U/6.3V_8X R302 *0/short_8 +FCH_VDDAN_11_SSUSB_S_R R304 *0/short_8 +FCH_VDDCR_11_SSUSB_S C515 U3@10U/6.3V_8X R413 C510 U3@1U/10V_4X U2@0_4 TRACE WIDTH >=20mil U12 U13 140mA +FCH_VDDCR_11_USB_S TRACE WIDTH >=15mil L52 +1.1V_S5 L46 U3@HCB1608KF-221T20_2A B +FCH_VDDAN_11_USB_S C566 2.2U/6.3V_6X C504 0.1U/10V_4X C548 0.1U/10V_4X L49 +1.1V_S5 C525 1U/10V_4X C507 U3@0.1U/10V_4X C495 U3@0.1U/10V_4X C506 U3@1U/10V_4X P16 M14 N14 P13 P14 282mA N16 N17 P17 M17 424mA C485 U3@0.1U/10V_4X C493 U3@1U/10V_4X T12 T13 42mA VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12 3.3V_S5 I/O G7 H8 J8 K8 K9 M9 M10 N9 N10 M12 N12 M11 470mA VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8 VDDXL_33_S VDDAN_11_USB_S_1 VDDAN_11_USB_S_2 VDDCR_11_S_1 VDDCR_11_S_2 VDDCR_11_USB_S_1 VDDCR_11_USB_S_2 VDDPL_11_SYS_S VDDAN_33_HWM_S VDDAN_11_SSUSB_S_1 VDDAN_11_SSUSB_S_2 VDDAN_11_SSUSB_S_3 VDDAN_11_SSUSB_S_4 VDDAN_11_SSUSB_S_5 VDDCR_11_SSUSB_S_1 VDDCR_11_SSUSB_S_2 VDDCR_11_SSUSB_S_3 VDDCR_11_SSUSB_S_4 N18 L19 M18 V12 V13 Y12 Y13 W11 G24 TRACE WIDTH >=20mil +VDDIO_33_S 59mA 5mA +1.1V C527 C523 1U/10V_4X 1U/10V_4X +VDDCR_1.1V TRACE WIDTH >=15mil R353 *0/short_6 +1.1V_S5 *0/short_6 +3V_S5 фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ +VDDXL_3.3V 113mA L33 HCB1608KF-221T20_2A C420 *0.1U/10V_4X C386 2.2U/6.3V_6X C385 1U/10V_4X +3V_S5 A3 A33 B7 B13 D9 D13 E5 E12 E16 E29 F7 F9 F11 F13 F16 F17 F19 F23 F25 F29 G6 G16 G32 H12 H15 H29 J6 J9 J10 J13 J28 J32 K7 K16 K27 K28 L6 L12 L13 L15 L16 L21 M13 M16 M21 M25 N6 N11 N13 N23 N24 P12 P18 P20 P21 P31 P33 R4 R11 R25 R28 T11 T16 T18 N8 J24 70mA M8 12mA C473 1U/10V_4X +VDDPL_1.1V 09 C461 C456 1U/10V_4X 2.2U/6.3V_4X +VDDAN_3.3V_HWM фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ K25 H25 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 HUDSON-M3 Part 5 of 5 VSSAN_HWM VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSSPL_DAC VSSAN_DAC VSSANQ_DAC VSSIO_DAC VSSXL VSSPL_SYS EFUSE VDDIO_AZ_S AA4 26mA Trace width >=20 mil POWER T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33 D C T21 L28 K33 N28 R6 Hudson-M3 +VDDIO_AZ Hudson-M3 +1.1V_S5 C530 1U/10V_4X S5_1.1V--1.1V standby power N20 M20 R414 U2@0_4 C482 U3@0.1U/10V_4X R314 C503 C455 C521 C538 *0.1U/10V_4X 2.2U/6.3V_6X 2.2U/6.3V_6X 1U/10V_4X USB SS +3V_AVDD_USB TRACE WIDTH >=50mil +3V_S5 S5 plus mode S5_3.3--3.3v standby power C399 *0.1U/10V_4X USB C389 2.2U/6.3V_4X +1.1V CKVDD_1.1V-Internal clock Generator I/O power +1.1V_CKVDD 340mA H26 J25 K24 L22 M22 N21 N22 P22 AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19 TRACE WIDTH >=100mil 1007mA U2@0_4 V21 +3V_AVDD_USB PCI/GPIO I/O EŽƚĞ͗ sW>ͺϯϯͺ^^h^ͺ^͗ /Ĩh^ϯ^ϱtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϯ͘ϯsͺ^ϱƌĂŝů͘ /Ĩh^ϯŝƐŶŽƚƵƐĞĚ͕ƚŝĞƚŽ'E͘ sW>ͺϯϯͺh^ͺ^͗ /Ĩ^ϱtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϯ͘ϯsͺ^ϱƌĂŝů͘ CLKGEN I/O C512 C543 C491 C501 C494 C524 1U/10V_4X 1U/10V_4X 22U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X D HUDSON-M3 VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 Part 3 of 5 VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9 MAIN LINK PCI EXPRESS C541 1U/10V_4X AB17 AB18 AE9 AD10 AG7 AC13 AB12 AB13 AB14 AB16 фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ +1.1V_VCC_FCH_R SERIAL ATA C539 1U/10V_4X U3C 102mA *0/short_8 1 U3D VDD-- S/B CORE power +3.3V_FCH_R VDDQ--3.3V I/O power R299 2 PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE. фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ +3V 3 GROUND 5 EŽƚĞ͗ sy>ͺϯϯͺ^͗ /Ĩh^ϯtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϯ͘ϯsͺ^ϱƌĂŝů͘ KƚŚĞƌǁŝƐĞ͕ƚŝĞƚŽнϯ͘ϯsͺ^ϬƌĂŝů͘ sW>ͺϭϭͺ^z^ͺ^͗ /Ĩh^ϯ^ϱtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϭ͘ϭsͺ^ϱƌĂŝů͘ /ĨŽŶůLJh^^ϯtĂŬĞŝƐƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϭ͘ϭsͺ^ϯƌĂŝů͘ /Ĩh^tĂŬĞŝƐŶŽƚƐƵƉƉŽƌƚĞĚ͕ƚŝĞƚŽнϭ͘ϭsͺ^ϬƌĂŝů͘ s/Kͺͺ^͗ tĂŬĞŽŶZŝŶŐƐƵƉƉŽƌƚĞĚ͗dŝĞƚŽнϯ͘ϯͬϭ͘ϱsͺ^ϱ͘ tĂŬĞŽŶZŝŶŐŶŽƚƐƵƉƉŽƌƚĞĚ͗dŝĞƚŽнϯ͘ϯͬϭ͘ϱsͺ^Ϭ͘ B +VDDPL_1.1V +VDDIO_AZ +3V +3V_S5 R301 +3V_S5 *0/short_8 фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ C593 2.2U/6.3V_6X C448 *0.1U/10V_4X +VDDPL_3.3V +VDDAN_3.3V_HWM L36 U2@HCB1608KF-221T20_2A L35 U3@HCB1608KF-221T20_2A L40 HCB1608KF-221T20_2A L51 HCB1608KF-221T20_2A C427 2.2U/6.3V_6X C443 0.1U/10V_4X C570 2.2U/6.3V_6X C532 0.1U/10V_4X C437 2.2U/6.3V_6X C433 0.1U/10V_4X A A Quanta Computer Inc. PROJECT :BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A FCH 4/5(POWER) 5 4 3 2 1 Sheet 9 of 45 5 4 3 2 1 10 OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS. +3V +3V +3V +3V_S5 +3V_S5 +3V_S5 +3V_S5 STRAPS PINS D D R700 10K_4 (7) PCI_CLK1 (7) PCI_CLK3 (7) PCI_CLK4 (7) LPC_CLK0 (7) LPC_CLK1 (6) EC_PWM2 R702 *10K_4 R701 *10K_4 R617 *10K_4 R625 10K_4 R305 *10K_4 R663 10K_4 FCH POWER GOOD CIRCUIT PCI_CLK1 PCI_CLK3 PCI_CLK4 +3V_S5 LPC_CLK0 LPC_CLK1 EC_PWM2 C8 *0.1U/10V_4X RTC_CLK 5 (7,34) RTC_CLK WhƚŽнϯsͺ^ϱŝŶ&, R688 10K_4 R612 10K_4 R620 *10K_4 R306 2.2K_4 R672 *2.2K_4 1 EC_PWM2--> SPI ROM: 2.2-Kȍ 5% pull-down LPC ROM: Pull-up to 3.3V_S5. External pull-up resistor is not required as FCH has integrated 10-Kȍ pull-up to 3.3V_S5. CPU_COREPG (4,41) 4 U1 3 R690 10K_4 WhƚŽнϯsŝŶƉŽǁĞƌ/ 2 FCH_PWRGD (6) FCH_PWRGD R686 *10K_4 MPWROK MPWROK (34) WhƚŽнϯsWhŝŶ TC7SH08FU(F) C9 R6 100K_4 *0.1U/10V_4X C C Remove PCI_CLK2 function -------- REQUIRED STRAPS PULL HIGH PULL LOW -------- -------- PCI_CLK1 ALLOW PCIE Gen2 DEFAULT FORCE PCIE Gen1 PCI_CLK2 -------- -------- PCI_CLK3 USE DEBUG STRAP IGNORE DEBUG STRAP PCI_CLK4 non_Fusion CLOCK MODE LPC_CLK0 EC ENABLED LPC_CLK1 EC_PWM2 RTC_CLK CLKGEN ENABLED LPC ROM S5 PLUS MODE DISABLED DEFAULT FUSION CLOCK MODE EC DISABLED DEFAULT DEFAULT CLKGEN DISABLED DEFAULT SPI ROM S5 PLUS MODE ENABLED DEFAULT DEFAULT B B DEBUG STRAPS FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23] (7) PCI_AD27 (7) PCI_AD26 (7) PCI_AD25 (7) PCI_AD24 (7) PCI_AD23 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PULL HIGH PCI_AD23 R345 *2.2K_4 R401 *2.2K_4 R402 *2.2K_4 R351 *2.2K_4 R350 *2.2K_4 PULL LOW PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 USE PCI PLL DISABLE ILA AUTORUN USE FC PLL USE DEFAULT PCIE STRAPS DISABLE PCI MEM BOOT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT BYPASS PCI PLL ENABLE ILA AUTORUN BYPASS FC PLL USE EEPROM PCIE STRAPS ENABLE PCI MEM BOOT A A Quanta Computer Inc. PROJECT :BY7D Size Document Number Date: Monday, March 19, 2012 Rev 1A FCH 5/5(STRAP & PWRGD) 5 4 3 2 1 Sheet 10 of 45 1 11 H=4(DDR) M_A_DQ[0..63] (3,12) (3,12) (3,12) (3) (3) (3) (3) (3) (3) (3,12) (3,12) (3,12) (3,12) (3,12) 10K/F_4 10K/F_4 M_A_CKE0 R9875 *68_4 +3V R9877 R9878 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#2 M_A_CS#3 M_A_CLKP2 M_A_CLKN2 M_A_CLKP3 M_A_CLKN3 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# (6,12,33) SMB_RUN_CLK (6,12,33) SMB_RUN_DAT M_A_CKE1 (3) (3) *68_4 DIMM2_SA0 DIMM2_SA1 SMB_RUN_CLK SMB_RUN_DAT 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 11 28 46 63 136 153 170 187 M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 (3,12) M_A_DQSN[7:0] AMD suggestion for CLK glitch 12/29 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 M_A_ODT2 M_A_ODT3 (3,12) M_A_DM0 (3,12) M_A_DM1 (3,12) M_A_DM2 (3,12) M_A_DM3 (3,12) M_A_DM4 (3,12) M_A_DM5 (3,12) M_A_DM6 (3,12) M_A_DM7 (3,12) M_A_DQSP[7:0] R9879 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 PC2100 DDR3 SDRAM SO-DIMM (204P) JDIM1A (3,12) M_A_A[15:0] DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 (3,12) M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 +1.5VSUS 199 +3V +3V (3,12) M_A_EVENT# (3,12) M_A_RST# +SMDDR_VREF_DQ +SMDDR_VREF_CA R9876 JDIM1B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 2.48A *10K/F_4 77 122 125 198 30 +SMDDR_VREF_DQ +SMDDR_VREF_CA 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 PC2100 DDR3 SDRAM SO-DIMM (204P) DDR_STD VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VTT1 VTT2 GND GND 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 203 204 +SMDDR_VTERM 205 206 DDRSK-20401-TP4B DDRSK-20401-TP4B A A TERMINATOR DECOUPLING CAPACITOR 9.12A(VCC plane from source) +1.5VSUS +1.5VSUS +3V +SMDDR_VTERM C5688 C5689 C5690 C5691 C5692 C5693 10U/6.3V_8X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 2.2U/6.3V_6X 0.1U/10V_4X C5694 C5685 C5686 C5687 10U/6.3V_8X 10U/6.3V_8X 10U/6.3V_8X C5695 *C@0.1U/10V_4X +1.5VSUS EMI 01/07 C5697 C5698 C5699 10U/6.3V_8X 10U/6.3V_8X + C5696 +SMDDR_VREF_CA 10U/6.3V_8X *220U/2.5V_3528P_E35b +SMDDR_VREF_DQ C5700 C5701 C5702 1000P/50V_4X 0.1U/10V_4X 2.2U/6.3V_6X C5703 C5704 C5705 1000P/50V_4X 0.1U/10V_4X 2.2U/6.3V_6X Close to DIMM1 Quanta Computer Inc. Close to DIMM1 PROJECT : BY7D Size Document Number Date: Monday, March 19, 2012 Rev 1A DDRIII SODIMM1 1 Sheet 11 of 45 1 2 DDR_STD H=8(DDR) 3 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# (6,11,33) SMB_RUN_CLK (6,11,33) SMB_RUN_DAT (3) (3) 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 DIMM1_SA0 DIMM1_SA1 SMB_RUN_CLK SMB_RUN_DAT 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 M_A_ODT0 M_A_ODT1 11 28 46 63 136 153 170 187 (3,11) M_A_DM0 (3,11) M_A_DM1 (3,11) M_A_DM2 (3,11) M_A_DM3 (3,11) M_A_DM4 (3,11) M_A_DM5 (3,11) M_A_DM6 (3,11) M_A_DM7 (3,11) M_A_DQSP[7:0] M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 B (3,11) M_A_DQSN[7:0] 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 PC2100 DDR3 SDRAM SO-DIMM (204P) A M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 6 7 8 12 (3,11) +1.5VSUS JDIM2B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 2.48A 199 +3V R9880 +3V 77 122 125 *10K/F_4 198 30 (3,11) M_A_EVENT# (3,11) M_A_RST# +SMDDR_VREF_DQ +SMDDR_VREF_CA +SMDDR_VREF_DQ +SMDDR_VREF_CA 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 PC2100 DDR3 SDRAM SO-DIMM (204P) M_A_DQ[0..63] JDIM2A R9881 R9882 5 ф>ĂLJŽƵƚEŽƚĞх ůŽƐĞƚŽWh (3,11) M_A_A[15:0] (3,11) (3,11) (3,11) (3) (3) (3) (3) (3) (3) (3,11) (3,11) (3,11) (3,11) (3,11) 10K/F_4 10K/F_4 4 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VTT1 VTT2 GND GND 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 A 203 204 +SMDDR_VTERM 205 206 DDRSK-20401-TP8D B DDRSK-20401-TP8D 9.12A(VCC plane from source) TERMINATOR DECOUPLING CAPACITOR C C +1.5VSUS +SMDDR_VTERM +SMDDR_VREF_DQ +3V +SMDDR_VTERM C5715 C5709 C5710 C5711 C5712 C5713 C5714 10U/6.3V_8X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 2.2U/6.3V_6X 0.1U/10V_4X C5706 C5707 C5708 10U/6.3V_8X 10U/6.3V_8X 10U/6.3V_8X R9883 +SMDDR_VREF_CA *0_6 C5716 R9884 +SMDDR_VREF *0_6 +SMDDR_VREF 10U/6.3V_8X R9885 +1.5VSUS 1K_4 R9886 1K_4 +1.5VSUS R9887 1K_4 R9888 1K_4 +1.5VSUS 0.32uA(20mils) C5718 C5719 C5720 10U/6.3V_8X 10U/6.3V_8X + C5717 +SMDDR_VREF_DQ +SMDDR_VREF_CA C5721 1000P/50V_4X C5722 0.1U/10V_4X C5723 C5724 2.2U/6.3V_6X 1000P/50V_4X 10U/6.3V_8X *220U/2.5V_3528P_E35b C5726 C5725 0.1U/10V_4X Close to DIMM0 2.2U/6.3V_6X Close to DIMM0 D D Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Monday, March 19, 2012 Rev 1A DDRIII SODIMM2 1 2 3 4 5 6 7 Sheet 8 12 of 45 9*$! 13 U5000A PART 1 0F 9 (3) (3) PEG_TXP3 PEG_TXN3 (3) (3) PEG_TXP2 PEG_TXN2 (3) (3) PEG_TXP1 PEG_TXN1 (3) (3) PEG_TXP0 PEG_TXN0 PCIE_RX0P PCIE_TX0P PCIE_RX0N PCIE_TX0N Y35 W36 PCIE_RX1P PCIE_TX1P PCIE_RX1N PCIE_TX1N W38 V37 PCIE_RX2P PCIE_TX2P PCIE_RX2N PCIE_TX2N V35 U36 PCIE_RX3P PCIE_TX3P PCIE_RX3N PCIE_TX3N U38 T37 PCIE_RX4P PCIE_TX4P PCIE_RX4N PCIE_TX4N T35 R36 PCIE_RX5P PCIE_TX5P PCIE_RX5N PCIE_TX5N R38 P37 PCIE_RX6P PCIE_TX6P PCIE_RX6N PCIE_TX6N P35 N36 PCIE_RX7P PCIE_TX7P PCIE_RX7N PCIE_TX7N N38 M37 PCIE_RX8P PCIE_TX8P PCIE_RX8N PCIE_TX8N M35 L36 PCIE_RX9P L38 K37 PCIE_RX10P K35 J36 PCIE_RX11P PCIE_TX11P PCIE_RX11N PCIE_TX11N PEG_TXP3 PEG_TXN3 J38 H37 PCIE_RX12P PCIE_TX12P PCIE_RX12N PCIE_TX12N PEG_TXP2 PEG_TXN2 H35 G36 PCIE_RX13P PCIE_TX13P PCIE_RX13N PCIE_TX13N PEG_TXP1 PEG_TXN1 G38 F37 PCIE_RX14P PCIE_TX14P PCIE_RX14N PCIE_TX14N PEG_TXP0 PEG_TXN0 F35 E37 PCIE_RX15P PCIE_TX15P PCIE_RX15N PCIE_TX15N PCIE_RX9N PCIE_RX10N PCI EXPRESS INTERFACE AA38 Y37 PCIE_TX9P PCIE_TX9N PCIE_TX10P PCIE_TX10N Y33 Y32 Seymour Power-on sequence W33 W32 1 => +1V_GPU 2 => +3V_GPU 3 => +VGPU_CORE,+1.5V_GPU 4 => +1.8V_GPU U33 U32 U30 U29 T33 T32 PEG T30 T29 Intel platform: Lane0 ~ Lane15 Brazos platform: Lane12 ~ Lane15 Comal and Sabine platform: Lane8 ~Lane15 P33 P32 P30 P29 N33 N32 N30 N29 L33 L32 L30 L29 K33 K32 CPEG_RXP3 CPEG_RXN3 C5024 C5025 EV@0.1U/10V_4X EV@0.1U/10V_4X J33 J32 CPEG_RXP2 CPEG_RXN2 C5026 C5027 EV@0.1U/10V_4X EV@0.1U/10V_4X K30 K29 CPEG_RXP1 CPEG_RXN1 C5028 C5029 EV@0.1U/10V_4X EV@0.1U/10V_4X H33 CPEG_RXP0 H32 CPEG_RXN0 C5030 C5031 EV@0.1U/10V_4X EV@0.1U/10V_4X PEG_RXP3 (3) PEG_RXN3 (3) PEG_RXP2 (3) PEG_RXN2 (3) PEG_RXP1 (3) PEG_RXN1 (3) PEG_RXP0 (3) PEG_RXN0 (3) CLOCK AB35 AA36 (7) CLK_PCIE_VGAP (7) CLK_PCIE_VGAN PCIE_REFCLKP PCIE_REFCLKN CALIBRATION (7) PERST#_BUF R5000 EV@10K_4 AH16 TEST_PG R5037 EV@0_4 AA30 PERSTB PCIE_CALR_TX Y30 R5001 EV@1.27K/F_4 PCIE_CALR_RX Y29 R5002 EV@2K/F_4 +1V_GPU Quanta Computer Inc. EV@HEATHROW M2 PROJECT : BY7D Size Document Number Rev 1A Seymour_M2/ PEG*16 Date: Wednesday, March 21, 2012 Sheet 13 of 45 9*$! 14 U5000B PART 2 0F 9 MUTI GFX (16) GENIL_CLK (16) GENIL_VSYNC AD29 AC29 GENLK_CLK TXCAP_DPA3P GENLK_VSYNC TXCAM_DPA3N AJ21 AK21 SWAPLOCKA TX0P_DPA2P TX0M_DPA2N DPA SWAPLOCKB TX1P_DPA1P TX1M_DPA1N (16) (16) (16) (16) AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12 RAM_STRAP0 RAM_STRAP1 RAM_STRAP2 RAM_STRAP3 1.8V GPIO +3V_GPU R5005 R5004 EV@10K/F_4 EV@10K/F_4 DVPCNTL_MVP_0 TX2P_DPA0P DVPCNTL_MVP_1 TX2M_DPA0N DVPCNTL_1 TXCBP_DPB3P DVPCNTL_2 TXCBM_DPB3N TX3P_DPB2P DVPDATA_1 TX3M_DPB2N DPB DVPDATA_2 DVPDATA_3 TX4P_DPB1P DVPDATA_4 TX4M_DPB1N DVPDATA_6 TX5P_DPB0P DVPDATA_7 TX5M_DPB0N DVPDATA_9 TXCCP_DPC3P DVPDATA_10 EV@10K/F_4 EV@10K/F_4 GPU_SCL GPU_SDA AK26 AJ26 TXCCM_DPC3N DVPDATA_12 TX0P_DPC2P DVPDATA_13 TX0M_DPC2N DVPDATA_14 DPC DVPDATA_15 TX1P_DPC1P DVPDATA_16 TX1M_DPC1N DVPDATA_18 TX2P_DPC0P DVPDATA_19 TX2M_DPC0N DVPDATA_21 TXCDP_DPD3P DVPDATA_22 EV@10K_4 R218 EV@0_4 (16) GPU_GPIO8 (16) GPU_GPIO9 (16) GPU_GPIO10 (16) GPU_GPIO11 (16) GPU_GPIO12 (16) GPU_GPIO13 (4,37) SYS_SHDN# 3 (42) GFX_CORE_CNTRL0 T5003 Q24 2 GPIO_19_CTF (42) GFX_CORE_CNTRL1 (16) GPU_GPIO21 (16) GPU_GPIO22 *ME2N7002E_200MA 1 R226 *EV@100K_4 TXCDM_DPD3N DPD SMBCLK TX4P_DPD1P SMBus SMBDATA TX4M_DPD1N SCL SDA AVSSN#1 AH20 AH18 AN16 GPIO_0 AH17 AJ17 AK17 AJ13 AH15 AJ16 AK16 AL16 AM16 AM14 AM13 AK14 AG30 AN14 AM17 AL13 AJ14 AK13 AN13 GPIO_5_AC_BATT AG32 AG33 GPIO_29 NC#7 GPIO_30 NC#8 AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24 GENERICA AC30 CEC_1 AK24 HPD1 AH13 VREFG GPIO_1 G GPIO_2 AVSSN#2 GPIO_6 GPIO_7_BLON AVSSN#3 DAC1 GPIO_8_ROMSO (25) EXT_HDMI_HPD GPU_VREFG R5015 EV@249/F_4 C5038 Wyͺ E͗ůĞĂǀĞƵŶĐŽŶŶĞĐƚĞĚŝĨŶŽƚƵƐĞĚ͘ ;ĚŽĞƐŶΖƚƐƵƉƉŽƌƚƐǁŝƚĐŚͲĂďůĞŐƌĂƉŚŝĐƐͿ EV@0.1U/10V_4X GPIO_11 EV@1K_4 GPIO_13 GPIO_14_HPD2 R5019 (30) EXT_CRT_GRE (30) EXT_CRT_BLU (30) AF37 AE38 AB34 R5011 AD34 AE34 AVDD AC33 AC34 VDD1DI EXT_CRT_HSYNC EXT_CRT_VSYNC (16,30) (16,30) R495 EV@150/F_4 R497 EV@150/F_4 R498 EV@150/F_4 EV@499/F_4 +1.8V_GPU DAC1 Analog Power VDD1DI GPIO_17_THERMAL_INT VSS1DI 1.8V@18mA AVDD GPIO_18_HPD3 L5000 EV@BLM15BD121SN1D_300MA GPIO_19_CTF GPIO_20_PWRCNTL_1 NC#1 GPIO_21 NC#2 GPIO_22_ROMCSB NC#3 CLKREQB NC#4 T5006 T5007 T5008 T5010 T5011 T5012 T5014 T5016 T5017 V13 U13 AC31 AD30 AC32 AD32 AF32 AA29 AG21 C5032 EV@0.1U/10V_4X C5033 EV@1U/6.3V_4X C5034 EV@4.7U/6.3V_6X DAC1 Digital Power 1.8V@117mA VDD1DI GENERICB L5001 EV@BLM15BD121SN1D_300MA GENERICC GENERICD GENERICE_HPD4 NC_TSVSSQ AF33 R5012 EV@0_4 NC_TSVSSQ should be tied to GND on Thames/Whistler/Seymour PS_0 AM34 R5013 EV@0_4 PS_0 should be tied to GND on Thames/Whistler/Seymour PS_1 AD31 PS_2 AG31 PS_3 AD33 GENERICF_HPD5 C5035 EV@0.1U/10V_4X C5036 EV@1U/6.3V_4X C5037 EV@4.7U/6.3V_6X GENERICG_HPD6 MLPS PS_1,PS_2, PS_3 are NC on Thames/Whistler/Seymour BACO AL21 PX_EN AD28 TESTEN DDC/AUX DDC1CLK AUX1N AM23 AN23 AK23 AL24 AM24 JTAG_TRSTB DDC2CLK JTAG_TDI DDC2DATA JTAG_TMS AUX2P JTAG_TDO AUX2N DDCCLK_AUX3P AF29 AG29 AM26 AN26 AM27 AL27 AM19 AL19 DDCCLK_AUX1P (25) DDCDATA_AUX1N (25) DDCCLK_AUX4P DPLUS DDCDATA_AUX4N HDMI T5001 T5036 EXT_CRT_DDCCLK EXT_CRT_DDCDAT (30) (30) JTAG_TCK DDCDATA_AUX3N CRT AN20 AM20 AL30 AM30 T5000 T5035 AL29 AM29 T5002 T5038 DMINUS DDCCLK_AUX5P DDCDATA_AUX5N +3V_GPU PU:Disable MLPS PD:Enable MLPS EXT_CRT_RED AE36 AD35 AVDD GPIO_16 THERMAL T5037 T5039 AD39 AD37 GPIO_15_PWRCNTL_0 *EV@5.11K/F_4 T5063 T5064 T5065 T5066 T5067 ф>ĂLJŽƵƚEŽƚĞх 'ƌŽƵŶĚĞĚƌŝŐŚƚĂǁĂLJ͘ Dh^dEKdďĞĐŽŶŶĞĐƚĞĚƚŽs^^Y AT23 AR22 RSET AVSSQ AUX1P +3V_GPU AU22 AV21 VSYNC DDC1DATA R5018 AT21 AR20 GPIO_12 DEBUG ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽĐŚŝƉ AU20 AT19 GPIO_10_ROMSCK +1.8V_GPU R5014 EV@499/F_4 AT17 AR16 GPIO_9_ROMSI NC#9 T5024 AU16 AV15 AC36 AC38 HSYNC NC#6 (16) GPU_GENERICC AT15 AR14 I2C NC#5 T5013 T5015 AU14 AV13 DVPDATA_23 B (30) LVDS_BRIGHT R5133 AT33 AU32 DVPDATA_20 R GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 AR32 AT31 DVPDATA_17 GENERAL PURPOSE I/O (16) (16) (16) AV31 AU30 DVPDATA_11 TX5M_DPD0N R5006 R5007 EXT_HDMITX2P (25) EXT_HDMITX2N (25) AR30 AT29 DVPDATA_8 TX5P_DPD0P +3V_GPU EXT_HDMITX1P (25) EXT_HDMITX1N (25) AT27 AR26 DVPDATA_5 TX3M_DPD2N AJ23 AH23 EXT_HDMITX0P (25) EXT_HDMITX0N (25) AU26 AV25 DVPCLK DVPDATA_0 TX3P_DPD2P Tempeature function: Connect to EC GPU_SMBCLK GPU_SMBDAT EXT_HDMICLK+ (25) EXT_HDMICLK- (25) AT25 AR24 DVPCNTL_0 GPU_SMBCLK GPU_SMBDAT (32) GPU_SMBCLK (32) GPU_SMBDAT AU24 AV23 R5020 EV@10K/F_4 AK32 GPIO_28_FDO R5021 *EV@10K/F_4 AL31 TS_A DDCCLK_AUX6P DDCDATA_AUX6N AN21 AM21 AK30 AK29 Pin AL29,AM29,AK29,AK30 is NC on Seymour 1.8V@8mA DDCVGACLK +1.8V_GPU L5002 TSVDD EV@BLM15BD121SN1D_300MA on-die thermal sensor power C5039 C5040 C5041 EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X AJ32 AJ33 TSVDD DDCVGADATA AJ30 AJ31 EV_LCD_EDIDCLK (30) EV_LCD_EDIDDATA (30) LVDS Quanta Computer Inc. TSVSS PROJECT : BY7D EV@HEATHROW M2 Size Document Number Date: Wednesday, March 21, 2012 Rev 1A Seymour_M2/ GPIO_DP_CRT_I2C Sheet 14 of 45 9*$! 15 Display phase-locked loop power. 1.8V@75mA Dedicated analog power pin for the display and DISPCLK PLLs. +1.8V_GPU L5003 DPLL_PVDD EV@PBY160808T-501Y-N_1.2A C5042 C5043 EV@4.7U/6.3V_6X DPE/DPF/LVDS C5044 EV@1U/6.3V_4X U5000I EV@0.1U/10V_4X U5000G PART 9 0F 9 PART 7 0F 9 R5022 VARY_BL LVDS CONTROL DPLL_VDDC EV@PBY160808T-501Y-N_1.2A C5046 C5047 EV@4.7U/6.3V_6X AM32 DPLL_PVDD AN31 DPLL_VDDC AN32 DPLL_PVSS XTALIN AV33 GPU_XTALIN C5045 R5024 EV@1M/F_4 C5048 EV@1U/6.3V_4X EV@27P/50V_4N EV@0.1U/10V_4X R5023 Y5000 EV@27MHZ_20 TXCLK_UP_DPF3P TXCLK_UN_DPF3N TXOUT_U0P_DPF2P XTALOUT AU34 GPU_XTALOUT R5025 EV@0_4 C5049 EV@27P/50V_4N TXOUT_U0N_DPF2N TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N Memory phase-locked loop power. 1.8V@150mA Dedicated analog power pin for the memory PLLs. H7 H8 L5005 MPLL_PVDD TXOUT_U2P_DPF0P MPLL_PVDD EV@PBY160808T-501Y-N_1.2A XO_IN EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X AM10 SPLL_PVDD AN9 SPLL_VDDC TXOUT_U3N LVTMDP C5052 PLLS/XTAL C5051 XO_IN2 TXCLK_LN_DPE3N 1.8V@75mA +1.8V_GPU L5006 AN10 SPLL_PVSS TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N SPLL_PVDD EV@BLM15BD121SN1D_300MA TXOUT_L1P_DPE1P CLKTESTA C5053 C5054 C5055 EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X AF30 AF31 AJ38 AK37 AH35 AJ36 NC_XTAL_PVDD CLKTESTB AK10 AL10 AG38 AH37 AF35 AG36 T5041 AW35 TXCLK_LP_DPE3P Engine phase-locked loop power. Dedicated analog power pin for the engine and UVD PLLs. AK35 AL36 T5040 AW34 TXOUT_U3P C5050 EV@10K/F_4 MPLL_PVDD TXOUT_U2N_DPF0N +1.8V_GPU EXT_DPST_PWM (30) EV_LVDS_DIGON (30) 2 L5004 DIGON 1 1V@140mA +1V_GPU Display phase-locked loop power. Dedicated digital power pin for the display PLLs. EV@10K/F_4 AK27 AJ27 CLKTESTA CLKTESTB TXOUT_L1N_DPE1N NC_XTAL_PVSS TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N C5056 *EV@0.1U/10V_4X C5057 *EV@0.1U/10V_4X TXOUT_L3P TXOUT_L3N AP34 AR34 EV_LCD_TXLCLKOUT+ (30) EV_LCD_TXLCLKOUT- (30) AW37 AU35 EV_LCD_TXLOUT0+ (30) EV_LCD_TXLOUT0- (30) AR37 AU39 EV_LCD_TXLOUT1+ (30) EV_LCD_TXLOUT1- (30) AP35 AR35 EV_LCD_TXLOUT2+ (30) EV_LCD_TXLOUT2- (30) AN36 AP37 Engine phase-locked loop power. 1V@150mADedicated digital power pin for the engine and UVD PLLs. +1V_GPU L5007 EV@PBY160808T-501Y-N_1.2A EV@HEATHROW M2 R5026 *EV@51.1/F_4 SPLL_VDDC C5058 C5059 C5060 EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X DPLL_PVDD R5028 *EV@0_4 R5029 *EV@0_4 R5027 *EV@51.1/F_4 EV@HEATHROW M2 Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev 1A Seymour_M2/ XTAL_LVDS Date: Wednesday, March 21, 2012 Sheet 15 of 45 9*$! (14) RAM_STRAP0 +3V_GPU (14) GPU_GPIO0 (14) GPU_GPIO1 (14) GPU_GPIO2 (14) GPU_GPIO9 (14) GPU_GPIO11 (14) GPU_GPIO12 (14) GPU_GPIO13 (14) GPU_GPIO22 (14) GENIL_VSYNC (14,30) EXT_CRT_HSYNC (14,30) EXT_CRT_VSYNC (14) GENIL_CLK (14) GPU_GPIO8 (14) GPU_GPIO21 (14) GPU_GENERICC (14) GPU_GPIO10 R5030 EV@10K/F_4 R5031 EV@10K/F_4 R5032 *EV@10K/F_4 R5033 *EV@10K/F_4 R5034 EV@10K/F_4 R5035 *EV@10K/F_4 R5047 Sam@10K/F_4 R5137 AMD@10K/F_4 R5049 AMD@10K/F_4 R5050 Sam@10K/F_4 16 +1.8V_GPU CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET (14) RAM_STRAP1 (14) RAM_STRAP2 +1.8V_GPU R5051 2G@10K/F_4 +1.8V_GPU R5134 1GCA@10K/F_4 +1.8V_GPU R5036 *EV@10K/F_4 R5038 *EV@10K/F_4 R5039 *EV@10K/F_4 R5052 512M@10K/F_4 R500 EV@10K/F_4 R5135 1GEB@10K/F_4 R499 EV@10K/F_4 R5043 *EV@10K/F_4 R5044 *EV@10K/F_4 R5053 1GEB@10K/F_4 +1.8V_GPU R5045 *EV@10K/F_4 R5138 2G@10K/F_4 +1.8V_GPU R5046 *EV@10K/F_4 R5054 512M@10K/F_4 R5145 *EV@10K/F_4 R5152 1GCA@10K/F_4 (14) RAM_STRAP3 MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour 0: Enable MLPS, disable GPIO PINSTRAP 1: Disable MLPS, enable GPIO PINSTRAP TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable 0: 50% Tx output swing 1: Full Tx output swing TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable 0: Tx de-emphasis disabled 1: Tx de-emphasis enabled X BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 0: GEN3 not supported at power-on 1: GEN3 supported at power-on 1 BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0: VGA controller capacity enabled 1: VGA controller capacity disabled (for multi-GPU) 0 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] BIOS_ROM_EN PS_2[3] AUD[1] AUD[0] NA NA STN B/S P/N Vendor P/N K4W1G1646G-BC11 (64M*16) AKD5EGGT500 K4W2G1646C-HC11 (128M*16,C-die) Size *4 RAM_STRAP3 RAM_STRAP2 DVPDATA_3 DVPDATA_2 RAM_STRAP1 RAM_STRAP0 DVPDATA_1 DVPDATA_0 512MB 0 0 0 1 AKD5MGWT500 * 4 1GB 0 1 0 1 K4W2G1646E-HC11 (128M*16,E-die) AKD5MGWT500 * 4 1GB 1 0 0 1 K4W2G1646C-HC11 (128M*16) AKD5MGWT500 * 8 2GB 1 1 0 1 512MB 0 0 1 0 Samsung 23EY2387MC11 (64M*16) 23EY4187MA11 (128M*16,A-die) AKD5EZWT700 AKD5DZWT700 *4 *4 23EY4187MB11 (128M*16,B-die) TBD 23EY4187MA11 (128M*16) AKD5DZWT700 *4 *8 X Serial ROM type or Memory Aperture Size Select XXX GPIO22 Enable external BIOS ROM device 0: Disabled 1: Enabled X HSYNC VSYNC 00 - No audio function 01 - Audio for DP only 10 - Audio for DP and HDMI if dongle is detected 11 - Audio for both DP and HDMI HDMI must only be enabled on systems that are legally entitled. It is the responsibility of the system designer to ensure that the system is entitled to support this feature. XX Enable CEC function. Reserved for Thames/Whistler/Seymour 0: Disabled 1: Enabled CEC_DIS PS_0[4] GENLK_VSYNC RESERVED RESERVED RESERVED RESERVED PS_1[3] PS_1[2] NA NA GENLK_CLK GPIO8 GPIO21 GENERICC X NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET AUD_PORT_CONN_PINSTRAP[2] PS_3[5] AUD_PORT_CONN_PINSTRAP[1] PS_3[4] AUD_PORT_CONN_PINSTRAP[0] PS_0[5] NA NA NA 0 0 0 0 Reserved Reserved Reserved Reserved (for Thames/Whistler/Seymour only) XXX STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS 111 = 0 usable endpoints 110 = 1 usable endpoints 101 = 2 usable endpoints 100 = 3 usable endpoints 011 = 4 usable endpoints 010 = 5 usable endpoints 001 = 6 usable endpoints 000 = all endpoints are usable System Memory Aperture size 1GB 0 1 1 0 GPIO9 1GB 1 0 1 0 2GB 1 1 1 0 0 0 0 0 AMD X If GPIO22 = 0, defines memory aperture size If GPIO22 = 1, defines ROM type 100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST) 101 - 2Mbit M25P20 (ST) 101 - 4Mbit M25P40 (ST) 101 - 8Mbit M25P80 (ST) 100 - 512Kbit Pm25LV512 (Chingis) 101 - 1Mbit Pm25LV010 (Chingis) DDR3 Memory TYPE Vendor Default Setting STRAPS EEPROM GPIO13 GPIO12 GPIO11 BIOSROM ROMIDCFG2 128M 256M 64M 32M 0 0 0 0 ROMIDCFG1 0 0 1 1 ROMIDCFG0 0 1 0 1 Quanta Computer Inc. PROJECT : BY7D Size Document Number Seymour_M2/ STRAPS_Thermal Date: Monday, March 19, 2012 Sheet 16 of 45 Rev 1A 9*$! 17 U5000E PCIe IO power. +1.8V_GPU PART 5 0F 9 +1.5V_GPU (1.8V@440mA) (1.5V@2.2A / DDR3 128bits 900MHz) C5080 EV@0.1U/10V_4X C5088 EV@0.1U/10V_4X C5084 EV@1U/6.3V_4X C5072 EV@1U/6.3V_4X C5081 EV@0.1U/10V_4X C5089 EV@0.1U/10V_4X C5065 EV@4.7U/6.3V_6X C5073 EV@1U/6.3V_4X C5082 EV@0.1U/10V_4X C5090 EV@0.1U/10V_4X C5074 EV@1U/6.3V_4X C5085 EV@1U/6.3V_4X C5075 EV@1U/6.3V_4X C5083 EV@0.1U/10V_4X C5091 EV@0.1U/10V_4X VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_BIF_VDDC VDDR1 NC_BIF_VDDC VDDR1 PCIE_PVDD VDDR1 VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 VDDR1 BACO BIF_VDDC BIF_VDDC VDDR1 CORE VDDR1 VDDC VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDC VDDC VDDC_CT EV@BLM15BD121SN1D_300MA C5099 EV@4.7U/6.3V_6X I/O power for 3.3-V pins, such as GPIOs. C5100 EV@1U/6.3V_4X C5101 EV@0.1U/10V_4X AF26 AF27 AG26 AG27 LEVEL TRANSLATION VDDC VDD_CT VDDC VDD_CT VDDC VDD_CT VDDC VDD_CT VDDC VDDC VDDC VDDC +3V_GPU (3.3V@60mA) L5010 I/O VDDR3 EV@FCM1005KF-221T03_300MA C5112 EV@4.7U/6.3V_6X AF23 AF24 AG23 AG24 C5113 EV@1U/6.3V_4X C5114 EV@1U/6.3V_4X VDDC VDDR3 VDDC VDDR3 VDDC VDDR3 VDDC VDDR3 VDDC VDDC DVP AD12 AF11 AF12 AF13 Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO. (1.8V@170mA) VDDC VDDR4 VDDC L5011 VDDR4 VDDC VDDR4 VDDC VDDR4 EV@FCM1005KF-221T03_300MA C5125 EV@4.7U/6.3V_6X C5126 EV@1U/6.3V_4X VDDC AF15 AG11 AG13 AG15 C5127 EV@0.1U/10V_4X VDDR4 VDDC VDDR4 VDDC VDDR4 VDDC VDDR4 VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI ф>ĂLJŽƵƚEŽƚĞх ƌŽƵƚĞĂƐĚŝĨĨĞƌƚŝĂůƉĂŝƌ͘ (42) VCORE_VCCSSENSE VDDCI VDDCI VOLTAGE SENESE R9532 EV@0_4 AF28 FB_VDDC AG28 FB_VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI (42) VCORE_VSSSENSE R9533 EV@0_4 AH29 C5069 EV@1U/6.3V_4X C5070 EV@4.7U/6.3V_6X PCIe digital power supply. C5076 EV@1U/6.3V_4X C5077 EV@1U/6.3V_4X +VGPU_CORE C5092 EV@1U/6.3V_4X +1V_GPU C5079 EV@1U/6.3V_4X C5086 EV@1U/6.3V_4X C5087 EV@4.7U/6.3V_6X EŽŶͲKĚĞƐŝŐŶ ;zϳĚŽĞƐŶΖƚƐƵƉƉŽƌƚƐǁŝƚĐŚͲĂďůĞŐƌĂƉŚŝĐƐͿ N27 T27 AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 C5078 EV@1U/6.3V_4X EV@HCB1608KF-181T15_1.5A C5093 EV@4.7U/6.3V_6X Separate core power for the PCIe bus logic. In non-BACO designs, connect to VDDC. In BACO designs, must be the same voltage as VDDC when the GPU is operating, Dedicated core power, provides power to the internal logic. +VGPU_CORE (0.9~1V@30A) C5094 EV@1U/6.3V_4X C5095 EV@1U/6.3V_4X C5096 EV@1U/6.3V_4X C5097 EV@1U/6.3V_4X C5098 EV@1U/6.3V_4X C5102 EV@1U/6.3V_4X C5103 EV@1U/6.3V_4X C5104 EV@1U/6.3V_4X C5105 EV@1U/6.3V_4X C5106 EV@1U/6.3V_4X C5107 EV@1U/6.3V_4X C5108 EV@1U/6.3V_4X C5109 EV@1U/6.3V_4X C5110 EV@1U/6.3V_4X C5111 EV@1U/6.3V_4X C5115 EV@4.7U/6.3V_6X C5116 EV@4.7U/6.3V_6X C5117 EV@4.7U/6.3V_6X C5118 EV@4.7U/6.3V_6X C5119 EV@4.7U/6.3V_6X C5120 EV@4.7U/6.3V_6X C5121 EV@4.7U/6.3V_6X C5122 EV@4.7U/6.3V_6X C5123 EV@4.7U/6.3V_6X C5124 EV@4.7U/6.3V_6X VDDR4 VDDC +1.8V_GPU G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28 VDDR1 VDDC (1.8V@17mA) C5066 C5067 C5068 EV@0.1U/10V_4X EV@0.1U/10V_4X EV@1U/6.3V_4X VDDR1 VDDC L5009 L5008 VDDR1 Level translation between core and I/O, excluding memory receivers. +1.8V_GPU PCIE_VDDR AA31 AA32 AA33 AA34 W30 Y31 V28 W29 AB37 VDDR1 ISOLATED CORE I/O C5071 EV@1U/6.3V_4X AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7 PCIE C5062 C5063 C5064 EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X MEM I/O FB_GND VDDCI VDDCI VDDCI VDDCI VDDCI AH22 AH27 AH28 M26 N24 R18 R21 R23 R26 T17 T20 T22 T24 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13 Isolated (clean) core power for the l/O logic. (0.9V~1V@3.8A / DDR3 128bits 900MHz) VDDCI +VGPU_CORE L5012 EV@HCB1608KF-121T30_3A L5013 EV@HCB1608KF-121T30_3A C5128 EV@1U/6.3V_4X C5129 EV@1U/6.3V_4X C5130 EV@1U/6.3V_4X C5131 EV@1U/6.3V_4X C5132 EV@4.7U/6.3V_6X C5133 EV@4.7U/6.3V_6X C5134 EV@4.7U/6.3V_6X C5135 EV@1U/6.3V_4X C5136 EV@1U/6.3V_4X C5137 EV@1U/6.3V_4X Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev 1A Seymour_M2/ MainPower EV@HEATHROW M2 Date: Wednesday, March 21, 2012 Sheet 17 of 45 18 9*$! For Thames/Whistler/Seymour For Thames/Whistler/Seymour a dedicated BEAD is required a dedicated BEAD is required for each DPAB_VDD10, DPCD_VDD10, DPEF_VDD10 for each DPAB_VDD18, DPCD_VDD18, DPEF_VDD18 DP/TMDS/LVDS Transmitter Power 0.935V@222mA per port U5000H (1V@222mA) PART 8 0F 9 DP_VDDR DPAB_VDD10 DP_VDDC DP/TMDS/LVDS Transmitter Power DP_VDDC DP_VDDC DP mode: 1.8V@188mA per port HDMI mode: 1.8V@237mA per port DP_VDDC DP_VDDC (1.8V@237mA) +1.8V_GPU L5015 EV@PBY160808T-501Y-N_1.2A C5138 EV@4.7U/6.3V_6X DPAB_VDD18 C5139 EV@1U/6.3V_4X +1.8V_GPU L5018 EV@PBY160808T-501Y-N_1.2A C5150 EV@4.7U/6.3V_6X DPCD_VDD18 C5151 EV@1U/6.3V_4X C5152 EV@0.1U/10V_4X (1.8V@237mA) +1.8V_GPU L5019 DPEF_VDD18 EV@PBY160808T-501Y-N_1.2A DP_VDDR AP20 AP21 AP22 AP23 AU18 AV19 DP_VDDR DP_VDDC DP_VDDR DP_VDDC AH34 AJ34 AF34 AG34 AM37 AL38 DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDC DP_VDDC DP_VDDR DP GND DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR CALIBRATION DP_VSSR DP_VSSR DP_VSSR DPAB_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR R5058 EV@150/F_4 AW18 DPCD_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR R5059 EV@150/F_4 AM39 EV@1U/6.3V_4X EV@0.1U/10V_4X DPCD_VDD10 AL33 AM33 AK33 AK34 DP_VDDR DP_VSSR AW28 EV@4.7U/6.3V_6X +1V_GPU L5016 EV@PBY160808T-501Y-N_1.2A C5144 C5145 C5146 EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X +1V_GPU (1V@222mA) L5017 EV@PBY160808T-501Y-N_1.2A +1V_GPU DP_VDDR DP_VSSR EV@150/F_4 C5143 DPEF_VDD10 C5155 EV@0.1U/10V_4X R5057 AP13 AT13 AP14 AP15 DP_VDDR DP_VSSR C5154 EV@1U/6.3V_4X C5142 DP_VDDR DP_VSSR C5153 EV@4.7U/6.3V_6X EV@PBY160808T-501Y-N_1.2A C5141 (1V@222mA) AN24 AP24 AP25 AP26 AU28 AV29 C5140 EV@0.1U/10V_4X (1.8V@237mA) AP31 AP32 AN33 AP33 L5014 DPEF_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR C5147 C5148 C5149 EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X AN27 AP27 AP28 AW24 AW26 AN29 AP29 AP30 AW30 AW32 AN17 AP16 AP17 AW14 AW16 AN19 AP18 AP19 AW20 AW22 AN34 AP39 AR39 AU37 AF39 AH39 AK39 AL34 AV27 AR28 AV17 AR18 AN38 AM35 EV@HEATHROW M2 Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev 1A Seymour_M2/ DP_Powers Date: Wednesday, March 21, 2012 Sheet 18 of 45 9*$! 19 U5000F PART 6 0F 9 AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39 PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND GND GND GND GND GND GND GND F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VSS_MECH GND VSS_MECH GND VSS_MECH A39 AW1 AW39 EV@HEATHROW M2 Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev 1A Seymour_M2/ GND Date: Wednesday, March 21, 2012 Sheet 19 of 45 9*$! (22) VMB_DM[7..0] U5000C (22) VMB_RDQS[7..0] PART 3 0F 9 VMA_DQ[63..0] VMA_RDQS[7..0] (21) VMA_RDQS[7..0] VMA_WDQS[7..0] (21) VMA_WDQS[7..0] VMA_MA[14..0] (21) VMA_MA[14..0] (21) (21) (21) VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63 VMA_DM[7..0] (21) VMA_DM[7..0] VMA_BA0 VMA_BA1 VMA_BA2 VMA_BA0 VMA_BA1 VMA_BA2 Place MVREF dividers and Caps close to ASIC +1.5V_GPU (0.7*VDDR1) Ra (22) VMB_WDQS[7..0] GDDR5/DDR3 R5060 EV@40.2/F_4 C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5 DQA0_0 MAA0_0/MAA_0 DQA0_1 MAA0_1/MAA_1 DQA0_2 MAA0_2/MAA_2 DQA0_3 MAA0_3/MAA_3 DQA0_4 MAA0_4/MAA_4 DQA0_5 MAA0_5/MAA_5 DQA0_6 MAA0_6/MAA_6 DQA0_7 MAA0_7/MAA_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 MEMORY INTERFACE A (21) VMA_DQ[63..0] MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_BA2 MAA1_6/MAA_BA0 MAA1_7/MAA_BA1 G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1 A32 C32 D23 E22 C14 A14 E10 D9 VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7 (22) VMB_MA[14..0] (22) (22) (22) VMB_BA0 VMB_BA1 VMB_BA2 DQA0_16 DQA0_17 WCKA0_0/DQMA_0 DQA0_18 WCKA0B_0/DQMA_1 DQA0_19 WCKA0_1/DQMA_2 DQA0_20 WCKA0B_1/DQMA_3 DQA0_21 WCKA1_0/DQMA_4 DQA0_22 WCKA1B_0/DQMA_5 DQA0_23 WCKA1_1/DQMA_6 DQA0_24 WCKA1B_1/DQMA_7 DQA0_25 DQA0_26 EDCA0_0/QSA_0 DQA0_27 EDCA0_1/QSA_1 DQA0_28 EDCA0_2/QSA_2 DQA0_29 EDCA0_3/QSA_3 DQA0_30 EDCA1_0/QSA_4 DQA0_31 EDCA1_1/QSA_5 DQA1_0 EDCA1_2/QSA_6 DQA1_1 EDCA1_3/QSA_7 C34 D29 D25 E20 E16 E12 J10 D7 VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7 A34 E30 E26 C20 C16 C12 J11 F8 VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7 DQA1_2 DQA1_3 DDBIA0_0/QSA_0B DQA1_4 DDBIA0_1/QSA_1B DQA1_5 DDBIA0_2/QSA_2B DQA1_6 DDBIA0_3/QSA_3B DQA1_7 DDBIA1_0/QSA_4B DQA1_8 DDBIA1_1/QSA_5B DQA1_9 DDBIA1_2/QSA_6B DQA1_10 DDBIA1_3/QSA_7B DQA1_11 DQA1_12 ADBIA0/ODTA0 DQA1_13 ADBIA1/ODTA1 J21 G19 VMA_ODT0 (21) VMA_ODT1 (21) DQA1_14 DQA1_15 CLKA0 DQA1_16 CLKA0B H27 VMA_CLK0 G27 VMA_CLK0# VMA_CLK0 (21) VMA_CLK0# (21) DQA1_17 DQA1_18 CLKA1 DQA1_19 CLKA1B J14 VMA_CLK1 H14 VMA_CLK1# VMA_CLK1 (21) VMA_CLK1# (21) DQA1_20 DQA1_21 RASA0B DQA1_22 RASA1B K23 VMA_RAS0# K19 VMA_RAS1# VMA_RAS0# VMA_RAS1# (21) (21) Place MVREF dividers and Caps close to ASIC DQA1_23 DQA1_24 CASA0B DQA1_25 CASA1B K20 VMA_CAS0# K17 VMA_CAS1# VMA_CAS0# VMA_CAS1# (21) (21) +1.5V_GPU DQA1_26 DQA1_27 CSA0B_0 DQA1_28 CSA0B_1 K24 VMA_CS0# K27 VMA_CS0# (21) M13 VMA_CS1# K16 VMA_CS1# (21) (0.7*VDDR1) DQA1_29 DQA1_30 CSA1B_0 DQA1_31 CSA1B_1 Ra R5061 EV@40.2/F_4 20 VMB_DQ[63..0] VMB_DM[7..0] U5000D VMB_RDQS[7..0] PART 4 0F 9 VMB_WDQS[7..0] VMB_MA[14..0] VMB_BA0 VMB_BA1 VMB_BA2 VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63 C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5 DQB0_0 GDDR5/DDR3 MAB0_0/MAB_0 DQB0_1 MAB0_1/MAB_1 DQB0_2 MAB0_2/MAB_2 DQB0_3 MAB0_3/MAB_3 DQB0_4 MAB0_4/MAB_4 DQB0_5 MAB0_5/MAB_5 DQB0_6 MAB0_6/MAB_6 DQB0_7 MAB0_7/MAB_7 DQB0_8 MAB1_0/MAB_8 DQB0_9 MAB1_1/MAB_9 DQB0_10 MAB1_2/MAB_10 DQB0_11 MAB1_3/MAB_11 DQB0_12 MAB1_4/MAB_12 DQB0_13 MAB1_5/BA2 DQB0_14 MAB1_6/BA0 DQB0_15 MAB1_7/BA1 DQB0_16 MEMORY INTERFACE B (22) VMB_DQ[63..0] DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 WCKB0_0/DQMB_0 WCKB0B_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0B_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1B_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1B_1/DQMB_7 L18 L20 MVREFDA CKEA0 MVREFSA CKEA1 K21 VMA_CKE0 J20 VMA_CKE1 VMA_CKE0 VMA_CKE1 MVREFDB MVREFSB (21) (21) Y12 AA12 DQB0_26 EDCB0_0/QSB_0 DQB0_27 EDCB0_1/QSB_1 DQB0_28 EDCB0_2/QSB_2 DQB0_29 EDCB0_3/QSB_3 DQB0_30 EDCB1_0/QSB_4 DQB0_31 EDCB1_1/QSB_5 DQB1_0 EDCB1_2/QSB_6 DQB1_1 Rb R5062 EV@100/F_4 C5156 EV@1U/6.3V_4X R5063 R5065 R5066 Thames@243/F_4 L27 Seymour@243/F_4 N12 Thames@243/F_4 AG12 NC_MEM_CALRN0 WEA0B NC_MEM_CALRN1 WEA1B K26 VMA_WE0# L15 VMA_WE1# EDCB1_3/QSB_7 DQB1_3 DDBIB0_0/QSB_0B DQB1_4 DDBIB0_1/QSB_1B DQB1_5 DDBIB0_2/QSB_2B DQB1_6 DDBIB0_3/QSB_3B DQB1_7 DDBIB1_0/QSB_4B DQB1_8 DDBIB1_1/QSB_5B DQB1_9 DDBIB1_2/QSB_6B DQB1_10 VMA_WE0# VMA_WE1# (21) (21) Rb R5064 EV@100/F_4 DDBIB1_3/QSB_7B DQB1_12 ADBIB0/ODTB0 DQB1_13 Seymour@243/F_4 M12 Thames@243/F_4 M27 Thames@243/F_4 AH12 NC_MEM_CALRP1 MAA0_8/MAA_13 MEM_CALRP0 MAA1_8/MAA_14 MEM_CALRP2 MAA0_9/MAA_15 MAA1_9/RSVD +1.5V_GPU ADBIB1/ODTB1 DQB1_15 CLKB0 DQB1_16 VMB_RDQS0 VMB_RDQS1 VMB_RDQS2 VMB_RDQS3 VMB_RDQS4 VMB_RDQS5 VMB_RDQS6 VMB_RDQS7 QSB[7..0] G7 K1 P1 W4 AC4 AH3 AJ8 AM3 VMB_WDQS0 VMB_WDQS1 VMB_WDQS2 VMB_WDQS3 VMB_WDQS4 VMB_WDQS5 VMB_WDQS6 VMB_WDQS7 QSB#[7..0] T7 W7 VMB_ODT0 (22) VMB_ODT1 (22) CLKB0B VMB_CLK0 VMB_CLK0# L9 L8 VMB_CLK0 (22) VMB_CLK0# (22) DQB1_17 DQB1_18 CLKB1 DQB1_19 CLKB1B AD8 VMB_CLK1 AD7 VMB_CLK1# VMB_CLK1 (22) VMB_CLK1# (22) T10 VMB_RAS0# Y10 VMB_RAS1# VMB_RAS0# VMB_RAS1# W10 VMB_CAS0# AA10 VMB_CAS1# VMB_CAS0# VMB_CAS1# P10 VMB_CS0# L10 VMB_CS0# (22) AD10 VMB_CS1# AC10 VMB_CS1# (22) U10 VMB_CKE0 AA11 VMB_CKE1 VMB_CKE0 VMB_CKE1 (22) (22) N10 VMB_WE0# AB11 VMB_WE1# VMB_WE0# VMB_WE1# (22) (22) DQB1_20 DQB1_21 RASB0B DQB1_22 RASB1B (22) (22) DQB1_23 DQB1_24 CASB0B DQB1_25 CASB1B (22) (22) DQB1_26 DQB1_27 CSB0B_0 DQB1_28 CSB0B_1 DQB1_29 DQB1_30 CSB1B_0 DQB1_31 CSB1B_1 MVREFDB CKEB1 MVREFSB C5157 EV@1U/6.3V_4X H23 VMA_MA13 J19 VMA_MA14 M21 M20 MAB1_8/MAB_14 MAB0_9/MAB_15 MAB1_9/RSVD +1.5V_GPU (0.7*VDDR1) F6 K3 P3 V5 AB5 AH1 AJ9 AM5 DQB1_14 MAB0_8/MAB_13 R5067 R5068 R5069 VMB_DM0 VMB_DM1 VMB_DM2 VMB_DM3 VMB_DM4 VMB_DM5 VMB_DM6 VMB_DM7 DQB1_11 WEB1B NC_MEM_CALRN2 H3 H1 T3 T5 AE4 AF5 AK6 AK5 DQB1_2 WEB0B +1.5V_GPU VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_BA2 VMB_BA0 VMB_BA1 DQB0_25 CKEB0 MVREFDA MVREFSA P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9 DRAM_RST T8 VMB_MA13 W8 VMB_MA14 U12 V12 AH11 GPU_DRAM_RST (0.7*VDDR1) EV@HEATHROW M2 Ra Rb R5070 EV@40.2/F_4 R5072 EV@100/F_4 Ra R5071 EV@40.2/F_4 Rb R5073 EV@100/F_4 EV@HEATHROW M2 C5158 EV@1U/6.3V_4X Ball Name MEM_CALRN0 MEM_CALRN1 Thames 243R X Seymour X 243R MEM_CALRN2 243R X MEM_CALRP0 243R X MEM_CALRP1 X 243R MEM_CALRP2 243R X C5159 EV@1U/6.3V_4X 25mm (max) GPU_DRAM_RST 5mm (max) R5074 25mm (max) EV@10/F_4 R5075 C5160 R5076 EV@4.99K/F_4 EV@51/F_4 MEM_RST# (21,22) фϯͺϮϬϭϮϬϮϭϯх ĐŚĂŶŐĞZϱϬϳϱǀĂůƵĞƚŽϱϭͬ&ͺϰ EV@120P/50V_4N Place all these componets very close to GPU (within 25mm) and keep all components close to each other ** This basic topology should be used for DRAM_RAT for DDR3/GDDR5 These Capacitors and Resistor values arre an example only The series R and || cap values will depend on the DRAM loads and will have to be calculated for differrent Memory, DRAM loads and board to pass Reset Signal Spec Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A Seymour_M2/ MEM Interface Sheet 20 of 45 5 (20) VMA_DQ[63..0] (20) VMA_DM[7..0] (20) VMA_RDQS[7..0] (20) VMA_WDQS[7..0] (20) VMA_MA[14..0] 4 3 VMA_DM[7..0] VMA_RDQS[7..0] QSA[7..0] VMA_WDQS[7..0] QSA#[7..0] U5002 VREFC_VMA1 VREFD_VMA1 (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 (20) (20) (20) VMA_BA0 VMA_BA1 VMA_BA2 (20) (20) (20) VMA_CLK0 VMA_CLK0# VMA_CKE0 (20) (20) (20) (20) (20) VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0# (20,22) MEM_RST# M8 H1 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 VMA_BA0 VMA_BA1 VMA_BA2 M2 N8 M3 VMA_CLK0 VMA_CLK0# VMA_CKE0 J7 K7 K9 VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0# K1 L2 J3 K3 L3 VMA_RDQS0 VMA_RDQS3 F3 C7 VMA_DM0 VMA_DM3 C 1 9*$! 21 U5004 VMA_MA[14..0] D 2 CHANNEL A: 512MB DDR3 (64M*16*4pcs) VMA_DQ[63..0] G3 B7 MEM_RST# T2 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 CK CK CKE DQSL DQSU VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 DML DMU VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 DQSL DQSU RESET ZQ VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 R5077 Thames@243/F_4 E3 F7 F2 F8 H3 H8 G2 H7 VMA_DQ5 VMA_DQ0 VMA_DQ6 VMA_DQ1 VMA_DQ4 VMA_DQ3 VMA_DQ7 VMA_DQ2 D7 C3 C8 C2 A7 A2 B8 A3 VMA_DQ24 VMA_DQ31 VMA_DQ27 VMA_DQ28 VMA_DQ25 VMA_DQ29 VMA_DQ26 VMA_DQ30 VREFC_VMA2 VREFD_VMA2 Ϭ ϯ M8 H1 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 VMA_BA0 VMA_BA1 VMA_BA2 M2 N8 M3 VMA_CLK0 VMA_CLK0# VMA_CKE0 J7 K7 K9 +1.5V_GPU BA0 BA1 BA2 L8 J1 L1 J9 L9 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 E7 D3 VMA_WDQS0 VMA_WDQS3 VMA_ZQ1 VREFCA VREFDQ ODT CS RAS CAS WE U5005 U5003 NC#J1 NC#L1 NC#J9 NC#L9 100-BALL SDRAM DDR3 Thames@VRAM _DDR3 B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9 VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0# K1 L2 J3 K3 L3 VMA_RDQS1 VMA_RDQS2 F3 C7 VMA_DM1 VMA_DM2 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E7 D3 VMA_WDQS1 VMA_WDQS2 G3 B7 MEM_RST# T2 VMA_ZQ2 B1 B9 D1 D8 E2 E8 F9 G1 G9 L8 VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 CK CK CKE ODT CS RAS CAS WE DQSL DQSU DML DMU DQSL DQSU RESET ZQ TOP Left DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 VMA_DQ12 VMA_DQ14 VMA_DQ8 VMA_DQ11 VMA_DQ10 VMA_DQ15 VMA_DQ9 VMA_DQ13 VMA_DQ20 VMA_DQ19 VMA_DQ23 VMA_DQ17 VMA_DQ22 VMA_DQ16 VMA_DQ21 VMA_DQ18 ϭ Ϯ VREFC_VMA3 VREFD_VMA3 M8 H1 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 VMA_BA0 VMA_BA1 VMA_BA2 M2 N8 M3 VMA_CLK1 VMA_CLK1# VMA_CKE1 J7 K7 K9 VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 VMA_DQ54 VMA_DQ50 VMA_DQ53 VMA_DQ49 VMA_DQ52 VMA_DQ51 VMA_DQ55 VMA_DQ48 VREFC_VMA4 VREFD_VMA4 M8 H1 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 D7 C3 C8 C2 A7 A2 B8 A3 VMA_DQ32 VMA_DQ36 VMA_DQ33 VMA_DQ37 VMA_DQ34 VMA_DQ39 VMA_DQ35 VMA_DQ38 VMA_BA0 VMA_BA1 VMA_BA2 M2 N8 M3 VMA_CLK1 VMA_CLK1# VMA_CKE1 J7 K7 K9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1# K1 L2 J3 K3 L3 VMA_RDQS5 VMA_RDQS7 F3 C7 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VMA_DM5 VMA_DM7 E7 D3 VMA_WDQS5 VMA_WDQS7 G3 B7 ϲ ϰ +1.5V_GPU VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 VMA_DQ46 VMA_DQ45 VMA_DQ44 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ47 ϱ D7 C3 C8 C2 A7 A2 B8 A3 VMA_DQ61 VMA_DQ58 VMA_DQ63 VMA_DQ56 VMA_DQ60 VMA_DQ59 VMA_DQ62 VMA_DQ57 ϳ D +1.5V_GPU +1.5V_GPU VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 R5078 Thames@243/F_4 J1 L1 J9 L9 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 NC#J1 NC#L1 NC#J9 NC#L9 100-BALL SDRAM DDR3 Thames@VRAM _DDR3 B2 D9 G7 K2 K8 N1 N9 R1 R9 (20) (20) (20) VMA_CLK1 VMA_CLK1# VMA_CKE1 (20) (20) (20) (20) (20) VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1# BA0 BA1 BA2 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 CK CK CKE B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU BA0 BA1 BA2 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 CK CK CKE B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1# K1 L2 J3 K3 L3 VMA_RDQS6 VMA_RDQS4 F3 C7 VMA_DM6 VMA_DM4 E7 D3 VMA_WDQS6 VMA_WDQS4 G3 B7 MEM_RST# VMA_ZQ3 B1 B9 D1 D8 E2 E8 F9 G1 G9 T2 L8 ODT CS RAS CAS WE VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 DQSL DQSU DML DMU VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 DQSL DQSU RESET ZQ VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 R5079 Thames@243/F_4 J1 L1 J9 L9 NC#J1 NC#L1 NC#J9 NC#L9 100-BALL SDRAM DDR3 Thames@VRAM _DDR3 MEM_RST# VMA_ZQ4 B1 B9 D1 D8 E2 E8 F9 G1 G9 DQSL DQSU J1 L1 J9 L9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 DML DMU VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 DQSL DQSU RESET ZQ VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 R5080 Thames@243/F_4 TOP Right BOT Left Group-A0 VREF T2 L8 ODT CS RAS CAS WE NC#J1 NC#L1 NC#J9 NC#L9 100-BALL SDRAM DDR3 Thames@VRAM _DDR3 A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 C B1 B9 D1 D8 E2 E8 F9 G1 G9 BOT Right Group-A1 VREF +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU B B R5081 Thames@4.99K/F_4 R5082 Thames@4.99K/F_4 VREFC_VMA1 R5083 Thames@4.99K/F_4 VREFD_VMA1 R5084 Thames@4.99K/F_4 VREFC_VMA2 R5085 Thames@4.99K/F_4 R5086 Thames@4.99K/F_4 R5088 Thames@4.99K/F_4 VREFD_VMA2 VREFC_VMA3 R5089 C5161 R5090 C5162 R5091 C5163 R5092 C5164 Thames@4.99K/F_4 Thames@0.1U/10V_4X Thames@4.99K/F_4 Thames@0.1U/10V_4X Thames@4.99K/F_4 Thames@0.1U/10V_4X Thames@4.99K/F_4 Thames@0.1U/10V_4X Group-A0 decoupling CAP MEM_A0 CLK R5087 Thames@4.99K/F_4 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4 R5093 C5165 R5094 C5166 R5095 C5167 R5096 C5168 Thames@4.99K/F_4 Thames@0.1U/10V_4X Thames@4.99K/F_4 Thames@0.1U/10V_4X Thames@4.99K/F_4 Thames@0.1U/10V_4X Thames@4.99K/F_4 Thames@0.1U/10V_4X Group-A1 decoupling CAP MEM_A1 CLK +1.5V_GPU +1.5V_GPU VMA_CLK0 VMA_CLK1 C5172 Thames@1U/6.3V_4X VMA_CLK0# C5169 Thames@1U/6.3V_4X R5097 Thames@56.2/F_4 C5170 Thames@1U/6.3V_4X C5171 Thames@1U/6.3V_4X C5178 Thames@1U/6.3V_4X C5179 Thames@1U/6.3V_4X C5180 Thames@1U/6.3V_4X C5181 Thames@1U/6.3V_4X C5182 Thames@1U/6.3V_4X C5173 Thames@1U/6.3V_4X C5174 Thames@1U/6.3V_4X C5175 Thames@1U/6.3V_4X C5176 Thames@1U/6.3V_4X C5177 Thames@1U/6.3V_4X C5183 Thames@1U/6.3V_4X C5184 Thames@1U/6.3V_4X VMA_CLK1# R5098 Thames@56.2/F_4 R5099 Thames@56.2/F_4 +1.5V_GPU R5100 Thames@56.2/F_4 +1.5V_GPU C5189 Thames@0.01U/25V_4X A C5186 Thames@1U/6.3V_4X C5187 Thames@1U/6.3V_4X C5188 Thames@1U/6.3V_4X C5196 Thames@1U/6.3V_4X C5197 Thames@1U/6.3V_4X C5198 Thames@1U/6.3V_4X C5199 Thames@1U/6.3V_4X C5190 Thames@1U/6.3V_4X C5200 Thames@1U/6.3V_4X C5191 Thames@1U/6.3V_4X C5192 Thames@1U/6.3V_4X C5193 Thames@1U/6.3V_4X C5194 Thames@1U/6.3V_4X C5195 Thames@1U/6.3V_4X C5201 Thames@1U/6.3V_4X C5202 Thames@1U/6.3V_4X C5185 Thames@0.01U/25V_4X A +1.5V_GPU +1.5V_GPU C5203 Thames@4.7U/6.3V_6X C5204 Thames@4.7U/6.3V_6X C5205 Thames@4.7U/6.3V_6X C5206 Thames@4.7U/6.3V_6X C5208 Thames@4.7U/6.3V_6X C5207 Thames@4.7U/6.3V_6X C5209 Thames@4.7U/6.3V_6X C5210 Thames@4.7U/6.3V_6X C5211 Thames@4.7U/6.3V_6X C5212 Thames@4.7U/6.3V_6X Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Monday, March 19, 2012 Rev 1A VRAM_A: DDR3*4PCS 5 4 3 2 1 Sheet 21 of 45 5 (20) VMB_RDQS[7..0] (20) VMB_WDQS[7..0] CHANNEL B: 512MB DDR3 (64M*16*4pcs) 1 9*$! VMB_RDQS[7..0] QSA[7..0] VMB_WDQS[7..0] QSA#[7..0] 22 U5006 U5007 U5008 U5009 VMB_MA[14..0] (20) VMB_MA[14..0] (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) (20) VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 (20) (20) (20) VMB_BA0 VMB_BA1 VMB_BA2 (20) VMB_CLK0 (20) VMB_CLK0# (20) VMB_CKE0 VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0# C VREFC_VMB1 VREFD_VMB1 M8 H1 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 VMB_BA0 VMB_BA1 VMB_BA2 M2 N8 M3 VMB_CLK0 VMB_CLK0# VMB_CKE0 J7 K7 K9 VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0# K1 L2 J3 K3 L3 VMB_RDQS2 VMB_RDQS3 F3 C7 VMB_DM2 VMB_DM3 E7 D3 VMB_WDQS2 VMB_WDQS3 G3 B7 MEM_RST# T2 (20,21) MEM_RST# VMB_ZQ1 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 CK CK CKE ODT CS RAS CAS WE VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 DQSL DQSU DML DMU VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 DQSL DQSU RESET L8 ZQ J1 L1 J9 L9 E3 F7 F2 F8 H3 H8 G2 H7 VMB_DQ23 VMB_DQ16 VMB_DQ21 VMB_DQ17 VMB_DQ22 VMB_DQ19 VMB_DQ20 VMB_DQ18 D7 C3 C8 C2 A7 A2 B8 A3 VMB_DQ26 VMB_DQ30 VMB_DQ28 VMB_DQ31 VMB_DQ24 VMB_DQ27 VMB_DQ25 VMB_DQ29 Ϯ ϯ VREFC_VMB2 VREFD_VMB2 M8 H1 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 VMB_BA0 VMB_BA1 VMB_BA2 M2 N8 M3 VMB_CLK0 VMB_CLK0# VMB_CKE0 J7 K7 K9 +1.5V_GPU BA0 BA1 BA2 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 R5101 EV@243/F_4 NC#J1 NC#L1 NC#J9 NC#L9 B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9 VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0# K1 L2 J3 K3 L3 VMB_RDQS0 VMB_RDQS1 F3 C7 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VMB_DM0 VMB_DM1 E7 D3 VMB_WDQS0 VMB_WDQS1 G3 B7 MEM_RST# T2 VMB_ZQ2 B1 B9 D1 D8 E2 E8 F9 G1 G9 L8 VREFCA VREFDQ J1 L1 J9 L9 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 CK CK CKE ODT CS RAS CAS WE DQSL DQSU DML DMU DQSL DQSU RESET ZQ R5102 EV@243/F_4 100-BALL SDRAM DDR3 EV@VRAM _DDR3 NC#J1 NC#L1 NC#J9 NC#L9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 VMB_DQ1 VMB_DQ4 VMB_DQ2 VMB_DQ5 VMB_DQ0 VMB_DQ7 VMB_DQ3 VMB_DQ6 D7 C3 C8 C2 A7 A2 B8 A3 VMB_DQ15 VMB_DQ10 VMB_DQ14 VMB_DQ8 VMB_DQ12 VMB_DQ9 VMB_DQ13 VMB_DQ11 Ϭ ϭ VREFC_VMB3 VREFD_VMB3 M8 H1 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 VMB_BA0 VMB_BA1 VMB_BA2 M2 N8 M3 VMB_CLK1 VMB_CLK1# VMB_CKE1 J7 K7 K9 +1.5V_GPU VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 B2 D9 G7 K2 K8 N1 N9 R1 R9 (20) VMB_CLK1 (20) VMB_CLK1# (20) VMB_CKE1 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9 (20) (20) (20) (20) (20) VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1# A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1# K1 L2 J3 K3 L3 VMB_RDQS6 VMB_RDQS5 F3 C7 VMB_DM6 VMB_DM5 E7 D3 VMB_WDQS6 VMB_WDQS5 G3 B7 MEM_RST# T2 VMB_ZQ3 B1 B9 D1 D8 E2 E8 F9 G1 G9 L8 VREFCA VREFDQ J1 L1 J9 L9 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 CK CK CKE ODT CS RAS CAS WE DQSL DQSU VMB_DQ55 VMB_DQ51 VMB_DQ54 VMB_DQ50 VMB_DQ52 VMB_DQ49 VMB_DQ53 VMB_DQ48 VREFC_VMB4 VREFD_VMB4 M8 H1 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7 D7 C3 C8 C2 A7 A2 B8 A3 VMB_DQ41 VMB_DQ47 VMB_DQ40 VMB_DQ46 VMB_DQ44 VMB_DQ45 VMB_DQ43 VMB_DQ42 VMB_BA0 VMB_BA1 VMB_BA2 M2 N8 M3 VMB_CLK1 VMB_CLK1# VMB_CKE1 J7 K7 K9 A1 A8 C1 C9 D2 E9 F1 H2 H9 VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1# K1 L2 J3 K3 L3 VMB_RDQS7 VMB_RDQS4 F3 C7 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VMB_DM7 VMB_DM4 E7 D3 VMB_WDQS7 VMB_WDQS4 G3 B7 MEM_RST# T2 ϲ ϱ +1.5V_GPU +1.5V_GPU VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 DML DMU VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 DQSL DQSU RESET ZQ NC#J1 NC#L1 NC#J9 NC#L9 E3 F7 F2 F8 H3 H8 G2 H7 B2 D9 G7 K2 K8 N1 N9 R1 R9 VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 R5103 EV@243/F_4 100-BALL SDRAM DDR3 EV@VRAM _DDR3 TOP Up VMB_ZQ4 B1 B9 D1 D8 E2 E8 F9 G1 G9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 L8 BOT Up VREFCA VREFDQ J1 L1 J9 L9 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2 CK CK CKE ODT CS RAS CAS WE DQSL DQSU DML DMU DQSL DQSU RESET ZQ R5104 EV@243/F_4 100-BALL SDRAM DDR3 EV@VRAM _DDR3 NC#J1 NC#L1 NC#J9 NC#L9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E3 F7 F2 F8 H3 H8 G2 H7 VMB_DQ62 VMB_DQ61 VMB_DQ63 VMB_DQ60 VMB_DQ59 VMB_DQ58 VMB_DQ57 VMB_DQ56 ϳ D7 C3 C8 C2 A7 A2 B8 A3 VMB_DQ38 VMB_DQ32 VMB_DQ36 VMB_DQ33 VMB_DQ37 VMB_DQ35 VMB_DQ39 VMB_DQ34 ϰ D +1.5V_GPU VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9 B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 C B1 B9 D1 D8 E2 E8 F9 G1 G9 100-BALL SDRAM DDR3 EV@VRAM _DDR3 TOP Down Group-B0 VREF BOT Down Group-B1 VREF +1.5V_GPU B 2 VMB_DM[7..0] (20) VMB_DM[7..0] (20) (20) (20) (20) (20) 3 VMB_DQ[63..0] (20) VMB_DQ[63..0] D 4 +1.5V_GPU R5105 EV@4.99K/F_4 +1.5V_GPU R5106 EV@4.99K/F_4 VREFC_VMB1 +1.5V_GPU R5107 EV@4.99K/F_4 VREFD_VMB1 +1.5V_GPU R5108 EV@4.99K/F_4 VREFC_VMB2 +1.5V_GPU R5109 EV@4.99K/F_4 VREFD_VMB2 +1.5V_GPU R5110 EV@4.99K/F_4 VREFC_VMB3 +1.5V_GPU R5111 EV@4.99K/F_4 VREFD_VMB3 B R5112 EV@4.99K/F_4 VREFC_VMB4 VREFD_VMB4 R5113 C5213 R5114 C5214 R5115 C5215 R5116 C5216 R5117 C5217 R5118 C5218 R5119 C5219 R5120 C5220 EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X Group-B0 decoupling CAP MEM_B0 CLK Group-B1 decoupling CAP +1.5V_GPU MEM_B1 CLK +1.5V_GPU VMB_CLK1 VMB_CLK0 C5221 C5222 C5223 C5224 C5225 C5226 C5227 C5228 C5229 C5230 C5231 C5232 C5233 C5234 C5235 VMB_CLK0# EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X R5123 R5124 +1.5V_GPU EV@56.2/F_4 VMB_CLK1# R5121 R5122 EV@56.2/F_4 EV@56.2/F_4 +1.5V_GPU EV@56.2/F_4 A C5237 EV@0.01U/25V_4X C5238 C5239 C5240 C5241 C5242 C5243 C5244 C5245 C5246 C5247 C5248 C5249 C5250 C5251 C5252 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X +1.5V_GPU A C5236 EV@0.01U/25V_4X +1.5V_GPU C5253 C5254 C5255 C5256 C5257 C5258 C5259 C5260 C5261 C5262 Quanta Computer Inc. EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A VRAM_B: DDR3*4PCS 5 4 3 2 Sheet 1 22 of 45 5 4 3 2 1 23 EŽŶͲKĚĞƐŝŐŶ ;ƌĂnjŽƐĚŽĞƐŶΖƚƐƵƉƉŽƌƚDƵdžůĞƐƐ^ǁŝƚĐŚͲĂďůĞ'ƌĂƉŚŝĐƐͿ D D C C B B A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev 1A Seymour_M2/ Baco Date: 5 4 3 2 Tuesday, March 06, 2012 Sheet 1 23 of 45 5 4 3 86%3RZHUVZLWFK2 USB w S&C MAXIM solution фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞƚŽϭϬϬ<ŽŚŵ ;ĨŽƌůĞĂŬĂŐĞŝƐƐƵĞͿ U5 S&C@MAX14600ETA+T +5V_S5 R262 100K_4 USB_SC_EN# (34) USB_SC_EN# IN1 IN2 4 1 9 EN# GND GND-C C132 D OUT3 OUT2 OUT1 8 7 6 OC# 5 (34) USB_BUS_SW4 (34) USB_BUS_SW3 (34) USB_BUS_SW2 +5VSUS_USBP1 C127 C128 *470P/50V_4X *0.1U/10V_4X + C130 100U/6.3V_3528P_E45b USBP10+_R1 USBP10-_R1 C133 S&C@0.1U/10V_4X фϯͺϮϬϭϮϬϭϯϬх ƌĞƐĞƌǀĞϭϮϬϲƉĂĐŬĂŐĞĐĂƉ U4 2 3 C131 C136 R338 *10U/6.3V_8X *100U/6.3V_1206 470/F_4 USB_BUS_SW3 R71 R69 R62 14617@10K_4 14617@0_4 14566@0_4 5 VCC 1 8 CB1(CEN#) CB 9 UP7534BRA8-15 GND TDP TDM 6 7 USB_S&C_RR USB_S&C#_RR DP DM 3 2 USB_S&C_R USB_S&C#_R USB_SC_OC# USBP10+_R1 USBP10-_R1 4 GND R59 R53 3 1U/16V_6X 24 +5V_S5 +3V_S5 1 USB_SC_OC# (6,34) R331 R323 NS&C@0_4 NS&C@0_4 R329 R321 S&C@0_4 S&C@0_4 USBP10+ USBP10- R313 R307 S&C@0_4 S&C@0_4 USBP10+_R2 USBP10-_R2 R308 R311 NS&C@0_4 NS&C@0_4 USBP10+ (6) USBP10- (6) D USB_BUS_SW3 146XX@0_4 14566@0_4 2 Q18 ME2N7002E_200MA 1 фϯͺϮϬϭϮϬϯϮϭх ƐƚƵĨĨĨŽƌh^ĚŝƐĐŚĂƌŐĞƌ R69 14566 14617 14566/14600 R62 V V V 14617(no CB2) USB3_RXN0 R30 USB3_RXP0 R31 USB3_TXN0 R32 USB3_TXP0 R33 USB3_TXN0 USB3_TXP0 V 2 4 X Pass-Through(USB) mode: Connect DP/DM to TDP/TDM for 14566 1 0 Pass-Through(USB) mode for 14600 1 1 pass-through(USB) with CDP Emulation for 14600 V UR3@0_4 USB30_RX0UR3@0_4 USB30_RX0+ USB30_TX0-_R1 USB30_TX0+_R1 UR3@0_4 UR3@0_4 1 Force Apple 2A Charger Mode 0 0 Autodetection charger mode 0 1 0 Force-Dedicated Charger Mode 1 0 0 1 1 0 USB Pass-Through Mode Connect DP/DM to TDP/TDM USB Pass-Through Mode with CDP Emulation.Auto connect DP/DM to TDP/TDM depending on CDP status CN22 1 2 3 4 5 6 7 8 9 *0X2_short UR3@0.1U/10V_4X USB30_TX0-_C UR3@0.1U/10V_4X USB30_TX0+_C C134 C135 X 0 CN1 +5VSUS_USBP1 USBP10-_CN USBP10+_CN 1 3 1 2 3 4 5 6 7 8 9 VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+ 1 VDD NC 4 5 USB30_TX0-_C 10 9 8 7 6 10 GND NC1 7 6 13 12 11 10 1 2 3 4 5 USBP10-_CN USB30_RX0+ 1 X +5VSUS_USBP1 USBP10-_CN USBP10+_CN 6 *300_4 ESD1 USB30_TX0+_C +5VSUS_USBP1 Force dedicated charger mode 1 2 3 4 D24 *UR2@AZ5125-01J C UR2@UARCF-4K1986 13 12 11 10 (6) (6) Auto mode 1 Status CB2 8 R397 RP1 USB3_RXN0 USB3_RXP0 0 0 CB1 5 *10P/50V_4C фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ USBP10-_R2 USBP10+_R2 (6) (6) 0 CB0 7 C309 Status 86%&2115,*+7 фϮϬϭϭϭϮϬϳͺ>ŝŶĐĂŶх ƌĞƐĞƌǀĞĨŽƌĞdžƚĞƌŶĂůh^ƉŽƌƚ͘ фϯͺϮϬϭϮϬϯϭϯх ĚĞů>ϮĨŽƌůĂLJŽƵƚƌĞƋƵĞƐƚ C R71 V 14617(with CB2) R53 CB1 V 14600 86%&2115,*+7 R59 CB0 UR3@TARAH-9V1391 USB3.0 USB2.0 USBP10+_CN USB30_RX0- UR-3@TARAH-9V1391 UR-2@UARCF-4K1986 *UR3@AZ1065-06F 86%3RZHUVZLWFK фϮϬϭϭϭϮϬϳͺ>ŝŶĐĂŶх ƌĞƐĞƌǀĞĨŽƌĞdžƚĞƌŶĂůh^ƉŽƌƚ͘ R559 *ULU3@4.7K_4 R561 *ULU3@4.7K_4 EQ_A EQ_B DE_A R565 *ULU3@4.7K_4 R569 *ULU3@4.7K_4 DE_B R570 *ULU3@4.7K_4 R41 +USB_RE_PWR R39 OSA *ULU3@4.7K_4 OSB R571 *ULU3@4.7K_4 USBP11USBP11+ фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ RP2 3 1 CN2 +5VSUS_USBP0 USBP11-_R USBP11+_R *0X2_short 4 2 USB3_RXN1_RE USB3_RXP1_RE R34 R35 ULU3@0_4 ULU3@0_4 USB30_RX1USB30_RX1+ USB3_TXN1_RE USB3_TXP1_RE R36 R37 ULU3@0_4 ULU3@0_4 USB30_TX1-_R1 USB30_TX1+_R1 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+ USB3_TXN1 USB3_TXP1 C760 C762 ULU3@0.1U/10V_4X ULU3@0.1U/10V_4X USB3_TXN1_C USB3_TXP1_C (6) (6) USB3_RXN1 USB3_RXP1 C753 C754 ULU3@0.1U/10V_4X ULU3@0.1U/10V_4X USB3_RXN1_C USB3_RXP1_C 7 8 9 10 11 12 ULU3@TARA9-9V1391 NC RXARXA+ EN_A# TXBTXB+ B HGND NC TXATXA+ EN_B# RXBRXB+ 25 24 23 22 21 20 19 USB3_TXN1_RE_C USB3_TXP1_RE_C C757 C758 ULU3@0.1U/10V_4X ULU3@0.1U/10V_4X USB3_TXN1_RE USB3_TXP1_RE USB3_RXN1_RE USB3_RXP1_RE C46 ULU3@10U/6.3V_6X ULU3@0.1U/10V_4X ULU3@0.1U/10V_4X ULU3@2.2U/10V_6X ULU3@470P/50V_4X C143 8 ULU2@UARC6-4K1926 CN3 7 2 D2 *5V/30V/0.2p_4 EN# GND GND-C OUT3 OUT2 OUT1 OC# 5 +5VSUS_USBP0 C307 *UL@10P/50V_4C C138 C139 + C140 *470P/50V_4X *0.1U/10V_4X 100U/6.3V_3528P_E45b C142 *10U/6.3V_8X C141 R340 *100U/6.3V_1206 470/F_4 R395 *UL@300_4 +5VSUS_USBP0 USBP0-_R USBP0+_R RP3 (6) (6) USBP0USBP0+ USBP0USBP0+ 4 2 3 1 *0X2_short фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ UP7534BRA8-15 1 2 3 4 A D3 *5V/30V/0.2p_4 D4 *5V/30V/0.2p_4 5 IN1 IN2 4 1 9 8 7 6 7 2 3 8 86%&211/()7'2:1 фϮϬϭϭϭϮϬϳͺ>ŝŶĐĂŶх ƌĞƐĞƌǀĞĨŽƌĞdžƚĞƌŶĂůh^ƉŽƌƚ͘ фϯͺϮϬϭϮϬϭϯϬх ƌĞƐĞƌǀĞϭϮϬϲƉĂĐŬĂŐĞĐĂƉ U6 USB_NORMAL_EN# (34) USB_NORMAL_EN# D1 *5V/30V/0.2p_4 фϯͺϮϬϭϮϬϭϬϮх ĐŚĂŶŐĞ ^ƐŽůƵƚŝŽŶ;ĚĞůhϱϬϯϳͿ фϯͺϮϬϭϮϬϯϭϯх ĚĞů>ϯĨŽƌůĂLJŽƵƚƌĞƋƵĞƐƚ +5V_S5 R269 100K_4 6 C45 5 C751 6 C763 CN5 1 2 3 4 1 1 *ULU3@AZ1065-06F ULD@UARC6-4K1926 1U/16V_6X USB_NORMAL_OC# фϯͺϮϬϭϮϬϭϬϮхĐŚĂŶŐĞ ^ƐŽůƵƚŝŽŶ;ĚĞůhϱϬϯϳͿ USB_NORMAL_OC# (6,34) Quanta Computer Inc. 2 Q20 ME2N7002E_200MA 1 A +5VSUS_USBP0 USBP11-_R USBP11+_R USBP11+_R USB30_RX1- D25 *AZ5125-01J C723 +3V_S5 фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞƚŽϭϬϬ<ŽŚŵ ;ĨŽƌůĞĂŬĂŐĞŝƐƐƵĞͿ USB30_TX1-_R1 1 *ULU3@0_6 10 9 8 7 6 2 +3V R13 ULU3@4.7K_4 10 GND NC1 7 6 1 ULU3@0_6 *ULU3@4.7K_4 R45 1 VDD NC 4 5 2 R10 R43 USBP11-_R USB30_RX1+ 1 2 3 4 5 3 +3V_S5 +USB_RE_PWR USB30_TX1+_R1 +5VSUS_USBP0 2 +USB_RE_PWR 30 mils ESD2 ULU3@PI3EQX7502ZDE OSB DE_B EQ_B 13 14 15 16 17 18 VDD NC NC DE_B EQ_B NC (6) (6) NC RXD_EN NC DE_A EQ_A VDD U22 B фϯͺϮϬϭϮϬϯϭϲх ƐƚƵĨĨZϱϱϳĂŶĚƵŶƐƚƵĨĨZϱϲϳ;ƌĞͲĚƌŝǀĞƌ/ǀĞŶĚŽƌƐƵŐŐĞƐƚͿ *ULU@300_4 USBP11USBP11+ 13 12 11 10 R568 *ULU3@4.7K_4 OSA DE_A EQ_A R567 *ULU3@4.7K_4 R393 ULU3@TARA9-9V1391 ULU2@UARC6-4K1926 6 5 4 3 2 1 R564 *ULU3@4.7K_4 *ULU@10P/50V_4C (6) (6) *ULU3@4.7K_4 +USB_RE_PWR R560 ULU3@4.7K_4 C308 DFHS09FR085 DFHS04FR487 13 12 11 10 R550 *ULU3@4.7K_4 R557 ULU3@4.7K_4 USB3.0 USB2.0 86%&211/()783 +USB_RE_PWR 5 4 3 фϯͺϮϬϭϮϬϯϮϭх ƐƚƵĨĨĨŽƌh^ĚŝƐĐŚĂƌŐĞƌ PROJECT : BY7D фϯͺϮϬϭϮϬϯϭϯх ĚĞů>ϰĨŽƌůĂLJŽƵƚ ƌĞƋƵĞƐƚ Size Document Number Date: Wednesday, March 21, 2012 Rev 1A USB2.0/USB3.0 2 1 Sheet 24 of 45 5 4 3 2 1 HDMI +3V (4) INT_HDMI_TXDN0 (4) INT_HDMI_TXDP0 DDC5V R83 *HM@0_4 R452 R446 IHM@0_4 IHM@0_4 C118 C111 EHM@0.1U/10V_4X EHM@0.1U/10V_4X ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽĐŽŶŶĞĐƚŽƌ R85 HM@0_4 2 HDMI_TXDN1 HDMI_TXDP1 R442 R445 (4) INT_HDMI_TXDN1 (4) INT_HDMI_TXDP1 (14) EXT_HDMITX2N (14) EXT_HDMITX2P (4) INT_HDMI_TXDN2 (4) INT_HDMI_TXDP2 1 HM@FDV301N_200MA IHM@0_4 IHM@0_4 C100 C107 EHM@0.1U/10V_4X EHM@0.1U/10V_4X R451 R455 IHM@0_4 IHM@0_4 C158 C159 EHM@0.1U/10V_4X EHM@0.1U/10V_4X R97 HM@100K_4 C172 HM@0.1U/10V_4X R86 HM@499/F_4 HDMI_TXDP0 R87 HM@499/F_4 HDMI_TXDN0 R89 HM@499/F_4 HDMI_TXDP1 R91 HM@499/F_4 HDMI_TXDN1 R93 HM@499/F_4 HDMI_TXDP2 R96 HM@499/F_4 HDMI_TXDN2 R98 HM@499/F_4 HDMI_TXCP R99 HM@499/F_4 HDMI_TXCN HDMI_TXDN1 HDMI_TXDP0 HDMI_TXDN0 HDMI_TXCP HDMI_TXCN HDMI_CON_CEC R467 R468 (4) INT_HDMI_TXCN (4) INT_HDMI_TXCP HDMI_SCL HDMI_SDA DDC5V HDMI_TXDN2 HDMI_TXDP2 +5V R90 NCEC@0_6 F1 +5VPCU R88 CEC@0_6 +5V_HDM 1 *HM@SMD1206P110TFT 2 2 D11 SHELL1 D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0GND CK+ CK Shield GND CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET SHELL2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 HDMI_TXDN2 HDMI_TXDP1 DDC5V 1 *HM@B130LAW-7-F_1A HDMI_HPD_L C168 20 23 22 D 21 HM@HMR2N-AK120N HM@0.1U/10V_4X Q10 3 (14) EXT_HDMICLK(14) EXT_HDMICLK+ 25 CN4 HDMI_TXDP2 HDMI_TXDN0 HDMI_TXDP0 Q7 (14) EXT_HDMITX1N (14) EXT_HDMITX1P D EHM@0.1U/10V_4X EHM@0.1U/10V_4X 3 C137 C129 (14) EXT_HDMITX0N (14) EXT_HDMITX0P IN OUT GND 1 2 HM@AP2331SA-7 HDMI_TXCN HDMI_TXCP D30 *HM@AZ5125-01J C382 *HM@220P/50V_4X IHM@0_4 IHM@0_4 ĨŽƌ D/ ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽĐŽŶŶĞĐƚŽƌ +3V HDMI_TXDP2 HDMI_TXDN1 R74 *HM@100_4 HDMI_TXDP1 HDMI_TXDN0 R75 *HM@100_4 HDMI_TXDP0 R76 *HM@100_4 DDC5V HDMI_HPD_L +3V R547 HM@2K/F_4 DDC5V HDMI_HPD_L (4) INT_HDMI_AUXN ESD4 HDMI_TXCP HDMI_TXDP0 HDMI_TXDN0 1 2 3 4 5 HDMI_TXCP HDMI_TXCN HDMI_SCL R469 IHM@0_4 R553 HM@10K/F_4 R474 1 EHM@0_4 (14) EXT_HDMI_HPD Q8 HM@FDV301N_200MA HDMI_TXCP HDMI_TXCN +3V (4) INT_HDMI_HPD DDC5V DDC5V R545 EHM@0_4 HDMI_HPD R554 HM@10K/F_4 R542 ESD3 IHM@0_4 C166 *HM@56P/50V_4N C167 *HM@56P/50V_4N HDMI_TXDN1 HDMI_TXDP1 1 2 3 4 5 HDMI_TXDN2 HDMI_TXDP2 ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽĐŽŶŶĞĐƚŽƌ R577 HM@2K/F_4 HDMI_TXDN1 HDMI_TXDP1 10 1 10 9 2 9 GND_3/8 7 4 7 6 5 6 *HM@RClamp0524P R576 HM@2K/F_4 1 HM@0.1U/10V_4X HDMI_TXDN2 HDMI_TXDP2 (4) INT_HDMI_AUXP R470 IHM@0_4 (14) DDCCLK_AUX1P R475 EHM@0_4 1 C5280 CEC@1U/6.3V_4X CEC@0.1U/10V_4X C5286 4 CEC@4.7KX2 2 CEC-RESET# CEC-MODE 4 6 3 8 5 15 14 11 *CEC@47P/50V_4N 3 SCL SDA DDCSDA DDCSCL XOUT XIN TEST1 TEST0 RESET MODE CEC OUT CEC IN VSS NC NC NC HPDET NC 3ND_MBCLK 3ND_MBDATA HDMI_CEC_DDCDATA HDMI_CEC_DDCCLK 1 20 18 17 CEC-TEST1 CEC-TEST2 13 12 10 9 CEC_OUT CEC_IN 19 2 HPDET RP13 3 CEC@4.7KX2 1 4 2 +3VPCU 3ND_MBCLK (32,34) 3ND_MBDATA (32,34) B CEC_OUT R9556 CEC@22K_4 1 R9557 +3VPCU Q5018 CEC@100K_4 R9561 CEC@2SK3541T2L_100MA HDMI_SDA CEC-RESET# 6 Q5022A CEC@R5F211B4D61SP#W4 CEC@4.7K_4 R9537 R9538 *CEC@0_4 *CEC@47K_4 CEC-MODE HDMI_CEC_DDCDATA 1 CEC-TEST1 CEC@2N7002KDW_115MA R9539 *CEC@0_4 &(&,QSXW &(&! 7R&(&& CEC-TEST2 +3VPCU +3VPCU &(&+RW3OXJ &(&! U5017 1 2 3 +3VPCU C5285 5 CEC@0.1U/10V_4X R9569 5 RP14 3 1 XIN_CEC XOUT_CEC &(&! 2 4 CEC@4.7KX2 2 VCC VCC 2 RP21 3 1 &(&60%XV/HYHO6KLIW 7R&(&& HDMI_CON_CEC U5014 7 16 R284 HM@100K_4 HDMI_SCL 3 0.013A(20mils) B HDMI_HPD_L R282 HM@0_4 Q9 HM@FDV301N_200MA &(&2XWSXW &(&! 7R&RQQHFW C5279 2 HDMI_DET_R R283 HM@200K/F_4 Q27 HM@ME2N7002E_200MA ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽĐŽŶŶĞĐƚŽƌ +'0,&(& &(&! +3VPCU C Q28 HM@ME2N7002E_200MA 2 2 C165 фϯͺϮϬϭϮϬϮϬϳх ƐƚƵĨĨϭϲϱĨŽƌ D/ +3VPCU +3V HDMI_SDA 3 1 HDMI_SDA (14) DDCDATA_AUX1N HDMI_TXDP0 HDMI_TXDN0 10 1 10 9 2 9 GND_3/8 7 4 7 6 5 6 *HM@RClamp0524P HDMI HPD SENSE R546 HM@2K/F_4 3 *HM@100_4 HDMI_SDA HDMI_SCL 10 1 10 9 2 9 GND_3/8 7 4 7 6 5 6 *HM@RClamp0524P 3 R73 1 2 3 4 5 2 HDMI_SDA HDMI_SCL HDMI_TXDN2 HDMI_TXCN C DDC5V ESD5 EMI reserve for HDMI(EMC) CEC@4.7K_4 4 CEC@SN74LVC1G14DCKR HDMI_SCL 3 HDMI_CEC_DDCCLK 4 Q5022B CEC@2N7002KDW_115MA U5015 C5283 (34) CEC_EC_HP CEC@0.1U/10V_4X R9542 CEC_EC_HP 5 CEC@33_4 4 1 2 3 R9541 CEC@1K/F_4 HDMI_HPD_L +3VPCU +3VPCU CEC@SN74LVC1G17DCKR HPDET R9544 A D2008 +3VPCU R9555 CEC@470K_4 R9558 CEC@27K_4 *CEC@0.1U/10V_4X 5 C5284 R161 *CEC@1K_4 HDMI_CON_CEC 1 1 4 2 U5016 *CEC@TC7SH08FU(F) CEC_IN Q5019 *CEC@2SK3541T2L_100MA +3V Quanta Computer Inc. 2 HDMI_HPD *CEC@10K_4 3 CEC@RB500V-40_100MA 3 A PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A HDMI/CEC 5 4 3 2 1 Sheet 25 of 45 5 Atheros Lan 4 3 2 1 ZϴϭϱϮ͕ZϴϭϲϮŽͲ>ĂLJ 26 LAN_VDD33 Ϭ͘ϭϲϯ;ϮϬŵŝůƐͿ R548 LAN_VDD33 LAN_VDD33 LAN@10K_4 R549 LAN@0_4 CKREQ# U9 C176 LAN@1U/10V_6Y 1 LAN@0.1U/16V_4Y VDD33 LED1/LED_LINK10/100n LED0/LED_ACTn LED2/CLKREQn 39 38 23 R551 LAN_LINKLED# LAN_ACTLED 52@0_4 20110719 del 10U/6.3_8X for saving spacing R579 C184 FCH_PCIE_RST#_LAN PCIE_WAKE# 62@0_4 R552 52@0_4 52@0.1U/16V_4Y AVDD_CEN C185 52@1U/10V_6Y (6,28) FCH_PCIE_RST# CKREQ# LAN@33P/50V_4N 1 2 C190 LAN_XTLO 7 LAN_XTLI 8 REFCLKP REFCLKN RX_N RX_P TX_P TX_N VDDCT AVDDL_REG AR8151/AR8152 XTLO TEST_RST TESTMODE Y1 XTLI SMDATA SMCLK LAN@25MHZ_30 LAN@33P/50V_4N 33 32 36 35 30 29 PCIE_RXP_LAN_C PCIE_RXN_LAN_C C179 LAN@1U/10V_6Y C180 C181 C182 C183 LAN@0.1U/16V_4Y LAN@0.1U/16V_4Y LAN@0.1U/16V_4Y LAN@0.1U/16V_4Y C186 C187 GND9 FCH_PCIE_LAN_CLKREQ# (6) FCH_PCIE_LAN_CLKREQ# D /$1:DNHXSIXQFWLRQ CLK_PCIE_LANP (7) CLK_PCIE_LANN (7) PCIE_TXN_LAN (7) PCIE_TXP_LAN (7) PCIE_RXP_LAN (7) PCIE_RXN_LAN (7) LAN@0.1U/10V_4X LAN@0.1U/10V_4X WƵůůhWϭϬ<ƚŽнϯsͺ^ϱŝŶ&, PCIE_WAKE# 28 27 PCIE_WAKE# (6,28) /$160%XV SB_SMBDATA1_LAN SB_SMBCLK1_LAN 26 25 SB_SMBDATA1_LAN R104 *LAN@0_4 SMB_LAN_DAT (6,28) SB_SMBCLK1_LAN R105 *LAN@0_4 SMB_LAN_CLK (6,28) 40 41 22 AVDDH 16 19 13 C275 C194 LAN@0.1U/16V_4Y 62@0.1U/16V_4Y C268 62@0.1U/16V_4Y C276 62@1U/6.3V_4X R106 GND10 50 AR8152-BL1A-R GND8 TRXP3 TRXN3 49 20 21 AVDDH AVDDL AVDDL TRXP2 TRXN2 GND7 17 18 C AVDDH TRXP1 TRXN1 48 14 15 GND1 TRXP0 TRXN0 GND6 TX1P TX1N RBIAS GND5 11 12 47 10 TX0P TX0N GND4 LAN@1U/10V_6Y 46 C193 LAN@0.1U/16V_4Y DVDDL DVDDL AVDDL AVDDL 37 24 31 34 *LAN@470P/50V_4X *LAN@470P/50V_4X AVDDH_REG GND3 C192 9 LAN@2.37K/F_4 RBIAS 45 AVDDH R103 LX GND2 C191 62@30K/F_4 AVDDL 6 $WKHURV PERSTn WAKEn VDDCT_REG/CKRn 44 LAN@1U/10V_6Y R575 5 43 C189 LAN@0.1U/16V_4Y +3V 2 3 4 42 C188 0_4 R562 DVDD_REG DVDDL AVDDL AVDDL C177 C178 CKREQ# 62@0_6 ƐĞƉĂƌĂƚĞ>EƉŽǁĞƌĨŽƌZdǁĂŬĞƵƉƐƵƉƉŽƌƚŽŶ^ϱ LAN_VDD33 +3V_S5 C LAN_VDD33 фϯͺϮϬϭϭϭϮϮϲх ĚĚ;ĨŽƌZϴϭϲϮͿ R102 *,*$ $5%/$5 $/ *LAN@0_6 +3V_S5 1 3 Q25 $5%/$5 $/ C126 LAN@ME1303_3A C270 LAN@0.01U/25V_4X *LAN@0.01U/25V_4X R164 LAN_P R328 (34) 2 C175 LAN@4.7U/6.3V_6X 2 D C174 LAN@4.7K_4 LAN@3.01K/F_4 Q26 LAN@LTC044EUBFS8TL_30MA 1 3 фϯͺϮϬϭϮϬϮϬϳх ƐƚƵĨĨϭϮϲ͕YϮϱ͕Zϭϲϰ͕ZϯϮϴ͕YϮϲ ƵŶƐƚƵĨĨZϭϬϮ B TRANSFORMER CONN PLACE NEAR LAN IC SIDE 10/100:DB0EF7LAN01 GIGA: DB0Z06LAN00 U21 TX1P TX1N RN5 TX0N TX0P L15 AVDD_CEN 52@HCB1608KF-601T10_1A AVDD_CEN_R C423 C424 C273 LAN@0.1U/16V_4Y LAN@0.1U/16V_4Y LAN@1U/10V_6Y 2 4 2 4 TX0P TX0N RN6 TX1N TX1P 8 7 6 5 4 3 2 1 TDTD+ CT NC NC CT RDRD+ TXTX+ CT NC NC CT RXRX+ 9 10 11 12 13 14 15 16 RJ45 B 1 0 LED0 = LAN_ACTLED X-TX0N X-TX0P TERM0 TERM1 X-TX1N X-TX1P C422 C421 C201 1 3 1 3 C200 LAN@0.1U/16V_4Y LAN@1000P/50V_4X SWR switch-mode regulator select Giga LAN pull High (default = 1) 0 LDO linear regulator select 10/100M LAN pull Low LAN@49.9X2 TERM2 TERM3 R108 R109 CN20 C198 1 Normal function 0 ATE test mode CKREQ# or CKREQ_G# C202 *LAN@0.1U/10V_4X LAN@1000P/50V_4X 1 LAN@0.01U/100V_6X LAN@0.01U/100V_6X C197 C199 Over-clocking disable LED1 = LAN_LINKLED# LAN@NS681610 LAN@49.9X2 Over-clocking enable (default = 1) *LAN@0.1U/10V_4X LAN@75/F_8 LAN@0.1U/16V_4Y TERM5 8 TERM5 7 LAN@75/F_8 &Žƌ D/ A U13 TX0N 1 2 TX1N 3 CH1 C564 CH4 GND VDD CH2 CH3 E@6.8P/50V_4N TX0P TX0P 6 5 LAN_VDD33 TERM5 X-TX1N C425 6 TERM5 5 TERM5 4 X-TX1P 3 LAN@220P/3KV_1808X C565 E@6.8P/50V_4N TX0N X-TX0N 2 C567 E@6.8P/50V_4N TX1P X-TX0P 1 C568 E@6.8P/50V_4N TX1N TX1P 4 *LAN@AZ1013-04S.R7G фϯͺϮϬϭϮϬϯϬϵх Ğůϭϵϱ͕ϭϵϲĨŽƌŚŝͲƉŽƚŝƐƐƵĞ фϯͺϮϬϭϮϬϭϯϬх ƐƚƵĨĨĨŽƌ D/ NC4/3NC/3+ RX-/1NC2/2- Power on Strapping pin NC1/2+ LAN_ACTLED R110 LAN@5.1K/F_6 LAN_LINKLED# R111 LAN@5.1K/F_6 A RX+/1+ TX-/0TX+/0+ GND GND 9 10 R348 *SHORT_6 Quanta Computer Inc. LAN@130456-031 PROJECT : BY7D Size Document Number Rev 1A ATHEROS LAN (AR8152B) Date: 5 4 3 2 Wednesday, March 21, 2012 1 Sheet 26 of 45 5 4 &RGHF &;= 3 2 Output AVDD_3.3 C203 C204 C205 C206 1U/10V_6Y 0.1U/16V_4Y 4.7U/6.3V_6X 0.1U/16V_4Y CN6 фϯͺϮϬϭϮϬϮϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ R114 +3V 1.2mA(20mils) *0/short_6 ADOGND +3AVDD C207 C211 C212 4.7U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y +3V *0_6 R153 0_6 R112 5.1/F_6 HPOUT-L2 R664 0_6 HPOUT-L3 HPOUT-R R113 5.1/F_6 HPOUT-R2 R665 0_6 HPOUT-R3 7 8 9 10 5 2SJ3013-009311F Layout Note: Path from +5V_IC to LPWR_5.0 and RPWR_5.0 must be very low resistance ( <0.01 ohms). C208 C209 C210 *100P/50V_4N *100P/50V_4N *0.1U/25V_6X Place bypass caps very close to device. 0.061mA(15mils) 1 2 6 3 4 Port_A# Near chip R115 HPOUT-L ADOGND GND +3V_S5 27 Output FILT_1.65V D 1 +3 +3AVDD_S5 C213 C214 C215 C216 *10U/6.3V_8X 0.1U/16V_4Y Determining HDA use +1.5V/+3V *10U/6.3V_8X 0.1U/16V_4Y GND D ADOGND ADOGND Port_A# 1A(100mils) +5AVDD Shield_GND Normal Open Jack R666 0_6 +5V D14 *VPORT 0603 220K-V05 D15 *VPORT 0603 220K-V05 HPOUT-L3 D16 *VPORT 0603 220K-V05 HPOUT-R3 GND GND GND 48.7mA(20mils) GND +3AVDD (40mils) C217 C218 *10U/6.3V_8X 0.1U/16V_4Y Output GND ([WHUQDO0,& FILT_1.8V C219 C220 C221 C222 C223 C224 C225 4.7U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_8X 10U/6.3V_8X фϯͺϮϬϭϮϬϮϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ R116 *0/short_4 +3AVDD R121 (6) ACZ_BITCLK (6) ACZ_SYNC (6) ACZ_SDIN0 (6) ACZ_SDOUT R124 33_4 0_4 ACZ_BITCLK_R SDATA_IN 5 8 6 4 15 17 RPWR_5.0 27 28 BIT_CLK SYNC SDATA_IN SDATA_OUT 12 29 3 REV-00 for EMI GND CLASSDREF RESET# AVDD_5V (6) ACZ_RST# C LPWR_5.0 9 FILT_1.65 0.1U/16V_4Y AVDD_3.3 C226 FILT_1.8 GND VAUX_3.3 VDD_IO DVDD_3.3 AVDD_HP U10 2 7 18 26 SENSE_A_R GND PCBEEP GND R127 33_4 R128 *10K_4 C233 PCBEEP_R 0.1U/16V_4Y 10 39 TP4 AMP_MUTE# (34) AMP_MUTE# PCBEEP_C 38 37 PC_BEEP C_BIAS PORTC_R PORTC_L SPDIF GPIO0/EAPD# GPIO1/SPK_MUTE# 100_4 DMIC DMIC_DATA PORTA_R PORTA_L DMIC_CLK DMIC_1/2 SENSE_A 36 35 34 33 MIC1-RR MIC1-LL MIC1-VREFO_B C228 C229 R126 GND R123 100/F_6 MIC1_L2 R667 ADOGND 0_6 MIC1_L3 MIC1_R1 R125 100/F_6 MIC1_R2 R668 0_6 MIC1_R3 2.2U/6.3V_6X 2.2U/6.3V_6X 0_4 MIC1_R1 MIC1_L1 MIC1-VREFO AVEE FLY_N FLY_P C234 D19 2 MIC1_L3 C235 C236 0.1U/16V_4Y 4.7U/6.3V_6X 2 1 *VPORT 0603 220K-V05 MIC1_R3 ,QWHUQDO6SHDNHU 5 Shield_GND GND Normal Open Jack *0.1U/25V_6X 0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y Port_B# D18 *VPORT 0603 220K-V05 GND R130 R131 R132 R133 0_6 0_6 0_6 0_6 INSPKR+N INSPKR-N INSPKL-N INSPKL+N 1 2 3 4 MIC1-RR C240 C242 *0_4 *0_4 *0_4 ADOGND CN8 SPK_R+ SPK_RSPK_LSPK_L+ GND R574 R573 R572 C C232 C231 1 *VPORT 0603 220K-V05 MIC1-LL *0.47U/6.3V_4X 7 8 9 10 GND 1U/10V_6Y EP_GND 21 20 19 D17 ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽĐŽŶŶĞĐƚŽƌ C243 *0.47U/6.3V_4X B ĚĚĨŽƌ D/ GND GND 1 2 3 4 88266-040L INSPKL-N INSPKL+N INSPKR-N INSPKR+N *0.47U/6.3V_4X GND C245 E@2200P/50V_4X ADOGND For EMI GND ACZ_SDOUT 1 2 6 3 4 2SJ3013-009311F C230 HPOUT-R HPOUT-L 23 22 GND ACZ_BITCLK *4.7U/6.3V_6X MIC1_L1 25 24 C237 C238 C241 C244 DMIC_DATA *0.47U/6.3V_4X Port_A# Port_B# 100P/50V_4N 100P/50V_4N DMIC C239 39.2K/F_4 20K/F_4 TP1 TP2 TP3 32 31 30 41 RIGHT- LEFT- RIGHT+ 16 14 13 11 LEFT+ AVEE FLY_N FLY_P B R120 R122 ADOGND NC_DR NC_DL 40 1 R119 3.3K/F_4 CX20671-21Z Place close to audio codec. R129 C227 R118 3.3K/F_4 Port_B# Low Active (30) DMIC_CLK (30) DMIC_DATA MIC1-VREFO CN7 SENSE_A PORTB_R PORTB_L B_BIAS (6) R117 5.11K/F_4 SENSE PIN A C246 C247 C248 E@2200P/50V_4X E@2200P/50V_4X E@2200P/50V_4X GND GND GND ACZ_RST# SPK_R+ C249 C250 C251 *10P/50V_4C *10P/50V_4C *10P/50V_4C SPK_R- INSPKR+N SPK_L- INSPKR-N D20 INSPKL+N INSPKL-N D21 D22 D23 *VPORT 0603 220K-V05 *VPORT 0603 220K-V05 *VPORT 0603 220K-V05 SPK_L+ *VPORT 0603 220K-V05 GND A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A AUDIO CODEC (CX20671-21Z) 5 4 3 2 1 Sheet 27 of 45 5 4 MINI Card Slot#1 (WiFi) 3 2 1 28 +1.5V Before RAMP must to remove debug card component D WIMAX_P C414 C410 C416 C413 C271 C411 C417 C272 E@0.01U/25V_4X E@0.1U/16V_4Y *10U/6.3V_8X E@0.1U/16V_4Y 0.1U/16V_4Y *C@0.1U/16V_4Y *C@0.1U/16V_4Y *C@10U/6.3V_8X D CN19 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 PLTRST#_debug PCLK__debug_R NMP@0_4 NMP@0_4 (7) PCIE_TXP_WLAN (7) PCIE_TXN_WLAN (7) PCIE_RXP_WLAN (7) PCIE_RXN_WLAN +3V (7) CLK_PCIE_WLANP (7) CLK_PCIE_WLANN 2 &,/ŶƚĞŐƌĂƚĞĚWhϴ͘Ϯ<ƚŽнϯs FCH_PCIE_WLAN_CLKREQ# (6) FCH_PCIE_WLAN_CLKREQ# 1 CLKREQ# BT_RFCTRL_BT 3 Q22 AOAC@ME2N7002E_200MA WhϭϬ<ƚŽнϯsͺ^ϱŝŶ&, *0_4 WLAN_WAKE# GND REFCLK+ REFCLKGND CLKREQ# BT_CHCLK BT_DATA WAKE# NC NC NC NC NC +1.5V GND +3.3V 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 SMBus R356 USBP7+ USBP7- USBP7+ USBP7- WLCGDAT_SMB WLCGCLK_SMB R400 *300_4 C556 (6) (6) WhϮ͘Ϯ<ƚŽнϯsͺ^ϱŝŶ&, (6,26) SMB_LAN_CLK *10P/50V_4C фϮϬϭϭϭϮϬϳͺ>ŝŶĐĂŶх ƌĞƐĞƌǀĞĨŽƌĞdžƚĞƌŶĂůh^ƉŽƌƚ͘ 16 14 12 10 8 6 4 2 FCH_PCIE_RST#_WLAN RF_EN R578 LFRAME#_PCIE LAD3_PCIE LAD2_PCIE LAD1_PCIE LAD0_PCIE 2 4 2 4 RN8 RN7 R330 0_4 FCH_PCIE_RST# RF_EN (34) 1 NMP@0X2 3 1 NMP@0X2 3 NMP@0_4 3 AOAC@0_4 NAOAC@2N7002KDW_115MA Q79B 3 4 WLCGCLK_SMB R335 NAOAC@4.7K_4 (6,26) WIMAX_P LFRAME# (7,34) LAD3 (7,34) LAD2 (7,34) LAD1 (7,34) LAD0 (7,34) WhϮ͘Ϯ<ƚŽнϯsͺ^ϱŝŶ&, R381 NAOAC@4.7K_4 C 6 (6,26) SMB_LAN_DAT WLCGDAT_SMB 1 Q79A NAOAC@2N7002KDW_115MA R360 AAA-PCI-052-P01 PCIE_WAKE# AOAC@0_4 1 2 (6,26) PCIE_WAKE# R582 +3.3V GND +1.5V LED_WPAN# LED_WLAN# NC NC USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux PERST# W_DISABLE# GND фϯͺϮϬϭϮϬϮϬϵх ƌĞƐĞƌǀĞϬŽŚŵ Q21 NAOAC@ME2N7002E_200MA R580 NAOAC@10K_4 FCH_PCIE_WLAN_CLKREQ# R343 NAOAC@0_4 CLKREQ# PCIE_WAKE# R341 AOAC@0_4 WLAN_WAKE# WIMAX_P WIMAX_P (34) BT_RFCTRL R165 BT_RFCTRL_BT 10K_4 2 C 15 13 11 9 7 5 3 1 NC C-Link_RST C-Link_DAT C-Link_CLK GND NC NC GND GND PETp0 PETn0 GND GND PERp0 PERn0 GND NC NC 5 R420 R339 2 BT_RFCTRL_BT PLTRST# (6,7,29,34) PLTRST# (7) PCLK_DEBUG Q13 1 3 LTC044EUBFS8TL_30MA B B EK͗t/DyͺWͲхнϯs K͗t/DyͺWͲхнϯsͺ^ϱ AOAC +3V_S5 WIMAX_P R166 R169 *0_6 *0_6 +3V R168 R186 NAOAC@0_6 NAOAC@0_6 WLAN_P (34) Q2 AOAC@ME1303_3A R16 2 C22 +3V_S5 3 2 1 C23 *0.01U/25V_4X Q3 AOAC@0.01U/25V_4X AOAC@4.7K_4 3 A R17 AOAC@LTC044EUBFS8TL_30MA 1 A AOAC@3.01K/F_4 Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev 1A MINI CARD Date: 5 4 3 2 Wednesday, March 21, 2012 1 Sheet 28 of 45 5 4 3 2 1 29 2 IN 1 CARD READER (Type: MMC/SD) Card Reader (AU6437B53-GDL-GR) VCC_XD 30mils D D 0_4 48M_CARD_R R151 +3V_Card C259 *1U/6.3V_4X 330_4 USBP5+ USBP5- C260 4.7U/6.3V_6X C261 C 4.7U/6.3V_6X +1.8V_Card VDDHM2 GND2 VDD3 XTALSEL NC5 NBMD CTRL1 CTRL3 DATA1 DATA0 DATA7 NC4 GPON7 EXT48IN RSTN REXT VD33P DP DM VS33P XI XO VDD1 V18 USBP5+ USBP5- USBP5+ USBP5C310 *10P/50V_4C R398 *300_4 36 35 34 33 32 31 30 29 28 27 26 25 NC3 DATA6 CTRL0 DATA5 CTRL2 AU6437B53-GDL-GR DATA4 DATA3 DATA2 XDWPN XDCEN EEPDATA EEPCLK 13 14 15 16 17 18 19 20 21 22 23 24 (6) (6) 1 2 3 4 5 6 7 8 9 10 11 12 VCC_XD CTRL2 CN9 CTRL0 trace surround with GND DATA3 DATA2 SD AU6437B53-GDL-GR ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽ/ SDWP R157 VCC_XD CTRL0 XD MS CTRL0 SDCLK XDALE MSBS CTRL1 SDWP XDCLE MSCLK CTRL2 SDCMD XDRBD CTRL3 SDCDN XDWRN CTRL4 фϮϬϭϭϭϮϬϳͺ>ŝŶĐĂŶх ƌĞƐĞƌǀĞĨŽƌĞdžƚĞƌŶĂůh^ƉŽƌƚ͘ SD_CD# 33_4 XDRDN CTRL1 DATA2 DATA1 DATA0 R9772 R9781 R9774 R9776 BLM15BD121SN1D_300MA 33_4 33_4 33_4 SD_WP SD_D2 SD_D1 SD_D0 CTRL0 CTRL2 DATA3 R9775 BLM15BD121SN1D_300MA SD_CLK R9777 R9779 33_4 33_4 SD_CMD SD_D3 10 9 8 7 6 5 3 2 1 W/P DATA2 DATA1 DATA0 VSS2 CLK VSS1 CMD DATA3 SDR009-11-F ĨŽƌ D/ GND3 15 C GND2 R146 (7) CLK_48M_CARD 0_4 R9773 14 R148 (6,7,28,34) PLTRST# CTRL3 NBMD Power saving mode enable 1 : enable (default) 0 : disable 4 U11 *33P/50V_4N R147 *10K_4 11 12 48 47 46 45 44 43 42 41 40 39 38 37 0.1U/10V_4X +3V C258 ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽ/ Clock input selection 1 : 48MHz input (default) 0 : 12MHz input VDD C257 CF_V33 NC1 AVDD5V AGND5V V33 VDDHM1 NC2 GND1 VDD2 CTRL4 XDCDN SDWPEN ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽ/ C/D CD COM *0_4 +3V_Card C255 *0.1U/16V_4Y WP COM *0_4 R143 C254 *0.1U/16V_4Y 13 R142 XTALSEL C256 0.1U/10V_4X +1.8V_Card C253 0.1U/16V_4Y NBMD CTRL1 CTRL3 DATA1 DATA0 C252 4.7U/6.3V_6X фϯͺϮϬϭϮϬϮϬϲх ĐŚĂŶŐĞEϵǀĂůƵĞƚŽ^ZϬϬϵͲϭϭͲ& MSINS *0_4 CTRL4 0.5A(30mils) +3V +1.8V_Card +3V_Card +3V_Card R158 +3V_Card *0/short_8 фϯͺϮϬϭϮϬϮϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ C265 4.7U/6.3V_6X C262 0.1U/10V_4X C263 0.1U/10V_4X SD write protect enable 1 : decided by SDWP(default) 0 : SD always write-able CTRL4 SD_CLK ф>ĂLJŽƵƚEŽƚĞх ĐůŽƐĞƚŽ/ C266 0.1U/10V_4X C267 *270P/50V_4X C14 close to CN2 C264 *33P/50V_4N B B A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev 1A CARD READER Date: 5 4 3 2 Wednesday, March 21, 2012 Sheet 1 29 of 45 5 4 3 /&'32:(56:,7&+ &&' [CCD] 2 1 +$//6(1625 %$&./,*+76:,7&+ R159 +3VPCU фϯͺϮϬϭϮϬϮϬϳх ĐŚĂŶŐĞƚŽϬŽŚŵ *0/short_4 +3V USBP6+_LCD USBP6-_LCD (6) USBP6+_LCD (6) USBP6-_LCD USBP6+_LCD_CN USBP6-_LCD_CN R399 R44 C428 1 фϯͺϮϬϭϮϬϯϭϯх ĚĞů>ϱĨŽƌůĂLJŽƵƚƌĞƋƵĞƐƚ 2 10P/50V_4C LID591# LID591# (34) MR1 *0/short_4 фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ D 300_4 30 *100K_4 R408 0_6 C405 1U/10V_6X фϮϬϭϭϭϮϬϳͺ>ŝŶĐĂŶх /ŶƚĞƌŶĂůh^ŝƐŽĐŚƌŽŶŽƵƐĚĞǀŝĐĞƐŶĞĞĚƚŽƐƚƵĨĨ ƌĞƐĂŶĚĐĂƉŽŶh^ŶĞŐĂƚŝǀĞĚĂƚĂƐŝŐŶĂů фϯͺϮϬϭϮϬϮϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ R325 *0/short_1206 D42 *VPORT 0603 220K-V05 LCDVCC U19 6 4 (4) INT_LVDS_DIGON R171 IV@0_4 R327 IV@100K_4 3 C269 1U/10V_6X 3 R46 D44 *VPORT 0603 220K-V05 APX9132H AI-TRG D IN OUT IN GND ON/OFF GND 1 2 C406 C528 5 0.1U/16V_4Y 0.01U/25V_4X C526 10U/6.3V_6X (34) DISPON_I DISPON_I AP2821KTR-G1 R178 (15) EV_LVDS_DIGON R167 IV@0_4 R183 EV@0_4 R173 IV@100K_4 INT_LVDS_BLON LVDS_BRIGHT EV@0_4 (4) (14) WϭϬ<ƚŽ'EŝŶ'Wh 1 *SMD1206P110TFT CCD_POWER C274 R170 + F2 2 +3V 10U/6.3V_8X 0_8 /&'3DQHO0RGXOH [LDS] CN10 LCD_BK_POWER C R174 VIN 0_8 +3V LCD_BK_POWER C279 C280 1000P/50V_4X 0.1U/25V_6X C277 *47P/50V_4N LCD_EDIDCLK LCD_EDIDDATA LCD_TXLOUT0LCD_TXLOUT0+ LCD_TXLOUT1LCD_TXLOUT1+ LCD_TXLOUT2LCD_TXLOUT2+ LVDS Enable +3V R175 R176 IV@4.7K_4 IV@4.7K_4 LCD_EDIDCLK LCD_EDIDDATA R58 R60 EV@2K/F_4 EV@2K/F_4 LCD_EDIDCLK LCD_EDIDDATA LCD_TXLCLKOUTLCD_TXLCLKOUT+ DISPON R172 (34) EC_FPBACK# LCDVCC LVDS_VADJ DISPON LCDVCC 1.2K/F_4 C278 *10U/6.3V_4X D39 LCP0G050M0R2R (4) INT_DPST_PWM (15) EXT_DPST_PWM (34) EC_DPST_PWM R177 IV@0_4 R184 EV@0_4 R189 *0_4 C282 (15) EV_LCD_TXLCLKOUT+ (15) EV_LCD_TXLCLKOUT- (4) INT_LCD_TXLOUT2+ (4) INT_LCD_TXLOUT2- (15) EV_LCD_TXLOUT2+ (15) EV_LCD_TXLOUT2- (4) INT_LCD_TXLOUT1+ (4) INT_LCD_TXLOUT1(15) EV_LCD_TXLOUT1+ (15) EV_LCD_TXLOUT1- LVDS_VADJ фϯͺϮϬϭϮϬϯϬϲх ƌĞƐĞƌǀĞZϭϴϵĨŽƌWtDƐŝŐŶĂůŝƐƐƵĞ *0.1U/10V_4X *4.7P/50V_4C *4.7P/50V_4C (4) INT_LCD_TXLCLKOUT+ (4) INT_LCD_TXLCLKOUT- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 (4) INT_LCD_TXLOUT0+ (4) INT_LCD_TXLOUT0- C283 R421 R419 (27) DMIC_DATA (27) DMIC_CLK CCD_POWER USBP6-_LCD_CN USBP6+_LCD_CN *22P/50V_4N 0_6 0_6 C288 C286 C287 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 DMIC_DATA_R DMIC_CLK_R 24 25 26 27 28 29 30 34 24 34 25 33 26 33 27 32 28 32 29 31 30 31 50373-03001-002 *22P/50V_4N (15) EV_LCD_TXLOUT0+ (15) EV_LCD_TXLOUT0- (4) INT_LCD_EDIDCLK (4) INT_LCD_EDIDDATA (14) EV_LCD_EDIDCLK (14) EV_LCD_EDIDDATA USBP6+_LCD_CN USBP6-_LCD_CN INT_LCD_TXLCLKOUT+ INT_LCD_TXLCLKOUT- RP8 3 1 4 2 IV@0X2 EV_LCD_TXLCLKOUT+ EV_LCD_TXLCLKOUT- RP15 4 2 3 1 EV@0X2 INT_LCD_TXLOUT2+ INT_LCD_TXLOUT2- RP7 3 1 4 2 IV@0X2 EV_LCD_TXLOUT2+ EV_LCD_TXLOUT2- RP16 4 2 3 1 EV@0X2 INT_LCD_TXLOUT1+ INT_LCD_TXLOUT1- RP6 3 1 4 2 IV@0X2 EV_LCD_TXLOUT1+ EV_LCD_TXLOUT1- RP17 1 3 2 4 EV@0X2 INT_LCD_TXLOUT0+ INT_LCD_TXLOUT0- RP5 2 4 1 3 IV@0X2 EV_LCD_TXLOUT0+ EV_LCD_TXLOUT0- RP10 1 3 2 4 EV@0X2 INT_LCD_EDIDCLK INT_LCD_EDIDDATA RP4 4 2 3 1 IV@0X2 EV_LCD_EDIDCLK EV_LCD_EDIDDATA RP11 2 4 1 3 EV@0X2 LCD_TXLCLKOUT+ LCD_TXLCLKOUT- C LCD_TXLOUT2+ LCD_TXLOUT2- LCD_TXLOUT1+ LCD_TXLOUT1INT_LCD_EDIDDATA C298 INT_LCD_EDIDCLK C300 *22P/50V_4N +3VPCU C285 0.1U/10V_4X +3VPCU C284 0.1U/10V_4X LCD_TXLOUT0+ LCD_TXLOUT0- *22P/50V_4N LCD_EDIDCLK LCD_EDIDDATA B B &57 [CRT] (4) INT_CRT_RED (4) INT_CRT_GRE (4) INT_CRT_BLU (14) EXT_CRT_RED (14) EXT_CRT_GRE фϯͺϮϬϭϮϬϯϭϰх ĐŚĂŶŐĞ>ϭϴ͕>ϭϵ͕>ϮϬƚŽ>DϭϴW'ϯϯϬ^Eϭ;ϯϯŽŚŵΛϭϬϬDͿ ICRT@0_4 CRT_RED CRT_RED L18 CRT@BLM18PG330SN1B_3A CRT_RED_L R152 ICRT@0_4 CRT_GRE CRT_GRE L19 CRT@BLM18PG330SN1B_3A CRT_GRE_L R107 ICRT@0_4 CRT_BLU CRT_BLU L20 CRT@BLM18PG330SN1B_3A CRT_BLU_L 2 D26 1 CRT@SS14L_1A 2 F3 5V_CRT2 1 CRT@SMD1206P110TFT 16 +5V R138 CRT@0.1U/16V_4Y 6 1 7 2 8 3 9 4 10 5 CRT_RED_L CRT_GRE_L R465 ECRT@0_4 R494 ECRT@0_4 R461 ECRT@0_4 CRT_BLU_L C292 C293 C294 R181 R182 CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@150/F_4 CRT@150/F_4 CRT@150/F_4 R180 C295 C296 C297 CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@6.8P/50V_4N 11 17 (14) EXT_CRT_BLU C289 (4) INT_CRT_DDCDAT (4) INT_CRT_HSYNC (4) INT_CRT_VSYNC A (14) EXT_CRT_DDCCLK (14) EXT_CRT_DDCDAT (14,16) EXT_CRT_HSYNC (14,16) EXT_CRT_VSYNC R144 ICRT@0_4 CRT_DDCCLK R136 ICRT@0_4 CRT_DDCDAT R150 ICRT@0_4 CRT_HSYNC +5V CRTDDAT 13 CRTHSYNC 14 CRTVSYNC 15 CRTDCLK CN11 CRT@DHR48-15K1200 +3V +5V (4) INT_CRT_DDCCLK 12 +3V U12 R145 ICRT@0_4 R478 ECRT@0_4 R480 ECRT@0_4 R493 ECRT@0_4 R479 ECRT@0_4 C303 C304 CRT@0.1U/25V_6X CRT@0.1U/25V_6X CRT_VSYNC +5V C291 CRT@0.1U/16V_4Y C290 CRT@0.1U/16V_4Y C299 5V_CRT2 1 CRT@0.22U/10V_4X 7 8 2 +3V VCC_SYNC SYNC_OUT2 SYNC_OUT1 VCC_DDC BYP SYNC_IN2 VCC_VIDEO SYNC_IN1 16 14 VSYNC1 HSYNC1 15 13 CRT_VSYNC CRT_HSYNC 10 11 CRT_DDCCLK CRT_DDCDAT 9 12 CRTDCLK CRTDDAT R190 R191 CRT@39/F_4 CRT@39/F_4 CRTVSYNC CRTHSYNC C301 CRT@10P/50V_4C C302 CRT@10P/50V_4C CRTDCLK CRTDDAT R192 R193 ICRT@4.7K_4 ICRT@4.7K_4 CRTDCLK CRTDDAT R204 R195 ECRT@2K/F_4 ECRT@2K/F_4 CRT_DDCDAT CRT_DDCCLK R185 R187 ICRT@4.7K_4 ICRT@4.7K_4 CRT_DDCDAT CRT_DDCCLK R522 R525 ECRT@2K/F_4 ECRT@2K/F_4 5V_CRT2 A CRT_RED_L CRT_GRE_L CRT_BLU_L 3 4 5 6 VIDEO_1 VIDEO_2 VIDEO_3 GND DDC_IN1 DDC_IN2 DDC_OUT1 DDC_OUT2 +3V CRT@IP4772CZ16 C306 CRT@10P/50V_4C C305 CRT@10P/50V_4C Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A LVDS/CCD/DRT 5 4 3 2 1 Sheet 30 of 45 5 4 3 2 2''=HURSRZHU 6$7$2'' [ODD] 1 31 [OZP] +5V_ODD CN12 GND14 D GND1 RXP RXN GND2 TXN TXP GND3 DP +5V +5V RSVD GND GND GND15 14 +5V L23 HCB1608KF-121T30_3A D C426 1 2 3 4 5 6 7 SATA_TXP1_C SATA_TXN1_C C812 C808 0.01U/25V_4X 0.01U/25V_4X SATA_RXN1_C SATA_RXP1_C C311 C312 0.01U/25V_4X 0.01U/25V_4X R303 ODD_PRSNT# 8 9 10 11 12 13 SATA_TXP1 (8) SATA_TXN1 (8) 0.1U/10V_4X SATA_RXN1 (8) SATA_RXP1 (8) 1K/F_4 +5V_ODD 15 +5V_ODD C313 C314 C315 C316 C317 *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X 0.1U/10V_4X 10U/6.3V_8X + C318 *100U/6.3V_3528P_E45b C18526-11305-L C C 6$7$+'' [HDD] CN13 GND23 B GND1 RXP RXN GND2 TXN TXP GND3 3.3V 3.3V 3.3V GND GND GND 5V 5V 5V GND RSVD GND 12V 12V 12V GND24 23 1 2 3 4 5 6 7 SATA_TXP0_C SATA_TXN0_C C817 C815 0.01U/25V_4X 0.01U/25V_4X SATA_RXN0_C SATA_RXP0_C C321 C322 0.01U/25V_4X 0.01U/25V_4X SATA_TXP0 (8) SATA_TXN0 (8) SATA_RXN0 (8) SATA_RXP0 (8) B 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ R201 +5V_HDD1 24 C325 C326 C327 *0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_8X *0/short_8 +5V + C328 *100U/6.3V_3528P_E45b SAT-22ESAB A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A HDD/ODD 5 4 3 2 Sheet 1 31 of 45 5 4 3 2 1 +3V_GPU 32 2 Thermal Sensor Whϰ͘ϳ<ƚŽнϯsWhŝŶ (25,34) 3ND_MBCLK D WhϭϬ<ƚŽнϯsͺ'WhŝŶ'Wh 6 GPU_SMBCLK 1 GPU_SMBCLK (14) D Q19A EV@2N7002KDW_115MA 5 +3V_GPU Whϰ͘ϳ<ƚŽнϯsWhŝŶ (25,34) 3ND_MBDATA 3 Q19B WhϭϬ<ƚŽнϯsͺ'WhŝŶ'Wh GPU_SMBDAT 4 GPU_SMBDAT (14) EV@2N7002KDW_115MA C C Thermal dGPU Int Thermal EC(M) 3ND_SMB EC(M) 3ND_SMB dGPU int SMBUS dGPU(M) SMB dGPU int SMBUS B B +3V FAN Control +5V R217 51!NJM FANPWR = 1.6*VSET U14 C358 2.2U/6.3V_4X ƉŝŶϭŝŶƚĞƌŶĂůWhƚŽs/E (34) 2 VIN 1 /FON VO GND GND GND VSET GND 4 VFAN1 APE8872M 8 7 6 5 3 5 6 7 8 51!NJM 10K_4 (34) +5V_FAN FANSIG1 CN17 FANSIG1 1 2 3 C569 C359 C360 2.2U/6.3V_6X 0.01U/25V_4X *0.01U/25V_4X 50273-0037L-001 фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞǀĂůƵĞƚŽϱϬϮϳϯͲϬϬϯϳ>ͲϬϬϭ G995 layout notice Gnd shape A D28 D29 FANSIG1 2 1 2 *VPORT 0603 220K-V05 +5V_FAN 1 A 1 2 3 4 Quanta Computer Inc. *VPORT 0603 220K-V05 PROJECT :BY7D Size Document Number Rev 1A THERMAL Date: 5 4 3 2 Wednesday, March 21, 2012 Sheet 1 32 of 45 5 4 3 KEY BOARD Connector 2 TOUCH PAD BOARD CN14 1 33 36 MY16 MY17 ESD Issue ESD@39P/50V_4N CAPSLED ESD@39P/50V_4N K_LED_P R205 EMI PAD +5V +5V NBSWON# NBSWON# PAD1 1 2 3 4 +5V +5V +5V 1 10KX8 2 3 4 5 +5V +5V C334 C356 C402 C429 C583 C584 C600 *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X E@2200P/50V_4X HOLE8 +3V +3V +3V +3V +3V +3V +3V фϯͺϮϬϭϮϬϭϯϬх ĂĚĚ;Kd͗Ͳϲϰϳϱ͕ϮϴϴϬͿ VIN C550 C573 C574 C575 C595 *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X E@1000P/50V_4X VIN VIN C554 C555 C559 C561 C563 C572 C594 E@0.1U/25V_4X E@1000P/50V_4X *0.1U/25V_4X E@1U/25V_6X E@1000P/50V_4X *0.1U/25V_4X E@1000P/50V_4X E@1000P/50V_4X +3V_S5 +3V_S5 +3V_S5 фϯͺϮϬϭϮϬϭϯϬх ĂĚĚ;dKW͗ͲϰϱϲϬ͘ϱϵϳϬͿ +3V_S5 +1.5VSUS +1.5VSUS C558 C591 C577 C578 C579 C580 C581 C582 C597 E@680P/50V_4X *0.1U/10V_4X E@2200P/50V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X E@2200P/50V_4X *H-C256D146PT *H-C256D146PT фϯͺϮϬϭϮϬϮϬϳх ĂĚĚ;Kd͗ͲϱϰϬ͕ϭϰϵϱͿ HOLE21 HOLE20 +5V_S5 +5V_S5 +1.8V HOLE22 +1.1V C585 C586 C588 C589 C598 C590 C592 *0.1U/10V_4X E@2200P/50V_4X E@2200P/50V_4X E@2200P/50V_4X *0.1U/10V_4X E@2200P/50V_4X *0.1U/10V_4X E@2200P/50V_4X HOLE14 6 5 4 7 8 9 *H-C91D91N HOLE15 6 5 4 *H-C91D91N 7 8 9 HOLE16 6 5 4 7 8 9 *HG-C276D118P2 фϯͺϮϬϭϮϬϭϯϬх ĂĚĚ;Kd͗ͲϭϬϳϰϬ͕ϱϱϬϬͿ H-TC236D161PB *H-C91D91N *HG-C276D118P2-A фϯͺϮϬϭϮϬϭϯϬх ĂĚĚ;dKW͗ͲϮϯϵϬ͕ϱϮϱͿ C576 +VGPU_CORE HOLE23 фϯͺϮϬϭϮϬϭϯϬх ĂĚĚ;dKW͗ͲϮϲϵϱ͕ϭϯϰϬͿ HOLE17 6 5 4 7 8 9 1 2 3 +5V_S5 B фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞǀĂůƵĞƚŽ,ͲdϮϯϲϭϲϭW 1 2 3 +5V_S5 *H-TC276BC236D118P2 HOLE7 H-TC236D161PB +3V_S5 HOLE24 *HG-C276D118P2 HOLE25 *HG-C276D118P2 HOLE26 HOLE18 6 5 4 7 8 9 HOLE19 6 5 4 7 8 9 A *HG-C276D118P2 HOLE27 *HG-C276D118P2 Quanta Computer Inc. *O-BY7-1 5 4 3 1 фϯͺϮϬϭϮϬϮϬϳх ĐůŽƐĞƚŽWϭϯϮ 1 PROJECT : BY7D C604 E@220P/50V_4X 1 A +5V_S5 HOLE3 *H-TC315BC276D118P2 HOLE6 H-TC236D161PB C602 E@220P/50V_4X *H-C276D118P2 +3VPCU *H-TC315BC276D118P2 HOLE5 фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞǀĂůƵĞƚŽ,ͲϮϱϲϭϰϲWd 1 +3V_S5 фϯͺϮϬϭϮϬϮϬϳх ĂĚĚ;dKW͗ͲϰϵϬ͕ϭϴϮϱͿ VIN C553 +3V_S5 HOLE2 C603 E@220P/50V_4X фϯͺϮϬϭϮϬϮϬϵх ĂĚĚ;dKW͗Ͳϱϱϭϱ͕ϲϭϮϱͿ VIN HOLE10 1 VIN HOLE1 *H-TC276BC217D146P2 1 C549 1 C436 VIN HOLE11 *H-TC276BC217D146P2 HOLE12 C432 VIN C фϯͺϮϬϭϮϬϯϭϮх ĂĚĚWĂĚϭĨŽƌ D/ +3V C431 VIN 1 2 3 4 5 6 7 8 *50503-0080N-001 HOLE9 *H-TC276BC217D146P2 B VIN PAD3 1 C320 SMB_RUN_DAT SMB_RUN_CLK WhƚŽнϯsŝŶ&, +5VPCU *0.1U/10V_4X +3V (6,11,12) SMB_RUN_DAT (6,11,12) SMB_RUN_CLK фϯͺϮϬϭϮϬϯϭϲх ƐƚƵĨĨ ^ƐŽůƵƚŝŽŶĨŽƌƉŽǁĞƌďŽĂƌĚ C319 +3V 1 2 3 4 5 6 7 8 TPCLK_L TPDATA_L BOARD_ID10 WhƚŽнϯsŝŶ&, MX7 MX2 MX3 MX4 PAD2 CN23 +5V D33 C354 ESD@LCP0G050M0R2R 220P/50V_4X HOLE +5V (0,3DG CN16 (34) CAPSLED (34) 10 9 8 7 6 C5548 E@0.1U/16V_4X 73ERDUG 73'! Power Board (UIF) RP25 MX1 MX6 MX5 MX0 C5561 E@2200P/50V_4X фϯͺϮϬϭϮϬϭϯϬх ĂĚĚĨŽƌ D/;ĐůŽƐĞƚŽdWKEEͿ +3VPCU фϯͺϮϬϭϮϬϯϮϭх hD͗ƐƚƵĨĨϭϬϬƉ&ĨŽƌ D/ /^͗ƐƚƵĨĨϯϵƉ& D 88513-064N E@1000P/50V_4X фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞǀĂůƵĞƚŽϵϭϱϬϰͲϯϰϰE 91504-344N K_LED_P 150_4 +3V L C5549 88513-044N 35 фϯͺϮϬϭϮϬϯϭϯх ƐƚƵĨĨĨŽƌ ^ +3V *10P/50V_4C *H-C236D118P2 1 C355 C353 C *10P/50V_4C H TEXTURE 1 ESD@39P/50V_4N ESD@39P/50V_4N C336 default Metal/IMR 1 2 3 C357 C373 (6,8) BOARD_ID10 C335 ID_Detect 1 MY2 MY1 MY0 MY4 BOARD_ID10 1 2 3 4 5 6 1 ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N C332 4.7U/6.3V_6X 1 2 3 C349 C350 C351 C352 (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) (34) 1 2 3 4 5 6 1 2 3 MY3 MY5 MY14 MY6 MY2 MY1 MY0 MY4 MY3 MY5 MY14 MY6 MY7 MY13 MY8 MY9 MY10 MY11 MY12 MY15 MX7 MX2 MX3 MX4 MX0 MX5 MX6 MX1 +5V TPCLK_L TPDATA_L 0_6 0_6 1 ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N CN15 L25 L24 (34) TPCLK (34) TPDATA C5547 E@0.1U/16V_4X 1 C345 C346 C347 C348 (34) +5V K_LED_P MY2 MY1 MY0 MY4 MY3 MY5 MY14 MY6 MY7 MY13 MY8 MY9 MY10 MY11 MY12 MY15 MX7 MX2 MX3 MX4 MX0 MX5 MX6 MX1 K_LED_P CAPSLED 1 2 3 MY7 MY13 MY12 MY15 (34) MY17 1 ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N MY16 1 C341 C342 C343 C344 MY17 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 MX0 MX5 MX6 MX1 ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N K_LED_P MY16 1 C337 C338 C339 C340 D MX7 MX2 MX3 MX4 ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N ESD@39P/50V_4N 1 C329 C330 C331 C333 *H-TC197BC131D91P2 2 Size Document Number Date: Wednesday, March 21, 2012 Rev 1A KBC/TP/FP CONN. *H-TC197BC131D91P2 Sheet 1 33 of 45 5 4 3 2 1 ,QWHO7XUERPRGHRQO\ EC APU_PROCHOT#_VDDIO 34 (4,7) 3 фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞZϮϮϯƚŽϮ͘ϮŽŚŵ; ^ƐŽůƵƚŝŽŶĨŽƌ Ϳ ƵŶƐƚƵĨĨϯϭĂŶĚƐƚƵĨĨZϮϮϯ Q23 +3VPCU D31 *RB500V-40_100MA +3V L21 HCB1608KF-601T10_1A +A3VPCU R223 +3V_VDD_EC H_PROCHOT_EC 2 2.2_6 FDV301N_200MA (7) 3 126 127 128 1 2 LFRAME# LAD0 LAD1 LAD2 LAD3 PCLK_591 CLKRUN# CLKRUN# 8 EC_EXT_SCI# LPCPD# PLTRST# 7 (6) (6,7,28,29) (7) SERIRQ SERIRQ R188 (6,24) USB_NORMAL_OC# (33) (33) (33) (33) (33) (33) (33) (33) MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) (33) MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17 53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33 (6,36) MBCLK (6,36) MBDATA (4) 2ND_MBCLK (4) 2ND_MBDATA (25,32) 3ND_MBCLK (25,32) 3ND_MBDATA 70 69 67 68 119 120 C 2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA (33) TPCLK (33) TPDATA (7,39,42) GFXPG_1V_EN (24) USB_SC_EN# (7,10) RTC_CLK фEŽƚĞх tŚĞŶƚŚĞW /ŝŶƚĞƌĨĂĐĞŝƐŶΖƚƵƐĞĚ͕sddƐŚŽƵůĚďĞĐŽŶŶĞĐƚĞĚƚŽ'E͘ SERIRQ GPIO65/SMI KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 KBSOUT0/JENK KBSOUT1/TCK KBSOUT2/TMS KBSOUT3/TDI KB KBSOUT4/JENO KBSOUT5/TDO KBSOUT6/RDY GPIO56/TA1 TIMER GPIO20/TA2/IOX_DIN_DIO KBSOUT7 KBSOUT8 GPIO14/TB1 KBSOUT9/SDP_VIS KBSOUT10/P80_CLK KBSOUT11/P80_DAT GPIO15/A_PWM KBSOUT12/GPIO64 GPIO21/B_PWM TIMER KBSOUT13/GPIO63 GPIO13/C_PWM KBSOUT14/GPIO62 GPIO32/D_PWM KBSOUT15/GPIO61/XOR_OUT GPIO45/E_PWM GPIO60/KBSOUT16 GPIO40/F_PWM GPIO57/KBSOUT17 GPIO66/G_PWM GPIO33/H_PWM GPIO17/SCL1 GPIO22/SDA1 GPIO73/SCL2 GPIO74/SDA2 GPIO23/SCL3 GPIO31/SDA3 GPIO34 SMB GPIO00/EXTCLK 12 13 VTT PECI NPCE885LA0DX L22 R257 R258 *10K_4 *10K_4 *22_4 SKU_STRAP_3 H_PROCHOT_EC (33) (30) 6WUDS SLP_S5# (6) MPWROK (10) RSMRST_GATE# (6) USB_BUS_SW2 (24) RF_EN (28) CEC_EC_HP (25) 0_4 DNBSWON#_uR GPIO82 TP6 R261 *10K_4 R233 *0_4 D32 DISPON_I A0H 98H Touch Sensor 58H HDMI CEC 34H Light Sensor 52H SHBM=0: Enable shared memory with host BIOS R231 10K_4 (30) DNBSWON# +3VPCU U16 2ND_MBCLK 2ND_MBDATA (6) 1SS355_100MA 6 5 SCL SDA 7 WP Remove Zero Power ODD funciton A0 A1 A2 1 2 3 VCC GND 8 4 0.003A(20mils) C C371 M24C08-WMN6TP TP11 0.1U/10V_4X 31 117 63 SKU_STRAP_1 32 118 62 65 22 16 81 66 RF_LED# ADDRESS: A0H TP7 FANSIG1 (32) RF_LED# (35) SUSLED_EC# (35) BAT_SAT0# (35) BAT_SAT1# (35) SUSON (38) MAINON (37,39,40) CAPSLED (33) EC_DPST_PWM (30) 14 BT_RFCTRL VCC_POR 85 VCC_POR# R243 104 VREF_uR R309 R239 LAN_P R358 R242 R489 R490 R491 (28) 63,)/$6+ BY6-A1A Del SPI ROM фϯͺϮϬϭϮϬϯϬϲх ƌĞƐĞƌǀĞĨŽƌWtDƐŝŐŶĂůŝƐƐƵĞ +1.1V_DUAL_EN 10K_4 (40) LAN_P (26) FCH_SPI_SI (8) 0_4 *100K/F_4 33_4 33_4 33_4 FCH_SPI_SO (8) FCH_SPI_CS0# (8) FCH_SPI_CLK (8) MX25L3205DM2I-12G: AKE39FP0Z00 W25Q16BVSSIG: AKE38FP0N01 Make sure that the rise time of VCC_POR is less than 10?sec. 4.7K_4 *0/short_4 +3VPCU +A3VPCU ,17(51$/.(<%2$5'675,3 6(7 фϯͺϮϬϭϮϬϮϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ +3VPCU R245 MY0 NPCE791LA0DX: 10K_4 AJ007910F00 (w/o CIR) B C374 /('383' 1U/10V_6X +:3*FLUFXLW фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞǀĂůƵĞƚŽϱϬϮϳϯͲϬϬϯϳ>ͲϬϬϭ &,/ŶƚĞŐƌĂƚĞĚWhϭϬ<ƚŽнϯsͺ^ϱ EC_EXT_SCI# 32H VGA Board Thermal Sensor SHBM ,'((3520 +3V_S5 *10P/50V_4C 3 3D Sensor EC EEPROM Disabled ('1') if using FWH device on LPC. Enabled ('0') if using SPI flash for both system BIOS and EC firmware 0_4 8769AGND C375 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 4.7K_4 RF_EN R203 HWPG MPWROK RSMRST_GATE# R149 USB_BUS_SW2_EC RF_EN Address PCH SML1 2 +3VPCU R222 R227 R101 R100 R229 R230 MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA TP5 AMP_MUTE# (27) ID (36) USB_BUS_SW3 (24) D/C# (36) S5_ON (37) USB_BUS_SW3 GPIO55/CLKOUT/IOX_DIN_DIO 0_6 NBSWON# фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞZϮϬϮƚŽϭ͘Ϯ<ŽŚŵ; ^ƐŽůƵƚŝŽŶĨŽƌ Ϳ LID591# (30) TP12 PWRLED# (35) VRON (41) PWRLED# 30 &,/ŶƚĞŐƌĂƚĞĚWhϴ͘Ϯ<ƚŽнϯs &,/ŶƚĞŐƌĂƚĞĚWhϳ͘ϱ<ƚŽнϯs SERIRQ CLKRUN# SKU_STRAP_2 1.2K/F_4 Devices Battery 1 R202 GPU_VRON (42) VFAN1 (32) WLAN_P (28) EC_FPBACK# ACIN (36) 60%867DEOH SMBUS SLP_S3# (6) F_SDI/F_SDIO1 F_SDIO&F_SDIO0 F_CS0 F_SCK PCLK_591 +3V 6 64 79 93 114 109 15 80 17 20 21 24 25 26 27 28 73 74 75 82 83 84 91 110 112 107 60%8638 TEMP_MBAT (36) ICMNT (36) AC SET_EC (36) USB_BUS_SW4 (24) USB_SC_OC# (6,24) GPU_MAINON (42) 101 105 106 SPI_SDI_uR SPI_SDO_uR SPI_CS0#_uR SPI_SCK_uR VREF +3VPCU NBSWON#_R 86 87 90 92 PS/2 FIU *100K/F_4 ICMNT AC SET_EC USB_BUS_SW4 R179 0_4 TP_ON_OFF B R246 97 98 99 100 108 96 95 94 113 23 111 GPIO87/SIN_CR GPIO46/TRST GPO83/SOUT_CR/TRIST IR GPIO37/PSCLK1 GPIO35/PSDAT1 GPIO26/PSCLK2 GPIO27PSDAT2 77 1 4 GPIO67/PWUREQ 72 71 10 11 GFXPG_1V_EN GPIO24 GPIO01/TB2 GPIO02 GPIO06/IOX_DOUT GPIO16 GPIO30 GPIO36 GPIO41 GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO GPO47/SCL4 GPIO50/PSCLK3/TDO GPIO51 GPIO52/PSDAT3/RDY GPIO53/SDA4 GPIO70 GPIO71 GPIO72 GPIO75 GPO76/SHBM GPIO77 GPIO81 GPO82/IOX_LDSH/TEST GPO84/IOX_SCLK/XORTR GPIO97 LREST 9 54 55 56 57 58 59 60 61 GPIO94/DA0 GPIO95/DA1 GPIO96/DA2 LPC GPIO10/LPCPD 125 0_4 D/A ECSCI/GPIO54 R225 GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3 GPIO05/AD4 GPIO04/AD5 GPIO03/AD6 GPIO07/AD7 A/D KBRST/GPIO86 123 (24) USB_NORMAL_EN# H=1.6mm GPIO85/GA20 29 124 D GPIO11/CLKRUN 122 (6) EC_KBRST# (6) EC_EXT_SCI# R224 100K_4 8769AGND LFRAME LAD0 LAD1 LAD2 LAD3 LCLK 121 (6) EC_A20GATE 10U/6.3V_6X VCORF (7,28) (7,28) (7,28) (7,28) (7,28) (7) 0.1U/10V_4X VDD U5030 фϯͺϮϬϭϮϬϯϬϲх ƌĞƐĞƌǀĞĨŽƌ ^ 10U/6.3V_6X AGND ESD@39P/50V_4N 0.1U/10V_4X 44 C717 0.1U/10V_4X C363 VCORF_uR C369 0.1U/10V_4X C362 103 C368 0.1U/10V_4X 102 C367 0.1U/10V_4X AVCC C366 0.1U/10V_4X C361 GND1 GND2 GND3 GND4 GND5 GND6 C365 10U/6.3V_6X C370 5 18 45 78 89 116 C364 VCC1 VCC2 VCC3 VCC4 VCC5 D 19 46 76 88 115 R221 2.2_6 CN18 RF_LED# TP_ON_OFF 1 2 3 LAN_P ȱȱŗŗ R247 NAOAC@10K_4 +5V R249 AOAC@10K_4 +5V_S5 +3VPCU +3V R251 R252 *10K_4 10K_6 *DEBUG@50273-0037L-001 +5VPCU AC SET_EC R154 ICMNT C377 73LQWHUIDFH38 C378 *10U/6.3V_8X .%&! *10U/6.3V_8X PWRLED# R248 10K_4 SUSLED_EC# R266 10K_4 BAT_SAT0# R259 (37) SYS_HWPG BAT_SAT1# R255 R256 8769AGND *10K_4 *10K_4 R265 (38) HWPG_1.5V 10K_4 TPCLK TPDATA (40) 1.8V_PWROK 6.8VWUDSSLQ (40) +1.1V_HWPG 3RZHU%XWWRQ (39) +3VPCU A SKU_STRAP_1(GPIO56) SKU_STRAP_2(GPIO02) SKU_STRAP_3(GPIO41) 0 0 0 Brazos UMA 0 0 1 Brazos DIS 1 0 R260 0_4 D46 *1SS355_100MA фϯͺϮϬϭϮϬϮϬϮх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ +1V_HWPG *0/short_4 R156 *0_4 D47 *1SS355_100MA R160 0_4 HWPG фϯͺϮϬϭϮϬϯϬϲх ƵŶƐƚƵĨĨZϭϱϲĨŽƌ,tW'ŝƐƐƵĞ D34 *1SS355_100MA R162 0_4 D40 *1SS355_100MA A SKU R263 EV@10K_4 0 *1SS355_100MA R155 10K_4 +3V 8769AGND 0_4 D45 COMAL UMA 0 1 1 COMAL DIS 1 0 0 Deccan UMA 1 0 1 Deccan DIS R264 *10K_4 R279 *10K_4 SKU_STRAP_3 SKU_STRAP_2 SKU_STRAP_1 DNBSWON#_uR NBSWON#_R R267 IV@10K_4 R278 10K_4 R268 10K_4 C376 SW2 *0.1U/10V_4X *SHORT_ PAD D36 *LCP0G050M0R2R Quanta Computer Inc. PROJECT :BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A EC NPCE795CA0DX 5 4 3 2 1 Sheet 34 of 45 5 LED 4 3 2 œŇġōņŅ /('! 1 /('! 35 ŃłŕņœœŚ 3 +5VPCU LED3 2 -BATLED0 R139 +5V 2.2K_4 BAT_SAT0# (34) 1 3 D -BATLED1 R141 1.2K/F_4 BAT_SAT1# (34) ;tŚŝƚĞͿ +5V_S5 R64 NAOAC@0_4 R66 AOAC@0_4 2 LED4 RF_LED_R 1 R140 1.2K/F_4 RF_LED# ;ŵďĞƌͿ (34) 12-21/S2C-AQ2R2B/2C ;ŵďĞƌͿ D 12-12Z/S2ST3D-C31/2C(QN) őŐŘņœ /('! ņŔŅġőųŰŵŦŤŵ (6'! +5VPCU LED1 2 -PWRLED R135 *1.5K/F_4 3 SUSLED R137 1.2K/F_4 PWRLED# PWRLED# (34) 1 -PWRLED SUSLED_EC# SUSLED_EC# -BATLED0 1 (34) 12-11Z/T3D-CP2Q2B12Y/2C(QN) SUSLED 2 RF_LED_R 1 3 1 3 -BATLED1 D2033 *PJMBZ5V6 2 3 2 D2034 *PJMBZ5V6 D2035 *PJMBZ5V6 C C > WͬE tzϬϬϬϳϬ ;tŚŝƚĞͬŵďĞƌͿ t,ϬϬϱϭϬϬ ;tŚŝƚĞͿ ĞŚĂǀŝŽƌ ƉŽǁĞƌŽŶ͗tŚŝƚĞ> ďƌŝŐŚƚ ƐůĞĞƉ͗ŵďĞƌ> ďůŝŶŬ ƉŽǁĞƌŽŶ͗tŚŝƚĞ> ďƌŝŐŚƚ ƐůĞĞƉ͗tŚŝƚĞ> ďůŝŶŬ ƌĞƐ Zϭϯϱ͗ƐƚƵĨĨϭ͘ϱ< Zϭϯϳ͗ƐƚƵĨĨϭ͘Ϯ< Zϭϯϱ͗ƵŶƐƚƵĨĨ Zϭϯϳ͗ƐƚƵĨĨϭ͘ϱ< B B A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Monday, March 19, 2012 Rev 1A LED 5 4 3 2 Sheet 1 35 of 45 5 4 3 VA1 PCN1 DC_JACK 4 0.01_3720 PR1 PD1 PF1 F1206HA15V024TM VA0 1 2 1 VA2 3 2 PQ1 TPCA8109 R1 1 1 1 2 3 VA3 2 2 36 PQ27 TPCA8109 VIN 1 2 3 5 BAT-V 5 3 PC34 E@0.1U/50V_6X PC20 0.1U/25V_4X PD2 PR22 220K/F_4 PC95 1U/25V_6X 4 PC33 PC2 E@0.1U/50V_6X 1000P/50V_4X 4 PC1 1000P/50V_4X 2 1 SBR1045SP5-13 PR127 33K_6 50322-0044L-001 TVS_SMAJ20A PR105 10/F_6 PD3 1SS355_100MA D PR109 10/F_6 ( Near by sense R side) PR20 220K/F_4 1 6 2 5 3 CSIN PR12 82.5K/F_6 PC101 ϮϬϭϭϭϬϮϲ ƐƚƵĨĨWϵϱ͕WϭϬϭĨŽƌ D/ 2200P/50V_4X 4 PQ4 IMD2AT108 +3VPCU PR126 10K_6 3 фϯͺϮϬϭϮϬϯϭϮх ϮϬϭϭϭϬϮϲ ƐƚƵĨĨWϯϯ͕Wϯϰ;Ϭ͘ϭƵ&ͿĨŽƌ D/ ƐƚƵĨĨWϭ͕WϮĨŽƌ D/ Wϯϯ;dKW͗ͲϮϮϳϬ͕ϲϵϮϬͿ Wϯϰ;dKW͗ͲϮϬϲϱ͕ϲϴϬϱͿ 2 1 D (34) PQ28 2N7002K_300MA 2 D/C# 1 CSIP (34) AC SET_EC (6,34) MBDATA (6,34) MBCLK MBDATA 11 MBCLK 9 VDDSMB SDA PC87 *E@10U/25V_8X фϯͺϮϬϭϮϬϯϬϵх ƐƚƵĨĨWϴϮ͕Wϴϱ 5 VDDP PC85 10U/25V_8X PC17 10U/25V_8X PC16 10U/25V_8X B-TEST change PC24 1U/6.3V_4X 1 2 21 26 VCC +3VPCU B-TEST change PC91 0.1U/10V_4X 27 1 33 32 31 30 28 ACIN ACIN NC GND GND GND GND CSSP (34) PR33 4.7_6 PC68 0.1U/10V_4X PC15 *2200P/50V_4X B-TEST change ( Near by IC side) C PC82 0.1U/25V_4X B-TEST DEL B-TEST DEL C PQ24 PR122 2.7_6 BOOT 25 UGATE 24 PC89 0.1U/50V_6X AON7410 4 0.01_3720 PR129 3 2 1 PR10 10K/F_4 CSSN PC18 10U/6.3V_8X VIN B-TEST change PC76 1U/6.3V_4X 1 2 PR138 10K/F_4 88731A_U_GATE PL2 DCIN 22 3.2V 88731ACIN 2 PR15 22K/F_6 3 BTS1E-9K8040 4 B-TEST CHANGE PR6 *100K_4 PR5 *0/short_4 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ B-TEST ADD FOR ESD 10 MBAT+ CSOP NC 6 VCOMP (34) 7 2 PR3 100/F_4 MBDATA MBCLK VBF 15 GND 29 ϮϬϭϭϭϬϮϲ ĂĚĚWϭϰϱĨŽƌ D/ CSON B PR25 BAT-V 100_4 (Please place this R near by battery pack side) B-TEST DEL PR124 ICMNT (34) 100_4 1 2 CSOP B-TEST DEL PC70 0.01U/25V_4X PR4 08/29 change pin define NC 16 PR108 *10K/F_4 PC7 0.01U/25V_4X B-TEST change TEMP_MBAT (34) B-TEST DEL 1K_4 A ( Near by sense R side) 17 B-TEST change 100K_4 47P/50V_4N 18 B-TEST change 1 1 *1U/10V_4X 2 PR9 100/F_4 2 47P/50V_4N PR8 PR44 10/F_6 PC66 1000P/50V_4X PR104 2.21K/F_6 +3VPCU PC10 PC5 PR34 10/F_6 CSON ICOMP 5 PR102 2.2/F_6 ( Near by IC side) VREF PR182 PC6 PQ26 AON7410 4 PC25 0.1U/10V_4X NC ID TEMP_MBAT_C M-DATA M-CLOCK 11 PCN2 BAT-V ID_CN 88731A_L_GATE ACIN 1K_4 1 1 2 3 4 5 6 7 8 9 PF2 F1206HA15V024TM 1 2 PGND 19 B-TEST change PR16 82.5K/F_6 +3VPCU DCIN 20 10U/25V_8X PC99 MBCLK PU4 ISL88731CHRTZ-T LGATE BAT-V 10U/25V_8X PC69 4 +3VPCU ACOK PC93 0.1U/25V_6X PR139 49.9/F_6 2 0.1U/25V_4X PC145 CH3 13 MBDATA 3 2 1 VP 5 ϮϬϭϭϭϭϬϭŵŽĚŝĨLJŶĞƚŶĂŵĞƚŽ/ͺE B 1 3.3UH_7X7_TOK GND CH2 88731A_PHASE PC79 10U/6.3V_8X 6 VN 23 12 3 CH4 NC TEMP_MBAT CH1 14 2 ICM 1 PHASE 8 ID SCL 5 10 PD4 TVLST2304AD0 PC3 0.01U/25V_4X A B-TEST change Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev CHARGER-ISL88731C 5 4 3 2 Sheet 1 1A 36 of 45 5 4 3 2 1 (Peak 0mA) PC103 10U/25V_8X +5VPCU PC105 0.1U/25V_4X PC102 0.1U/25V_4X PC108 (4,14) SYS_SHDN# 1 PR39 2.2/F_6 (Peak 35mA) PC97 10U/25V_8X VIN 37 VIN VIN 2 10U/6.3V_6X B-TEST change +3VPCU PR149 5V_LGATE1 19 5V_FB1 2.2/F_6 24 2 4 DDPWRGD_R PR123 *0_2/S PC111 1000P/50V_4X 23 1 PHASE2 TOP Side LGATE1 LGATE2 VOUT1 FB1 PGOOD 9 11 2.2_6 3V_PHASE2 12 3V_LGATE2 10 OCP:5A +3V_S5 OUT2 FB2 0.1U/25V_6X PL6 +3.3V_1 B-TEST change 2.2UH_7X7_TOK PR153 7 PC119 4 3V_FB2 5 2.2/F_6 AON7702A B-TEST change PC104 +3VPCU 1000P/50V_4X PR115 Rds(on) 13m ohm 69.8K/F_4 PR148 *0_4/S PR37 10K/F_4 PC37 (34) 0.1U/25V_6X 2 10K/F_4 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ S5_ON C PR114 *0/short_6 2 B-TEST change фϯͺϮϬϭϮϬϮϭϬх ĐŚĂŶŐĞWϭϭϵƚŽϮϮϬhͬϲ͘ϯsͺϳϯϰϯWͺ Ϯϱďϳϯϰϯ PR107 1 PR112 10K/F_4 PD7 BAV99W-7-F_150MA + 6.8K/F_4 PR116 *0_2/S 162K/F_4 B-TEST change B-TEST change PR110 PQ33 PR111 Rds(on) 13m ohm 15.4K/F_4 C (Peak 3.418A, AVG 2.392A) 4 3 2 1 573 PHASE1 5 2 3 BOOT2 AON7702A B-TEST change PR113 REF VREG3 8 16 BOOT1 1 1 2 3 PQ35 UGATE2 3V_UGATE2 PR131 PC96 1 2 220U/6.3V_7343P_E25b 220U/6.3V_7343P_E25b PR155 UGATE1 AON7410 4 5 PC120 + 20 5 2.2UH_7X7_TOK 2.2_6 5V_PHASE1 PQ34 TONSEL 3 2 1 0.1U/25V_6X PR13 *0_2/S B-TEST change SKIPSEL GND GND 1 2 3 B-TEST change PL7 +5V_1 PC74 1U/6.3V_4X 14 25 15 PC98 EN ENTRIP2 5V_UGATE1 21 PR136 1 25V_BST1 22 6 13 4 VIN OCP:11.5A PU5 ENTRIP1 5 AON7410 (Peak 9.212A ,AVG 6.499A) +5V_S5 1 2 0.1U/25V_6X PQ36 B-TEST change D 10U/6.3V_6X PC84 17 PC109 VREG5 *0/short_4 EMC фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ 18 D +2VREF +3VPCU 3 PC50 0.1U/25V_4X 1 PR130 *10K/F_4 2 3 1 PR158 DDPWRGD_R SYS_HWPG (34) B-TEST change 0.1U/25V_6X PC117 22_8 PC110 0.1U/25V_6X PD8 BAV99W-7-F_150MA B-TEST change +15V_ALWP +15V 3V_LGATE2 +5V_S5 +3V_S5 +15V B-TEST change фϯͺϮϬϭϮϬϯϬϴх ĐŚĂŶŐĞƉŽǁĞƌƐŽƵƌĐĞ +3V_S5 VIN +3V 2N7002KDW_115MA PR54 1M/F_4 MAIND MAIND MAIND PQ18 AO6402A 3 (38) (38,40,42) GPU_MAIND GPU_MAIND MAIND TOP Side 5 PR35 100K_4 2 1 3 5 PQ5B 2N7002KDW_115MA 2 PQ9B PC42 2200P/50V_4X +3V +3V_GPU +5V *22_8 PR56 +1.1V 22_8 PR145 LTC044EUBFS8TL_30MA PQ9A 1 PQ3 3 2 MAINON 1 (34,39,40) PR32 1M/F_4 PQ39 AO6402A 3 B 4 TOP Side 4 6 B-TEST change 6 PQ5A 4 3 B 1 2 5 6 PQ17 EV@AO6402A 3 4 2N7002KDW_115MA B-TEST change 4 PR19 22_8 1 2 5 6 B-TEST change 1 2 5 6 PR24 1M/F_4 (Peak 0.06A) (Peak 1.237A, AVG 0.866A) (Peak 4.7683A, AVG 3.338A) 2N7002KDW_115MA PR55 *22_8 +1.5V 3 +5V 2 1 PQ8 *2N7002K_300MA ϮϬϭϭϭϬϮϴƵŶƐƚƵĨĨ WZϱϱ͕WYϴ A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev System 3V/5V(TPS51123A) 5 4 3 2 Sheet 1 37 1A of 45 4 3 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ 1 S5_1.5V PR132 76.8K/F_4 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ (34) *0_4 S5_1.5V SUSON VIN (34) D *0/short_4 PR143 100K_4 PR147 PC107 0.1U/25V_6X 2.2/F_6 B-TEST CHANGE ϮϬϭϭϭϬϮϲ ƐƚƵĨĨWϭϭϯĨŽƌ D/ PC113 0.1U/25V_4X PGND VDDQSNS 9 DRVH SW 13 V5IN 12 DRVL 11 1.5SUS_HG 4 PQ37 f : 400k Hz AOL1428A ESR : 9mȍ 1 2 3 15 14 OCP:19A (Peak 16.32A, AVG 11.5A) PL3 1.5UH_10X10 1.5SUS_PHASE +1.5VSUS_SRC +1.5VSUS 5 S5 S3 TRIP MODE REFIN VBST +5V_S5 PQ30 PR134 10 6 VTTREF GND VTTGND 8 VTT 4 24 25 26 PGOOD 5 16 18 17 PR125 19 20 22 21 SUSON 1.5SUS_LG PC114 + 4 1 1 2 3 2.2/F_6 B-TEST DEL 38 *0/short_4 330U/2V_7343P_E9c +SMDDR_VREF PR137 PR141 TPS51216RUKR 3 5 PwPad VLDOIN PwPad-3 PwPad-4 PwPad-5 10U/6.3V_6X PC72 B-TEST CHANGE 10U/6.3V_6X PC77 +1.5VSUS_SRC VTTSNS 7 2 VREF 1 +SMDDR_VTERM PwPad-2 PU6 PwPad-1 23 (34) HWPG_1.5V (Peak 0.5A, AVG 0.35A) C 200K_4 S3_1.5V 2 D S3_1.5V Be careful to this two net name. PR120 *10K/F_4 1 PC41 10U/25V_8X +3V_S5 2 PR23 PC112 10U/25V_8X 5 2 (Peak 0.1A, AVG 0.07A) AOL1412 PC106 1U/6.3V_4X B-TEST CHANGE PC94 PC78 0.22U/10V_4X PC45 *0.1U/10V_4X B-TEST CHANGE 1000P/50V_4X C B-TEST CHANGE RDSon=3.3m ohm PC86 0.1U/10V_4X PR128 10K/F_4 R1 Vout = (R1/R2) X 0.75 + 0.75 +1.5VSUS +1.5VSUS B 5 B PC92 0.01U/25V_4X PQ16 (37,40,42) GPU_MAIND MAIND MAIND EV@AON7202 PQ2 AO6402A 3 4 4 (37) GPU_MAIND 3 2 1 R2 1 2 5 6 PR133 52.3K/F_4 +1.5V_GPU (Peak 4.1A, AVG 2.87A) A A +1.5V (Peak 0.5A, AVG 0.35A) Quanta Computer Inc. PROJECT : BY7D Size Document Number Rev DDR Date: 5 4 3 2 Wednesday, March 21, 2012 1A Sheet 1 38 of 45 5 4 3 2 1 39 D D VIN PQ41 PC124 0.1U/25V_4X 5 PC123 1 PC122 10U/25V_8X +5V_S5 2 AON7410 1U/6.3V_4X B-TEST change PR166 R2 4 GND PL8 51211_SW_2 8 10K/F_4 +1V_HWPG 6 (34) +3V *10K_4 11 PR161 + PR164 51211_DRVL_2 2.2/F_6 4 PC128 B-TEST change R1 PQ40 AON7702A B-TEST change 4.53K/F_4 C PC126 1000P/50V_4X RDSon=13m ohm PC127 2 +1.0V 2.2UH_7X7_TOK 1 PC129 15 DRVL (Peak 8.54A, AVG 6A) 51211_DRVH_2 0.1U/25V_6X 0.1U/10V_4X TST 16 PR165 470K/F_4 2.2_6 9 5 PGOOD PC121 2 2 C PR167 SW VFB GND 5 EN GND 4 DRVH GND 3 51211_VFB_2 1 PC125 *1U/6.3V_4X B-TEST change 1 *0/short_4 VBST TRIP 1 10 12 51211_EN_2 MAINON 2 (34,37,40) V5IN GND 2 13 2 PR163 PR160 GND 7 14 51211_V5IN_2 3 2 1 PU7 PR162 124K/F_4 1 3 2 1 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ B-TEST change TPS51211DSCR 1 390U/2.5V_105CS_E10f *39P/50V_4N Vout=0.704V*(R1+R2)/R2 VIN +15V PR67 EV@1M/F_4 +1.0V PR68 EV@1M/F_4 PQ14 B-TEST change 5 B-TEST change GFXPG_1V_EN 2 PQ12 EV@2SK3018 PR65 EV@100K_4 PR69 PQ11B EV@1M/F_4 6 EV@2N7002KDW_115MA PC55 EV@2200P/50V_4X B-TEST change 1 B 4 2 3 2 1 GFXPG_1V_EN 3 5 (7,34,42) 1 4 3 EV@AON7202 PQ11A EV@2N7002KDW_115MA B (Peak 2.84A ,AVG 2A ) EV@22_8 PR66 +1V_GPU +1V_GPU фϯͺϮϬϭϮϬϯϬϲх ĐŚĂŶŐĞWYϭϮƚŽϮ^<ϯϬϭϴĨŽƌ,tW'ŝƐƐƵĞ A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A +1.0V 5 4 3 2 Sheet 1 39 of 45 5 4 3 2 1 40 VIN 2 PQ43 1U/6.3V_4X B-TEST change B-TEST change PR175 R2 4 (Peak 4.292A ,AVG 3.005A) 3 2 1 51211_DRVH_1 0.1U/25V_6X +1.1V_S5 2.2UH_7X7_TOK 6 +3V_S5 *10K_4 11 PR180 51211_DRVL_1 + PR174 4 12 GND (34) PQ44 R1 AON7702A 2.2/F_6 PC137 PC136 +1.1V_HWPG 0.1U/10V_4X 1 D PL10 51211_SW_1 8 GND DRVL 16 PR179 470K/F_4 GND TST GND PGOOD 2.2_6 9 SW VFB PC144 2 5 EN 15 1 5 DRVH 1 10 2 PR178 4 1 B-TEST change 3 51211_VFB_1 2 PC142 *1U/6.3V_4X TRIP GND 51211_EN_1 *0/short_4 VBST 13 2 PR181 V5IN GND 7 14 51211_V5IN_1 PR177 (34) +1.1V_DUAL_EN AON7410 TPS51211DSCR PU8 PR176 57.6K/F_4 1 2 PC139 0.1U/25V_4X +1.1V_S5 B-TEST change 3 2 1 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ D 5 PC143 1 PC141 10U/25V_8X +5V_S5 10K/F_4 B-TEST change 6.04K/F_4 PQ22 AON7410 1000P/50V_4X RDSon=14m ohm PC140 1 330U/2V_7343P_E9c *39P/50V_4N 1.8V_PWROKD фϯͺϮϬϭϮϬϭϯϬх ĐŚĂŶŐĞWϭϯϳƚŽϯϯϬhͬϮsͺϳϯϰϯWͺ ϵĐϳϯϰϯ Vout=0.704V*(R1+R2)/R2 4 3 2 1 2 5 PC138 VIN +1.1V PC80 10U/25V_8X +5V_S5 (Peak 3.832A, AVG 2.682A) PC81 0.1U/25V_4X PC26 C 2 PQ23 1U/6.3V_4X B-TEST change 3 2 1 PL1 51211_SW_3 +1.8V 2.2UH_7X7_TOK PR53 51211_DRVL_3 + R1 PR100 4 фϯͺϮϬϭϮϬϯϬϲх ƐƚƵĨĨWZϱϯĨŽƌ,tW'ŝƐƐƵĞ PQ25 AON7702A B-TEST change 2.2/F_6 PC75 PQ10 EV@AON7410 B-TEST change (37,38,42) PC65 15.8K/F_4 GPU_MAIND GPU_MAIND 1000P/50V_4X RDSon=14m ohm 4 3 2 1 10K/F_4 5 GND +1.8V +3V 10K_4 11 PC88 GND DRVL (34) 0.1U/10V_4X 1.8V_PWROK 5 1.8V_PWROK 1 6 12 GND (Peak 4A ,AVG 2.8A) 51211_DRVH_3 0.1U/25V_6X 8 PGOOD 13 PR26 470K/F_4 16 1 R2 PR31 TST 4 2 2.2_6 9 SW VFB 1 10 2 PR30 EN GND 5 DRVH GND 4 TRIP 14 51211_VFB_3 1 PC38 0.22U/10V_4X B-TEST change 3 VBST GND 2 PR38 V5IN 15 7 51211_EN_3 PR41 10K_4 MAINON AON7410 51211_V5IN_3 2 (34,37,39) PR40 48.7K/F_4 1 2 B-TEST change PC30 TPS51211DSCR PU2 ϮϬϭϭϭϬϮϴĐŚĂŶŐĞWZϰϭǀĂůƵĞƚŽϭϬ<͕ WϯϴǀĂůƵĞƚŽϬ͘ϮϮƵ&;ĨŽƌƉŽǁĞƌƐĞƋƵĞŶĐĞŝƐƐƵĞͿ 5 1 3 2 1 C PC29 2 1 (Peak 1.85A ,AVG 1.3A) *39P/50V_4N +1.8V_GPU 330U/2.5V_3528P_E9b Vout=0.704V*(R1+R2)/R2 B B VIN +15V PR28 1M/F_4 PR36 1M/F_4 B-TEST change B-TEST change 6 3 1.8V_PWROKD PR27 1M/F_4 2 2 B-TEST change PQ7A 2N7002KDW_115MA PC28 2200P/50V_4X 1 PR48 100K_4 PQ6 2SK3018 1 1.8V_PWROK фϯͺϮϬϭϮϬϯϬϲх ĐŚĂŶŐĞWYϲƚŽϮ^<ϯϬϭϴĨŽƌ,tW'ŝƐƐƵĞ A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A +1.1V/+1.8V 5 4 3 2 Sheet 1 40 of 45 5 4 3 2 1 41 PR57 CPU_CORE_1 49.9/F_6 фϯͺϮϬϭϮϬϯϬϵх ƐƚƵĨĨWϭϭϴ PR150 10K/F_6 49.9/F_6 1 CPU_PWRGD_SVID_REG PC54 0.1U/50V_6X 8380HDR1 5 PQ38 4 8380SC 8380RSN1 8380RSP1 8380CSN1 8380CSP1 CPU_SVD PR18 DB to SI modfiy 8380SVD *0/short_4 (4) CPU_SVC CPU_SVC PR17 *0/short_4 SNS_NEG_VDD_1 1.2K/F_4 *0/short_4 PR64 SNS_POS_VDD_1 (4) CPU_VDDNB_FB_H фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ PC90 2200P/50V_6X PQ29 5 4 1 (Peak 10.000A, AVG 7.000A) Close to Phase Inductor 1 2 3 +5V_S5 RB500V-40_100MA PC19 0.22U/25V_6X 8380LX2 DCR=3.7mohm AOL1428A CPU_VDDNB_CORE_1 CPU_VDDNB_CORE 0.56UH_7X7 PR103 3.92K/F_4 PR154 + PR156 PR101 4 PC48 1 PQ32 5 PL5 2 8380RSN2 8380RSP2 8380VFIX 8380CSN2 8380CSP2 2 1 8380HDR2 PD5 1 2 RSN2 RSP2 VFIX CSN2 CSP2 VIN PG LDR2 GNDA GNDA GNDA +5VPCU PC49 1U/10V_4X PR21 2.2/F_6 8380LDR2 5.62K/F_4 NTC_10K_6 PC115 CPU_COREPG CPU_COREPG (4,10) PR14 2 1 27.4K/F_4 B-TEST change PR157 2.2/F_4 1000P/50V_4X 8380RSN2 2 5 330U/2V_7343P_E9c PC22 PR119 1.91K/F_4 B 330U/2V_7343P_E9c AOL1412 PC12 VIN 0.047U/25V_4X PC11 1000P/50V_4X PC8 100P/50V_4N PC13 220P/50V_4X 8380CSP2 PR2 8380RSP2 1.2K/F_4 *0/short_4 1 2 3 2 8380LDR1 2.2/F_6 8380SVC 49.9/F_6 PR7 C B-TEST change +3V 8380RSN2 (Peak 11.000A, AVG 7.700A) PC46 1000P/50V_4X 2.2/F_6 8380VREF 2 PR11 1 32.4K/F_4 PR59 + PC52 8380CSN2 PR121 *100K/F_4 PR60 CPU_VDDNB_CORE_1 PR118 10K/F_4 PC9 6800P/50V_4X PR63 (4) CPU_VDDNB_FB_L PC100 PR29 1 8380VREF SNS_NEG_VDD_1 VIN 2.2/F_6 PR117 2 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ PR146 AOL1412 0.1U/10V_4X CPU_SVD CPU_CORE_1 PL4 DCR=3.7mohm PQ31 4 1 2 3 (4) CPU_CORE PR51 3.92K/F_4 0.56UH_7X7 RB500V-40_100MA PD6 1 PC32 16 15 14 13 12 8 10 9 0.22U/25V_6X SC RSN1 RSP1 CSN1 CSP1 EN PWR_OK HDR1 GNDA GNDA GNDA 22 24 23 20 21 19 18 17 38 39 40 +5V_S5 B-TEST change B Close to Phase Inductor PR50 5.62K/F_4 8380LX1 1 2 3 5 4 6 7 11 35 36 37 GNDA GNDA 1 2 0.01U/25V_4X PC14 1000P/50V_4X B-TEST change PR46 2.2/F_4 PR159 ϮϬϭϭͬϬϵͬϮϬĨŽƌ D/ AOL1428A COMPV1 LX1 VDDA BST1 VREF LDR1 PU1 TSET GNDP OZ8380ALN VDDP ILIM SVD HDR2 SVC BST2 COMPV2 LX2 33 34 49.9K/F_4 PC21 10.2K/F_4 PR144 0.1U/10V_4X PC23 PR135 PC27 0.22U/10V_4X 2.55K/F_4 49.9K/F_4 *0/short_4 PR142 PR140 *49.9K/F_4 PR152 PR151 8380ILIM PR124 Change PN to CS29302FB01 8380TSET фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ 42 41 25 26 27 28 29 30 31 32 8380VREF 8380VREF GNDA GNDA PC35 2 1 0.01U/25V_4X B-TEST change PC31 1U/10V_4X 8380VREF PC40 NTC_10K_6 1 2 3 +5V_S5 C D 0.047U/25V_4X PC39 1000P/50V_4X PR43 20/F_6 фϯͺϮϬϭϮϬϮϭϬх ĐŚĂŶŐĞWϰϰǀĂůƵĞƚŽϲϴϬϬWͬϱϬsͺϰy (4) 0.1U/10V_4X 2 1 PR42 27.4K/F_4 PC83 0.1U/50V_6X 2 8380VREF 6800P/50V_4X VIN PC47 *10U/25V_8X фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ PC43 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ PR58 (34) PR49 100K_4 PC44 VRON +1.8V *0/short_4 100P/50V_4N PR45 8380RSN1 665/F_4 *0/short_4 D PC36 470P/50V_4X PC116 10U/25V_8X SNS_NEG_VDD_0 PC73 10U/25V_8X PR47 PR62 8380CSN1 8380CSP1 PC118 10U/25V_8X 665/F_4 1 *0/short_4 (4) CPU_VDD_FB_L 8380RSP1 2 SNS_POS_VDD_0 (4) CPU_VDD_FB_H PC51 *10U/25V_8X PR52 PC53 2200P/50V_6X PR61 49.9/F_6 фϯͺϮϬϭϮϬϮϭϬх ĐŚĂŶŐĞWϵǀĂůƵĞƚŽϲϴϬϬWͬϱϬsͺϰy *0/short_6 +3V Signal Ground Power Ground фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ A A Quanta Computer Inc. PROJECT : BY7D Size Document Number Date: Wednesday, March 21, 2012 Rev 1A CPU CORE 5 4 3 2 Sheet 1 41 of 45 1 2 3 4 5 +5V_S5 фϯͺϮϬϭϮϬϯϬϵх ƐƚƵĨĨWϭϯϰ 5 VID1 PHASE PU3 PR77 8 PC135 EV@10U/25V_8X Max. DCR=1.0m ϮϬϭϭϭϬϮϲ ƐƚƵĨĨWϭϯϮĨŽƌ D/ EV@0.24UH_7X7 PL9 B-TEST change GFX_CORE_CNTRL1 (14) GFX_CORE_CNTRL1 PC57 EV@10U/25V_8X PVCC 2 20 1 LGATE EV@10K/F_4 f : 300k Hz B-TEST change 17 A Total capacitor : 660 uF S2 18 OCP:25A (Peak 21.6A ,AVG 15.12 ) ESR :4.5mȍ S2 UGATE PC56 *EV@2200P/50V_4X S2 BOOT RTN EV@2.2/F_6 EV@0.1U/25V_6X 4 9 G2 GND PC60 D1 ISL95870A_AGND PR81 D1 19 PC134 EV@0.1U/25V_4X S1/D2 VCC D1 PC59 EV@4.7U/10V_6X +3V_S5 PGND 3 G1 2 *0/short_6 VIN EV@FDMS3660S 1 PQ42 PR171 ISL95870A_AGND PR79 EV@2.2/F_6 7 фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ EV@2.2/F_6 5 EV@1U/10V_4X A 42 PR78 6 PC58 2 1 16 +VGPU_CORE PR85 GFX_CORE_CNTRL0 (14) GFX_CORE_CNTRL0 6 15 GPU_VRON (34) EV@ISL95870AHRUZ-T 7 PC131 *0/short_4 SREF PGOOD SET0 FSEL SET1 VO PR168 14 GFXPG_1V_EN (7,34,39) PR172 *EV@10K/F_4 PR169 *EV@10K/F_4 PC62 *EV@0.1U/50V_6X PR87 EV@332K/F_4 12 ISL95870A_AGND 11 PR89 EV@31.6K/F_4 10 GFX_CORE_CNTRL1 R2 13 PC133 PR95 *0_2/S PR96 *0_2/S фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ PC130 + B-TEST change PC132 Seymour EV@0.1U/25V_6X GFX_CORE_CNTRL1 B-TEST change +VGPU_CORE GFX_CORE_CNTRL0 1 1 0.9V 1 0 1.0V 0 1 1.05V 0 0 1.15V EV@1000P/50V_4X R4 R3 B PR91 95870A_FB PR170 *EV@10K/F_4 PC61 EV@0.022U/16V_4X PR173 *EV@10K/F_4 FB 9 OCSET 8 PR84 EV@68.1K/F_4 + EV@2.2/F_6 R1 +3V_S5 GFX_CORE_CNTRL0 EN EV@330U/2V_7343P_E9c ϮϬϭϭϭϬϮϴĐŚĂŶŐĞƚŽнϯsͺ^ϱ VID0 EV@330U/2V_7343P_E9c ϮϬϭϭϭϬϮϴ ĐŚĂŶŐĞWZϴϰƚŽϲϴ͘ϭ<͕WZϴϳƚŽϯϯϮ< PR88 EV@590K/F_4 EV@4.3K/F_4 B-TEST change R7 Roc Seymour PC63 PR75 EV@10/F_6 PR93 фϮϬϭϭϬϵϮϮͺ>ŝŶĐĂŶх ƌĞƐĞƌǀĞ͕ĚŽŶΖƚŝŶƐƚĂůůĞĚďLJĚĞĨĂƵůƚ PR76 EV@10/F_6 EV@0.1U/25V_6X B-TEST change EV@3.09K/F_4 Csen ISL95870A_AGND PR92 EV@4.3K/F_4 R8 R1 60.4K/F_4 R2 31.6K/F_4 R3 590K/F_4 R4 294K/F_4 R5/R6 3.65K/F_4 R7/R8 4.3K/F_4 B PR82 EV@3.09K/F_4 R5 PR90 PR74 EV@2.4K/F_4 *0/short_4 PR80 PR72 EV@2.4K/F_4 *0/short_4 VCORE_VCCSSENSE VCORE_VCCSSENSE (17) VCORE_VSSSENSE VIN +15V ϮϬϭϭϭϭϭϬĐŚĂŶŐĞWZϴϬ͕WZϵϬƚŽϮ͘ϰ< C PR86 EV@1M/F_4 PR73 EV@22_8 GPU_VRON 2 3 2 PR70 PQ13 EV@LTC044EUBFS8TL_30MA B-TEST change EV@1M/F_4 EV@22_8 PR98 PQ15 EV@2N7002K_300MA 1 PC64 *EV@2200P/50V_4X 1 EV@2N7002KDW_115MA 1 2 3 1 3 6 4 3 PR97 EV@100K_4 5 PR94 PQ19B EV@1M/F_4 C GPU_MAIND (37,38,40) PQ19A EV@2N7002KDW_115MA 2 PQ21 PR71 EV@1M/F_4 B-TEST change B-TEST change GPU_MAIND (34) GPU_MAINON +VGPU_CORE VIN PR83 EV@1M/F_4 B-TEST change EV@LTC044EUBFS8TL_30MA VCORE_VSSSENSE (17) фϯͺϮϬϭϮϬϯϬϳх ĐŚĂŶŐĞƚŽƐŚŽƌƚƉĂĚ R6 B-TEST change 4 +1.5V_GPU D D 5 3 PQ20B EV@2N7002KDW_115MA Quanta Computer Inc. EV@22_8 PR99 PROJECT : BY7D +1.8V_GPU 1 Size Document Number Date: Wednesday, March 21, 2012 Rev GPU 2 3 4 1A 5 Sheet 42 of 45 www.s-manuals.com
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