Quanta KL5A Schematics. Www.s Manuals.com. R1a Schematics

User Manual: Motherboard Quanta KL5A - Schematics. Free.

Open the PDF directly: View PDF PDF.
Page Count: 46

DownloadQuanta KL5A - Schematics. Www.s-manuals.com. R1a Schematics
Open PDF In BrowserView PDF
1

2

3

4

5

6

7

8

01

KL5A Intel Huron River Platform with Discrete GFX
FAN / THERMAL
EMC2103-2

A

DDRIII-SODIMM2

Dual Channel DDR3
800/1067/1333 1.5V

PG 14

CPU
SandyBridge 0.61

PCI-Express

Graphics Interfaces

PG 13

nVIDIA
PCI-E

rPGA 988

PG 3~6

FDI

DMI

27MHz

DDRIII-SODIMM1

DDR SYSTEM MEMORY

A

N12M-GS 533p

PG 15~19

REGULATOR (DDR3)
1.5VSUS, 0.75VSMDDR_VTERM,1.5V
1.5V_GPU,1.5V_CPU

DMIX4

REGULATOR

B

FDI

SATA - HDD

INT_HDMI

SATA1 150MB

HDMI CON

3VPCU, 5VPCU, +15V
PG 36

SATA3 150MB

INT_CRT

CRT
CPU Core

PG 21

PG 25

PG 41

SATA4 150MB

INT_LVDS

USB + eSATA
Port 0

DC/DC

PG 20

PG 25
SATA - CD-ROM

PG 25

LCD CONN
VGA Core Discrete

PG 22

PCI-E

CougarPoint 0.7
PG 24

Mic in

IHDA

AUDIO CODEC

PG 38
Port 1

PCH

Mini PCI-E Card

ALC269

PAGE 27

LAN
(10/100&1G co-lay)

PG 24

USB 3.0
VL801

PAGE 28

RTL8111E-VB-GR

C

Int. MIC
Head-Phone out

Port 5

Realtek

(WLAN/ Wimax)

PG 24

(External MIC)

Port 6
25MHz

Speaker

B

+1.05V_VTT,+1.8V

DMI

C

PAGE 23
PG 24
PG 7~12

USB2.0

PG 24

Port 5
USB2.0 Ports X1
PG 27

Port 1
BlueTooth
PG 27

Port 3
Mini PCI-E Card
PG 27

Port 4

Card Reader

LPC

Port 2
CCD
PG 30

Port 6
USB DB
PG 30

RTS5139
PAGE 26

32.768KHz

7-IN-1 Card
Reader CONN
PG 26

EC
IT8518
D

D

PAGE 31

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom BLOCK DIAGRAM
Date:
1

2

3

4

5

6

Friday, October 29, 2010
7

Rev
1A
Sheet

1
8

of

45

1

02
Power States
Table of Contents
PAGE

BLOCK DIAGRAM

2

Front Page

3-6

Sandy Bridge (CPU)

7-12
13

CougarPoint (PCH)

14

DDR3 DIMM-0-RVS(4.0H)
DDR3 DIMM-1-RVS(8.0H)

15-19
20

N12M (GPU)

21

CRT CONN

HDMI CONN

22

LCD CONN

23

LAN(RTL8111E-VB-GR)

24

AL269/MIC/LINE-OUT

25

SATA HDD/ESATA/CD-ROM

26

Card Reader (RTS5139)

27

USB2.0*1/WLAN/BT

28

USB3.0 or USB2.0

29

FAN /THERMAL

30

K/B, T/P

31

B TO B CON/LED

32
A

DESCRIPTION

1

34

KBC IT8518
Screw Hole/EMI/ESD
Discharge

35

Charger (ISL88731)

36

DDR3/0.75V(RT8207LGQW)

37

3V/5V (RT8206MGQW)

38

+1.8V (HPA00835RTER)
GFX_CORE (OZ8117)

33

39
40

+0.85V (OZ8117)

41

+1.05_PCH (OZ8117)

42

IMVP7 2+1 (ISL95831)

43

KL5A Power On Sequence

44

EC Tracking Record A

POWER PLANE

VOLTAGE

VIN

10V~+20V

PAGE

DESCRIPTION

22,33,35,36,37,39,40,41,42

MAIN POWER

CONTROL
SIGNAL

ACTIVE IN
S0~S5

07,08,11,12,32

RTC

+3VPCU

+3.3V

07,08,22,23,25,30,31,32,34,35,37,38

ITE8052 POWER

3V5V_EN

S0~S5

+5VPCU

+5V

25,34,35,36,37,38,39,40,41

DC/DC POWER IC SOURCE

3V5V_EN

S0~S5

+15V

+15V

22,25,27,34,36,37,38,41

LARGE POWER

3V5V_EN

S0~S5

LANVCC

+3.3V

23,34

LAN POWER

LAN_ON

+5V_S5

+5V

11,22,25,27,28,34

PCH SUS POWER

S5_ON

+3V_S5

+3.3V

03,07,08,09,10,11,27,28,31,32,34

Sys Management,PCH Resume
Well,Intel HD Audio,USB,WLAN
WiMAX POWER

S5_ON

+0.9V~+1.2V

15,34,39

VGA CORE POWER

MAINON

S0

+0.75V

5,14,32

DDR3 SODIMM REFERENCE POWER

SYS_PWROK

S0

+5V

07,08,11,20,21,24,25,29,30,31,32,34,35,42

SLP_S3# CTRLD POWER

MAINON

S0

+3V

+3.3V

07,08,09,10,11,13,14,15,20,21,22,23,24,25,26,
SLP_S3# CTRLD POWER
27,28,29,31,32,34,35,39,40,41,42

MAINON

+1.8V

+1.8V

05,08,11,34,38

LVDS,NVM POWER

+1.5V

+1.5V

11,25,27,34

Mini PCIe,Express Card POWER

+1.05V_PCH

+1.05V

03,05,07,08,09,11,34,36,41

PCH CORE POWER

MAINON

S0

05,34,42

CPU CORE POWER

VRON

S0

+3.3V

22

LCD Power

INT_LVDS_VDDEN

+10V~+17V

35

MAIN BATTERY

CHG_PBATT

+3V_RTC

GFX_CORE
+0.75V_DDR_VTT
+5V

+3.0V~+3.3V

+VCC_CORE
LCDVCC
BAT-V

S0~S5

MAINON
MAINON

S0~S3
S0~S3

S0

A

S0
S0

S0
S0~S5

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Front page

Date:
1

Friday, October 29, 2010

Sheet

2

of

45

5

4

3

2

1

03

Sandy Bridge Processor (CLK,MISC,JTAG)

Sandy Bridge Processor (DMI,PEG,FDI)
U30A

[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]

C

A21
H19
E19
F18
B21
C20
D18
E17

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]

A22
G19
E20
G18
B20
C19
D19
F17

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]

[7]
[7]

FDI_FSYNC0
FDI_FSYNC1

J18
J17

FDI0_FSYNC
FDI1_FSYNC

[7]

FDI_INT

H20

FDI_INT

[7]
[7]

FDI_LSYNC0
FDI_LSYNC1

J19
H17

FDI0_LSYNC
FDI1_LSYNC

A18
A17
B16

eDP_COMPIO
eDP_ICOMPO
eDP_HPD

C15
D15

eDP_AUX
eDP_AUX#

C17
F16
C16
G15

eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

C18
E16
D16
F15

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

eDP_COMP
INT_eDP_HPD_Q

eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils.
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils.

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

PEG_TXN0_C
PEG_TXN1_C
PEG_TXN2_C
PEG_TXN3_C
PEG_TXN4_C
PEG_TXN5_C
PEG_TXN6_C
PEG_TXN7_C
PEG_TXN8_C
PEG_TXN9_C
PEG_TXN10_C
PEG_TXN11_C
PEG_TXN12_C
PEG_TXN13_C
PEG_TXN14_C
PEG_TXN15_C

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
PEG_TXP8_C
PEG_TXP9_C
PEG_TXP10_C
PEG_TXP11_C
PEG_TXP12_C
PEG_TXP13_C
PEG_TXP14_C
PEG_TXP15_C

[32]

SKTOCC#

AL33

EC_PECI

R78

H_PROCHOT#_R

56/J_4

[7]

AL32

PROCHOT#

AN32

R584

PM_SYNC

*Short_4_NC
C689

R589

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

10K/J_4
PM_DRAM_PWRGD_R

+1.05V_PCH

R593

75/J_4

CPU_PLTRST#

R588

43/J_4

CLK_CPU_BCLKP
CLK_CPU_BCLKN

V8

SM_DRAMPWROK

CPU_PLTRST#_R AR33

RESET#

DPLL_REF_CLK
DPLL_REF_CLK#

CLK_DPLL_SSCLKP_R
CLK_DPLL_SSCLKN_R

A16
A15

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

R8

SM_RCOMP_0 R585
SM_RCOMP_1 R128
SM_RCOMP_2 R127

AK1
A5
A4

[9,23,27,28] PLTRST#

2

NC VCC

5

SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
PRDY#
PREQ#

AP29
AP27

XDP_PRDY#
XDP_PREQ#

TCK
TMS
TRST#

AR26
AR27
AP30

XDP_TCLK
XDP_TMS
XDP_TRST#

TDI
TDO

AR28
AP26

XDP_TDI_R
XDP_TDO

DBR#

AL35

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

4

IN
GND OUT

CPU_PLTRST#

4

R114

[7] PM_DRAM_PWRGD

*0/J_4

R101
*DIS@1K/F_4

R105
*DIS@1K/F_4

FDI_FSYNC can gang
all these 4
signals together
and tie them with
only one 1K
resistor to GND
(DG V0.5 Ch2.2.9).

TP89
TP88
TP8
TP87
TP86

XDP_DBRST#

XDP_DBRST# [7]

PM_DRAM_PWRGD_Q

R112

130/F_4

R108

[15]

[15]

PEG_TXN0_C
PEG_TXN1_C
PEG_TXN2_C
PEG_TXN3_C
PEG_TXN4_C
PEG_TXN5_C
PEG_TXN6_C
PEG_TXN7_C
PEG_TXN8_C
PEG_TXN9_C
PEG_TXN10_C
PEG_TXN11_C
PEG_TXN12_C
PEG_TXN13_C
PEG_TXN14_C
PEG_TXN15_C

+1.05V_PCH
C554
C551
C548
C543
C542
C537
C534
C533
C530
C526
C525
C523
C519
C518
C512
C515

DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4

R570

PM_DRAM_PWRGD_R

*74AHC1G09GW
R113

*39/J_4

3

1
*ME2N7002E

*3K/F_4

MAINON# [5,34]

Processor pull-up(CPU)

+1.05V_PCH

H_PROCHOT#
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#

24.9/F_4 PEG_COMP

PEG_ICOMPI and RCOMPO signals should be routed within 500
mils typical impedance = 43 mohms PEG_ICOMPO signals should
be routed within 500 mils
typical impedance = 14.5 mohms

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

4

62/F_4
51/J_4
51/J_4
51/J_4
*51/J_4
51/J_4
51/J_4

INT_eDP_HPD_Q

+1.05V_PCH

R557

10K_4

+1.05V_PCH

R556

24.9/F_4 eDP_COMP

PROJECT KL5A

Quanta Computer Inc.

eDP_COMPIO and ICOMPO signals should be shorted near balls and
routed with typical impedance <25 mohms
3

R69
R591
R75
R85
R79
R63
R88

A

Size
Document Number
Custom

Rev
1A

Sandy Bridge 1/4

Date:
5

C

1

R111
0/J_4

DP & PEG Compensation
PEG_TXN[0..15]

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

TP4
TP5

R109
200/F_4

U8

2

[7,36] SYS_PWROK

PEG x16 (UMA Non-stuff)
*DIS@0/J_4
*DIS@0/J_4
*DIS@0/J_4

SW/UMA
0 ohm
NA
NA

B

C582
0.1U/10V_4

U31

1

PEG_TXP[0..15]

R103
R104
R102

140/F_4
25.5/F_4
200/F_4

DIS only
NA
0 ohm
0 ohm

+1.5V_CPU

FDI_INT

A

Ra
Rb
Rc

C207
*0.1U/10V_4

3

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

+1.05V_PCH

CPU_DRAMRST# [4]

Q13

DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4
DIS@0.1U/10V_4

CLK_DPLL_SSCLKP [9]
CLK_DPLL_SSCLKN [9]

+3V_S5

PM_DRAM_PWRGD_Q

C552
C549
C546
C545
C538
C536
C535
C532
C529
C528
C524
C521
C520
C516
C511
C514

*DIS@0/J_4

Rc
SM_DRAMRST#

D

4
2
SW@0X2

Rb *DIS@0/J_4

+3V_S5

CPU-989P-rPGA

PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
PEG_TXP8_C
PEG_TXP9_C
PEG_TXP10_C
PEG_TXP11_C
PEG_TXP12_C
PEG_TXP13_C
PEG_TXP14_C
PEG_TXP15_C

3
1
R558

CPU-989P-rPGA

74LVC1G07GW

FDI Disable

[9]
[9]

Ra

THERMTRIP#

*0.1U/10V_4
*Short_4_NC H_PWRGOOD_R

R594

[10] H_PWRGOOD

PM_SYNC_R

A28
A27

R561
R562

PECI

[15]
[10] PM_THRMTRIP#

BCLK
BCLK#

CATERR#

AN33

[32,42] H_PROCHOT#
PEG_RXP[0..15]

PROC_SELECT#

3

B

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

TP_CATERR#

TP11

*EGA-0402

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

TP10

C26
AN34

RV37

[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

SKTOCC#

2

G22
D22
F20
C21

H_SNB_IVB#

CLOCKS

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

[8]

DDR3
MISC

[7]
[7]
[7]
[7]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

[15]

JTAG & BPM

G21
E22
F21
D21

SNB_IVB# N.A at SNB EDS #27637 0.7v1
PEG_RXN[0..15]

MISC

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

THERMAL

[7]
[7]
[7]
[7]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

PWR MANAGEMENT

B28
B26
A24
B23

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

5

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

PCI EXPRESS* - GRAPHICS

[7]
[7]
[7]
[7]

D

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI

B27
B25
A25
B24

Intel(R) FDI

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

eDP

[7]
[7]
[7]
[7]

J22
J21
H22

U30B

PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.

PEG_COMP

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO

2

Friday, October 29, 2010
1

Sheet

3

of

45

5

4

3

2

1

04

Sandy Bridge Processor (DDR3)
U30C

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

C

B

[14]
[14]
[14]

[14]
[14]
[14]

C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15

AE10
AF10
V6

M_A_BS#0
M_A_BS#1
M_A_BS#2

AE8
AD9
AF9

M_A_CAS#
M_A_RAS#
M_A_WE#

SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]

AB6
AA6
V9

M_A_CLKP0 [14]
M_A_CLKN0 [14]
M_A_CKE0 [14]

AA5
AB5
V10

M_A_CLKP1 [14]
M_A_CLKN1 [14]
M_A_CKE1 [14]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

AB4
AA4
W9

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

AB3
AA3
W10

SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

AK3
AL3
AG1
AH1

M_A_CS#0 [14]
M_A_CS#1 [14]

SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]

AH3
AG3
AG2
AH2

M_A_ODT0 [14]
M_A_ODT1 [14]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

C4
G6
J3
M6
AL6
AM8
AR12
AM15

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

D4
F6
K3
N6
AL5
AM9
AR11
AM14

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

[13] M_B_DQ[63:0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_A_DQSN[7:0] [14]

M_A_DQSP[7:0] [14]

M_A_A[15:0] [14]

[13]
[13]
[13]

[13]
[13]
[13]

CPU-989P-rPGA

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_B_CAS#
M_B_RAS#
M_B_WE#

C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9
AA7
R6

AA10
AB8
AB9

SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]

DDR SYSTEM MEMORY B

[14] M_A_DQ[63:0]

DDR SYSTEM MEMORY A

D

U30D

SB_CAS#
SB_RAS#
SB_WE#

M_B_CLKP0 [13]
M_B_CLKN0 [13]
M_B_CKE0 [13]

AE1
AD1
R10

M_B_CLKP1 [13]
M_B_CLKN1 [13]
M_B_CKE1 [13]

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

AB2
AA2
T9

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

AA1
AB1
T10

SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]

AD3
AE3
AD6
AE6

M_B_CS#0 [13]
M_B_CS#1 [13]

SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]

AE4
AD4
AD5
AE5

M_B_ODT0 [13]
M_B_ODT1 [13]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D7
F3
K6
N3
AN5
AP9
AK12
AP15

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

C7
G3
J6
M3
AN6
AP8
AK11
AP14

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

SB_BS[0]
SB_BS[1]
SB_BS[2]

AE2
AD2
R9

D

C

M_B_DQSN[7:0] [13]

M_B_DQSP[7:0] [13]

M_B_A[15:0] [13]

B

CPU-989P-rPGA

+1.5V_SUS

R123
1K/F_4

R121

*0/J_4

A

A

R117

1K/F_4

CPU_DRAMRST#_R

R138

[9] DRAMRST_CNTRL_PCH

3

*Short_4_NC

1

2

[13,14] DDR3_DRAMRST#

CPU_DRAMRST# [3]

Q15
ME2N7002E

C225
0.047U/10V_4

PROJECT KL5A

R122
4.99K/F_4

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Sandy Bridge 2/4

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

4

of

45

4

3

POWER

22uF x 12

C119
22U/6.3V_8

C182
22U/6.3V_8

C565
22U/6.3V_8

C557
22U/6.3V_8

C574
22U/6.3V_8

C561
22U/6.3V_8

C563
22U/6.3V_8

C187
22U/6.3V_8

C69
22U/6.3V_8

C60
22U/6.3V_8

C108
22U/6.3V_8

C117
22U/6.3V_8

C576
22U/6.3V_8

C83
22U/6.3V_8

C577
22U/6.3V_8

C82
22U/6.3V_8

Reserved
C93
*22U/6.3V_8

C84
*22U/6.3V_8

C64
*22U/6.3V_8

C568
22U/6.3V_8

C107
22U/6.3V_8

A

C567
*22U/6.3V_8

C573
22U/6.3V_8

C114
10U/6.3V_6

C144
22U/6.3V_8

C189
10U/6.3V_6

C110
22U/6.3V_8

C111
22U/6.3V_8

C112
22U/6.3V_8

C184
22U/6.3V_8
C120
22U/6.3V_8

C541
*22U/6.3V_8

C547
*22U/6.3V_8

C553
*22U/6.3V_8

C143
22U/6.3V_8

C558
*22U/6.3V_8

C581
*22U/6.3V_8

+1.05V_VTT_40

R569

*0/short_4

C578
*22U/6.3V_8

C68
*22U/6.3V_8

C63
*22U/6.3V_8

+1.05V_PCH

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

Ra

*DIS@0/J_4

Ra

DIS
0 ohm

SW
NA

C502
10U/6.3V_6

C504
1U/6.3V_4

C503
1U/6.3V_4

B6
A6
A2

+1.8V

CPU VCCPL
AJ29
AJ30
AJ28

C166
22U/6.3V_8

22uF (Reserved)

R590

VIDALERT#
VIDSCLK
VIDSOUT

C579
22U/6.3V_8

SNB 45W:1.2A
330uF/7mohm x 1

+ C509
*330U/2V_7343

VCCPLL1
VCCPLL2
VCCPLL3

10uF x 1

SENSE
LINES

C109
22U/6.3V_8

C137
22U/6.3V_8

100/J_4

R582

100/J_4

+VCC_GFX
VCC_AXG_SENSE [42]
VSS_AXG_SENSE [42]
D

TP83

VREF

C164
22U/6.3V_8

R583

SM_VREF

+VDDR_REF_CPU

AL1

+VDDR_REF_CPU

CAD Note: +VDDR_REF_CPU should
have 10 mil trace width

CPU MCH
SNB 45W: 10A
330uF/6mohm x 1
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

10uF x 6

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

+1.5V_CPU
C124
10U/6.3V_6

C172
10U/6.3V_6

C170
C171
10U/6.3V_6 10U/6.3V_6

C115
10U/6.3V_6

C140
10U/6.3V_6

+ C78
*330U/2V_7343

C173
22U/6.3V_8

C81
22U/6.3V_8

C

22uF (Reserved)

CPU SA
SNB 45W: 6A
330uF/7mohm x 1
10uF x 3
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

VCCSA_SENSE

FC_C22
VCCSA_VID1

M27
M26
L26
J26
J25
J24
H26
H25

+0.85V
C191
10U/6.3V_6

C193
10U/6.3V_6

R132

10K/J_4

H23

C22
C24

C540
10U/6.3V_6

C544
*10U/6.3V_6

VCCUSA_SENSE [40]

H_FC_C22

VCCSA_SEL [40]
B

CPU-989P-rPGA

1uF x 2

10K/J_4

C575
22U/6.3V_8

J23

C178
22U/6.3V_8

C569
22U/6.3V_8

R133

B

VCCIO40

C562
*22U/6.3V_8

C103
10U/6.3V_6

C572
22U/6.3V_8

AK35
AK34

Layout note: need routing
together and ALERT need
between CLK and DATA

4.5A

SVID CLK
+1.5V_SUS

+1.5V_CPU

+1.5V_SUS

+1.05V_PCH

Close to VR
R74
54.9/F_4
H_CPU_SVIDCLK

R83

*Short_4_NC

VR_SVID_CLK

8
7
6
5

[42]

1
2
3

R581
VCC_SENSE
VSS_SENSE

AJ35
AJ34
R580

100/J_4 +VCC_CORE
VCC_SENSE [42]
VSS_SENSE [42]
100/J_4

[34] MAINON_15V

SVID DATA

Place PU resistor close to CPU
+1.05V_PCH

0.1U/10V_4

C162

0.1U/10V_4

C92

0.1U/10V_4

C96

0.1U/10V_4

3/26 DB add for Intel.
Placement close to CPU.

Q12
AO4496
C104
*470P/50V_4

+1.05V_PCH

C147

R106
220/J_8
3

C560
22U/6.3V_8

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

C169
22U/6.3V_8

C571
22U/6.3V_8

VAXG_SENSE
VSSAXG_SENSE

VCCIO_SENSE
VSSIO_SENSE

B10
A10

Close to VR

VTT_SENSE [41]
TP78

R82
130/F_4
H_CPU_SVIDDAT

R72
130/F_4
R73

[3,34]

*Short_4_NC

VR_SVID_DATA

MAINON#

2
Q14
2N7002K

[42]

+VDDR_REF_CPU
[13,14,36] SMDDR_VREF

R592

*0/J_8

1

C

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

TP82

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

4

C566
22U/6.3V_8

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

C570
22U/6.3V_8

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17

DDR3 -1.5V RAILS

C118
22U/6.3V_8

C101
22U/6.3V_8

22uF x 10

Place PU resistor close to CPU

A

SVID ALERT

+1.05V_PCH
3

1

CPU-989P-rPGA
MAINON_15V

2

C142
22U/6.3V_8

C556
22U/6.3V_8

C175
22U/6.3V_8

+VCC_GFX

22uF x 6 (Non-stuff)
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

PEG AND DDR

C163
22U/6.3V_8

C167
22U/6.3V_8

C555
22U/6.3V_8

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

SVID

C550
22U/6.3V_8

C559
22U/6.3V_8

+1.05V_PCH

SENSE LINES

C564
22U/6.3V_8

SNB 45W:8.5A
+VCC_CORE

CORE SUPPLY

22uF x 3 (Non-stuff)

POWER

U30G

22uF x 4 (Reserved)

CPU VTT

SA RAIL

A03

GRAPHICS

U30F

1.8V RAIL

CPU Core Power
22uF x 32

05

CPU VGT
SNB 45W:24A

SNB 45W:55A,36A(TDP)

1

Sandy Bridge Processor (GRAPHIC POWER)

Sandy Bridge Processor (POWER)

D

2

MISC

5

Q50
ME2N7002E
R586
100K/J_4

PROJECT KL5A

R81
75/J_4
H_CPU_SVIDALRT#

R80

43/J_4

VR_SVID_ALERT_L#

Quanta Computer Inc.
R71

*Short_4_NC

VR_SVID_ALERT#

[42]

Size
Document Number
Custom

Rev
1A

Sandy Bridge 3/4

Date:
5

4

3

2

Friday, October 29, 2010
1

Sheet

5

of

45

5

4

3

2

1

Sandy Bridge Processor (GND)
U30H

C

B

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W 35
W 34
W 33
W 32
W 31
W 30
W 29
W 28
W 27
W 26
U9
U8
U6
U5
U3
U2

CPU-989P-rPGA

U30E

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

VSS

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

CFG0

TP9
TP7

CFG2

TP6

[14] SMDDR_VREF_DQ0_M3
[13] SMDDR_VREF_DQ1_M3

CFG4
CFG5
CFG6
CFG7

SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3

R136
*1K/J_4

R131
*1K/J_4

Add for Pre-ES1

TP77

AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]

AJ31
AH31
AJ33
AH33

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE

AJ26

RSVD5

B4
D1

RSVD6
RSVD7

F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29

RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

J20
B18
A19

RSVD24
RSVD25
VCCIO_SEL

J15

RSVD27

RSVD28
RSVD29
RSVD30
RSVD31
RSVD32

L7
AG7
AE7
AK2
W8

RSVD33
RSVD34
RSVD35

AT26
AM33
AJ27

RSVD37
RSVD38
RSVD39
RSVD40

T8
J16
H16
G16

RSVD41
RSVD42
RSVD43
RSVD44
RSVD45

AR35
AT34
AT33
AP35
AR34

RSVD46
RSVD47
RSVD48
RSVD49
RSVD50

B34
A33
A34
B35
C35

RSVD51
RSVD52

AJ32
AK32

VCC_DIE_SENSE

AH27

RSVD54
RSVD55

AN35
AM35

D

C

TP85
TP84

Reserved for Intel Debug

RSVD56
RSVD57
RSVD58

AT2
AT1
AR1
B

KEY

B1

For rPGA socket, RSVD59 pin should be left NC

CPU-989P-rPGA

CPU-989P-rPGA

Processor Strapping

The CFG signals have a default value of '1' if not terminated on the board.

1
A

06

Sandy Bridge Processor (RESERVED, CFG)

U30I

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

RESERVED

D

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25

CFG2
(PEG Static Lane Reversal)

0

Normal Operation

Lane Reversed

CFG4
(DP Presence Strap)

Disable; No physical DP attached to eDP

Enable; An ext DP device is connected to eDP

CFG7
(PEG Defer Training)

PEG train immediately following
xxRESETB de assertion

PEG wait for BIOS training

CFG2

R91

1K/F_4

CFG4

R92

*1K/F_4

CFG7

R68

*1K/F_4

CFG[6:5] (PCIE Port Bifurcation Straps)
CFG5
CFG6

R70
R77

11:
10:
01:
00:

*1K/F_4
*1K/F_4

(Default) x16 - Device 1 functions 1 and 2 disabled
x8, x8 - Device 1 function 1 enabled ; function 2 disabled
Reserved - (Device 1 function 1 disabled ; function 2 enabled)
x8,x4,x4 - Device 1 functions 1 and 2 enabled

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Sandy Bridge 4/4

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

6

of

45

5

4

3

2

1

07

Cougar Point (LVDS,DDI)
U17D

[3]
[3]
[3]
[3]

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

BE24
BC20
BJ18
BJ20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

[3]
[3]
[3]
[3]

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

AW24
AW20
BB18
AV18

[3]
[3]
[3]
[3]

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

AY24
AY20
AY18
AU18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

AW16

FDI_INT

[3]

AV12

FDI_FSYNC0

[3]

BC10

FDI_FSYNC1

[3]

AV14

FDI_LSYNC0

[3]

BB10

FDI_LSYNC1

[3]

FDI_INT
BJ24
+1.05V_PCH

R280

49.9/F_4 DMI_COMP

R268

750/F_4

DMI_RBIAS

BG25
BH21

DMI_ZCOMP

FDI_FSYNC0

DMI_IRCOMP

FDI_FSYNC1

DMI2RBIAS

FDI_LSYNC0
FDI_LSYNC1

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

[22] LVDS_BRIGHT_PWM

L_BKLTCTL

T40
K47

L_DDC_CLK
L_DDC_DATA

T45
P39

L_CTRL_CLK
L_CTRL_DATA

INT_EDIDCLK
INT_EDIDDAT

[22] INT_EDIDCLK
[22] INT_EDIDDAT

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

R460
R453

+3V
R469

2.2K/J_4
2.2K/J_4

2.37K/F_4

LVD_IBG

AF37
AF36

LVD_IBG
LVD_VBG

AE48
AE47

LVD_VREFH
LVD_VREFL

INT_TXLCLKOUTN
INT_TXLCLKOUTP

AK39
AK40

LVDSA_CLK#
LVDSA_CLK

[22] INT_TXLOUTN0
[22] INT_TXLOUTN1
[22] INT_TXLOUTN2

INT_TXLOUTN0
INT_TXLOUTN1
INT_TXLOUTN2

AN48
AM47
AK47
AJ48

[22] INT_TXLOUTP0
[22] INT_TXLOUTP1
[22] INT_TXLOUTP2

INT_TXLOUTP0
INT_TXLOUTP1
INT_TXLOUTP2

AN47
AM49
AK49
AJ47

TP54

[22] INT_TXLCLKOUTN
[22] INT_TXLCLKOUTP

C

SUS_PWR_ACK_R

R505

EC_PWROK

C696
R514
R516
R486

*Short_4_NC
*0/J_4

B

*Short_4_NC

APWROK_R

L10
B13

R489

SUSACK#
SYS_RESET#

DPWROK
WAKE#

+3V

SYS_PWROK

+3V_S5

PWROK

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

APWROK

+3V_S5

SUSCLK / GPIO62

DRAMPWROK

+3V_S5

SLP_S5# / GPIO63

RSMRST#

C21

RSMRST#

SUS_PWR_ACK_R

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

[32] SIO_PWRBTN#
[32] AC_PRESENT

L22

PM_DRAM_PWRGD

*Short_4_NC

RSMRST#
R518

SYS_PWROK_R P12
EC_PWROK_R

*Short_4_NC

EC_PWROK_R R504

[32]

K3

*1U/10V_4

[3] PM_DRAM_PWRGD

[32] SUS_PWR_ACK

C12

*Short_4_NC

AC_PRESENT_R H20
PM_BATLOW#
PM_RI#

ACPRESENT / GPIO31

DSW

R275

E22 R483

DPWROK

*Short_4_NC

B9

PCIE_WAKE#

PCIE_WAKE#

N3

CLKRUN#

G8

LPC_PD#

TP71

N14

PCH_SUSCLK

TP58

D10

SLP_S5#

TP70

SLP_S4#

H4

+3V_S5
SLP_S3#

F4

RSMRST#

*Short_4_NC

CLKRUN#

[23,27,28]

[32]

AH43
AH49
AF47
AF43

*EGA-0402

SYS_PWROK

[32]

*0/J_4
XDP_DBRST#

XDP_DBRST#

AH45
AH47
AF49
AF45

DSWVREN

A18

RV11

[3]

System Power Management

DSWVRMEN

R305
R306

[21] INT_CRT_HSYNC
[21] INT_CRT_VSYNC

SLP_SUS#

G16

PMSYNCH

AP14

SLP_A#

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

33/J_4 INT_CRT_HSYNC_R
33/J_4 INT_CRT_VSYNC_R

M47
M49

CRT_HSYNC
CRT_VSYNC

DAC_IREF

T43
T42

DAC_IREF
CRT_IRTN

R463
1K/F_4

AM42
AM40

SDVO_INTN
SDVO_INTP

AP39
AP40

AT49
AT47
AT40

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

D

P38
M39

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

DDPD_CTRLCLK
DDPD_CTRLDATA

CRT_DDC_CLK
CRT_DDC_DATA

TP66

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK
SDVO_CTRLDATA

T39
M40

20ohm for SW;
33ohm for UMA

SIO_SLP_S3# [32]

G10

N48
P49
T49

[21] INT_DDCCLK
[21] INT_DDCDAT

PM_SLP_S4# [32]

SLP_A#

INT_CRT_BLU
INT_CRT_GRE
INT_CRT_RED

[21] INT_CRT_BLU
[21] INT_CRT_GRE
[21] INT_CRT_RED

AP43
AP45

INT_HDMI_SCL
INT_HDMI_SDA

INT_HDMI_HPD_Q
INT_HDMI_TXDN2
INT_HDMI_TXDP2
INT_HDMI_TXDN1
INT_HDMI_TXDP1
INT_HDMI_TXDN0
INT_HDMI_TXDP0
INT_HDMI_TXCN
INT_HDMI_TXCP

A10

BATLOW# / GPIO72 +3V_S5

AP47
AP49
AT38

DDPC_HPD_PU

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

AT45
AT43
BH41

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

DDPD_HPD_PU

+5V

CougarPoint_R1P0
INT_HDMI_HPD_Q

+3V_S5

RI#

SLP_LAN# / GPIO29

PM_SYNC

K14

[3]

TP72

R307

150/F_4

INT_CRT_BLU

R308

150/F_4

INT_CRT_GRE

R309

150/F_4

INT_CRT_RED

C

M43
M36

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

TP56

SLP_LAN#

[20]
[20]
[20]
[20]
[20]
[20]
[20]
[20]

P46
P42

B

1

3

INT_HDMI_HPD

[20]

Q31
ME2N7002E

R place close to PCH
E10

[20]
[20]

INT. DP

AF40
AF39

SDVO_TVCLKINN
SDVO_TVCLKINP

2

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

L_BKLTEN
L_VDD_EN

P45

Digital Display Interface

BC24
BE20
BG18
BG20

J47
M45

LVDS

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

[22] INT_LVDS_BLON
[22] INT_LVDS_VDDEN

INT. HDMI

[3]
[3]
[3]
[3]

DMI

D

FDI

U17C

CRT

Cougar Point (DMI,FDI,PM)

R299
*100K/J_4

R301
100K/J_4

CougarPoint_R1P0

PCH Pull-high/low(CLG)

System PWR_OK(CLG)
+3V_S5

+3V_RTC

DPWROK FOR DSW

+3V_S5

+3V

+3V

+3VPCU
+3VPCU

PM_RI#

R239

10K/J_4

10K/J_4

PM_BATLOW#

R509

8.2K/J_4

R209

*1K/J_4

PCIE_WAKE#

R240

10K/J_4

RSMRST#

R276

10K/J_4

SLP_LAN#

R502

*10K/J_4

SYS_PWROK

R515

100K/J_4

SUS_PWR_ACK

R517

10K/J_4

AC_PRESENT

R488

10K/J_4

U15
A

R269
330K/J_4

C288
*0.1U/10V_4

[3,36] SYS_PWROK

SYS_PWROK

+3V_DSW

DSWVREN

R265
*10K_4

R266
*10K_4

IMVP_PWRGD [42]

1

EC_PWROK

R267
*330K/J_4

3

*200/F_4

R288

10K/J_4

A

C301
*0.1U/10V_4

add cap to
timing tune

2

Q27
*PDTC144EU

1

*RB500V-40

1

PM_DRAM_PWRGD R493

2

+3VPCU
R261
100K/J_4

DDPD_HPD_PU

DPWROK
*RB500V-40
D14

TC7SH08FU(F)

10K/J_4

Follow PDG eDP disable guide

D15
+3V_S5

2
4

R445

3

8.2K/J_4

R206

3

R246

XDP_DBRST#

5

CLKRUN#

DDPC_HPD_PU

Q28
*2N7002

PROJECT KL5A

On Die DSW VR Enable

Quanta Computer Inc.

High = Enable (Default)

3/16 Change topology; 200ohm PU to +3V_S5

Size
Document Number
Custom

Low = Disable

5

4

Rev
1A

Cougar Point 1/6

Date:
3

2

Sheet

Friday, October 29, 2010
1

7

of

45

5

4

3

2

+3V_RTC_2

RTC_X2

C20

RTC_RST#

D20

SRTC_RST#

G22

SM_INTRUDER#

K22

PCH_INVRMEN

C17

SRTC_RST#
+3V_RTC

J1

R477

1M/J_4

2

C471
1U/6.3V_4

20MIL

[24]

SPKR

2

BAT_CONN

[24]

ACZ_BITCLK_R

N34

ACZ_SYNC_R

L34

SPKR

T10

ACZ_RST#_R

K34

G34

TP53

To Separate Codec Sync
by PD3

*22P/50V_4
33/J_4

C34
A34

+5V

[24]

ACZ_BITCLK

R470

[24]

ACZ_SYNC

R295

33/J_4 ACZ_SYNC_CODEC

[24]

ACZ_RST#

R471

33/J_4

ACZ_RST#_R

[24]

ACZ_SDOUT

R466

33/J_4

ACZ_SDOUT_R

ACZ_BITCLK_R

ACZ_SDOUT_R

ACZ_SYNC_CODEC 1

3
Q29

ACZ_SYNC_R

A36
C36

[27] INTEL_BT_OFF#
BOARD_ID3

TP55

ME2N7002E

N32

[10] BOARD_ID3

PCH JTAG Debug (CLG)

TP73
TP69

+3V_S5

C

E34

ACZ_SDIN0

2

C386

RTCX2

C38
A38
B37
C37

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

RTCRST#
FWH4 / LFRAME#
SRTCRST#
INTRUDER#

LDRQ0#
LDRQ1# / GPIO23

+3V

INTVRMEN

SERIRQ

TP74
TP75

PCH_JTAG_TCK_R

J3

PCH_JTAG_TMS_R

H7

PCH_JTAG_TDI_R

K5

PCH_JTAG_TDO_R

H1

HDA_BCLK
HDA_SYNC
SPKR

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

HDA_SDO
HDA_DOCK_EN# / GPIO33

+3V

HDA_DOCK_RST# / GPIO13

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

+3V_S5

R521
*100/F_4

[32] PCH_SPI_CLK
[32] PCH_SPI_CS0#

R244
*51/J_4

R212

[32]

*10K/J_4

PCH_SPI_SI

[32] PCH_SPI_SO

PCH_SPI_CLK

T3

PCH_SPI_CS0#

Y14

PCH_SPI_CS1#

T1

PCH_SPI_SI

V4

PCH_SPI_SO

U3

PCH Strap Table
MX25L3205DM2I-12G: AKE39FP0Z00

PCH Dual SPI (CLG)

LPC_DRQ#0 [27]
LCD_BK_OFF# [22]

V5

IRQ_SERIRQ

[27,32]

R510
R548
R467
R205

8.2K/J_4
*10K/J_4
10K_4
10K_4

INTEL_BT_OFF#

R285

10K/J_4
D

[27,32]

JTAG_TCK
JTAG_TMS
JTAG_TDI

W25X32VSSIG: AKE39ZP0N00
Socket: DG008000031

[25]
[25]
[25]
[25]

SATA HDD

AB8
AB10
AF3
AF1

SATA_RXN3
SATA_RXP3
SATA_TXN3
SATA_TXP3

[25]
[25]
[25]
[25]

SATA ODD

Y7
Y5
AD3
AD1

SATA_RXN4
SATA_RXP4
SATA_TXN4
SATA_TXP4

[25]
[25]
[25]
[25]

ESATA #1

Y11

SATAICOMPO

C

SATA_COMP

R492

37.4/F_4

AB13

SATA3_COMP

R491

49.9/F_4

AH1

SATA3_RBIAS

R249

750/F_4

P3

SATA_ACT#

Y10

SATAICOMPI

JTAG_TDO

SPI_CLK

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

Y3
Y1
AB3
AB1

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

+1.05V_PCH

AB12

SATA3COMPI

+3VPCU
R497
*100/F_4

LPC_LFRAME#

E36 LPC_DRQ#0
K36 LCD_BK_OFF

IRQ_SERIRQ
ODD_PRSNT#
LCD_BK_OFF#
SATA_ACT#

AD7
AD5
AH5
AH4

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

R506
*210/F_4
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TDO_R
PCH_JTAG_TCK_R

R222
*100/F_4

D36

AM10
AM8
AP11
AP10

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

HDA_RST#

SATA3RBIAS

SPI_CS0#
SPI_CS1#

SPI

R507
*210/F_4

[27,32]
[27,32]
[27,32]
[27,32]

AM3
AM1
AP7
AP5

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA3RCOMPO
R223
*210/F_4

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

*SHORT_ PAD1

BT1

HDA Bus(CLG)

+3V

RTCX1

LPC

A20

*SHORT_ PAD1

20K/J_4

C192
1U/6.3V_4

18P/50V_4

RTC_X1

SATA 6G

2

C298

1

R480

R273
10M/J_4

SATA

1

R97
1K/J_4

+3V_RTC_0

Y3
32.768KHZ

J2

C478
1U/6.3V_4

30mils

1

U17A

RTC_RST#

20K/J_4

BAT54C

RTC

R485
+3V_RTC_1

IHDA

0/J_6

20MIL

D

18P/50V_4
2
1

R99

C300

+3V_RTC

D9

JTAG

*0/J_6

3
4

R107

+3VPCU

08

Cougar Point (HDA,JTAG,SATA)

20mils
+3V_DSW

1

PCH2(CLG)

RTC Circuitry(RTC)

SATALED#

SPI_MOSI

+3V

SPI_MISO

+3V

SATA_ACT# [31]

V14

SATA0GP / GPIO21

ODD_PRSNT#

P1

BBS_BIT0

R529

*1K/J_4

SPKR

R450

*1K/J_4

R272

330K/J_4

SATA1GP / GPIO19

[25]

CougarPoint_R1P0

Pin Name

Strap description

Sampled

SPKR

No reboot mode setting

PWROK

0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode

Configuration

GNT3# / GPIO55

Top-Block Swap Override

PWROK

0 = "top-block swap" mode
1 = Default (weak pull-up 20K)

INTVRMEN

Integrated 1.05V VRM enable

ALWAYS

Should be always pull-up

+3V

PCI_GNT3#

[9]

+3V_PCH_SPI
U10

B

PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO

R201
R202
R184

33/J_4
33/J_4
33/J_4

PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R

1
6
5
2
3

C268
22P/50V_4

+3V_PCH_SPI

R195

CE#
SCK
SI
SO

HOLD#

VDD

WP#

VSS

MX25L1605A

8
7 R200

+3V_RTC

3.3K/J_4

4

GNT1# / GPIO51

Boot BIOS Selection 1 [bit-1]

PWROK

GPIO19

Boot BIOS Selection 0 [bit-0]

PWROK

HDA_SDO

Flash Descriptor Security

RSMRST

GNT1#

C267
0.1U/10V_4

GNT0#

Boot Location

1

1

SPI

0

0

LPC

PCH_INVRMEN
B

Default weak pull-up on GNT0/1#
[Need external pull-down for LPC BIOS]

*

R448

*1K/J_4

R247

*1K/J_4

BBS_BIT0

R468

*1K/J_4

ACZ_SDOUT_R

BBS_BIT1

[9]

3.3K/J_4

PWROK

0 = Set to Vss
1 = Set to Vcc (weak pull-down 20K)

GPIO28

On-die PLL Voltage Regulator

RSMRST#

0 = Disable
1 = Enable (Default)

HDA_SYNC

On-Die PLL VR Voltage Select

RSMRST

0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V

GPIO8

Integrated Clock Chip Enable

RSMRST#

Should be pull-down
(weak pull-up 20K)

SPI_MOSI

iTPM function Disable

APWROK

0 = Default (weak pull-down 20K)
1 = Enable

NV_ALE

Intel Anti-Theft HDD protection

PWROK

0 = Disable (Internal pull-down 20kohm)

DF_TVS
+3V

DMI/FDI Termination voltage

+3V_PCH_SPI
R199

0R

R197

*0R

0 = Override
1 = Default (weak pull-up 20K)

+3V_S5

+3V_S5

R238
R252

R523

*1K/J_4

R203

+1.8V
DF_TVS
[10]
H_SNB_IVB# [3]
PLL_ODVR_EN

R296

+3V_S5

+3V

2.2K/J_4
4.7K/J_4

1K/J_4

*1K/J_4

[10]

ACZ_SYNC_R

PCH_SPI_SI

A

A

PROJECT KL5A

Quanta Computer Inc.

5

4

3

2

Size
C

Document Number

Date:

Friday, October 29, 2010

Rev
1A

Cougar Point 2/6
Sheet
1

8

of

45

5

4

3

2

1

09

U17B

[25,32]

C46
C44
E40

DGPU_PWR_EN#
BBS_BIT1
BT_DIS
PCI_GNT3#

BBS_BIT1
BT_DIS
PCI_GNT3#

ODD_MDDA#

ODD_MDDA#

D47
E42
F46

MPC_PWR_CTRL#
*0_4 ODD_MDDA_R#
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH

R635

G42
G40
C42
D44
K10

TP62
PCI_PLTRST#

TP37
TP52

CLK_PCI_FB R303
R447
R446

[27] CLK_LPC_DEBUG
[32] CLK_PCI_8512

C6
H49
H43
J48
K42
H40

22/J_4 CLK_PCI_FB_R
22/J_4 CLK_PCI_LPC_R
22/J_4 CLK_PCI_EC_R

AT8

RSVD26
RSVD27

AY5
BA2

USB3.0

NV_ALE

C606
C607

PCIE_TXN5_C
PCIE_TXP5_C

*0.1U/10V_4
*0.1U/10V_4

AT12
BF3

RSVD28
RSVD29

BG36
BJ36
AV34
AU34

PERN3
PERP3
PETN3
PETP3

BF36
BE36
AY34
BB34

PERN4
PERP4
PETN4
PETP4

BG37
BH37
AY36
BB36

PERN5
PERP5
PETN5
PETP5

BJ38
BG38
AU36
AV36

PERN6
PERP6
PETN6
PETP6

BG40
BJ40
AY40
BB40

PERN7
PERP7
PETN7
PETP7

BE38
BC38
AW38
AY38

SMB_PCH_DAT

A12

DRAMRST_CNTRL_PCH

C8

SMB_ME0_CLK

SML0DATA

G12

SMB_ME0_DAT

SML1ALERT# / PCHHOT# / GPIO74

+3V_S5
SML0ALERT# / GPIO60
SML0CLK

PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V

SML1ALERT#_R

SML1CLK / GPIO58

E14

SMB_ME1_CLK

+3V_S5

SML1DATA / GPIO75

M16

SMB_ME1_DAT

PERN8
PERP8
PETN8
PETP8

CL_CLK1

Y40
Y39

USB/eSATA Combo #1(Phoenix debug)
USB#0-> L port((BIOS debug)

J2
CLKOUT_PCIE1N
CLKOUT_PCIE1P

EHCI1

AB49
AB47

PCIECLKRQ1#

WWAN(common design reserved)
USBP5- [27]
USBP5+ [27]

BlueTooth

M1

CLKOUT_PCIE2N
CLKOUT_PCIE2P

AA48
AA47

PCIECLKRQ2#

V10

USB(common design reserved)
USBP9- [31]
USBP9+ [31]
USBP10- [26]
USBP10+ [26]

Y37
Y36

USB #1-->R port(DB&BIOS debug)

USB3.0

Card Reader

A8

EHCI2
CLKOUT_PCIE4N
CLKOUT_PCIE4P

EC-B-02

Y43
Y45

PCIECLKRQ4#
USB_BIAS

C33

USBRBIAS#

[25]
[25]
[27]
[27]
[31]
[31]
[27]
[27]

R286

L12

22.6/F_4

V45
V46

USB port 6,7disable for HM65.
B33

USBRBIAS

L14

CLKOUT_PCIE0N
CLKOUT_PCIE0P

+3V_S5

PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P

CL_DATA1
CL_RST1#

PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLOCKS

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+

DRAMRST_CNTRL_PCH

[4]

D

C13

+3V_S5

+3V_S5

+3V_S5
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

CLKOUT_DMI_N
CLKOUT_DMI_P

M7

CL_CLK1

TP68

T11

CL_DAT1

TP63

P10

CL_RST#

TP61

M10 PEG_CLKREQ#
AB37 CLKOUT_PEG_A_N
AB38 CLKOUT_PEG_A_P
AV22
AU22

CLK_CPU_BCLKN
CLK_CPU_BCLKP

AM12
AM13

CLK_DPLL_SSCLKN
CLK_DPLL_SSCLKP

[3]
[3]

+3V

PCIECLKRQ1# / GPIO18

CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
CLKIN_DMI_N
CLKIN_DMI_P

+3V

PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P

CLKIN_GND1_N
CLKIN_GND1_P

+3V_S5

PCIECLKRQ3# / GPIO25

CLKIN_DOT_96N
CLKIN_DOT_96P
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26

+3V_S5

CLKIN_SATA_N
CLKIN_SATA_P

+3V_S5

CLKIN_PCILOOPBACK

CLKOUT_PCIE5N
CLKOUT_PCIE5P

REFCLK14IN

PCIECLKRQ5# / GPIO44

[3]
[3]

BF18 CLK_BUF_PCIE_3GPLLN
BE18 CLK_BUF_PCIE_3GPLLP
BJ30 CLK_BUF_BCLKN
BG30 CLK_BUF_BCLKP
G24 CLK_BUF_DREFCLKN
E24 CLK_BUF_DREFCLKP
C

AK7 CLK_BUF_DREFSSCLKN
AK5 CLK_BUF_DREFSSCLKP
K45

CLK_PCH_14M

H45 CLK_PCI_FB

C321

27P/50V_4

PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

A14
K20
B17
C16
L16
A16
D14
C14

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

USB_OC0#
USB_OC1#
USB_OC2#

AB42
AB40

[27]
[27]
[25]

E6

CLK_FLEX1
CLK_25M
CLK_48M_CARD_C

CLK_BUF_BCLKN
CLK_BUF_BCLKP

CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M

RF4
RF5

V40
V42

For RF

For RF
Please Close to U17

T13

[31] DIS_BULE_LED

V38
V37

*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4

*10P/50V/COG_4
*10P/50V/COG_4

RF2

RF1

RF3
*10P/50V/COG_4

*10P/50V/COG_4

*10P/50V/COG_4

*EGA-0402

RF6

[28] PCIE_RXN5
[28] PCIE_RXP5
[28] PCIE_TXN5
[28] PCIE_TXP5

TP64

RV10

*10P/50V/COG_4

PCIE_TXN3_C
PCIE_TXP3_C

0.1U/10V_4
0.1U/10V_4

EC-B-02

CougarPoint_R1P0
CLK_PCI_FB_R

C453
C457

SMB_PCH_CLK

C9

SMBCLK
SMBDATA

SMBUS

AV5
AV10

RSVD25

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

H14

SMBALERT# / GPIO11

Link

RSVD23
RSVD24

[27]
[27]
[27]
[27]

WLAN

PCIE_TXN2_LAN_C
PCIE_TXP2_LAN_C

0.1U/10V_4
0.1U/10V_4

Controller

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

C445
C441

PERN2
PERP2
PETN2
PETP2

K12
TP57
TP60

CLK_PCH_ITPN_R
CLK_PCH_ITPP_R

AK14
AK13

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

XTAL25_IN
XTAL25_OUT

PEG_B_CLKRQ# / GPIO56

V47
V49

XTAL25_IN
XTAL25_OUT

Y47

XCLK_RCOMP

2

[8]
[27]
[8]

DGPU_HOLD_RST#

RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

LAN

BE34
BF34
BB32
AY32

SMBALERT#

R323
1M/J_4

+3V_S5

Y4
25MHZ
1

C

RF_ON

K40
K38
H38
G38

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

AT10
BC8

PCIE_RXN2_LAN
PCIE_RXP2_LAN
PCIE_TXN2_LAN
PCIE_TXP2_LAN

E12

+3V_S5

XCLK_RCOMP

R311

90.9/F_4

C322

27P/50V_4

+1.05V_PCH

CLKOUT_PCIE6N
CLKOUT_PCIE6P
PCIECLKRQ6# / GPIO45

+3V_S5
+3V

CLKOUT_PCIE7N
CLKOUT_PCIE7P

+3V

PCIECLKRQ7# / GPIO46

+3V_S5

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

+3V
+3V

FLEX CLOCKS

[31]

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

TP21
TP22
TP23
TP24

RSVD5
RSVD6

[23]
[23]
[23]
[23]

RF7
RF8
RF9
RF10
RF11
RF12
RF13

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30

RSVD

B21
M20
AY16
BG46

PCI

D

AY7
AV7
AU3
BG4

RSVD1
RSVD2
RSVD3
RSVD4

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

USB

BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45

PERN1
PERP1
PETN1
PETP1

PCI-E*

BG34
BJ34
AV32
AU32

U17E

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

TP51

K43
F47

CLK_FLEX1

TP65

EC-C-04

H47 CLK_25M
K49

R605

CLK_48M_CARD_C

R304

22_4

*0_4

CLK_48M_CARD

PCH_CLK25M

[28]

[26]

CougarPoint_R1P0

Please Close to U17

EC-C-01

EC-C-01

DGPU Power ON
+3V

SMBus(CLK)

PEG CLK detect
B

B

*DIS@0_4

+3V

+3V

5

R298
DIS@1K_4
1

MAINON

4

GFXPG

SMB_PCH_DAT

[10,15]

3

SMB_RUN_DAT

1

SMB_RUN_DAT

CLK Gen(CLK)
02/20 DEL for Pre-ES1

[13,14]

Q19
ME2N7002E

[24,28,32,34,35,36,38,40,41]

3

2

2
U18

CPU_CLK select(CLK)

+3V
PEG_CLKREQ#

DIS@MC74VHC1G08DFT2G

3

1

PEX_CLKREQ#

[15]

DGPU_PWR_EN#

2

0

DIS@ME2N7002E

Q21
DIS@ME2N7002E

R143
4.7K/J_4

CPU_SEL

1

Q30

2

GFXON

3

[15,36,39]

R170
4.7K/J_4

2

R313

SMB_PCH_CLK 3

SMB_RUN_CLK

1

SMB_RUN_CLK

1

CPU0/1=133MHz
(default)

CPU0/1=100MHz

[13,14]

Q16
ME2N7002E
+3V_S5

WLAN

PCI/USBOC# Pull-up(CLG)
R236
USB_OC4#
USB_OC1#
USB_OC3#
USB_OC2#

5
PCI_PLTRST#

2

PLTRST#

4

10
9
8
7
6

[27] PCIE_CLKREQ_WLAN#

USB_OC7#
USB_OC6#
USB_OC0#
USB_OC5#

1
2
3
4
5

LAN
[23] CLK_PCIE_LANN
[23] CLK_PCIE_LANP

1

[23] PCIE_CLKREQ_LAN#

3

10KX8
U16
TC7SH08FU(F)

PLTRST#

*0_4

2 0X2 CLKOUT_PCIE2N
CLKOUT_PCIE2P
4
*Short_4@NC

3
1
R440
R224

CLKOUT_PCIE1N
4
CLKOUT_PCIE1P
2
0X2
*Short_4@NC PCIECLKRQ1#

10K/J_4

PCIE_CLKREQ_WLAN#

R210

10K/J_4

PCIE_CLKREQ_LAN#

+3V_S5

EC-B-03

+3V_S5

10K/J_4

DIS_BULE_LED

PLTRST#

MPC_PWR_CTRL#
BT_DIS

[3,23,27,28]

10
9
8
7
6

EXTTS_SNI_DRV0_PCH
DGPU_PWR_EN#
ODD_MDDA_R#
EXTTS_SNI_DRV1_PCH

1
2
3
4
5

R606

USB3.0 Chip
3
1
R607

[28] CLK_100_USB30_P
[28] CLK_100_USB30_N

3

SMB_ME1_CLK

1

PCIECLKRQ4#

Q46
ME2N7002E
+3V_S5

SW:Ra
UMA:Rb

R546

DIS@10K/J_4

PEG_CLKREQ#

PEG_CLKREQ#
A

*UMA@10K/J_4

R547

R551
2.2K/J_4

2

EC-B-02
*DIS@0_4

10K/J_4

MB_CLK1

CLKOUT_PCIE4P
CLKOUT_PCIE4N

4
2
0X2

R550
2.2K/J_4

EC-B-02
[18,29,32]

10KX8
R310

R208

+3V

A

GPU RST#(CLG)

SMBus/Pull-up(CLG)

+3V

PCIECLKRQ2#

R217

R543
R251
100K/J_4

R297

R250

CLK_REQ/Strap Pin(CLG)
R4391
3

[27] CLK_PCIE_WLANN
[27] CLK_PCIE_WLANP

+3V_S5
C290
0.1U/10V_4

2

PLTRST#(CLG)

+3V

+3V

5
PLTRST#

2

DGPU_HOLD_RST#

1

4

3
R302
DIS@100K/J_4

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
RF_ON

C436
DIS@0.1U/10V_4

GPU_RST#

[15]

RF_ON

R443
R452
R457
R459
R438

R442

8.2K/J_4
8.2K/J_4
8.2K/J_4
8.2K/J_4
10K/J_4

[15] CLK_PCIE_VGAP
[15] CLK_PCIE_VGAN

100K/J_4

CLKOUT_PEG_A_P
4
CLKOUT_PEG_A_N
2
DIS@0X2

MPC Switch Control

U19 DIS@TC7SH08FU(F)
R647

3
1
R441

SW:Stuff
UMA:Non-stuff

+3V

MPC_PWR_CTRL#

Low = MPC ON
High = MPC OFF (Default)

CLK_BUF_BCLKN
CLK_BUF_BCLKP

R283
R284

10K/J_4
10K/J_4

CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M

R482
R484
R476
R479
R512
R511
R458

10K/J_4
10K/J_4
10K/J_4
10K/J_4
10K/J_4
10K/J_4
10K/J_4

[18,29,32]

R648

*10K/J_4

MPC_PWR_CTRL#

R451

DIS_BULE_LED

*1K/J_4

3

+3V_S5

R544

100K/J_4

R494

1K/J_4

DRAMRST_CNTRL_PCH

R498
R153
R168
R241
R495
R503

10K/J_4
2.2K/J_4
2.2K/J_4
2.2K/J_4
2.2K/J_4
10K/J_4

SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

4

3

2

Rev
1A

Cougar Point 3/6

Date:
5

SMB_ME1_DAT

1
Q47
ME2N7002E

*DIS@0_4
DGPU_HOLD_RST#

MB_DATA1

Friday, October 29, 2010
1

Sheet

9

of

45

5

4

3

2

1

10

GPIO Pull-up/Pull-down(CLG)

Cougar Point (GPIO,VSS_NCTF,RSVD)

+3V_S5

U17F
S_GPIO R496
[28,32] EC_EXT_SMI#

D

[32] EC_EXT_SCI#
TP103
[27] LAN_DISABLE#

100_4

T7

BMBUSY# / GPIO0

+3V

+3V

TACH4 / GPIO68

C40

A42

TACH1 / GPIO1

+3V

+3V

TACH5 / GPIO69

B41 R291

BOARD_ID1

H36

TACH2 / GPIO6

+3V

+3V

TACH6 / GPIO70

C41

+3V

+3V

TACH7 / GPIO71

A40

E38

TACH3 / GPIO7

ICC_EN#

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

HOST_ALERT#1_R

G2

GPIO15 +3V_S5

BOARD_ID0

U2

SATA4GP / GPIO16

PECI

+3V

BIOS_REC

T5

SCLOCK / GPIO22

USB30_ID

E8

GPIO24 / MEM_LED +3V_S5

GPIO27
R501

[8] PLL_ODVR_EN

SYSTEM_ID
[27]

BT_ON#

BT_ON#

C

P8

GPIO28

+3V_S5

K1

STP_PCI# / GPIO34

V8

+3V

GPIO35 +3V
SATA2GP / GPIO36

+3V

FDI_OVRVLTG

M5

SATA3GP / GPIO37

MFG_MODE

N2

SLOAD / GPIO38

DGPU_PRSNT#

M3

SDATAOUT0 / GPIO39

+3V

TEST_SET_UP

V13

SDATAOUT1 / GPIO48

+3V

[29,32] TEMP_ALERT#
SV_DET

EC-B-01

+3V

+3V

EC_A20GATE [32]

AU16

TP59
EC_RCIN#

P5

PROCPWRGD
THRMTRIP#

AY10

INIT3_3V#

T14

DF_TVS

AY1

TS_VSS1

AH8

TS_VSS2

AK11

TS_VSS3

AH10

TS_VSS4

AK10

EC_RCIN#

HW PG

[32,36,37,38,40,41,42]

U14
DIS@MC74VHC1G08DFT2G

2

GFXPG

[9,15]

R519
R508
R227
R522

10K/J_4
10K/J_4
10K/J_4
10K/J_4

GPIO27

R487

10K/J_4

GFXPG_R

R228

DIS@10K/J_4

USB30 ID: 0-->Support
1-->Nonsupport

H_PW RGOOD [3]
PCH_THRMTRIP#

R499

390/J_4

PM_THRMTRIP# [3]

EC-B-11

USB30_ID
DF_TVS

[8]

+3V_S5

R645

*10K/J_4

USB30_ID

R646

10K/J_4

EC-B-04, EC-B-11

Board ID
Board ID
SYSTEM_ID ID2
For Function GPIO34
GPIO71

ID1
GPIO6

ID0
GPIO16

ID3
GPIO13

C

Board ID use below GPIO:
SDV

0
0
0
0
0

SIV

NC_1

P37

VSS_NCTF_15

BG2

VSS_NCTF_16

BG48

VSS_NCTF_17

BH3

3/16 Connected to GND
DG rev0.9

SVT
SOVP

0
0
0
0
0

D6

GPIO57 +3V_S5

VSS_NCTF_18

BH47

A4

VSS_NCTF_1

VSS_NCTF_19

BJ4

A44

VSS_NCTF_2

VSS_NCTF_20

BJ44

A45

VSS_NCTF_3

VSS_NCTF_21

BJ45

A46

VSS_NCTF_4

VSS_NCTF_22

BJ46

A5

VSS_NCTF_5

VSS_NCTF_23

BJ5

A6

VSS_NCTF_6

VSS_NCTF_24

BJ6

SV_SET_UP
High = Strong (Default)

0
0
1
1
0

0
0
0
0
1

0
1
0
1
0

BOARD_ID0
BOARD_ID1
BOARD_ID3

ID2: 0-->6 layer
1-->8 layer

+3V
R248
R464
R289

*10K/J_4 BOARD_ID0
10K/J_4 BOARD_ID1
10K/J_4 BOARD_ID2

R226
R461
R290

10K/J_4
*10K/J_4
*10K/J_4

R641
R229

10K/J_4
10K/J_4

CPU_ID
SYSTEM_ID

R642
R230

*10K/J_4
*10K/J_4

R655

10K/J_4

BOARD_ID3

R644

System ID: 0-->KL5
1-->KL6
+3V_S5

CPU_ID: 0-->35W
1-->45W

*10K/J_4

BOARD_ID3

[8]
B

B3

VSS_NCTF_7

VSS_NCTF_25

C2

B47

VSS_NCTF_8

VSS_NCTF_26

C48

BD1

VSS_NCTF_9

VSS_NCTF_27

D1

BD49

VSS_NCTF_10

VSS_NCTF_28

D49

BE1

VSS_NCTF_11

VSS_NCTF_29

E1

BE49

VSS_NCTF_12

VSS_NCTF_30

E49

BF1

VSS_NCTF_13

VSS_NCTF_31

F1

VSS_NCTF_32

F49

TEST_SET_UP

5
1
4

EC_A20GATE
EC_RCIN#
TEMP_ALERT#
BT_ON#

D

R540
R541

+3V
+3V

10K/J_4
*0/J_4

R520

*10K/J_4

SV_DET

R525

100K/J_4

3

GFXPG_R

GFXPG_R

[32]

SIT

+3V

10K/J_4
10K/J_4

SATA5GP / GPIO49

*DIS@0_4
+3V

BOARD_ID2

P4

AY11

R293
R462

10K_4

V3

B

R214

+3V

GPIO27

K4

GPIO36

TP67

+3V

DSW

E16

*Short_4_NC

TACH0 / GPIO17

CPU/MISC

D40

NCTF

EC-B-06

GPIO

RCIN#
GFXPG_R

EC_EXT_SMI#
EC_EXT_SCI#

+3V
R608

+3V_S5
A20GATE

10K/J_4

+3V

1.5K/F_4

COLOR_ENGINE_DET

+3V_S5

LAN_DISABLE#

R242

CPU_ID

EC_EXT_SMI#

EC_EXT_SCI#

LAN_DISABLE#

BF49

VSS_NCTF_14

Optimus

UMA

+3V_S5

SGPIO
+3V

HOST_ALERT#1_R R243

Stuff

R539

R527

No Stuff

R527

R539

1K/J_4

CougarPoint_R1P0
S_GPIO

R513
R500

10K/J_4
*0/J_4

Intel ME Crypto Transport Layer
Security (TLS) cipher suite

+3V

Low = Disable (Default)
R527
A

+3V
R534

100K/J_4

FDI_OVRVLTG R537

*1K/F_4

+3V
GPIO36

R636

*200K/F_4

+3V
BIOS_REC

R528
R524

10K/J_4
*0/J_4

High = Enable

MFG-TEST

FDI TERMINATION
VOLTAGE OVERRIDE

LOW - Tx, Rx terminated
to same voltage

DMI TERMINATION
VOLTAGE OVERRIDE

High = Disable (Default)
BIOS RECOVERY

MFG_MODE

4

R204
R225

Low = Enable
3

DIS@100K/J_4
A

10K/J_4
*0/J_4

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Cougar Point 4/6

Date:
5

R539

PROJECT KL5A
+3V

Low = Tx, Rx terminated to
same voltage (DC Coupling Mode)
(DEFAULT)

DGPU_PRSNT#
*UMA@10K/J_4

2

Sheet

Friday, October 29, 2010
1

10

of

45

5

4

3

2

1

11

PCH5(CLG)
COUGAR POINT (POWER)
+VCCA_DAC_1_2

R277

+1.05V_VCCIO

VCCIO[28]

BJ22

VCCAPLLEXP

0/F_1206

AN16
C451
1U/6.3V_4

C462
1U/6.3V_4

AN17

C482
1U/6.3V_4

AN21

C463
1U/6.3V_4

C306
10U/6.3V_6

VCCIO[18]
VCCIO[19]
VCCIO[20]

+3V_VCC_EXP
R279

*Short_8_NC
C307
0.1U/10V_4

+VCCAFDI_VRM

+VCCAFDI_VRM

AP26

VCCIO[23]

AT24

VCCIO[24]

+1.05V_PCH

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VSSALVDS

AK37

VCCTX_LVDS[1]

AM37

VCCTX_LVDS[2]

AM38

VCCTX_LVDS[3]

AP36

VCCTX_LVDS[4]

AP37

+VCC_TX_LVDS

*0/J_8

+1.05V_VCCAPLL_FDI

BG6

R233

*Short_8_NC

+1.05V_VCCDPLL_FDI

AP17

C447
0.01U/25V_4

VCCIO[27]

AU20

VCCDMI[2]

*0/J_4

R436

+VCCPDSW

V34

C455
0.1U/10V_4

VccAFDIPLL

VCCDMI[1]

AT16

PCH_VCCDSW

+VCCAPLL_CPY_PCH

L14

DIS
0 ohm
0 ohm

C485
*0.1U/10V_4

+3V_SUS_CLKF33

*Short_6_NC

+VCCDPLL_CPY

*10uH/100mA_8
R281

+VCCSUS1

SW
NA
NA

+1.1V_VCC_DMI

C468
*1U/6.3V_4

VCCME(+1.05V) = ??A(??mils)
+1.05V_PCH

*Short_6_NC

+VCCAFDI_VRM

+1.05V_VCCEPW

R328

+1.05V_PCH
C473
1U/6.3V_4

*Short_4_NC

C456
1U/6.3V_4

C464
1U/6.3V_4

+1.1V_VCC_DMI_CCI
VCCCLKDMI

C448
1U/6.3V_4

AG16

VCCDFTERM[2]

AG17

VCCDFTERM[3]

AJ16

VCCDFTERM[4]

AJ17

+VCC_DMI_CCI

L18

AB36

VCCDFTERM[1]

C314
22U/6.3V_8

VCCCLKDMI = 20mA(8mils)

AT20

*10uH_8

+1.8V VCCPNAND

R235

FDI

R213

CougarPoint_R1P0

0/J_6
*0/J_6

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]
VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

*Short_6_NC
C474
1U/6.3V_4

0/J_6
R314

C483

0.1U/10V_4 +VCCRTCEXT

+VCCAFDI_VRM

*Short_6_NC

+VCCAFDI_VRM

N16

DCPRTC

Y49

VCCVRM[4]

65mA(10mils)

+1.05V_VCCA_A_DPL

BD47

VCCADPLLA

8mA(8mils)

+1.05V_VCCA_B_DPL

BF47

VCCADPLLB

R270

*0/J_6

+V1.05V_SSCVCC
C475
*1U/6.3V_4

VCCVRM: 1.8V (Destop)
1.5V (Mobile)

C481

0.1U/10V_4 +VCCSST

+1.05V_PCH

+V1.05M_VCCSUS

AF17
AF33
AF34
AG34

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17
V19

DCPSUS[1]
DCPSUS[2]

BJ8

V_PROC_IO

1mA(8mils)
R260

VCCRTC<1mA(8mils)

*Short_4_NC

+3V_RTC

C292
0.1U/10V_4

C293
0.1U/10V_4

A22
C304
1U/6.3V_4

C303
0.1U/10V_4

C305
0.1U/10V_4

VCCIO[32]

T27

VCCIO[33]

T29

VCCSUS3_3[7]

T23

VCCSUS3_3[8]

T24

VCCRTC

D

*Short_6_NC

C465
0.1U/10V_4
+3V_VCCPUSB
R262

VCCSUS3_3[9]

V23

VCCSUS3_3[10]

V24

VCCSUS3_3[6]

P24

+3V_VCCAUBG

VCCIO[34]

T26

+VCCAUPLL

V5REF_SUS

M26

+5V_PCH_VCC5REFSUS

VCCSUS3_3[1]

*Short_6_NC

C466
0.1U/10V_4

R278

*Short_6_NC

+1.05V_PCH
R294

VCC5REFSUS=1mA
10/F_4

+5V_S5

RB500V-40

+3V_S5

C459
0.1U/10V_4

AN23

+VCCA_USBSUS

AN24

+3V_VCCPSUS

P34

+5V_PCH_VCC5REF

C469
*1U/6.3V_4

V5REF= 1mA
V5REF
VCCSUS3_3[2]

N20

VCCSUS3_3[3]

N22

VCCSUS3_3[4]

P20

VCCSUS3_3[5]

P22

VCC3_3[1]

AA16

VCC3_3[8]

W16

VCC3_3[4]

T34

VCC3_3[2]

AJ2

VCCIO[5]

AF13

VCCIO[12]

AH13

VCCIO[13]

AH14

VCCIO[6]
VCCAPLLSATA

R292

10/F_4

+5V

D16

RB500V-40

+3V

R271

*Short_6_NC

+3V_S5

C446
1U/6.3V_4
+3V_VCCPSUS

VCCSUS3_3 = 119mA(15mils)

C

C470
1U/10V_4
R536

+3V_VCCPCORE

*Short_6_NC

+3V

VCCPCORE = 28mA(10mils)

+3V

C480
0.1U/10V_4

+3V
C491
0.1U/10V_4
R234

+V1.05S_SATA3

*Short_8_NC

??mA(??mils)
L12

+V1.1LAN_VCCAPLL

*10uH/100mA_8

+1.05V_PCH

*Short_6_NC

+1.05V_PCH

VCCVRM= 114mA(15mils)
AF11

VCCIO[2]

AC16

VCCIO[3]

AC17

VCCIO[4]

AD17

+1.05V_PCH

C484
1U/10V_4

AF14
AK1

VCCVRM[1]

L17

VCCASW[22]

T21

VCCASW[23]

V21

VCCASW[21]

T19

VCCSUSHDA

P32

C280
*10U/6.3V_6

+VCCAFDI_VRM

R532

+1.05V_VCCIO1
C479
1U/6.3V_4

VCCME = 1.01A(60mils)

VCCSUSHDA= 10mA(8mils)

+V3.3A_1.5A_HDA_IO
C454
*1U/6.3V_4

10uH/100mA

+3V

R473

*0/J_4

+1.5V_SUS

R474

0/J_4

+3V_S5

C450
0.1U/10V_4

+1.05V_VCCA_A_DPL
+ C312
*220U/2.5V_3528

C311
1U/6.3V_4

+ C309
*220U/2.5V_3528

C310
1U/6.3V_4

*0/J_6
L16

R331

VCCSUS3_3 = 119mA(15mils)
+3V_S5

R263

B

CougarPoint_R1P0

+1.05V_PCH

R326

C460
1U/6.3V_4

+1.05V_VCCEPW

+VTT_VCCPCPU

C294
4.7U/6.3V_6

P28

C449
0.1U/10V_4

*Short_6_NC

VCCDIFFCLKN= 55mA(10mils)
VCCSSC= 95mA(10mils)

P26

VCCIO[31]

DCPSUS[4]

*0/J_6

C452
1U/6.3V_4

VCCIO[30]

*Short_8_NC

D17

VCCSPI = 20mA(8mils)

+VCCAFDI_VRM

R300

AA19

AD31

+1.05V_PCH

R317

DCPSUS[3]

AD29

+VCCDIFFCLK
+VCCDIFFCLKN

+1.5V

AL24

0/J_4

R315

+1.05V_PCH

VCCIO[14]

R312

C444
1U/6.3V_4

B

VCCAPLLDMI2

AL29

AC31

= 200 mA(10mils)

VCCIO[29]

VCC3_3[5]

*1/F_4

+3V_S5
R207

DCPSUSBYP

+1.05V_PCH

R282
N26

VCCDSW3_3

R321

+1.05V_PCH

C275
1U/6.3V_4

T38

AC29

C477
0.1U/10V_4

V1

VCCACLK

BH23

AC27

+1.05V_PCH

R535

VCCSPI

C318
22U/6.3V_8

*Short_8_NC

+3V

V12

AA27

C315
*10U/6.3V_6

+VCCP_NAND

T16

VccASW =1.61 A(70mils)

0/F_1206

C472
1U/6.3V_4

+VCCAFDI_VRM

POWER

SW@0.1uH_8

Rb *DIS@0/J_4

+1.05V_PCH
C299
*10U/6.3V_6

Ra
Rb

AD49

VCCDSW3_3= 3mA

C308
22U/6.3V_8

+3V

V33

+3V_VCCME_SPI

+1.05V_PCH

L15
R465

C442
0.01U/25V_4

R481

VCCVRM[3]

VCCVRM[2]

R259

0/J_4

R542

+1.8V

VCCDMI = 42mA(10mils)
VCC3_3[7]

R538

+1.05V_PCH

VccTX_LVDS=60mA(10mils)

VCC3_3[6]

+3V_S5
+3V_DSW

VCCVRM = 159mA(10mils)

VCCIO[21]
VCCIO[22]

SW@0/J_4

Ra *DIS@0/J_4

C486
0.1U/10V_4

VCCIO[17]

AP21

Vcc3_3 =0.409 A(20mils)
+3V

VCCIO[16]

AN27

AP24

C

VCCIO[15]

AN26

AP23

AK36

+3V_VCC_GIO

VccIO =4.07 A(165mils)

+3V

R444
R454

VCCALVDS

+VCCACLK

USB

AN19

VccALVDS=1mA(8mils)

+1.05V_VCCUSBCORE

*0/J_8
U17J

+VCCALVDS

U47

R316

+1.05V_PCH

C319
10U/6.3V_6

Clock and Miscellaneous

+1.05V_PCH

C316
0.1U/10V_4

SATA

C296
*10U/6.3V_6

C313
0.01U/25V_4

MISC

+1.05V_VCCAPLL_EXP
*1uH/25mA_6

R322
*0/J_6

CPU

L13

*Short_6_NC

U48

RTC

+1.05V_PCH

+1.05V_PCH_VCCDPLL_EXP

VSSADAC

HVCMOS

R237

CRT

C270
10U/6.3V_6

VCCADAC

VCC CORE

C467
1U/6.3V_4

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]

LVDS

C461
1U/6.3V_4

AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31

DMI

C458
1U/6.3V_4
D

+1.05V_PCH

POWER

VccCORE =1.6 A(70mils)

Cougar Point-M (POWER)

180ohm/5A

HDA

U17G

+1.05V_PCH_VCC
0/F_1206

VCCIO

R215

DFT / SPI

+1.05V_PCH

+3V

L19

PCI/GPIO/LPC

VccADAC =1mA(8mils)

1/F_4

+3V_SUS_CLKF33_R

L22

10uH/100mA_8

10uH/100mA

+1.05V_VCCA_B_DPL

+3V_SUS_CLKF33
C325
10U/6.3V_6

C443
1U/10V_4

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Cougar Point 5/6

Date:
5

4

3

2

Friday, October 29, 2010
1

Sheet

11

of

45

5

4

3

2

1

12

PCH6(CLG)

U17I

IBEX PEAK-M (GND)
D

U17H
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3

C

B

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

CougarPoint_R1P0
A

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

D

C

B

A

CougarPoint_R1P0

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Cougar Point 6/6

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

12

of

45

5

4

3

2

1

13

DDR_RVS(DDR)

D

R54
R50

+3V

10K/J_4
10K/J_4

[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_W E#

DIMM1_SA0
DIMM1_SA1

[9,14] SMB_RUN_CLK
[9,14] SMB_RUN_DAT
[4]
[4]

C

M_B_ODT0
M_B_ODT1

02/23 Remove 0ohm to GND

[4] M_B_DQSP[7:0]

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

[4] M_B_DQSN[7:0]

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

PC2100 DDR3 SDRAM SO-DIMM
(204P)

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ0
M_B_DQ1
M_B_DQ6
M_B_DQ7
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ10
M_B_DQ8
M_B_DQ9
M_B_DQ11
M_B_DQ15
M_B_DQ20
M_B_DQ21
M_B_DQ18
M_B_DQ22
M_B_DQ17
M_B_DQ16
M_B_DQ19
M_B_DQ23
M_B_DQ25
M_B_DQ30
M_B_DQ27
M_B_DQ26
M_B_DQ28
M_B_DQ24
M_B_DQ31
M_B_DQ29
M_B_DQ37
M_B_DQ36
M_B_DQ34
M_B_DQ35
M_B_DQ33
M_B_DQ32
M_B_DQ39
M_B_DQ38
M_B_DQ40
M_B_DQ47
M_B_DQ43
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ44
M_B_DQ46
M_B_DQ51
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ48
M_B_DQ50
M_B_DQ52
M_B_DQ49
M_B_DQ63
M_B_DQ57
M_B_DQ61
M_B_DQ62
M_B_DQ60
M_B_DQ56
M_B_DQ58
M_B_DQ59

[4]
+1.5V_SUS

2.48A

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

+3V

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

VREF_DQ
VREF_CA

R51
+3V
[14] PM_EXTTS#0
[4,14] DDR3_DRAMRST#

[6] SMDDR_VREF_DQ1_M3

SMDDR_VREF_DQ1_M1 R151

0/J_6

SMDDR_VREF_DQ1_M3 R150

*0/J_6

JDIM2B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

10K/J_4

+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM
(204P)

M_B_DQ[63:0]

JDIM2A
[4] M_B_A[15:0]

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

D

C

VTT1
VTT2
GND
GND

203
204

+0.75V_DDR_VTT

205
206

DDR3 SODIMM(204P,H4.0,RVS)

DDR3 SODIMM(204P,H4.0,RVS)

Place these Caps near So-Dimm1.
B

B

+1.5V_SUS

C141
10u/6.3V_6

C102
10U/6.3V_6

C95
10U/6.3V_6

C121
10U/6.3V_6

C116
10U/6.3V_6

C106
10U/6.3V_6

C90
*10U/6.3V_6

C105
1U/10V_4

C98
1U/10V_4

C86
1U/10V_4

C77
10U/6.3V_8

C138
10U/6.3V_8

+SMDDR_VREF_DIMM

+3V

+SMDDR_VREF_DQ1

+0.75V_DDR_VTT

C48
2.2U/6.3V_6

C49
0.1u/10V_4

C33
1U/6.3V_4

C34
1U/6.3V_4

C41
1U/6.3V_4

C40
1U/6.3V_4

C32
10U/6.3V_6

VREF DQ1 M1 Solution
+1.5V_SUS

R148

SMDDR_VREF

*0/J_6

C74
0.1u/10V_4

C35
*10U/6.3V_6

STD 4H

STD 8H

FOX

DGMK4000090

DGMK4000122

R155
1K/F_4

LTK

DGMK4000005

DGMK4000087

SMDDR_VREF_DQ1_M1

SUY

DGMK4000181

DGMK4000182

R146
1K/F_4

SKT

DGMK0000120

DGMK4000139

A

[5,14,36]

C87
1U/10V_4

C75
2.2U/6.3V_6

C240
0.1u/10V_4

C230
2.2U/6.3V_6

A

PROJECT KL5A
C228
0.1u/10V_4

Quanta Computer Inc.
Size
Document Number
Custom

Standard 8H type:DDR-C-2013310-204p-1

Rev
1A

DDRIII SO-DIMM-0

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

13

of

45

5

4

3

2

1

14

DDR_RVS(DDR)

D

R55
R52

10K/J_4
10K/J_4

[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

DIMM0_SA0
DIMM0_SA1

[9,13] SMB_RUN_CLK
[9,13] SMB_RUN_DAT
[4]
[4]

M_A_ODT0
M_A_ODT1

02/23 Remove 0ohm to GND

C

[4] M_A_DQSP[7:0]

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

[4] M_A_DQSN[7:0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

116
120

ODT0
ODT1

11
28
46
63
136
153
170
187

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

PC2100 DDR3 SDRAM SO-DIMM
(204P)

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ0
M_A_DQ1
M_A_DQ3
M_A_DQ2
M_A_DQ13
M_A_DQ9
M_A_DQ15
M_A_DQ14
M_A_DQ12
M_A_DQ8
M_A_DQ10
M_A_DQ11
M_A_DQ22
M_A_DQ19
M_A_DQ16
M_A_DQ21
M_A_DQ18
M_A_DQ23
M_A_DQ17
M_A_DQ20
M_A_DQ31
M_A_DQ27
M_A_DQ30
M_A_DQ29
M_A_DQ24
M_A_DQ26
M_A_DQ25
M_A_DQ28
M_A_DQ37
M_A_DQ33
M_A_DQ38
M_A_DQ34
M_A_DQ32
M_A_DQ36
M_A_DQ35
M_A_DQ39
M_A_DQ44
M_A_DQ47
M_A_DQ46
M_A_DQ45
M_A_DQ41
M_A_DQ40
M_A_DQ42
M_A_DQ43
M_A_DQ54
M_A_DQ55
M_A_DQ51
M_A_DQ50
M_A_DQ48
M_A_DQ49
M_A_DQ53
M_A_DQ52
M_A_DQ61
M_A_DQ58
M_A_DQ57
M_A_DQ63
M_A_DQ56
M_A_DQ60
M_A_DQ59
M_A_DQ62

[4]

+1.5V_SUS

[13] PM_EXTTS#0
[4,13] DDR3_DRAMRST#

[6] SMDDR_VREF_DQ0_M3

SMDDR_VREF_DQ0_M1 R152

0/J_6

SMDDR_VREF_DQ0_M3 R162

*0/J_6

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125

NC1
NC2
NCTEST

PM_EXTTS#0

198
30

EVENT#
RESET#

+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM

1
126

VREF_DQ
VREF_CA

+3V

+3V

JDIM1B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2.48A

R49

10K/J_4

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM
(204P)

M_A_DQ[63:0]

JDIM1A
[4] M_A_A[15:0]

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2

203
204

GND
GND

205
206

D

+0.75V_DDR_VTT

C

DDR3 SODIMM(204P,H8.0,RVS)

DDR3 SODIMM(204P,H8.0,RVS)

VREF DQ0 M1 Solution

Place these Caps near So-Dimm0.

+1.5V_SUS

+1.5V_SUS
R147
1K/F_4
+
SMDDR_VREF R141

B

*0/J_6

C76
10U/6.3V_6

SMDDR_VREF_DQ0_M1
R156
1K/F_4

C85
10U/6.3V_6

C97
10U/6.3V_6

C88
10U/6.3V_6

C99
10U/6.3V_6

C91
10U/6.3V_6

C139
*10U/6.3V_6

C80
1U/10V_4

C100
1U/10V_4

C113
1U/10V_4

C94
1U/10V_4

C89
*330U/2V_7343

C176
10U/6.3V_8

C79
10U/6.3V_8

B

C244
0.1u/10V_4

+3V

+0.75V_DDR_VTT

+SMDDR_VREF_DIMM

+SMDDR_VREF_DQ0

+1.5V_SUS
C239
C46
1U/6.3V_4

C47
1U/6.3V_4

C31
1U/6.3V_4

C30
C43
1U/6.3V_4 10U/6.3V_6

C39
*10U/6.3V_6

C42
2.2U/6.3V_6

C44
0.1u/10V_4

C72
0.1u/10V_4

C71
2.2U/6.3V_6

C234

0.1u/10V_4

2.2U/6.3V_6

R142
10K/J_4

[5,13,36]

SMDDR_VREF

R130

*0/J_6

+SMDDR_VREF_DIMM
R137
10K/J_4

C224
470P/50V_4

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

DDRIII SO-DIMM-1

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

14

of

45

5

4

EC-C-00

3

2

1

15

U28A

R576

PLACE UNDER BALLS

PEX_IOVDDQ_01
PEX_IOVDDQ_02
PEX_IOVDDQ_03
PEX_IOVDDQ_04
PEX_IOVDDQ_05
PEX_IOVDDQ_06
PEX_IOVDDQ_07
PEX_IOVDDQ_08
PEX_IOVDDQ_09
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12

GFX_CORE

C

C663
C664
C665
C666
C667

EV@0.022U/16V/X7R_4
EV@0.022U/16V/X7R_4
EV@0.022U/16V/X7R_4
EV@0.022U/16V/X7R_4
EV@0.022U/16V/X7R_4

C668
C669
C670
C671
C672

EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4

C673
C674
C675

EV@1U/16V/X7R_6
EV@1U/16V/X7R_6
EV@1U/16V/X7R_6

C676
C677

EV@22U/6.3V_8
EV@22U/6.3V_8

16.82A J10

PLACE NEAR BALLS

B

GPU_VDD_SENSE

TP16

80mA
EV@4.7U/6.3V/X5R_6

+3V_GPU

C253
C241
C249
C174
C261

+1.05V_GFX_PCIE

L7
EV@BLM18PG121SN(120,2000MA)_6
PLACE UNDER BALLS

EV@0.1U/10V/X7R_4

C679
C680

EV@1U/16V/X7R_6
EV@4.7U/6.3V/X5R_8

110mA +PEX_PLLVDD
12~16R572mils *EV@200_4

PLACE NEAR BALLS

W15
W16
E15
E14

VDD_SENSE
GND_SENSE
VDD_SENSE (NC)
GND_SENSE (GND)

A12
B12
C12
D12
E12
F12

VDD33_01
VDD33_02
VDD33_03
VDD33_04
VDD33_05
VDD33_06

AF9

PEX_PLLVDD

PEX_TERMP

[9]
[9]

R578
*EV@10K/F_4

PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13
PEG_RXN13
PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0

PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13
PEG_RXN13
PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

D

For PCIE clock request signal 07/05

+3V_GPU
+3V

R144
EV@10K/F_4

R145
EV@10K/F_4

GFXPG

[9,10]

Q17
EV@SST3904T116

2

+1.8V_GPU

R176

EV@10K/F_4

*EV@1000P/50V/X7R_4@NC

R171
*EV@0_4

2

C252
Q18
EV@PDTC143TT

DGPU_PWR_EN# = GFXON >> +1.05_GFX_PCIE
>> +3V_GPU_EN >> +3V_GPU
>> NVVDD =NVVDD_PG
>> +1.5_GPU >> +1.8V_GPU

+1.5V_GPU
PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0

R194

EV@10K/F_4 2

*EV@1000P/50V/X7R_4@NC

PEG_TXP15 [3]
PEG_TXN15 [3]
PEG_TXP14 [3]
PEG_TXN14 [3]
PEG_TXP13 [3]
PEG_TXN13 [3]
PEG_TXP12 [3]
PEG_TXN12 [3]
PEG_TXP11 [3]
PEG_TXN11 [3]
PEG_TXP10 [3]
PEG_TXN10 [3]
PEG_TXP9 [3]
PEG_TXN9 [3]
PEG_TXP8 [3]
PEG_TXN8 [3]
PEG_TXP7 [3]
PEG_TXN7 [3]
PEG_TXP6 [3]
PEG_TXN6 [3]
PEG_TXP5 [3]
PEG_TXN5 [3]
PEG_TXP4 [3]
PEG_TXN4 [3]
PEG_TXP3 [3]
PEG_TXN3 [3]
PEG_TXP2 [3]
PEG_TXN2 [3]
PEG_TXP1 [3]
PEG_TXN1 [3]
PEG_TXP0 [3]
PEG_TXN0 [3]

AE10
AF10

AG10

NVVDD Maximum Settling Time

NVVDD

For power-down sequency
+3V_GPU

+1.5V_GPU

GFX_CORE

+3V_GPU

D11

D10

EV@RB500V-40

EV@RB500V-40

GPIO

B

tsNVVDD<= 192us

+1.05V_GFX_PCIE

PEX_TSTCLK_OUT*
PEX_TSTCLK_OUT

PEX_RST timing

+3V
R334
*EV@100K/F_4

I/O 3.3V

R332
*EV@8.2K_4

PEG_SVDD (NC)
PEX_TERMP
EV@U_GPU_GB1_64

+3V_GPU_EN

+3V_GPU_EN

[41]

VGA_RST#

2

Trise >= 100mS

PEG_TXN[0..15]
PEG_RXN[0..15]
PEG_RXP[0..15]

PEG_TXP[0..15]

[3]

PEG_TXN[0..15]

[3]

PEG_RXN[0..15]

[3]

PEG_RXP[0..15]

[3]

R340

EV@0/J_4

Tfail <=0nS

*EV@ME2N7002E

A

1

PEG_TXP[0..15]

Q32
1

2
Q33
*EV@MMBT3904

A

[9,36,39] GFXON
C326
*EV@1U/6.3V_4

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

N12M(PCIE I/F) 1/5

Date:
5

C

Q20
EV@PDTC143TT

C259

3

R571
EV@2.49K/F_4

AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AF22
AE22
AE24
AF24
AG24
AF25
AG25
AG26
AF27
AE27

EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4

*EV@330_4

EV@0.1U/10V/X7R_4
EV@4.7U/6.3V/X5R_6
EV@1U/6.3V/X5R_4

PEX_RX0
PEX_RX0*
PEX_RX1
PEX_RX1*
PEX_RX2
PEX_RX2*
PEX_RX3
PEX_RX3*
PEX_RX4
PEX_RX4*
PEX_RX5
PEX_RX5*
PEX_RX6
PEX_RX6*
PEX_RX7
PEX_RX7*
PEX_RX8
PEX_RX8*
PEX_RX9
PEX_RX9*
PEX_RX10
PEX_RX10*
PEX_RX11
PEX_RX11*
PEX_RX12
PEX_RX12*
PEX_RX13
PEX_RX13*
PEX_RX14
PEX_RX14*
PEX_RX15
PEX_RX15*

C146
C145
C161
C160
C168
C165
C159
C158
C122
C123
C136
C135
C134
C133
C132
C131
C155
C154
C157
C156
C153
C152
C150
C151
C130
C129
C128
C127
C149
C148
C126
C125

+3V

AG9

+1.05V_GFX_PCIE
C198
C197
C202

VDD_01
VDD_02
VDD_03
VDD_04
VDD_05
VDD_06
VDD_07
VDD_08
VDD_09
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43

CLK_PCIE_VGAP
CLK_PCIE_VGAN
C_PEG_RX0
C_PEG_RX#0
C_PEG_RX1
C_PEG_RX#1
C_PEG_RX2
C_PEG_RX#2
C_PEG_RX3
C_PEG_RX#3
C_PEG_RX4
C_PEG_RX#4
C_PEG_RX5
C_PEG_RX#5
C_PEG_RX6
C_PEG_RX#6
C_PEG_RX7
C_PEG_RX#7
C_PEG_RX8
C_PEG_RX#8
C_PEG_RX9
C_PEG_RX#9
C_PEG_RX10
C_PEG_RX#10
C_PEG_RX11
C_PEG_RX#11
C_PEG_RX12
C_PEG_RX#12
C_PEG_RX13
C_PEG_RX#13
C_PEG_RX14
C_PEG_RX#14
C_PEG_RX15
C_PEG_RX#15

R318

C678

EV@1U/6.3V/X5R_4
EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4

J12
J13
J9
L9
M11
M17
M9
N11
N12
N13
N14
N15
N16
N17
N19
N9
P11
P12
P13
P14
P15
P16
P17
R11
R12
R13
R14
R15
R16
R17
R9
T11
T17
T9
U19
U9
W10
W12
W13
W18
W19
W9

PEX_TX0
PEX_TX0*
PEX_TX1
PEX_TX1*
PEX_TX2
PEX_TX2*
PEX_TX3
PEX_TX3*
PEX_TX4
PEX_TX4*
PEX_TX5
PEX_TX5*
PEX_TX6
PEX_TX6*
PEX_TX7
PEX_TX7*
PEX_TX8
PEX_TX8*
PEX_TX9
PEX_TX9*
PEX_TX10
PEX_TX10*
PEX_TX11
PEX_TX11*
PEX_TX12
PEX_TX12*
PEX_TX13
PEX_TX13*
PEX_TX14
PEX_TX14*
PEX_TX15
PEX_TX15*

AD10
AD11
AD12
AC12
AB11
AB12
AD13
AD14
AD15
AC15
AB14
AB15
AC16
AD16
AD17
AD18
AC18
AB18
AB19
AB20
AD19
AD20
AD21
AC21
AB21
AB22
AC22
AD22
AD23
AD24
AE25
AE26

[9]

3

PLACE UNDER BALLS

AB10
AC10

GPU_RST#

[9]

3

EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@4.7U/6.3V/X5R_6
EV@10U/6.3V/X5R_8
EV@22U/6.3V_8

PEX_REFCLK
PEX_REFCLK*

PEX_CLKREQ#

1

C195
C199
C203
C208
C194
C183
C243

AE9
AD9 GPU_RST#

3

PLACE NEAR BALLS

+1.05V_GFX_PCIE

AB13
AB16
AB17
AB7
AB8
AB9
AC13
AC7
AD6
AE6
AF6
AG6

(NC) PEX_CLKREQ
PEX_RST*

1

D

EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@4.7U/6.3V/X5R_6
EV@10U/6.3V/X5R_8
EV@22U/6.3V_8

power up sequence

+3V_GPU

1/13 PCI_EXPRESS

PEX_IOVDD_01
PEX_IOVDD_02
PEX_IOVDD_03
PEX_IOVDD_04
PEX_IOVDD_05
PEX_IOVDD_06

1

C188
C200
C205
C201
C181
C190
C242

EV@10K/F_4

N12M

AC9
AD7
AD8
AE7
AF7
AG7

3

3.55A
+1.05V_GFX_PCIE

4

3

2

Friday, October 29, 2010

Sheet
1

15

of

45

5

4

2.63A

EC-C-00

+1.5V_GPU

C235
C237
C248

EV@0.01U/16V/X7R_4
EV@0.01U/16V/X7R_4
EV@0.01U/16V/X7R_4

C227
C245
C229

EV@0.047U/10V/X7R_4
EV@0.047U/10V/X7R_4
EV@0.047U/10V/X7R_4

C232

EV@4.7U/6.3V/X5R_6

D

[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]

C

[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]

[19]
[19]
[19]
[19]

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#

VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#

A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22

G24
F27
F25
F26
G26
G27
G25
J25
J24
H24
H22
J26
G22
G23
J22
J27
M24
L24
J23
K23
K22
M23
K24
M27
N27
M26
K26
K27
K25
M25
L22

F24
F23
N24
N23

FBVDDQ_01
FBVDDQ_02
FBVDDQ_03
FBVDDQ_04
FBVDDQ_05
FBVDDQ_06
FBVDDQ_07
FBVDDQ_08
FBVDDQ_09
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*

B

+1.5V_GPU

R164

EV@40.2/F_4 FB_CAL_PD_VDDQ

B15

R175

EV@40.2/F_4 FB_CAL_PU_GND

A15

FB_CAL_PU_GND

R169

EV@60.4/F_4 FB_CAL_TERM_GND

B16

FB_CAL_TERM_GND

+1.5V_GPU

R129

*EV@60.4/F_4

For debug only
+1.05V_GFX_PCIE
L8

FBA_DEBUG

FB_CAL_PD_VDDQ

M22

FBA_DEBUG0

R19

FB_PLLAVDD

10mA

15mils width 25mA

EV@BLM18PG300SN1D(30,1A)_6

+FB_PLLAVDD

PLACE UNDER BALLS

C681

EV@0.1U/10V/X7R_4

T19
AC19

C682 EV@1U/16V/X7R_6
C683 EV@10U/6.3V/X7R_8

3

2

1

U28B
N12M

FB_DLLAVDD
FB_PLLAVDD (NC)

PLACE NEAR BALLS

A

16

2/13 FRAME_BUFFER

(FBA_D8) FBA_D0
(FBA_D10) FBA_D1
(FBA_D9) FBA_D2
(FBA_D11) FBA_D3
(FBA_D12) FBA_D4
(FBA_D13) FBA_D5
(FBA_D14) FBA_D6
(FBA_D15) FBA_D7
(FBA_D31) FBA_D8
(FBA_D30) FBA_D9
(FBA_D29) FBA_D10
(FBA_D28) FBA_D11
(FBA_D26) FBA_D14
(FBA_D27) FBA_D14
(FBA_D25) FBA_D14
(FBA_D24) FBA_D15
(FBA_D22) FBA_D16
(FBA_D23) FBA_D17
(FBA_D20) FBA_D18
(FBA_D21) FBA_D19
(FBA_D18) FBA_D20
(FBA_D19) FBA_D21
(FBA_D16) FBA_D22
(FBA_D17) FBA_D23
(FBA_D3) FBA_D24
(FBA_D4) FBA_D25
(FBA_D0) FBA_D26
(FBA_D2) FBA_D27
(FBA_D1) FBA_D28
(FBA_D6) FBA_D29
(FBA_D5) FBA_D30
(FBA_D7) FBA_D31
(FBA_D37) FBA_D32
(FBA_D39) FBA_D33
(FBA_D38) FBA_D35
(FBA_D35) FBA_D35
(FBA_D36) FBA_D36
(FBA_D34) FBA_D37
(FBA_D33) FBA_D38
(FBA_D32) FBA_D39
(FBA_D55) FBA_D40
(FBA_D53) FBA_D41
(FBA_D54) FBA_D42
(FBA_D51) FBA_D43
(FBA_D52) FBA_D44
(FBA_D50) FBA_D45
(FBA_D49) FBA_D46
(FBA_D48) FBA_D47
(FBA_D59) FBA_D48
(FBA_D58) FBA_D49
(FBA_D57) FBA_D50
(FBA_D56) FBA_D51
(FBA_D60) FBA_D52
(FBA_D61) FBA_D53
(FBA_D62) FBA_D54
(FBA_D63) FBA_D55
(FBA_D46) FBA_D56
(FBA_D42) FBA_D57
(FBA_D45) FBA_D58
(FBA_D47) FBA_D59
(FBA_D43) FBA_D60
(FBA_D44) FBA_D61
(FBA_D40) FBA_D62
(FBA_D41) FBA_D63
(DQM1) FBA_DQM0
(DQM3) FBA_DQM1
(DQM2) FBA_DQM2
(DQM0) FBA_DQM3
(DQM4) FBA_DQM4
(DQM6) FBA_DQM5
(DQM7) FBA_DQM6
(DQM5) FBA_DQM7
(WP1) FBA_DQS_WP0
(WP3) FBA_DQS_WP1
(WP2) FBA_DQS_WP2
(WP0) FBA_DQS_WP3
(WP4) FBA_DQS_WP4
(WP6) FBA_DQS_WP5
(WP7) FBA_DQS_WP5
(WP5) FBA_DQS_WP7
(RN1) FBA_DQS_RN0
(RN3) FBA_DQS_RN1
(RN2) FBA_DQS_RN2
(RN0) FBA_DQS_RN3
(RN4) FBA_DQS_RN4
(RN6) FBA_DQS_RN5
(RN7) FBA_DQS_RN6
(RN5) FBA_DQS_RN7
FB_VREF

D22
E24
E22
D24
D26
D27
C27
B27
A21
B21
C21
C19
C18
D18
B18
C16
E21
F21
D20
F20
D17
F18
D16
E16
A22
C24
D21
B22
C22
A25
B25
A26
U24
V24
V23
R24
T23
R23
P24
P22
AC24
AB23
AB24
W24
AA22
W23
W22
V22
AA25
W27
W26
W25
AB25
AB26
AD26
AD27
V25
R25
V26
V27
R26
T25
N25
N26

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

C26
B19
D19
D23
T24
AA23
AB27
T26

VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7

C25
A19
E19
A24
T22
AA24
AA26
T27

VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7

D25
A18
E18
B24
R22
Y24
AA27
R27

VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7

A16

+FB_VREF1

U28I
N12M
13/13 GND_NC

[19] VMA_DQ[63..0]
[19] VMA_DM[7..0]
[19] VMA_WDQS[7..0]
[19] VMA_RDQS[7..0]

FBA_CMD0

R139

EV@10K/F_4

FBA_CMD3

R568

EV@10K/F_4

FBA_CMD16 R158

EV@10K/F_4

FBA_CMD19 R161

EV@10K/F_4

FBA_CMD20 R135

EV@10K/F_4

AC11
AC14
AC17
AC2
AC20
AC23
AC26
AC5
AC8
AF11
AF14
AF17
AF2
AF20
AF23
AF26
AF5
AF8
B11
B14

GND_01
GND_02
GND_03
GND_04
GND_05
GND_06
GND_07
GND_08
GND_09
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20

B17
B2
B20
B23
B26
B5
B8
E11

GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28

E17
E2
E20
E23
E26
E5
E8
H2
H5
J11
J14

GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40

J17
K19
K9
L11
L12
L13
L14
L15
L16
L17
L2
L5
M12
M13
M14
M15
M16
P19
P2
P23

GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60

P26
P5
P9
T12
T13
T14
T15
T16
U11
U12
U13
U14
U15
U16
U17
U2
U23
U26
U5
V19
V9
W11
W14
W17
Y2
Y23
Y26
Y5
TP76

NC_01
NC_02
PGOOD

C15
D15
J5

R649

EV@10K/F_4

D

C

B

GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88

A

EV@U_GPU_GB1_64
EV@U_GPU_GB1_64

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

N12M(MEMORY I/F & GND) 2/5

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

16

of

45

5

4

EC-C-00

3

2

1

17

U28F
N12M

U28G

6/13 IFPAB

IFPA_TXD0*
IFPA_TXD0

TP19
D

AD5
AB6

8/13 IFPE
DVI

220 mA (1.05V +/- 3% )
+IFPAB_PLLVDD

N12M

V4
V5

IFPA_TXD1*
IFPA_TXD1
IFPAB_PLLVDD
IFPAB_RSET

IFPA_TXD2*
IFPA_TXD2

Y4
W4

IFPA_TXD3*
IFPA_TXD3

AB5
AB4

IFPB_TXD4*
IFPB_TXD4

V1
W1

IFPB_TXD5*
IFPB_TXD5

W2
W3

IFPB_TXD6*
IFPB_TXD6

AA3
AA2

IFPB_TXD7*
IFPB_TXD7

AA1
AB1

A

IFPA_TXC*
IFPA_TXC

AD4
AC4

B

IFPB_TXC*
IFPB_TXC

AB2
AB3

DATA

+IFPAB_IOVDD

B

V3

IFPA_IOVDD

V2

IFPB_IOVDD

R116
EV@10K_4

IFPD_AUX*
IFPD_AUX

D4
D3

TXC
TXC

IFPD_L3*
IFPD_L3

B4
B3

TXD0
TXD0

IFPD_L2*
IFPD_L2

C4
C3

TXD1
TXD1

IFPD_L1*
IFPD_L1

D5
E4

TXD2
TXD2

IFPD_L0*
IFPD_L0

F4
F5

EV@10K_4

D

+IFPDE_IOVDD H6

220 mA (1.8V)

IFPD_PLLVDD
IFPD_RSET

R125

A

R110
EV@10K_4

+IFPD_PLLVDD N6
M6
TP31

AA4
AA5

DP

IFPDE_IOVDD

R134

D

EV@10K_4
EV@U_GPU_GB1_64

CLOCK
C

C

EV@U_GPU_GB1_64

U28D

U28H
N12M

N12M

7/13 IFPC

5/13 DACC

220 mA

DVI

+IFPC_PLLVDD
1
TP22

P6
R5

DP

+DACB_VDD

IFPC_PLLVDD
IFPC_RSET

R115

R120
EV@10K_4

C

285 mA (1.05V +/- 3% )
+IFPC_IOVDD

J6

IFPC_IOVDD

R140
EV@10K_4

TXC
TXC

IFPC_L3*
IFPC_L3

TXD0
TXD0

IFPC_L2*
IFPC_L2

TXD1
TXD1

IFPC_L1*
IFPC_L1

TXD2
TXD2

IFPC_L0*
IFPC_L0

EV@10K_4

G5
G4

IFPC_AUX*
IFPC_AUX

W5

DACB_VDD

TP23

1

R6

DACB_VREF

TP21

1

V6

DACB_RSET

J4
H4

DACB_HSYNC
DACB_VSYNC

DACB_RED
DACB_GREEN
DACB_BLUE

U6
U4

T5
T4
R4

EV@U_GPU_GB1_64

K4
L4
M4
M5
N4
P4

B

U28C
N12M

120 mA

+3V_GPU

B

EV@U_GPU_GB1_64

3/13 DACA

R579
U28E

60mA
+1.05V_GFX_PCIE

L9

C684
C686
C687
C685

EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4
EV@0.1U/10V/X7R_4

DVI

EV@U_GPU_GB1_64
IFPE_PLLVDD
TP28

K5

45mA

PLLVDD

D7
F8

IFPE_PLLVDD(DACB_VDD)
IFPD_RSET(DACB_RSET)

Y2
2
C254
EV@22P/50V_4

1

TP14
TP13
TP18

1

E10 XTALOUT

EV@27MHZ 30ppm
1
C255
EV@22P/50V_4

TXC
TXC

IFPE_L3*
IFPE_L3

TXD0
TXD0

IFPE_L2*
IFPE_L2

TXD1
TXD1

IFPE_L1*
IFPE_L1

TXD2
TXD2

IFPE_L0*
IFPE_L0

E7
E6
B7
B6
A7
A6
C6
D6

*EV@124/F_4

XTAL_OUT

E9 BXTALOUT

R172
EV@10K/F_4
A

AE2
AE3
AD3

R100

XTAL_OUTBUFF
XTAL_IN

TP15
TP20

EV@U_GPU_GB1_64

XTAL_SSIN

D10

DACA_RSET

1

DACA_RSET

E
XTAL_SSIN D11

AE1

DACA_HSYNC
DACA_VSYNC

AD2
AD1

DACA_VREF

C185 *EV@0.1U/10V/X5R_4

CLK_27M_VGA

G6
F7

EV@10K/F_4

R165 EV@10K/F_4
*EV@0_4

DACA_VREF
DACA_RED
DACA_GREEN
DACA_BLUE

SP_PLLVDD

PLACE NEAR BALLS

R166

DACA_VDD

AF1

DP

IFPE_AUX*
IFPE_AUX

R157

VID_PLLVDD

L6

AG2

8/13 IFPE

12/13 XTAL_PLL

EV@22U/6.3V_8

R577
EV@10K_4

N12M
N12M

45mA

K6
C688

+DACA_VDD

U28J

+NV_PLLVDD

EV@BLM18EG221SN1D(220,2A)_6
PLACE UNDER BALLS

*EV@0_8

A

EV@U_GPU_GB1_64

PROJECT KL5A

STUFF PDs on XTALSSIN and
XTALOUTBUFF WHEN EXT_SS

Quanta Computer Inc.

Install it when not connected to Spread spectrum device

Size
Document Number
Custom

Rev
1A

N12M(DISPLAY) 3/5

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

17

of

45

5

4

3

2

1

EC-C-00

18

nV FAE suggest that the device ID
for N12M-GS-S is 0x1054.-0909
N12M

U28K

11/13 MISC

N5

GND0

F6

N12M-GS

N2

TP24

STRAP3

TESTMODE
STRAP4

1

STRAP4
GND1

EV@10K/F_4

AD25 TESTMODE R96

4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]
10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)]
15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
30K/F_4: CS33002FB13 [RES CHIP 30K 1/16W +-1%(0402)]
34.8K/F_4: CS33482FB22 [RES CHIP 34.8K 1/16W +-1%(0402)]
45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]

AC6

EV@U_GPU_GB1_64

U28L

N12M

9/13 I2C_GPIO_THERM_JTAG
C

GFX_THMD-

D8

THERMDN

TP34

GFX_THMD+

D9

THERMDP

TP17
TP80
TP81
TP12
TP79

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#

TP30

AF3
AF4
AG4
AE4
AG3

DGPU_I2CS_SCL
DGPU_I2CS_SDA
R650

EV@40.2K/F_4

HDCP_SCL
HDCP_SDA

I2CA_SCL
I2CA_SDA

R1
T3

I2CB_SCL
I2CB_SDA

R2 I2CB_SCL_G
R3 I2CB_SDA_G

R563
R560

EV@2.2K_4
EV@2.2K_4

+3V_GPU

I2CC_SCL
I2CC_SDA

A2 I2CC_SCL_G
B1 I2CC_SDA_G

R183
R182

EV@2.2K_4
EV@2.2K_4

+3V_GPU

For N12M Multi-level Strapping function
B

Default: Hynix VRAM
24.9K/F_4: CS32492FB16 [RES CHIP 24.9K 1/16W +-1%(0402)]
20K/F_4: CS32002FB29 [RES CHIP 20K 1/16W +-1%(0402)]

Logical
Strapping Bit2

ROM_SO N12M-GS

FB[1]

FB[0]

SMB_ALT_ADDR

VGA_DEVICE

1001

ROM_SCLK

PCI_DEVIDE[4]

SUB_VENDOR

PCI_DEVID[5]

PEX_PLL_EN_TERM

1010

RAMCFG[3]

RAMCFG[2]

RAMCFG[1]

RAMCFG[0]

0110

STRAP0

USER[3]

USER[2]

USER[1]

USER[0]

1111

STRAP1

3GIO_PADCFG[3]

3GIO_PADCFG[2]

3GIO_PADCFG[1]

3GIO_PADCFG[0]

0110

STRAP2

PCI_DEVID[3]

PCI_DEVID[2]

PCI_DEVID[1]

PCI_DEVID[0]

1111

STRAP3

SOR3_EXPOSED

SOR2_EXPOSED

SOR0_EXPOSED

0000

STRAP4

RESERVED

RESERVED

DP_PLL_VDD33V

0011

RAMCFG
[3:0]

N1 DGPU_PIN_N1
G1
C1 DPST_PW M_DGPU
M2 DISP_ON_DGPU
M3
GFX_CORE_CNTRL0
K3
GFX_CORE_CNTRL1
K2
J2 DGPU_PIN_J2
C2 DGPU_GPIO8 R191
M1 ALERT
D2
D1
GPIO12
J3
J1
K1
F3
G3
G2
F1
F2

1

GFX_CORE_CNTRL0
GFX_CORE_CNTRL1
EV@0_4 VGA_OVT#

AKD5MGGTW00
AKD5MGGT505

[39]
[39]

DESCRIPTION

Vendor

3

Hynix
Samsung
Reserved

H5TQ1G63DFR-12C
K4W1G1646G-BC12

PD 15K/F
PD 20K/F

DDR3 128Mx16x4, 128bit, 1GB,800MHz
DDR3 128Mx16x4, 128bit, 1GB,800MHz

Hynix
Samsung

H5TQ2G63BFR-12C
K4W2G1646C-HC12

PD 34.8K/F
PD 45.3K/F

TP29
VGA_OVT# [29,32]

2

R564
EV@2.2K_4

DGPU_I2CS_SDA

2
1

0x1054

VRAM Type

+3V_GPU
R565
EV@2.2K_4

PCI_DEVID:

JTAG_TMS

R573

*EV@10K/F_4

JTAG_TDI

R574

*EV@10K/F_4

VGA_OVT#

R192

EV@10K/F_4

ALERT

R553

EV@10K/F_4

R167

*EV@10K/F_4

R163

EV@10K/F_4

GFX_CORE_CNTRL1

R287

*EV@10K/F_4

JTAG_TCK

R98

*EV@10K/F_4

JTAG_TRST#

R575

EV@1K/F_4

GPIO12

0100 PU 45K/F

RAMCFG[0..3]

Hynix
AKD5LZGTW11

0x0A75

Samsung
AKD5EGGT501

GPIO ASSIGNMENTS
B

GPIO

0x0A70

DPST_PW M_DGPU R549

ROM_SI
0010

PD 15K/F

0011

PD20 K/F

*EV@2K/F_4

HDCP ROM
+3V_GPU

EV@2N7002E
Q48
3

Hynix
AKD5MGGTW00

MB_DATA1 [9,29,32]

Samsung
AKD5MGGT505

A

R566

STRAP2

MB_CLK1 [9,29,32]

EV@2N7002E
Q45

ROM_SI

DDR3 64Mx16x4, 128bit, 512MB,800MHz
DDR3 64Mx16x4, 128bit, 512MB,800MHz

+3V_GPU

N12M-GS

*EV@0_4

Vendor P/N

TP32

CHIP

1

SOR1_EXPOSED
PCIE_MAX_SPEED

C

Reserved

0000
0001
0010
0011
0101
0110
0110
0111

AKD5LZGTW11
AKD5EGGT501

TP25
TP35
TP33
TP27
TP26

GFX_CORE_CNTRL0

DGPU_I2CS_SCL

Logical
Strapping Bit1

ROM_SI

EV@U_GPU_GB1_64

R559

Logical
Strapping Bit0

Logical
Strapping Bit3

(Ra)

GPIO0
GPIO1
GPIO2
GPIO3
I2CS_SCL
GPIO4
I2CS_SDA
GPIO5
GPIO6
GPIO7
MULTI_STRAP_REF2_GND
GPIO8
RFU1 (I2CE_SDA)
GPIO9
RFU2 (I2CE_SCL)
GPIO10
RFU3 (NC)
GPIO11
RFU4 (I2CD_SDA)
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

T6
W6
Y6
AA6
N3

0x0A75
0x0A70

0110 PD 34.8K/F

U11
1
2
3

0111 PD 45.3K/F

*EV@0_4
4

C262

*EV@0.1U/10V/X5R_4

VCC

8

A1

WP

7

R196

*EV@10K/F_4

A2

SCL

6 HDCP_SCL

R193

EV@2.2K_4

R198

EV@2.2K_4

A0

GND

SDA

5

HDCP_SDA

+3V_GPU

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14

ACTIVE

I/O
N/A
IN
OUT
OUT
OUT
OUT
OUT
OUT
I/O
I/O
OUT
OUT
IN
OUT
OUT

N/A
N/A
HIGH
HIGH
HIGH
N/A
N/A
N/A
LOW
LOW
N/A
N/A
N/A
N/A
N/A

USAGE
Hot plug detect for IFP link C
PANEL BACKLIGHT PWM
PANEL POWER ENABLE
PANEL BACKLIGHT ENABLE
NVVDD VID0
NVVDD VID1
NVVDD VID2
OVERT
ALERT
FBVREF SELECT
SLI SYNC0
PWR_LEVEL
THERM_LOAD_STEP_DOWN
THERM_LOAD_STEP_UP

A

*AT88SC0808C-SU

GPU Type

STRAP0

STRAP1

STRAP3

STRAP4

ROM_SO

ROM_SCLK

N12M-GS

PU 45.3K/F

PD 34.8K/F

PD 4.99K/F

PD 20K/F

PU 10K/F

PU 15K/F

PROJECT KL5A

4

Quanta Computer Inc.

DHCP ROM
HDCP_SCL

5

D

VRAM Configuration Table

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*

T1
T2

(Ra)

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

EV@10K/F_4
R654

BUFRST*

STRAP_REF_MIOB

ROM_SI
ROM_SO
ROM_SCLK

*EV@20K/F_4
R652

F9

A3
A4

EV@4.99K/F_4
R653

STRAP3

GPIO20
GPIO21

*EV@10K/F_4
R651

STRAP_REF_MIOB F10

STRAP_REF_3V3

*EV@24.9K/F_4
R188

EV@40.2K/F_4

F11

EV@45.3K/F_4
R179

R154

STRAP_REF_3V3

EV@34.8K/F_4
R189

EV@40.2K/F_4

0000
0001
0010
0011
0100
0101
0110
0111

A14
*EV@34.8K/F_4
R180

R149

1000
1001
1010
1011
1100
1101
1110
1111

EV@34.8K/F_4
R186

5K
10K
15K
20K
25K
30K
35K
45K

D

+3V_GPU

*EV@2K/F_4
R173

ROM_SI
ROM_SO
ROM_SCLK

*EV@15K/F_4
R190

A10
C10
C9

EV@15K/F_4
R181

B10

ROM_SI
ROM_SO
ROM_SCLK

*EV@15K/F_4
R187

For N12M Multi-level Strapping function

ROM_CS*

+3V_GPU

EV@10K/F_4
R178

STRAP0
STRAP1
STRAP2

*EV@4.99K/F_4
R177

C7
B9
A9

PCI_DEVID[4]/SUBVENDOR

EV@45.3K/F_4
R174

STRAP0
STRAP1
STRAP2

Logical Strap Bit Mapping
Rv
PU-VDD PD-GND

3

Size
Document Number
Custom

Low: Crypto ROM

Rev
1A

N12M(GPIO & STRRAPS) 4/5

Hi: I2C ROM

Date:
2

Friday, October 29, 2010

Sheet
1

18

of

45

1

2

3

EC-C-00

4

[16] VMA_DQ[63..0]
[16] VMA_DM[7..0]
[16] VMA_WDQS[7..0]
[16] VMA_RDQS[7..0]

A

M8
H1

U27
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ20
VMA_DQ18
VMA_DQ23
VMA_DQ19
VMA_DQ21
VMA_DQ17
VMA_DQ22
VMA_DQ16

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ6
VMA_DQ7
VMA_DQ2
VMA_DQ4
VMA_DQ1
VMA_DQ3
VMA_DQ0
VMA_DQ5

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VREFCA
VREFDQ

[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD30

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

[16]
[16]
[16]

FBA_CMD29
FBA_CMD13
FBA_CMD27

M2
N8
M3

BA0
BA1
BA2

[16]
[16]
[16]

VMA_CLK0
VMA_CLK0#
FBA_CMD3

J7
K7
K9

CK
CK
CKE

FBA_CMD0
FBA_CMD2
FBA_CMD11
FBA_CMD15
FBA_CMD28

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMA_WDQS2
VMA_RDQS2

F3
G3

DQSL
DQSL

VMA_DM2
VMA_DM0

E7
D3

VMA_WDQS0
VMA_RDQS0

C7
B7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VREFC_VMA1
VREFD_VMA1

M8
H1

FBA_CMD7
FBA_CMD10
FBA_CMD24
FBA_CMD6
FBA_CMD22
FBA_CMD26
FBA_CMD5
FBA_CMD21
FBA_CMD8
FBA_CMD4
FBA_CMD25
FBA_CMD23
FBA_CMD9
FBA_CMD12
FBA_CMD14
FBA_CMD30

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBA_CMD29
FBA_CMD13
FBA_CMD27

M2
N8
M3

BA0
BA1
BA2

VMA_CLK0
VMA_CLK0#
FBA_CMD3

J7
K7
K9

CK
CK
CKE

A1
A8
C1
C9
D2
E9
F1
H2
H9

FBA_CMD0
FBA_CMD2
FBA_CMD11
FBA_CMD15
FBA_CMD28

K1
L2
J3
K3
L3

[16]
[16]
[16]
[16]
[16]

ODT
CS
RAS
CAS
WE

VMA_WDQS1
VMA_RDQS1

F3
G3

DQSL
DQSL

[16]

DML
DMU
DQSU
DQSU

T2

FBA_CMD20
VMA_ZQ1

RESET

L8

ZQ

Should be 240
Ohms +-1%
R185
EV@243/F_4
J1
L1
J9
L9

C

NC#J1
NC#L1
NC#J9
NC#L9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMA_DM1
VMA_DM3

E7
D3

VMA_WDQS3
VMA_RDQS3

C7
B7

FBA_CMD20

T2

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

+1.5V_GPU

7

8

19

U9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ8
VMA_DQ12
VMA_DQ9
VMA_DQ15
VMA_DQ11
VMA_DQ13
VMA_DQ10
VMA_DQ14

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ28
VMA_DQ29
VMA_DQ26
VMA_DQ25
VMA_DQ27
VMA_DQ31
VMA_DQ24
VMA_DQ30

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VREFCA
VREFDQ

+1.5V_GPU

B

6

CHANNEL A: 512MB/1024MB DDR3

U12
VREFC_VMA1
VREFD_VMA1

5

VREFC_VMA3
VREFD_VMA3

M8
H1

U29
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ45
VMA_DQ41
VMA_DQ43
VMA_DQ40
VMA_DQ47
VMA_DQ44
VMA_DQ46
VMA_DQ42

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ37
VMA_DQ39
VMA_DQ32
VMA_DQ36
VMA_DQ33
VMA_DQ35
VMA_DQ34
VMA_DQ38

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VREFCA
VREFDQ

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD27

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBA_CMD29
FBA_CMD6
FBA_CMD30

M2
N8
M3

BA0
BA1
BA2

FBA_CMD16

J7
K7
K9

CK
CK
CKE

FBA_CMD19
FBA_CMD18
FBA_CMD11
FBA_CMD15
FBA_CMD25

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMA_WDQS5
VMA_RDQS5

F3
G3

DQSL
DQSL

VMA_DM5
VMA_DM4

E7
D3

VMA_WDQS4
VMA_RDQS4

C7
B7

FBA_CMD20

T2

M8
H1

VREFCA
VREFDQ

FBA_CMD9
FBA_CMD24
FBA_CMD10
FBA_CMD13
FBA_CMD26
FBA_CMD22
FBA_CMD21
FBA_CMD5
FBA_CMD8
FBA_CMD23
FBA_CMD28
FBA_CMD4
FBA_CMD7
FBA_CMD14
FBA_CMD12
FBA_CMD27

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

FBA_CMD29
FBA_CMD6
FBA_CMD30

M2
N8
M3

BA0
BA1
BA2

VMA_CLK1
VMA_CLK1#
FBA_CMD16

J7
K7
K9

CK
CK
CKE

A1
A8
C1
C9
D2
E9
F1
H2
H9

FBA_CMD19
FBA_CMD18
FBA_CMD11
FBA_CMD15
FBA_CMD25

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMA_WDQS7
VMA_RDQS7

F3
G3

DQSL
DQSL

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMA_DM7
VMA_DM6

E7
D3

VMA_WDQS6
VMA_RDQS6

C7
B7

FBA_CMD20

T2

+1.5V_GPU

VMA_ZQ2

DML
DMU
DQSU
DQSU

RESET

L8

ZQ

Should be 240
Ohms +-1%
R533
EV@243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
EV@VRAM _DDR3

NC#J1
NC#L1
NC#J9
NC#L9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

+1.5V_GPU

[16]
[16]
[16]

VMA_CLK1
VMA_CLK1#
FBA_CMD16
FBA_CMD19
FBA_CMD18

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMA_ZQ3

E3
F7
F2
F8
H3
H8
G2
H7

VMA_DQ56
VMA_DQ60
VMA_DQ58
VMA_DQ57
VMA_DQ59
VMA_DQ63
VMA_DQ61
VMA_DQ62

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMA_DQ51
VMA_DQ53
VMA_DQ49
VMA_DQ54
VMA_DQ48
VMA_DQ55
VMA_DQ50
VMA_DQ52

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

DQSU
DQSU

RESET
ZQ

R126
EV@243/F_4
J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

+1.5V_GPU

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A

+1.5V_GPU

VMA_ZQ4

L8

DML
DMU
DQSU
DQSU

RESET
ZQ

Should be 240
Ohms +-1%
R567
EV@243/F_4
J1
L1
J9
L9

96-BALL
SDRAM DDR3
EV@VRAM _DDR3

NC#J1
NC#L1
NC#J9
NC#L9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

+1.5V_GPU

B

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

C

96-BALL
SDRAM DDR3
EV@VRAM _DDR3

+1.5V_GPU

R530
EV@1.33K/F_4

VMA_CLK0

L8

DML
DMU

Should be 240
Ohms +-1%

96-BALL
SDRAM DDR3
EV@VRAM _DDR3

+1.5V_GPU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

+1.5V_GPU

[16]
[16]

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFC_VMA3
VREFD_VMA3

+1.5V_GPU

R218
EV@1.33K/F_4

+1.5V_GPU

R555
EV@1.33K/F_4

R159
EV@1.33K/F_4

VMA_CLK1
R211
VREFC_VMA1

EV@162/F_4
VMA_CLK0#

R118
EV@162/F_4

VREFD_VMA1

VREFC_VMA3

VREFD_VMA3

VMA_CLK1#
C274
EV@0.1U/10V/X5R_4
+1.5V_GPU

+1.5V_GPU

C496
C211
C510
C180

EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4

C499
C256
C498
C206

EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4

C251
C263
C513
C501

EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4

C506
C497
C505
C517

EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4
EV@1U/6.3V/X5R_4

C179
C286
C508
C522
C250

EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4

C236
C495
C527
C272
C285

EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4

C246
C260
C531
C258
C500

EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4

C494
C257
C271
C226
C273

EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4

C507
EV@0.1U/10V/X5R_4

R160
EV@1.33K/F_4

R554
EV@1.33K/F_4

+1.5V_GPU

R219
EV@1.33K/F_4

D

R531
EV@1.33K/F_4

+1.5V_GPU

C493
EV@0.1U/10V/X5R_4

C247
EV@0.1U/10V/X5R_4

D

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

N12M (DDR3) 5/5

Date:
1

2

3

4

5

6

Friday, October 29, 2010
7

Sheet

19
8

of

45

5

4

3

2

1

20
+5V
D

+3V

D

D31
RB500V-40

CN22
HDMI_TX2+

R34
2.2K_4
R31
2.2K_4

HDMI_TX2HDMI_TX1+

R14
2.2K_4

HDMI_TX1HDMI_TX0+

R26
2.2K_4
Q5

HDMI_SCL_R

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HDMI_TX0HDMI_CLK+

FDV301N

1

3

2

HDMI_CLKHDMI_DDC_CLK
HDMI_DDC_DAT

2

+3V

HDMI_SDA_R

1

3

1 F1

2

+5V

HDMIC_5V
HP_DET

FUSE1A6V_POLY
Q4

FDV301N

SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2

20

21

CONN_HDMI

HDMI Hot-PLUG to EC and GPU

+3V

C

C

R33
10K_4

+3V

HDMI_HPD_R

3

R37
10K_4

1

3

2
Q7
2N7002K

2

[7] INT_HDMI_TXDP2
[7] INT_HDMI_TXDN2
[7] INT_HDMI_TXDP1
[7] INT_HDMI_TXDN1
[7] INT_HDMI_TXDP0
[7] INT_HDMI_TXDN0
[7] INT_HDMI_TXCP
[7] INT_HDMI_TXCN

1

UMA Only / HDMI
C602
C598

0.1U/10V/X5R_4
0.1U/10V/X5R_4

HDMI_TX2+
HDMI_TX2-

C597
C594

0.1U/10V/X5R_4
0.1U/10V/X5R_4

HDMI_TX1+
HDMI_TX1-

C590
C588

0.1U/10V/X5R_4
0.1U/10V/X5R_4

HDMI_TX0+
HDMI_TX0-

C587
C586

0.1U/10V/X5R_4
0.1U/10V/X5R_4

HDMI_CLK+
HDMI_CLK-

R28

*0_4_short

HDMI_SCL_R

R25

*0_4_short

HDMI_SDA_R

R30

*0_4_short

HDMI_HPD_R

HP_DET

Q6
2N7002K

R35
20K/J_4

B

B

[7] INT_HDMI_SCL

[7] INT_HDMI_SDA

[7] INT_HDMI_HPD

EMI reserve for HDMI
U38
HDMI_TX2+
HDMI_TX2HDMI_TX1+
HDMI_TX1-

HDMI_TX0+
HDMI_TX0HDMI_CLK+
HDMI_CLK619/F_4
619/F_4

HDMI_TX2+
HDMI_TX2-

R13
R21

619/F_4
619/F_4

HDMI_TX1+
HDMI_TX1-

HDMI_DDC_DAT
HDMI_DDC_CLK

R22
R27

619/F_4
619/F_4

HDMI_TX0+
HDMI_TX0-

HDMIC_5V
HP_DET

R29
R32

619/F_4
619/F_4

HDMI_CLK+
HDMI_CLK-

1
2
VCC
4
5

10
9
GND
7
6

10
9
8
7
6

HDMI_TX2+
HDMI_TX2-

10
9
8
7
6

HDMI_TX0+
HDMI_TX0-

1
2
VCC
4
5

10
9
GND
7
6

10
9
8
7
6

HDMI_DDC_DAT
HDMI_DDC_CLK

R600
*100/F_4
HDMI_TX2HDMI_TX1+

*RClamp0514M_AG
U36

1
2
3
4
5

HDMI_TX2+

HDMI_TX1+
HDMI_TX1-

R598
*100/F_4
HDMI_TX1-

HDMI_CLK+
HDMI_CLK-

HDMI_TX0+

*RClamp0514M_AG
U34

1
2
3
4
5

1
2
VCC
4
5

10
9
GND
7
6

R596
*100/F_4
HDMI_TX0HDMI_CLK+
HDMIC_5V
HP_DET

R595
*100/F_4
HDMI_CLK-

*RClamp0514M_AG

For ESD

Layout note:Place close to HDMI Conn

3

HDMI_LF

R7
R9

1
2
3
4
5

Q2
2N7002K-T1-E3

A

2

A

1

+5V

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

HDMI conn

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

20

of

45

A

B

C

D

E

21

CRT_VCC

D26
RB500V-40
2

+5V

Layout Note:
Setting R,G,B trace
impedance to 50 ohm.
L5

BLM18BA470SN1

CRT_R1

L4

BLM18BA470SN1

CRT_G1

L3

[7] INT_CRT_BLU
R3
150/F_4

4

*VARISTOR_4

[7] INT_CRT_GRE

R4
150/F_4

0.1U/10V/X5R_4

F2
FUSE1A6V_POLY

C601

[7] INT_CRT_RED

R5
150/F_4

C603
CRT_VCC_R

BLM18BA470SN1

CRT_B1

C10

C7

C5

C6

C8

C9

5.6P/50V/COG_4

5.6P/50V/COG_4

5.6P/50V/COG_4

5.6P/50V/COG_4

5.6P/50V/COG_4

5.6P/50V/COG_4
TP1

16

4

1

6
1
7
2
8
3
9
4
10
5

CN19
CRT_CONN
11
12
13

ESD PROTECTION
D5

14

CRT_R1

15

17

*TVSS5VESPT

D4
CRT_G1
*TVSS5VESPT
3

3

+5V
D3
CRT_B1

1

5

*TVSS5VESPT

2

[7] INT_CRT_VSYNC

VGAVSYNC_R

4

R1

CRTVSYNC1

10_4

L1

CRTVSYNC

HB-1T1608-121JT

D1
CRTVSYNC
U1
AHCT1G125DCH

L2

CRTHSYNC

HB-1T1608-121JT

C4

C1

C3

C2

*10P/50V/COG_4

*10P/50V/COG_4

10P/50V/COG_4

10P/50V/COG_4

*TVSS5VESPT

1

D2
5

C11
0.1U/10V/X5R_4

CRTHSYNC1

Place near
U37,U38 < 200 mil

CRTHSYNC
*TVSS5VESPT

2

[7] INT_CRT_HSYNC

VGAHSYNC_R

4

R2

10_4

Place near CN5002 connector
< 200 mil

U2
AHCT1G125DCH

D28
DDCCLK
*TVSS5VESPT

2

2

+3V

D27
DDCDAT

R603

R601
2.2K_4

CRT_VCC

R602
4.7K_4

1

3

+3V

Q52
2N7002K-T1-E3

R604
4.7K_4
DDCCLK

2

2

[7] INT_DDCCLK

2.2K_4

*TVSS5VESPT

1

[7] INT_DDCDAT

DDCDAT

3

1

1

Q53
2N7002K-T1-E3

C604

C605

*10P/50V/COG_4

*10P/50V/COG_4

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

CRT Conn

Date:
A

B

C

D

Friday, October 29, 2010

Sheet
E

21

of

45

5

4

3

2

1

22

+3V

D

3

2

[32]

LCDVCC_R

1

R254
330K_4

Q26
AO3404
R231
22_8

C269
10U/6.3V/X5R_8

LCDVCC_ON

RF27

RF26

3

3

2

[7] INT_TXLOUTN0
[7] INT_TXLOUTP0

[7] INT_TXLOUTN2
[7] INT_TXLOUTP2
[7] INT_TXLCLKOUTN
[7] INT_TXLCLKOUTP

1

1

Q22
ME2N7002E

*0.1U/10V/X5R_4

*0.1U/10V/X5R_4

R221

[32] COLOR_ENGINE
[7] LVDS_BRIGHT_PWM

3

C

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

[7] INT_TXLOUTN1
[7] INT_TXLOUTP1

Q23
ME2N7002E
R232
100K_4

CN3

10K_4

[7] INT_EDIDCLK
[7] INT_EDIDDAT

0.022U/25V/X7R_6

2

R216

+3V

C278

+5V_S5

DCR
LCDVCC

EC-B-07

Q24
PDTC144EU

10K_4

DISPON

GFX_PWR_SRC

2

[7] INT_LVDS_VDDEN

1

R257
100K_4

G_0

R545
*Short_8@NC

2.2K_4

+3V

2.2K_4

+15V

D

G_1

G_2

C

G_4
G_3

LCDVCC

R634

R633

LCDVCC

LVD-A30SFYG+

Back light
+3VPCU

+3V

R264
*4.7K_4

R258
10K_4

GFX_PWR_SRC

R253
C279

[31,32]

LID551#

LID551#

D13

D12

RB500V-40

0.1U/25V/X5R_6

RB500V-40

*Short_8@NC

VIN

C276

DISPON
0.1U/25V/X5R_6

C287
*10U/25V/X5R_8

B

B

C289
R220
100K_4

0.1U/10V/X5R_4

C277
*47P/50V/NPO_4

R255

2.2K_4

3

[7] INT_LVDS_BLON

C291
*1U/10V/X5R_6

Q25
PDTC144EV

2

LCD_BK_OFF#

[8]

1

R256
10K_4

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

LCD Conn

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

22

of

45

5

4

3

2

1

23
* R48 open when use RTL8105E

LANVCC

R48

+3VPCU

AVDD10
AVDD10
AVDD10(NC)
AVDD10(NC)
DVDD10
DVDD10
DVDD10(NC)

30

32
EEDI/SDA

EECS/SCL

40

37

14
15

31

LED0

MDIP0
MDIN0

MDI_0+
MDI_0-

MDIP1
MDIN1

4
5

MDI_1+
MDI_1-

MDIP2(NC)
MDIN2(NC)

7
8

MDI_2+
MDI_2-

MDIP3(NC)
MDIN3(NC)

10
11

MDI_3+
MDI_3-

26
28
33

ISOLATEB

CKXTAL1
CKXTAL2
GND

EVDD10

25
R57

[3,9,27,28] PLTRST#
[9] PCIE_CLKREQ_LAN#

D

1
2

ISOLATEB
LANWAKEB
ENSWREG

GND

21

LAN_EVDD12

TP3

10K_4
10K_4

RSET

+3V

R60
1K_4

LAN_ISOLATEB [32]
PCIE_WAKE#
LANVCC

[7,27,28]
R59
15K_4

XTAL1
XTAL2

43
44

1

RSET

46

R46
2.49K/F_4

D6
RB500V-40

2

Y1

49

0.1U/10V/X5R_4

RTL81111E

24

REGOUT

45
3
6
9
13
29
41

LED3/EEDO

36

LED1/EESK

CTRL12A
LAN_DVDD12

4

C62

HSOP
HSON

AVDD33
AVDD33
AVDD33
AVDD33(NC)
DVDD33
DVDD3

LANVCC_R

C61
*10U/6.3V/X5R_8

38

47
48
42
12
27
39

LANVCC

R87
*Short_8@NC

22
23

Q10
AO6402A

VDDREG
VDDREG

SMBCLK(NC)
SMBDATA(NC)

1
2
5
6
3

LAN_ON

GPO/SMBALERT

U6

34
35

CTRL12/VDD

CLKREQB
HSIP
HSIN
REFCLK_P
REFCLK_N

LANVCC

PERSTB

D

1K/F_4

16
17
18
19
20

R56

LANVCC

[34]

RJ45_LINKUP#
RJ45_ACTIVITY#
LED3/EEDO
EECS
R62
EEDI
R58

LAN1G@10K_4

TP2

25MHZ

C37

C45

33P/50V/NPO_4

33P/50V/NPO_4

LAN_REST#

*Short_4@NC

GPP_TX2N_LAN
GPP_TX2P_LAN

C57
C53

0.1U/10V/X5R_4
0.1U/10V/X5R_4

PCIE_RXN2_LAN
PCIE_RXP2_LAN

[9]
[9]

CLK_PCIE_LANN [9]
CLK_PCIE_LANP [9]
PCIE_TXN2_LAN [9]
PCIE_TXP2_LAN [9]

C

C

* C5116 and C5273 are for U5006 EVDD12 pin 19.
LANVCC

CTRL12/VDD
CTRL12A
R89

LAN_EVDD12

*Short_8@NC

C29

C56

C54

C52

C65

L6

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

4.7uH

CTRL12A_R

R53

*Short_8@NC

C66
4.7U/6.3V/X5R_8

C51

C50

1U/6.3V/X5R_4

0.1U/10V/X5R_4

C58
C59
4.7U/6.3V/X5R_8

* C5110 to C5113 are for U5006 VDD33 pins-- 1, 29, 37
and 40.

Note 1: The Trace length
between L1 and 8111DL's Pin
1 must be within 0.5 cm. C5
and C8 to L1 must be within
0.5cm. Refer to Layout guide
for more detail.

R61
*Short_8@NC

0.1U/10V/X5R_4

LAN_DVDD12

Place C5113 ,C5094 closed to U5006 pins44,45.

C27

C26

C28

C36

C55

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

B

B

* C5119 to C5123 are for U5006 VDD12 pins-- 10, 13, 30, 36, 39.

Layout:All termination signal should have 20 mil trace

Tramsformer

RJ45 Connector
EMI:close RJ45

U35
MDI_0MDI_0+

12

C585

0.01U/16V/X7R_4

MX4-

13

MDI_0+

TD4+

MX4+

14

LAN_MX0+

10

TCT4

MCT4

15

LAN_MCT0

16

LAN_MX1-

MDI_1-

9

TD3-

MX3-

MDI_1+

8

TD3+

MX3+

17

LAN_MX1+

MCT3

18

LAN_MCT1

MX2-

19

LAN_MX2LAN_MX2+

6

MDI_2+

5

TCT3
TD2-

R20

75/F_8

LANCT3

1
2
3

IO1
GND
IO2

IO4
REF
IO3

6
5
4

MDI_0C12
MDI_1+

Orange LED

CN21

*0.1U/10V/X5R_4@NC

IP4220CZ6

MDI_1-

MDI_2-

U33

LAN_MX0-

11

7

A

TD4-

TD2+

MX2+

20

4

TCT2

MCT2

21

LAN_MCT2

MDI_3-

3

TD1-

MX1-

22

LAN_MX3-

MDI_3+

2

TD1+

MX1+

23

LAN_MX3+

1

TCT1

MCT1

24

LAN_MCT3

LANVCC

R10

150_4

U32
R19

MDI_2+

75/F_8

MDI_3-

1
2
3

IO1
GND
IO2

IO4
REF
IO3

6
5
4

LAN1G@75/F_8

R17

LAN1G@75/F_8

10

RJ45_LINKUP#

12

LAN_MX0+
LAN_MX0LAN_MX1+
LAN_MX2+
LAN_MX2LAN_MX1LAN_MX3+
LAN_MX3-

MDI_3+

LAN1G@IP4220CZ6
R18

LAN_OLED

MDI_2-

LANVCC

R11

150_4

1
2
3
4
5
6
7
8

LAN_GLED
9
RJ45_ACTIVITY# 11

A

13
14

GREEN LED

GST5009B LF

RJ45

C13
RV38

R16

C16

*EGA-0402

1M_8

10P/3KV/X7R_1808

*0.1U/10V/X5R_4@NC

EMI:close RJ45

RJ45 Connector

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

RTL8111EL-VB

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

23

of

45

5

4

3

AGND

MIC2-VREFO

2.2U/6.3V/X5R_6

R381

*0_6/S

R382

*0_6/S

R384

*0_6/S

2

+5V_CODEC

C378

C395

C369

C380

R390

10U/10/X7R_6

0.1U/10V/X5R_4

*0_6/S

0.1U/10V/X5R_4

4.7U/10V/X5R_6

4.7U/10V/X5R_6

AGND

C379

2.2U/6.3V/X5R_6

C375

0.1U/10V/X7R_4

C368

*1000p/50V/X7R_4

C403

*1000p/50V/X7R_4

C400

MIC1-L

21

MONO-OUT

20

JDREF

19

Sense-B

18

MIC2-R

17

PVSS1

43

PVSS2

ALC269Q-VB6-GR
(LQFP-48)

SPK-R-

Sense A

13

49

T_PAD

C382

10U/6.3V/X5R_6

0.1U/10V/X7R_4

EN

3

MAINON [9,28,32,34,35,36,38,40,41]

Vset=1.242V

D

4.7U/10V/X5R_6

MIC1_R1

C372

4.7U/10V/X5R_6

MIC1_L1

HPOUT-L

R405

75/F_4

HPOUT-L1

L27

BLM18BD601SN1D_0.2A

HPL

HPOUT-R

R406

75/F_4

HPOUT-R1

L28

BLM18BD601SN1D_0.2A

HPR

MIC2-R
MIC2-L

LINE_JD
R399
*1K_4

R400
*1K_4

20K/F_4

R394

C371

4.7U/10V/X5R_6

C370

4.7U/10V/X5R_6

MIC2_R1
MIC2_L1

AGND

20K/F_4

MIC1_JD#

R392

39.2K/F_4

LINEOUT_JD#

+AZA_VDD

L31

*Short_8_NC

C393

AGND

C392

C394

1U/6.3V/X5R_4

HP-JACK-BLACK

LINEOUT_JD#
R391

*Intel HDA Either +1.5V_S5 or +3V_S5

+3V

Close to CODEC
SENSEA

3
1
4
2
5
6

0.1U/10V/X7R_4

Normal Open Jack

LINEOUT_JD#
+AZA_VDD

C

R386

ANALOG

*10K_4 LINE_JD

2
Q40
*2N7002E

DIGITAL
1

12

11

9
+AZA_VDD

C373

PCBEEP

AGND
ACZ_RST#

22_4

R408

22_4

C387

*22p/50V/NPO_4

ACZ_SYNC

[8]

ACZ_SDIN0

[8]

ACZ_BITCLK

[8]

ACZ_SDOUT

[8]

System MIC(AMP)
MIC1-VREFO-L
MIC1-VREFO-R

*EGA-0402

R404

[8]

RV20

C391

ACZ_SDIN

10

8

DVSS2
7

6

5

4

3

MIC1-L

PCBEEP

SPDIFO

RESET#

48

SYNC

14

DVDD-IO

LINE2-L
SDATA-IN

EAPD

BIT-CLK

47

SDATA-OUT

15

PD#

16

LINE2-R
GPIO1/DMIC-CLK

MIC2-L

PVDD2

GPIO0/DMIC-DATA

AGND

*Short_4@NC

SPK-R+

DVDD1

MIC1-R

AGND

46

2

*10U/10/X7R_6

CN12

45

1

*1U/10V/X5R_6

3

25
AVDD1

27

SPK-L+
SPK-L-

0.1U/10V/X5R_4

*0_4

R411
D29

VOLMUTE#

26

22

Close to CODEC

VOLMUTE#

AVSS1

28

MIC1-R

+AZA_VDD

[32]

VREF

LDO-CAP

30

31

32

33

29
MIC2-VREFO

MIC1-VREFO-R

MIC1-VREFO-L

HP-OUT-L

HP-OUT-R

35

34
CPVEE

36
CBP
PVDD1

42

44

CBN

23

1

R387

C

24

LINE1-L

GND

Vin

*G916-475T1UF

C367
470p/50V/NPO_4

C398

EAPD

LINE1-R

41

C402

HDA Power(ADO)

C366
470p/50V/NPO_4

INSPKR+

10U/6.3V/X5R_6

C396

0.1U/10V/X5R_4

C407

10U/6.3V/X5R_6

0.1U/10V/X5R_4

C405

L29
FBMH1608HM151_6_2A

40

C401

Earphone(AMP)

U23

*EGA-0402

+5V

39

Close to CODEC

*EGA-0402

INSPKR-

AVDD2

BYP

2

AGND

RV23

INSPKL-

AVSS2

38

C404

AGND

RV24

C399

10U/6.3V/X5R_6

C397

0.1U/10V/X5R_4

C408

10U/6.3V/X5R_6

0.1U/10V/X5R_4

C406

INSPKL+

37

Vout

4
AGND

AGND

L30
FBMH1608HM151_6_2A

5

*1U/6.3V/X5R_4

D

+5V

*Short_8_NC

C374

+5V_CODEC

AGND

24

+5V

60mil

L25
U24

C390
2.2U/6.3V/X5R_6

+5V_CODEC

1

Codec Power(ADO)

4.7U/10V/X5R_6

Close to CODEC

*0_6/S

C706,C723,C724,C712 close to IC

MIC1-VREFO-R

C389

R383

7

CODEC(ADO)

HPOUT-R
HPOUT-L
MIC1-VREFO-L

R403
4.7K_4

RB500V-40

R407
4.7K_4

MIC1_JD#

CN11

MUTE#
+AZA_VDD
*RB500V-40

3

D30

L24

BLM18BD601SN1D_0.2A

MIC1_R1

R393

1K_4

MIC1_R2

L26

BLM18BD601SN1D_0.2A

*EGA-0402

MIC1_JD

MIC1_L2

*EGA-0402

*10K_4

1K_4

RV17

R385

R388

RV18

EC-B-00

B

MIC1_L1

3
1
4
2
5
6

MIC1_L3
MIC1_R3
MIC1_JD

2

1

Q39
*2N7002E

C364

C365

470P/50V/X7R_4

B

7

EAPD

R389

470P/50V/X7R_4
*Short_4@NC

MIC_JACK_BLACK

Normal Open Jack

AGND
AGND

MIC1_JD#

Speaker(AMP)

CN10

INSPKR+
INSPKRINSPKL+
INSPKL-

R410
R409
R402
R397

INSPKR+N
INSPKR-N
INSPKL+N
INSPKL-N

RV19

RV21

*EGA-0402

*EGA-0402

*EGA-0402

RV22 *EGA-0402

RV25

INTERNAL MIC

0_6
0_6
0_6
0_6

15
2
3
46
R-L-SPEAKERS

C377

C381

C384

C388

*47P/50V/NPO_4

*47P/50V/NPO_4

*47P/50V/NPO_4

*47P/50V/NPO_4

MIC2-VREFO

3

R47
4.7K_4
R43

1K_4

MIC2_R1

R45

1K_4

MIC2_L_R

1
2

PC BEEP

CN1
MIC_CON

+3V
C385

0.047U/10V/X7R_4
A

5

MIC2_L1

4

A

[8]

1

SPKR

4

3

C38
R396
10K/F_4

470P/50V/X7R_4

R398

100K_4

C376

0.1U/10V/X5R_4

C383

100P/50V/X7R_4

PCBEEP

2

[32] PCBEEP_AD

U22
NC7SZ86

R395
150K/F_4

R401

10K/F_4

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

ALC269/MIC/Line out

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

24

of

45

1

2

3

4

SATA HDD Connector.

5

6

7

+5V_ODD

HDD-->1A

C425

C342

C343

C338

10U/10V/X5R_8

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

10U/10V/X5R_8

6
5
2
1

+5V
+3VPCU
R437

120 mils
+5V_HDD

*Short_8@NC

C432

C434

0.1U/10V/X5R_4

10U/10V/X5R_8

C336
0.1U/10V/X5R_4

A

R360

3

OOD_EN_5V

5

SATA_RXP1 [8]
SATA_RXN1 [8]

4

SATA_TXN1 [8]
SATA_TXP1 [8]

Q34A
2N7002DW

1

0.01U/25V_4
0.01U/25V_4

100K_4

Place caps close to
connector.
6

0.01U/16V/X7R_4
0.01U/16V/X7R_4

SATA_TXN1_C C490
SATA_TXP1_C C489

[32]

+3V_HDD

2

ODD_EN

+3V
*Short_8@NC

C430

C429

0.1U/10V/X5R_4

*10U/10V/X5R_8

Q34B
2N7002DW

C337
0.1U/25V/X5R_4

R356
100K

SATA_HDD_CON
R429

HDD-->1.5A(burning)
R370
100K_4

10U/10V/X5R_8

R357
100K_4
+15V

SATA_RXP1_C C320
SATA_RXN1_C C317

4
C353

Place caps close to
connector.

2

20

C426

1

A

+5V_HDD
+3V_HDD

25

+5V_ODD
Q35
AO6402A

C427

3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

1

23
24

+5VPCU

120 mils

CN16

21
22

8

SATA ODD Connector.

CN14

Place caps close to
connector.

SATA_TXP3
SATA_TXN3

[8]
[8]

SATA_RXN3
SATA_RXP3

R365

[8] ODD_PRSNT#
R364

[9,32] ODD_MDDA#

[8]
[8]

0.01U/25V_4
0.01U/25V_4

C283
C284

0.01U/16V/X7R_4
0.01U/16V/X7R_4

1
2
3
4
5
6
7

SATA_TXP3_C
SATA_TXN3_C

C341 SATA_RXN3_C
C340 SATA_RXP3_C

0_4

8
9
10
11
12
13

+5V_ODD

*Short_4_NC
R366
1K/F_4

B

R363
10K_4

S1
GND1
TXP
A 14
TXN
GND2
RXN
B
RXP
GND3 S7
P1
DP
+5V
+5V
MD
15
GND
GND
P6
91939-0137P

14

15
B

+3V

USB + E-SATA
CML1

Modify to GMT H-active

C592

USB0PWR

*470P/50V/X7R_4

0.1U/10V/X5R_4

+ C595

2

CN20
USB0PWR_R

150U/6.3V_3528

USBP0-_R
USBP0+_R

*EGA-0402

C591

*EGA-0402

C593
1U/10V/X5R_6

CL-2M2012-900JT

40 mils (Iout=1A)

8
VIN1
OUT3
7
VIN2
OUT2
6
EN
OUT1
5
GND
OC
G547G1P81U(MSOP-8)

USB 0

USBP0+_R
USBP0-_R

2
3

RV3

[27,32] USB_ON

1
4

USBP0+
USBP0-

RV4

U39

2
3
4
1

[9]
[9]

USB0PWR

1

+5V_S5

+3V

ESATA_TX4+
ESATA_TX4R8
*10K_4 ESATA_RX4ESATA_RX4+

3

SATA_EN
USB_OC2# [9]
+3V

+3V

ESATA_TX4ESATA_TX4+

2
3

E-SATA RE-DRIVER

2

USB Vcc
DD+
GND

5
6
7
8
9
10
11

GND
A+
AGND
BB+
GND

U3

IO1 VIN
IO2 GND

ESATA_RX4ESATA_RX4+

4
1

2
3

*PJSR05

12
13
14
15

Shield
Shield
Shield
Shield

C

4
1

IO1 VIN
IO2 GND

1

U4

C

1
2
3
4

*PJSR05

Q3
*2N7002K

E-SATA_CON

+1.5V

C25

C14

C15

C24

Layout: Locate this IC near to conn 2~3 inch,and it can away PCH above 10 inch.

0.1U/10V/X5R_4

4.7U/6.3V/X5R_6

*0.1U/10V/X5R_4

*4.7U/6.3V/X5R_6

U5
PS8511ATQFN20GTR-QFN20

6
16

VCC
VCC

0_BST#
1_BST#
AUTOPW_EN

SATA_TXP4

[8]

SATA_TXN4

[8]

SATA_RXN4

[8] SATA_RXP4

C282

0.01U/25V_4

SATA_TXP4_C

1

C281

0.01U/25V_4

SATA_TXN4_C

2

C22

0.01U/16V/X7R_4

SATA_RXN4_C

4

C23

0.01U/16V/X7R_4

SATA_RXP4_C

8

0_PRE
1_PRE

1EQ
0EQ

C17

0.01U/16V/X7R_4

ESATA_TX4+

EN AUTO_EN 0/1EQ 0/1EQ 0/1_BST# 0/1_BST#

ESATA_TX4-_C

C18

0.01U/16V/X7R_4

ESATA_TX4-

0

X

ESATA_RX4-_C

C19

0.01U/16V/X7R_4

ESATA_RX4-

1

0

12
11

ESATA_RX4+_C

C21

0.01U/16V/X7R_4

ESATA_RX4+

3
13
18
19

1EQ
0EQ

R15
R24

21

1_PRE

GND
GND

ESATA_TX4+_C

R41
*10K_4

10K_4
10K_4

+3V
+3V

*EGA-0402

*10K_4@NC

EN

15
14

*EGA-0402

R42

IN1P

Int.PH(150Kohm) : EN,0/1_BST#
Int.PL(150Kohm) : AUTO_EN,0/1EQ,0/1_PRE

+3V

RV7

9

OUT1P

10K_4

*EGA-0402

0_PRE

IN1M

R12

*EGA-0402

*10K_4@NC

OUT1M

17 SATA_AUTO_EN

RV8

7

R39

OUT0M

*10K_4
*10K_4

RV1

SATA_EN
+3V

OUT0P

IN0M

R23
R38

RV2

D

5

IN0P

T_PAD

[8]

0_BST#
1_BST#

20
10

Straps notice:
1. SATA 3G-->600mV ; 0/1 BST#-->H
2. If input length is over 7 inch ; 0/1EQ-->H

R40
*10K_4

1

1

X
X

X
X

0/1_PRE

0/1_PRE

Function

X

X

X

X

X

X

X

X

disable auto power saving

X

enable auto power saving
Short and medium length

X

X

X

X

X

Standby

1

X

0

X

X

X

X

X

1

X

X

1

X

X

X

X

Long length

1

X

X

X

X

X

Output :800~1200 mVpp

1

X

X

X

X

1

X

X

1

X

X

X

X

X

0

X

Output :400~700 mVpp
Pre-emphasis disabled

1

X

X

X

X

X

X

1

Pre-emphasis enabled

0

X

D

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

SATA HDD/ESATA/CD-ROM

Date:
1

2

3

4

5

6

7

Friday, October 29, 2010

Sheet

25
8

of

45

5

4

3

2

1

26
Clock Mode
strap
R413
*1U/6.3V/X5R_4

C409

1U/6.3V/X5R_4

C

SP14

SP15

1

DM

SP13

36

SP13

USBP10+

2

DP

SP12

35

SP12

3

NC

SP11

34

SP11

4

NC

SP10

33

SP10

5

NC

SP9

32

SP9

6

NC

SP8

31

SP8

7

NC

SP7

30

SP7

8

GND

SP6

29

SP6

9

NC

SP5

28

10

NC

CLK_MODE[1]

27

11

3V3_IN

GND

26

12

Card_3V3

SD_D2

25

C418

C417

10U/6.3V/X5R_6

0.1U/10V/X5R_4

VCC_XD

SD_WP

37

USBP10-

[9]

R423
0_8

MS_BS
MS_D5
MS_D1
MS_D4
MS_D0
MS_D2
MS_D6
MS_D3
MS_D7
MS_CLK

XD
XD_RDY
XD_RE#
XD_CE#
XD_WE#
XD_CLE
XD_ALE
XD_WP#
XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

D

For RTS5139

[9]

+3V

MS

SD_D7
SD_D6
SD_D5
SD_D4

SD,MS 4bit only

SP14

SD_CD#

38
SP15

MS_CD#
40

39
SD_CD#

41
GPIO

MS_INS#

XO

XI
CLK_MODE[0]

42

43

48
RREF

U25

45

RREF

46

6.19K/F_4

C411
*5.6P/50V_4

RST#

R414
C410
*5.6P/50V_4

XTLI/CLK_IN

*270K_4

47

R415

C412
XO

*12MHZ 30ppm

44

1

NC

Y6

+3V

XI

2

XTLO

*Short_4_NC

DV18

R412

[9] CLK_48M_CARD

*10K_4

SD/MMC
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15

48MHz
24MHz
12MHz
12MHz
(Crystal)

D

Note:

R9287 R9307

RTS5139-GR

C

SP5
R419

*10K_4

SD_D2_R

R416

DV33_18

*0_4_short

SD_D2

SD_D3
24

SD_CMD

SD_D3_R

SD_CMD_R

23
SD_CMD

SD_D3

SD_CLK
SD_CLK_R
SD_CLK

SD_D0

B

*0_4_short

*0_4_short

SD_D1

R417

*0_4_short

EC-B-05

R418

0.1U/10V/X5R_4

*0_4_short

*4.7U/6.3V/X5R_6

R420

C422

*0_4_short

C421

R421

R422

B

22

SD_D0

SD_D1

21

20

SD_D0_R

SD_D1_R

SP4
19
SP4

SP3
18
SP3

SP2
17
SP2

SP1
16
SP1

GND
15

14
DV33_18

DV33_18

13
XD_CD#

XD_CD#

C416
0.1U/10V/X5R_4

7 IN1 CARD CONN
XD,MMC/SD,MS/MSP
CN9
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36

SHIELD1-GND
SHIELD2-GND
SHIELD3-GND
SHIELD4-GND

37
38
41
42

MS_D1
MS_BS
SD_CLK
SD_D0
XD_D2
XD_D3
XD_D4
SD_D1
XD_D5
XD_D6
XD_D7
XD_CD#
SD_WP
SD_CD#

C420

VCC_XD

33P/25V_4

VCC_XD
0.1U/10V/X5R_4
C419

10U/6.3V/X5R_6

(3)MS-DATA1
(2)MS-BS
4IN1-GND2
(4)SD-VCC
(5)SD-CLK
(7)SD-DAT0
(12)XD-D2
(13)XD-D3
(14)XD-D4
(8)SD-DAT1
(15)XD-D5
(16)XD-D6
(17)XD-D7
(18)XD-VCC
(19)XD-CD-SW
SD-WP-SW
SD-CD-SW

0.1U/10V/X5R_4

MS_CLK
MS_D3
MS_CD#
MS_D2
MS_D0

C414
0.1U/10V/X5R_4

(2)XD-R/B
(3)XD-RE
(4)XD-CE
(5)XD-CLE
(6)XD-ALE
(7)XD-WE
(8)XD-WP
(10)XD-D0
(11)XD-D1
(9)SD-DAT2
(1)SD-DAT3
(2)SD-CMD
4IN1-GND1
(9)MS-VCC
(8)MS-SCLK
(7)MS-DATA3
(6)MS-INS
(5)MS-DATA2
(4)MS-DATA0

C415

VCC_XD

A

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

C413

XD_RDY
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WP#
XD_D0
XD_D1
SD_D2
SD_D3
SD_CMD

A

R015-212-LM

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Card Reader (RTS5159)

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

26

of

45

1

2

3

4

5

6

7

8

MiniCard WLA connector
+3.3V_WLAN

+3.3V_WLAN

27

+1.5V_WLAN

CN13
MINICARD_PME#

[9] PCIE_CLKREQ_WLAN#
[9] CLK_PCIE_WLANN
[9] CLK_PCIE_WLANP

1
3
5
7
9
11
13
15

WAKE#
RESERVED_1
RESERVED_2
CLKREQ#
GND1
REFCLKREFCLK+
GND2

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

UIM_C8
UIM_C4
GND4
PERn0
PERp0
GND6
GND7
PETn0
PETp0
GND9
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10

3.3V_1
GND0
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

2
4
6
8
10
12
14
16

GND3
W_DISABLE#
PERST#
3.3VAUX1
GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_DUSB_D+
GND10
LED_WWAN#
LED_WLAN#
LED_WPAN#
1.5V_3
GND11
3.3V_2

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

EC-B-08
LPC_LFRAME# [8,32]
LPC_LAD0 [8,32]
LPC_LAD1 [8,32]
LPC_LAD2 [8,32]
LPC_LAD3 [8,32]

A

A

[8,32]

[9]
[9]

PCI-Express TX and RX
direct to connector

R427

IRQ_SERIRQ

*0_4
R424

IRQ_SERIRQ_R
*0_4

PCIE_RXN3
PCIE_RXP3

[9]
[9]

PCIE_TXN3
PCIE_TXP3

0_4
0_4

CLK_LPC_DEBUG
LPC_DRQ#0 [8]
USBP3USBP3+

RV36

*EGA-0402

*EGA-0402

TP48

RV35

*0_4

R375
R376

*EGA-0402

R425

PLTRST# [3,9,23,28]

CLK_LPC_DEBUG_R
LPC_LDRQ0#_R

RV16

[8] INTEL_BT_OFF#

WLAN_OFF_R#
PLTRST#

[9]

[9]
[9]

80003-1021
+3V_S5
*10K_4

2

R426

WLAN_OFF_R#
D24
[7,23,28]

3

PCIE_WAKE#

Q42
*PDTC144EV

B

LAN_DISABLE#

RB500V-40

[10]

MINICARD_PME#

1

R379

B

*0_4

Reserved for EMI
CLK_LPC_DEBUG
+1.5V_WLAN

+3.3V_WLAN

Place caps close to connector.

C355
*0.1U/10V/X5R_4
+3.3V_WLAN

+3V

R377

+1.5V_WLAN

*Short_8@NC

+1.5V

R378

C362
C361
0.01U/16V/X7R_4

RF14
*10P/50V/COG_4

C360
0.1U/10V/X5R_4

C356

C357

C358

C424

C359

0.1U/10V/X5R_4

*0.047U/10V/X7R_4

0.1U/10V/X5R_4

0.047U/10V/X7R_4

4.7U/10V/X5R_8

10U/6.3V/X5R_8

Close to GND

*Short_4@NC

USB2.0*1
BLUETOOTH
EC-B-02

R611

USB_OC0#

*0R_4

Modify to GMT H active
USB3.0 : Install
USB2.0 : Remove

USB_ON

[9]

To PCH

C492
1U/10V/X5R_6

OVCUR2

VIN1
VIN2
EN
GND

OUT3
OUT2
OUT1
OC

USB_OC1#

[9]

G547G1P81U(MSOP-8)

[28]

To USB3.0 IC

Remove 0 ohm R599

BT_VCC
BT_LED

6
5
4
3
2
1

1

0R_4

C487

R610

USB3.0 : Remove
USB2.0 : Install

40 mils (Iout=1A)
8
7
6
5

+ C476
150U/6.3V_3528

C702

USBP5USBP5+

[9]
[9]

BT_DIS

[9]

0.1U/10V/X5R_4

C

TP47
C700

C701

0.1U/10V/X5R_4

G547G1P81U(MSOP-8)

CN7
BLUE TOOTH CONN
87213-0600-6P-L

USB2PWR

U26
2
3
4
1

0.1U/10V/X5R_4

C589
1U/10V/X5R_6

8
7
6
5

2

USB_ON

USB_ON

+5V_S5

40 mils (Iout=1A)
OUT3
OUT2
OUT1
OC

0.1U/10V/X5R_4

[25,32]

VIN1
VIN2
EN
GND

C488

C

USB1PWR

U37
2
3
4
1

470P/50V/X7R_4

+5V_S5

Modify to GMT H-active

+3V
USB1PWR_R

0.1U/10V/X5R_4

C599
470P/50V/X7R_4

DIP
USB 1,Left

USBP1-_R
USBP1+_R

USB20_DN1
USB20_DP1

USB20_DN1
USB20_DP1

R639
R640

[10]

CN18

CML2
[28]
[28]

+15V

*0R_4
*0R_4

[28]
[28]

1
2
3
4

USBP1-_R
USBP1+_R

RV5

RV6

*EGA-0402

*EGA-0402

D

USBP1-_R
USBP1+_R

VDD
DD+
GND

GND5
GND6
GND7
GND8

R374

1M/F_6

2
3

CL-2M2012-900JT
USBP1-_L
4
3
USBP1+_L
1
2

0R_4
0R_4

Q38
ME2N7002E

150U/6.3V_3528

20 mils
1

R638
R637

USBP1USBP1+

+ C596
0.1U/10V/X5R_4

BT_ON#

2

BT_VCC

Q37
PDTC144EU

5
6
7
8

1

[9]
[9]

C600
2

UBS2.0 suffer R637 & R638
USB3.0 suffer R639 & R640

3

C354
1

USB1PWR

D

USB_CONN

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

USB2.0*1/WLAN/BT

Date:
1

2

3

4

5

6

7

Friday, October 29, 2010

Sheet

27
8

of

45

2

3

4

5

P3V3_USB30

10K/F_4

Q54

R615
10K/F_4

+3.3VAUX

R617

10K_4

OVCUR2

R618

10K_4

SMCLK

OVCUR3

R619

10K_4

USB1PWR

USB3.0 PORT1
CN23

R620

[27]
[27]

10K_4

1
2
3
4
5
6
7
8
9

USBP1-_R
USBP1+_R

USBP1-_R
USBP1+_R

USB30_RX1USB30_RX1+

PWREN2
PWREN3
PWREN4
SPISO
SPISI
SPISCLK
SPICS#

1
1
1

+3.3VAUX
TP96
TP97
TP98

1
2
3
4
5

USB30_TX1USB30_TX1+

13
12
11
10

C608, C610 close to CN23

Z1
Z2
GND
Z3
Z4

NC
NC
VCC
NC
NC

USB30_RX1USB30_RX1+

10
9
8
7
6

USB3.0 CONN
USB1PWR

USB30_TX1USB30_TX1+

SUY USB3.0: DFHS09FR063
SUY USB2.0: DFHS04FR455

*RClamp0544.TBT
msop10-4_9-5

0.1U/16V_4
0.1U/16V_4

C609
C611

PCIE_RXN5 [9]
PCIE_RXP5 [9]

P3V3_USB30

B

P3V3_USB30

PCIE_TXN5 [9]
PCIE_TXP5 [9]

P3V3_USB30
CLK_100_USB30_N
CLK_100_USB30_P

[9]
[9]

+15V

R658

+3V_S5

PLTRST_PCIE_N_USB

P3V3_USB30

PEXREXT

USB30_TX1USB30_TX1+

13
12
11
10

USB30_RX1USB30_RX1+

1.0VL
P3V3_USB30

PCIE_RXN5_C
PCIE_RXP5_C

0.1U/16V_4
0.1U/16V_4

VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+

P3V3_USB30
1.0VL

100K/F_4

R659
1M_4

1
2
5
6

VDD
VDD
VSUS33
TESTEN
SMDAT
SMCLK
PEXRST#
PEXWAKE#
SMI#
JTAGTMS
JTAGTDO
JTAGTDI
VSUS33
VDD
JTAGCK
COREPWRDN#
USBHOC1#
USBHOC2#
USBHOC3#
USBHOC4#
USBHPE1#
VSUS33

ESD

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

C610
C608

1
2
3
4
5
6
7
8
9

U42

Near PCIEx Slot

VSUS33
USBHPE2#
USBHPE3#
USBHPE4#
SPISO
SPISI
SPISCLK
SPICS#
VDD
VCCA33PEXTX
PEXTX0PEXTX0+
VCCA33PEXM
PEXRX0PEXRX0+
VCCA33PEXRX
PEXCLKPEXCLK+
VCCA33REG12
PEXREXT
VCCA33REG25
VDD

VL800 / VL801 QFN88
VL800 4PORT
VL801 2PORT

U3TXDN1
U3TXDP1

For debug only.
Don't connect to
system SMBus

66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45

+3.3VAUX
1.0VL
JTAGCK
COREPWRDN
1
OVCUR1
OVCUR2
OVCUR3
OVCUR4
C662
0.1U/16V_4

OVCUR1
SMDAT

OVCUR4

Q55
PLTRST_PCIE_N_USB

0R_4

R626

C697

2

PLTRST# [3,9,23,27]

1U/6.3V_4

COREPWRDN

[34]

[9] PCH_CLK25M
SSREXT

Remove power for VL801

R627

*0R_6

C698

R628

0R_6

2

SUSON#

Q57
2N7002K

27P/50V_4

C612
Y7

Q56
AO6402A

3

ME2303T1

X'tal 25MHz

89

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

SSXI
SSXO

VDD
SSTX1+
SSTX1VCCA10SSRX1
SSRX1+
SSRX1VCCA33SS1
USBHP1+
USBHP1VCCA33SS1
SSTX2+
SSTX2VCCA10SSRX2
SSRX2+
SSRX2VCCA33SS2
USBHP2+
USBHP2VCCA33SS2
VCCA10SSM
SSXI
SSXO

A

3

+3.3VAUX
1.0VE

Copy From ZN7

1

USB20_DP1
USB20_DN1

[27] USB20_DP1
[27] USB20_DN1

R616
10K/F_4

3

+3.3VAUX

4

SSXI

+3V_SUS

C699
0.1U/10V/X7R_4

1

U3RXDP1
U3RXDN1

VSS

[27]

GND_PAD

1.0VE

TP93 TP95
TP94

+3.3VAUX
TESTEN
SMDAT
1
SMCLK
1
PLTRST_PCIE_N_USB
PCIE_WAKE#
USB30_SMI#
1
1
1

1.0VL

+3.3VAUX
U3TXDP1
U3TXDN1

HOLD#

WP#

EN25F05-100GIP

OVCUR2

VSUSUSB
SSREXT
VCCA33SSM
SSTX3+
SSTX3VCCA10SSRX3
SSRX3+
SSRX3VCCA33SS3
USBHP3+
USBHP3VCCA33SS3
GND
SSTX4+
SSTX4VCCA10SSRX4
SSRX4+
SSRX4VCCA33SS4
USBHP4+
USBHP4VCCA33SS4

1.0VE
+3.3VAUX

28

8
7

4

1
TESTEN

SSREXT

PEXREXT

67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88

1.0VL

0R_4
0R_4

10K/F_4

R623
3.01K/F_4

C608, C610 need
close to pin8, 9 of CN23

VDD

+3.3VAUX

TP90

TP91
TP92

R622
6.04K/F_4

CE#
SCK
SI
SO

JTAGCK

PCIE_WAKE#

U41

R624
R625

*10K/F_4

R621
4.7K_4

1
6
5
2
3

USB30_SMI#
[7,23,27]

B

*10K/F_4

PCIE_WAKE#

EC_EXT_SMI#

A

USB30_RX1+
USB30_RX1-

+3.3VAUX

2
ME2N7002E

[10,32]

R614

8

*0.1U/50V/X7R_6

PLTRST#

R613

7

U40
SPICS#
SPISCLK
SPISI
SPISO

3

+3.3VAUX

R643

SPI Flash ROM

R612

USB30_SMI#

EC-B-02

6

P3V3_USB30

1

1

XTL-5_3X3_2-3_8-1_2H

For USB3.0

C

+5V_S5
U43
G9661-25ADJF12U

C614
1U/6.3V_4
[9,24,32,34,35,36,38,40,41]
[32,34,36]

For USB3.0

MAINON

R629

*10K/F_6

SUSON

R630

10K/F_6

1

+1.5V_SUS

4

VPP PGOOD
VEN

VO

NC

P1V05_SUS

5

R1

7

VIN
GND
GND

0.6A

1
6

P1V05_SUS

1.0V
From M/B

R2
+3.3VAUX
C645

C646

C647

C640

C641

C642

C643

C644

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

+3.3VAUX

C639

0.1U/16V_4

C638

0.1U/16V_4

C637

0.1U/16V_4

C636

0.1U/16V_4

0.1U/16V_4

C635

0.1U/16V_4

0.1U/16V_4

P3V3_USB30

C634

0.1U/16V_4

C633

0.1U/16V_4

C632

0.1U/16V_4

C631
0.1U/16V_4

+3.3V

C630
0.1U/16V_4

Power sequence for Host.

C629
0.1U/16V_4

D

+3.3VSUS

1.0VL

C648
4.7uF/6.3V_6

0.1U/16V_4

BLM18PG300SN1D

R632
33K/F_6

Vout =0.8(1+R1/R2)

1.0VL

BLM18PG300SN1D
L37

0.1U/16V_4

4.7uF/6.3V_6

BLM18PG300SN1D
P/N:CX11P300000

4.7uF/6.3V_6

C628

1.0VE
L36

0.1U/16V_4

C627

L35

0.1U/50V_6

10U/6.3V_8

For +1.05_SUS (Power for wake up)

R631
10K/F_6

0.8V

C624
0.1U/50V_6

3
8
9

C623
10U/6.3V_8

C626

Remove SUSD turn on switch (From PCU to SUS)
(Used +3V_S5 power plane)

2

2

C625

C622
0.1U/16V_4

4.7uF/6.3V_6

C621

ADJ

1.0VE

1.0VE

P3V3_USB30

4.7uF/6.3V_6

C619

Power circuit (+1.05_SUS)

L33
BLM18PG300SN1D
C620
0.1U/16V_4

C618
0.1U/16V_4

0.1U/16V_4

4.7uF/6.3V_6

C617

SSXO

Crystal foot print must be reserved
in case 25MHz clock from clock
generator is not stable enough.

+3V
From M/B

4.7uF/6.3V_6

C615

+3.3VAUX

C613

BG625000486

For +3V_RUN

L34
BLM18PG300SN1D
C616

+3.3VAUX

From M/B

+3.3VAUX

+3V_SUS

+3.3VAUX

For +3V_S5 (Power for wake up)

+3.3VAUX

+3.3VAUX

C

2

25MHz/20pF/30ppm
27P/50V_4

D

1.0VE

Reset
C649

C650

C651

C652

C653

C654

C655

C656

C657

C658

C659

C660

C661

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

+1.0V

5~20ms

PROJECT KL5A

Quanta Computer Inc.

50~450ms

1

2

3

4

5

6

7

Size
C

Document Number

Date:

Friday, October 29, 2010

Rev
1A

USB3.0 *1
Sheet

28
8

of

45

1

2

3

4

5

6

7

8

FAN CONTROL

29
+5V
R587

NOTE:
Place C625 near Q37
Q41
SST3904T116

1

Q51
SST3904T116

R93

C584

C423

2

+5V_FAN

*Short_8@NC

NOTE:
Place C624 near U48

NOTE:
Place C623 near Q38

C583

2.05K_4

A

C580

1U/10V/X5R_6

0.1U/10V/X5R_4

3

A

C73

2
*100P/50V/X7R_4
1

3

*100P/50V/X7R_4

DDR3

2200P/50V/X7R_4

WLAN-ONFI

+3V
+5V

R94
6.8K/F_4

U7
EMC2103-2

14

R95
10K_4

13
SHDN_SEL

15
DN2/DP3

R86
10K_4

GND

12

PWM

11

TACH

10

+5V_FAN
FAN_PWM
FANSIG

D8
RB500V-40
2

SMCLK

9

1
Q11

3
ME2N7002E

R430

*Short_4@NC

R431

*Short_4@NC

2
RV9

C

MB_CLK1 [9,18,32]

SLID_CLK [31]
SLID_DATA [31]

3
Q9
ME2N7002E

+3V

1

C690

C691

5
6

B

FAN_CON

+3V

1

NOTE:
Place C626 near U48

1
2
3
4

+3V

2

C67
0.1U/10V/X5R_4

R90
10K_4

SMDATA

GPIO1

R76
10K_4

8

VDD

4

SYS_SHDN#

+3V_FAN

7

22_4

ALERT#

R84

GPIO2

+3V

R67
10K_4

CN17

DP

3

R66
10K_4

*100P/50V/X7R_4

3

2

CPU

R65
10K_4

*100P/50V/X7R_4

Q49
SST3904T116

2200P/50V/X7R_4

5

*100P/50V/X7R_4

DN

6

1

TRIP_SET

C70

2

DP2/DN3

17
T_PAD

1

C539

B

16

NOTE:
Place C627 near Q39

3
Q8
ME2N7002E

MB_DATA1 [9,18,32]

SYS_SHDN# [37,42]

2
D7

1

C

VGA_OVT# [18,32]

*EGA-0402

*DIS@RB500V-40

MB_ALRET#

R64

*0_4

TEMP_ALERT# [10,32]

D

D

PROJECT KL5A

Quanta Computer Inc.

1

2

3

4

5

6

Size
B

Document Number

Date:

Friday, October 29, 2010

Rev
1A

FAN /THERMAL
7

Sheet

29

of
8

45

5

4

3

2

1

30

KB-CON(85201-24051)

26

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

For EMI request
+3VPCU

C

MY11
MY10
MY9
MY8

CA4
*220PX4
1
2
3
4
5
6
7
8

CA1
*220PX4
7
8
5
6
3
4
1
2

MX7
MX6
MX5
MX4

MY7
MY6
MY5
MY4

CA5
*220PX4
1
2
3
4
5
6
7
8

CA2
*220PX4
1
2
3
4
5
6
7
8

MX0
MX1
MX2
MX3

MY3
MY2
MY1
MY0

CA6
*220PX4
1
2
3
4
5
6
7
8

CA3
*220PX4
2
1
4
3
6
5
8
7

MY15
MY14
MY13
MY12

RP1
MY11
MY12
MY13
MY14

10
9
8
7
6

1
2
3
4
5

MY3
MY6
MY10
MY15

*10KX8
RP2
MY4
MY5
MY7
MY8

10
9
8
7
6

1
2
3
4
5

MY2
MY1
MY0
MY9

*10KX8

25

D

MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15

MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15

25

CN5
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]

26

KEYBOARD

D

Touch pad

C

CN2

[32]
[32]

4
3
2
1

TPDATA
TPCLK

*Short_8_NC

C265
0.1U/10V/X5R_4

L11

EGA-0402

EGA-0402

+5V

RV29

RV30

B

TOUCH_PAD

+5V_TP

C266
0.1U/10V/X5R_4

C264

B

0.1U/10V/X5R_4

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

K/B, T/P

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

30

of

45

5

4

3

2

1

31

VGA UMA/DIS SWITCH

+3V_S5

+3V_S5

4
5

R36
100K_4

R380
100K_4

1

[32] VGA_SWITCH#

RF ON/OFF SWITCH

3
DIS@VGA_SWITCH

[32]

RF_SW#

RF_SW#

1

3
2

D

2

SW2
SW1
C20
DIS@0.1U/10V/X5R_4

C363
0.1U/10V/X5R_4

RF_SLIDE_SWITCH

D

LED1
DIS_BULE_LED#

R6

DIS@100_6

DIS_BULE_LED#_R

1

2

VGA

+3V

3

DIS@RIGHT-ANGLE-WHITE_LED

2
Q1
DIS@PDTC144EU

CAPACITANNCE BUTTON BOARD
1

[9] DIS_BULE_LED

20 mils

R478

100_6 RF_ON#_R

1

2

+3V
[29] SLID_CLK
[29] SLID_DATA
+3V
+5V
[32] MMB_SM_INT#

RIGHT-ANGLE-WHITE_LED

3

RF

2

RF_ON

R339
R344
R362

6
5
4
3
2
1

PBY160808T-601Y-N_6
PBY160808T-601Y-N_6
*0_4

1

8

[9]

7

LED4
RF_ON#

*EGA-0402

AMBER

RV12

3

Battery

C2

1

A

+3V_S5

C1
RIGHT-ANGLE-LED

POWER BOARD

Power/suspend LED

C302

LED3
PWR_WHITE#

100_6

PWR_WHITE#_R

3

R490

1

[32] NBSWON#
[32] NOVO_BTN#
[22,32] LID551#

RIGHT-ANGLE-WHITE_LED

1

HDD
NUMLED#
CAPSLED#

[8]
[32]
[32]

PWR_WHITE#

SATA_ACT#
NUMLED#
CAPSLED#

11
12

C433

C297

C439

C440

C295

C435

C428

C438

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

*EGA-0402

Connector-FPC/FFC
B

1
2
3
4

5
6

USB_CON

A

CN15
R428

*Short_6@NC

*EGA-0402

*EGA-0402

C695 0.1U/10V/X5R_4

RV27

+3V

FOR ESD

USBP2-_R
USBP2+_R

1
2
3
4

5
6

CCD_CON

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

4

3

Rev
1A

B TO B CON/LED

Date:
5

11
12

CCD BOARD

USBP2-_R
USBP2+_R
RV26

CL-2M2012-900JT

*EGA-0402

2
3

RV32

1
4

USBP2USBP2+

*EGA-0402

[9]
[9]

USBP9-_R
USBP9+_R

0.1U/10V/X5R_4

*EGA-0402

*EGA-0402

L32
A

1
2
3
4
5
6
7
8
9
10

CN8
USB2PWR
C694

RV14

RV15

CL-2M2012-900JT

RV28

USB BOARD
Right

USBP9+_R
USBP9-_R

2
3

RV33

CML3

1
4

USBP9+
USBP9-

CN4

1
2
3
4
5
6
7
8
9
10

+3VPCU

B

[9]
[9]

0.1U/10V/X5R_4

*Short_6@NC

+3VPCU

2

Q44
PDTC144EU

R274

+3V

2

EC-A3-02
[32] PWR_WHITE

Slide bar 2.0 CONN

C

*EGA-0402

2

WHITE

10P/50V/COG_4

BATLED_AMBER_LED#_R

RV31

BATLED_GREEN_LED#_R

100_6

10P/50V/COG_4

100_6

R475

C335

[32] BATLED_AMBER_LED#

R472

BATLED_AMBER_LED#

C334

LED5
BATLED_GREEN_LED#

CN6

+3V

RIGHT-ANGLE-WHITE_LED

[32] BATLED_GREEN_LED#

0.1U/10V/X5R_4

2

C327

1

C

0.1U/10V/X5R_4

TP_LED#

100_6 TP_LED#_R

C693

[32]

R325

*10P/50V/COG_4

TP LED

LED2
TP_LED#

C692

reserve for EC

Q43
PDTC144EU

2

Friday, October 29, 2010

Sheet
1

31

of

45

5

+3.3V_EC

4

+3VPCU

RTC_VCC

2

1

32

+3V_RTC
R372

R351

3

*0_4

R371

+3VPCU

*Short_8@NC

IT8512_AVCC
0_4

C324

C323

1000P/16V/X7R_4

1U/6.3V/X5R_4

L21

BK1608HS121-T

+3VPCU

L23

BK1608HS121-T

+3VPCU

C339

MB_CLK1
MB_DATA1
MBCLK
MBDATA
BATLED_AMBER_LED#
BATLED_GREEN_LED#
BL/C#
BAYSWAP#

(For PLL Power)

0.1U/10V/X5R_4
L20

D

BK1608HS121-T

Layout Note:
Place all capacitors close to IT8512.

C328

C431

C349

C330

C329

C332

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

TEMP_BBAT

IT8512_VSTBY

D19
*DIS@RB500V-40
2
1

RV34
*EGA-0402

CLKRUN#

D23
D22

RB500V-40
RB500V-40

D21

126
5
15
23
14
4
16

RB500V-40

+3.3V_EC

R361
10K_4

DAC4/DCD0#/GPJ4(X)
DSR0#/GPG6(X)
GINT/CTS0#/GPD5(Up)
PS2DAT1/RTS0#/GPF3(Up)
DAC5/RIG0#/GPJ5(X)
PS2CLK1/DTR0#/GPF2(Up)
TXD/SOUT0/GPB1(Up)
RXD/SIN0/GPB0(Up)

71
72
73
35
34
107
95
94

ADC5/DCD1#/WUI29/GPI5(X)
ADC6/DSR1#/WUI30/GPI6(X) UART port
ADC7/CTS1#/WUI31/GPI7(X)
RTS1#/WUI5/GPE5(Dn)
PWM7/RIG1#/GPA7(Up)
DTR1#/SBUSY/GPG1/ID7(Dn)
CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)

8512_SCK
8512_SCE#
8512_SI
8512_SO

105
101
102
103

FSCK
FSCE#
FMOSI
FMISO

BAYSWAP#
BOARD_ID
USB_CHARGE_ON

56
57
32

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

Borad ID
+3VPCU

MY[0..15]

[30]

MX[0..7]

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55

R337
DIS@10K_4

43/J_4

0.1U/10V/X5R_4

COLOR_ENGINE
DCR
[22]

R432

R434

MBCLK
[35]
MBDATA [35]
MB_CLK1 [9,18,29]
MB_DATA1 [9,18,29]
EC_PECI [3]
VOLMUTE# [24]

16Mbit (2M Byte), SPI

24
25
28
29
30
31

[22]

TPCLK
TPDATA

KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15

Winbond
SST
MX

[30]
[30]

AKE38ZP0N00
AKE28FP0K07
AKE37FP0Z13

R343
10K_4

R350
10K_4

TACH0A/GPD6(Dn)
TACH1A/TMA1/GPD7(Dn)

47
48

R656

8512_SCE#
8512_SCK
8512_SI
8512_SO

ITE suggestion

*0_4

PWR_WHITE [31]
SUS_PWR_ACK [7]

H_PROCHOT#_EC
APS_LED#
GSENSOR_ON#

TP46
TP45
PCBEEP_AD [24]

R348
R342
R352

47_4
47_4
15_4

8512_SCK1
8512_SI1
8512_SO1

1
6
5
2

CE#
SCK
SI
SO

HOLD#

7

3

WP#

VSS

4

VDD

8
C331
0.1U/10V/X5R_4

MX25L1605A

Reserved for leakage current

PWM

TMRI0/WUI2/GPC4(Dn)
TMRI1/WUI3/GPC6(Dn)

120
124

PWRSW/GPE4(Up)
RI1#/WUI0/GPD0(Up)
RI2#/WUI1/GPD1(Up)

125
18
21

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)

112

WAKE UP

LAN_ISOLATEB [23]
VRON
[42]
ADIN#
HWPG

HWPG

NBSWON#

[35]
[10,36,37,38,40,41,42]

H_PROCHOT#_Q

NBSWON# [31]
SIO_SLP_S3# [7]
ACIN
[35]

R373

*Short_4_NC

H_PROCHOT# [3,42]

B

SUSON

[28,34,36]
H_PROCHOT#_EC

2
R368
100K/J_4

ADC0/GPI0(X)
ADC1/GPI1(X)
ADC2/GPI2(X)
ADC3/GPI3(X)
ADC4/WUI28/GPI4(X)

KSO16/SMOSI/GPC3(Dn)
KSO17/SMISO/GPC5(Dn)
PWM6/SSCK/GPA6(Up)
SSCE0#/GPG2(X)
SSCE1#/GPG0(X)

C

+3VPCU

EXTERNAL SERIAL FLASH
66
67
68
69
70

Q36
ME2N7002E

TEMP_MBAT [35]
TP41
AD_ID
[35]
TP40
TP38

TEMP_BBAT
GSENSOR_Z_R
GSENSOR_X_R

A/D D/A

SPI ENABLE

TACH2/GPJ0(X)
GPJ1(X)
DAC2/TACH0B/GPJ2(X)
DAC3/TACH1B/GPJ3(X)

AB_CHARGING

76
77
78
79

TP49
AC_PRESENT [7]
BL/C#
[35]
S5_ON
[34]

KBMX

58
59
60
61
62
63
64
65

[30]

100
106

R354

TPCLK
TPDATA

CLOCK

CK32KE
CK32K

IT8512_CK32KE

2
128
IT8512_CK32K

BATT_SEL

PWM0/GPA0(Up)
PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
PWM5/GPA5(Up)

VCORE

0_4

VSS
VSS
VSS
VSS
VSS

R657

C344

0.1U/10V/X5R_4

3

80
104
33
88
81
87
109
108

GSENSOR_Y_R

85
86
89
90

12

DNBSWON_R

*Short_4_NC

AVSS

RB500V-40

27
49
91
113
122

TP44

TP42

R324

NOVO_BTN#
C333

U20

IT8518
IT8519

VSS

*10K_4

[31] MMB_SM_INT#

A

D18

CIR

1

*EGA-0402
+3V

TP39
[42] VCORE_IMON_EC
[42] VGT_IMON_EC
[31] NOVO_BTN#
[31] VGA_SWITCH#
[31] PWR_WHITE
[7] PM_SLP_S4#
[31]
TP_LED#

R335

POWER SWITCH/
NOVO BUTTON

10K_4

SM BUS

PS2CLK0/TMB0/GPF0(Up)
PS2DAT0/TMB1/GPF1(Up)
PS2CLK2/WUI20/GPF4(Up)
PS2DAT2/WUI21/GPF5(Up)

MBCLK
MBDATA
MB_CLK1
MB_DATA1
EC_PECI_R

110
111
115
116
117
118

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

RV13

B

TP101
[9,25] ODD_MDDA#
TP102
[31] BATLED_AMBER_LED#
[31] BATLED_GREEN_LED#

CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn)

KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7

[7] SIO_PWRBTN#
[25,27]
USB_ON
RSMRST#

10K_4

+3VPCU

GPIO

75

119
123

[35]
D/C#
[34] LAN_POWER

R358

99
98
97
96
93

19
20

127

GA20/GPB5(X)
SERIRQ/GPM6(X)
ECSMI#/GPD4(Up)
ECSCI#/GPD3(Up) LPC
WRST#
KBRST#/GPB6(X)
PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)

84
83
82

3
74
VBAT
AVCC

VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

LPCPD#/WUI6/GPE6(Dn)

0.1U/10V/X5R_4

[7]

PCH_SPI_SI [8]
PCH_SPI_SO [8]
PCH_SPI_CLK [8]
PCH_SPI_CS0# [8]

[7]

SMCLK0/GPB3(X)
SMDAT0/GPB4(X)
SMCLK1/GPC1(X)
SMDAT1/GPC2(X)
PECI/SMCLK2/WUI22/GPF6(Up)
SMDAT2/WUI23/GPF7(Up)

PS/2

RB500V-40

HMOSI/GPH6/ID6(Dn)
HMISO/GPH5/ID5(Dn)
HSCK/GPH4/ID4(Dn)
HSCE#/WUI19/GPH3/ID3(Dn)
CLKRUN#/WUI16/GPH0/ID0(Dn)

D20

LAD0/GPM0(X)
LAD1/GPM1(X)
LAD2/GPM2(X)
LAD3/GPM3(X)
LPCRST#/WUI4/GPD2(Up)
LPCCLK/GPM4(X)
LFRAME#/GPM5(X)

L80HLAT/BAO/WUI24/GPE0(Dn)
L80LLAT/WUI7/GPE7(Up)

17

MAINON

[10] EC_A20GATE
[8,27] IRQ_SERIRQ
[10,28] EC_EXT_SMI#
[10] EC_EXT_SCI#
[10] EC_RCIN#
[31] CAPSLED#

C348

*0_4
*0_4
*0_4
*0_4

HWPG

+5V

EGCLK/WUI27/GPE3(Dn)
EGCS#/WUI26/GPE2(Dn)
EGAD/WUI25/GPE1(Dn)

CLK_PCI_8512

D

1

WRST_8512#

R336
R333
R330
R327

*DIS@0_4

NBSWON#

10
9
8
7
22
13
6

10K_4

R359
10K_4

C347

VSTBY

*15P/50V/NPO_4

+3.3V_EC

[8,27] LPC_LFRAME#

R369
470K_4

HMOSI
HMISO
HSCK
HSCE#

HMOSI
HMISO
HSCK
HSCE#

RTC_VCC

11
26
50
92
114
121

C351

+3V

U21 IT8518

[9,24,28,34,35,36,38,40,41]

[25]

0.1U/10V/X5R_4

[8,27] LPC_LAD0
[8,27] LPC_LAD1
[8,27] LPC_LAD2
[8,27] LPC_LAD3
[22,31] LID551#
+3VPCU

[31]

ODD_EN

EC_PWROK [7]

EMI suggestion:
Add a 15p bypass CAP on CLK_PCI_8512

C

RF_SW#

NUMLED# [31]

CLK_PCI_8512

Layout Note:
net "3VPCU" and "RTC_VCC"
minimum trace width 12mils.

R329

+3V
R597

[42] GFX_PWRGD

RF_SW#

[9] CLK_PCI_8512

4.7K_4
4.7K_4
2.2K_4
2.2K_4
*10K_4
*10K_4
*10K_4
10K_4

VGA_OVT# [18,29]
TEMP_ALERT# [10,29]

10K_4

+3.3V_EC

R353
R355
R349
R345
R346
R341
R320
R347

R367

BOARD_ID

Y5

1

4

2

3

C345

A

C346
*32.768KHZ

*18P/50V/COG_4
R338
*UMA@10K_4

*18P/50V/COG_4

0/J_4
C352

C350

*1U/6.3V/X5R_4

0.1U/10V/X5R_4

PROJECT KL5A

Quanta Computer Inc.

DIS =>R337
UMA=>R338

Size
Document Number
Custom

Rev
1A

KBC IT8518

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

32

of

45

5

4

3

Screw for ME
HOLE11

HOLE10

C142D102N

C142D102N

WLAN
D

2

1

33

EMI

CPU BKT

VIN

+VCC_GFX

EC3 1

2 0.1U/50V/X7R_6

EC5 1

2 0.1U/50V/X7R_6

4

EC8 1

2 0.1U/50V/X7R_6

EC22

2200P/50V/X7R_4

3

EC18
1

2 0.1U/50V/X7R_6

EC23

0.1U/25V/X5R_4

2

EC13
1

2 0.1U/50V/X7R_6

EC12
1

2 0.1U/50V/X7R_6

EC15
1

2 0.1U/50V/X7R_6

EC14
1

2 0.1U/50V/X7R_6

EC11
1

2 0.1U/50V/X7R_6

BKT1

cpu-bracket

SMT GUIDE
SMT NUT

H=4mm
H=4mm

1

1

1

(PTH)

PN: MBIM3001010
PN: MBIM3002010

D

non-connect GND for ESD
HOLE13

HOLE12

C41D2N

Pad for Layout mask

DIS@C41D2N
PAD3

*PAD4

*PAD5

PAD5

1

ESD

PAD6

*PAD6

2 0.1U/50V/X7R_6

EC21 1

2 0.1U/50V/X7R_6

*PAD7

+VCC_CORE

EC-B-10

VIN

+1.5V_SUS

VIN

HOLE4
*C41D2N

1
2

GFX_CORE

SC1

1

7
8
9

0.1U/25V/X5R_4
0.1U/25V/X5R_4
0.1U/25V/X5R_4

SC14

SC26
SC27

0.1U/25V/X5R_4
0.1U/25V/X5R_4

GFX_CORE

*0.1U/10V_4

+1.5V_GPU

*holes_p_r276d118

*holes_p_r276d118

*holes_p_r276d118

*0.1U/10V_4

SC6
SC7
SC8
SC10
SC12

3
4
5
6

1
2

3
4
5
6

1
2

B

+1.05V_PCH
SC2
SC13
SC17
SC18

1

7
8
9

*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4

+1.5V_SUS

HOLE9

7
8
9

+1.05V_PCH

*holes_p_r276d118
*C41D2N

HOLE2

0.1U/25V/X5R_4
0.1U/25V/X5R_4

+0.85V

HOLE3

B

+5V_S5

+1.5V_GPU

SC21
SC22
+1.5V_SUS

C

*0.1U/25V/X5R_4
*0.1U/25V/X5R_4

*0.1U/25V/X5R_4

3
4
5
6

1
2

3
4
5
6

1
2

7
8
9

HOLE6
*C41D2N

HOLE7

3
4
5
6

7
8
9

HOLE1

1

HOLE5

VIN
SC24
SC25

VIN

HOLE8

3
4
5
6

EC20 1

SC4
SC5
SC23

圓圓圓圓(8個
個個個圓)*7 for ESD

1
2

VIN

SC19

ME-other holes

7
8
9

VIN

PAD7

1

PAD4

*PAD3

1

*PAD2

1

PN: MBKL6001010

1

H=5.1mm

1

*PAD1

C

SMT NUT

PAD2

1

1

PAD1

1

VGA

Connect to AGND
for ESD

+0.85V

*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4

SC3

*0.1U/10V_4

SC9
SC15
SC16

*0.1U/10V_4
*0.1U/10V_4
*0.1U/10V_4

NPTH
*holes_p_r276d118

*holes_p_r276d118

+1.05V_PCH

AGND

+1.5V_SUS

+VCC_CORE
SC20

SC11

VIN

*0.1U/10V_4

+5V

*0.1U/10V_4
SC28

*0.1U/25V/X5R_4

A

A

PROJECT KL5A

Quanta Computer Inc.

5

4

3

2

Size
B

Document Number

Date:

Friday, October 29, 2010

Rev
1A

Screw hole/EMI/ESD
Sheet
1

33

of

45

5

4

3

2

1

34

DISCHARGE
+3V, +5V,1.5V
+3VPCU

+5VPCU

+1.5V_SUS

D

+15V
+1.8V

+0.85V

+1.5V

3

3

3

PR179
22_8

PQ55
PDTC144EU

2

2

1

1

ME2N7002E

MAINON

1

[9,24,28,32,35,36,38,40,41]

2

PQ58

2

ME2N7002E

PC202
0.1U/10V/X7R_4

PQ61

2

1

PC200
0.1U/10V/X7R_4

PQ57

2

3

PC81
10U/6.3V_6

+5V

PR176
22_8

ME2N7002E

PQ54

+3V

PR177
22_8

3

3

PR174
22_8

1

1.7A

PR171
22_8

+1.5V

ME2N7002E

2.9A

PQ32
AO6402A

PQ67
2N7002K

[3,5] MAINON#

+0.75V_DDR_VTT

PQ62
ME2N7002E

1

MAINON#

+1.05V_PCH

PR170
100K/F_4

0.5A

3

1
2
3

1

1

1

PC199

2

1

1

MAINON 2

ME2N7002E

ME2N7002E

3

PR184
*1M_4

2

PQ66
2

PC195
0.1U/10V/X7R_4

4

2200P/50V/X7R_4

3

MAINON_15V

PQ68
2

PC194
0.1U/10V/X7R_4
1
2
3

PQ73
AO4496(30V/10A)

5
6
7
8

PR182
22_8
3

PR186
22_8

+5VPCU

PC76
10U/6.3V/X5R_8

4

3

PR185
100K/F_4

PQ65
PDTC144EU

PQ75
AO4496(30V/10A)

PR183
1M_4

1
2
5
6

+3V

4

+5V

5
6
7
8

+5VPCU

D

[5] MAINON_15V

C

C

LANVCC
3V_S5, 5V_S5

+5VPCU

+5VPCU
PR38
1M_4

3

LAN_ON

PQ76
AO4496(30V/10A)

4

LAN_ON [23]

2

1

[32] LAN_POWER

PQ15
PDTC144EU

1

2

1

3.8A
+5V_S5

PC198
0.1U/10V/X7R_4

B

PQ9
ME2N7002E

1
2
3
*0.1U/50V/X7R_6

4

+3V_S5

2

3

PC197

0.6A

PR33
22_8
3

5
6
7
8

6
5
2
1

PR37
100K/F_4
PQ74
AO6402A

+15V

LANVCC

3

+3VPCU

B-00

PQ14
2N7002K

PC201
0.1U/10V/X7R_4

B

GFX_CORE
+15V
+5VPCU

+1.5V_SUS

+5V_S5

+3V_S5

+5VPCU

+5VPCU

PR214
1M_4

3

3

PQ38
*DIS@ME2N7002E

2
3

2

1

ME2N7002E

1

3

2

+3V_GPU

PQ40
*DIS@PDTC144EU
1

[28,32,36] SUSON

PQ24
PDTC144EU

1

1

PQ79
PDTC144EU

1

1
2

*DIS@100K/F_4

2
PQ80
ME2N7002E

2

1

S5_ON

PR87

PQ25

PQ77
ME2N7002E
2

3

PR213
*1M_4

PR51
100K/F_4

3

PR217
22_8
3

3

PR216
22_8

PQ78
2N7002K
2

[32]

PR96
*DIS@22_8

PR50
22_8

PR215
100K/F_4

SUSON# [28]

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Discharge

Date:

5

4

3

2

Sheet

Friday, October 29, 2010

1

34

of

45

5

4

3

2

1

35

VA1

8
7
6
5

PR165
*1K_4

PQ85
*IMD2

B-00

4

1

3

2

PQ83
AOD425 1

PC154
0.47U/25V/X7R_8

1

6

PQ53
UMT1NGTN

PQ52
*MMBT3904LT1G

1

PR169
1.54K_6

AD_D

2

AD_D
PR164
220K/F_4

VA

6

5

D

2

PR168
1M_4

4

5

4

1

2

3

PD17
P4SMAJ20A

3

VA1

ADPIN-

LTA043EUBFS8TL
3

2

PR175
1K/J_6

PR163
1M/J_4

2

D

1

3

PC166
0.1U/50V/X7R_6

PC168
0.1U/50V/X7R_6

PQ51

PR167
220K/F_4
2

1

PJ1

1

EL7
UPB201212T-800Y-N

1
2
3
4

2

ADPIN+

5
4
3
2
1

PQ56
SI4825DDY-T1

VA

PF2
TR/3216FF7-R
1
2

1

EL6
UPB201212T-800Y-N

DC-IN

PD18

88731CSSP

Place these CAPs
close to FETs

PR160
0.01_1W_3720
1
2

VIN

88731LDO
1

1

3
2
1
5

2

1

3

2

2

1

2200P/50V/X7R_4

1
2

2

10U/25V/X6S_12

10U/25V/X6S_12

0.1U/50V/X7R_6

1

2

5

1
2
PD15
1SS355VM

+3VPCU

3

1

VIN

PR181
100_4

+3VPCU

PC141
0.1U/50V/X7R_6

1

+

3

-

PR143
10/F_6

PR218
332K/F_4

PC148
*0.1U/10V/X7R_4

PQ82
2N7002K
1

4

2

88731CSOP
PC145
0.01U/25V/X7R_4

PD16
1SS355VM
1
2

D/C# 2

D/C#
PR222
10K/F_4

5

1
PR141
10/F_6

16

[32]

+5VPCU

PR219
475K/F_4

2

PC203
1000P/50V/X7R_4

PU10
G1331T11U

PR221
*0_4

PR220
10K/F_4

PC204
*1000P/50V/X7R_4

1

PC161

2

2

1

PC162
+

2

BL/C# [32]
B

PQ81
2N7002K

Battery Low 7.5V
1

0.01U/25V/X7R_4

PC138
*1U/10V/X5R_6

PC140

EC10
1500P/50V/X7R_4

PC209
+

3

VREF

BAT-V

15

88731CSON
PC142
*0.01U/25V/X7R_4

B

VFB

PQ43
MDV1660URH

4
PR147
100/F_4

NC
ICOMP

88731REF
PC149
0.01U/25V/X7R_4

0.01U/25V/X7R_4

PR151
*8.45K/F_4

3

17

GND

4

NC

PR144
4.75K/F_4
PC151

NC

PU5
ISL88731A

BAT-V
PC146
+

ER7
2.2_8

18

VCOMP

7

5

19

12

6

PR230
0.02_1W_3720
1
2

1

CSOP
CSON

PL4
CHOKE_6.8UH/4.5A(7*7*3)

0.1U/50V/X7R_6

PGND

ICM

88731DLO

2

8

LGATE

88731LX

10U/25V/X6S_12

PR150 *0_4_short
88731_IINP

AD_ID

SCL
SDA
NC

88731DHI

23
20

1

10
9
14

10U/25V/X6S_12

PR152 *0_4_short

[32]

PHASE

PR153 *0_4_short
MBCLK
MBDATA

2

PC147
0.1U/10V/X7R_4

26
24

10U/25V/X6S_12

UGATE

1

VCC
VDDSMB

PC124
1U/10V/X5R_4

21

2

PQ44
MDV1660URH

4

2

ACOK

PQ64
2N7002K

PR180
100K/F_4
ACOK

PR139
4.7/F_6

2P

VDDP

C

25

1P

11

88731LDO

BOOT

PR233
10/F_6

88731CSSP

PQ84
AOL1413

1

ACIN=17.5V
+3VPCU

PC120
0.1U/50V/X7R_6

2

13

PR232
10/F_6

PC125
0.1U/50V/X7R_6

2

ACIN

PR154
100K/F_4

1

AC_OK

PC130
1U/10V/X5R_4

VIN

3
2
1

2

PC132
0.01U/25V/X7R_4

PD24
SSM34PT
4

88731CSSN

5

88731_ACIN

DCIN

C-00

PC220

3
2
1

22

PC109
+

27

1

PR135
49.9K/F_4

2

1

PR225
1M_4

PC107
+

88731BST
PR133
221K/F_4

C

PD12
1SS355VM

PR127
2.2/F_6

ACOK#

CSSN

1

28

2

PC221

PD6
*1SS355VM

VA

1

2

PC214
0.1U/50V/X7R_6

GND

PQ60
2N7002K

PC167
1U/25V/X7R_8

PC213
0.1U/50V/X7R_6

CSSP

3

1

PC127
1U/25V/X7R_8

2

PR130
10/F_6

2

1

PR224
15K/F_4
88731_ACIN

PR155
200K/F_4

1P

C-00

PQ59

ACIN

2N7002K

[32]

88731CSSN

PR178
47K_4

3

2

PQ63
PDTA124EU

2P

88731LDO

1

1

3

PD20
PD19
*1SS355VM 1SS355VM

1

ACOK
PR223
10K/F_4

PC158
0.047U/50V/X7R_6

1
*1SS355VM

2

2

MAINON

2

[9,24,28,32,34,36,38,40,41]

PR231
*SHORT-1A

GND_CHG
BAT-V

PC163
0.1U/25V/X5R_4
EL5
UPB201212T-800Y-N

VA

+5V

PC207
0.1U/10V/X7R_4

PR173
200/F_4

PR166
47K_4

[32] MBDATA
[32] MBCLK

3

PU8
LM431SACMF

PC165

PC164

1
2

2
2

SCLK
SDATA
BT_TH
GND
GND

G1
N

N
G2

8
10

11
9

Check PN?

PD10
MMPZ5232BPT(5.6V+-5%)

1

PD11

PU7
G1331

BT+
BT+

PR227
10K/F_4

[32]

100P/50V/NPO_4

PC208
*0.1U/10V/X7R_4

A

ADIN#

MMPZ5232BPT(5.6V+-5%)

PR226
499_6

-

4

100P/50V/NPO_4

PR229
16.9K/F_4

3

+

1

1
+3V

3
4
5
6
7

+3VPCU
PR172
200/F_4

2

PC206
0.1U/50V/X7R_6

PJP14
1827654-1

1
2

VBATT

2

EL4
UPB201212T-800Y-N

+3V

5

PR228
100K/F_4

PF1
TR/3216FF10
1

TEMP_MBAT [32]
PC205
0.1U/10V/X7R_4

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

Charger (ISL88731A)

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

35

of

45

5

4

3

2

1

36

Place these CAPs
close to FETs
VIN

PR66
*0_4

VTTSNS

PR61
3

22

DDR_VBST

DRVH

21

DRVH

LL

20

DDR_LL
DRVL

GND

VBST

PC57

0.1U/50V/X7R_6

+1.5V_SUS

4

MODE

5

VTTREF

6

COMP

DRVL

19

7

NC

PGND

18

CS_GND

17

PR65
*0_4_short

S3

V5IN

DDR_V5IN

11

S5

V5FILT

14

DDR_V5FILT

12

NC

PGOOD

13

S3

S5

2

C

PC55
0.1UF/10V/X7R_4

2

PD23
1SS355VM

PC52
1U/10V/X5R_4

PU1
RT8207LGQW
HWPG

0_4

2

1

B-00

C

[10,32,37,38,40,41,42]

PR56
*0_4_short

VIN

S5

PC48

2

1

+5VPCU
PR53
*0_6_short

PC51
1U/10V/X5R_4

PR55
620K_6
PR54

PR62

PR52
5.1_6
PR60

100K/J_4

+

C-00

10K/F_4

1

1

8.87K/F_4
10

+

*220U/2.5V/ESR15_7343

DDR_CS

S3

PC50

220U/2.5V/ESR15_7343

16
15

VDDQSET

*0_4

PC234
330U/6.3V/ELEC_6344

CS

9

EC6
1500P/50V/X7R_4

PQ26
*AON6718L

*1000P/50V/X7R_4

PQ27
AON6718L

10.2K/F_4

VDDQSNS

+

4
PC60

PR57

DDR_V5FILT

PR58

2

5

ER4
2.2_8
4

1

28,32,34,35,38,40,41] MAINON

+1.5V_SUS
PC53

0.1U/10V/X7R_4

8

PR273

1

+1.5V_SUS

1
2
3

PC68
.033U/16V/X7R_4

PR59
*0_4

[3,7] SYS_PWROK

2

PL8
PCMC104T-1R0MN

1
2
3

2

PR64
*0_4_short

EC-B-09

D

1

[5,13,14] SMDDR_VREF

+1.5VSUS
Fs=400K
TDC :18A(Imax)
OCP : 22A

4

2.2/F_6

C-00

PQ28
AON6428L

2

2
PC61
2.2U/10V/X5R_6

C-00

+
10U/25V/X6S_12

VLDOIN

23

10U/25V/X6S_12

24
5

VTT

VIN

PC70
+

2200P/50V/X7R_4

2

PC71

1
2
3

VTTGND

2

+0.75V_DDR_VTT

5

+0.75V_DDR_VTT

1
1

1

GND

PC72
10U/6.3V/X5R_8

D

0.1U/50V/X7R_6

25

1
PC69
10U/6.3V/X5R_8

2

PC74
*0.1U/10V/X7R_4

2

1

+0.75V_DDR_VTT
TDC : 0.6A

PC63
1

PC65

+1.5V_SUS

[28,32,34] SUSON

*SHORT-1A
DDR_COMP
*0_4_short

4
1

PC42
DIS@0.015U/50V/X7R_6

1

PC38
+

2

2

PC40

2

1

1
2

PC47
+

DIS@10U/25V/X6S_12

PQ23
DIS@ME2N7002E

PC45
+

3

2
PR49
DIS@100K/F_4

PC46
DIS@10U/25V/X6S_12

3

4

2

2

+5VPCU

1

1

1
2

PR47
DIS@1M_4

PC128
*DIS@0.1U/10V/X7R_4

PC87
*DIS@0.015U/50V/X7R_6

PR46
DIS@22_8

PC97
*DIS@0.1U/10V/X7R_4

3
2
1

*DIS@330U/2.5V/9m_3528

3

PC59
+

8
7
6
5

DIS@10U/6.3V/X5R_8

1

PC62

+1.05V_GFX_PCIE

+15V

DIS@10U/6.3V/X5R_8

PQ37
DIS@ME2N7002E

PC56
+

*DIS@330U/2.5V/9m_3528

PR86
DIS@100K/F_4

+

3.55A

DIS@AO4496(30V/10A)
PQ21

+1.05V_PCH
+1.05V_GFX_PCIE

3
2
1

DIS@10U/6.3V/X5R_8

2

PC78

8
7
6
5

DIS@10U/6.3V/X5R_8

+5VPCU

PC75

DIS@10U/25V/X6S_12

PR77
DIS@1M_4

3

PR91
DIS@22_8

+1.5V_GPU

+15V

DIS@10U/25V/X6S_12

+1.5V_GPU

B

4.7A

DIS@AO4496(30V/10A)
PQ30

+1.5V_SUS

1

B

2

PR63

1

2

1

PR249
PC54
*0.1U/10V/X7R_4

2

2

PR48
*DIS@1M_4
PQ20
DIS@ME2N7002E

1

1

PQ36
DIS@ME2N7002E

2

[9,15,39] GFXON

2
PQ22
DIS@ME2N7002E

1

PC96
DIS@1U/6.3V_4

A

1

[38,39] NVVDD_PG

MAINON

2
3

PQ35
DIS@ME2N7002E

PR89
DIS@10K_4

A

PD8
*1SS355VM

1

3

PR85
*DIS@1M_4

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

DDR3/0.75V(RT8207LGQW)

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

36

of

45

5

4

3

2

1

37
D

D

5V_AL

PR205
39K/F_4

3V5V_EN

[29,42] SYS_SHDN#
PR206
*0_4_short

1

VIN

1
2

1

1

*10P/50V/COG_4

2

10U/25V/X6S_12

2

10U/25V/X6S_12

2200P/50V/X7R_4

2
1

1
2
3

0.1U/50VX7R_6

+3VPCU
Fs=500K
TDC :8A(Imax)
OCP : 10A
+3VPCU

PR207
2.2/F_6

PR196
324K/F_4

+

AO4712(30V,11.2A)

EC16
*1500P/50V/X7R_4
PR200
*0_4_short

PR209
2.2/F_6

3
PD13
BAT54SGP

PR208
22_8

2

+15V_ALWP

1

*0_6

5V_AL

2
PR211
*200K/F_4

PR210
*39K/F_4

DDPWRGD_R

HWPG [10,32,36,38,40,41,42]

SKIP

1

PC181
0.1u/25V/X5R_4

1

B-00
PR212

1

2

+15V

1U/10V/X5R_4

1
1

2

PR198
*0_4
PR191
*SHORT-1A

PC180
PC176
0.1u/25V/X5R_4

1

PC182
0.1u/25V/X5R_4

*0_6_short
DL3

2

PD14
BAT54SGP

2

2

1

1

PR204

2

PC192

2

5V_AL

PC177
0.1u/25V/X5R_4

3

PC190

B

DL3

AO4712(30V,11.2A)
1

RF17
PC189

2

1

ER8
*2.2_8

PQ70
4

*10P/50V/COG_4

SKIP
DDPWRGD_R
3V5V_EN

OUT2

2

REFIN2

2

32
31
30
29
28
27
26
25

PC179
0.1U/50V_6

17
18
19
20
21
22
23
24

35
34
33

PC178
0.1U/50V_6

LX3

REFIN2
ILIM2
OUT2
SKIP#
POK2
EN2
UGATE2
PHASE2

BOOT1
LGATE1
PVCC
NC
GND
PGND
LGATE2
BOOT2

PU9
RT8206MGQW

PL1
2.2UH-PCMC063T-2R2MN
1
2

220U/6.3V/ELEC_6344

BYP
OUT1
FB1
ILIM1
POK1
EN1
UGATE1
PHASE1
PAD
PAD
PAD
PAD
PAD

8
7
6
5

PQ71

3
2
1

1

4

DL5

PC185

1

3
2
1

9
10
11
12
DDPWRGD_R 13
3V5V_EN
14
15
16
37
36

PR201
294K/F_4

PC186

5
6
7
8

4 DH5

LX5

DH3 4
PR193
*0_4

PR195
150K/F_4

5
6
7
8

PQ69
AO4496(30V/10A)

8
7
6
5
4
3
2
1

8
7
6
5

PQ72
AO4496(30V/10A)

2

2

EC17
*1500P/50V/X7R_4

PR192
*0_4_short

REF

ER9
*2.2_8

1

1
2

220U/6.3V/ELEC_6344

1
2

*10P/50V/COG_4

PR199
*0_4_short

2
1

REFIN2

PL2
2.2UH-PCMC063T-2R2MN
1
2

PR197
*0_4
PC191

C

0.1U/10V/X7R_4

+

+

4.7U/10V/X5R_8

4.7U/10V/X5R_8

0.1U/10V/X7R_4

B

RF18

PC174
0.1U/10V/X7R_4

LDOREFIN
LDO
VIN
NC
EN_LDO
VCC
TON
REF

1
2

2200P/50V/X7R_4

2
1

0.1U/50V/X7R_6

PR188
*0_4

1U/10V/X5R_4

PC172
1U/25V/X5S_6

PC173
0.1U/50V/X7R_6

PC187

OUT1

PC193

C-00

PR194 *0_4_short

+5VPCU

PC196

Place these CAPs
close to FETs

RF16

PC175

Place these CAPs
close to FETs

OUT1

PR189
*10/F_6

PC171
4.7U/10V/X5R_8

PR190
390K_4

+5VPCU
Fs=400K
TDC : 8A(Imax)
OCP : 10A

PC169
+

5V_AL
PR187
4.7/F_6

C

PC188

VIN
PC184

1
2
3

2

10U/25V/X6S_12

PC170
+

2

+

10U/25V/X6S_12

PC183
RF15
*10P/50V/COG_4

C-00

1

VIN

VIN

PR203
*0_4_short

PR202
*0_4_short

AGND_DC/DC

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

3V/5V (RT8206MGQW)

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

37

of

45

5

4

3

2

1

38
D

D

+1.8V
TDC : 2A
+3VPCU_1.8V

C-00

PH

11

PH

12

0_4

[10,32,36,37,40,41,42] HWPG

BOOT

14

PWRGD

VSNS

6

GND

3

GND

4

182K/F_4

SS

AGND

PR162
127K/F_4

R1

PC210

PC212

HPA00835-1.8_VFB

5

1

1200p/50V_4

PC211

C

PR161
100K/F_4

R2

0.01U/50V_4

2

1

9

RF20

PC150

PC156
2

2

*100P/50V_4

PC157

RT/CLK

+1.8V_L

PC144
2 1
2
*0_6_short
0.1U/25V_4

PR148

2

PR157

COMP

8

1

22
21
20
19
18
17

PR158
15K/F_4

7

1

2

C

*0.01U/50V_4

PC152

EN

13

1

1

[9,24,28,32,34,35,36,40,41] MAINON

VIN

15

PL3
1UH/11A-PCMD063T-1R0MN
1
2

10U/6.3V_8

10

VIN

*10P/50V/COG_4

PH

1
2

PR159

HPA00835RTER

VIN

10U/6.3V_8

PU6
16

0.1U/10V_4

PC159

PAD
PAD
PAD
PAD
PAD
PAD

PC160

0.1U/10V_4

C-00

+1.8V

10U/6.3V_8

+3VPCU

V0=0.8*(R1+R2)/R2

DIS@AO6402A
PQ19

0.3A
+1.8V

+1.8V_GPU

+1.8V_GPU

+15V
6
5
2
1

B

PC39
DIS@0.1U/10V_4

PC43
DIS@0.1U/10V_4

3

PR44
DIS@1M_4

3

PR40
DIS@22_8

B

4

+5VPCU

PC41
*DIS@2200P/50V_4

PQ16
DIS@ME2N7002E

3

PR41
DIS@100K/F_4

1

2

3

2

1

PR45
DIS@0/J_4

A

PR42
*DIS@1M_4
PQ17
DIS@ME2N7002E

A

2

[36,39] NVVDD_PG

PQ18
DIS@ME2N7002E

PROJECT KL5A

Quanta Computer Inc.

1

PC44
*DIS@0.1U/10V_4

Size
Document Number
Custom

Rev
1A

+1.8V (HPA00835RTER)

Date:
5

4

3

2

Friday, October 29, 2010

Sheet

38
1

of

45

5

4

3

2

1

39
Place these CAPs
close to FETs
VIN

1
LX

17

GFX_CORE_HDR
GFX_CORE_BST

B-00

GFX_CORE_VREF

4

VREF

RSP

1

RSN

2

GFX_CORE_RSP

2

PQ29
AON6718L
NVVDD_PG [36,38]

PR113
*0_4_short

PQ31
AON6718L

GFX_CORE_RSN

PR90
PR248
20K/F_4 10K/J_6_NTC
PR88
51.1/F_6
PC95
0.033U/50V/X7R_6

1
21

2

PR236
0_4

PC115
0.1U/25V/X5R_4

+3V
1

GNDA

GNDP

14

B-00

AGND_VGPU

1

+

PR95
681/F_4

C

Close To VGPU Discrete
Power Rail Side

PC226
1000P/50V/X7R_4
PR243
2
10_4

2

2

1

C

GFX_CORE_CSN

PC58

11

PC231

1

20

PG

PC64
+

10U/6.3V_8

CSN

TSET

10K/F_4

PC233

G1

PR119

4

10U/6.3V_8

CSP

PR97
20K/F_4

ER5
2.2_8

4

330U/2V/ESR9_7343

6

G0

GFX_CORE_LDR
GFX_CORE_CSP

330U/2V/ESR9_7343

10

GFX_CORE_TEST

13
19

EC7

GFX_CORE_G1

LDR

5

VSET2

9

1
2
3

VSET1

8

GFX_CORE_G0

5

7

GFX_CORE_VSET2

B-00
GFX_CORE

GFX_CORE_LX

1500P/50V/X7R_4

PR235
*0_4

GFX_CORE_VSET1

PU3
OZ8117

1
2
3

PC113
*0.1U/25V/X5R_4

2
PD21
*1SS355VM

ON/SKIP

GFX_CORE

C-00

0.1u/25V/X5R_4 PC232
*10P/50V/COG_4 RF21

15

2

16

BST

PL7
0.36uH/ETQP4LR36AFC

3

GFXON

1

GFX_CORE
Fs=300K
TDC : 19A(Imax)
OCP : 34A

4
HDR

PR110
0_4
[9,15,36]

C-00

PC102
0.22U/25V/X5R_6

1
2
3

VDDA

PC83

5

PR100
*0_6_short

5
VDDP

18

VIN

12

2

2

2
1

2

1

1U/10V/X5R_4

1
2

PC117
0.01U/25V/X7R_4

PC90

*10U/25V/X6S_12

PQ91
AON6428L

AGND_VGPU

VIN
D

PC229
10U/25V/X6S_12

PC110
1U/10V/X5R_4

PR105
PD22
*0_6_short
1SS355VM

PC228
0.1U/50V/X7R_6

PR240
22_6

2200P/50V/X7R_4

PR126
100K_4

PC227

+5VPCU

10U/25V/X6S_12

PC223

1

D

1

AGND_VGPU
GFX_CORE_CSP
PR237

AGND_VGPU
PR239
51/F_6

1

GFX_CORE_CSN
AGND_VGPU

*SHORT-1A

GFX_CORE

GFX_CORE_RSP

2

AGND_VGPU

PC101
22P/50V/NPO_4

GFX_CORE_CNTRL1

GFX_CORE_CNTRL0

PC105
0.01U//50V/X7R_4

+VCC_GFX_CORE

X

0

0.925V

X

0

0.925V

X

1

0.925V

X

1

0.925V

AGND_VGPU
PR238
AGND_VGPU 51/F_6
GFX_CORE_RSN

PC108
0.01U//50V/X7R_4

AGND_VGPU

B

B

GFX_CORE_VREF

B-00

1
3

PR39
*100K_4

*MMBT3904WT1G

2

1

1

AGND_VGPU

2

AGND_VGPU

AGND_VGPU

PQ88
*ME2N7002E

2

PR83
42.2K/F_4
GFX_CORE_ACT#

PR43
100K_4

PR246
11.3K/F_4

C-00

PC219
1000P/50V/X7R_4

2

1
PR78
0_4

GFX_CORE_VSET1
PC218
1000P/50V/X7R_4

2

PQ89

*MMBT3904WT1G
PQ90
*ME2N7002E

A

AGND_VGPU

1

PR244
*10K_4

1

2

[18] GFX_CORE_CNTRL1

PQ92
*ME2N7002E

PR82
80.6K/F_4

AGND_VGPU
AGND_VGPU

1

PQ87
*ME2N7002E

PC215
*1000P/50V/X7R_4

1

1
PQ86

2

PC217
1000P/50V/X7R_4

2

3

GFX_CORE_ACT

1

PR125
*10K_4

GFX_CORE_ACT

2

PR107
*0_4

1

3
2

1

GFX_CORE_ACT#

PC216
*1000P/50V/X7R_4

GFX_CORE_TEST

1

PR247
*294K/F_4
GFX_CORE_G0

3
1

2

[18] GFX_CORE_CNTRL0

PR242
*10K_4

2

PR106
*10K_4

2

2

PR80
20K/F_4
GFX_CORE_VSET2

C-00

3
2
PR118
*0_4

C-00

PR79
82.5K/F_4

1

PR117
10K/F_4

2

PR124
*10K_4

C-00

+5VPCU

3

1

+5VPCU

AGND_VGPU
A

AGND_VGPU

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

+VGPU_CORE (OZ8117)

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

39

of

45

5

4

3

2

1

40

BST

16

+0.85V_HDR

15

+0.85V_BST

4

B-00

PR129
0_4

4

G1

CSN

TSET

PG

+0.85V_CSN

VREF

RSP
RSN

PC118
0.1U/25V/X5R_4

+0.85V_RSP

2

+0.85V_RSN
PR115

21

GNDA

GNDP

PQ41
AO4712(30V,11.2A)

*10K/F_4

14

+3V
1

2

HWPG

AGND_0.85V AGND_0.85V

PR114
*0_4_short

EC19

4

11
1

PR138
100K_4

PR234
*short

PR140
60.4K/F_4

B-00

PC263

PR142
51.1/F_6

PC136
4700P/25V/X7R_4

PR137
604/F_4

[10,32,36,37,38,41,42]

PR116
*0_4_short

PC264

PC225

PC222 +

+

PC224

1

20

ER10
*2.2_8

1

+0.85V_CSP

2

CSP

2

G0

C-00

C

PC139
1000P/50V/X7R_4

2

2

19

VSET2

*22U/6.3V_8

+0.85V_VREF

+0.85V_LDR

*330U/2V/ESR9_7343

1

6

2

AGND_0.85V

10

+0.85V_TEST

13

*1500P/50V/X7R_4

2

C

+0.85V

RF23

LDR

330U/6.3V/ELEC_6344

9

PU4
OZ8117

0.1u/25V/X5R_4

8

+0.85V_G0

VSET1

10U/6.3V/X5R_6

PC114
*1000P/50V/X7R_4

+0.85V_VSET2

+0.85V_G1

1

PD5
*1SS355VM

7

B-00

*10P/50V/COG_4

+0.85V_VSET1

+0.85V_LX

17

2

PC123
*0.1U/25V/X5R_4

LX

1

2
2

1

ON/SKIP

PL5
1UH/11A-PCMD063T-1R0MN
+0.85V
1
2

5
6
7
8

1

3

1
2
3

[9,24,28,32,34,35,36,38,41] MAINON

+0.85V
Fs=300K
TDC :6A(Imax)
OCP : 8A

5
6
7
8

PQ46
AO4496(30V/10A)

1

VDDA

HDR

1
2
3

18

VDDP

D

C-00

*10P/50V/COG_4

1
5
12

VIN

PC116
0.01U/25V/X7R_4

PC134
0.22U/25V/X5R_6

2

2

2
1

1

PR121
PD7
*0_6_short
1SS355VM

AGND_0.85V
PR131
*0_6_short

PC121
RF22

2

1U/10V/X5R_4

PC119
1U/10V/X5R_4

PC122

*10U/25V/X6S_12

PR122
22_6

VIN
PC137

10U/25V/X6S_12

2

+5VPCU

0.1U/50V/X7R_6

PR120
100K_4

PC135
2200P/50V/X7R_4

1

PC133

1

VIN

D

AGND_0.85V

1

+0.85V_CSN

AGND_0.85V

PC131
22P/50V/NPO_4

PR136
10_4

2

2

AGND_0.85V

1

1

+0.85V_CSP

VCCSA_SEL

VCCUA(+0.85V)

0

0

0.9V

0

1

0.8V

AGND_0.85V
PR134
51/F_6
+0.85V_RSP

VCCUSA_SENSE

[5]

PC129
0.01U//50V/X7R_4
AGND_0.85V

PR132
51/F_6

+0.85V_RSN

B

B

PC126
0.01U//50V/X7R_4
+0.85V_VREF

+5VPCU
PR101
36K/F_4

PR112
*10K_4

2
1

3

+0.85V_VSET2
AGND_0.85V

1

PR103
28.7K/F_4

AGND_0.85V

PC106
1000P/50V/X7R_4

2

1

1

PQ42
*ME2N7002E
PQ45
*MMBT3904WT1G

PC111
1000P/50V/X7R_4

2

AGND_0.85V

B-00

1
PR123
*10K_4

Processor

+0.85V_TEST

PR108
80.6K/F_4

2

2

[5] VCCSA_SEL

PC112
1000P/50V/X7R_4

1

1

3

PR109
15K/F_4

2
PR111
*0_4_short

GND Close To Sandy Bridge
(POWER) Side

+0.85V_VSET1

+0.85V_G0

2

PR128
*10K_4

AGND_0.85V

B-00
PR102
91K/F_4

A

A

AGND_0.85V

AGND_0.85V

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

+0.85V (OZ8117)

Date:
5

4

3

2

Sheet

Friday, October 29, 2010
1

40

of

45

5

4

3

2

1

41
D

D

VDDP

HDR

VDDA

BST

1.05VPCH_HDR

15

1.05VPCH_BST

17

1.05VPCH_LX

+1.05V_PCH

4

B-00

C-00

PL6
0.36uH/ETQP4LR36AFC

CSN

TSET

PG

VREF

RSP

GNDA

GNDP

RSN

4
1.05VPCH_RSP

2

1.05VPCH_RSN
*10K/F_4

14

PR98
20K/F_4

PR241
10K/J_6_NTC

PR104
51.1/F_6

PC103
0.033U/50V/X7R_6

1

+3V
HWPG

[10,32,36,37,38,40,42]

B-00

PR72
*0_4_short

PR93
330/F_4

1.05VPCH_CSN

PR99
10_4

AGND_1.05V_PCH
1
2

2

PC98
22P/50V/NPO_4

AGND_1.05V_PCH

C

PC104
1000P/50V/X7R_4

1.05VPCH_CSP
AGND_1.05V_PCH

PC66

1

2

PC67

2

1
PR245
*short

PC73
+

RF25

PC230 +

EC9

1

AGND_1.05V_PCH
AGND_1.05V_PCH

PC77

+

PR94
20K/F_4

4

11

PR71
21

ER6
2.2_8

1

1.05VPCH_CSN

PQ34
AON6718L

*10P/50V/COG_4

G1

1

20

PQ33
*AON6718L

2

CSP

2

G0

PC84
0.1U/25V/X5R_4

2

1

1.05VPCH_CSP

VSET2

1500P/50V/X7R_4

4

19

+1.05V_PCH

*330U/2V/ESR9_7343

6

1.05VPCH_VREF

1.05VPCH_LDR

330U/2V/ESR9_7343

1.05VPCH_TEST

C

13

330U/6.3V/ELEC_6344

10

LDR

0.1u/25V/X5R_4

9

PU2
OZ8117

5

8

VSET1

10U/6.3V/X5R_6

PD3
*1SS355VM

7

1
2
3

1.05VPCH_VSET1

LX

5

PC86
*0.1U/25V/X5R_4

2

2

ON/SKIP

1
2
3

1

3
1

+1.05V_PCH
Fs=300K
TDC :18A(Imax)
OCP : 22A

5

PC99
0.22U/25V/X5R_6

PR76
0_4

[9,24,28,32,34,35,36,38,40] MAINON

RF24

1
2
3

18

16

C-00

*10P/50V/COG_4

1
PR81
*0_6_short

5
12

VIN

PC82
0.01U/25V/X7R_4

PQ39
AON6428L

2

2

2
1

1
2

1U/10V/X5R_4

1
2

AGND_1.05V_PCH

PC92
10U/25V/X6S_12

PR73
PD4
*0_6_short
1SS355VM

PC93
10U/25V/X6S_12

PC85
1U/10V/X5R_4

VIN
PC89
0.1U/50V/X7R_6

PR74
22_6

2200P/50V/X7R_4

PR75
100K_4

PC88

+5VPCU

1

VIN
PC100

PR92
51/F_6
1.05VPCH_RSP

AGND_1.05V_PCH

VTT_SENSE [5]
PC94
0.01U//50V/X7R_4
PR84
51/F_6

AGND_1.05V_PCH
1.05VPCH_RSN

PC91
0.01U//50V/X7R_4
B

B

GND Close To Sandy Bridge
(POWER) Side

AGND_1.05V_PCH

DIS@AO6402A
PQ50
6
5
2
1

2

PC153
*DIS@0.015U/50V/X7R_6

2

1

PD9
*DIS@1SS355VM

PR156
*DIS@1M_4
PQ48
DIS@ME2N7002E

1

AGND_1.05V_PCH

3

AGND_1.05V_PCH

PQ49
DIS@ME2N7002E

PC49
*DIS@0.1U/10V/X7R_4

+3V_GPU_EN

[15] +3V_GPU_EN

2

AGND_1.05V_PCH

PC79
1000P/50V/X7R_4

3

PR67
80.6K/F_4

1

PR146
DIS@100K/F_4

2

1

1

2
1.05VPCH_TEST

PC80
1000P/50V/X7R_4

2

PR70
52.3K/F_4

2

DIS@10U/25V/X6S_12

3

+5VPCU

1.05VPCH_VSET1

PC143
+

1

PC155

3

PR149
DIS@1M_4

DIS@10U/6.3V/X5R_8

PR145
DIS@22_8

1

B-00
PR68
20K/F_4

+3V_GPU

4

1

1.05VPCH_VREF

PR69
84.5K/F_4

1.14A

+15V

2

+3V

+3V_GPU

Processor

A

A

MAINON

AGND_1.05V_PCH

1

2

2

1

PQ47
DIS@ME2N7002E

PROJECT KL5A

Quanta Computer Inc.

5

4

3

2

Size
C

Document Number

Date:

Friday, October 29, 2010

Rev
1A

+1.05_PCH (OZ8117)
Sheet
1

41

of

45

5

4

PD2
*1SS400
1

3

2

PR26
2.2/J_6

2

1

VIN

EL2
UPB201212T-800Y-N

B-00

VCC_GT_VIN

42

VCC_GT_VIN

10

[5] VR_SVID_ALERT#

PR270

*0_4_short 5

[5] VR_SVID_DATA

PR271

*0_4_short 4

[5] VR_SVID_CLK

PR269

*0_4_short 6

NC2

PH1

VR_HOT#

LG1

ALERT#

VSSP1

SCLK

BOOT2

NTCG

PH2

NTC

LG2

PROG1

VSSP2

LGATE1b/PWM3

COMP
FB

ISUMP

VW

PC19
2200P/50V_4

PC254
10U/25V_1206

PC249
0.1U/50V_6

+VIN_VCC_CORE1

UGATE_1

27

PHASE_1

29

LGATE_1

PQ1
AON6428L

UGATE_1

36

BOOT_2

35

UGATE_2

34

PHASE_2

32

LGATE_2

PQ2
AON6718L

PR253
*0_4_short

33

EP

30

2

4

LGATE_1

C

1

PL11
0.36uH
1

4

+5V

1

4

PHASE_1

28

PC259
+

2

BOOT_1

26

2

25

VIN
PC255
+

+VCC_CORE

PQ5
AON6718L

VSUM+

PR25

3.65K/F_6

Close to ISL9583 Vin input point

ISEN_1

PR24

10K/F_4

VSUM-

PR18

1/F_4

VR_PWM3

49

EL3
UPB201212T-800Y-N

PR30
2.2/J_6

+VIN_VCC_CORE2

VIN

VSS_AXG_SENSE

PC240
2200P/50V_4

VSUM+

PR20

3.65K/F_6

ISEN_2

PR21

10K/F_4

VSUM-

PR23

1/F_4

C-00

+

PC32
+

PC235
+

PC33
+
330U/2V/ESR9_7343

4

5

PQ8
AON6718L

VSUM-

PC258
0.022U/16V/X7R_4

PC252
10U/25V_1206

5
5

ER3
2.2_8
3
0.22U/25V_6

ISEN_2

EC4

0.22U/25V_6

PC16
A

PR266
18.2K/F_4

1
2
3

PC20
ISEN_1

+

PC237

330U/2V/ESR9_7343

VGT_IMON_EC
PC8
0.015U/16V/X7R_4

PQ10
AON6718L

LGATE_2
PC27
1000P/16V_4

+VCC_CORE
PC37

4
1
2
3

4

2

330U/2V/ESR9_7343

VCORE_IMON_EC

PR4
*0_4_short

PC18
10U/25V_1206
PL9
0.36uH

1

1500P/50V/X7R_4

[5] VSS_SENSE

+VCC_CORE
Iccmax=53A
OCP : 65A

4

NTC Place near the +VCC_CORE phase 1 Inductor
PC25
330P/50V_4

PC24
330P/50V_4

[5] VCC_SENSE

VSS_SENSE

UGATE_2

1
2
3

PR250
10K/J_6_NTC

PC244

VSUM+
VSUM-

PQ6
AON6428L

PHASE_2
PR13
*0_4_short

PR10
27.4K/F_4

PC31
0.22U/25V/X5R_6

PC239
0.1U/50V_6

PR257
2.61K/F_4

0.1U/10V_4

PC245
0.068U/10V_4
PR258
11K/F_4

10P/50V_4

PC246
0.1U/50V_6

PC256
PR16
2K/F_4

1.1K/F_4

PR15
499/F_4

PC251
0.22U/10V_6

PC262
470P/50V_4

PC11
470P/50V_4

PR265

B-00

PC253
*330P/50V_4

PR6
316K/F_4

PR263
*100/F_4

PC28
*0.1U/10V_4

PR27
27.4K/F_4
PR31
3.83K/F_4

PR28
470K/J_4_NTC

PC3
150P/50V_4

330U/2V/ESR9_7343

c-00

22P/50V_4

330U/2V/ESR9_7343

21

20

16

B

PR14
3.09K/F_4
PC4

BOOT_2

NTC Place near the
+VCC_GFX HS-FET

330U/2V/ESR9_7343

330U/2V/ESR9_7343

EC2

330U/2V/ESR9_7343

4

ER2
2.2_8
3

5

5

1
2
3

PC247
0.1U/10V_4

1
2
3

EL1
UPB201212T-800Y-N

PR29
2.2/J_6
BOOT_1

PROG2

ISUMN

8.06K/F_4

LGATE_GT

SDA

ISEN1

14

PHASE_GT

37

100U/25V/105C

UG1

ISEN2

13

38

ISNG

100U/25V/105C

BOOT1

NC1

ISEN3/B2

12

1/F_4

B-00

PC6
2200P/50V_4

PU11
ISL95831HRTZ

PGOOD

15

PR255 = 16.5K

41

PC7
1000P/16V_4

UGATE_GT

PC26
0.22U/25V/X5R_6

19

PR252 = 7.87K

*16.5K/F_4

39

PC1
10U/25V_1206

LGG

BOOT_GT

PGOODG

18

Vcore Icc_MAX = 53A
VGT Icc_MAX = 24A

4.32K/F_4

PR255

PR9

453/F_4

43

ISPG

ISNG

VR_ON

RTN

35W CPU

PR260

PC21
330P/50V_4
45

47

46

48

PHG

VSEN

PR2
3.83K/F_4

PR255 = OPEN

PR252

24

PC10
*0.1U/10V_4

PR252 = OPEN

PR3
27.4K/F_4

PR12
470K/J_4_NTC

45W CPU

B

VDDP

UG2

11

NTC Place near the
+VCC_CORE HS-FET

VGT Icc_MAX = 33A

UGG

C-00
42

Vcore Icc_MAX = 94A

VDD

40

1500P/50V/X7R_4

[7] IMVP_PWRGD

PR262

PC260
+

ISPG
BOOTG

PC2
10U/25V_1206

9

10K/F_6

PC12
0.1U/50V_6

VCORE_IMON_EC

PR267

PC236
+

PC35
10U/6.3V_8

[32] GFX_PWRGD

2

NTC Place near the +VCC_GFX O/P Inductor

PC36
0.1U/10V_4

1

1

PR272
*1.91K/F_4

PC257
39P/50V_4

VGT_IMON_EC

PC34
+

D

4

2

[32] VCORE_IMON_EC
H_PROCHOT#
[3,32]

PR268
1.91K/F_4

2

[32] VGT_IMON_EC

PQ7
AON6718L

ER1
2.2_8
3

8

+3V

PQ4
AON6718L

LGATE_GT

+VCC_GFX
Iccmax=33A
OCP : 40A

+VCC_GFX

4

EC1

3

2

5

7

4

1
2
3

PC241
1U/10V/X5R_4

1
2
C

PC238
*1U/10V/X5R_4
2
1

31
SHDN

PR256
10K/J_6_NTC

ISPG
ISNG

5

22

VIN

RTNG

23

FBG

1

PR7
8.06K/F_4

VSENG

2

1000P/16V_4

VWG

1

PC242
1U/10V/X5R_4

PR251
*0_6_short

PC30
0.22U/25V_6

+5V

PR22
412/F_4

COMPG

PR254
1/J_6

PC5

PL10
0.36uH
1

PR264
7.5K/F_4

1500P/50V/X7R_4

PR32
*0_6_short

PC17
680P/50V_4

PR259
PC243
*100/F_4 *220P/50V_4

39P/50V_4

+VIN_VCC_CORE1
PC13
PR17
150P/50V_4 475K/F_4

4

PHASE_GT

PR19
2.7K/F_4

+5V

4

C-00
1
2
3

B-00

1
2
3

PC23
1000P/16V_4

B-00

PD1
*1SS400
PC14

5

5
UGATE_GT

2

PQ93
AON6428L

VSS_AXG_SENSE

PR8
2K/F_4

44

1

[29,37] SYS_SHDN#

PC261
330P/50V_4

17

D

[5] VCC_AXG_SENSE
[5] VSS_AXG_SENSE

PC9
100P/50V/X7R_4

5

PR11
*0_4

PQ3
AON6428L

1
2
3

SHDN

1
2
3

[10,32,36,37,38,40,41] HWPG

2

PC248

2

1

0.1U/10V_4

1

PC29
0.22U/25V/X5R_6

PC250
0.033U/16V_4
PR261
11K/F_4

VRON

[32]

PC22
330P/50V_4

PC15
10U/25V_1206

BOOT_GT
PR5
100K/F_4

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

IMVP7 2+1 (ISL95831)

Date:
5

4

3

2

Friday, October 29, 2010

Sheet
1

42

of

45

5

4

3

2

1

Huron River
1

5VPCU

5VPCU
12

ADP IN
BAT

Charger
Circuit

5

VIN

MAX17020ETJ+

1

HWPG(All Power GOOD)

5V_S5

3VPCU

PM_DRAM_PWRGD

VTTPWRGOOD
SM_DRAMPWROK

AO6402A

ISL88731A

H_PWRGOOD
1a

4

HWPG(3/5VPCU)

3VPCU

S5_ON

UNCOREPWRGOOD

PLTRST#

Madison

RSTIN#
5

D

3VPCU

3V_S5

D

26

AO6402A

3VPCU

GPU_RST#

5VPCU
WRST_8512#

WRST#

0.1U

6

RSMST#

7

SIO_PWRBTN#

3

NBSWON#

EC

PLTRST#

C

DRAMPWROK

2

R
470K

RSMRST#
PWRBTN#

DGPU_HOLD_RST#
+VCC_CORE

25

GPIO
14

IMVP_PWRGD

8a

PM_SLP_S4#

SYS_PWROK

8b

PM_SLP_S3#

PWROK

VR1_READY
VRON

MEPWROK

12

HWPG(All Power GOOD)

DELAY 99mS

DGPU_PWR_EN#

GPIO

R

PCH

GPIO

GFXPG_R

0ohm

ITE-8518
ECPWROK

13

12a VRON
1a

VIN

HWPG(3/5VPCU)

C

C

9a

TPS51116REGR

SUSON

10a

10d

+1.5V_SUS

VIN

HWPG(+1.5VSUS)

10b

+1.05V_VTT

11b

HWPG(+1.05V_VTT)

10b

+1.05_PCH

0.75VSMDDR_VTERM
OZ8115

LDO
10c

10a

+1.5VCPU_PG

5VPCU

VIN

HWPG(All Power GOOD)
10a

AO6402A

5VSUS

OZ8115

3VPCU

VIN
10a

AO6402A

10b

HWPG(+1.05V_VTT)

+1.8V

3VSUS
OZ8115

9b

11b

MAINON

VIN

11b

10b

B

HWPG(+1.8V)

+0.85V

B

VIN
OZ8115
20a
19c
19a

11b

GFX_CORE

MAX8792

DGPU_PWR_EN#

HWPG(+0.85V)

5VPCU

19b
10b

+5V

10b

+3V

10b

+1.5V

GFXPG_1V_EN

AON7410
1.5VSUS
+1V_GFX_PCIE

3VPCU

LDO
RT9018B
AON7410
+3V
1.5VSUS

+1V_PCIE_PG

+3.3V_DELAY

A

AO6402A
AO6402A
1.5VSUS
22a

A

+1.5V_GPU

1.5VSUS

TPCA8030-H

10b

+1.5VCPU
10c

AO6402A

+1.5VCPU_PG

Delay

+1.8V

PROJECT KL5A
23a

+1.8V_GPU
AO6402A
5

4

12

HWPG
24

Quanta Computer Inc.

GFXPG_R

Delay
DGPU_PWROK
3

2

Size
A2

Document Number

Date:

Friday, October 29, 2010

Rev
1A

Power Sequence diagram
1

Sheet

43

of

45

5

4

3

2

1

KL5A / Z370 Huron River Schematic EC Tracking Record A ( for SDV --> SIV,B )August 5, 2010
EC # Page
D

CMVC# Description

B-00
24
B-01 10,22
B-02 9,27,28
B-03
9
B-04
10
B-05
26
B-06
10
B-07
22
B-08
27
B-09
36

Separate D25 to two single Diodes.
Add Color Engine detect pin(PCH GPIO 70).
Reserve USB3.0 solution for LC request.
Modify PH of PCIE_CLKREQ_WLAN/LAN# to +3V for avoiding leakage current.
Make Board ID table for BIOS control.
Modify sch of card reader.
NC R526 for boot issue.
Add 2.2K PH for LVDS EDID used.
Correct the debug pin defition

Add SYS_PWROK connect to the net "S3" for S3 issue

C

B-10

33

Add some capacitors for ESD

B-11

10

add USB30_ID at GPIO24 & add GPIO13 for ID3

Date

Part Affected

0816,1100
0816,1100
0816,1500
0816,1500
0816,1500
0818,1500
0824,1500
0824,1500
0825,1400
0825,1400

D25
U17
U41
U17

D

U25, CN9
R526
R633, R634
CN13
PU1
SC1,SC2,,SC3,SC4,SC5,
SC6,SC7,SC8,SC9,SC10,
0902,1900 SC11,SC12,SC13,SC14,SC15,
SC16,SC17,SC18,SC19,SC20,
SC21,SC22,SC23,SC24,SC25,
SC26,SC27,C28
U17
0907,1200

B

C

B

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

EC Tracking Record A

Date:
5

4

3

2

Friday, October 29, 2010

Sheet

44
1

of

45

5

4

3

2

1

KL5A / Z370 Huron River Schematic EC Tracking Record B ( for SIV to SIT )September 8, 2010

D

EC #

Page

C-00

15-19

CMVC#

Description

Date

GPU change to N12M-GS

0908,1000

9,22,27,
C-01 37,38,39,
40,41

Add RF soultion

0913,1300

C-02

Change LED3 power from +3V_S5 to +3VPCU for Power LED always bright

0925,1100

3,4,7,8,
C-03 10,20,23
,24,

Remove 0 ohm

1011,1700

C-04

Remove U13 for delete 27Mhz clock signal form PCH

1015,1400

31

C

9

Part Affected
U28
RF1,RF2,RF3,RF4,RF5,
RF6,RF7,RF8,RF9,RF10,
RF11,RF12,RF13,RF14,RF15,
RF16,RF17,RF18,RF20,RF21,
RF22,RF23,RF24,RF25,RF26,
RF27
LED3
R87,R253,R217,R224,R274,
R339,R344,R351,R375,R376,
R377,R378,R387,R397,R402,
R409,R410,R423,R424,R425,
R428,R429,R437,R430,R431,
R545,R587
U13

B

D

C

B

A

A

PROJECT KL5A

Quanta Computer Inc.
Size
Document Number
Custom

Rev
1A

EC Tracking Record A3

Date:
5

4

3

2

Friday, October 29, 2010

Sheet

45
1

of

45

www.s-manuals.com
Source Exif Data: 
File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.6
Linearized                      : No
XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Producer                        : GPL Ghostscript 8.61
Modify Date                     : 2014:05:02 14:52:32+03:00
Create Date                     : 2010:10:29 16:43:13+08:00
Creator Tool                    : PDFCreator Version 0.9.5
Metadata Date                   : 2014:05:02 14:52:32+03:00
Document ID                     : 18487b5a-e594-11df-0000-9096679de16a
Instance ID                     : uuid:ec5e6402-7a31-4dd9-98cd-78f202af9f17
Format                          : application/pdf
Title                           : Quanta KL5A - Schematics. www.s-manuals.com.
Creator                         : 
Description                     : 
Subject                         : Quanta KL5A - Schematics. www.s-manuals.com.
Has XFA                         : No
Page Count                      : 46
Keywords                        : Quanta, KL5A, -, Schematics., www.s-manuals.com.
Warning                         : [Minor] Ignored duplicate Info dictionary
EXIF Metadata provided by EXIF.tools

Navigation menu