Quanta R53 Schematics. Www.s Manuals.com. R1a Schematics
User Manual: Motherboard Quanta R53 AMD Comal UMA/Muxless - Schematics. Free.
Open the PDF directly: View PDF 
.
Page Count: 45
| Download | |
| Open PDF In Browser | View PDF |
1 2 3 4 5 6 7 8 Stackup TOP GND IN1 IN2 VCC BOT R53 AMD Comal UMA/Muxless SYSTEM DIAGRAM ATI A SODIMM1 DDR3 Channel A PCI-E x 8 ( 0 ~ 7 ) Max. 4GB THAMES XT SODIMM2 DDR3 Channel B VRAM 128x16x8,64bit AMD PG.12 DDR3 900MHz 29mm X 29mm PG.21,22 TDP 25W Trinity APU +3V/+5V PG.14~20 Max. 4GB PG.13 35mm X 35mm PCI-E x 1 FS1r2 socket 722 pin uPGA HDMI PG.25 ANX3110 DP to LVDS Translator PG.11 DP Port 0 LAN0 TDP 35W WLAN EE PG.35 DP Port 2 B BT COMBO +1.1V/+1.1VS5 PG.36 LVDS B +1.2V/+2.5V LVDS PG.23 PG.36 PG.2~5 +VCC_CORE M1 PG.32 DP Port 1 A PG.38 UMI +VDDNB_CORE CRT Card reader RTS5229-GRT 10/100 PG.26 LAN PORT8 RTL8105E USB 2.0 LAN0 PCI-E x 2 LAN1 USB 3.0 PORT1,2 USB3.0 combo Ports X 2 PG.28 USB 2.0 Hudson M2/M3 PORT11,12 24.5mm X 24.5mm 656pin FCBGA TDP 4.7W Accelerometer USB2.0 Ports X 1PG.28 TOP PG.23 SATA0 PG.43,44 +VGACore +1.5V_VGA +3V_VGA HDD PG.31 PG.32 PG.6~10 SMBUS SATA1 PG.33 ROM ODD PG.42 PG.31 Charger PG.34 Azalia FAN Speaker AUDIO CODEC D Discharger PG.27 PG.41 HP/MIC D PG.28 IDT92HD87 M1 Analog MIC PG.27 PROJECT : R53 Quanta Computer Inc. PG.28 Size Custom Document Number 2 3 4 5 6 7 Rev 1A BLOCK EE DIAGRAM Date: Tuesday, November 22, 2011 1 C PORT2 USB 2.0 KBC ITE8518 TP +1.5VSUS +1.0V_VGA +1.8V_VGA Webcam PORT0 LPC KB PG.39 PG.24 AMD FCH 10/100 PG.29 C CRT Sheet 1 8 of 44 5 4 3 2 1 U25F Move from APU to PCH C 7 7 7 7 7 7 7 7 UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3 R340 +1.2V_VDDP 196/F_6 AE5 AE6 AD8 AD7 AC9 AC8 AC5 AC6 P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3 AG8 AG9 AG6 AG5 AF7 AF8 AE8 AE9 P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3 P_ZVDDP AG11 PCI EXPRESS P_ZVDDP GRAPHICS P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15 GPP PCIE_RXP0_WLAN PCIE_RXN0_WLAN 32 PCIE_RXP0_WLAN 32 PCIE_RXN0_WLAN TO WLAN AB8 AB7 AA9 AA8 AA5 AA6 Y8 Y7 W9 W8 W5 W6 V8 V7 U9 U8 U5 U6 T8 T7 R9 R8 R5 R6 P8 P7 N9 N8 N5 N6 M8 M7 UMI-LINK D PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9 P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15 AB2 AB1 AA3 AA2 Y5 Y4 Y2 Y1 W3 W2 V5 V4 V2 V1 U3 U2 T5 T4 T2 T1 R3 R2 P5 P4 P2 P1 N3 N2 M5 M4 M2 M1 PEG_TXP0_C PEG_TXN0_C PEG_TXP1_C PEG_TXN1_C PEG_TXP2_C PEG_TXN2_C PEG_TXP3_C PEG_TXN3_C PEG_TXP4_C PEG_TXN4_C PEG_TXP5_C PEG_TXN5_C PEG_TXP6_C PEG_TXN6_C PEG_TXP7_C PEG_TXN7_C P_GPP_TXP0 P_GPP_TXN0 P_GPP_TXP1 P_GPP_TXN1 P_GPP_TXP2 P_GPP_TXN2 P_GPP_TXP3 P_GPP_TXN3 AD5 AD4 AD2 AD1 AC3 AC2 AB5 AB4 PCIE_TXP0_C PCIE_TXN0_C P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3 AG2 AG3 AF4 AF5 AF1 AF2 AE2 AE3 UMI_TXP0_C UMI_TXN0_C UMI_TXP1_C UMI_TXN1_C UMI_TXP2_C UMI_TXN2_C UMI_TXP3_C UMI_TXN3_C AH11 P_ZVSS P_ZVSS PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 C723 0.1U/10V_4 C725 0.1U/10V_4 C727 0.1U/10V_4 C738 0.1U/10V_4 C731 0.1U/10V_4 C750 0.1U/10V_4 C777 0.1U/10V_4 C770 0.1U/10V_4 C782 0.1U/10V_4 C726 0.1U/10V_4 C736 0.1U/10V_4 C729 0.1U/10V_4 C746 0.1U/10V_4 C776 0.1U/10V_4 C773 0.1U/10V_4 C787 0.1U/10V_4 PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 02 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 PEG X 8 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 D UMA can remove C156 0.1U/10V_4 C164 PCIE_TXP0_WALN 32 PCIE_TXN0_WLAN 32 0.1U/10V_4 TO WLAN TO PCIE-LAN Move from APU to PCH C177 0.1U/10V_4 C185 0.1U/10V_4 C208 0.1U/10V_4 C224 0.1U/10V_4 R339 C167 0.1U/10V_4 C193 0.1U/10V_4 C217 0.1U/10V_4 C238 0.1U/10V_4 TO PCIE CARD READER UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3 UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3 C 7 7 7 7 7 7 7 7 196/F_6 4/19 For Comal. Trinity APU +3V HDT+ Connector for Debug only VID Override Circuit BOOT VOLTAGE +1.5V R250 *0_4/S R243 1K/F_4 4/19 For Comal. SVC R244 1K/F_4 U18 B 4,7 APU_RST# 4,7 APU_PWRGD APU_RST# APU_PWRGD 1 Y1 6 VCC 5 Y2 4 A1 2 GND 3 A2 Note: To override VID,Remove Rd, Re, Rf, install Rc set VID via SVC & SVD option RES. +1.5VSUS R224 *1K/F_4 J5 close to HDT debug HEADER APU_DBREQ# 1K/F_4 1K/F_4 1K/F_4 1K/F_4 R207 1K/F_4 +1.5VSUS 4 4 4 4 4 4 4 4 4 APU_TEST18 APU_TEST19 APU_RST_L_BUF CPU_LDT_RST_HTPA# APU_DBREQ# APU_DBRDY APU_TCK APU_TMS APU_TDI APU_TRST# APU_TDO APU_PWROK_BUF APU_TEST18 APU_TEST19 TP38 APU_DBREQ# APU_DBRDY APU_TCK APU_TMS APU_TDI APU_TRST# APU_TDO A 4/19 For Comal. 0 0 1.1 1.1 0 1 1.0 1.2 1 0 0.9 1.0 1 1 0.8 0.8 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 +1.5V R227 *1K/F_4 4/19 For Comal. R239 *1K_4 R242 *1K_4 R336 *2.2K_4 Rd 4 4 SVC SVD 4,7 APU_PWRGD SVC R225 0_4 CPU_SVC R226 0_4 CPU_SVD R338 0_4 CPU_PWRGD_SVID_REG CPU_SVC 38 Re SVD APU_PWRGD APU_PWRGD have pull up 300ohm to +1.5V on page 4 for normal operation open Ra , Rb,Rc R240 *220/F_4 R241 *220/F_4 R335 *220/F_4 Ra Rb Rc CPU_PWRGD_SVID_REG 38 A PROJECT : R53 Quanta Computer Inc. Size Custom Document Number 3 2 Rev 1A Llano PCIE/UMI/GPP Date: Monday, November 14, 2011 4 Wait for power CPU_SVD 38 Rf *HDT CONN 88511-2001-20p-l 5 VFIX_+VDD =OPEN B APU_PWROK_BUF +1.5VSUS R213 R209 R212 R208 VFIX_+VDD =VCC/GND APU_RST_L_BUF 74LVC2G07 APU_TDI APU_TCK APU_TMS APU_TRST# SVD 1 Sheet 2 of 44 5 4 3 M_A_DQ[0..63] U25A 12 M_A_A[15:0] M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 D 12 M_A_BS#[2..0] M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 B +1.5VSUS R162 1K/F_4 MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 U24 U21 L23 MA_BANK0 MA_BANK1 MA_BANK2 M_A_BS#0 M_A_BS#1 M_A_BS#2 12 M_A_DM[7..0] C U20 R20 R21 P22 P21 N24 N23 N20 N21 M21 U23 M22 L24 AA25 L21 L20 E14 J17 E21 F25 AD27 AC23 AD19 AC15 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7 G14 H14 G18 H18 J21 H21 E27 E26 AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 12 12 12 12 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 T21 T22 R23 R24 MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 12 12 M_A_CKE0 M_A_CKE1 H28 H27 MA_CKE0 MA_CKE1 12 12 M_A_ODT0 M_A_ODT1 Y25 AA27 MA_ODT0 MA_ODT1 12 12 M_A_CS#0 M_A_CS#1 V22 AA26 MA_CS_L0 MA_CS_L1 12 12 12 M_A_RAS# M_A_CAS# M_A_WE# V21 W 24 W 23 MA_RAS_L MA_CAS_L MA_W E_L M_A_RST# H25 T24 12 +MEMVREF_CPU R155 +1.5VSUS MEMORY CHANNEL A MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 M_A_EVENT# W 20 M_VREF 39.2/F_4 +M_ZVDDIO W 21 M_ZVDDIO Place close to APU within 1" C135 220P/50V_4 E13 J13 H15 J15 H13 F13 F15 E15 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 H17 F17 E19 J19 G16 H16 H19 F19 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 H20 F21 J23 H23 G20 E20 G22 H22 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 G24 E25 G27 G26 F23 H24 E28 F27 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 MA_RESET_L MA_EVENT_L +MEMVREF_CPU 2 AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13 1 03 12 U25B 13 M_B_A[15:0] M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 13 M_B_BS#[2..0] M_B_BS#0 M_B_BS#1 M_B_BS#2 13 M_B_DM[7..0] M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_B_DQ[0..63] MEMORY CHANNEL B MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 T27 P24 P25 N27 N26 M28 M27 M24 M25 L26 U26 L27 K27 W 26 K25 K24 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 U27 T28 K28 MB_BANK0 MB_BANK1 MB_BANK2 D14 A18 A22 C25 AF25 AG22 AH18 AD14 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 M_B_DQSP0 M_B_DQSN0 M_B_DQSP1 M_B_DQSN1 M_B_DQSP2 M_B_DQSN2 M_B_DQSP3 M_B_DQSN3 M_B_DQSP4 M_B_DQSN4 M_B_DQSP5 M_B_DQSN5 M_B_DQSP6 M_B_DQSN6 M_B_DQSP7 M_B_DQSN7 C15 B15 E18 D18 E22 D22 B26 A26 AG24 AG25 AG21 AF21 AG17 AG18 AH14 AG14 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 13 13 13 13 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1 R26 R27 P27 P28 MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 13 13 M_B_CKE0 M_B_CKE1 J26 J27 MB_CKE0 MB_CKE1 13 13 M_B_ODT0 M_B_ODT1 W 27 Y28 MB_ODT0 MB_ODT1 13 13 M_B_CS#0 M_B_CS#1 V25 Y27 MB_CS_L0 MB_CS_L1 13 13 13 M_B_RAS# M_B_CAS# M_B_WE# V24 V27 V28 MB_RAS_L MB_CAS_L MB_W E_L 13 M_B_RST# 13 M_B_EVENT# J25 T25 MB_RESET_L MB_EVENT_L +1.5VSUS Soldermask openings for all bottom side vias/TPs under FS1 Trinity APU R165 1K/F_4 220P/50V_4 C137 A14 B14 D16 E16 B13 C13 B16 A16 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 C17 B18 B20 A20 E17 B17 B19 C19 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 C21 B22 C23 A24 D20 B21 E23 B23 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 E24 B25 B27 D28 B24 D24 D26 C27 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 13 D C B Trinity APU Reserved for AMD suggest +1.5VSUS R110 0_4 +3VS5 R112 C142 *0.1U/10V_4 5 1K/F_4 +MEMVREF A C151 1K/F_4 *0.47U/6.3V_4 3 + 4 - 1 R1091 +MEMVREF_CPU 2 *10_4 R103 *0_4 A DDR_VTTREF 12,13,40 Reserved *OPA343NA/3K R117 2 R111 U11 *10K/F_4 R84 *0_4 R108 *0_4 C184 0.1U/10V_4 C183 1000P/50V_4 C140 220P/50V_4 PROJECT : R53 Quanta Computer Inc. 4/19 For Comal. Size Custom Document Number Date: Monday, November 14, 2011 5 4 3 2 Rev 1A Llano DDR3 MEM I/F 1 Sheet 3 of 44 4 3 Place caps with APU < 1 inch route PCIE as 85ohm +/- 10% DP_BLON DP_DIGON DP_VARY_BL C6 B6 A6 APU_BLEN APU_DIGON DP_AUX_ZVSS C1 DP_AUX_ZVSS R401 G3 G2 DP1_TXP2 DP1_TXN2 C453 C450 0.1U/10V_4 0.1U/10V_4 APU_DP_TXP3_C APU_DP_TXN3_C F2 F1 DP1_TXP3 DP1_TXN3 C_TX2_HDMI+ C_TX2_HDMI- C379 C352 0.1U/10V_4 0.1U/10V_4 PEG_HDMI_TXDP2 PEG_HDMI_TXDN2 L9 L8 DP2_TXP0 DP2_TXN0 C_TX1_HDMI+ C_TX1_HDMI- C350 C342 0.1U/10V_4 0.1U/10V_4 PEG_HDMI_TXDP1 PEG_HDMI_TXDN1 L5 L6 DP2_TXP1 DP2_TXN1 C_TX0_HDMI+ C_TX0_HDMI- C385 C401 0.1U/10V_4 0.1U/10V_4 PEG_HDMI_TXDP0 PEG_HDMI_TXDN0 K8 K7 DP2_TXP2 DP2_TXN2 PEG_HDMI_TXCP PEG_HDMI_TXCN 0.1U/10V_4 0.1U/10V_4 J6 J5 CLK_APU_P CLK_APU_N AE11 AD11 CLK_DP_P CLK_DP_N AB11 AA11 SVC SVD R412 R413 CPU_SVT *1K/F_4 0_4 R79 R346 R345 +1.5VSUS CPU_VDD0_RUN_FB_L VDDP_FB_H CPU_VDDNB_RUN_FB_H VDDIO_FB_H CPU_VDD0_RUN_FB_H 4/19 For Comal. R197 SVC SVD C3 SVT APU_SIC APU_SID AG12 AH12 SIC SID APU_RST# APU_PWRGD AF10 AB12 RESET_L PW ROK APU_PROCHOT# APU_THERMTRIP# APU_ALERT AC10 AE12 AF12 PROCHOT_L THERMTRIP_L ALERT_L 300/_4 PV change to short-pad *0_4/S APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ# H10 J10 F10 G10 F9 G9 H9 VSS_SENSE VDDP_FB_H CPU_VDDNB_RUN_FB_H VDDIO_FB_H CPU_VDD0_RUN_FB_H VDDP_FB_H B B4 C5 A4 A5 C4 B5 VSS_SENSE VDDP_SENSE VDDNB_SENSE VDDIO_SENSE VDD_SENSE VDDR_SENSE RSVD_1 RSVD_2 RSVD_3 RSVD_4 2 7 FCH_PROCHOT# R93 *0_4/S R95 0_4 R189 1.8K_4 INT_eDP_AUXN_C R192 1.8K_4 APU_DP_AUXP R200 100K/F_4 APU_DP_AUXN R206 100K/F_4 APU_DP_AUXP_C R199 1.8K_4 APU_DP_AUXN_C R214 1.8K_4 HDMI 150/F_4 APU_TEST9 APU_TEST10 APU_TEST14_BP0 APU_TEST15_BP1 APU_TEST16_BP2 APU_TEST17_BP3 APU_TEST18 APU_TEST19 APU_TEST20_SCANCLK2 APU_TEST24_SCANCLK1 APU_TEST25_H APU_TEST25_L APU_TEST28_H APU_TEST28_L TP26 TP24 TP33 TP31 TP28 TP29 APU_TEST35 CPU_THERMDA CPU_THERMDC P18 R18 M_TEST CONNECTION TBD R186 *301/_4 C +1.2V APU_TEST25_L R83 510_4 4/19 For Comal. APU_TEST9 +3VS5 R178 *0_4 R211 R210 R188 R183 R81 1K/F_4 1K/F_4 1K/F_4 1K/F_4 510_4 DMAACTIVE_L 7 R75 R76 TP20 TP19 7/8 For Comal. TEST35 PU FOR INTERNAL TEST35 PD FOR CUSTOMER DMAACTIVE_L controls entry and exit from the sleep and power states 10K/F_4 APU_TEST35 To AMD HDT TP32 TP30 TP5 TP6 TP27 TP25 M_TEST FS1R2 R102 DMAACTIVE_L R187 301/_4 M_TEST R184 39.2/F_4 APU_TEST18 2 APU_TEST19 2 *1K/F_4 +1.5V 1K/F_4 +1.5VSUS APU_TEST18 APU_TEST19 APU_TEST20_SCANCLK2 APU_TEST24_SCANCLK1 APU_TEST25_H SI FS1R1 signals is for detect CPU TYPE and protect it. FS1R1 CPU this pin is N.C FS1R2 CPU this pin is LOW can remove it at MP Y10 AA10 Y12 K21 +1.5V 4/19 For Comal. B R92 *1K/F_4 R54 *10K/F_4 Q11 *MMBT3904-7-F R91 1K/F_4 38 1 VRHOT APU_PROCHOT# +1.5VSUS R49 +1.5VSUS APU_PROCHOT# 3 0_4 R343 2K/F_4 R341 2K/F_4 R342 1K/F_4 R344 1K/F_4 Add R49 for verify this solution Q30 MMBT3904-7-F 3 reserve for leakage current verify 32,33 MBCLK2 MBCLK2 1 RB501V-40 APU_SIC 1 2 D15 2 +3VPCU +3V +5VPCU R65 *11.5K/F_4 U8 *G718 1 VCC TMSNS1 8 2 C111 *1U/6.3V_4 R56 VGA_ALERT 15 SMBALERT# 23,33,35,36,37,40 GND RHYST1 7 R64 *0_4/S 3 OT1 TMSNS2 6 4 OT2 RHYST2 5 2 *8.87K/F_4 ADD VGA TEMP_ FAIL function is active Hi over 120 degree C= Low 4 R67 2 R59 *11.5K/F_4 32,33 MBDATA2 Q29 MMBT3904-7-F 3 1 RB501V-40 *100K_6 NTC 1 R57 *8.87K/F_4 2 APU_SID 1 A 2 D14 R23 1 Size R66 When 100K-NTC 100 C=6.164K Thermal Trip = 120 C 3 MBDATA2 PROJECT : R53 Quanta Computer Inc. 1 HWPG 1 3 R55 10K/F_4 *10K/F_4 *RB501V-40 1 D +3V R182 *39.2/F_4 SI,AMD no concern so remove TP10, TP17,TP18,TP16,TP23 ECPWROK 10,18,33 10K/F_4 2 04 APU_BLEN 23 APU_DIGON 23 APU_BLPWM 11 +1.5VSUS to EC reserve only 1 3 INT_eDP_AUXP_C +3V 2 33 H_PROCHOT# A 5 *100K/F_4 3920_RST# 33 RB501V-40 ECPWROK 1 R43 D9 2 *100K/F_4 R191 FCH_LVDS_HPD 11 FCH_VGA_HPD 8 HDMI_HPD_Q 25 SI , PU SUS power meet AMD design APU_PROCHOT# 可可可 input or output 可Low 時CPU 會會 P - STATE SMBALERT# *ME2N7002E VGA AMD internal test only C152 220P/50V_4 R42 INT_HDMI_AUXP 25 INT_HDMI_AUXN 25 R190 INT_eDP_AUXN APU_THERMTRIP# 1 3920_RST# Q10 APU_DP_AUXP 8 APU_DP_AUXN 8 INT_eDP_AUXP +1.5VSUS W 10 AC12 +1.5V THERMTRIP# shutdown temperature 125寬 寬C Q9 D8 MMBT3904-7-F 2 2 0.1U/10V_4 0.1U/10V_4 LVDS +1.5VSUS FS1R2 DMAACTIVE_L 4/19 For Comal, close to APU. R88 1K/F_4 INT_eDP_AUXP 11 INT_eDP_AUXN 11 Display port power 1.5V min 1.2v max : 1.65v AD12 M18 N18 F11 G11 H11 J11 F12 G12 J12 H12 AE10 AD10 L10 M10 P19 R19 K22 T19 N19 AA12 TEST4 TEST5 TDI TDO TCK TMS TRST_L DBRDY DBREQ_L C454 C463 0.1U/10V_4 0.1U/10V_4 Trinity APU TP34 TP36 TP35 TP88 +1.5VSUS DISP_CLKIN_H DISP_CLKIN_L B3 A3 301/_4 1K/F_4 CLKIN_H CLKIN_L C418 C423 2 2 APU_TDI 2 APU_TDO 2 APU_TCK 2 APU_TMS 2 APU_TRST# 2 APU_DBRDY 2 APU_DBREQ# APU_SVT_R DP2_TXP3 DP2_TXN3 INT_eDP_AUXP_C INT_eDP_AUXN_C TEST6 TEST9 TEST10 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST24 TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H TEST30_L TEST31 TEST32_H TEST32_L TEST35 TEST C325 C345 DISPLAY PORT MISC. APU_DP_TXP2_C APU_DP_TXN2_C +1.5V Q14 MMBT3904-7-F 3 FCH_LVDS_HPD FCH_VGA_HPD HDMI_HPD_Q 0.1U/10V_4 0.1U/10V_4 +1.5V 6 FCH_THERMTRIP# DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD D3 E3 D7 E7 F7 G7 C449 C445 2,7 APU_RST# 2,7 APU_PWRGD R77 10K/F_4 G5 G6 DP1_TXP1 DP1_TXN1 4/19 For Comal. Thermal DP5_AUXP DP5_AUXN H2 H1 +1.5V 38 37 38 40 38 F5 F6 APU_DP_TXP1_C APU_DP_TXN1_C SVC SVD 38 DP4_AUXP DP4_AUXN RSVD 2 2 E5 E6 0.1U/10V_4 0.1U/10V_4 7 CLK_DP_P 7 CLK_DP_N Note: CLK_DP_NSSCP/N is 100MHZ non-SSC C DP3_AUXP DP3_AUXN C430 C437 7 CLK_APU_P 7 CLK_APU_N Note: CLK_APU_HCLKP/N is 100MHZ SSC INT_HDMI_AUXP INT_HDMI_AUXN DP1_TXP0 DP1_TXN0 C_TXC_HDMI+ C_TXC_HDMI- 25 C_TXC_HDMI+ 25 C_TXC_HDMI- D5 D6 SER. note --HDMI P&N can not swap DP2_AUXP DP2_AUXN DP0_TXP3 DP0_TXN3 8 APU_DP_TXP2 8 APU_DP_TXN2 25 C_TX0_HDMI+ 25 C_TX0_HDMI- DP0_TXP2 DP0_TXN2 J3 J2 8 APU_DP_TXP1 8 APU_DP_TXN1 25 C_TX1_HDMI+ 25 C_TX1_HDMI- K2 K1 H5 H4 8 APU_DP_TXP3 8 APU_DP_TXN3 DP2 output to HDMI connector APU_DP_AUXP_C APU_DP_AUXN_C APU_DP_TXP0_C APU_DP_TXN0_C 8 APU_DP_TXP0 8 APU_DP_TXN0 4/19 HDMI change to DP2 for Comal. E1 E2 0.1U/10V_4 0.1U/10V_4 TP87 TP86 25 C_TX2_HDMI+ 25 C_TX2_HDMI- DP1_AUXP DP1_AUXN C443 C441 D DP1 output to Hudson-M2 for VGA translator interface DP0_TXP1 DP0_TXN1 DISPLAY PORT 0 TP85 TP84 Display port power 1.5V min 1.2v max : 1.65v K5 K4 DISPLAY PORT 1 INT_eDP_TXP1_C INT_eDP_TXN1_C 0.1U/10V_4 0.1U/10V_4 D1 D2 DISPLAY PORT 2 C781 C778 ANALOG/DISPLAY/MISC DP0_TXP0 DP0_AUXP DP0_TXN0 DP0_AUXN L3 L2 CLK 11 INT_eDP_TXP1 11 INT_eDP_TXN1 1 U25C INT_eDP_TXP0_C INT_eDP_TXN0_C 0.1U/10V_4 0.1U/10V_4 CTRL C771 C769 JTAG DP0 output to eDP to LVDS converter 11 INT_eDP_TXP0 11 INT_eDP_TXN0 2 SENSE 5 *100K_6 NTC Document Number Rev 2 1A Llano Display/Misc Monday, November Date: 14, 2011 Sheet 4 1 44 of 5 4 3 2 1 APU POWER TABLE D PIN NAME NET NAME VDD +VCC_CORE VDDNB +VDDNB_CORE VDDIO +1.5VSUS +1.5V VDDP +1.2V_VDDP +1.2V EMI suggestion VOLTAGE ?? VDDR +1.2V_VDDR +1.2V VDDA +2.5V_VDDA +2.5V C96 470P/50V_4 C821 22U/6.3VS_8 C465 0.22U/10V_4 +VDDNB_CORE 4/19 For Comal. C818 22U/6.3VS_8 C466 180P/50V_4 C452 22U/6.3VS_8 C468 180P/50V_4 C467 180P/50V_4 4/19 For Comal. +VDDNB_CORE C346 22U/6.3VS_8 C380 22U/6.3VS_8 C397 180P/50V_4 U25D F8 H6 J1 J14 P6 P10 J16 J18 J9 K19 K3 K17 M3 K6 V10 V18 V3 F3 L18 V6 W1 T18 Y14 AA1 AB6 AC1 R1 P3 K10 H3 M19 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 C8 D10 B8 B12 C9 A9 A10 A8 A11 E10 E11 C10 VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDNB_6 VDDNB_7 VDDNB_8 VDDNB_9 VDDNB_10 VDDNB_11 VDDNB_12 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63 R11 T10 H8 G1 U11 W 11 W 13 W 15 W 17 W 19 AB3 AD3 AD6 AE1 L1 Y6 M6 N11 N1 T3 T6 U19 U1 Y16 Y18 Y3 D4 F4 AF6 AF3 L11 VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16 VDDNB_17 VDDNB_18 VDDNB_19 VDDNB_20 VDDNB_21 VDDNB_22 VDDNB_23 C11 C12 D9 D8 D12 D11 B11 A12 B10 E12 B9 VDDNB_CAP VDDNB_CAP K13 K12 +1.5VSUS C349 0.22U/10V_4 C255 0.22U/10V_4 C400 0.22U/10V_4 C285 0.22U/10V_4 B H26 K20 J28 K23 K26 L22 L25 L28 M20 M23 M26 N22 N25 N28 P20 P23 P26 AA28 C338 0.22U/10V_4 4/19 For Comal. C190 180P/50V_4 +1.2V_VDDP VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16 VDDIO_17 VDDIO_18 VDDP = 5A +1.2V R334 +1.2V_VDDP *0_8/S 4/19 For Comal. C707 22U/6.3VS_8 C674 10U/6.3V_8 C689 10U/6.3V_8 AH6 AH5 AH4 AH3 AH7 C679 10U/6.3V_8 VDDP VDDP VDDP VDDP VDDP AB10 C683 0.22U/6.3V_4 C684 0.22U/6.3V_4 C682 180P/50V_4 C685 180P/50V_4 VDDA VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36 VDDR VDDR VDDR VDDR T23 T26 U22 U25 U28 Y26 T20 R28 R25 R22 V20 V23 V26 W 22 W 25 W 28 Y24 G28 AG10 AH8 AH9 AH10 C271 22U/6.3V_8 C250 22U/6.3V_8 C669 22U/6.3V_8 C260 22U/6.3V_8 C286 22U/6.3V_8 C715 22U/6.3VS_8 C267 22U/6.3VS_8 C266 22U/6.3VS_8 C259 22U/6.3VS_8 C307 0.22U/10V_4 C306 0.22U/10V_4 C234 180P/50V_4 C239 180P/50V_4 C293 0.01U/25V_4 4/19 For Comal. C304 0.01U/25V_4 C290 0.01U/25V_4 25A Maximum IDDNBspike 33A +VDDNB_CORE DECOUPLING between PROCESSOR and DIMMs Across VDDIO and VSS split +1.5VSUS C207 0.22U/10V_4 C194 0.22U/10V_4 C195 180P/50V_4 C275 180P/50V_4 +VDDNB_CAP C399 22U/6.3VS_8 4/19 For Comal. C192 22U/6.3VS_8 C403 22U/6.3VS_8 C402 22U/6.3VS_8 C323 4.7U/6.3V_6 C310 4.7U/6.3V_6 C210 4.7U/6.3V_6 If the VSS plane is cut to create a VDDIO plane, ceramic capacitors are connected across the VDDIO and VSS plane split as follows VDDR = 3.3A ( Up to DDR3-1333 @ 1.5V ) +1.2V_VDDR_B R333 +1.2V C398 4.7U/6.3V_6 J20 L4 R7 W 18 A15 AB17 AC22 AE21 AF24 AH23 AH25 B7 C14 C16 C2 C20 C22 C24 C26 C28 D13 D15 D17 D19 D23 D25 D27 E4 E9 F14 F16 F18 F20 F22 F26 F28 G13 G15 G17 G19 G21 G23 G25 G4 J22 J24 J4 J7 K11 K14 K9 AC11 L19 L7 M11 AF11 V19 V9 W 16 W4 W7 Y11 Y20 Y22 Y9 A17 A13 K16 F24 G8 H7 J8 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_68 VSS_67 VSS_69 VSS_70 VSS_71 VSS_72 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 A19 A21 A23 A25 A7 AA4 AA7 AB13 AB15 AB19 AB21 AB23 AB25 AB27 AB9 AC14 AC16 AC18 AC20 AC24 AC26 AC28 AC4 AC7 AD9 AE13 AE15 AE17 M9 N10 N4 N7 R10 R4 T11 T9 U10 U18 U4 U7 V11 AE19 AE23 AE25 AE27 AE4 AE7 AF14 AF16 AF18 AF20 AF22 AF26 AF28 AF9 AG4 AG7 AH13 AH15 AH17 AH19 AH21 P9 C18 D21 W 14 P11 C7 E8 K18 W 12 C B *0_8/S Trinity APU C673 10U/6.3V_8 C671 10U/6.3V_8 C676 10U/6.3V_8 Trinity APU C680 0.22U/6.3V_4 A D U25E C229 22U/6.3V_8 +1.5VSUS 2.8A Up to DDR3-1333 @ 1.50V VDDIO C242 0.22U/10V_4 C97 *470P/50V_4 36A Maximum IDDspike 50A +VCC_CORE +VCC_CORE +VDDNB_CAP C C98 *470P/50V_4 SI , change to 22u for AMD ACE dynamic test, SI , change to 22u for improve +VDDNB_CORE transient C408 0.22U/10V_4 05 +VCC_CORE +1.1V C203 0.22U/10V_4 C675 1000P/50V_4 C678 180P/50V_4 C681 180P/50V_4 A VDDA= 0.75A +2.5V L17 PBY160808T-221Y-N(220,2A) +2.5V_VDDA C204 4.7U/6.3V_6 C216 0.22U/10V_4 C226 3300P/50V_4 PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 5 4 3 2 Rev 1A Llano POWER/GND 1 Sheet 5 of 44 5 3 NC,no install by default *2.2K_4 FCH_TEST1 R469 *2.2K_4 FCH_TEST2 SUSB# SUSC# DNBSWON# FCH_PWRGD 33 SUSB# 33 SUSC# 33 DNBSWON# 10 FCH_PWRGD +3V FCH_TEST0 T9 FCH_TEST1 T10 FCH_TEST2 V9 EC_A20GATE AE22 EC_RCIN# AG19 FCH_PME# R9 TP50 SIO_EXT_SMI# C26 GEVENT5# R447 *0_4/S T5 SYS_RST# U4 PCIE_WAKE# K1 C879 *100P/50V_4 V7 FCH_THERMTRIP# R10 R286 10K/F_4 WD_PWRGD AF19 4/19 For Comal. CGCLK_SMB 2.2K_4 to DDR3 SMBUS R287 CGDAT_SMB 2.2K_4 SI2 , change power rail from +3V to +3VS5 +3VS5 R468 J6 1 *1K_4 33 EC_A20GATE 33 EC_RCIN# GEVENT23# internal pull Hi 8.2K to +3V GEVENT5# internal pull Hi 8.2K to +3VS5 33 SIO_EXT_SMI# 33 SIO_EXT_SCI# PCIE_WAKE# no need to pull Hi resistor from check list SYS_RST# 2 GEVENT0# internal pull Hi 8.2K to +3V GEVENT1# internal pull Hi 8.2K to +3V 29,32 PCIE_WAKE# 4 FCH_THERMTRIP# +3V SYS_RST# internal 10K pull up *SOLDERJUMPER-2 TP51 RSMRST# 33 RSMRST# +3VS5 C R301 10K/F_4 SCL3 R298 10K/F_4 SDA3 R290 2.2K_4 SCL2 R296 2.2K_4 SDA2 R464 2.2K_4 SCL1 R465 2.2K_4 SDA1 R284 C582 FCH_THERMTRIP# *4.7K_4 AG24 AE24 CLK_REQ2# internal pull Hi 8.2K to +3V AE26 AF22 CLK_REQ3# internal pull Hi 8.2K to +3V AH17 AG18 CLK_REQ4# internal pull Hi 8.2K to +3V FCH_GPIO66 R505 *0_4/S AF24 27 ACZ_SPKR CGCLK_SMB AD26 12,13 CGCLK_SMB CGDAT_SMB AD25 12,13 CGDAT_SMB SCL1 SI2 , HP request Image sensor T7 30 SCL1 SDA1 R7 SMBUS reserve to FCH 30 SDA1 PCIE_MINI_CLKREQ# AG25 32 PCIE_MINI_CLKREQ# CLKREQ1# AG22 LLB# J2 LLB# Not Implemented ,left unconnected. TP94 SMARTVOLT2 This pin is used to AG26 TP64 VGA_PD R283 0_4 V8 power down VGA DAC 9 VGA_POWER_DOWN GBE_LED0 W8 TP49 regulators when CRT Y6 Remove Card EECS function form Vendor mail no connected V10 AA8 SI AF25 TP63 DNBSWON# 10K/F_4 31 ODD_PLUGIN# 31 ODD_DA#_FCH GEVENT16# internal pull Hi 8.2K to +3VS5 4/19 For Comal. GEVENT15# internal pull Hi 8.2K to +3VS5 For Zero ODD HD audio interface is +3V_S5 voltage To Azalia B ACZ_SDOUT_R R454 33_4 ACZ_SYNC_R R481 33_4 ACZ_BCLK_R R450 33_4 ACZ_RST#_R R479 33_4 Pure UMA can 1 *10K/F_4 R476 R467 R470 R466 *10K/F_4 *10K/F_4 *10K/F_4 *10K/F_4 ACZ_SDOUT_AUDIO 27 ACZ_SYNC_AUDIO 27 32 BT_COMBO_OFF# 14 33 ACZ_RST#_AUDIO 27 27 CLK_REQ# already internal pull up 8.2K remove D10 R484 2 ODD_PLUGIN# ODD_DA#_FCH FCH_JTAG_TCK FCH_JTAG_TDI FCH_JTAG_RST# ACZ_BCLK_R ACZ_SDOUT_R ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2_R ACZ_SDIN3_R ACZ_SYNC_R ACZ_RST#_R TP60 TP59 ACZ_SDIN0 VGA_REQ TP48 TP99 TP95 TP46 BIT_CLK_AUDIO 27 ACZ_SDIN0 44 HUDSON-M3 Part 4 of 5 TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1# PME#/GEVENT3# LPC_SMI#/GEVENT23# LPC_PD#/GEVENT5# SYS_RESET#/GEVENT19# W AKE#/GEVENT8# IR_RX1/GEVENT20# THRMTRIP#/SMBALERT#/GEVENT2# W D_PW RGD USBCLK/14M_25M_48M_OSC G8 USB_RCOMP B9 USB_FSD1P/GPIO186 USB_FSD1N H1 H3 USB_FSD0P/GPIO185 USB_FSD0N H6 H5 RSMRST# CLK_REQ4#/SATA_IS0#/GPIO64 CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47 SCL1/GPIO227 SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61 IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOW N#/GPIO51 DDR3_RST#/GEVENT7#/VGA_PD GBE_LED0/GPIO183 SPI_HOLD#/GBE_LED1/GEVENT9# GBE_LED2/GEVENT10# GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# *0.01U/25V_4 TP93 TP97 R272 U2 PCIE_CARD_CLKREQ# PCIE_LAN_CLKREQ# 26 PCIE_CARD_CLKREQ# 29 PCIE_LAN_CLKREQ# PCIE_RST2#/GEVENT4# RI#/GEVENT22# SPI_CS3#/GBE_STAT1/GEVENT21# SLP_S3# SLP_S5# PW R_BTN# PW R_GOOD CLKREQ1# RB501V-40 VGA_RSTB VGA_ON_SB BT_COMBO_OFF# VGA_RSTB VGA_ON_SB M7 R8 T1 P6 F5 P5 J7 T8 AB3 AB1 AA2 Y5 Y3 Y1 AD6 AE4 BLINK/USB_OC7#/GEVENT18# USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GEVENT17# USB_OC4#/IR_RX0/GEVENT16# USB_OC3#/AC_PRES/TDO/GEVENT15# USB_OC2#/TCK/GEVENT14# USB_OC1#/TDI/GEVENT13# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# PS2_DAT/SDA4/GPIO187 PS2_CLK/CEC/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 D21 C20 D23 C22 PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192 F21 E20 F20 A22 E18 A20 J18 H18 G18 B21 K18 D19 A18 C18 B19 B17 A24 D17 KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/XDB0/GPIO223 KSO_15/XDB1/GPIO224 KSO_16/XDB2/GPIO225 KSO_17/XDB3/GPIO226 R494 11.8K/F_6 D USB_HSD13P USB_HSD13N H10 G10 USB_HSD12P USB_HSD12N K10 J12 USBP6+ USBP6- USB_HSD11P USB_HSD11N G12 F12 USBP5+ USBP5- USB_HSD10P USB_HSD10N K12 K13 USB_HSD9P USB_HSD9N B11 D11 USB_HSD8P USB_HSD8N E10 F10 USB_HSD7P USB_HSD7N C10 A10 USB_HSD6P USB_HSD6N H9 G9 USB_HSD5P USB_HSD5N A8 C8 USB_HSD4P USB_HSD4N F8 E8 USB_HSD3P USB_HSD3N C6 A6 USB_HSD2P USB_HSD2N C5 A5 USB_HSD1P USB_HSD1N C1 C3 USB_HSD0P USB_HSD0N E1 E3 USBP12+ 28 USBP12- 28 Left side USB Combo 3.0/2.0. USBP11+ 28 USBP11- 28 Left side USB Combo 3.0/2.0. USBP8+ USBP8USBP7+ USBP7- 32 32 WLAN Min-Card TP104 TP101 C USBP2+ USBP2- 23 23 Camera USB USBP0+ USBP0- 28 28 Right side USB 2.0 Connector C16 A16 USBSS_CALRP USBSS_CALRN USB_SS_TX3P USB_SS_TX3N A14 C14 USB 3.0 Not Implemented: left unconnected. USB_SS_RX3P USB_SS_RX3N C12 A12 USB_SS_TX2P USB_SS_TX2N D15 B15 USB30_TX2+ 28 USB30_TX2- 28 USB_SS_RX2P USB_SS_RX2N E14 F14 USB30_RX2+ 28 USB30_RX2- 28 USB_SS_TX1P USB_SS_TX1N F15 G15 USB30_TX1+ 28 USB30_TX1- 28 USB_SS_RX1P USB_SS_RX1N H13 G13 USB30_RX1+ 28 USB30_RX1- 28 USB_SS_TX0P USB_SS_TX0N J16 H16 USB_SS_RX0P USB_SS_RX0N J15 K15 SCL2/GPIO193 SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196 EC_PW M0/EC_TIMER0/GPIO197 EC_PW M1/EC_TIMER1/GPIO198 EC_PW M2/EC_TIMER2/W OL_EN/GPIO199 EC_PW M3/EC_TIMER3/GPIO200 H19 G19 G22 G21 E22 H22 J22 H21 KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208 K21 K22 F22 F24 E24 B23 C24 F18 AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST# K19 J19 J21 USB_RCOMP_SB USBSS_CALRP USBSS_CALRN USB 3.0 R295 06 U34A AB6 R2 W7 T3 W2 J4 N7 USB OC D PCIE_RST2# RI# TP45 TP98 USB MISC R463 1 remove PCIE_RST2# from AMD recommend USB 2.0 FCH_TEST0 ACPI / WAKE UP EVENTS USB 1.1 *2.2K_4 GPIO R462 2 HD AUDIO +3VS5 4 EMBEDDED CTRL R496 R495 1K/F_4 1K/F_4 +FCH_VDD_11_SSUSB_S SCL3 of a TSI-capable APU's thermal bus,Pulled up to APU_VDDIO. Resistor value verified in the relevant APU design guide. SCL2 SDA2 SCL3 SDA3 EC_PWM2 B EC_PWM2 10 No need for GPIO200 A A Hudson-M2-A13 PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Hudson-M3 GPIO/USB/AZ/RGMII Date: Friday, November 11, 2011 5 4 3 2 1 Sheet 6 of 44 Rev 1A 4 UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3 2 2 2 2 2 2 2 2 33_4 33_4 PCIE_RST# A_RST# C899 C900 C904 C905 C644 C643 C896 C895 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 UMI_RXP0_C UMI_RXN0_C UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C AE2 AD5 PCIE_RST# A_RST# AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32 UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N AB33 AB31 AB28 AB29 Y33 Y31 Y28 Y29 UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N PCIE_CALRP_FCH PCIE_CALRN_FCH AF29 AF31 PCIE_CALRP PCIE_CALRN PCIE_TXP0_CARD_C PCIE_TXN0_CARD_C PCIE_TXP1_C PCIE_TXN1_C V33 V31 W 30 W 32 AB26 AB27 AA24 AA23 GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N AA27 AA26 W 27 V27 V26 W 26 W 24 W 23 GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3 R312 R316 +1.1V_PCIE_VDDR 26 PCIE_TXP0_CARD 26 PCIE_TXN0_CARD 29 PCIE_TXP1_LAN 29 PCIE_TXN1_LAN 0.1U/10V_4 C649 0.1U/10V_4 C898 590/F_4 2K/F_4 0.1U/10V_4 C648 0.1U/10V_4 C897 SI , PCIE port change from port 2 to port 0 C 26 26 29 29 PCIE_RXP0_CARD PCIE_RXN0_CARD PCIE_RXP1_LAN PCIE_RXN1_LAN PCIE_RXP0_CARD PCIE_RXN0_CARD PCIE_RXP1_LAN PCIE_RXN1_LAN R306 +1.1V_CKVDD 2K/F_4 CLK_CALRN_FCH SI , change to 22Ω & 47Ω for Rise/Fall time issue Pure UMA can remove B F27 G30 G28 PCIE_RCLKP PCIE_RCLKN 2 4 CLK_DP_FCH_P CLK_DP_FCH_N R26 T26 DISP_CLKP DISP_CLKN 2 4 1 0X2 3 CLK_ANX_FCH_P CLK_ANX_FCH_N H33 H31 DISP2_CLKP DISP2_CLKN 4 2 3 0X2 1 CLK_APU_FCH_P CLK_APU_FCH_N T24 T23 APU_CLKP APU_CLKN 4 2 3 22X2 1 CLK_VGA_FCH_P CLK_VGA_FCH_N J30 K29 SLT_GFX_CLKP SLT_GFX_CLKN RP10 4 2 3 0X2 1 CLK_WLAN_FCH_P CLK_WLAN_FCH_N H27 H28 GPP_CLK0P GPP_CLK0N RP12 2 4 1 47X2 3 CLK_PCIE_CARDP_FCH CLK_PCIE_CARDN_FCH J27 K26 GPP_CLK1P GPP_CLK1N 4 CLK_DP_P 4 CLK_DP_N 11 CLK_ANX_P 11 CLK_ANX_N RP13 4 CLK_APU_P 4 CLK_APU_N RP7 14 CLK_VGA_P 14 CLK_VGA_N RP11 32 CLK_WLAN_P 32 CLK_WLAN_N 26 CLK_PCIE_CARD_P 26 CLK_PCIE_CARD_N Note: CLK_FCH_SRCP/N is 100MHZ SSC F33 F31 GPP_CLK2P GPP_CLK2N E33 E31 GPP_CLK3P GPP_CLK3N Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC Note: Note: Note: Note: CLK_DP_NSSCP/N is 100MHZ non-SSC CLK_APU_HCLKP/N is 100MHZ SSC CLK_PCIE_VGAP/N is 100MHZ SSC GPP_CLK(0:8)P/N is 100MHZ SSC capable RP8 29 CLK_PCIE_LANP 29 CLK_PCIE_LANN 3 0X2 1 4 2 CLK_PCIE_LANP_FCH CLK_PCIE_LANN_FCH Part 1 of 5 CLK_CALRN 1 0X2 3 RP9 HUDSON-M3 M23 M24 GPP_CLK4P GPP_CLK4N M27 M26 GPP_CLK5P GPP_CLK5N N25 N26 GPP_CLK6P GPP_CLK6N R23 R24 GPP_CLK7P GPP_CLK7N N27 R27 GPP_CLK8P GPP_CLK8N J26 14M_25M_48M_OSC PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38 PCICLK4/14M_OSC/GPO39 AF3 AF1 AF5 AG2 AF6 PCIRST# AB5 AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42 GNT0# GNT1#/GPO44 GNT2#/SD_LED/GPO45 GNT3#/CLK_REQ7#/GPIO46 CLKRUN# LOCK# AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9 INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35 AF18 AE18 AC16 AD18 LPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ/GPIO48 25M_X1 27P/50V_4 Y9 25MHZ C31 R499 25M_X2 1M/F_4 C33 25M_X2 TP108 C892 27P/50V_4 PCI_CLK3 10 PCI_CLK4 10 PCIRST#_L R478 B25 D25 D27 C28 A26 A29 A31 B27 AE27 AE19 C872 *150P/50V_4 D PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD23 10 PCI_AD24 10 PCI_AD25 10 PCI_AD26 10 PCI_AD27 10 DGPU_PWROK 18,33,42,43,44 HUDSON_MEMHOT#_R C TP57 D11 RB500V-40 1 2 +3V_RTC 20MIL R325 20MIL 499/F_4 R324 +3VRTC 10_4 C661 1U/6.3V_4 PCI_SERR# 33 C884 100P/50V_4 FCH_GPIO44 R492 R323 TP103 *0_4 SPI_WP 1K/F_4 8 TP62 TP106 CLKRUN# 20MIL CLKRUN# 33 TP52 CN26 TP61 TP105 TP58 TRAVIS_EN# ACCEL_INT ACCEL_INT 32 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ#0 LDRQ#1 SERIRQ CLK_33_DEBUG 32 LAD0 32,33 LAD1 32,33 LAD2 32,33 LAD3 32,33 LFRAME# 32,33 TP66 TP67 SERIRQ 33 32K_X1 G2 32K_X1 32K_X2 G4 32K_X2 S5_CORE_EN RTCCLK INTRUDER_ALERT# VDDBT_RTC_G H7 F1 F3 E6 S5_CORE_EN CLK_RTC INTRUDER_ALERT# +3V_RTC DMAACTIVE_L 4 C889 C890 15P/50V_4 15P/50V_4 SI , change for EMI CLK_33M_KBC 33 32K_X1 FCH PROCHOT#--- (input 0.8V threshold ) When it isasserted, it can generate SCI or SMI to OS/BIOS C882 R458 20M_4 32K_X2 PV change to short-pad FCH_PROCHOT# 4 APU_PWRGD 2,4 *0_4/S TP65 APU_RST# 2,4 18P/50V_4 Y8 32.768KHZ C877 18P/50V_4 USE GROUND GUARD FOR 32K_X1 AND 32K_X2 LDT_STP# let is NC from schematic recommend S5_CORE_EN is necessary to connect enable pin of +3VPCU/+5VPCU regulator for S5+ mode implementation TP44 CLK_RTC 10 A TP42 +3V_RTC 20MIL C568 0.1U/10V_4 2 3 B 88266-020L BLM15BD121SN1D(120,300MA) 33_4 R307 1 2 SI2 , change R497 value from 220 ohm to 120 ohm LPC_CLK0 10 LPC_CLK1 10 R497 R498 G6 *SHORT_ PAD1 Add G-sensor signal PROJECT : R53 Quanta Computer Inc. INTRUDER_ALERT# Left not connected (FCH has 50-kohm internal pull-up to VBAT). Document Number 2 Rev 1A Hudson-M3 ACPI/PCI/CLOCK Date: Monday, November 14, 2011 4 2 20MIL Size Custom 5 1 SI , AMD request test point TP109 +3VPCU 20MIL +3VRTC_1 D12 RB500V-40 DMAACTIVE_L FCH_PROCHOT# APU_PWRGD_R APU_STOP# APU_RST# Hudson-M2-A13 KBC_RST# 33_4 KBC_RST# 33 G25 E28 E26 G26 F26 DMA_ACTIVE# PROCHOT# APU_PG LDT_STP# APU_RST# 25M_X1 S5 PLUS C891 PCI_CLK1 10 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 TP107 A PCI_CLK1 +VCCRTC_2 D Place these PICE AC coupling cap close to FCH 2 2 2 2 2 2 2 2 R482 R483 1 2 150P/50V_4 4 3 C876 07 U34E 1 11,29 LAN_PCIE_RST# 14 GPU_RST# 1 33_4 33_4 PCI INTERFACE 150P/50V_4 2 LPC C875 R453 R480 APU 150P/50V_4 PCI CLKS C874 26 CARD_PCIE_RST# 32 MINI_PCIE_RST# 3 PCI EXPRESS INTERFACES 150P/50V_4 CLOCK GENERATOR C873 +BAT 5 1 Sheet 7 of 44 5 4 3 2 1 U34D H25 VSSPL_SYS VSSPL_DAC VSSAN_DAC VSSANQ_DAC VSSIO_DAC EFUSE B ID3 ID2 ID1 ID0 0 0 0 0 0 R6 CONFIG UMA SATA_RXN0 SATA_RXP0 31 31 SATA_TXP1 SATA_TXN1 31 31 SATA_RXN1 SATA_RXP1 SATA_TXP1 SATA_TXN1 AL20 AN20 SATA_RX0N SATA_RX0P AN22 AL22 SATA_TX1P SATA_TX1N SATA_RX1N SATA_RX1P AJ22 AH22 SATA_TX2P SATA_TX2N AM23 AK23 SATA_RX2N SATA_RX2P AH24 AJ24 SATA_TX3P SATA_TX3N AN24 AL24 SATA_RX3N SATA_RX3P SB_SATA_LED# AL26 AN26 SATA_TX4P SATA_TX4N 4 SATA_LED# HUDSON-M3 Part 2 of 5 SD_CLK/SCLK_2/GPIO73 SD_CMD/SLOAD_2/GPIO74 SD_CD#/GPIO75 SD_W P/GPIO76 SD_DATA0/SDATI_2/GPIO77 SD_DATA1/SDATO_2/GPIO78 SD_DATA2/GPIO79 SD_DATA3/GPIO80 GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST# GBE_PHY_INTR 5 C577 *0.1U/10V_4 2 28 SATA_TX0P SATA_TX0N AH20 AJ20 +3V U23 *MC74VHC1G08DFT2G AK19 AM19 GBE LAN 31 31 SATA_TXP0 SATA_TXN0 SD CARD SATA_TXP0 SATA_TXN0 1 AJ26 AH26 SATA_RX4N SATA_RX4P AN29 AL28 SATA_TX5P SATA_TX5N AK27 AM27 SATA_RX5N SATA_RX5P AL29 AN31 NC6 NC7 AL31 AL33 NC8 NC9 AH33 AH31 NC10 NC11 AJ33 AJ31 NC12 NC13 SERIAL ATA SATA ODD PLACE SATA_CAL RES VERY CLOSE TO BALL OF HUDSON-M2/M3 R313 R303 +1.1V_AVDD_SATA 4/19 For Comal. +3V 1K/F_4 931/F_4 31- Level BOM Item RF_OFF# BT_OFF# BT_COMBO_EN# ODD_PWR 31 ODD_PWR 28 ACC_LED# 23 LCD_BK 0 0 0 1 0 2 0 0 1 0 0 3 0 0 1 1 0 4 0 1 0 1 0 5 GBE_MDIO R456 *10K/F_4 R276 10K/F_4 R485 10K/F_4 WINBOND GBE_RXERR *10K/F_4 R455 R486 10K/F_4 V6 V5 V3 T6 V1 SPI_SI SPI_SO SPI_CLK SPI_CS0# FCH_SPI_WP 10K/F_4 TP47 TP40 TP41 TP43 TP96 33 33 33 33 EC_BIOS_CS# EC_BIOS_SPI_CLK_I EC_BIOS_WR# EC_BIOS_RD# SPI_WP FCH_CRT_R R503 *0_4/S FCH_CRT_RED 24 FCH_CRT_G R510 *0_4/S FCH_CRT_GRE 24 VGA_BLUE M29 FCH_CRT_B R509 *0_4/S FCH_CRT_BLU 24 V28 V29 AF21 SATA_X1 R277 10K/F_4 VGA_DAC_REST AUXCAL U28 T31 T33 T29 T28 R32 R30 P29 P28 ML_VGA_HPD/GPIO229 C29 VGA_HPD N2 M3 L2 N4 P1 P3 M1 M5 SIDE_PORT_ID0 SIDE_PORT_ID1 SIDE_PORT_ID2 BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 NC1 NC2 NC3 NC4 NC5 AG16 AH10 A28 G27 L4 1 1 0 6 1 0 0 1 0 7 1 0 1 1 0 8 0 0 0 0 1 0 0 1 0 1 SIDE_PORT_ID2 A 0 SG / Muxless 9 0 SIDE_PORT_ID1 0 0 1 0 0 1 1 11 1 0 1 1 1 12 0 0 1 1 4 C 4 +3V FCH_CRT_R R502 150/F_4 FCH_CRT_G R501 150/F_4 FCH_CRT_B R504 150/F_4 100/F_4 APU_DP_TXP0 APU_DP_TXN0 APU_DP_TXP1 APU_DP_TXN1 APU_DP_TXP2 APU_DP_TXN2 APU_DP_TXP3 APU_DP_TXN3 R311 *10K/F_4 +FCH_VDDAN_11_MLDAC 4 4 4 4 4 4 4 4 +FCH_VDDAN_33_DAC_R FCH_VGA_HPD R506 *0_4 B VGA_HPD Reserve for debug SI , Q23,Q41 change to dual type MOS Q50 +3V VGA Hot-plug R444 10K/F_4 BOARD_ID0 R445 *10K/F_4 R442 *10K/F_4 BOARD_ID1 R443 10K/F_4 +5V R508 VIN ( 0 - 7 ) Voltage Monitor Not Implemented 10-KΩ 5% pull-up to +3VS5 or 10-KΩ 5% pull-down 1K/F_4 R500 100K/F_4 FCH_VGA_HPD Q50B 2 R449 *10K/F_4 BOARD_ID2 R448 10K/F_4 R440 *10K/F_4 BOARD_ID3 R460 10K/F_4 R438 *10K/F_4 BOARD_ID4 R439 10K/F_4 R446 10K/F_4 SIDE_PORT_ID0 R459 *10K/F_4 R441 10K/F_4 SIDE_PORT_ID1 R461 *10K/F_4 R437 *10K/F_4 SIDE_PORT_ID2 R457 10K/F_4 2N7002DW-7-F Q50A VGA_HPD 5 Dual 2N7002DW-7-F R309 100K/F_4 Hynix NC PROJECT : R53 Quanta Computer Inc. no supprot side port Size Custom Document Number 3 2 Rev 1A Hudson-M3 SATA/HWM/SPI Date: Friday, November 11, 2011 5 R473 *10K/F_4 8 R place close to PCH 10 1 VSS VDD Samsung 1 0 7 W P# R491 SIDE_PORT_ID0 0 HOLD# 3 4 1 CE# SCK SI SO *MX25L1605DM2I-12G 24 24 24 24 4 FCH_VGA_HPD +3VS5 1 6 5 2 715/F_4 R317 AUXCAL VIN0/GPIO175 VIN1/GPIO176 VIN2/SDATI_1/GPIO177 VIN3/SDATO_1/GPIO178 VIN4/SLOAD_1/GPIO179 VIN5/SCLK_1/GPIO180 VIN6/GBE_STAT3/GPIO181 VIN7/GBE_LED3/GPIO182 R314 SPI_CS0# SPI_CLK SPI_SO SPI_SI *10K/F_4 Dual 0 *0.1U/10V_4 APU_DP_AUXP 4 APU_DP_AUXN 4 ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173 TEMPIN3/TALERT#/GPIO174 TEMP( 0 - 3 ) Temp Monitor Not Implemented 10-KΩ 5% pull-up to +3VS5 or 10-KΩ 5% pull-down *0_4 L32 AUX_VGA_CH_P AUX_VGA_CH_N K6 K5 K3 M6 R493 L30 SATA_ACT#/GPIO67 FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58 0_4 0_4 0_4 0_4 VGA_RED AD22 HW MONITOR R487 R472 R471 R489 VGA_GREEN VGA_DAC_RSET FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54 C881 +3VS5 K31 AH16 AM15 AJ16 SI , change power rail from +3V to +3VS5 +3VS5 +3V ICT need TP2675 size test point SATA_CALRP SATA_CALRN SATA_X2 FCH SPI ROM EMI GBE_PHY_INTR D AKE38FP0N01 DFHS08FS023 C880 *22P/50V_4 FCH_DDCDAT FCH_DDCCLK AG21 P/N AKE38ZN0801 SPI_CLK R452 FCH_CRT_HSYNC FCH_CRT_VSYNC AF28 AF27 Size 2M 2M Socket +3VS5 6/7 for Comal. Hudson-M2-A13 R281 10K/F_4 AMIC M33 N32 TEMPIN0 TEMPIN1 TEMPIN2 TEMPIN3 1 *10K/F_4 *10K/F_4 M28 N30 AK15 AN16 AL16 LCD_BK R280 R451 VGA_HSYNC/GPO68 VGA_VSYNC/GPO69 Add GPIO for G-sensor LED control 32 RF_OFF# TP102 32 BT_COMBO_EN# GBE_COL GBE_CRS 7 Integrated Clock Mode: Leave unconnected. GPIO52 internal pull Hi 8.2K to +3V GPIO53 internal pull Hi 8.2K to +3V GPIO54 internal pull Hi 8.2K to +3V GPIO56 internal pull Hi 8.2K to +3V GPIO57 internal pull Hi 8.2K to +3V GPIO58 internal pull Hi 8.2K to +3V Vender AC4 AD3 AD9 W 10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9 VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71 SATA_CALRP SATA_CALRN *220/F_6 SB_SATA_LED# R294 SPI ROM 0_4 AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14 U33 SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/SPI_W P#/GPIO161 VGA DAC R288 T21 L28 K33 N28 Hudson-M2-A13 ID4 SATA HDD 31 31 08 U34B PLACE SATA AC COUPLING CAPS CLOSE TO HUDSON-M2/M3 3 VSSXL T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W 25 W 28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33 6 VSSAN_HW M K25 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 1 N8 Part 5 of 5 VGA MAINLINK C HUDSON-M3 3 D VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 GROUND A3 A33 B7 B13 D9 D13 E5 E12 E16 E29 F7 F9 F11 F13 F16 F17 F19 F23 F25 F29 G6 G16 G32 H12 H15 H29 J6 J9 J10 J13 J28 J32 K7 K16 K27 K28 L6 L12 L13 L15 L16 L21 M13 M16 M21 M25 N6 N11 N13 N23 N24 P12 P18 P20 P21 P31 P33 R4 R11 R25 R28 T11 T16 T18 1 Sheet 8 of 44 A 5 4 33,34,36,40,41 D +3V MAINON L52 C581 0.1U/10V_4 C585 0.1U/10V_4 M2 chipset need to connect to GND M3 remove TRACE WIDTH >=15mil +FCH_VDDAN_33_DAC_R PBY160808T-221Y-N(220,2A) C638 2.2U/6.3V_4 +VDDPL_3.3V C639 *0.1U/10V_4 +FCH_VDDPL_33_MLDAC 47mA 20mA 20mA 30mA 11mA 14mA 11mA 12mA +VDDPL_33_SYS +VDDPL_33_DAC TRACE WIDTH >=15mil L54 +FCH_VDDPL_33_SSUSB_S *0_4 +FCH_VDDPL_33_SUSB_S +FCH_VDDPL_33_PCIE +FCH_VDDPL_33_SATA R291 PBY160808T-221Y-N(220,2A) C641 2.2U/6.3V_4 NOTE : LDO_CAP A11 stepping : C will install 1nf cap A12 stepping : C will let it to NC C632 *0.1U/10V_4 +FCH_VDDAN_11_MLDAC C609 0.1U/10V_4 +3V VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 H24 V22 U22 T22 L18 D7 AH29 AG28 VDDPL_33_SYS VDDPL_33_DAC VDDPL_33_ML VDDAN_33_DAC VDDPL_33_SSUSB_S VDDPL_33_USB_S VDDPL_33_PCIE VDDPL_33_SATA *1000P/50V_4 +LDO_CAP M31 C635 +FCH_VDDAN_11_DAC VDDAN_11_ML -- UMI 1.1V analog power +FCH_VDDAN_11_ML 7mA 226mA C617 C631 1U/6.3V_4 4.7U/6.3V_6 C613 0.1U/10V_4 +VDDPL_3.3V V21 Y22 V23 V24 V25 AB10 L53 PBY160808T-221Y-N(220,2A) HUDSON-M3 AB17 AB18 AE9 AD10 AG7 AC13 AB12 AB13 AB14 AB16 +3V_AVDD_USB C640 2.2U/6.3V_4 C615 0.1U/10V_4 +FCH_VDDPL_33_SUSB_S L67 PBY160808T-221Y-N(220,2A) C885 2.2U/6.3V_4 VDDAN_11_ML_1 VDDAN_11_ML_2 VDDAN_11_ML_3 VDDAN_11_ML_4 VDDIO_33_GBE_S AB11 AA11 VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2 AA9 AA10 VDDIO_GBE_S_1 VDDIO_GBE_S_2 C886 1U/6.3V_4 VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8 VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8 VDDPL_11_DAC VDDPL_33_USB_S : USB PHY PLL analog power C Part 3 of 5 VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9 09 H26 J25 K24 L22 M22 N21 N22 P22 VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9 VDDAN_11_SATA_10 C588 0.1U/10V_4 VDDCR-- S/B CORE power C597 0.1U/10V_4 +1.1V C598 1U/6.3V_4 C590 1U/6.3V_4 C591 10U/6.3V_8 R514 +1.1V_CKVDD 340mA TRACE WIDTH >=30mil C626 1U/6.3V_4 C618 1U/6.3V_4 VDDAN_11_CLK-- Internal Generator I/O power C622 0.1U/10V_4 C624 0.1U/10V_4 Reserve for VDDAN_11_CL leakage current issue 0_8 clock 3 L72 BLM18PG181SN1D(180,1.5A)_6 1 C916 22U/6.3VS_8 MAINON TRACE WIDTH >=100mil L56 BLM18PG181SN1D(180,1.5A)_6 C620 0.1U/10V_4 C621 1U/6.3V_4 C623 1U/6.3V_4 C642 22U/6.3VS_8 33,34,36,40,41 +1.1V +VDDPL_1.1V +1.1VS5 L47 PBY160808T-221Y-N(220,2A) +1.1V_AVDD_SATA C608 2.2U/6.3V_4 L45 BLM18PG181SN1D(180,1.5A)_6 C596 1U/6.3V_4 C611 1U/6.3V_4 C599 0.1U/10V_4 C595 0.1U/10V_4 C600 22U/6.3VS_8 +1.1V if support USB 3.0 wake up should be change pull hi to S5 power +VDDAN_3.3V_HWM L66 PBY160808T-221Y-N(220,2A) +3VS5 C878 2.2U/6.3V_4 C887 10U/6.3V_8 C567 1U/6.3V_4 C575 1U/6.3V_4 +1.1VS5 +FCH_VDDAN_11_USB_S L70 PBY160808T-221Y-N(220,2A) SI , AMD SR tool review need one more 0.1u VDDCR_11_USB_S : USB PHY core power +1.1VS5 C979 0.1U/10V_4 C572 2.2U/6.3V_4 140mA TRACE WIDTH >=20mil C587 0.1U/10V_4 42mA +FCH_VDDCR_11_USB_S TRACE WIDTH >=15mil L69 L48 R293 282mA VDDAN_11_USB_S_1 VDDAN_11_USB_S_2 VDDCR_11_S_1 VDDCR_11_S_2 VDDCR_11_USB_S_1 VDDCR_11_USB_S_2 VDDPL_11_SYS_S J24 VDDAN_33_HW M_S M8 P16 M14 N14 P13 P14 VDDAN_11_SSUSB_S_1 VDDAN_11_SSUSB_S_2 VDDAN_11_SSUSB_S_3 VDDAN_11_SSUSB_S_4 VDDAN_11_SSUSB_S_5 424mA +FCH_VDDCR_11_SSUSB_S *0_8/S VDDCR_11_SSUSB_S_1 VDDCR_11_SSUSB_S_2 VDDCR_11_SSUSB_S_3 VDDCR_11_SSUSB_S_4 C594 1U/6.3V_4 C584 1U/6.3V_4 C603 C580 1U/6.3V_4 1U/6.3V_4 VDDXL_33_S-- 25MHZ XTAL IO power 5mA +VDDXL_3.3V L49 PBY160808T-221Y-N(220,2A) 187mA +VDDCR_1.1V TRACE WIDTH >=15mil +1.1VS5 70mA C601 1U/6.3V_4 +VDDPL_1.1V 12mA C625 *0.1U/10V_4 B +VDDAN_3.3V_HWM +3V 26mA AA4 VDDIO_AZ_S Trace width >=20 mil +VDDIO_AZ C606 0.1U/10V_4 C604 1U/6.3V_4 C627 10U/6.3V_8 C630 1U/6.3V_4 C629 0.1U/10V_4 VGA_PD is generated from FCH +3V +3VS5 +FCH_VDDPL_33_SSUSB_S M3 chipset need to stuff for support USB3.0 L50 PBY160808T-221Y-N(220,2A) C633 2.2U/6.3V_6 R477 R282 2.2K_4 +FCH_VDDAN_33_DAC_R R511 +FCH_VDDPL_33_MLDAC *0_8/S 2 C569 1U/6.3V_4 Q26 AO3404 2 C901 2.2U/6.3V_4 C637 0.022U/25V_4 +VDDAN_11_MLDAC L55 +FCH_VDDAN_11_MLDAC *0_4/S A PBY160808T-221Y-N(220,2A) VDDIO_AZ_S -- HD Audio Interface I/O power C563 2.2U/6.3V_4 SI2 , remove discharge circuit C634 0.1U/10V_4 PROJECT : R53 Quanta Computer Inc. SI , reserve for leakage issue Size Custom Document Number 4 3 2 Rev 1A Hudson-M3 POWER/GND Date: Friday, November 11, 2011 5 C893 0.1U/10V_4 233 mA Max 1 +VDDIO_AZ A VGA_POWER_DOWN +1.1V +FCH_VGA_PWR_EN Q24 ME2N7002E 1 6 VGA_POWER_DOWN 3 VGA will power down when CRT no insert Hudson-M2-A13 M3 chipset need to stuff for support USB3.0 if support Modem wake up should be change pull hi to S5 power C914 0.1U/10V_4 POWER 1 VDDCR_11_SSUSB_S : USB3.0 PHY core power C915 2.2U/6.3V_4 +FCH_VDDAN_33_DAC L71 PBY160808T-221Y-N(220,2A) R315 330K_6 C628 0.1U/10V_4 32 mA Max +FCH_VDDAN_33_DAC_R Q25 AO3404 +12VALW 3 C607 0.1U/10V_4 This circuit is for switch DAC and UMI analog power 2 1 C605 1U/6.3V_4 +3VS5 C612 2.2U/6.3V_4 C616 2.2U/6.3V_4 2 R300 N16 N17 P17 M17 N20 M20 if support USB 3.0 wake up should be change pull hi to S5 power +3VS5 C576 2.2U/6.3V_4 VDDCR_1.1_S-- 1.1V S5 Core power T12 T13 VDDAN_11_SSUSB_S : USB3.0 PHY PLL analog power *0_4 M2 chipset need to connect to GND M3 remove C888 10U/6.3V_8 +FCH_VDDAN_11_SSUSB_S_R *0_8/S PBY160808T-221Y-N(220,2A) R289 C579 0.1U/10V_4 +FCH_VDD_11_SSUSB_S C593 *0.1U/10V_4 2 +1.1VS5 C573 0.1U/10V_4 SI , AMD SR tool review M3 chipset need to stuff for support USB3.0 G24 U12 U13 PBY160808T-221Y-N(220,2A) B VDDXL_33_S C566 0.1U/10V_4 VDDIO_33_S-- 3.3v S5 I/O power TRACE WIDTH >=20mil 3 C583 10U/6.3V_8 VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8 59mA 1 C574 0.1U/10V_4 VDDAN_11_USB_S : USB PHY PLL analog power VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12 3.3V_S5 I/O PBY160808T-221Y-N(220,2A) USB L68 N18 L19 M18 V12 V13 Y12 Y13 W 11 USB SS +3VS5 G7 H8 J8 K8 K9 M9 M10 N9 N10 M12 N12 M11 C VDDAN_33_HWM_S -- Hardware monitor interface I/O power +VDDIO_3.3V +3V_AVDD_USB TRACE WIDTH >=50mil 470mA VDDAN_33_USB_S : USB PHY I/O analog power C614 0.1U/10V_4 TRACE WIDTH >=50mil VDDAN_11_SATA--SATA PHY analog/IO power 1337mA +1.1V VDDPL_11_SYS_S : System Clock Gen PLLs analog power VDDAN_11_PCIE --PCIE/UMI analog power C610 0.1U/10V_4 D Q42 *AO3416 +1.1V_PCIE_VDDR AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27 AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19 +1.1V_VDDCR TRACE WIDTH >=100mil T14 T17 T20 U16 U18 V14 V17 V20 Y17 1088mA LDO_CAP GBE LAN +3V 1007mA for M3 902mA for M2 U34C CORE S0 2 C589 C570 C586 0.1U/10V_4 22U/6.3VS_8 0.1U/10V_4 102mA PCI/GPIO I/O VDDQ--3.3V I/O power CLKGEN I/O *AO3416 3 MAIN LINK PCI EXPRESS Q46 1 1 2 +3.3V_VDDIO +3V 2 PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE. 0_8 SERIAL ATA R539 SI, add for leakage issue 3 1 Sheet 9 of 44 5 4 STRAPS PINS 3 +3VS5 +3VS5 1 10 DEBUG STRAPS OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS. +3V 2 +3VS5 D D FCH has 15K Internal Pull Up for PCI_AD[27:23] R474 10K/F_4 7 7 PCI_CLK4 LPC_CLK0 7 LPC_CLK1 6 EC_PWM2 7 CLK_RTC R274 10K/F_4 PCI_CLK3 PCI_CLK3 7 R297 *10K/F_4 PCI_CLK1 PCI_CLK1 7 R305 10K/F_4 PCI_CLK4 LPC_CLK0 7 PCI_AD27 7 PCI_AD26 7 PCI_AD25 7 PCI_AD24 7 PCI_AD23 PCI_AD27 TP100 PCI_AD26 TP55 PCI_AD25 TP56 PCI_AD24 remove reserve pull low resistor reserve test point only. TP54 PCI_AD23 TP53 LPC_CLK1 EC_PWM2 CLK_RTC R475 *10K_4 R488 10K/F_4 R490 10K/F_4 R304 10K/F_4 R292 2.2K_4 PULL HIGH R275 *2.2K_4 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 USE PCI PLL DISABLE ILA AUTORUN USE FC PLL USE DEFAULT PCIE STRAPS DISABLE PCI MEM BOOT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT BYPASS PCI PLL ENABLE ILA AUTORUN BYPASS FC PLL USE EEPROM PCIE STRAPS C C PULL LOW ENABLE PCI MEM BOOT REQUIRED STRAPS -------PULL HIGH PCI_CLK1 ALLOW PCIE Gen2 -------- -------- -------- PCI_CLK3 PCI_CLK4 USE DEBUG STRAP non_Fusion CLOCK MODE LPC_CLK0 IGNORE DEBUG STRAP FUSION CLOCK MODE EC DISABLED DEFAULT DEFAULT DEFAULT AMD internal EC ENABLED LPC_CLK1 EC_PWM2 CLKGEN ENABLED LPC ROM DEFAULT DEFAULT CLKGEN DISABLED SPI ROM CLK_RTC S5 PLUS MODE ENABLED DEFAULT PULL LOW B FORCE PCIE Gen1 -------- -------- S5 PLUS MODE DISABLED DEFAULT FCH PWRGD B +3V +3V R435 10K/F_4 1 3 2 C863 *2.2U/6.3V_6 A C861 *0.1U/10V_4 5 4,18,33 ECPWROK BAT54A 4 3 38 CPU_VRM8380_PG D22 2 FCH_PWRGD 6 U31 *74AUP1G17GW R436 A 0_4 PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 5 4 3 2 Rev 1A Hudson-M3 STRAP/PWRGD 1 Sheet 10 of 44 5 4 3 2 ANX3110 Power Up Sequence 1 11 +TRAVIS1.2V R53 +1.2V 250mA *0_8/S C63 2.2U/6.3V_4 C62 0.1U/10V_4 C61 0.1U/10V_4 C60 0.01U/25V_4 C88 2.2U/6.3V_4 C87 0.1U/10V_4 C86 0.1U/10V_4 C81 0.1U/10V_4 C53 0.1U/10V_4 C52 0.01U/25V_4 C41 0.01U/25V_4 +TRAVIS3.3V D D +TRAVIS3.3V +TRAVIS1.2V R24 +3V *0_8/S 150mA C45 2.2U/6.3V_4 C80 C54 2.2U/6.3V_4 C50 0.1U/10V_4 C44 0.1U/10V_4 C42 0.1U/10V_4 C84 0.01U/25V_4 C57 0.01U/25V_4 0.1U/10V_4 TRAVIS_RST# TRAVIS_RST# *0_4/S GPIO_0 : Define VAR_BL & BL_EN & DIGON H/W or S/W control power up timming Pull Hi for H/W mode ---chip have defined power up timing Pull Low for S/W mode -APU through DPRX port to program it 10K/F_4 R33 +TRAVIS3.3V GPIO_0 17 GPIO_1 18 GPIO_2 CLK_SEL 8 25 33 39 63 9 32 46 59 1 43 42 45 44 41 40 38 37 36 35 LVDS_CLKL_P LVDS_CLKL_N LVDS_L3_P LVDS_L3_N LVDS_L2_P LVDS_L2_N LVDS_L1_P LVDS_L1_N LVDS_L0_P LVDS_L0_N 27 26 29 28 24 23 22 21 20 19 TXLCLKOUT+ TXLCLKOUT- DDC_DATA DDC_CLK 50 49 TRAVIS_DDC_DATA TRAVIS_DDC_CLK DPRX_LN0_P DPRX_LN0_N DPRX_LN1_P DPRX_LN1_N VAR_BL BL_EN DIGON 47 15 14 VADJ R37 LVDS_BLON DISP_ON 2 ANX_PWM Q8 1 3 MMBT3904-7-F DPRX_HPD R41 48 58 CPU_VARY_BL DPRX_HPD *0_4 DPRX_HPD : ANX3110 It will transfer to Hi when power enable PWM_VADJ TXUOUT2+ TXUOUT2TXUOUT1+ TXUOUT1TXUOUT0+ TXUOUT0- TXUOUT2+ TXUOUT2TXUOUT1+ TXUOUT1TXUOUT0+ TXUOUT0- 23 23 23 23 23 23 C TXLCLKOUT+ 23 TXLCLKOUT- 23 TXLOUT2+ TXLOUT2TXLOUT1+ TXLOUT1TXLOUT0+ TXLOUT0- TXLOUT2+ 23 TXLOUT2- 23 TXLOUT1+ 23 TXLOUT1- 23 TXLOUT0+ 23 TXLOUT0- 23 1K/F_4 DPST_PWM 23 LVDS_BLON 23 DISP_ON 23 23 EDIDDATA 23 EDIDCLK TEST_EN INT_eDP_TXP0 INT_eDP_TXN0 INT_eDP_TXP1 INT_eDP_TXN1 11 4 4 4 4 R_BIAS DPRX_AUX_P DPRX_AUX_N 3 4 6 7 TXUCLKOUT+ 23 TXUCLKOUT- 23 CFG_SCL 51 CFG_SCL R44 CFG_SDA 52 CFG_SDA R45 *4.7K_4 *4.7K_4 EDIDDATA TRAVIS_DDC_DATA EDIDCLK TRAVIS_DDC_CLK remove level shift +TRAVIS3.3V B That is for debug only,can let it to NC 64 61 60 INT_eDP_TXP0 INT_eDP_TXN0 INT_eDP_TXP1 INT_eDP_TXN1 TP71 GND R38 10K/F_4 OSC_IN/100MHZ_P OSC_OUT/100MHZ_N AVSS +3V 31 30 ANX_eDP_AUXP ANX_eDP_AUXN 65 *1M/F_4 TP70 AVSS CLK_ANX_N CLK_ANX_P 0.1U/10V_4 0.1U/10V_4 TXUCLKOUT+ TXUCLKOUT- LVDS_CLKU_P LVDS_CLKU_N LVDS_U3_P LVDS_U3_N LVDS_U2_P LVDS_U2_N LVDS_U1_P LVDS_U1_N LVDS_U0_P LVDS_U0_N ANALOGIX ANX3110 62 C83 C82 PV change for brightness issue 33 16 CLK_SEL 10 10K/F_4 7 CLK_ANX_N 7 CLK_ANX_P *1M/F_4 R39 2.2k_4 APU_BLPWM TDO TD1 TMS TCK AVSS R51 +1.5V 4 54 55 57 56 120mA CLK_SEL: Pull Hi for 100MHZ clk source input Pull Low for 27MHZ crystal input R50 B RESET_L 5 4 INT_eDP_AUXP 4 INT_eDP_AUXN R23 GPIO_1 & GPIO_2 can let it to NC from vendor review POR 2 +3V ANX_TDO ANX_TDI ANX_TMS ANX_TCK TP72 TP69 TP68 TP73 C 34 12 100mA +TRAVIS1.2V AVDD33 AVDD33 AVDD33 AVDD33 AVDD33 POWER_ON_RESET C46 R27 120mA +TRAVIS3.3V DVDD12 DVDD12 DVDD12 DVDD12 0.1U/10V_4 7,29 LAN_PCIE_RST# U7 DVDD33 DVDD33 R28 13 53 50mA 1M/F_4 +TRAVIS3.3V +TRAVIS1.2V AVDD12 +TRAVIS3.3V 10ms >=10ms R_BIAS R29 47K_4 R52 12K/F_4 TEST_EN : internal pull low 1:scan test mode 0:normal mode +3V C85 100P/50V_4 R68 1K/F_4 4 FCH_LVDS_HPD FCH_LVDS_HPD R69 DPRX_HPD 0_4 A A R46 100K/F_4 PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Rev 1A ANX3110 Date: Friday, November 11, 2011 5 4 3 2 1 Sheet 11 of 44 DIMM0_SA0 DIMM0_SA1 6,13 CGCLK_SMB 6,13 CGDAT_SMB 3 3 3 B 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 M_A_ODT0 M_A_ODT1 M_A_DM[7:0] M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 +1.5VSUS +3V 3 3 M_A_EVENT# M_A_RST# R231 +VREF_DQ +VREF_DQ0 +VREF_CA0 *0_6/S +VREF_CA0 JDIM6B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 1 126 VREF_DQ VREF_CA 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 R120 H9.2mm Place these Caps near So-Dimm0. +0.75V_DDR_VTT D 2.2U/6.3V_4 C126 *0.1U/10V_4 C123 *0.047U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 *10U/6.3V_8 *10U/6.3V_8 10U/6.3VS_6 *0.047U/10V_4 *0.047U/10V_4 *0_4/S R129 *1K_4 VSS53 VSS54 205 206 +0.75V_DDR_VTT for WiMAX DDR_VTTREF 3,13,40 +1.5VSUS R235 C 0_6 +VREF_DQ0 5 +VREF_DQ_L R219 1K/F_4 C479 C480 +VREF_CA0 C472 C493 *0.47U/6.3V_4 3 + 4 - U17 1 R2381 2 *10_4 +VREF_DQ *OPA343NA/3K R245 EMI 0.1U/10V_4 +VREF_DQ *0.1U/10V_4 1K/F_4 2 C254 *100P/50V_4 150P/50V_4 C289 *100P/50V_4 C237 C301 150P/50V_4 R218 150P/50V_4 C72 C68 C65 C94 C69 C70 C92 C91 C67 EMI C114 203 204 B +3VS5 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 150P/50V_4 150P/50V_4 150P/50V_4 150P/50V_4 +3V VTT1 VTT2 A Reserved for AMD suggest +1.5VSUS for WiMAX *1K_4 +1.5VSUS C396 C365 C261 C246 C305 C276 C347 C221 C309 C236 C299 C270 C206 C205 C341 C819 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 +VREF_CA0 R116 +1.5VSUS VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 DDR3-DIMM2 DDR3-DIMM2 C 8 12 C66 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 7 C104 A 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 6 *15P/50V_4 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 5 M_A_DQ[0..63] 3 JDIM6A M_A_A[15:0] 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 PC2100 DDR3 SDRAM SO-DIMM (204P) 3 3 *15P/50V_4 2 PC2100 DDR3 SDRAM SO-DIMM (204P) 1 *10K/F_4 1000P/50V_4 R237 *0_4 R246 *0_4 D SI , change to 1000P to meet ref design C153 0.1U/10V_4 C165 1000P/50V_4 C157 PROJECT : R53 Quanta Computer Inc. 13,40 +0.75V_DDR_VTT 2,3,4,5,13,40,41,44 +1.5VSUS 2,4,6,8,9,10,11,13,14,18,23,24,25,26,27,28,29,30,31,32,33,41,42,44 +3V *0.047U/10V_4 Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A DDR3 DIMM-0 Sheet 12 8 of 44 2 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_CS#0 M_B_CS#1 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1 M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_WE# +3V R58 4.7K_4 6,12 CGCLK_SMB 6,12 CGDAT_SMB 3 3 3 M_B_ODT0 M_B_ODT1 M_B_DM[7:0] 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7 M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 109 108 79 114 121 101 103 102 104 73 74 115 110 113 DIMM1_SA0 197 DIMM1_SA1 201 202 200 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 B 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 5 M_B_DQ[0..63] JDIM5A M_B_A[15:0] A 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 PC2100 DDR3 SDRAM SO-DIMM (204P) 3 3 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 6 JDIM5B +3V 3 3 M_B_EVENT# M_B_RST# R232 +VREF_DQ +VREF_DQ1 +VREF_CA1 *0_6/S +VREF_CA1 +1.5VSUS 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 1 126 VREF_DQ VREF_CA 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VTT1 VTT2 203 204 VSS53 VSS54 205 206 A B +0.75V_DDR_VTT DDR3-DIMM1 +VREF_CA1 R122 H5.2mm 13 +1.5VSUS R113 Place these Caps near So-Dimm1. 8 3 *0_4/S DDR3-DIMM1 C 7 PC2100 DDR3 SDRAM SO-DIMM (204P) 1 *1K_4 R136 *1K_4 DDR_VTTREF 3,12,40 +1.5VSUS C +0.75V_DDR_VTT C287 C223 C274 C273 C321 C298 C300 C308 C288 C322 C251 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 C381 C220 150P/50V_4 150P/50V_4 C384 0.1U/10V_4 C77 C103 C78 C76 C71 C74 C73 C79 C102 EMI 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 *10U/6.3V_8 10U/6.3VS_6 10U/6.3VS_6 *0.047U/10V_4 *0.047U/10V_4 C101 0.1U/10V_4 C75 0.1U/10V_4 EMI request +VREF_CA1 +3V C105 C99 C107 2.2U/6.3V_4 *0.1U/10V_4 *0.047U/10V_4 D C199 0.1U/10V_4 C188 1000P/50V_4 C169 *0.047U/10V_4 C470 0.1U/10V_4 C464 1000P/50V_4 D +VREF_DQ1 SI , change to 1000P to meet ref design PROJECT : R53 Quanta Computer Inc. 12,40 +0.75V_DDR_VTT 2,3,4,5,12,40,41,44 +1.5VSUS 2,4,6,8,9,10,11,12,14,18,23,24,25,26,27,28,29,30,31,32,33,41,42,44 +3V Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A DDR3 DIMM-1 Sheet 13 8 of 44 5 4 3 2 1 14 U26A PART 1 0F 9 2 2 PEG_TXP0 PEG_TXN0 AA38 Y37 PCIE_RX0P PCIE_TX0P PCIE_RX0N PCIE_TX0N 2 2 PEG_TXP1 PEG_TXN1 Y35 W 36 PCIE_RX1P PCIE_TX1P PCIE_RX1N PCIE_TX1N 2 2 PEG_TXP2 PEG_TXN2 W 38 V37 PCIE_RX2P PCIE_TX2P PCIE_RX2N PCIE_TX2N 2 2 PEG_TXP3 PEG_TXN3 V35 U36 PCIE_RX3P PCIE_TX3P PCIE_RX3N PCIE_TX3N 2 2 PEG_TXP4 PEG_TXN4 U38 T37 PCIE_RX4P PCIE_TX4P PCIE_RX4N PCIE_TX4N 2 2 PEG_TXP5 PEG_TXN5 T35 R36 PCIE_RX5P PCIE_TX5P PCIE_RX5N PCIE_TX5N 2 2 PEG_TXP6 PEG_TXN6 R38 P37 PCIE_RX6P PCIE_TX6P PCIE_RX6N PCIE_TX6N 2 2 PEG_TXP7 PEG_TXN7 P35 N36 PCIE_RX7P PCIE_TX7P PCIE_RX7N PCIE_TX7N N38 M37 PCIE_RX8P PCIE_TX8P PCIE_RX8N PCIE_TX8N M35 L36 PCIE_RX9P L38 K37 PCIE_RX10P K35 J36 PCIE_RX11P PCIE_TX11P PCIE_RX11N PCIE_TX11N J38 H37 PCIE_RX12P PCIE_TX12P PCIE_RX12N PCIE_TX12N H35 G36 PCIE_RX13P PCIE_TX13P PCIE_RX13N PCIE_TX13N G38 F37 PCIE_RX14P PCIE_TX14P PCIE_RX14N PCIE_TX14N F35 E37 PCIE_RX15P PCIE_TX15P PCIE_RX15N PCIE_TX15N Y33 Y32 C_PEG_RXP0 C_PEG_RXN0 C364 C348 0.1U/10V_4 0.1U/10V_4 W 33 W 32 C_PEG_RXP1 C_PEG_RXN1 C409 C404 0.1U/10V_4 0.1U/10V_4 U33 U32 C_PEG_RXP2 C_PEG_RXN2 C425 C419 0.1U/10V_4 0.1U/10V_4 U30 U29 C_PEG_RXP3 C_PEG_RXN3 C406 C410 0.1U/10V_4 0.1U/10V_4 T33 T32 C_PEG_RXP4 C_PEG_RXN4 C433 C439 0.1U/10V_4 0.1U/10V_4 T30 T29 C_PEG_RXP5 C_PEG_RXN5 C429 C434 0.1U/10V_4 0.1U/10V_4 P33 P32 C_PEG_RXP6 C_PEG_RXN6 C442 C436 0.1U/10V_4 0.1U/10V_4 P30 P29 C_PEG_RXP7 C_PEG_RXN7 C444 C448 0.1U/10V_4 0.1U/10V_4 PEG_RXP0 2 PEG_RXN0 2 D C PCI EXPRESS INTERFACE D PCIE_RX9N PCIE_RX10N PCIE_TX9P PCIE_TX9N PCIE_TX10P PCIE_TX10N PEG_RXP1 2 PEG_RXN1 2 PEG_RXP2 2 PEG_RXN2 2 PEG_RXP3 2 PEG_RXN3 2 PEG_RXP4 2 PEG_RXN4 2 PEG_RXP5 2 PEG_RXN5 2 PEG_RXP6 2 PEG_RXN6 2 PEG_RXP7 2 PEG_RXN7 2 N33 N32 C N30 N29 L33 L32 L30 L29 K33 K32 J33 J32 K30 K29 Chelsea Only Do not install For Thames B H33 H32 R171 Ra B *1.69K/F_4 +1.0V_VGA CLOCK CLK_VGA_P CLK_VGA_N 7 CLK_VGA_P 7 CLK_VGA_N AB35 AA36 PCIE_REFCLKP PCIE_REFCLKN Do not install for Chelsea Install for Thames ONLY CALIBRATION 1K/F_4 R115 AH16 TEST_PG PCIE_CALR_TX Y30 PCIE_CALRP R172 PCIE_CALR_RX Y29 PCIE_CALRN R170 Rb 1.27K/F_4 2K/F_4 +1.0V_VGA Rc Install 2k for Thames PEGX_RST# AA30 PERSTB Thames XT_M2 Chelsea +3V C327 0.1U/10V_4 1.69K Rb n/a Rc 1K Thames n/a 1.27K 2K 5 U13 MC74VHC1G08DFT2G Ra A A 6 2 GPU_RST# VGA_RSTB 4 R179 330_4 DGPU_HIN_RST# 16,18,19,44 +1.0V_VGA PEGX_RST# 1 15,16,18,19,43 3 7 R173 +1.8V_VGA Size Custom Document Number 3 2 Rev 1A Chelsea_PCIE_Interface Date: Monday, November 14, 2011 4 +1.8V_VGA PROJECT : R53 Quanta Computer Inc. 100K_4 5 +1.0V_VGA Sheet 1 14 of 44 5 MEM_ID[3:0] Vendor 0000 0001 0010 0011 0100 0101 0110 0111 D 4 Type Hynix- D die Micron- G die Samsung- G die Hynix- D die Micron- D die Samsung- C die 3 H5TQ1G63DFR-11C MT41J64M16JT-107G:G K4W1G1646G-BC11 H5TQ2G63DFR-11C MT41J128M16HA-107G:D K4W2G1646C-HC11 15 U26B PART 2 0F 9 MUTI GFX GENLK_CLK GENLK_VSYNC 17 GENLK_CLK 17 GENLK_VSYNC AD29 AC29 GENLK_CLK TXCAP_DPA3P GENLK_VSYNC TXCAM_DPA3N AU24 AV23 SWAPLOCKA TX0M_DPA2N DPA SWAPLOCKB TX1M_DPA1N 1010 1011 1100 1101 1110 1111 +1.8V_VGA Memory ID R363 R361 R362 R360 PWRCNTL 2 Thames-XT L M 0 0 0 H PWRCNTL 0 0 0 0.9V 0 1 VGA CORE 1.0V 1 1 0 0.875V 1 +3V_DELAY R151 0.85V 4.7K_4 R141 0 1 1 MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3 GPIO15 PWRCNTL 1 0 10K/F_4 10K/F_4 *10K/F_4 *10K/F_4 0 0 4.7K_4 0.8V 1 30 30 0.75V AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12 DVPCNTL_MVP_0 TX2M_DPA0N DVPCNTL_0 DVPCNTL_1 AR30 AT29 TXCBP_DPB3P DVPCNTL_2 TXCBM_DPB3N DVPCLK DVPDATA_0 AV31 AU30 TX3P_DPB2P DVPDATA_1 TX3M_DPB2N DPB DVPDATA_2 DVPDATA_3 TX4P_DPB1P DVPDATA_4 TX4M_DPB1N AR32 AT31 DVPDATA_5 DVPDATA_6 TX5P_DPB0P DVPDATA_7 TX5M_DPB0N AT33 AU32 DVPDATA_8 DVPDATA_9 TXCCP_DPC3P DVPDATA_10 TXCCM_DPC3N AU14 AV13 DVPDATA_11 DVPDATA_12 TX0P_DPC2P DVPDATA_13 TX0M_DPC2N DVPDATA_14 DPC DVPDATA_15 AT15 AR14 AU16 AV15 TX1P_DPC1P DVPDATA_16 TX1M_DPC1N DVPDATA_17 DVPDATA_18 TX2P_DPC0P DVPDATA_19 TX2M_DPC0N AT17 AR16 DVPDATA_20 DVPDATA_21 TXCDP_DPD3P DVPDATA_22 TXCDM_DPD3N AU20 AT19 DVPDATA_23 AT21 AR20 TX3P_DPD2P GPUT_CLK GPUT_DATA TX3M_DPD2N GPUT_CLK GPUT_DATA R123 R127 +3V_DELAY 4.7K_4 4.7K_4 AJ23 AH23 TX4M_DPD1N TP9 TP7 SCL I2C SDA R R125 R147 *10K/F_4 10K/F_4 R114 GPIO5 10K/F_4 DGPU_TDI R146 10K/F_4 DGPU_TMS R133 33 GPU_AC_BATT R121 *0_4 10K/F_4 17 GPIO8 17 GPIO9 17 GPIO11 17 GPIO12 17 GPIO13 DGPU_TCK TP74 TP76 42 GFX_CORE_CNTRL0 42 GFX_CORE_CNTRL2 4 VGA_ALERT TP75 +3V_DELAY R85 *3.01K/F_4 42 GFX_CORE_CNTRL1 17 GPIO21 17 GPIO22 GPIO22(ROMCS#) 3-k external pull up is required if an external BIOS ROM chip is used. Must be unconnected if no external BIOS ROM chip is used GPIO22 GPIO5 AH17 AJ17 AK17 GPIO8 AJ13 GPIO9 AH15 GPIO10 AJ16 GPIO11 AK16 GPIO12 AL16 GPIO13 AM16 HDMI_HP2 AM14 GFX_CORE_CNTRL0 AM13 GFX_CORE_CNTRL2 AK14 VGA_ALERT AG30 HPD3 AN14 TEMP_FAIL AM17 GFX_CORE_CNTRL1 AL13 GPIO21 AJ14 GPIO22 AK13 GPIO_23_CLKREQb AN13 DGPU_TRSTB R144 AH20 AH18 AN16 AVSSN#1 GPIO_1 G GPIO_2 AVSSN#2 GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON AVSSN#3 DAC1 GPIO_8_ROMSO VSYNC GPIO29, GPIO30 are NC on Thames R143 10K/F_4 GENERICC TEMP_FAIL R128 R130 TP80 AMD debug only TP81 HSYNC_COM_R VSYNC_COM_R GPU_HSYNC_COM GPU_VSYNC_COM 17 17 GPIO_10_ROMSCK GPIO_11 AB34 RSET R374 499/F_4 GPIO_12 GPIO_13 GPIO_14_HPD2 +1.8V_AVDD_Q AD34 AE34 AVDD AVSSQ +1.8V_AVDD_Q DAC1 Analog Power AVDD : 1.8V @ 18mA GPIO_15_PWRCNTL_0 GPIO_16 VDD1DI GPIO_17_THERMAL_INT VSS1DI AC33 AC34 +VDDD1 +1.8V_AVDD_Q +VDDD1 +1.8V_VGA GPIO_18_HPD3 L25 *0_4/S GPIO_19_CTF GPIO_20_PWRCNTL_1 NC#1 GPIO_21 NC#2 GPIO_22_ROMCSB NC#3 CLKREQB NC#4 V13 U13 AC31 AD30 AC32 AD32 AF32 AA29 AG21 AG32 AG33 GPIO_29 NC#7 GPIO_30 NC#8 AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24 GENERICA AC30 CEC_1 AK24 HPD1 GENERICC GENERICD GENERICE_HPD4 AF33 NC_TSVSSQ C283 *10U/6.3VS_6 SI , change to short pad C269 C249 1U/6.3V_4 0.1U/10V_4 DAC1 Digital Power. VDD1DI : 1.8V @ 117mA L26 Thames INSTALL, do not install for Chelsea PS_0 should be tied to GND on Thames GENERICB R378 0_4 R372 0_4 +VDDD1 *0_4/S C282 *10U/6.3VS_6 C265 C264 1U/6.3V_4 0.1U/10V_4 GENERICF_HPD5 GENERICG_HPD6 AM34 PS_0 +1.8V_VGA TP83 AE36 AD35 F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 GPIO_9_ROMSI NC#9 GENERICC MLPS AD31 PS_1 TP78 SI , change to DNI TP82 499/F_4 249/F_4 +0.6V_VREFG AH13 VREFG AG31 PS_2 TP77 TP8 BACO C198 GFX_CORE_CNTRL0 R62 0.1U/10V_4 18 AL21 PX_EN PX_EN AD33 PS_3 R61 *3.01K/F_4 GFX_CORE_CNTRL2 R63 *3.01K/F_4 +3V_DELAY R166 DEBUG *5.1K/F_4 DDC/AUX AM26 AN26 DDC1CLK DDC1DATA TESTEN TP22 AD28 TESTEN AM23 AN23 AK23 AL24 AM24 JTAG_TRSTB AM27 AL27 AUX1P R168 Reserve for Power Play 1K/F_4 DGPU_TRSTB DGPU_TDI DGPU_TCK DGPU_TMS DGPU_TDO TP13 TP12 TP11 TP14 TP15 AUX1N AM19 AL19 DDC2CLK JTAG_TDI DDC2DATA JTAG_TCK JTAG_TMS AUX2P JTAG_TDO AUX2N AN20 AM20 AL30 AM30 DDCCLK_AUX3P DDCDATA_AUX3N THERMAL SI, update P/N for EOD issue A TP79 *3.01K/F_4 GFX_CORE_CNTRL1 AF29 AG29 +1.8V_TSVDD +1.8V_VGA 1.8V(8mA TSVDD) DDCDATA_AUX4N C281 GPIO28 GPIO28 C280 AK32 GPIO_28_FDO AL31 TS_A AJ32 AJ33 TSVDD 1U/6.3V_4 +1.8V_TSVDD 0.1U/10V_4 GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VSS_MECH GND VSS_MECH GND VSS_MECH A39 AW1 AW39 AJ30 AJ31 DDCVGADATA 14,16,18,19,44 +1.0V_VGA 16,18,19,43 +1.8V_VGA PROJECT : R53 Quanta Computer Inc. +1.0V_VGA TSVSS 17,18,42 +3V_DELAY +1.8V_VGA +3V_DELAY Size Custom Document Number 3 2 Rev 1A Chelsea_Main & GND Date: Friday, November 11, 2011 4 B Thames XT_M2 Thames XT_M2 5 C AK30 AK29 DDCDATA_AUX6N DDCVGACLK 10U/6.3V_8 GND PCIE_VSS A AN21 AM21 DDCCLK_AUX6P C284 PCIE_VSS D DMINUS DDCDATA_AUX5N 17 L27 GND A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL29 AM29 DDCCLK_AUX4P DPLUS DDCCLK_AUX5P TI160808U121(120,2.5A) GND PCIE_VSS GND AD39 AD37 AC36 AC38 HSYNC NC#6 17 GND PCIE_VSS GND AF37 AE38 NC#5 B PCIE_VSS GND GPIO_0 B *10K/F_4 GND GND Reserve for GENERAL PURPOSE I/O GPIO0 GPIO1 GPIO2 17 GPIO0 17 GPIO1 17 GPIO2 GPIO_23_CLKREQb GND PCIE_VSS GND AK26 AJ26 +3V_DELAY *10K/F_4 GND PCIE_VSS AT23 AR22 TX5P_DPD0P TX5M_DPD0N R138 GND PCIE_VSS AU22 AV21 TX4P_DPD1P SMBus SMBDATA PCIE_VSS GND DPD SMBCLK C Access to SMBBus ans SDA/SCL is mandatory on all designs Add test points on SMBBus and SDA/SCL for debug AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39 AT27 AR26 TX2P_DPA0P DVPCNTL_MVP_1 PART 6 0F 9 AU26 AV25 TX1P_DPA1P 1000 1001 U26F AT25 AR24 TX0P_DPA2P GPIO20 1 Vendor P/N 64Mx16 *8, 900Mhz 64Mx16 *8, 900Mhz 64Mx16 *8, 900Mhz 128Mx16 *8, 900Mhz 128Mx16 *8, 900Mhz 128Mx16 *8, 900Mhz AJ21 AK21 GPIO16 2 1 Sheet 15 of 44 5 4 3 2 1 16 Memory Type 27-MHz (± 30 ppm) crystal connected to XTALIN/XTALOUT, or 27-MHz (1.8 V) oscillator connected to XTALIN. 27-MHz (3.3 V) oscillator connected to XO_IN, and 100-MHz (3.3 V) oscillator connected to XO_IN2. (By default, this clock should not be spread since internal spreading is used.) DDR3 +1.8V_DPLL_PVDD D Display Phase Lock Loop Power DPLL_PVDD : 1.8V @ 75mA BLM18PG471SN1D/1A_6 +1.8V_DPLL_PVDD +1.8V_VGA GDDR5 D L24 C256 C228 10U/6.3V_8 C257 0.1U/10V_4 1U/6.3V_4 U26I PART 9 0F 9 SI , follow Thames design +1.0V_DPLL_VDDC C241 C215 10U/6.3V_8 1U/6.3V_4 1.0V(125mA DPLL_VDDC) DPLL_VDDC : 0.935V @ 140mA AM32 DPLL_PVDD +1.0V_DPLL_VDDC AN31 DPLL_VDDC AN32 DPLL_PVSS XTALIN 22P/50V_4 R368 1M_6 C214 0.1U/10V_4 DPLL_PVSS C C712 Y7 27MHZ C XTALOUT +1.8V_MPLL_PVDD C717 EVGA-XTALO AU34 22P/50V_4 MPLL_PVDD : 1.8V @ 150mA BLM18PG471SN1D/1A_6 +1.8V_MPLL_PVDD +1.8V_VGA EVGA-XTALI AV33 1 BLM18PG471SN1D/1A_6 2 L21 +1.0V_VGA L36 H7 H8 MPLL_PVDD AM10 SPLL_PVDD MPLL_PVDD C471 C477 0.1U/10V_4 1U/6.3V_4 XO_IN +1.8V_SPLL_PVDD BLM15BD121SN1D(120,300MA) SPLL_PVDD : 1.8V @ 75mA L18 AN9 SPLL_VDDC AN10 SPLL_PVSS PLLS/XTAL C487 10U/6.3V_8 AW34 R156 XO_IN2 0_4 AW35 +1.8V_SPLL_PVDD +1.8V_VGA C168 C163 10U/6.3V_8 B 1U/6.3V_4 C179 0.1U/10V_4 B CLKTESTA AF30 AF31 NC_XTAL_PVDD CLKTESTB AK10 CLKTESTA AL10 CLKTESTB NC_XTAL_PVSS +1.0V_SPLL_VDDC SPLL_VDDC : 0.935V @ 150mA +1.0V_VGA L20 1.0V(125mA DPLL_VDDC) C213 C233 10U/6.3V_8 1U/6.3V_4 C189 *0.1U/10V_4 +1.0V_SPLL_VDDC BLM18PG471SN1D/1A_6 C245 0.1U/10V_4 Thames XT_M2 SPLL_PVSS Debug only, for clock observation, R124 if not needed, DNI *51.1/F_4 C230 *0.1U/10V_4 +1.8V_VGA 15,18,19,43 +1.8V_VGA route 50ohms single-ended/ 100ohms diff and keep short A +1.0V_VGA 14,18,19,44 +1.0V_VGA R135 *51.1/F_4 Size Custom Document Number Rev 1A Chelsea_XTAL Date: Monday, November 14, 2011 5 4 3 2 A PROJECT : R53 Quanta Computer Inc. Sheet 1 16 of 44 5 4 3 2 1 U26G 17 PART 7 0F 9 VARY_BL LVDS CONTROL DIGON TXCLK_UP_DPF3P TXCLK_UN_DPF3N TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N AK27 AJ27 CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS AJ38 AK37 MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour 0: Enable MLPS, disable GPIO PINSTRAP 1: Disable MLPS, enable GPIO PINSTRAP TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable 0: 50% Tx output swing 1: Full Tx output swing TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable 0: Tx de-emphasis disabled 1: Tx de-emphasis enabled X BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 0: GEN3 not supported at power-on 1: GEN3 supported at power-on 1 BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0: VGA controller capacity enabled 1: VGA controller capacity disabled (for multi-GPU) 0 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] D TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N TXOUT_U3P LVTMDP TXOUT_U3N TXCLK_LP_DPE3P TXCLK_LN_DPE3N TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N TXOUT_L3P TXOUT_L3N Default Setting AK35 AL36 AH35 AJ36 AG38 AH37 AF35 AG36 AP34 AR34 AW37 AU35 AR37 AU39 AP35 AR35 AN36 AP37 Thames XT_M2 X D X Serial ROM type or Memory Aperture Size Select If GPIO22 = 0, defines memory aperture size If GPIO22 = 1, defines ROM type 100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST) 101 - 2Mbit M25P20 (ST) 101 - 4Mbit M25P40 (ST) 101 - 8Mbit M25P80 (ST) 100 - 512Kbit Pm25LV512 (Chingis) 101 - 1Mbit Pm25LV010 (Chingis) XXX BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device 0: Disabled 1: Enabled X AUD[1] AUD[0] NA NA HSYNC VSYNC 00 - No audio function 01 - Audio for DP only 10 - Audio for DP and HDMI if dongle is detected 11 - Audio for both DP and HDMI HDMI must only be enabled on systems that are legally entitled. It is the responsibility of the system designer to ensure that the system is entitled to support this feature. XX CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour 0: Disabled 1: Enabled RESERVED RESERVED RESERVED RESERVED PS_1[3] PS_1[2] NA NA GENLK_CLK GPIO8 GPIO21 GENERICC Reserved Reserved Reserved Reserved (for Thames/Whistler/Seymour only) C C SI , default setting should be PU from AMD SCH review result 15 GPIO0 GPIO0 R134 10K_4 15 GPIO1 GPIO1 R131 10K_4 GPIO2 R97 *10K_4 GPIO9 R126 *10K_4 GPIO13 R100 *10K_4 GPIO12 R101 *10K_4 GPIO11 R96 10K_4 GPIO22 R90 *10K_4 15 GPIO2 15 GPIO9 15 GPIO13 15 GPIO12 15 GPIO11 15 GPIO22 15 GENLK_VSYNC 15 GPU_HSYNC_COM 15 GPU_VSYNC_COM 15 GENLK_CLK B +3V_DELAY 15 GPIO8 GPIO8 15 GENERICC 15 GPIO21 15 GPIO28 R86 *10K_4 R169 *10K_4 R385 *10K_4 R87 *10K_4 R98 *10K_4 R139 *10K_4 GPIO21 R99 *10K_4 GPIO28 R154 10K_4 X NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET AUD_PORT_CONN_PINSTRAP[2] AUD_PORT_CONN_PINSTRAP[1] AUD_PORT_CONN_PINSTRAP[0] PS_3[5] PS_3[4] PS_0[5] NA NA NA 0 0 0 0 STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS 111 = 0 usable endpoints 110 = 1 usable endpoints 101 = 2 usable endpoints 100 = 3 usable endpoints 011 = 4 usable endpoints 010 = 5 usable endpoints 001 = 6 usable endpoints 000 = all endpoints are usable XXX B Power Up/Down Sequence Memory Aperture size GPIO9 GPIO13 GPIO12 GPIO11 BIOSROM A ROMIDCFG2 ROMIDCFG1 ROMIDCFG0 128M 256M 64M 32M 512M 1G 2G 4G 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 +VGA_CORE VDDC +VGA_CORE VDDCI +1.5V_VGA VDDR1 +3.3V_Delay VDDR3 +1.8V_VGA VDDR4 +1.8V_VGA VDD_CT A 20ms PROJECT : R53 Quanta Computer Inc. 20ms It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0. Size Custom Document Number 5 4 3 2 Rev 1A Chelsea_LVDS / STRAP Date: Friday, November 11, 2011 Sheet 1 17 of 44 4 3 2 +PCIE_VDDR1 PART 5 0F 9 D C498 10U/6.3VS_6 C866 10U/6.3VS_6 C820 10U/6.3VS_6 C291 10U/6.3VS_6 C558 10U/6.3VS_6 Reserve for Drop *330u_2.5V_3528 C523 1 C767 C690 *22U/6.3VS_8 1 C455 *22U/6.3VS_8 + C537 *22U/6.3VS_8 C865 *22U/6.3VS_8 2 C749 *22U/6.3VS_8 *330u_2.5V_3528 C867 *22U/6.3VS_8 2 C176 *22U/6.3VS_8 + C524 *22U/6.3VS_8 L29 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_BIF_VDDC VDDR1 NC_BIF_VDDC VDDR1 PCIE_PVDD VDDR1 VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 BIF_VDDC BACO VDDR1 BIF_VDDC VDDR1 VDDC CORE VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDC LEVEL TRANSLATION VDDC AF26 AF27 AG26 AG27 VDD_CT VDDC VDD_CT VDDC VDD_CT VDDC VDD_CT VDDC AF23 AF24 AG23 AG24 VDDR3 VDDC VDDR3 VDDC VDDR3 VDDC VDDR3 VDDC VDDC VDDC VDDC I/O L22 VDDR3 : 3.3V @ 60mA *0_6/S VDDC VDDC DVP C SI , change to short pad C231 *10U/6.3VS_6 C227 1U/6.3V_4 C252 1U/6.3V_4 C258 1U/6.3V_4 VDDC AD12 AF11 AF12 AF13 VDDR4 AF15 AG11 AG13 AG15 VDDR4 VDDC VDDR4 VDDC VDDR4 VDDC VDDR4 VDDC VDDC VDDR4 VDDC VDDR4 VDDC VDDC VDDC VDDR4 : 1.8V @ 300mA *0_6/S VDDC C248 *10U/6.3VS_6 C247 C263 *10U/6.3VS_6 1U/6.3V_4 C262 C329 1U/6.3V_4 0.1U/10V_4 +1.8V_VGA PCIe Digital Power Supply PCIE_VDDC : 0.935V @ 1.88A (GEN2.0) PCIE_VDDC : 0.935V @ 2.5A (GEN3.0) +1.0V_VGA C422 C415 C435 C375 C395 C377 C394 C416 C335 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C393 C376 C336 C337 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 BIF_VDDC R400 R411 N27 T27 Ra Rb D +1.0V_VGA C340 10U/6.3VS_6 C382 10U/6.3VS_6 *0_8 *0_8 Rc Rd Chelsea-non BACO install na na na Chelsea-BACO install na Ra na na +VGA_CORE Rb AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 SI , change to 0805 size +VGA_CORE Thames-non BACO na install install install Thames-BACO na na install install C374 C414 C392 C413 C390 C373 C389 C372 C421 C412 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C331 C243 C232 C391 C411 C371 C332 C333 C218 C388 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C VDDR4 +VDDR4 L23 C752 10U/6.3VS_6 VDDR1 C302 C296 C295 C297 C294 *10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 +3V_VGA C751 10U/6.3VS_6 VDDR1 VDDC +3V_DELAY C753 C754 C755 C756 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 1U/6.3V_4 Rd L63 BLM15BD121SN1D(120,300MA) L30 BIF_VDDC *BLM15BD121SN1D(120,300MA) VDDR1 VDDC *0_4/S G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28 18 BLM15BD121SN1D(120,300MA) +PCIE_VDDR2 VDDR1 VDDC VDDC_CT: 1.8V @250mA +1.8V_VDD_CT +1.8V_VGA VDDR1 AA31 AA32 AA33 AA34 W30 Y31 V28 W29 AB37 C328 0.1U/10V_4 VDDC VDDC VDDC VDDC VDDC VDDC VDDC SI , change to DNI VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC AH22 AH27 AH28 M26 N24 R18 R21 R23 R26 T17 T20 T22 T24 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 C186 C197 C386 C326 C334 C181 C369 C268 C370 C209 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C344 10U/6.3VS_6 C200 10U/6.3VS_6 C253 10U/6.3VS_6 C202 10U/6.3VS_6 C324 10U/6.3VS_6 SI , add for voltage drop 1 C431 10U/6.3VS_6 NC_PCIE_VDDR +1.8V_VGA PCIe I/O power. PCIE_VDDR : 1.8V @ 200mA C343 10U/6.3VS_6 C212 10U/6.3VS_6 C240 10U/6.3VS_6 C225 10U/6.3VS_6 + C387 2 C438 C556 C741 C864 C496 C766 C357 C495 C747 C555 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VDDR1 PCIE AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7 Chelsea uninstall Thames install Rc L62 MEM I/O I/O power for the memory interface. 1 Chelsea uninstall Thames install, total 440mA U26E VDDR1 , 1.5V @ 2A, GDDR5 900MHz 330u_2.5V_3528 5 +1.5V_VGA +VDDCI +VGA_CORE VDDCI 0.8-1.15V @ 6A VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI B VDDCI VOLTAGE SENESE 44 PX_MODE1 FB_VDDC AG28 FB_VDDCI AH29 FB_GND VDDCI ISOLATED CORE I/O AF28 VDDCI VDDCI VDDCI VDDCI VDDCI 6 VDDCI VDDCI VDDCI Q48B 2N7002DW-7-F 2 VDDCI VDDCI VDDCI 1 PX_EN Dual VDDCI AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13 L31 UPB201212T-121Y-N(120,100M,5A)_8 C330 C417 C378 C351 C368 C420 C407 C426 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 B C427 10U/6.3VS_6 C424 10U/6.3VS_6 C432 10U/6.3VS_6 C405 C383 1U/6.3V_4 1U/6.3V_4 20,21,22,44 14,16,19,44 15,16,19,43 30,44 42 Thames XT_M2 PX_MODE R60 *0_4 +1.5V_VGA +1.0V_VGA +1.8V_VGA +3V_VGA +VGA_CORE +1.5V_VGA +1.0V_VGA +1.8V_VGA +3V_VGA +VGA_CORE PX_MODE1 +5V +5V R420 3 3 3 2 2 Q52B PX_MODE 2N7002DW-7-F 2N7002DW-7-F +VGA_CORE C799 22U/6.3VS_8 1 C800 C801 1U/6.3V_4 1U/6.3V_4 BACO_EN A 3 SI , Q20,Q38 change to dual type MOS Q62 Note1. 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra) MC74VHC1G08DFT2G 4,10,33 ECPWROK PX_EN = 0, for Normal Operation PX_EN = 1, for BACO MODE 2. BACO Support: Refer to the BACO reference schematics/Application note for detail about BIF_VDDC Rail if BACO is Supported (Uninstall Ra) PROJECT : R53 Quanta Computer Inc. Size Custom Document Number 4 3 2 Rev 1A Chelsea_Power & BACO Date: Monday, November 14, 2011 5 C792 10U/6.3VS_6 Dual 1 U28 SI , Q12,Q13 change to dual type MOS Q48 Q37 AO3416 AO3416 1 PX_EN## 4 3 1 5.1K/F_4 BIF_VDDC 1 0.1U/10V_4 2 7,33,42,43,44 DGPU_PWROK 2N7002DW-7-F Dual 2N7002DW-7-F 5 Dual 2N7002DW-7-F R78 Q19 Q62A 2 1 +3V 5 C822 4 Q35 AO3416 3 5 4 3 Q48A Q62B 2 Q52A 5 A 1 PX_EN# Dual Dual 4 PX_EN 0_4 6 15 R74 3 PX_MODE PX_EN## PX_EN# +1.0V_VGA 100K/F_4 6 R70 *10K_4 R410 1K_4 R409 1K_4 SI , Q39,Q40 change to dual type MOS Q20 2 +3V 42 Q36 AO3416 +3V 2 Support BACO Mode 1 Sheet 18 of 44 5 4 3 2 1 For Thames a dedicated BEAD is required for each DPAB_VDD10, DPCD_VDD10, DPEF_VDD10 For Thames a dedicated BEAD is required for each DPAB_VDD18, DPCD_VDD18, DPEF_VDD18 U26H DPAB_VDD10 DP/TMDS/LVDS Transmitter Power 0.935V@222mA per port PART 8 0F 9 D DP/TMDS/LVDS Transmitter Power HDMI mode: 1.8V@237mA per port +1.8V_VGA DP mode: 1.8V@188mA per port DP_VDDR *0_4/S D DP_VDDC DP_VDDC DP_VDDC DP_VDDC *0_4/S AN24 AP24 AP25 AP26 AU28 AV29 C709 C711 C714 *10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 +1.8V_VGA DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDC C699 C708 C702 *10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 +1.8V_VGA AP20 AP21 AP22 AP23 AU18 AV19 DP_VDDR DP_VDDC DP_VDDR DP_VDDC L61 AH34 AJ34 AF34 AG34 AM37 AL38 DP_VDDR DP_VSSR C732 C728 C733 *10U/6.3VS_6 1U/6.3V_4 0.1U/10V_4 DP_VDDR DP_VSSR DP_VDDR SI , change to short pad DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR CALIBRATION DP_VSSR DP_VSSR B DP_VSSR DPAB_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR 150/F_4 AW18 DPCD_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR R377 150/F_4 AM39 *0_4/S C710 C706 0.1U/10V_4 1U/6.3V_4 L58 C700 *10U/6.3VS_6 SI , change to short pad DP/TMDS/LVDS Transmitter Power 0.935V@222mA per port +1.0V_VGA L28 DP GND DP_VSSR R365 +1.0V_VGA DP/TMDS/LVDS Transmitter Power 0.935V@222mA per port DPCD_VDD10 *0_4/S DP_VDDR SI , change to DNI 150/F_4 AW28 C720 *10U/6.3VS_6 DP_VDDR DP_VSSR R150 C722 C721 0.1U/10V_4 1U/6.3V_4 DPEF_VDD10 DP_VSSR *0_4/S AL33 AM33 AK33 AK34 DP_VDDR DPEF_VDD18 C AP13 AT13 AP14 AP15 DP_VDDR DP_VDDC *0_4/S AP31 AP32 AN33 AP33 DP_VDDR DPCD_VDD18 L57 L60 DP_VDDC DPAB_VDD18 L59 19 +1.0V_VGA DPEF_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR AN27 AP27 AP28 AW24 AW26 AN29 AP29 AP30 AW30 AW32 AN17 AP16 AP17 AW14 AW16 AN19 AP18 AP19 AW20 AW22 AN34 AP39 AR39 AU37 AF39 AH39 AK39 AL34 AV27 AR28 AV17 AR18 AN38 AM35 C279 C278 0.1U/10V_4 1U/6.3V_4 C277 *10U/6.3VS_6 C SI , change to DNI B Thames XT_M2 A A PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Monday, November 14, 2011 5 4 3 2 Rev 1A Chelsea_DP Powers Sheet 1 19 of 44 4 21 21 VMA_RAS0# VMA_RAS1# VMA_RAS0# VMA_RAS1# 21 21 VMA_CAS0# VMA_CAS1# VMA_CAS0# VMA_CAS1# 21 21 VMA_WE0# VMA_WE1# VMA_WE0# VMA_WE1# VMA_CS0# 21 VMA_CS1# PART 3 0F 9 21 21 VMA_CKE0 VMA_CKE1 VMA_CLK0 VMA_CLK0# 21 21 VMA_CKE0 VMA_CKE1 VMA_CLK0 VMA_CLK0# VMA_CLK1 VMA_CLK1# VMA_WDQS[7..0] 21 VMA_WDQS[7..0] VMA_RDQS[7..0] 21 VMA_RDQS[7..0] VMA_DM[7..0] 21 VMA_DM[7..0] VMA_DQ[63..0] 21 VMA_DQ[63..0] VMA_MA[13..0] 21 VMA_MA[13..0] 21 21 21 VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63 VMA_CS1# VMA_CLK1 VMA_CLK1# VMA_BA0 VMA_BA1 VMA_BA2 VMA_BA0 VMA_BA1 VMA_BA2 C +1.5V_VGA R233 40.2/F_4 R228 C490 1U/6.3V_4 22 22 VMB_ODT0 VMB_ODT1 22 22 VMB_RAS0# VMB_RAS1# 2 100/F_4 PLACE MVREFD DIVIDERS AND CAPS CLOSE TO ASIC +1.5V_VGA R234 C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5 DQA0_0 MAA0_0/MAA_0 DQA0_1 MAA0_1/MAA_1 DQA0_2 MAA0_2/MAA_2 DQA0_3 MAA0_3/MAA_3 DQA0_4 MAA0_4/MAA_4 DQA0_5 MAA0_5/MAA_5 DQA0_6 MAA0_6/MAA_6 DQA0_7 MAA0_7/MAA_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_BA2 MAA1_6/MAA_BA0 MAA1_7/MAA_BA1 G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1 DQA0_16 DQA0_17 WCKA0_0/DQMA_0 DQA0_18 WCKA0B_0/DQMA_1 DQA0_19 WCKA0_1/DQMA_2 DQA0_20 WCKA0B_1/DQMA_3 DQA0_21 WCKA1_0/DQMA_4 DQA0_22 WCKA1B_0/DQMA_5 DQA0_23 WCKA1_1/DQMA_6 DQA0_24 WCKA1B_1/DQMA_7 A32 C32 D23 E22 C14 A14 E10 D9 VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7 C34 D29 D25 E20 E16 E12 J10 D7 VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7 DQA0_25 DQA0_26 EDCA0_0/QSA_0 DQA0_27 EDCA0_1/QSA_1 DQA0_28 EDCA0_2/QSA_2 DQA0_29 EDCA0_3/QSA_3 DQA0_30 EDCA1_0/QSA_4 DQA0_31 EDCA1_1/QSA_5 DQA1_0 EDCA1_2/QSA_6 DQA1_1 EDCA1_3/QSA_7 22 22 22 22 22 22 22 22 22 22 22 22 VMB_CAS0# VMB_CAS1# VMB_WE0# VMB_WE1# VMB_WE0# VMB_WE1# VMB_CS1# VMB_CS1# VMB_CKE0 VMB_CKE1 VMB_CKE0 VMB_CKE1 VMB_CLK0 VMB_CLK0# VMB_CLK0 VMB_CLK0# VMB_CLK1 VMB_CLK1# VMB_CLK1 VMB_CLK1# 22 VMB_RDQS[7..0] 22 VMB_DM[7..0] 22 VMB_DQ[63..0] 22 VMB_MA[13..0] 22 22 22 VMB_CS0# VMB_CS0# VMB_WDQS[7..0] VMB_RDQS[7..0] VMB_DM[7..0] VMB_DQ[63..0] VMB_MA[13..0] VMB_BA0 VMB_BA1 VMB_BA2 VMB_BA0 VMB_BA1 VMB_BA2 DQA1_2 DQA1_3 DDBIA0_0/QSA_0B DQA1_4 DDBIA0_1/QSA_1B DQA1_5 DDBIA0_2/QSA_2B DQA1_6 DDBIA0_3/QSA_3B DQA1_7 DDBIA1_0/QSA_4B DQA1_8 DDBIA1_1/QSA_5B DQA1_9 DDBIA1_2/QSA_6B DQA1_10 DDBIA1_3/QSA_7B A34 E30 E26 C20 C16 C12 J11 F8 VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7 +1.5V_VGA R105 40.2/F_4 DQA1_11 DQA1_12 ADBIA0/ODTA0 DQA1_13 ADBIA1/ODTA1 J21 VMA_ODT0 G19 VMA_ODT1 DQA1_14 DQA1_15 CLKA0 DQA1_16 CLKA0B H27 VMA_CLK0 G27 VMA_CLK0# R106 DQA1_17 DQA1_18 CLKA1 DQA1_19 CLKA1B J14 VMA_CLK1 H14 VMA_CLK1# C158 1U/6.3V_4 100/F_4 DQA1_20 DQA1_21 RASA0B DQA1_22 RASA1B K23 VMA_RAS0# K19 VMA_RAS1# DQA1_23 DQA1_24 CASA0B DQA1_25 CASA1B K20 VMA_CAS0# K17 VMA_CAS1# PLACE MVREFD DIVIDERS AND CAPS CLOSE TO ASIC +1.5V_VGA DQA1_26 DQA1_27 CSA0B_0 DQA1_28 CSA0B_1 K24 VMA_CS0# K27 DQA1_29 DQA1_30 CSA1B_0 DQA1_31 CSA1B_1 M13 VMA_CS1# K16 R215 40.2/F_4 20 U26D PART 4 0F 9 VMB_RAS0# VMB_RAS1# VMB_CAS0# VMB_CAS1# 22 VMB_WDQS[7..0] 1 VMB_ODT0 VMB_ODT1 GDDR5/DDR3 VMA_CS0# D 21 21 U26C MEMORY INTERFACE A 21 3 VMA_ODT0 VMA_ODT1 VMA_ODT0 VMA_ODT1 VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63 C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5 GDDR5/DDR3 DQB0_0 MAB0_0/MAB_0 DQB0_1 MAB0_1/MAB_1 DQB0_2 MAB0_2/MAB_2 DQB0_3 MAB0_3/MAB_3 DQB0_4 MAB0_4/MAB_4 DQB0_5 MAB0_5/MAB_5 DQB0_6 MAB0_6/MAB_6 DQB0_7 MAB0_7/MAB_7 DQB0_8 MAB1_0/MAB_8 DQB0_9 MAB1_1/MAB_9 DQB0_10 MAB1_2/MAB_10 DQB0_11 MAB1_3/MAB_11 DQB0_12 MAB1_4/MAB_12 DQB0_13 MAB1_5/BA2 DQB0_14 MAB1_6/BA0 DQB0_15 MAB1_7/BA1 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 WCKB0_0/DQMB_0 WCKB0B_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0B_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1B_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1B_1/DQMB_7 MVREFDA MVREFSA L18 L20 MVREFDA CKEA0 MVREFSA CKEA1 K21 VMA_CKE0 J20 VMA_CKE1 DQB0_26 EDCB0_0/QSB_0 DQB0_27 EDCB0_1/QSB_1 DQB0_28 EDCB0_2/QSB_2 DQB0_29 EDCB0_3/QSB_3 DQB0_30 EDCB1_0/QSB_4 DQB0_31 EDCB1_1/QSB_5 DQB1_0 EDCB1_2/QSB_6 DQB1_1 EDCB1_3/QSB_7 DQB1_3 DDBIB0_0/QSB_0B DQB1_4 DDBIB0_1/QSB_1B DQB1_5 DDBIB0_2/QSB_2B DQB1_6 DDBIB0_3/QSB_3B DQB1_7 DDBIB1_0/QSB_4B DQB1_8 DDBIB1_1/QSB_5B DQB1_9 DDBIB1_2/QSB_6B DQB1_10 DDBIB1_3/QSB_7B DQB1_12 ADBIB0/ODTB0 DQB1_13 R229 C491 1U/6.3V_4 100/F_4 L27 N12 AG12 NC_MEM_CALRN0 WEA0B NC_MEM_CALRN1 WEA1B RdR195 ReR196 RfR89 240/F_4 240/F_4 240/F_4 M12 M27 AH12 NC_MEM_CALRP1 MAA0_8/MAA_13 MEM_CALRP0 MAA1_8/MAA_14 MEM_CALRP2 MAA0_9/MAA_15 VMB_DM0 VMB_DM1 VMB_DM2 VMB_DM3 VMB_DM4 VMB_DM5 VMB_DM6 VMB_DM7 F6 K3 P3 V5 AB5 AH1 AJ9 AM5 VMB_RDQS0 VMB_RDQS1 VMB_RDQS2 VMB_RDQS3 VMB_RDQS4 VMB_RDQS5 VMB_RDQS6 VMB_RDQS7 G7 K1 P1 W4 AC4 AH3 AJ8 AM3 VMB_WDQS0 VMB_WDQS1 VMB_WDQS2 VMB_WDQS3 VMB_WDQS4 VMB_WDQS5 VMB_WDQS6 VMB_WDQS7 T7 W7 VMB_ODT0 VMB_ODT1 L9 L8 VMB_CLK0 VMB_CLK0# C ADBIB1/ODTB1 DQB1_14 DQB1_15 CLKB0 DQB1_16 CLKB0B DQB1_17 DQB1_18 CLKB1 DQB1_19 CLKB1B AD8 VMB_CLK1 AD7 VMB_CLK1# DQB1_20 DQB1_21 RASB0B DQB1_22 RASB1B T10 Y10 VMB_RAS0# VMB_RAS1# DQB1_23 DQB1_24 CASB0B DQB1_25 CASB1B W 10 VMB_CAS0# AA10 VMB_CAS1# DQB1_26 DQB1_27 CSB0B_0 DQB1_28 CSB0B_1 P10 L10 VMB_CS0# DQB1_29 DQB1_30 CSB1B_0 DQB1_31 CSB1B_1 MVREFDB CKEB1 AD10 VMB_CS1# AC10 U10 VMB_CKE0 AA11 VMB_CKE1 B MVREFSB WEB0B 240/F_4 240/F_4 240/F_4 H3 H1 T3 T5 AE4 AF5 AK6 AK5 DQB1_11 +1.5V_VGA RaR198 RbR194 RcR140 D DQB1_2 CKEB0 MVREFDB Y12 MVREFSB AA12 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_BA2 VMB_BA0 VMB_BA1 DQB0_25 40.2/F_4 B P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9 DQB0_16 MEMORY INTERFACE B 5 21 21 K26 VMA_WE0# L15 VMA_WE1# WEB1B N10 VMB_WE0# AB11 VMB_WE1# R216 NC_MEM_CALRN2 MAA1_9/RSVD H23 VMA_MA13 J19 M21 M20 C476 1U/6.3V_4 MAB0_8/MAB_13 100/F_4 MAB1_8/MAB_14 MAB0_9/MAB_15 MAB1_9/RSVD DRAM_RST VMB_MA13 T8 W8 U12 V12 AH11 DRAM_RST For Chelsea, Uninstall Ra, Rb, Rc and Rd Thames XT_M2 For Thames Install Ra Rb Rc Rd install 240 Ohm for Re AND Rf Thames XT_M2 DRAM_RST R149 10_4 R145 R157 4.99K/F_4 DRAM_RST_M 51/F_4 DRAM_RST_M 21,22 C272 120P/50V_4 A +1.5V_VGA 18,21,22,44 +1.5V_VGA A PROJECT : R53 Quanta Computer Inc. Size Custom Document Number 5 4 3 2 Rev 1A Chelsea_MEM_Interface Date: Friday, November 11, 2011 1 Sheet 20 of 44 5 4 VMA_MA[13..0] 20 VMA_MA[13..0] 20 VMA_DM[7..0] 3 20 VMA_DQ[63..0] 20 VMA_WDQS[7..0] 20 VMA_RDQS[7..0] 2 CHANNEL A: 256MB/512MB DDR3 U22 U30 D 20 20 20 VREFC_VMA1 VREFD_VMA1 M9 H2 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 M3 N9 M4 VMA_BA0 VMA_BA1 VMA_BA2 20 20 20 VMA_CLK0 VMA_CLK0# VMA_CKE0 J8 K8 K10 20 20 20 20 20 VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0# K2 L3 J4 K4 L4 VMA_RDQS0 VMA_RDQS2 C F4 C8 VMA_DM0 VMA_DM2 E8 D4 VMA_WDQS0 VMA_WDQS2 G4 B8 T3 20,22 DRAM_RST_M VMA_ZQ1 Should be 240 Ohms +-1% R424 243/F_4 L9 A1 T1 A11 T11 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VMA_DQ0 VMA_DQ6 VMA_DQ2 VMA_DQ7 VMA_DQ3 VMA_DQ4 VMA_DQ1 VMA_DQ5 E4 F8 F3 F9 H4 H9 G3 H8 VMA_DQ20 VMA_DQ19 VMA_DQ23 VMA_DQ17 VMA_DQ22 VMA_DQ16 VMA_DQ21 VMA_DQ18 D8 C4 C9 C3 A8 A3 B9 A4 VREFC_VMA2 VREFD_VMA2 M9 H2 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E4 F8 F3 F9 H4 H9 G3 H8 VMA_DQ11 VMA_DQ12 VMA_DQ15 VMA_DQ10 VMA_DQ14 VMA_DQ8 VMA_DQ13 VMA_DQ9 D8 C4 C9 C3 A8 A3 B9 A4 VMA_DQ27 VMA_DQ29 VMA_DQ26 VMA_DQ28 VMA_DQ25 VMA_DQ30 VMA_DQ24 VMA_DQ31 VREFC_VMA3 VREFD_VMA3 M9 H2 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 VMA_BA0 VMA_BA1 VMA_BA2 M3 N9 M4 BA0 BA1 BA2 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 CK CK CKE/CKE0 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 DQSL DQSU RESET ZQ/ZQ0 NC NC NC NC VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 J2 NC/ODT1 VSSQ#E9 L2 NC/CS1 VSSQ#F10 J10 NC/CE1 VSSQ#G2 L10 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C +1.5V_VGA B3 D10 G8 K3 K9 N2 N10 R2 R10 M3 N9 M4 VMA_CLK0 VMA_CLK0# VMA_CKE0 J8 K8 K10 BA0 BA1 BA2 CK CK CKE/CKE0 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 R264 56.2/F_4 B3 D10 G8 K3 K9 N2 N10 R2 R10 VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0# K2 L3 J4 K4 L4 VMA_RDQS1 VMA_RDQS3 F4 C8 VMA_DM1 VMA_DM3 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 E8 D4 VMA_WDQS1 VMA_WDQS3 B2 B10 D2 D9 E3 E9 F10 G2 G10 DRAM_RST_M T3 VMA_ZQ2 L9 R253 243/F_4 Should be 240 Ohms +-1% G4 B8 A1 T1 A11 T11 J2 L2 J10 L10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU DQSL DQSU RESET ZQ/ZQ0 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 NC NC NC NC VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 NC/ODT1 VSSQ#E9 NC/CS1 VSSQ#F10 NC/CE1 VSSQ#G2 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C +1.5V_VGA DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 BA0 BA1 BA2 C530 VMA_CLK0_COMM 0.01U/25V_4 R265 56.2/F_4 +1.5V_VGA +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 VREFCA VREFDQ DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E4 F8 F3 F9 H4 H9 G3 H8 VMA_DQ47 VMA_DQ44 VMA_DQ45 VMA_DQ43 VMA_DQ46 VMA_DQ41 VMA_DQ40 VMA_DQ42 D8 C4 C9 C3 A8 A3 B9 A4 VMA_DQ32 VMA_DQ36 VMA_DQ33 VMA_DQ38 VMA_DQ34 VMA_DQ39 VMA_DQ35 VMA_DQ37 VMA_CLK0# VMA_CLK1 A2 A9 C2 C10 D3 E10 F2 H3 H10 20 20 20 VMA_CLK1 VMA_CLK1# VMA_CKE1 J8 K8 K10 20 20 20 20 20 VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1# K2 L3 J4 K4 L4 R425 56.2/F_4 C832 R428 56.2/F_4 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VMA_RDQS5 VMA_RDQS4 F4 C8 VMA_DM5 VMA_DM4 E8 D4 CK CK CKE/CKE0 0.01U/25V_4 VMA_WDQS5 VMA_WDQS4 DRAM_RST_M VMA_ZQ3 Vendor B2 B10 D2 D9 E3 E9 F10 G2 G10 DML DMU M3 N9 M4 +1.5V_VGA G4 B8 DQSL DQSU QCI PN B/S PN Hynix D(Vega) AKD5LZWTW02 AKD5LZWTW08 Micron G die AKD5EGSTL00 AKD5LZSTL10 SAMSUNG G die AKD5EGGT500 AKD5EGGT502 Hynix B(Vega) AKD5MGWTW00 AKD5MGWTW07 SAMSUNG C die AKD5MGWT500 AKD5MGWT508 Should be 240 Ohms +-1% R248 243/F_4 T3 RESET L9 A1 T1 A11 T11 J2 L2 J10 L10 ZQ/ZQ0 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 NC/ODT1 VSSQ#E9 NC/CS1 VSSQ#F10 NC/CE1 VSSQ#G2 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C +1.5V_VGA VMA_CLK1 VMA_CLK1# VMA_CKE1 J8 K8 K10 VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1# K2 L3 J4 K4 L4 VMA_RDQS6 VMA_RDQS7 F4 C8 VMA_DM6 VMA_DM7 E8 D4 VMA_WDQS6 VMA_WDQS7 G4 B8 Should be 240 Ohms +-1% DRAM_RST_M T3 VMA_ZQ4 L9 R432 243/F_4 C836 0.1U/10V_4 R252 4.99K/F_4 C846 1U/6.3V_4 C512 0.1U/10V_4 C830 0.1U/10V_4 C829 1U/6.3V_4 C824 1U/6.3V_4 C840 0.1U/10V_4 C853 0.1U/10V_4 VMA_DQ49 VMA_DQ52 VMA_DQ50 VMA_DQ54 VMA_DQ51 VMA_DQ53 VMA_DQ48 VMA_DQ55 D8 C4 C9 C3 A8 A3 B9 A4 VMA_DQ60 VMA_DQ59 VMA_DQ63 VMA_DQ58 VMA_DQ61 VMA_DQ56 VMA_DQ62 VMA_DQ57 C839 1U/6.3V_4 C825 1U/6.3V_4 C542 10U/6.3VS_6 C505 1U/6.3V_4 C844 C843 0.1U/10V_4 0.1U/10V_4 C531 0.1U/10V_4 C547 0.1U/10V_4 +1.5V_VGA BA0 BA1 BA2 B3 D10 G8 K3 K9 N2 N10 R2 R10 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 CK CK CKE/CKE0 +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 DQSL DQSU ZQ/ZQ0 A1 T1 A11 T11 +1.5V_VGA B2 B10 D2 D9 E3 E9 F10 G2 G10 NC NC NC NC VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 NC/ODT1 VSSQ#E9 NC/CS1 VSSQ#F10 NC/CE1 VSSQ#G2 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C +1.5V_VGA B R433 4.99K/F_4 C507 0.1U/10V_4 C841 0.1U/10V_4 R421 4.99K/F_4 VREFD_VMA3 R261 4.99K/F_4 C525 0.1U/10V_4 R430 4.99K/F_4 C521 1U/6.3V_4 C520 1U/6.3V_4 C522 1U/6.3V_4 C504 1U/6.3V_4 C515 1U/6.3V_4 C514 1U/6.3V_4 C554 10U/6.3VS_6 C510 1U/6.3V_4 C541 0.1U/10V_4 C516 0.1U/10V_4 C536 0.1U/10V_4 C546 C548 0.1U/10V_4 0.1U/10V_4 C553 0.1U/10V_4 C550 0.1U/10V_4 C837 0.1U/10V_4 VREFD_VMA4 R427 4.99K/F_4 C833 0.1U/10V_4 +1.5V_VGA C549 1U/6.3V_4 C499 1U/6.3V_4 C552 1U/6.3V_4 C551 1U/6.3V_4 C528 1U/6.3V_4 C533 1U/6.3V_4 C529 1U/6.3V_4 C862 10U/6.3VS_6 +1.5V_VGA C540 0.1U/10V_4 D R258 4.99K/F_4 +1.5V_VGA C519 1U/6.3V_4 21 VREFD_VMA2 R255 4.99K/F_4 +1.5V_VGA C849 0.1U/10V_4 E4 F8 F3 F9 H4 H9 G3 H8 VREFC_VMA4 R256 4.99K/F_4 +1.5V_VGA C838 0.1U/10V_4 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 R431 4.99K/F_4 +1.5V_VGA C835 1U/6.3V_4 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 +1.5V_VGA +1.5V_VGA C842 1U/6.3V_4 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 RESET J2 L2 J10 L10 VREFD_VMA1 R423 4.99K/F_4 VREFCA VREFDQ C B2 B10 D2 D9 E3 E9 F10 G2 G10 NC NC NC NC VREFC_VMA3 C850 0.1U/10V_4 VMA_BA0 VMA_BA1 VMA_BA2 A2 A9 C2 C10 D3 E10 F2 H3 H10 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 R434 4.99K/F_4 VREFC_VMA2 C856 0.1U/10V_4 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 +1.5V_VGA B3 D10 G8 K3 K9 N2 N10 R2 R10 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 VMA_CLK1# +1.5V_VGA R257 4.99K/F_4 R422 4.99K/F_4 VREFC_VMA1 C834 1U/6.3V_4 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 +1.5V_VGA R426 4.99K/F_4 C851 10U/6.3VS_6 M9 H2 VMA_CLK1_COMM B R429 4.99K/F_4 U29 VREFC_VMA4 VREFD_VMA4 VMA_CLK0 +1.5V_VGA +1.5V_VGA VMA_BA0 VMA_BA1 VMA_BA2 1 U21 C852 1U/6.3V_4 C827 1U/6.3V_4 C502 1U/6.3V_4 C845 1U/6.3V_4 C857 1U/6.3V_4 C860 1U/6.3V_4 C855 1U/6.3V_4 C508 0.1U/10V_4 C831 0.1U/10V_4 C511 0.1U/10V_4 C544 0.1U/10V_4 C828 C859 0.1U/10V_4 0.1U/10V_4 C826 1U/6.3V_4 +1.5V_VGA C535 0.1U/10V_4 C513 0.1U/10V_4 C506 0.1U/10V_4 C526 0.1U/10V_4 C503 C538 0.1U/10V_4 0.1U/10V_4 C847 0.1U/10V_4 C858 0.1U/10V_4 A A PROJECT : R53 Quanta Computer Inc. 18,20,22,44 +1.5V_VGA +1.5V_VGA Size Custom Document Number 5 4 3 2 Rev 3A VRAM-A (DDR3 BGA96) Date: Friday, November 11, 2011 1 Sheet 21 of 44 5 4 VMB_MA[13..0] 20 VMB_MA[13..0] 20 VMB_DM[7..0] 3 20 VMB_DQ[63..0] 20 VMB_WDQS[7..0] 20 VMB_RDQS[7..0] 2 CHANNEL B: 256MB/512MB DDR3 1 U12 U24 U15 VREFC_VMB1 VREFD_VMB1 D M9 H2 20 20 20 20 20 20 20 20 20 20 20 20 20 20 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 20 20 20 VMB_BA0 VMB_BA1 VMB_BA2 M3 N9 M4 20 20 20 VMB_CLK0 VMB_CLK0# VMB_CKE0 J8 K8 K10 20 20 20 20 20 VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0# VMB_ODT0 BA0 BA1 BA2 CK CK CKE/CKE0 E8 D4 VMB_WDQS0 VMB_WDQS2 G4 B8 DML DMU DQSL DQSU T3 20,21 DRAM_RST_M VMB_ZQ1 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 RESET L9 ZQ/ZQ0 VMB_DQ4 VMB_DQ0 VMB_DQ6 VMB_DQ1 VMB_DQ5 VMB_DQ3 VMB_DQ7 VMB_DQ2 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ21 VMB_DQ23 VMB_DQ17 VMB_DQ22 VMB_DQ16 VMB_DQ19 VMB_DQ18 VMB_DQ20 U27 VREFC_VMB2 VREFD_VMB2 M9 H2 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 +1.5V_VGA VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 F4 C8 VMB_DM0 VMB_DM2 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 K2 L3 J4 K4 L4 VMB_RDQS0 VMB_RDQS2 C VREFCA VREFDQ E4 F8 F3 F9 H4 H9 G3 H8 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 B3 D10 G8 K3 K9 N2 N10 R2 R10 VMB_BA0 VMB_BA1 VMB_BA2 VMB_CLK0 VMB_CLK0# VMB_CKE0 +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 M3 N9 M4 J8 K8 K10 VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0# K2 L3 J4 K4 L4 VMB_RDQS1 VMB_RDQS3 F4 C8 VMB_DM1 VMB_DM3 E8 D4 VMB_WDQS1 VMB_WDQS3 G4 B8 T3 20,21 DRAM_RST_M VMB_ZQ2 Should be 240 Ohms +-1% A1 T1 A11 T11 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 J2 NC/ODT1 VSSQ#E9 L2 NC/CS1 VSSQ#F10 J10 NC/CE1 VSSQ#G2 L10 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C R203 243/F_4 NC NC NC NC B2 B10 D2 D9 E3 E9 F10 G2 G10 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 CK CK CKE/CKE0 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DQSL DQSU RESET ZQ/ZQ0 VMB_DQ11 VMB_DQ14 VMB_DQ9 VMB_DQ12 VMB_DQ10 VMB_DQ15 VMB_DQ8 VMB_DQ13 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ31 VMB_DQ26 VMB_DQ30 VMB_DQ27 VMB_DQ28 VMB_DQ24 VMB_DQ29 VMB_DQ25 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 VMB_BA0 VMB_BA1 VMB_BA2 M3 N9 M4 +1.5V_VGA BA0 BA1 BA2 DML DMU E4 F8 F3 F9 H4 H9 G3 H8 M9 H2 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 B3 D10 G8 K3 K9 N2 N10 R2 R10 VMB_CLK0 +1.5V_VGA R205 56.2/F_4 A2 A9 C2 C10 D3 E10 F2 H3 H10 C458 VMB_CLK0_COMM 20 20 20 VMB_CLK1 VMB_CLK1# VMB_CKE1 20 20 20 20 20 VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1# J8 K8 K10 VMB_ODT1 0.01U/25V_4 R204 56.2/F_4 VMB_CLK0# VMB_CLK1 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 R350 56.2/F_4 A1 T1 A11 T11 R388 243/F_4 J2 L2 J10 L10 +1.5V_VGA K2 L3 J4 K4 L4 VMB_RDQS7 VMB_RDQS5 F4 C8 VMB_DM7 VMB_DM5 E8 D4 VMB_WDQS7 VMB_WDQS5 G4 B8 VREFCA VREFDQ VMB_CLK1_COMM T3 20,21 DRAM_RST_M VMB_ZQ3 0.01U/25V_4 R351 56.2/F_4 Should be 240 Ohms +-1% R177 243/F_4 B2 VSSQ#B2 B10 VSSQ#B10 D2 VSSQ#D2 D9 VSSQ#D9 E3 VSSQ#E3 E9 NC/ODT1 VSSQ#E9 F10 NC/CS1 VSSQ#F10 G2 NC/CE1 VSSQ#G2 G10 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C +1.5V_VGA NC NC NC NC L9 A1 T1 A11 T11 BA0 BA1 BA2 CK CK CKE/CKE0 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU DQSL DQSU RESET ZQ/ZQ0 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ40 VMB_DQ46 VMB_DQ41 VMB_DQ47 VMB_DQ44 VMB_DQ45 VMB_DQ43 VMB_DQ42 VREFC_VMB4 VREFD_VMB4 M9 H2 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 NC NC NC NC B3 D10 G8 K3 K9 N2 N10 R2 R10 VMB_BA0 VMB_BA1 VMB_BA2 M3 N9 M4 VMB_CLK1 VMB_CLK1# VMB_CKE1 J8 K8 K10 A2 A9 C2 C10 D3 E10 F2 H3 H10 VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1# K2 L3 J4 K4 L4 VMB_RDQS6 VMB_RDQS4 F4 C8 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VMB_DM6 VMB_DM4 E8 D4 VMB_WDQS6 VMB_WDQS4 G4 B8 +1.5V_VGA T3 20,21 DRAM_RST_M VMB_ZQ4 Should be 240 Ohms +-1% B2 B10 D2 D9 E3 E9 F10 G2 G10 R352 243/F_4 R390 4.99K/F_4 C461 1U/6.3V_4 R418 4.99K/F_4 R389 4.99K/F_4 C759 0.1U/10V_4 C358 0.1U/10V_4 C359 1U/6.3V_4 C356 1U/6.3V_4 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ36 VMB_DQ33 VMB_DQ38 VMB_DQ32 VMB_DQ39 VMB_DQ35 VMB_DQ37 VMB_DQ34 C353 1U/6.3V_4 +1.5V_VGA C428 1U/6.3V_4 C446 10U/6.3VS_6 D DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 +1.5V_VGA BA0 BA1 BA2 CK CK CKE/CKE0 B3 D10 G8 K3 K9 N2 N10 R2 R10 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 DML DMU RESET ZQ/ZQ0 C810 1U/6.3V_4 C A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 DQSL DQSU +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 B2 B10 D2 D9 E3 E9 F10 G2 G10 NC NC NC NC VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 J2 NC/ODT1 VSSQ#E9 L2 NC/CS1 VSSQ#F10 J10 NC/CE1 VSSQ#G2 L10 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C +1.5V_VGA R354 4.99K/F_4 R384 4.99K/F_4 VREFD_VMB3 VREFD_VMB2 R176 4.99K/F_4 R419 4.99K/F_4 C808 0.1U/10V_4 C317 0.1U/10V_4 R118 4.99K/F_4 C172 0.1U/10V_4 R353 4.99K/F_4 +1.5V_VGA C760 1U/6.3V_4 22 B +1.5V_VGA C360 1U/6.3V_4 VMB_DQ50 VMB_DQ53 VMB_DQ49 VMB_DQ52 VMB_DQ51 VMB_DQ55 VMB_DQ48 VMB_DQ54 VREFC_VMB4 +1.5V_VGA C362 1U/6.3V_4 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 E4 F8 F3 F9 H4 H9 G3 H8 R119 4.99K/F_4 VREFD_VMB1 R180 4.99K/F_4 A1 T1 A11 T11 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 +1.5V_VGA VREFC_VMB3 C457 0.1U/10V_4 L9 VREFCA VREFDQ +1.5V_VGA R181 4.99K/F_4 VREFC_VMB1 C363 1U/6.3V_4 VMB_DQ63 VMB_DQ57 VMB_DQ61 VMB_DQ58 VMB_DQ62 VMB_DQ56 VMB_DQ60 VMB_DQ59 +1.5V_VGA VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 J2 NC/ODT1 VSSQ#E9 L2 NC/CS1 VSSQ#F10 J10 NC/CE1 VSSQ#G2 L10 NC/ZQ1 VSSQ#G10 100-BALL SDRAM DDR3 H5TQ2G63DFR-11C +1.5V_VGA R175 4.99K/F_4 VREFC_VMB2 C469 10U/6.3VS_6 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E4 F8 F3 F9 H4 H9 G3 H8 +1.5V_VGA R201 4.99K/F_4 R202 4.99K/F_4 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 C696 VMB_CLK1# Should be 240 Ohms +-1% B +1.5V_VGA L9 VREFCA VREFDQ VREFC_VMB3 VREFD_VMB3 C475 1U/6.3V_4 C817 1U/6.3V_4 C816 1U/6.3V_4 C815 1U/6.3V_4 C813 1U/6.3V_4 C811 1U/6.3V_4 C178 10U/6.3VS_6 +1.5V_VGA C180 1U/6.3V_4 C697 0.1U/10V_4 VREFD_VMB4 R386 4.99K/F_4 C740 0.1U/10V_4 +1.5V_VGA C320 1U/6.3V_4 C315 1U/6.3V_4 C171 1U/6.3V_4 C692 1U/6.3V_4 C319 1U/6.3V_4 C440 1U/6.3V_4 C314 1U/6.3V_4 C748 10U/6.3VS_6 +1.5V_VGA C730 1U/6.3V_4 C742 1U/6.3V_4 C744 1U/6.3V_4 C745 1U/6.3V_4 C695 1U/6.3V_4 C292 1U/6.3V_4 C785 1U/6.3V_4 C724 0.1U/10V_4 C718 0.1U/10V_4 C713 0.1U/10V_4 C693 0.1U/10V_4 C694 C719 0.1U/10V_4 0.1U/10V_4 C716 1U/6.3V_4 +1.5V_VGA A A C460 0.1U/10V_4 C354 0.1U/10V_4 C361 0.1U/10V_4 C459 0.1U/10V_4 C462 0.1U/10V_4 C355 0.1U/10V_4 C312 C456 0.1U/10V_4 0.1U/10V_4 C761 0.1U/10V_4 C743 0.1U/10V_4 C762 0.1U/10V_4 C814 0.1U/10V_4 C812 0.1U/10V_4 C793 0.1U/10V_4 C774 C809 0.1U/10V_4 0.1U/10V_4 C222 0.1U/10V_4 C698 0.1U/10V_4 C318 0.1U/10V_4 C313 0.1U/10V_4 C316 0.1U/10V_4 C173 0.1U/10V_4 C175 C174 0.1U/10V_4 0.1U/10V_4 C735 0.1U/10V_4 C734 0.1U/10V_4 PROJECT : R53 Quanta Computer Inc. 18,20,21,44 +1.5V_VGA +1.5V_VGA Size Custom Document Number 5 4 3 2 1 18,20,21,44 +1.5V_VGA +1.5V_VGA Rev 3A VRAM-B (DDR3 BGA96) Date: Friday, November 11, 2011 Sheet 22 of 44 1 2 3 4 5 6 7 8 23 LID Switch R13 EMU_LID +3V R15 LVDS_BLON R17 4 Q6 1 3 *MMBT3904-7-F APU_BLEN HWPG +TRAVIS3.3V 4,33,35,36,37,40 R7 2.2K_4 EDIDCLK C14 *10P/50V_4 R8 2.2K_4 EDIDDATA C15 *10P/50V_4 C13 8 2 LCD_BK R10 +3V 1 11 DPST_PWM C8 EDIDCLK EDIDDATA TXLOUT0TXLOUT0+ 11 11 TXLOUT1TXLOUT1+ TXLOUT1TXLOUT1+ 11 11 TXLOUT2TXLOUT2+ TXLOUT2TXLOUT2+ TXLCLKOUTTXLCLKOUT+ 11 11 TXUOUT0TXUOUT0+ TXUOUT0TXUOUT0+ DPST_PWM 11 11 TXUOUT1TXUOUT1+ TXUOUT1TXUOUT1+ 33P/50V_4 11 11 TXUOUT2TXUOUT2+ TXUOUT2TXUOUT2+ C16 *4.7U/6.3V_6 C23 *0.01U/25V_4 TXUCLKOUTTXUCLKOUT+ 11 TXUCLKOUT11 TXUCLKOUT+ follow L7 Location USBP2- *150P/50V_4 C24 *150P/50V_4 C30 *150P/50V_4 A 11 TXLCLKOUT11 TXLCLKOUT+ +3V_CAM *0_4/S B C31 *0.047U/10V_4 1000P/50V_4 +TRAVIS3.3V 11 EDIDCLK 11 EDIDDATA 11 TXLOUT011 TXLOUT0+ Q7 *PDTC144EV +3V *0.047U/10V_4 C17 RF PN_BLON 1K/F_4 C6 3 LVDS_BLON +3VLCD_CON 100K/F_4 100K/F_4 2 R16 R22 11 *2.2K_4 *10K/F_4 *0_4/S *RB501V-40 1 22P/50V_4 R5 USBP2+ *0_4/S R6 *0_4/S 27 27 DIGITAL_D1 DIGITAL_CLK USBP2-_R EMI USBP2+_R C5 *10P/50V_4 6 C18 6 *10P/50V_4 DIGITAL_CLK_L L6 +3V_CAM SBK160808T-601Y-N/0.2A_6 USBP2-_R L7 1 2 USBP2USBP2+_R 4 3 USBP2+ DPST_PWM BLON_CON *WCM-2012-900T(400mA) +VIN_BLIGHT L5 +VIN EMI FBM2125 HM330-T/4A_8 EMI & RF C10 0.01U/25V_4 C9 0.1U/25V_4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 G_0 +1.5V D6 2 R12 G_1 G_2 G_3 B G_4 G_5 33 A C26 BLON_CON RB500V-40 D5 CN5 GS12407-11141-9H-40P-R +VIN BLON_CON C19 *4.7U/25V_8 Coupling CAP. SI , EMI reserve for debug +VIN C C108 *0.1U/25V_4 C38 *0.1U/25V_4 C488 *0.1U/25V_4 C39 *0.1U/25V_4 C527 *0.1U/25V_4 C32 220P/50V_4 C58 *0.1U/25V_4 C51 *0.1U/25V_4 +3V +3VLCD *0.1U/25V_4 *0.1U/25V_4 *0.1U/25V_4 C646 11 DISP_ON *0.1U/25V_4 0_4 DISP_ON_L +1.5V 5 IN OUT 1 GND 2 L11 TI160808U600_6 1 1U/6.3V_4 R11 4 IN 3 ON/OFF C34 C33 0.01U/25V_4 0.1U/10V_4 1 *0.1U/25V_4 C645 2 C560 *0.1U/25V_4 1 *0.1U/25V_4 C49 U5 2 C55 C664 SI , change to 0603 size due to old part EOL +3VLCD_CON C7 C662 *220P/50V_4 2 +VIN C C971 C22 0.1U/25V_4 C25 10U/6.3V_8 +3V IC(5P) G5243AT11U R18 R9 *2.2K_4 *10K/F_4 R14 100K/F_4 2 EMI suggestion 4 Q5 1 3 *MMBT3904-7-F APU_DIGON D D PROJECT : R53 Quanta Computer Inc. 4,7,30,33,34,35 +3VPCU 2,4,6,8,9,10,11,12,13,14,18,24,25,26,27,28,29,30,31,32,33,41,42,44 +3V 9,34,41,44 +12VALW 34,35,36,37,39,40,41,42,44 +VIN Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A LCD CONN/LID/CAM Sheet 23 8 of 44 1 2 3 4 5 6 7 8 24 CRT PORT SI , change to 68 Ω for Rise/Fall time issue A 8 8 8 8 CRT_R_1 CRT_G_1 CRT_B_1 HSYNC_COM_1 VSYNC_COM_1 DDCCLK_1 DDCDATA_1 8 FCH_CRT_RED 8 FCH_CRT_GRE 8 FCH_CRT_BLU FCH_CRT_HSYNC FCH_CRT_VSYNC FCH_DDCCLK FCH_DDCDAT CRT_R_1 L10 BK1608LL680(0.2A,68) CRT_R1 CRT_G_1 L9 BK1608LL680(0.2A,68) CRT_G1 CRT_B_1 L8 BK1608LL680(0.2A,68) CRT_B1 R21 150/F_4 6 1 7 2 8 3 9 4 10 5 R19 150/F_4 C37 C36 C35 C29 C27 C28 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 A 11 12 CRTDDCDAT2 C20 *470P/50V_4 13 CRTHSYNC C11 10P/50V_4 14 CRTVSYNC C12 10P/50V_4 15 CRTDDCCLK2 C21 *470P/50V_4 17 150/F_4 R20 16 +5V_FUSE CRT CONN CN14 EMI +3V EMI +5V +5V C43 0.1U/10V_4 B C40 0.22U/10V_4 U6 +5V_CRT2 1 CRT_BYP 7 8 +3V CRT_R1 CRT_G1 CRT_B1 16 14 CRT_VSYNC1 CRT_HSYNC1 15 13 VSYNC_COM_1 HSYNC_COM_1 DDC_IN1 DDC_IN2 10 11 DDCCLK_1 DDCDATA_1 DDC_OUT1 DDC_OUT2 9 12 CRTDDCCLK2 CRTDDCDAT2 2 VCC_SYNC SYNC_OUT2 SYNC_OUT1 VCC_DDC BYP SYNC_IN2 VCC_VIDEO SYNC_IN1 3 4 5 VIDEO_1 VIDEO_2 VIDEO_3 6 GND R31 R26 22_4 22_4 CRTVSYNC CRTHSYNC R30 2.7K_4 R35 R36 2.2K_4 2.2K_4 +5V_CRT2 R25 2.7K_4 1 D7 B 2 RB501V-40 +5V_FUSE IP4772 HOLE C H21 H-TC354BC217I197D157P2 H5 H7 *H-C354I150D110P2 *H-C354I150D110P2 H17 *H-C197D110P2 H22 *SPAD-CXX-1 H12 *H-TC248BC197D150P2 H9 *H-TC248BC197D150P2 PAD2 *EMIPAD APU BKT H11 *intel-cpu-bkt2 1 1 1 1 1 D 2 4 3 1 D H13 *H-TC248BC197D150P2 1 1 1 H19 *h-c354d354n 1 H16 *H-C276I150D110P2 1 1 1 1 H8 *H-C236I150D110P2 H20 H-TC354BC217I197D157P2 1 H14 *H-C354I150D110P2 1 H10 H6 *H-O472X354I272X150D232X110P2 *h-c354i150d110p2 1 H18 *H-C354I150D110P2 1 H15 *H-C354I150D110P2 VGA BKT FCH NUT SI2 , update footprint 1 C SI , add for EMI PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A CRT,Hole Sheet 24 8 of 44 1 2 3 4 5 6 7 8 25 HDMI PORT SI,add for EMI issue EMI Check list recommend 715 ohm A 3 +5V 715/F_4 C_TX2_HDMI+ R373 715/F_4 C_TX2_HDMI- R371 715/F_4 C_TX1_HDMI+ R369 715/F_4 C_TX1_HDMI- R379 715/F_4 C_TX0_HDMI+ R381 715/F_4 C_TX0_HDMI- R367 715/F_4 C_TXC_HDMI+ R364 715/F_4 C_TXC_HDMI- 1 Q32 ME2N7002E 2 R376 R359 C_TX2_HDMI+ C_TX1_HDMI+ C_TX0_HDMI+ C_TXC_HDMI+ R375 R370 R380 R366 C_TX2_HDMIC_TX1_HDMIC_TX0_HDMIC_TXC_HDMI- 100/F_4 100/F_4 100/F_4 100/F_4 A CN19 4 4 4 4 4 4 +5V_FUSE C_TX2_HDMI+ C_TX2_HDMIC_TX1_HDMI+ C_TX1_HDMIC_TX0_HDMI+ C_TX0_HDMI- C_TX2_HDMI+ C_TX2_HDMIC_TX1_HDMI+ C_TX1_HDMIC_TX0_HDMI+ C_TX0_HDMI- SHELL1 SHELL2 SHELL3 SHELL4 20 21 22 23 10 12 CK+ CK- D2 Shield D1 Shield D0 Shield CK Shield GND 2 5 8 11 17 15 16 DDC CLK CE Remote DDC DATA NC 13 14 18 +5V 19 HP DET 1 3 4 6 7 9 D2+ D2D1+ D1D0+ D0- 100K/F_4 Close to HDMI Connector C704 *0.1U/10V_4 C703 0.1U/10V_4 4 4 C_TXC_HDMI+ C_TXC_HDMI- C_TXC_HDMI+ C_TXC_HDMI- EMI *10P/50V_4 *10P/50V_4 HDMI_SCLK HDMI_SDATA C686 C688 +5V_FUSE 1A F5 2 +5V 1 FUSE1.1A6V_POLY C705 B B Cost down backup solution of HDMI DDC Level Shift HDMI_DET C191 220P/50V_4 HDMI CONN DFHD19MR191 hdmi-2he1608-000111f-19p-ldv 2 2 VC5 *AVLC5S_4 1 D16 RB501V-40 1 R357 4.7K_4 +3V R349 2K/F_4 2 1 3 R347 2K/F_4 +5V HDMI HPD SENSE HDMI_SDATA Q16 ME2N7002E 1 3 4 HDMI_HPD_Q R164 1K/F_4 R160 100K/F_4 HDMI_HPD_Q HDMI_SCLK 6 2 4 INT_HDMI_AUXN 4 INT_HDMI_AUXP 0_6 +3V D17 RB501V-40 R358 4.7K_4 HDMI_HPD_L L19 +5V_FUSE +3V *0.1U/10V_4 Q49B 1 2N7002KDW 3 2 Q15 ME2N7002E C Dual 5 4 2KV ESD protection C Q49A HDMI_DET_R R137 200K/F_4 HDMI_DET 2N7002KDW R132 200K/F_4 Dual SI , Q33,Q34 change to dual type MOS Q49 D D PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A HDMI CONN Sheet 25 8 of 44 5 4 3 2 1 26 SI , add R537 PU to fix CR can't write issue CLK_PCIE_REQ2#_R U37 7 7 7 7 7 7 PCIE_TXP0_CARD PCIE_TXN0_CARD CLK_PCIE_CARD_P CLK_PCIE_CARD_N PCIE_RXP0_CARD PCIE_RXN0_CARD R537 10K/F_4 +3V CLKREQ# PERST# MS_INS# SD_CD# SD_WP GPIO SI , PCIE port change from port 2 to port 0 C961 C962 0.1U/10V_4 0.1U/10V_4 1 2 3 4 5 6 PCIE_RXP0_CARD_C PCIE_RXN0_CARD_C HSIP HSIN REFCLKP REFCLKN HSOP HSON 25 GND RTS5229 Close to chip pin DV12_S +3V C959 C960 18 17 16 15 14 13 SP6 SP5 SP4 DV33_18 SP3 SP2 SD_D2_R R526 SD_D3_R R523 SD_CMD_RR524 DV33_18 SD_CLK_R R525 SD_D0_R R521 0_4 0_4 0_4 SD_D2 C938 SD_D3 C940 SD_CMD *5.6P/16V_4 *5.6P/16V_4 22_4 0_4 SD_CLK C930 SD_D0 C927 10P/50V_4 *5.6P/16V_4 Close to chip pin AV12 7 RREF 8 9 10 11 12 C D SI , EMI reserve for debug +5V C980 *2200P/50V_4 +1.1V C981 2200P/50V_4 C982 *2200P/50V_4 SD_D1_R R522 0_4 SD_D1 C928 SI,add C981 for EMI issue DV33_18 *0_4/S SD_CD# SD_WP 6 PCIE_CARD_CLKREQ# R535 24 23 22 21 20 19 PCIE_CARD_CLKREQ# CLK_PCIE_REQ2#_R CARD_PCIE_RST# CARD_PCIE_RST# 7 CARD_PCIE_RST# AV12 RREF 3V3_IN CARD_3V3 DV12_S SP1 D C *5.6P/16V_4 R536 +3V C941 1U/10V_4 4.7U/6.3V_6 0.1U/10V_4 6.2K/F_4 C953 C943 C956 C950 0.1U/10V_4 4.7U/6.3V_6 10U/6.3V_8 0.1U/10V_4 +3VCARD B B SD / MMC CARD READER +3VCARD CLOSE CONN A C650 C647 4.7U/6.3V_6 SD_D0 SD_D1 SD_WP C652 SD_CLK DAT2 DAT3 CMD C/D VSS1 VDD CLK VSS2 DAT0 DAT1 W/P GND GND GND GND 0.1U/10V_4 +3VCARD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 *0.1U/10V_4 CN12 SD_D2 SD_D3 SD_CMD SD_CD# A CS1S-318-H-N PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Monday, November 14, 2011 5 4 3 2 Rev 1A RTS5219 & CR SOCKET &HOLE 1 Sheet 26 of 44 A B 2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,28,29,30,31,32,33,41,42,44 8,18,24,25,26,30,31,32,41 SI2 , reserve for EMI debug C E 27 +3V +5V_AVDD +5V L73 >40mils trace Close to CODEC Close to CODEC D +4.75VAVDD +4.75VAVDD +5V *0_6/S C920 1U/6.3V_4 +3V_DVDD_CORE U36 C911 0.1U/10V_4 C936 1U/6.3V_4 C935 0.1U/10V_4 C931 10U/6.3VS_6 5 Vout 4 BYP 2 GND C947 1U/6.3V_4 +3V C983 *1000P/50V_4 C949 0.1U/10V_4 R531 ACZ_SDIN0 33_4 R529 C944 R532 C945 6 ACZ_SDOUT_AUDIO 6 ACZ_SYNC_AUDIO HD_SDIN0 *0_4/S HD_SDOUT *10P/50V_4 *0_4/S HD_SYNC *10P/50V_4 6 ACZ_RST#_AUDIO C948 TO Digital MIC 23 23 DIGITAL_CLK DIGITAL_D1 100/F_4 DMIC_CLK_R *0_4/S DMIC0 C954 10P/50V_4 D23 DVDD 5 HDA_BITCLK 6 HDA_SDI 4 HDA_SDO 8 HDA_SYNC 9 HDA_RST# 2 3 DMIC_CLK/GPIO1 DMIC0/GPIO2 10K_4 ADC_EAPD# VOLMUTE# 40 CAP- 2 Close to CODEC 29 C910 4.7U/6.3V_6 30 CAP+ 24 27 36 1 C934 0.1U/10V_4 C932 0.047U/10V_4 21 32 PVDD PVDD 33 39 SENSE_A 11 SENSE_A SENSE_B 12 SENSE_B Analog CAP+ AVSS AVSS AVSS DAP R534 C921 1U/6.3V_4 SENSE_A 28 C926 0.1U/10V_4 AGND MUTE_LED_CNTL C925 10U/6.3VS_6 SENSE_A R518 25 HPOUT_L HP1_PORT_B_R 26 HPOUT_R PORT_C_L PORT_C_R VREFOUT_C 15 16 20 PORT_D_L+ PORT_D_L- 34 35 L_SPK+ L_SPK- PORT_D_R+ PORT_D_R- 38 37 R_SPK+ R_SPK- PORT_F_L PORT_F_R 13 14 MUTE_LED_CNTL 30 HPOUT_L 28 AGND SHIELD HPOUT_R 28 MIC_L MIC_R VREFOUT_C MIC_L 28 MIC_R 28 VREFOUT_C 28 10 CAP2 18 VREFFILT 17 V- 28 VREG 31 2.49K/F_4 C924 1000P/50V_4 R517 100K/F_4 C919 *1000P/50V_4 TO Headphone jack AGND SHIELD Check SB side and vendor reply it should reserve only AGND AGND +5V_AVDD AGND TO Audio Jack MIC SI , add for EMI issue +5V_AVDD TO Internal Speakers C10625 close C10629, and C10625 close Chip R513 10K_4 AMP_BEEP +1.1VS5 C975 2200P/50V_4 +5V C976 2200P/50V_4 C967 0.1u/10V_4 C966 0.1u/10V_4 C964 0.1u/10V_4 C965 0.1u/10V_4 C951 0.1u/10V_4 C908 0.1U/10V_4 AMP_BEEP_L AMP_BEEP_R2 100K/F_4 R512 R507 10K_4 C903 0.01U/25V_4 2 ACZ_SPKR 6 1 2N7002 Q44 6/17 R10453 close R10454 +3V +5V_AVDD EMI C912 0.1U/10V_4 PC_BEEP SENSE_B Close to CODEC AGND SHIELD HP1_PORT_B_L +5V >40mils trace Close to CODEC 22 23 19 10K_4 Vset=1.242V SI, add Mute LED feature HP0_PORT_A_L HP0_PORT_A_R VREFOUT_A_or_F C933 1U/6.3V_4 TPS793475 AGND 1 41 CAP- AGND +5V AVDD AVDD EAPD RB501V-40 1 33 DVDD_LV 7 3 AGND AGND 10P/50V_4 R527 R528 R520 +3V 1 EN AGND U35 Digital HDA Bus *0_4/S HD_BCLK R530 6 BIT_CLK_AUDIO 6 C939 10U/6.3VS_6 1 3 C942 1U/6.3V_4 Vin 92HD87 AGND AGND R533 4.7K_4 AGND Check layout mount location SI , EMI change to 0.1u ACZ_RST#_AUDIO R320 *0_8/S C946 0.01U/25V_4 1 2 ADC_CAP2 C958 33P/50V_4 C907 4.7U/6.3V_6 AGND C957 33P/50V_4 ADC_VREFFILT ACZ_SDIN0 ADC_V- ADC_VREG BIT_CLK_AUDIO C909 AGND EMI Request INT. SPEAKER +5V INT SPEAKER CONN L_SPK+ L_SPKR_SPKR_SPK+ C917 10U/6.3V_8 AGND L_SPK+_R SBK160808T-221Y-N/0.2A_6 L_SPK-_R SBK160808T-221Y-N/0.2A_6 SBK160808T-221Y-N/0.2A_6 R_SPK-_R SBK160808T-221Y-N/0.2A_6 R_SPK+_R C918 10U/6.3VS_6 AGND L16 L15 L14 L13 C93 220P/50V_4 C100 220P/50V_4 C106 220P/50V_4 C109 220P/50V_4 1U/6.3V_4 1 2 3 4 CN8 DFHD04MR142 3800-X04N-00X-4P-L +5VS5 C972 C977 2200P/50V_4 2200P/50V_4 AGND SI , add for EMI debug Close to CODEC FOR EMI PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 A B C D Rev 1A Azalia 92HD80 E Sheet 27 of 44 2 3 4 5 6 USB30_TX1-_C C486 1 2 C489 1 2 *ADUC10S020R5 SI,add choke remove R for EMI issue R230 *ADUC10S020R5 1A *0_4 L35 USBP11+_C C494 1 2 6 6 *ADUC10S020R5 USBP11-_C USBP11+_C 3 2 USB30_RX1-_C USB30_RX1+_C WCM2012-90 R236 *0_4 2 R249 USB30_RX1-_C C500 1 2 *ADUC10S020R5 6 6 USB30_RX1+_C C497 1 2 0_4 USB30_TX1-_C USB30_TX1+_C *WCM2012-90 1 4 USB30_RX1USB30_RX1+ *ADUC10S020R5 2 3 L37 R247 0_4 R221 0_4 1 2 3 4 5 6 7 8 9 VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+ 28 100 mils (Iout=2.5A) +5VS5 +5V_USBP0 U32 2 3 4 1 33 USBPW_ON# 13 12 11 10 1 *ADUC10S020R5 CN21 USB3.0 CONN 1 2 3 4 5 6 7 8 9 VIN1 VIN2 EN GND OUT3 OUT2 OUT1 OC 8 7 6 5 +5V_USBP0 C883 1U/6.3V_4 G547N2P81U 13 12 11 10 A USB30_TX1+_C C474 C823 1000P/50V_4 +5V_USBP0 4 1 USBP11USBP11+ 8 USB 3.0 USB3.0 X 2/USB2.0 COMBO EMI USBP11-_C 7 C869 C871 C868 C870 470P/50V_4 0.1U/10V_4 470P/50V_4 0.1U/10V_4 C854 100U/25V + 1 A *WCM2012-90 6 6 C482 C478 USB30_TX1USB30_TX1+ 0.1U/10V_4 0.1U/10V_4 USB30_TX1-_R USB30_TX1+_R 1 4 2 3 L33 R220 USBP12-_C C545 1 2 *ADUC10S020R5 B USB30_TX2+_C C532 1 2 1A *0_4 L41 USBP12+_C C557 1 6 6 *ADUC10S020R5 2 C848 1000P/50V_4 +5V_USBP0 4 1 USBP12USBP12+ USBP12-_C USBP12+_C 3 2 WCM2012-90 R269 *0_4 USB30_RX2-_C USB30_RX2+_C R271 USB30_TX2-_C USB30_TX2+_C *ADUC10S020R5 USB30_RX2-_C C561 1 *ADUC10S020R5 2 USB30_RX2+_C C559 1 1 4 USB30_RX2USB30_RX2+ *ADUC10S020R5 2 0_4 *WCM2012-90 6 6 USBP0+ R32 *0_4 USBP0+_R 1 2 3 4 5 6 7 8 9 2 3 L42 R270 0_4 R267 0_4 +5VS5 CN22 USB3.0 CONN 1 2 3 4 5 6 7 8 9 C59 VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+ 6 6 L12 C47 1 2 3 4 5 6 7 8 9 10 11 12 USBPW_ON# USBP0-_R USBP0+_R 1 4 WCM2012-90 8 SATA_LED# 33 PWRLED_RIGHT SATA_LED# 1000P/50V_4 PWRLED_RIGHT 1000P/50V_4 C48 0.1U/10V_4 2 3 USBP0USBP0+ 13 12 11 10 1 *0_4 USBP0-_R 13 12 11 10 USB30_TX2-_C C543 USB 3.0 EMI R268 R34 0_4 SI,add choke remove R for EMI issue *ADUC10S020R5 2 Right SIDE USBX1 9/14 SI for HW USBP0- +3V 8 ACC_LED# B CN6 USB BOARD EMI request *WCM2012-90 6 6 C539 C534 USB30_TX2USB30_TX2+ 0.1U/10V_4 0.1U/10V_4 USB30_TX2-_R USB30_TX2+_R 1 4 L40 R266 2 3 USBPW_ON# C56 220P/50V_4 EMI request 0_4 Line out HP-JACK-BLACK CN24 AGND SHIELD AGND SHIELD AGND SHIELD C VC9 27 HPOUT_L 27 HPOUT_R HPOUT_L R310 16/F_4 HPOUT_L1 HPOUT_R R302 16/F_4 HPOUT_R1 *AVLC5S_4 AGND AGND SENSE_PHONE SENSE_MIC R285 R273 20K/F_4 SENSE_A R299 *20K/F_4 R308 *20K/F_4 C602 1000P/50V_4 C636 1000P/50V_4 C564 1U/6.3V_4 R279 3.9K/F_4 HPOUT_R2 C619 0.1U/10V_4 VC11 *AVLC5S_4 C Normal Open C592 0.1U/10V_4 SENSE_PHONE AGND VREFOUT_C R278 MIC 27 MIC_L 3.9K/F_4 CN23 27 MIC_R MIC_L C578 2.2U/6.3V_6 MIC_L1 MIC_R C565 2.2U/6.3V_6 MIC_R1 AGND BLM18BD601SN1D L44 BLM18BD601SN1D L43 C562 220P/50V_4 C571 220P/50V_4 HP-JACK-BLACK 3 1 4 2 5 6 MIC_IN_L MIC_IN_R VC7 *AVLC5S_4 COMPONENT CHOICES: The selection of ferrite beads can have a large effect on THD+N, causing failures versus the WLP requirements. At this time, IDT has verified three ferrite beads that will meet the WLP performance requirements: Murata: BLM18BD601SN1 TDK: MMZ1608Y601BTA Taiyo Yuden: LF BK 1608HM601-T D VC10 *AVLC5S_4 AGND *AVLC5S_4 AGND 3 1 4 2 5 6 HPOUT_L2 SENSE_A 27 10K/F_4 SENSE_A 27 VREFOUT_C VC6 BLM18BD601SN1D L51 BLM18BD601SN1D L46 VC8 *AVLC5S_4 Normal Open AGND D SENSE_MIC PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Monday, November 14, 2011 1 2 3 4 5 6 7 Rev 1A USB/BT/Audio JacK Sheet 28 8 of 44 5 4 3 For EMI 0 ~ 22 ohm LAN_XTAL1 XTAL1 2 C127 C134 C131 C148 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 +1.05V_LAN XTAL2 R71 C129 33P/50V_4 C C90 0.01U/100V_0603 C64 1 TD+ TX+ 16 LAN_MX0- 3 TD- CMT 15 LAN_MCT1 2 CT TX- 14 MDI0- LAN_MX1+ 6 RD+ RX- 9 MDI1- LAN_MX1- 8 RD- CT 10 LAN_MCT0 7 CT RX+ 11 RTL8105E 36 35 34 33 32 31 30 29 28 27 26 25 LAN_GLINK10# R82 10K/F_4 LAN_ECS_SCL R80 PCIE_WAKE# ISOLATEB LAN_PCIE_RST# 10K/F_4 +1.05V_LAN PCIE_WAKE# 6,32 +3V_LAN LAN_PCIE_RST# 7,11 C +3V if ISOLATEB pin pull-low,the LAN chip will not drive it's PCI-E outputs ( excluding PCIE_WAKE# pin ) MDI0+ V_DAC2 +1.05V_LAN V_DAC1 6 PCIE_LAN_CLKREQ# MDI1+ C95 0.01U/25V_4 NS681684 *0_4/S PCIE_TXP1_LAN PCIE_TXN1_LAN C161 0.1U/10V_4 PCIE_RXP1_LAN_L C160 0.1U/10V_4 R104 1K_4 PCIE_RXN1_LAN 7 ISOLATEB PCIE_RXP1_LAN 7 +1.05V_LAN R94 CLK_PCIE_LANP CLK_PCIE_LANN 7 CLK_PCIE_LANP 7 CLK_PCIE_LANN 15K/F_4 1 10P/3KV_1808 PCIE_LAN_CLKREQ#R107 7 PCIE_TXP1_LAN 7 PCIE_TXN1_LAN PCIE_RXN1_LAN_L 2 R48 LAN_MX0+ REGOUT VDDREG VDDREG ENSW REG EEDI LED3/EEDO EECS DVDD10 LANW AKEB DVDD33 ISOLATEB PERSTB 13 14 15 16 17 18 19 20 21 22 23 24 U9 75_4 +3V_LAN 48 47 46 45 44 43 42 41 40 39 38 37 MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 AVDD10(NC) MDIP2(NC) MDIN2(NC) AVDD10(NC) MDIP3(NC) MDIN3(NC) AVDD33(NC) DVDD10 SMBCLK(NC) SMBDATA(NC) CLKREQB HSIP HSIN REFCLK_P REFCLK_N EVDD10 HSOP HSON GND 1 2 3 4 5 6 7 8 9 10 11 12 MDI1+ MDI1- C89 0.01U/100V_0603 1K/F_4 LAN_GLINK100# AVDD33 AVDD33 RSET AVDD10 CKXTAL2 CKXTAL1 AVDD33 DVDD10(NC) LED0 DVDD33 GPO/SMBALERT LED1/EESK GND MDI0+ MDI0- R47 D R73 GND VIA x 9 Pcs U10 75_4 LAN_TX# LAN_GPIOS LAN_CLKRQ C130 33P/50V_4 LANRSET 2.49K/F_4 +3V_LAN 25MHz 49 1 29 +3VLANVCC Y5 D 1 +3V_LAN XTAL2 XTAL1 R72 10_4 2 B IND SMD 4.7UH +-20% 680MA(CBC2518T4R7M) CV-4707MZ00 Power trace Layout 寬 寬 > 60mil LAN_GLINK100# LAN_GLED# LAN_TX# LAN_YLED# Link C764 C789 *1000P/50V_4 *1000P/50V_4 RJ45 +3V_LAN +1.05V_LAN R405 330_4 C791 1000P/50V_4 LAN_YLED LAN_YLED# >60mil LAN_MX1C159 0.1U/10V_4 C149 0.1U/10V_4 C132 0.1U/10V_4 C145 0.1U/10V_4 C112 1U/6.3V_4 LAN_MX1+ LAN_MX0LAN_MX0+ +1.05V_LAN +3V_LAN C146 0.1U/10V_4 C155 0.1U/10V_4 R391 LAN_GLED LAN_GLED# 330_4 C125 C115 0.1U/10V_4 0.1U/10V_4 B CN20 11 12 8 7 6 5 4 3 2 1 9 10 LED_AMBER_P LED_AMBER_N RX1RX1+ RX0TX1TX1+ RX0+ TX0TX0+ GND1 14 C797 180P/50V_4 GND 13 C757 180P/50V_4 LED_W HITE_P LED_W HITE_N RJ45_CONN C779 180P/50V_4 C758 1000P/50V_4 A A PROJECT : R53 Quanta Computer Inc. Size Custom Document Number 5 4 3 2 Rev 1A RTL 8105E/RJ45 Date: Monday, November 14, 2011 1 Sheet 29 of 44 1 2 3 4 5 6 7 KEYBOARD Con. POWER BOTTON CONNECT MY5 MY6 MY3 MY7 C141 C166 C170 C154 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 MY8 MY9 MY10 MY11 C162 C124 C211 C201 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 MY1 MY2 MY4 MY0 C143 C147 C150 C136 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 MX4 MX6 MX3 MX2 C128 C116 C139 C138 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 MX7 MX0 MX5 MX1 C113 C144 C133 C110 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 MY12 MY13 MY14 MY15 MY16 MY17 C182 C187 C196 C219 C235 C244 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 33 33 A MX1 MX7 MX6 MY9 MX4 MX5 MY0 MX2 MX3 MY5 MY1 MX0 MY2 MY4 MY7 MY8 MY6 MY3 MY12 MY13 MY14 MY11 MY10 MY15 MY16 MY17 MX[0..7] MX[0..7] *4.7U/6.3V_6 C122 1U/6.3V_4 C121 0.1U/10V_4 CN7 PWR BTN CONN 2. +3VPCU(LIDSWITCH PWR) +3VPCU 33 33 33 LID_EC# NBSWON1# PWR_LED# 1. +3VPCU(LIDSWITCH PWR) 1 2 3 4 5 6 PWR_LED# 3. LIDSWITCH 4.POWERON# 5. PWRLED# 6. GND SI , contact to +3VPCU C119 PWR_LED# 0.1U/10V_4 LID_EC# 0.1U/10V_4 C118 NBSWON1# 0.1U/10V_4 C117 +3V 33 SI2 , for mute LED issue CAPSLED# +3V R152 2 R153 2 1 200/F_6 1 200/F_6 R541 10K/F_4 3 C963 30 CN9 MY[0..17] MY[0..17] SI , mount for EMI SI , reserve for Lid +3VPCU noise 100mA 8 CAPSLED#_R MUTE_LED_CNTL_R WIRELESS_ON_R WIRELESS_OFF_R +3V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 A 2 27 MUTE_LED_CNTL Q47 2N7002 KB CONN SI , delete C120 for QB button drop B R392 *10K/F_4 1 C984 *220P/50V_4 SI2 , reserve for EMI +5V SI , delete G5 for space save KEYBOARD PULL-UP +5V B RP6 R159 1K/F_4 R158 2 1 *200/F_6 +3VPCU R161 1K/F_4 SI, add Mute LED feature R163 2 1 *200/F_6 MY13 MY12 MY3 MY6 RP5 3 3 WIRELESS_OFF_R MY1 MY5 Q18 PDTC144EU 1 MY0 MY9 2 33 WIRELESS_OFF 10 9 8 7 6 +3VPCU 1 2 Q17 PDTC144EU MY14 MY11 MY10 MY15 1 2 3 4 5 *10P8R-8.2K +3VPCU WIRELESS_ON_R 33 WIRELESS_ON 10 9 8 7 6 MY2 MY4 MY7 MY8 1 2 3 4 5 *10P8R-8.2K *8.2K_4 MY16 *8.2K_4 MY17 R142 R148 TOUCH PAD Con. C C +5VS5 TP_LED# C970 *220P/50V_4 SMB_ACC_DAT C968 *220P/50V_4 C973 *220P/50V_4 SMB_ACC_CLK C969 *220P/50V_4 C974 *220P/50V_4 C978 *2200P/50V_4 Q64A change to +3VSUS SMB_ACC_CLK Dual *2N7002KDW 4 3 SCL1 close conn TPCLK TPDATA 6 +3VSUS 2 4.7K_4 4.7K_4 5 R254 R251 +3VSUS CN11 SI , EMI reserve for debug 33 33 TPCLK TPDATA 33 C509 10P/50V_4 C501 BLM18BA470SN1D/0.3A_6 BLM18BA470SN1D/0.3A_6 10P/50V_4 L39 L38 TPLED# C492 SMB_ACC_DAT SMB_ACC_CLK Q51A D Dual 4,7,33,34,35 +3VPCU 8,18,24,25,26,27,31,32,41 +5V 32,41 +3VSUS 2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,31,32,33,41,42,44 +3V 15 GPUT_CLK 0.1U/10V_4 SMB_ACC_DAT 8 7 6 5 4 3 2 1 TPCLK-1 TPDATA-1 25 mils +3VSUS TP_LED# 1 6 SDA1 Dual Q64B 6 *2N7002KDW SI2 , HP request Image sensor SMBUS reserve to FCH TOUCH PAD CONN DFFC08FR026 50503-0080n-001-8p-l 2N7002KDW D 4 3 SMB_ACC_CLK 4.7K_4 5 R263 SMB_ACC_CLK 33 +3VSUS 2 +3V_VGA 15 GPUT_DATA SI , Q21,Q22 change to dual type MOS Q51 1 R262 6 4.7K_4 PROJECT : R53 Quanta Computer Inc. SMB_ACC_DAT 33 SMB_ACC_DAT Dual Q51B 2N7002KDW Size Custom 2KV ESD protection Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A KB/SW/TP Sheet 30 8 of 44 1 2 3 4 5 6 7 8 31 SATA HDD CONNECTOR CPU FAN +5V C667 *2.2U/6.3V_6 Bypass CAP close conn CN25 C668 0.1U/10V_4 1 A +5V CN17 33 FAN_PWM 5 Main HDD 15 2 3 46 6 FAN Connect +3V DFHD04MR155 R356 4.7K/F_4 19 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 SATA_TXP0_C SATA_TXN0_C C955 C952 0.01U/25V_4 0.01U/25V_4 SATA_RXN0_C SATA_RXP0_C C937 C929 0.01U/25V_4 0.01U/25V_4 A SATA_TXP0 8 SATA_TXN0 8 SATA_RXN0 8 SATA_RXP0 8 +3V +5V +5V C894 10U/6.3V_8 C906 4.7U/6.3V_6 C913 0.1U/10V_4 C902 10U/6.3V_8 FAN1SIG FAN1SIG SATA HDD(1ST) C701 *0.1U/10V_4 DFHS13FS022 sata-ah534-00-13p-r B B SATA ODD CONNECTOR SATA ODD +5V CN13 0.01U/25V_4 0.01U/25V_4 Reserve for AMD SATA_TXP1 8 SATA_TXN1 8 SATA_RXN1 8 SATA_RXP1 8 C923 ZERO_ODD_DP# 1 3 +5V_ODD ZERO_ODD_DA# 2 R321 *10K/F_4 ODD_PLUGIN# R515 1M/F_4 6 High : ODD power on Low : ODD power down Q27 *ME2N7002E 8 ODD_PWR R318 *0_4/S ODD_PD R319 *0_4 3 +3V R322 *10K/F_4 33 6 Q63B SATA ODD ODD_DA#_FCH C R516 10K/F_4 Q63A DMP2130L-7 R519 *0_8 2 C922 5 4 19 1 Q45 1000P/50V_4 1 C654 C655 3 0.01U/25V_4 0.01U/25V_4 1 C651 C653 SATA_RXN1_C SATA_RXP1_C 2N7002DW-7-F 2 SATA_TXP1_C SATA_TXN1_C 2 1 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 .027U/25V_6 +5V_ODD Dual 6 2N7002DW-7-F Dual DFHS13FS022 sata-ah534-00-13p-r SI , Q28,Q43 change to dual type MOS Q63 +5V_ODD 120 mils C657 10U/6.3V_8 C658 0.1U/10V_4 C659 0.1U/10V_4 C660 0.1U/10V_4 C656 0.1U/10V_4 D D PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A HDD/ODD/FAN Sheet 31 8 of 44 1 2 Mini PCI-E Card 1 3 4 5 6 WLAN 7 8 +1.5V 32 +3V +3V 6 BT_COMBO_OFF# +3V D13 RB501V-40 R332 4.7K_4 C665 0.01U/25V_4 C687 10U/6.3VS_6 C691 0.1U/10V_4 C672 0.1U/10V_4 C663 0.1U/10V_4 C666 10U/6.3VS_6 R326 +MINIEC_5V *0_4 R327 33 EC_DEBUG1 *0_4 EC debug pin 2 PCIE_TXP0_WALN 2 PCIE_TXN0_WLAN PCIE_TXP0_WALN PCIE_TXN0_WLAN 2 PCIE_RXP0_WLAN 2 PCIE_RXN0_WLAN PCIE_RXP0_WLAN PCIE_RXN0_WLAN CLK_33_DEBUG MINI_PCIE_RST# 7 CLK_33_DEBUG CLK_WLAN_P CLK_WLAN_N 7 CLK_WLAN_P 7 CLK_WLAN_N 6 PCIE_MINI_CLKREQ# 8 BT_COMBO_EN# R348 *0_4 BT_COMBO_EN_R# MINICAR_PME# 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved 15 13 11 9 7 5 3 1 GND REFCLK+ REFCLKGND CLKREQ# BT_CHCLK BT_DATA W AKE# BT_DATA,BT_CHCLK,CLKREQ# internal pull-DOWN 100k ohm +3.3V GND +1.5V LED_W PAN# LED_W LAN# LED_W W AN# GND USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux PERST# W _DISABLE# GND 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 Reserved Reserved Reserved Reserved Reserved +1.5V GND +3.3V 16 14 12 10 8 6 4 2 MINI_BLED RF_LINK# R330 *4.7K_4 R329 0_4 R328 *0_4 R331 4.7K_4 +3V A RF_LINK# BLUELED 33 RF_LINK# 33 +3V USBP8+ 6 USBP86 MINI_PCIE_RST# INTEL WLAN CARD PIN 20 W_DISABLE# have internal pull-up 110k ohm MINI_PCIE_RST# 7 RF_OFF# 8 LAD0 LAD1 LAD2 LAD3 LFRAME# LAD0 LAD1 LAD2 LAD3 LFRAME# +3VSUS R355 *10K/F_4 2 CN18 +5V A C670 0.1U/10V_4 +1.5V 7,33 7,33 7,33 7,33 7,33 3 6,29 PCIE_WAKE# 1 Q31 *DTC144EUA MINICAR_PME# MINI PCIE H=11 DFHS52FR099 MIPCI-C-1759513-52P-LDV-SMT B B SI, CN18 change to 11H CLK_33_DEBUG R337 51/F_4 C677 EMI 15P/50V_4 2,4,11,23,38,41 +1.5V 2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,30,31,33,41,42,44 +3V 4,7,30,33,34,35 +3VPCU 8,18,24,25,26,27,30,31,41 +5V SI , add for EMI Accelerometer Sensor 2N7002DW-7-F Dual 4,33 MBDATA2 +3V Q65A 3 4 ACCEL_MBDATA2 U14 HP3DC2TR 4.7K_4 5 R538 C 2 +3V 4,33 MBCLK2 C311 0.1U/10V_4 +3V 6 R540 1 C366 0.1U/10V_4 1 14 Vdd_IO VDD 11 9 INT1 INT2 7 6 4 SDO SDA SCL 8 CS 4.7K_4 NC NC ACCEL_MBCLK2 Dual 2N7002DW-7-F C 2 3 Q65B 7 ACCEL_INT ACCEL_INT TP21 R174 *0_4/S ACCEL_MBDATA2 ACCEL_MBCLK2 SI2 , add for avoid leakage from SUS power +3V R167 *0_4/S RESERVED RESERVED RESERVED RESERVED 10 13 15 16 GND GND 5 12 AL003DC2A00 ACCEL_INT MBDATA2 C339 33P/50V_4 MBCLK2 C367 33P/50V_4 C303 22P/50V_4 D D PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A MINI PCIE & G-sensor Sheet 32 8 of 44 1 2 3 4 5 +3V R406 0_4 KBC_P+3V +3VPCU ITE pin 100 , 104 , 106 default can not pull up to +3VPCU it will cause chip into test mode +3VPCU_AC +3VPCU_EC R416 0_4 3920_RST# EC_RCIN# EC_A20GATE SERIRQ KBSMI#1 SCI1# 3920_RST# EC_RCIN# 17 LPCPD#/W UI6/GPE6 LPC C484 *22P/50V_4 PS2DAT2/W UI21/GPF5 PS2CLK2/W UI20/GPF4 80 104 33 88 81 87 108 109 DAC4/DCD0#/GPJ4 DSR0#/GPG6 GINT/CTS0#/GPD5 PS2DAT1/RTS0#/GPF3 DAC5/RIG0#/GPJ5 PS2CLK1/DTR0#/GPF2 RXD/SIN0/GPB0 TXD/SOUT0/GPB1 BIOS_SPI_CLK 106 105 GPG0 FSCK BIOS_RD# BIOS_WR# BIOS_CS# GPU_AC_BATT 103 102 101 100 FMISO FMOSI FSCE# SSCE0#/GPG2 EC_DEBUG1 28 USBPW_ON# L34 BLM15AG700SS1_4 15 GPU_AC_BATT 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 58 59 60 61 62 63 64 65 OSCI 128 2 Y6 1 C481 2 *27P/50V_4 CK32K CK32KE AJ085180F04 PS/2 1 10K/F_4 R383 C739 100/F_4 R382 12K/F_4 AD_ID +3VPCU_AC L65 SBK160808T-121Y-N +3VPCU_EC L64 SBK160808T-121Y-N 34 A 500mA C737 100P/50V_4 127 KSO16/SMOSI/GPC3 KSO17/SMISO/GPC5 56 57 MY16 MY17 MY16 MY17 19 20 SUSON CAPSLED# SUSON 40,41 CAPSLED# 30 107 99 98 97 96 95 94 93 PWRLED_RIGHT EC_BIOS_WR# EC_BIOS_RD# EC_BIOS_SPI_CLK_I EC_BIOS_CS# MAINON RF_LINK# CLKRUN# TPLED# 30 VRON 37,38 C802 D20 1 2 RB501V-40 SIO_EXT_SCI# 6 DNBSWON1# D21 1 2 RB501V-40 DNBSWON# 6 KBSMI#1 D19 1 2 RB501V-40 SIO_EXT_SMI# 6 *0.1U/10V_4 30 30 SMB_ACC_CLK SMB_ACC_DAT MBCLK MBDATA MBCLK2 MBDATA2 C763 *0.1U/10V_4 C483 DGPU_PR_EN *0.1U/10V_4 +3VS5 FAN1SIG PWRLED_RIGHT 28 EC_BIOS_WR# 8 EC_BIOS_RD# 8 EC_BIOS_SPI_CLK_I 8 EC_BIOS_CS# 8 MAINON 9,34,36,40,41 RF_LINK# 32 CLKRUN# 7 +3VPCU SI2,change to +3VS5 for leakage issue Vender Size AMIC For GPU thermal SMB_ACC_CLK 30 SMB_ACC_DAT 30 for Battery MBCLK 34 charge/discharge MBDATA 34 MBCLK2 4,32 MBDATA2 4,32 for CPU themal 47K_4 R415 *47K_4 LID_EC# C803 +3VS5 AKE39F-0800 10K/F_4 NBSWON1# R397 4.7K_4 MBCLK C784 *0.1U/10V_4 R398 4.7K_4 MBDATA C788 *0.1U/10V_4 R399 4.7K_4 MBCLK2 C786 *0.1U/10V_4 R402 4.7K_4 MBDATA2 C790 *0.1U/10V_4 C794 220P/50V_4 AKE39ZN0Q02 Socket R417 RSMRST# DFHS08FS023 RSMRST# 6 C796 2.2U/6.3V_4 R407 +3VS5 *8.2K_4 3920_RST# 4M SPI EC ROM +3VPCU +3VPCU R394 470K_4 C772 0.1U/10V_4 U20 UART PWM PW M0/GPA0 PW M1/GPA1 PW M2/GPA2 PW M3/GPA3 PW M4/GPA4 PW M5/GPA5 PW M6/SSCK/GPA6 PW M7/GPA7 24 25 28 29 30 31 32 34 R193 LAN_POWER VOLMUTE# PWM_VADJ TACH0/GPD6 TACH1/TMA1/GPD7 47 48 FAN1SIG S5_ON TMR0/W UI2/GPC4 TMR1/W UI3/GPC6 120 124 0_4 WIRELESS_OFF 30 WIRELESS_ON 30 AC_LED_ON# 34 MBATLED0# 34 FAN_PWM 31 LAN_POWER 41 VOLMUTE# 27 PWM_VADJ 11 FAN1SIG S5_ON SUSC# ECPWROK BIOS_CS# BIOS_SPI_CLK_I BIOS_WR# BIOS_RD# 1 6 5 2 CE# SCK SI SO VDD 8 HOLD# 7 SPI_3P 3 W P# VSS 4 R404 SPI_7P C795 31 35,36 NBSWON1# LID_EC# ACIN 125 18 21 W UI5/GPE5 RING#/PW RFAIL#/CK32KOUT/LPCRST#/GPB7 35 112 SUSB# PWR_LED# ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/W UI28/GPI4 ADC5/W UI29/GPI5 ADC6/W UI30/GPI6 ADC7/W UI31/GPI7 66 67 68 69 70 71 72 73 R185 R393 SYS_I AD_AIR TEMP_MBAT AD_TYPE GPIO42 DAC0/GPJ0 DAC1/GPJ1 DAC2/GPJ2 DAC3/GPJ3 76 77 78 79 KBMX A/D D/A CLOCK NBSWON1# 30 LID_EC# 30 ACIN 34,41 10K/F_4 +3V CLK_33M_KBC +3VPCU C518 0.1U/10V_4 U19 BIOS_CS# BIOS_SPI_CLK_I BIOS_WR# BIOS_RD# TP90 from power button ICT need TP2675 size test point R259 33_4 +3VPCU EMI SI R223 10K/F_4 SPI_3P R222 *100K/F_4 1 6 5 2 3 CE# SCK SI SO VDD 8 HOLD# 7 W P# VSS 4 C SPI_7P R260 10K/F_4 TP39 *DFHS08FS023 SOIC8-6-1_27 TP37 C517 22P/50V_4 TP place on top lay for ICT request 10K/F_4 GPIO42 R396 *10K/F_4 SUSB# 6 PWR_LED# 30 0_4 0_4 R408 33_4 128K byte SPI EC ROM SUSC# 6 ECPWROK 4,10,18 PW RSW /GPE4 RI1#/W UI0/GPD0 RI2#/W UI1/GPD1 BLUELED R403 SI , add for EMI TP91 TP89 WAKE UP *100K/F_4 15P/50V_4 EN25Q32B-104HIP AKE39ZN0Q02 SOIC8-8-1_27 TP92 VGA_ON_SB 6 DGPU_PWROK 7,18,42,43,44 SYS_I 34 AD_AIR 34 TEMP_MBAT 34 Adapter select SI , drop QB button feature DNBSWON1# BATSHIP 34 PCI_SERR# 7 ODD_PD 31 +3VPCU R395 adapter Platform model GPIO42 SG/DIS High UMA Low Hi ==> DIS/SG Low ==>UMA 90W 65W D 4 IT8518E/HX L32 BK1608HS121-T C447 0.1U/10V_4 C473 IT8518_AGND PROJECT : R53 Quanta Computer Inc. IT8518_AGND Size Custom Document Number 2 3 4 5 6 7 Rev 1A EC (KB3926)/ROM Date: Friday, November 11, 2011 1 100P/50V_4 B P/N 4M 4M EON R414 SI , del QB button PU resistor R392 For +VIN noise Add TP SMBUS signal 117 118 110 111 115 116 SCI1# HWPG Add G-sensor SMBUS signal OSCIO *27P/50V_4 82 SMCLK2/W UI22/GPF6/PECI SMDAT2/W UI23/GPF7 SMCLK0/GPB3 SMDAT0/GPB4 SM_BUS SMCLK1/GPC1 SMDAT1/GPC2 FLASH KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15 KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7 *32.768KHZ R217 0_4 3 D 90 89 HWPG EMU_LID BIOS_SPI_CLK_I C TPDATA TPCLK DGPU_PR_EN 4,23,35,36,37,40 HWPG 23 EMU_LID 32 PS2DAT0/TMB1/GPF1 PS2CLK0/TMB0/GPF0 75 36 VR2.5_ON 42,43,44 DGPU_PR_EN 86 85 VSS VSS VSS VSS VSS TPDATA TPCLK H_PROCHOT# BLUELED TPLED# VRON EGAD/W UI25/GPE1 IT8518E/HX VSS 30 30 GPC0 TMA0/GPB2 1 4 H_PROCHOT# 32 BLUELED R387 0.1U/10V_4 84 83 SBUSY/GPG1/ID7 HMOSIGPH6/ID6 HMISO/GPH5/ID5 HSCK/GPH4/ID4 HSCE#/W UI19/GPH3/ID3 CTX1/W UI18/GPH2/SMDAT3/ID2 CRX1/W UI17/GPH1/SMCLK3/ID1 CLKRUN#/W UI16/GPH0/ID0 27 49 91 113 122 RSMRST# AD_TYPE EGCLK/W UI27/GPE3 EGCS#/W UI26/GPE2 GPIO SI, remove NUMLED# Change to 1SS355 as Current loss Change to RB500 as Current loss L80HLAT/BAO/W UI24/GPE0 L80LLAT/W UI7/GPE7 GA20/GPB5 SERIRQ ECSMI#/GPD4 ECSCI#/GPD3 W RST# KBRST#/GPB6 PW UREQ#/BBO/GPC7 B 119 123 VSTBY LAD0 LAD1 LAD2 LAD3 LPCRST#/W UI4/GPD2 LPCCLK LFRAME# 126 5 15 23 14 4 16 3 74 11 26 50 92 114 121 10 9 8 7 22 13 6 VCORE 4 6 33 +3VPCU D18 1SS355 12 EC_A20GATE SERIRQ LFRAME# VBAT AVCC LAD0 LAD1 LAD2 LAD3 AVSS 6 7 8 +3VPCU C775 0.1U/10V_4 VCC VSTBY VSTBY VSTBY VSTBY VSTBY U16 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 *10U/6.3V_8 +3VPCU CAP close to EC pin C451 0.1U/10V_4 7,32 LAD0 7,32 LAD1 7,32 LAD2 7,32 LAD3 7 KBC_RST# 7 CLK_33M_KBC 7,32 LFRAME# 7 2 C806 C485 C798 C780 C768 C805 C804 C783 C765 C807 +3VPCU A 6 Smart adapter Type check ,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,30,31,32,41,42,44 +3V 4,7,30,34,35 +3VPCU 4,34,35,36 +5VPCU Sheet 33 8 of 44 5 4 3 EC16 1000P/50V_4 MBCLK SDA BQCLK 9 SCL +VAD 0_6 DB 1 2 *1N4448WS-7-F 2 0.1U/25V_4 3 +VAD 0.1U/25V_4 10/F_4 12 BQSRN PR60 7.5/F_4 10U/25V_8 10U/25V_8 PDZ5.6B 0.01U/25V_4 0.01U/25V_4 1 1 *100P/50V_4 0.1U/25V_4 10U/25V_8 1 2 PR243 *0_2/S PC140 2200P/50V_4 PC242 PC243 PC96 PC238 PD19 CSOP CSON PC32 11 BQBATDRV PC30 PR42 PR47 10/F_4 B +BATCHG SYS_I PC23 33 PC182 PR238 470_8 33 BATSHIP 1 PR101 1M/F_4 2 PDZ5.6B 1000P/50V_4 10U/25V_8 4 PC54 Place this cap close to EC 2 PR100 1M/F_4 C +BATCHG PR245 RC1206-R020 F3_2X1_65-2_8 PR246 *0_2/S DB 2 1 +PRWSRC Place this cap close to EC 0.1U/25V_4 PR53 +3VPCU PQ16 2N7002K MIN. BATV=7.2V PC184 3 PC21 *100P/50V_4 2200P/50V_4 EC14 SI PC48 0.1U/25V_4 PR69 2 PR57 88.7K/F_4 0.1U/25V_4 S 0.1U/25V_4 4.7U/25V_8 8 7 6 5 3 2 1 EC6 TEMP_MBAT 33 1K/F_4 1 13 BQSRP 100K/F_4 PR55 69.8K/F_4 bat-bp02081-b82d5-7h-8p-l-v 0.1U/25V_4 SRP *100K/F_4 430K/F_4 1 2 3 +VAD_1 ACDET=13V +VA +VH28 41 +VAD_1 41 +3VPCU 4,7,30,33,35 +5VPCU 4,35,36 +BATCHG EC15 PR49 PQ11 *IMD2 0.1U/50V_6 Place this cap close to EC 200275GR008G58BZL DFAD08MR022 PD9 PC39 PR167 2.2_6 1 6 5 6 PD7 +VAD SI 8 PR77 330_4 PC38 EC9 8681LR BQLODRV 14 21 22 23 24 25 BATDRV 8 PL22 GND GND GND GND GND GND SRN 7 6 B_TEMP_MBAT6 SI 4.7uH BQIOUT PR48 12.4K/F_4 8 *0_4/S PR261 *1N4448WS-7-F *0_4/S PR34 BQDATA 9 7 1 1 RB501V-40 *1N4448WS-7-F PD6 1 2 4 PC183 0.1U/10V_4 MAINON PR17 PC118 DB PQ33 EMB20N03V LODRV VCC 9 5 2 PC80 0.47U/25V_6 MBDATA 9,33,36,40,41 20 4 5 10U/25V_8 BQVCC 22_8 PC117 0.01U/25V_4 AD_AIR ACIN PR129 1 *1N4448WS-7-F PD11 2 1 IOUT PR24 75K/F_4 MBCLK PC116 PC84 0.047U/25V_4 7 2 ILIM PD10 2 1N4448WS-7-F BQ24728 BQPHASE 19 RB501V-40 4 PR75 REGN6V 15 100K/F_4 10 1 ACPRES PR79 +VAD_1 +VA PD5 PHASE PU8 ACDET DB 5 PD13 BQB_1 PR115 BQB_2 17 0_6 SMC 10U/25V_8 ACIN DB,SI 33 D BTST 10 PR74 200K/F_4 PD8 4 2 3 10 +3VPCU 2 ACDRV DB ACIN BQHIDRV 18 1 SI-2 PR80 100K/F_4 33,41 HIDRV PQ31 EMB20N03V 2 3 8 7 6 5 4 CMSRC REGN6V +VA_AIR 33 PC253 3 2 1 BQACDRV PQ49 PDTC144EU 1U/10V_4 100P/50V_4 1 3 MBATLED0# 33 ACN 2.43K/F_6 2 PC75 16 0.1U/25V_4 0.1U/25V_4 +5VPCU PC81 REGN 2 PR20 PC70 1 PC71 0.1U/25V_4 REGN6V 1 3 MBDATA CSIN +VA 1K_6 2 3 1 PQ9 2N7002K 33 PR113 BQACN 1 MMDT2907A BQCMSRC *0.1U/25V_4 *10U/25V_8 1 PR84 4.02K/F4 PR125 *0_2/S CSIP PR232 4.02K/F4 6 2 PR120 220K_4 PR112 1M/F_4 3 5 Q1 2 PQ8 PDTC144EU 3 Q2 4 PR99 220K_4 PR61 1M/F_4 PC95 2 PR88 1M/F_4 PR123 *0_2/S BQACP 3 +VAD MBATLED0# +12VALW B 2 D 2 SMD PC87 PR78 330_4 PD18 P4SMAJ20A +5VPCU AC_LED_ON# 33 PQ28 PDTC144EU PC115 0.01U/25V_4 +VIN PR124 RC1206-R010 1 PR64 3 2 PC90 1 1 BATDIS_G 4.02K/F4 BATDIS_ID_DOD SI CN15 BATT+ 80/5A Place this ZVS close to Far-Far away +VIN PQ18 1 BQBATDRVPR147 PC232 1 2.43K/F_6 PC248 5 PL8 80/5A PL6 3 2 1 0.1U/25V_4 3 PQ13 2N7002K 1 *0.1U/25V_4 PC250 2200P/50V_4 ACP 2 +12VALW +BATCHG PQ27 AON6414AL PQ14 PDTC144EU PR81 1M/F_4 C PQ48 P0603BDG 4 3 0.1U/50V_6 To PWR LED PC69 0.1U/25V_4 2 DC-IN CONN PC234 0.1U/25V_4 PC230 AC_LED_ON# PC255 +VAD 2 *10U/25V_8 1 P4SMAJ20A EC13 4 80/5A 1 2 3 EC12 *10U/25V_8 5 6 7 8 4 3 4 PD17 EC11 G 0.1U/25V_4 7 80/5A PL18 PC246 LED2 GND GND LED1 PQ46 ME7835 PL19 EC10 *10U/25V_8 1 2 GND 8 Place this ZVS close to Diode away +VIN +VA IDEA_G 6 33 +VA_AC CN16 AD_ID D 34 Do Not add test pad on BATDIS_G signal 0.1U/25V_4 5 AD_ID VDD VDD 1 +PRWSRC DC_JACK 90W DB 2 PQ47 2N7002K A A 2 PQ15 METR3904-G 1 AD_AIR 3 PR68 1M/F_4 PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 5 4 3 2 Rev 1A Charger (BQ24728) 1 Sheet 34 of 44 5 4 3 2 1 DC/DC +3VS5/+5VS5 35 D D +VIN DB +VIN_5VS5 Place these CAPs close to FETs PL7 *0_8/S Place these CAPs close to FETs 2200P/50V_4 0.1U/25V_4 68P/50V_4 DB +VIN PL10 *0_8/S +VIN +5VPCU DB 10U/6.3V_6 PC74 PR110 10_8 +3VPCU DB +2VREF EC7 PC82 PC99 PC88 PC237 PC89 0.1U/25V_4 4.7U/25V_8 +VIN_3VS5 4.7U/25V_8 EC8 4.7U/25V_8 PC104 2200P/50V_4 PC103 0.1U/25V_4 PC93 68P/50V_4 PC94 4.7U/25V_8 0.1U/25V_4 PC106 +5VPCU 3V_PHASE2 12 3V_LGATE2 23 PGOOD HWPG OUT2 7 FB2 5 8 7 6 5 3 2 1 PL25 2.2UH/8A +3.3V_ALWP PR248 PR241 2.2_6 3V_FB2 + 4 PQ52 AON7702A PC240 PR97 PR27 80.6K/F_4 *0_2/S 1 11 LGATE2 +3VS5 0.1U/25V_4 Rds(on) 14m ohm *0_2/S PC258 PC257 PR23 6.8K/F_4 2 PGOOD 2.2_6 PQ53 EMB20N03V 4 PC56 330U/6.3V_6X5.8 5V_FB1 VOUT1 FB1 9 PHASE2 LGATE1 24 2 PR70 C 8 7 6 5 BOOT2 3V_UGATE2 3 2 1 17 3 REF VREG5 16 8 VREG3 10 0.1U/10V_4 Rds(on) 14m ohm PR51 0_4 UGATE2 +3.3 Volt +/- 5% Countinue current:4A Peak current:6A OCP minimum:7.5A 2200P/50V_4 PR25 10K/F_4 4,23,33,36,37,40 10K/F_4 PHASE1 1 PC239 PR52 +3VS5 4 SKIPSEL GND GND 4 PQ51 AON7702A DB TONSEL DB PU7 TPS51123A ENC 5 6 7 8 PR26 15.4K/F_4 1 2 3 0.1U/10V_4 PR240 2.2_6 2200P/50V_4 1 PC252 330U/6.3V_6X5.8 2 PC256 5V_LGATE1 19 UGATE1 BOOT1 PR30 *0_2/S 14 25 15 5V_PHASE120 PR247 *0_2/S 22 2.2_6 +5V_ALWP + 5V_BST1 18 1 2 3 0.1U/25V_4 5V_UGATE121 PR63 EN0 ENTRIP2 PC49 13 6 *330K/F_4 4 +5VS5 PL24 2.2UH/8A 8205EN VIN PR95 PC15 1U/6.3V_4 ENTRIP1 PQ50 EMB20N03V 0.1U/25V_4 DB 5 6 7 8 C +5 Volt +/- 5% Countinue current:4A Peak current:6A OCP minimum:7.5A 10U/6.3V_6 PC26 PC79 PR94 *665K/F_4 PR21 90.9K/F_4 B B PR22 10K/F_4 PR93 S5_ON S5_ON 0_4 33,36 PC76 *0.1U/10V_4 DB for prevent interference 1 A 1U/6.3V_4 PC51 2 0.1U/10V_4 2 0.01U/25V_4 1 PC50 1000P/50V_4 1 PC52 2 PC53 1U/6.3V_4 1 PC60 2 PC65 0.1U/10V_4 2 PC47 1 PC33 0.01U/25V_4 2 A 1000P/50V_4 1 +3VS5 PROJECT : R53 Quanta Computer Inc. Size Custom Date: 5 4 3 2 Document Number Rev 1A 3/5VPCU(TPS51123A) Friday, November 11, 2011 1 Sheet 35 of 44 5 4 3 2 1 36 SI-2 PR262 +5VPCU +VIN_1.1V 10_6 2200P/50V_4 0.1U/25V_4 4.7U/25V_8 *4.7U/25V_8 0.1U/25V_4 8 7 6 5 4 RT8238DH1.1V 2 PC208 PR227 RT8238BST1.1V RT8238BST_1_1.1V 2.2_6 0.1U/25V_4 RT8238LX1.1V 1 RT8238DL1.1V PR222 +1.1V Volt +/- 5% Countinue current:5A Peak current: 6.5A OCP minimum:7.5A PQ44 EMB20N03V +1.1VS5 PL30 PR260 8 7 6 5 2.2UH/8A 600 mils PR229 2.2_6 *0_2/S + 2 4 PQ45 AON7702A Vo=0.5(R1+R2)/R2 PC217 PC205 0_4 *100P/50V_4 RDSon=14m ohm PR223 PC277 PC215 0.1U/10V_4 RT8238TON1.1V 11 PC211 2200P/50V_4 +5VS5 C PC216 FB PAD 12 0.33U/6.3V_4 13 MODE PC204 PC213 1 BOOST 4 PC212 3 2 1 3 D PC210 390U/2.5V_6X5.8ESR10 RT8238VCC1.1V TON UGATE RT8238FB1.1V 6 PR221 S5_ON PU17 RT8238HW PG_S2A1.1V 9 PGOODRT8228AZ PHASE RT8238EN1.1V 10K/F_4 8 EN LGATE GND 33,35 DB 0_4 7 PR220 4,23,33,35,37,40 HW PG RT8238ILIM1.1V 10 CS *0_8/S 360K/F_4 3 2 1 100K/F_4 5 1U/6.3V_4 PC206 VCC *10_6 PR224 PL14 PR226 +5VS5 D +VIN DB PR228 C 12K/F_4 PR225 10K/F_4 PR177 0_6 1 4.7U/6.3V_6 PC129 VIN PU11 3407EN2.5V 3 *10K/F_4 PR156 SW 5 GND 2 3407SW 2.5V 2.2uH/1.3A_2520 EN PR166 FB 9,33,34,40,41 MAINON *0_2/S 10K/F_4 AP3407A R1 0.1U/10V_4 PC119 3407VFB2.5V PR153 PC128 PC127 0.1U/10V_4 VR2.5_ON +2.5V PL11 4 PR155 33 B +2.5V +/- 5% Countinue current:0.3A Peak current:0.75A +3VS5 10U/6.3V_8 B 316K/F_4 VO=(0.6(R1+R2)/R2) R2 PR154 100K/F_4 A A PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 5 4 3 2 Rev 1A +1.1VS5 (RT8228)/2.5V 1 Sheet 36 of 44 5 4 3 2 1 37 +VIN_1.2V D RT8238ENPCH C +5VS5 RT8238TONPCH 11 TON EN 13 PAD PR157 0_4 PHASE 2 RT8238LXPCH LGATE 1 RT8238DLPCH 2.2_6 *4.7U/25V_8 0.1U/25V_4 4.7U/25V_8 2200P/50V_4 8 7 6 5 0.1U/25V_4 RT8238VCCPCH 5 PGOOD RT8228AZ 8 12 *0.1U/10V_4 PC122 9 PC92 +1.05V PCH Volt +/- 5% Countinue current:4A Peak current:6A OCP minimum:7.5A +1.2V 4 PQ29 EMB20N03V +1.2V_S2 PL23 2.2UH/8A 3 2 1 RT8238HWPG_S2APCH PC121 PR148 RT8238BSTPCH RT8238BST_1PCH PC111 0.1U/25V_4 600 mils PR249 PR176 2.2_6 *0_2/S + 4 Vo=0.5(R1+R2)/R2 PQ32 AON7702A PC134 2200P/50V_4 PC108 PR139 *100P/50V_4 RDSon=14m ohm PR140 0_4 PR138 VDDP_FB_H 4 14K/F_4 PC263 PC265 0.1U/10V_4 0_4 RT8238DHPCH 4 PC251 1 0_4 PR165 3 PC244 2 PR172 UGATE BOOST PC249 8 7 6 5 VRON PU10 3 2 1 HWPG DB FB 33,38 PL9 *0_8/S 360K/F_4 RT8238FBPCH 6 4,23,33,35,36,40 MODE 100K/F_4 RT8238ILIMPCH 10 CS GND PR173 VCC 1U/6.3V_4 PC109 7 10_6 D +VIN DB PR174 390U/2.5V_6X5.8ESR10 PR137 +5VS5 C *0_4 PR134 10K/F_4 B B A A PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 5 4 3 2 Rev 1A +1.2V (RT8228) 1 Sheet 37 of 44 5 4 3 2 PR40 100/F_4 *1K/F_4 PC25 ISENS1_NB PR54 0_4 COMP_NB FB_NB VSEN_NB PGOOD_NB FCCM_NB_1 PWM2_NB 44 45 42 41 40 PU9 VDDIO ISL6277 6277NTC 12 38 PHASEX UGATEX 36 BOOTX PWM2_NB 37 PR109 1_6 PC64 GND HG2 SW2 39 LG2 39 C 39 +5VS5 1U/6.3V_4 6277_PWMY 39 PC85 HG1 39 SW1 39 SI LG1 0_4 6277PGOOD 6277FB PR135 6277COMP PC282 1000P/50V_4 6277FB2 PC91 6277VSEN 10K/F_4 PR151 29 SW1 0.22U/25V_6 PR127 LG1 39 +1.5V 10K/F_4 CPU_VRM8380_PG 10 PR171 PC100 301/F_4 B PC130 1000P/50V_4 100P/50V_4 PC101 PC110 0.22U/10V_4 PC102 390P/50V_4 PR142 PR161 2.32K/F_4 137K/F_4 SI PR131 *32.4K/F_4 SI ISENS1 30 VDD 26 ISENS2 VSUMN VDDP PHASE1 6277RTN 1/F_4 PR152 LG2 NTC 6277ISUMN VSUMP_1 VSUMN_1 VSUMP_1 SW2 0.22U/25V_6 31 SW1_B VSUMP 39 VSUMN_1 32 LGATE2 24 ISENS1 39 PHASE2 BOOT1 ISENS2 PR150 10K/F_4 PR162 34 IMON SI-2 +5VS5 33 BOOT2 HG1 PUT COLSE TO VCORE HOT SPOT B UGATE2 28 ISENS3 1000P/50V_4 PR126 18.2K/F_4 +VIN_VCC_CORE 25 PR82 100K/F_4 NTC PR130 27.4K/F_4 PC83 1_6 PW MY PW ROK LGATE1 2 PR56 PC45 0.22U/25V_6 HG2 PC63 SW2_B SI UGATE1 VR_HOT_L PGOOD 0_4 6277PWROK 10 35 PC78 1U/6.3V_4 6277_PWMY 23 0_4 PR106 39 VIN 27 6277VRHOT 5 PR87 LGATEX SVT FB 8 COMP 6277SVT 21 6277VDDIO 7 0_4 22 0_4 PR128 10P/50V_4 PR92 1 SI PGOOD_NB SVD PR107 *10K/F_4 PR118 105K/F_4 FB_NB ENABLE 6 SI-2 DB VSEN_NB VSUMP_NB 43 9 6277SVD 6277IMON 11 +1.5V COMP_NB ISUMN_NB 47 6277EN 0_4 VSEN 2 CPU_PWRGD_SVID_REG 0_4 PR119 18 +1.5V PR132 RTN CPU_SVT SVC 19 4 SI PR86 VRHOT *1K/F_4 4 ISUMN CPU_SVD 6277SVC 17 VRON 2 0_4 ISUMP 33,37 IMON_NB PR114 49 VRHOT CPU_SVC Reserve for ISL6277 version A issue. DB,SI NTC_NB 16 DB 2 ISEN2_NB ISEN1 SI +1.5V 2 15 PC59 1000P/50V_4 18.2K/F_4 4 ISENS2_NB 1 6277IMON_NB 3 PR85 105K/F_4 PR65 SI-2 PC43 0.22U/10V_4 6277NTC_NB 2 PR217 100K/F_4 NTC PR76 27.4K/F_4 ISEN1_NB PC281 1000P/50V_4 ISUMP_NB ISENS1_NB 46 0.22U/10V_4 VSUMP_NB SI-2 C SI PC28 ISENS2_NB SI-2 1 DB,SI DB 0.1U/10V_4 3.65K/F_4 PUT COLSE TO VDDNB HOT SPOT FCCM_NB 39 PR59 42.2K/F_4 *0.1U/10V_4 VSUMN_NB SI 10K/F_4 PR14 PR169 *0_4/S PWM2_NB 39 48 VSUMP_NB_Y2 1/F_4 PR12 *1K/F_4 PC42 ISUMN_NB VSUMN_NBY2 CPU_VRM8380_PG 10 PC20 PR39 VSUMN_NB ISENS1_NB 10K/F_4 PR8 D SI PR50 499/F_4 ISEN3 39 VSUMP_NB_Y2 PR255 10K/F_4 NTC PUT COLSE TO VDDNB Inductor 4 PC9 330P/50V_4 PR11 PC17 13 39 VSUMN_NBY2 PC6 CPU_VDDNB_RUN_FB_H 0_4 3.01K/F_4 ISEN2 PR6 PR44 11.5K/F_4 VSUMP_NB 3.65K/F_4 137K/F_4 390P/50V_4 14 10K/F_4 PR5 PR28 1000P/50V_4 PR36 SI FCCM 1/F_4 PR7 FB2 VSUMP_NB_Y 0.1U/10V_4 VSUMP_NB_Y PC18 0.1U/10V_4 VSUMN_NBY 39 VSUMN_NB +VDDNB_CORE PC5 301/F_4 100P/50V_4 1 39 VSUMN_NBY *470P/50V_4 PR10 PR29 2.05K/F_4 2 D ISENS2_NB 20 PR13 10K/F_4 PR9 38 PC10 PR15 PR43 *32.4K/F_4 1 PR160 *1K/F_4 0.22U/10V_4 PR145 2.05K/F_4 VSUMP PC132 *470P/50V_4 3.65K/F_4 PR214 100/F_4 +VCC_CORE SI VSUMP_2 VSUMN_2 VSUMP_2 1/F_4 PR141 10K/F_4 PR136 A 3.65K/F_4 1 VSUMN SI ISENS2 VSUMP PUT COLSE TO VCORE Inductor PC97 330P/50V_4 SI PC114 PR233 10K/F_4 NTC PC113 VSUMN 0.033U/10V_4 39 VSUMN_2 PR146 11.5K/F_4 0.22U/10V_4 39 10K/F_4 PR158 ISENS1 2 PR149 SI PR143 0_4 PR144 CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L 619/F_4 PR159 *1K/F_4 PC112 0.1U/10V_4 0_4 PR163 PC120 PC98 2 1 *0.1U/10V_4 0.01U/25V_4 4 4 A PR213 100/F_4 PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 5 4 3 2 Rev A ISL6277 1 Sheet 38of 44 5 4 3 2 1 +VIN_VCC_CORE 39 +VIN DB PL15 4 S 1 2 3 1_6 PQ20 TPCA8064-H PC218 2 2 SI 1 1 + PC259 0.1U/25V_4 G HG1_G PC46 470U/25V_EC_10H 4.7U/25V_8 PR234 HG1 HG1 PC57 2200P/50V_4 4.7U/25V_8 D 38 PC222 0.1U/25V_4 PC224 *4.7U/25V_8 PC226 5 PC220 4.7U/25V_8 *0_8/S +VCC_CORE PL21 SW1 SW1 0.36uH 5 38 D D LG1 4 SI S PR236 *0_2/S PR244 *0_2/S PC58 2200P/50V_4 PQ24 TPCA8A10-H 1 2 3 38 D PR89 2.2_6 G LG1 VSUMN_1 VSUMN_1 38 VSUMP_1 VSUMP_1 38 PC225 38 4.7U/25V_8 4.7U/25V_8 *4.7U/25V_8 PR231 HG2 HG2 G HG2_G 4 PC55 PC44 2200P/50V_4 PC223 D 0.1U/25V_4 PC221 5 PC219 4.7U/25V_8 +VIN_VCC_CORE CPU CORE Volt Countinue current:36A Peak current:50A OCP minimum:60A S 1 2 3 1_6 PQ19 TPCA8064-H +VCC_CORE SI PL20 +VIN_VCC_GT VSUMP_2 38 SI 1 1 1 1 2 2 2 2 2 PC280 2 PC247 VSUMN_2 38 VSUMP_2 + PC262 *330U_2V_7343 VSUMN_2 + PC260 390U/2.5V_6X5.8ESR10 PC66 + PC267 390U/2.5V_6X5.8ESR10 PR242 *0_2/S + PC160 390U/2.5V_6X5.8ESR10 PR235 *0_2/S + PC135 *390U/2.5V_6X5.8ESR10 S 2200P/50V_4 PQ23 TPCA8A10-H SI 330U_2V_7343 LG2 4 1 2 3 38 + PR111 2.2_6 G LG2 0.1U/10V_4 D C 1 0.36uH 1 SW2 SW2 5 38 C SI +VIN DB PL13 *0_8/S 0.1U/25V_4 2200P/50V_4 0.1U/25V_4 2 1 VDDNB Volt Countinue current:25A Peak current:33A OCP minimum:40A +VDDNB_CORE PL29 B VSUMN_NBY VSUMP_NB_Y VSUMN_NBY VSUMP_NB_Y 38 38 1 + PC274 2 3 PC275 SI PC278 PC279 22U/6.3V_8 2200P/50V_4 PC186 + PC276 22U/6.3V_8 PR252 *0_2/S 330U_2V_7343 PR254 *0_2/S 2 2 SI 390U/2.5V_6X5.8ESR10 + PQ40 FDMS7602S 9 4 1 1 PR216 2.2_6 390U/2.5V_6X5.8ESR10 5 8 6 LGNBY 5 7 UGATE PAD GND PC197 0.36uH/24A_7X7X3 S2 PC196 1U/6.3V_4 PC198 SWNBY S2 LGATE 9 S2 VCC SWNBY 8 PC187 0.22U/25V_6 G2 6 PC200 D1 PHASE PC199 SI FCCM B +5VS5 2BOOTY D1 BOOT PWM 7 D1 FCCM_NB FCCM_NB S1/D2 38 3 6277_PWMY G1 38 1_6 1 PU16 ISL6208BCRZ PR219 4.7U/25V_8 HNBY 4.7U/25V_8 PC193 DB +VIN_VCC_GT 8 SWNB2 5 LGNB2 9 PC191 PL28 SWNB2 5 6 7 0.36uH/24A_7X7X3 8 9 4 PC192 2200P/50V_4 PC190 0.22U/25V_6 PC195 0.1U/25V_4 S2 PC188 1U/6.3V_4 2 1 1 S2 PAD GND S2 LGATE D1 VCC G2 6 SI FCCM PHASE +5VS5 D1 BOOT PWM S1/D2 7 SI D1 3 PWM2_NB PC194 2BOOTY2 G1 38 1_6 UGATE PU15 ISL6208BCRZ PR218 4.7U/25V_8 HGNB2 4.7U/25V_8 DB PR215 2.2_6 SI PQ41 FDMS7602S PR253 *0_2/S PR251 *0_2/S PC185 2200P/50V_4 A VSUMN_NBY2 VSUMN_NBY2 VSUMP_NB_Y2 VSUMP_NB_Y2 A 38 38 PROJECT : R53 Quanta Computer Inc. Size Custom Document Number 5 4 3 2 Rev 1A ISL6208 Date: Friday, November 11, 2011 1 Sheet 39 of 44 2 3 DB PR91 0_4 *0_4 22 1116VBST 2.2_6 GND 5 VTTREF PHASE 20 1116LL 7 NC LGATE 19 1116DRVL 2 +5VS5 PD12 *RB501V-40 PL17 NIMS0603-R82M/13A 0.1U/25V_4 D PR117 2.2_6 PGND CS_GND 17 VDDP 15 S3 +5VS5 + PR239 *0_2/S S PQ17 TPCA8A11-H PC86 Rds(on) 5m ohm 2200P/50V_4 MAINON 18 4 1 2 3 9,33,34,36,41 1116_S3ON 10 0_4 *0.1U/10V_4 PC27 33,41 4,23,33,35,36,37 SUSON HWPG SUSON PR45 0_41116_S5ON 11 HWPG 0_4 51116PG 13 PR31 PR37 +VIN_DDR 1116TONSET 12 619K/F_4 PR62 9 10K/F_4 8 B PR72 10.2K/F_4 PC7 1U/6.3V_4 S5 PGOOD TON CS FB VDDQSNS RT8207LGQW SI PR16 10_6 16 1116CS PR19 6.98K/F_4 DEM 6 VDD 14 V5FILT A +1.5VSUS PQ10 EMB20N03V G MAINON PR46 0.1U/25V_4 8 7 6 5 4 1 PC24 PR58 DB DB PC245 PC235 0.1U/10V_4 PC72 0.033U/10V_4 VBST GND DB,SI PC16 1 3,12,13 DDR_VTTREF UGATE 21 1116DRVH DB PC11 2 25 *0.1U/50V_6 PC31 390U/2.5V_5X5.8ESR10 VTTGND 23 PC22 2200P/50V_4 1 VLDOIN PC12 4.7U/25V_8 10U/6.3V_8 VTTSNS 3 ( 3mA ) VTT 2 EC5 68P/50V_4 4.7U/25V_8 PC67 +1.5V +/- 5% Countinue current:10A Peak current:12A OCP minimum 15A *0_8/S PC36 0.1U/25V_4 PC68 10U/6.3V_8 24 A 40 +VIN PL5 3 2 1 PU5 +VIN_DDR 4 +0.75V_DDR_VTT 5 +1.5VSUS DB PR90 MODE ( VTT/2A ) 4 5 1 SI B PC8 1U/6.3V_4 PR83 4 VDDIO_FB_H *10K/F_4 C C D D PROJECT : R53 Quanta Computer Inc. Size Custom Date: 1 2 3 4 Document Number Rev 1A DDRIII(G5616) Friday, November 11, 2011 Sheet 5 40 of 44 5 4 3 2 1 41 +VH28 +5V 8,18,24,25,26,27,30,31,32 +VIN 23,34,35,36,37,39,40,42,44 +1.5V 2,4,11,23,32,38 +1.8V +3VS5 3,4,6,8,9,10,12,33,35,36,42,44 +5VS5 27,28,30,35,36,37,38,39,40,42,43 +VH28 +VAD_1 34 +3VSUS 30,32 +12VALW 9,34,44 +1.5VSUS 2,3,4,5,12,13,40,44 +3VLANVCC 29 +VAD PR170 *0_4 PR164 22_6 PC137 0.1U/25V_4 33 LAN_POWER D 33,34 0.47U/25V_6 16 17 VOUT 18 CN ACIN PC131 PR175 0_4 D_CAP G5934CN 19 20 VIN 1 PC123 1U/35V_6 G5934CP 0.1U/25V_4 PC136 CP D ON1 +VAD_1 15 G5934PG PG PR179 750K/F_4 9,33,34,36,40 MAINON MAINON 2 ON2 14 G5934VSENSE VSENSE DB +12VALW 33,40 SUSON 3 ON3 4 ON4 PU12 GS7502Q3-R PR185 100K/F_4 13 REG PC152 1U/16V_4 5 21 PQ54 EMB20N03V 5 GND PC254 0.1U/10V_4 4 4 5.1A PR256 *22_8 2A 3 2 1 3 2 1 PQ42 EMB20N03V PR257 *1M_4 +1.5V +5V +3VS5 MAIND3.3V PC261 0.1U/10V_4 PC264 *10U/6.3V_8 1 PC126 0.1U/10V_4 2 0.7A 4 PC107 2200P/50V_4 +3VS5 PC203 *10U/6.3V_6 3 PC202 0.1U/10V_4 +3V PC266 2200P/50V_4 PC270 PQ56 *2N7002K 2 PQ30 QM3002V PR258 *1M_4 PQ57 *2N7002K +3VLANVCC 1 4 +1.5V +VIN DB 3 DRIVER2 C +1.5VSUS B PR259 *22_8 D G S 1 2 3 PC145 PQ58 *2N7002K 2 PQ43 RJK0392DPA (4A ) +1.1V PC209 PC207 *10U/6.3V_6 1 *10U/6.3V_6 0.1U/10V_4 0.1U/10V_4 PC142 2200P/50V_4 4 PC143 PC214 3 SUSD +1.1VS5 5 PQ34 QM3002V *10U/6.3V_6 6 5 2 1 3 4 +3VSUS 0.1U/10V_4 PC138 0.04A PC124 0.1U/10V_4 +1.1V PC125 0.1U/10V_4 5 DB MAIND PR195 0_6 *10U/6.3V_6 PC269 0.1U/10V_4 +5V +5VS5 LAN_ON 3 B +3VSUS 0_6 PR193 0_6 1 2 5 6 +3V DISC2 6G5934DISC2 PR194 PC161 2200P/50V_4 PQ55 EMB20N03V 1 2 3 5.2A 7G5934DISC3 PC201 0.1U/10V_4 DB 0.1U/10V_4 PC268 DISC3 10 11 12 +3VS5 DRIVER1 DISC1 DRIVER4 0_6 9 +3VLANVCC C 5 DISC4 G5934DISC1 G5934DISC4 8 PR188 DRIVER3 MAINON A A PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 5 4 3 2 Rev 1A Dis-charge IC (GS7502) 1 Sheet 41 of 44 1 2 3 4 5 6 7 8 42 VGA Core A A +3VS5 DB PR192 10K/F_4 PR189 0_4 DGPU_PWROK PD15 2200P/50V_4 0.1U/25V_4 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 *4.7U/25V_8 0.1U/25V_4 5 1 2 3 DB PR250 SI D G 4 S D 8232LGATE4 PQ37 TPCA8A10-H PR196 2.2_6 *0_2/S + G PQ38 TPCA8A10-H PC157 2200P/50V_4 PR186 56K/F_4 DB + PC179 S RDSon=3.5m ohm PR201 1 +VIN_VGA + + PC272 PC273 PC271 PC176 0.1U/10V_4 D1 9 VSETD1 D2 8 VSETD2 S1 S2 VSETS2 7 PC163 PR180 360K/F_4 2 8232CS 0.1U/25V_4 390U/2.5V_6X5.8ESR10 16 B 600 mils 1 CS +VGA_CORE PL26 0.36U28A(ETQP4LR36AFC) 2 8232FB PQ39 TPCA8064-H +VGACORE +/- 5% Countinue current:20A Peak current:23A OCP minimum 33A 390U/2.5V_6X5.8ESR10 2 PC133 390U/2.5V_6X5.8ESR10 FB PC164 1 11 8232LGATE PC148 2 8232TON PC147 1 20 PC146 2 TON PC151 PC155 5 14 REFIN 6 PR197 30K/F_4 PHASE 2.2_6 8232PHASE LGATE VSETS1 49.9K/F_4 *10K/F_4 100P/50V_4 PR191 +3V_DELAY 8232BOOTPR190 1 2 3 8232VDD 15 PU13 REFO RT8232AZ 0.22U/10V_4 8232REFIN 5 13 G2 15 GFX_CORE_CNTRL2 PR182 BOOT S PQ36 TPCA8064-H PC150 *330U_2V_7343 PC159 S G 1 2 3 17 4 +2VREFO 8232PG 5 8232G2 PR181 4 PD16 RB501V-40 2 18232BOOT_1 +5VS5 8232UGATE4 5 G1 G D 1 2 3 18 SI 8232UGATE VDD G0 8232G1 +3V_DELAY *10K/F_4 SI D UGATE 15 GFX_CORE_CNTRL1 19 12 21 15 GFX_CORE_CNTRL0 B 8232G0 PAD *10K/F_4 1 PC154 1U/6.3V_4 PR183 +3V_DELAY 8232EN DB PR187 0_4 PL12 *0_8/S PC162 4.7U/6.3V_6 3 PX_MODE +VIN DB +5VS5 10_6 PGOOD 18 +3V *10K/F_4 PR178 12K/F_4 33,43,44 DGPU_PR_EN +VIN_VGA PR198 PR184 2 *1N4448WS-7-F D0 1 VSETD0 10 DB EN/MODE 7,18,33,43,44 9.09K/F_4 PR203 3.3K/F_4 PR200 2.05K/F_4 PR199 3.65K/F_4 PWRCNTL2 (GPIO16) Symour-XT PWRCNTL1 (GPIO20) PWRCNTL0 (GPIO15) PR202 1.87K/F_4 V-CORE C C 0 0 0 M 0 0 1 0.9V H 0 1 0 0.875V 0 1 1 0.85V 1 0 0 0.8V 1 0 1 0.75V L 1.0V D D PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A +VGACORE (RT8232AZ) Sheet 42 8 of 44 1 2 3 4 5 6 7 8 43 A A +5VS5 2 +1.8V +/- 5% Countinue current:2A Peak current:3A OCP minimum 4.5A +5VPCU_1.8V PC37 11 VIN PH 12 EN BOOT 13 PW RGD VSNS 6 COMP GND 3 RT/CLK GND 4 B AGND +1.8V_L PC73 PR98 NIMS0603-1R0M/11A 1.8_VFBJP 2.2_6 0.1U/10V_4 PC19 G5173-1.8_VFB 5 2 1 PC231 PC227 PC228 B PR18 10.2K/F_4 R2 PC29 PR230 *0_2/S R1 PR35 12K/F_4 22 21 20 19 18 17 SS G5173_PH 0.01U/25V_4 182K/F_4 PC14 470P/50V_4 *100P/50V_4 PC13 PR38 20K/F_4 G5173SS9 PR41 PR237 *POWER_JP/S 10U/6.3V_8 2 8 +1.8V_L PL16 15 7 G5173RT 2 10 PH 10U/6.3V_8 DB PH VIN 0.1U/10V_4 0_4 PC77 1U/6.3V_4 VIN 1 14 DGPU_PWROK G5173COMP 16 PAD PAD PAD PAD PAD PAD 7,18,33,42,44 G5193R41U *82P/50V_4 0.1U/10V_4 PU6 PR104 PR105 33K/F_4 +1.8V_VGA *2.2_6 *2200P/50V_4 G5173EN 33,42,44 DGPU_PR_EN PR71 DB PC41 10U/6.3V_8 PC40 1 1 PJP5 *POWER_JP/S V0=0.827*(R1+R2)/R2 DB for prevent interference +1.8V_VGA PC141 0.1U/10V_4 1U/6.3V_4 1 PC153 2 PC144 0.01U/25V_4 2 1 1000P/50V_4 1 1U/6.3V_4 2 PC149 0.1U/10V_4 1 PC241 2 PC229 1 PC233 0.01U/25V_4 2 PC236 1000P/50V_4 2 C 1 C D D PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A +1.8V_VGA (G5193) Sheet 43 8 of 44 1 2 3 4 5 6 7 8 44 +3VS5 2 1 +3VPCU_1.0VGA A PC177 PR212 PC165 10U/6.3V_8 0.1U/10V_4 DB PC166 *2200P/50V_4 VIN PH 10 1 VIN PH 11 VIN PH 12 EN BOOT 13 VSNS 6 GND 3 GND 4 DGPU_PWROK 0_4 G5173COMP_1.0VGA DB PW RGD 7 COMP PC170 PAD PAD PAD PAD PAD PAD RT/CLK G5173SS_1.0VGA 9 SS PR210 PC173 470P/50V_4 B *0_2/S R1 G5173-1.0VFBVGA 5 AGND PR211 1.0_VFBVGAJP PR206 2.15K/F_4 R2 PC174 0.01U/25V_4 *100P/50V_4 PC171 182K/F_4 20K/F_4 PR208 MMD-05CZ-1R0M/7A 0.1U/10V_4 22 21 20 19 18 17 1U/6.3V_4 G5173RT_1.0VGA 8 2.2_6 PC167 PC175 PC180 PC178 10U/6.3V_8 7,18,33,42,43 14 10U/6.3V_8 PR205 PR204 12K/F_4 DB G5173_PH_1.0VGA PC172 PR209 0.1U/10V_4 G5173EN_1.0VGA 15 33,42,43 DGPU_PR_EN +1.0V_VGA +1.0V_VGA_S2 PL27 *82P/50V_4 2 PR207 10.2K/F_4 V0=0.827*(R1+R2)/R2 Symour-XT A *2.2_6 PU14 G5193R41U 16 +3V 2,4,6,8,9,10,11,12,13,14,18,23,24,25,26,27,28,29,30,31,32,33,41,42 +VIN 23,34,35,36,37,39,40,41,42 +3VS5 3,4,6,8,9,10,12,33,35,36,41,42 +5VS5 27,28,30,35,36,37,38,39,40,41,42,43 +3V_VGA 18,30 +12VALW 9,34,41 +1.5VSUS 2,3,4,5,12,13,40,41 +1.5V_VGA 18,20,21,22 +1.0V/0.935V +/- 5% Countinue current:2A Peak current:3A OCP minimum 4.5A PJP6 *POWER_JP/S Voltage level R1 Value B R1 P/N 17W 1.0V 2.15K CS22152FB07 25W 0.935V 1.37K CS21372FB19 +1.5VSUS +12VALW +1.5V_VGA +12VALW 1 3VGFX_ONG DGPU_PR_EN PR116 1 1 2 3 PC139 PC168 PC169 *10U/6.3V_6 PQ25 PDTC144EU PQ35 RJK0392DPA *10U/6.3V_6 PC189 0.1U/10V_4 PQ26 2N7002K 33K/F_4 R40 0_4 PX_MODE1 (5A ) PC156 0.1U/10V_4 PC62 S 3 3 2 3 2 G 4 0.01U/25V_4 2 PR121 1M/F_4 2 *0_8 PC61 0.1U/10V_4 0_4 VGA_REQ PR103 PC34 0.01U/25V_4 PR32 1M/F_4 6 +3V 1.5V_ONG +3V_VGA *10U/6.3V_6 PR67 0.06A 2 1 DGPU_PR_EN PQ12 QM3002V PQ7 2N7002K 1 3 2 PQ6 2N7002K PQ22 *2N7002K 1 PQ5 *2N7002K 3 4 3 C 3 3VGFX_OND PR33 1M/F_4 PR122 1M/F_4 PC35 0.1U/10V_4 PC158 D 1.5V_OND 1 2 5 6 PR66 1M/F_4 PR73 *22_8 PR96 1M/F_4 0.1U/10V_4 PR108 *22_8 5 +VIN +3VS5 +VIN 1 +3V_VGA +1.5V_VGA C PX_MODE1 18 PC105 0.47U/6.3V_4 D D PROJECT : R53 Quanta Computer Inc. Size Custom Document Number Date: Friday, November 11, 2011 1 2 3 4 5 6 7 Rev 1A +1.0V_VGA (G5193) Sheet 44 8 of 44 www.s-manuals.com
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.5 Linearized : No XMP Toolkit : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39 Producer : GPL Ghostscript 8.61 Modify Date : 2014:06:13 21:39:28+03:00 Create Date : 2011:11:22 17:42+08:00 Creator Tool : PDFCreator Version 0.9.5 Metadata Date : 2014:06:13 21:39:28+03:00 Document ID : cc93055d-1749-11e1-0000-6b1b6f419b3e Instance ID : uuid:072c5c9d-4a49-4b39-bf58-94c0696f5cee Format : application/pdf Title : Quanta R53 - Schematics. www.s-manuals.com. Creator : Description : Subject : Quanta R53 - Schematics. www.s-manuals.com. Page Count : 45 Keywords : Quanta, R53, -, Schematics., www.s-manuals.com. Warning : [Minor] Ignored duplicate Info dictionaryEXIF Metadata provided by EXIF.tools