RT8243A, RT8243B, RT8243C Datasheet. Www.s Manuals.com. R07 Richtek

User Manual: Marking of electronic components, SMD Codes 7A, 7A **, 7A-, 7A5, 7AW, 7Ap, 7At. Datasheets MMBT3904, PZM7.5NB2A, RT8243BZQW, SMZ2513.

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RT8243A/B/C
High Efficiency, Main Power Supply Controller
for Notebook Computers
General Description

Features

The RT8243A/B/C is a dual step down, Switch Mode Power
Supply (SMPS) controller which generates logic supply
voltages for battery powered systems. It includes two
Pulse Width Modulation (PWM) controllers adjustable
from 2V to 5.5V and also two fixed 5V/3.3V linear
regulators. One of the controllers (LDO5) provides
automatic switch over to the BYP1 input connected to
the main SMPS1 output for maximized efficiency. An
optional external charge pump can be monitored through
SECFB (RT8243B/C). Other features include on board
power up sequencing, a power good output, internal softstart, and a soft discharge output that prevents negative
voltage during shutdown.



A constant on-time PWM control scheme operates without
sense resistors and assures fast load transient response
while maintaining nearly constant switching frequency. To
eliminate noise in audio applications, an ultrasonic mode
is included, which maintains the switching frequency
above 25kHz. Moreover, a diode emulation mode
maximizes efficiency for light load applications. The
SMPS1/SMPS2 switching frequency can be adjustable
from 200kHz/233kHz to 400kHz/466kHz respectively.















5.5V to 25V Input Voltage Range
2V to 5.5V Output Voltage Range
No Current Sense Resistor Needed
5V/3.3V Linear Regulators
4700ppm/°°C RDS(ON) Current Sensing
Internal Current Limit Soft-Start and Soft Discharge
Output
Built In OVP/UVP/OCP
Selectable Operation Mode with Switcher Enable
Control (RT8243A)
SECFB Input Maintains Charge Pump Voltage
(RT8243B/C)
Power Good Indicator (RT8243B/C includes SECFB)
RoHS Compliant and Halogen Free

Applications




Notebook computers
System Power Supplies
3- and 4- Cell Li+ Battery-Powered Device

Ordering Information
RT8243A/B/C

The RT8243A/B/C is available in a WQFN-20L 3x3
package, and operates over an extended temperature range
from −40°C to 85°C.

Package Type
QW : WQFN-20L 3x3 (W-Type)
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Pin Function With
A : ENM
B : SECFB
C : SECFB, Ultrasonic Mode
Note :
Richtek products are :


RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.



DS8243A/B/C-07 November 2014

Suitable for use in SnPb or Pb-free soldering processes.

is a registered trademark of Richtek Technology Corporation.

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1

RT8243A/B/C
Pin Configurations
BYP1
BOOT1
UGATE1
PHASE1
LGATE1

BYP1
BOOT1
UGATE1
PHASE1
LGATE1

(TOP VIEW)

20 19 18 17 16

FB1
ENTRIP1
TON
ENTRIP2
FB2

20 19 18 17 16

GND

3
4

13
12
11

9 10

GND

3
4

13
12
11

LDO3
LDO5
SECFB
ENLDO
VIN

9 10

PGOOD
BOOT2
UGATE2
PHASE2
LGATE2

FB1
ENTRIP1
TON
ENTRIP2
FB2

LDO3
LDO5
ENM
ENLDO
VIN

RT8243A

RT8243B/C
WQFN-20L 3x3

Marking Information
RT8243BZQW

RT8243AZQW
8A : Product Code

8A YM
DNN

YMDNN : Date Code

7A : Product Code

7A YM
DNN

YMDNN : Date Code

RT8243CZQW
0B : Product Code

0B YM
DNN

YMDNN : Date Code

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is a registered trademark of Richtek Technology Corporation.

DS8243A/B/C-07 November 2014

RT8243A/B/C
Typical Application Circuit
VIN
5.5V to 25V
R1

C1
10µF

C2
0.1µF

18 UGATE1

N1
R2

VOUT1
5V

BOOT1

C5
Optional

RTON

LGATE1

PHASE2 9

C7
0.1µF

13 ENM

21 (Exposed Pad)

FB2 5

FB1

3 TON

GND

VOUT2
3.3V

C8
R6
6.5k

ENTRIP2 4

20 BYP1
Chip Enable

17 PHASE1

R3
15k
R4
10k

BOOT2

N3
R5

LGATE2 10
16

UGATE2 8

C4
0.1µF

C6
10µF

RT8243A
11 VIN
12 ENLDO

ENTRIP1 2
LDO3 15

R8
100k
R9
100k

3.3V Always On

C9
4.7µF

LDO5 14
PGOOD 6

R7
10k

R10
100k

C10
4.7µF

5V Always On

Figure 1. RT8243A NB Main Supply Typical Application Circuit

DS8243A/B/C-07 November 2014

is a registered trademark of Richtek Technology Corporation.

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3

RT8243A/B/C
VIN
5.5V to 25V
C1
10µF

R1
C2
0.1µF

18 UGATE1

N1
R2

PHASE2 9

C7
0.1µF

LGATE1

1
RTON

R6
6.5k

FB2 5
ENTRIP2 4

FB1

3 TON

ENTRIP1 2

R8
100k

R7
10k

R9
100k

On
Off

20 BYP1

C5
Optional

C11
0.1µF

LDO3 15

C13
0.1µF
C12
0.1µF
R11
200k

C14
0.1µF
C15

PGOOD 6
SECFB

R12
39k

GND

3.3V Always On

C9
4.7µF

LDO5 14

VOUT2
3.3V
C8

17 PHASE1

R3
15k
R4
10k

BOOT2

N3
R5

LGATE2 10

BOOT1

UGATE2 8

VOUT1
5V

C4
0.1µF

C6
10µF

RT8243B/C
11 VIN
12 ENLDO

C10
4.7µF

R10
100k

5V Always On

21 (Exposed Pad)

VCP

Figure 2. RT8243B/C NB Main Supply Typical Application Circuit

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is a registered trademark of Richtek Technology Corporation.

DS8243A/B/C-07 November 2014

RT8243A/B/C
Functional Pin Description
Pin No.

Pin Name

Pin Function

FB1

SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from SMPS1
output to GND for adjustable output from 2V to 5.5V.

ENTRIP1

Channel 1 Enable and Current Limit Setting Input. Connect resistor to GND to set
the threshold for Channel 1 synchronous RDS(ON) sense. The GND-PHASE1
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.5V to 3V
range. There is an internal 10A current source from LDO5 to ENTRIP1. Leave
ENTRIP1 floating or drive it above 4.5V to shut down channel 1.

TON

ON-Time/Frequency Adjustment Input. Connect to GND with 56k to 100k.

ENTRIP2

Channel 2 Enable and Current Limit Setting Input. Connect resistor to GND to set
the threshold for Channel 2 synchronous RDS(ON) sense. The GND-PHASE2
current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.5V to 3V
range. There is an internal 10A current source from LDO5 to ENTRIP2. Leave
ENTRIP2 floating or drive it above 4.5V to shut down channel 2.

FB2

SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from SMPS2
output to GND for adjustable output from 2V to 5.5V.

PGOOD

BOOT2

Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor
according to the typical application circuits.

UGATE2

Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and
BOOT2.

PHASE2

Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2
high side gate driver. PHASE2 is also the current sense input for the SMPS2.

LGATE2

Lower Gate Drive Output for SMSP2. LGATE2 swings between GND and LDO5.

VIN

Supply Input for LDO5.

ENLDO

Master Enable Input. LDO5/LDO3 is enabled if it is within logic high level and
disabled if it is less than the logic low level. Leave ENLDO floating to default
enable LDO5/LDO3.

ENM
(RT8243A)

Mode Selection with Enable Input. Pull up to LDO5 (Ultrasonic mode) or LDO3
(DEM) to turn on both switch Channels. Short to GND for shutdown.

SECFB
(RT8243B/C)

LDO5

LDO3

Power Good Output for Channel 1 and Channel 2 (RT8243A).
Power Good Output for Channel 1, Channel 2 and SECFB (RT8243B/C).

Change Pump Feedback Pin. The SECFB is used to monitor the optional external
charge pump. Connect a resistive divider from the change pump output to GND to
detect the output. If SECFB drops below its feedback threshold, an ultrasonic
pulse occurs to refresh the charge pump driven by LGATE1 or LGATE2.
If SECFB drops below its UV threshold, the switcher channels stop working and
enter into discharge-mode. Pull up to LDO5 or LDO3 to disable SECFB UVP
function.
5V Linear Regulator Output. LDO5 is the supply voltage for the low side MOSFET
driver and also the analog supply voltage for the device. Bypass a minimum 4.7F
ceramic capacitor to GND
3.3V Linear Regulator Output. Bypass a minimum 4.7F ceramic capacitor to
GND.

DS8243A/B/C-07 November 2014

is a registered trademark of Richtek Technology Corporation.

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RT8243A/B/C
Pin No.

Pin Name

Pin Function

LGATE1

Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and
LDO5.

PHASE1

Switch Node SMPS1. PHASE1 is the internal lower supply rail for the UGATE1
high side gate driver. PHASE1 is also the current sense input for the SMPS1.

UGATE1

Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and
BOOT1.

BOOT1

Boost Flying Capacitor Connection for SMPS1. Connect to an external
capacitor according to the typical application circuits.

BYP1

Switch Over Source Voltage Input for LDO5.
Analog Ground and Power Ground. The exposed pad must be soldered to a
large PCB and connected to GND for maximum power dissipation.

21 (Exposed Pad) GND

Function Block Diagram
BOOT2

BOOT1
UGATE1
PHASE1

UGATE2
PHASE2
LDO5

LDO5
SMPS2
PWM
Buck
Controller

SMPS1
PWM
Buck
Controller

LGATE1
LDO5

LGATE2
LDO5
10µA

10µA

FB2
ENTRIP2

FB1
ENTRIP1
On Time

TON
BYP1

ENM (RT8243A)
SECFB (RT8243B/C)

Switch Over Threshold
+

PGOOD

GND
LDO5
REF

LDO5

VIN
ENLDO

LDO3

Power On
Sequence
Clear Fault Latch

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LDO3

is a registered trademark of Richtek Technology Corporation.

DS8243A/B/C-07 November 2014

RT8243A/B/C
Absolute Maximum Ratings

(Note 1)

VIN, ENLDO to GND -----------------------------------------------------------------------------------------------------BOOTx to PHASEx
DC ----------------------------------------------------------------------------------------------------------------------------< 20ns ---------------------------------------------------------------------------------------------------------------------- ENTRIPx, FBx, TON, BYP1, PGOOD, LDO5, LDO3, ENM/SECFB to GND ------------------------------ PHASEx to GND
DC ----------------------------------------------------------------------------------------------------------------------------< 20ns ---------------------------------------------------------------------------------------------------------------------- UGATEx to PHASEx
DC ----------------------------------------------------------------------------------------------------------------------------< 20ns ---------------------------------------------------------------------------------------------------------------------- LGATEx to GND
DC ----------------------------------------------------------------------------------------------------------------------------< 20ns ---------------------------------------------------------------------------------------------------------------------- Power Dissipation, PD @ TA = 25°C
WQFN-20L 3x3 ----------------------------------------------------------------------------------------------------------- Package Thermal Resistance (Note 2)
WQFN-20L 3x3, θJA ------------------------------------------------------------------------------------------------------WQFN-20L 3x3, θJC ----------------------------------------------------------------------------------------------------- Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------ Junction Temperature ---------------------------------------------------------------------------------------------------- Storage Temperature Range ------------------------------------------------------------------------------------------- ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------------

−0.3V to 30V



Recommended Operating Conditions




−0.3V to 6V
−2.5V to 6.3V
−0.3V to 6V
−0.3V to 30V
−8V to 38V
−0.3V to 6V
−5V to 7.5V
−0.3V to 6V
−2.5V to 7.5V
3.33W
30°C/W
7.5°C/W
260°C
150°C
−65°C to 150°C
2kV

(Note 4)

Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- 5.5V to 25V
Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C

DS8243A/B/C-07 November 2014

is a registered trademark of Richtek Technology Corporation.

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RT8243A/B/C
Electrical Characteristics
(VIN = 12V, VENLDO = 5V, VENTRIPx = 2V, VBYP1 = 5V, No Load on LDO5, LDO3, TA = 25°C, unless otherwise specified)

Parameter
Input Supply

Symbol

VIN Power On Reset

Test Conditions

Min

Typ

Max

Rising Threshold

5.1

5.5

Falling Threshold

3.5

4.5

VIN Shutdown Current

IVIN_SHDN

VENLDO = GND

VIN Standby Supply
Current

IVIN_SBY

Both SMPS Off

250

350

Quiescent Power
Consumption

Both SMPSs on, FBx = 2.1V,
BYP1 = 5V, ENM = 3.3V (RT8243A)

FBx, CCM Operation

FBx, DEM Operation

1.98

2.006

2.03

5.5

1.92

2.08

Unit

A
mW

SMPS Output and FB Voltage
FBx Regulation Voltage
Output Voltage
Adjustable Range
SECFB Voltage

VFBx

SMPS1, SMPS2

VSECFB

RT8243B

ON-Time Pulse Width

tUGATEx

VPHASE1 = 2V
VIN = 20V
RTON = 56k VPHASE2 = 2V

256

220

Minimum Off-Time

tLGATEx

400

f SMPS1

VFBx = 1.8V
SMPS1 Operating Frequency

200

400

f SMPS2

SMPS2 Operating Frequency

233

466

f ASM

RT8243C, VPHASEx = 50mV

kHz

tSSx

Zero to 200mV Current Limit Threshold
from ENTRIPx Enable

9.4

10.6

A

4700

ppm/C

VENTRIPx = IENTRIPx x RENTRIPx

0.5

2.7

GND  PHASEx, VENTRIPx = 2V

180

200

225

mV
mV

On Time

Frequency Range
Ultrasonic Mode
Frequency
Soft-Start
Soft-Start Time

Current Sense
Current Limit Current
IENTRIPx
Source
Temperature Coefficient
of IENTRIPx
Current Limit Adjustment
Range
Current Limit Threshold

VENTRIPx

VENTRIPx = 0.9V
On The Basis of 25C

Zero-Current Threshold

GND  PHASEx, FBx = 2.1V

4.9

5.1

LDO5 Output Voltage

VBYP1 = 0V, ILDO5 < 100mA
VBYP1 = 0V, ILDO5 < 100mA ,
6.5V < VIN < 25V
VBYP1 = 0V, ILDO5 < 50mA,
5.5V < VIN < 25V

4.75

5.25

4.75

5.25

VZC
Internal Regulator and Reference

VLDO5

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ns
ns
kHz

is a registered trademark of Richtek Technology Corporation.

DS8243A/B/C-07 November 2014

RT8243A/B/C
Parameter
LDO5 Output Current

Symbol
ISHORT5

5V Switchover Threshold VBYP1TH
5V Switch RDS(ON)

RBYPSW

LDO3 Output Voltage

VLDO3

LDO3 Output Current

ISHORT3

Test Conditions

Min

Typ

Max

Unit

VBYP1 = 0V, VLDO5 = 4.5V
Falling Edge, Rising Edge with FB1
Regulation Point
VBYP1 = 5V, ILDO5 = 50mA

150

225

300

4.53

4.66

4.79

1.5



VBYP1 = 0V, ILDO3 < 100mA

3.234

3.3

3.366

VBYP1 = 5V, ILDO3 < 100mA

3.2

3.3

3.46

VBYP1 = 0V, VLDO3 = 2.9V

150

260

V
mA

UVLO
Rising Edge

4.35

4.5

Falling Edge

3.9

4.05

4.2

VUVLO3

Both SMPS Off

1.9

2.2

2.5

VPGOOD

PGOOD Detect, Rising edge with
soft-start delay time. Hysteresis = 2.5%

14

10

6

tPD_PGOOD

Falling Edge

s

ILK_PGOOD

High State, Forced to 5.5V

A

0.4

LDO5 UVLO Threshold

VUVLO5

LDO3 UVLO Threshold

Power Good
PGOOD Threshold
PGOOD Propagation
Delay
PGOOD Leakage Current
PGOOD Output Low
Voltage
SECFB Power Good
Threshold
Fault Detection
Over Voltage Protection
Trip Threshold
Over Voltage Protection
Propagation Delay

VSINK_PGOOD ISINK = 4mA
VSFB_PGOOD

SECFB with Respect to 2V
(RT8243B/C)

VOVP

OVP Detect, FBx Rising Edge

108

112

116

tDLY_OVP

Rising Edge

s

UVP Detect, FBx Falling Edge.

UVP Detect, SECFB Falling Edge.

0.8

1.2

Under Voltage Protection VUVP
Trip Threshold
VSFB_UVP
Under Voltage Protection
t
Shutdown Blanking Time SSHx

From ENTRIPx or ENM Enable

Thermal Shutdown
Thermal Shutdown

TSD

150

°C

Thermal Shutdown
Hysteresis
Logic Input

TSD

°C

ENTRIPx Input Voltage

VENTRIPx

Clear Fault Level/SMPSx Off Level

4.5

Rising Edge Threshold

1.2

1.6

Falling Edge Threshold
When ENLDO is Floating (Default
Enable)
Clear Fault Level/SMPSs Off Level

0.9

0.95

2.1

0.8

SMPSs On, DEM Operation

2.3

3.6

SMPSs On, Ultrasonic Mode Operation

4.5

ENLDO Input Voltage

ENM Input Voltage
(RT8243A)

VENLDO

VENM

DS8243A/B/C-07 November 2014

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RT8243A/B/C
Parameter

Symbol

Min

Typ

Max

1

ENLDO = 0V or 5V

1
1

LDO5 to BOOTx, 10mA

RUGATEsr

Source, VBOOTx  V UGATEx = 0.1V

RUGATEsk

Sink, V UGATEx  VPHASEx = 0.1V

RLGATEsr

Source, VLDO5  VLGATEx = 0.1V

RLGATEsk

Sink, V LGATEx = 0.1V

1.5

tLGATERx

UGATEx Off to LGATEx On

tUGATERx

LGATEx Off to UGATEx On

IFBx
Input Leakage Current

IP13
IENLDO

Internal BOOT Switch
Internal Boost Charging
RBOOTx
Switch On-Resistance
Power MOSFET Drivers
UGATEx On-Resistance
LGATEx On-Resistance
Dead Time

Test Conditions
VFBx = 0V or 5V
ENM/SECFB = 0V or 5V

Unit
A





ns

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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is a registered trademark of Richtek Technology Corporation.

DS8243A/B/C-07 November 2014

RT8243A/B/C
Typical Operating Characteristics
VOUT1 Efficiency vs. Load Current
100

Efficiency (%)

VOUT1 Efficiency vs. Load Current
100

DEM
ASM

60
50
40
30
20
10
0
0.001

DEM
ASM

70
60
50
40
30
20

VIN = 8V, RTON = 100kΩ, VENTRIP1 = 1.5V
VENTRIP2 = 5V, ENLDO = 5V
0.01

0.1

10
0
0.001

VIN = 12V, RTON = 100kΩ, VENTRIP1 = 1.5V
VENTRIP2 = 5V, ENLDO = 5V
0.01

Load Current (A)

DEM
ASM

60
50
40
30
20
10
0
0.001

60
50
40
30
20

VIN = 20V, RTON = 100kΩ, VENTRIP1 = 1.5V
VENTRIP2 = 5V, ENLDO = 5V
0.01

0.1

10
0
0.001

VIN = 8V, RTON = 100kΩ, VENTRIP1 = 5V,
VENTRIP2 = 1.5V, ENLDO = 5V
0.01

VOUT2 Efficiency vs. Load Current
100

Efficiency (%)

VOUT2 Efficiency vs. Load Current

DEM
ASM

0.1

Load Current (A)

100

50
40
30
20

0
0.001

DEM
ASM

Load Current (A)

VOUT2 Efficiency vs. Load Current
100

Efficiency (%)

VOUT1 Efficiency vs. Load Current
100

0.1

Load Current (A)

DEM
ASM

60
50
40
30
20

VIN = 12V, RTON = 100kΩ, VENTRIP1 = 5V,
VENTRIP2 = 1.5V, ENLDO = 5V
0.01

0.1

Load Current (A)

DS8243A/B/C-07 November 2014

10
0
0.001

VIN = 20V, RTON = 100kΩ, VENTRIP1 = 5V,
VENTRIP2 = 1.5V, ENLDO = 5V
0.01

0.1

Load Current (A)

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VOUT1 Switching Frequency
240
VIN = 8V, RTON = 100kΩ,
220
ENLDO = VIN, VENTRIP1 = 1.5V,
200 VENTRIP2 = 5V
180

vs. Load Current

Switch Frequency (kHz)1

Switching Frequency (kHz)1

RT8243A/B/C

160
140
120

ASM
DEM

100
80
60
40
20
0
0.001

0.01

0.1

VOUT1 Switching Frequency
260
VIN = 12V, RTON = 100kΩ,
240
ENLDO = VIN, VENTRIP1 = 1.5V,
220 VENTRIP2 = 5V
200
180
160
140
120

ASM
DEM

100
80
60
40
20
0
0.001

0.01

Switching Frequency (kHz)1

vs. Load Current

VOUT2 Switching Frequency
280
VIN = 8V, RTON = 100kΩ,
260
ENLDO = VIN, VENTRIP1 = 5V,
240
VENTRIP2 = 1.5V
220
200
180
160
140
120
ASM
100
DEM
80
60
40
20
0
0.001

0.01

vs. Load Current
Switching Frequency (kHz)1

Switching Frequency (kHz)1

220
200
180
160
140
120
100
80
60
40
20
0
0.001

ASM
DEM

0.01

0.1

Load Current (A)

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vs. Load Current

0.1

Load Current (A)

VOUT2 Switching Frequency
300
280 VIN = 12V, RTON = 100kΩ,
260 ENLDO = VIN, VENTRIP1 = 5V,
240 VENTRIP2 = 1.5V

0.1

Load Current (A)

VOUT1 Switching Frequency
260
VIN = 20V, RTON = 100kΩ,
240
ENLDO = VIN, VENTRIP1 = 1.5V,
220 V
ENTRIP2 = 5V
200
180
160
140
120
ASM
100
DEM
80
60
40
20
0
0.001
0.01
0.1

vs. Load Current

VOUT2 Switching Frequency
300
280 VIN = 20V, RTON = 100kΩ,
260 ENLDO = VIN, VENTRIP1 = 5V,
240 VENTRIP2 = 1.5V
220
200
180
160
140
120
100
80
60
40
20
0
0.001

vs. Load Current

ASM
DEM

0.01

0.1

Load Current (A)

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DS8243A/B/C-07 November 2014

RT8243A/B/C
VOUT2 Output Voltage vs. Load Current
3.420

5.031

3.414

5.028

3.408

Output Voltage (V)

VOUT1 Output Voltage vs. Load Current
5.034

5.025
5.022

ASM
DEM

5.019
5.016

VIN = 12V, RTON = 100kΩ, ENLDO = VIN,
VENTRIP1 = 1.5V, VENTRIP2 = 5V

5.013
5.010
0.001

0.01

0.1

3.402
3.396

ASM
DEM

3.390
3.384

VIN = 12V, RTON = 100kΩ, ENLDO = VIN,
VENTRIP1 = 5V, VENTRIP2 = 1.5V

3.378
3.372
0.001

0.01

0.1

Load Current (A)

LDO3 Output Voltage vs. Output Current

LDO5 Output Voltage vs. Output Current
5.072

3.354
3.352
3.350

Output Voltage (V)

5.068
5.064
5.060
5.056

3.348
3.346
3.344
3.342
3.340
3.338

5.052

VIN = 12V, VENTRIP1 = VENTRIP2 = 5V, ENLDO = VIN
5.048

3.336

VIN = 12V, VENTRIP1 = VENTRIP2 = 5V, ENLDO = VIN

3.334
0

100

Output Current (mA)

100

Output Current (mA)

Standby Input Current vs. Input Voltage

No Load Battery Current vs. Input Voltage
100

240

ASM
DEM
1

RTON = 100kΩ, VENTRIP1 = VENTRIP2 =1.5V,
EVLDO = VIN
0.1

Standby Input Current (μA)1

Battery Current (mA)

238
236
234
232
230
228

VENTRIP1 = VENTRIP2 = 5V, ENLDO = VIN, No Load
226

6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Input Voltage (V)
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DS8243A/B/C-07 November 2014

Input Voltage (V)
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13

RT8243A/B/C
Power On from ENLDO

Shutdown Input Current vs. Input Voltage
Shutdown Input Current (μA)1

22
21
20
19

LDO5
(2V/Div)
LDO3
(2V/Div)
CP
(10V/Div)

18
17
16
15
14
13
12
11

VENTRIP1 = VENTRIP2 = 5V, ENLDO = GND, No Load

ENLDO
(10V/Div)

VIN = 12V, VENTRIP1 = VENTRIP2 = 1.5V
ENLDO = VIN, RTON = 100kΩ, No Load

10
6

Time (2ms/Div)

Input Voltage (V)

Power Off from ENM

Power On from ENM
RT8243A

RT8243A

VOUT1
(5V/Div)
VOUT2
(5V/Div)

VOUT1
(2V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
ENM
(5V/Div)

VIN = 12V, VENM = 5V, RTON = 100kΩ,
VENTRIP1 = VENTRIP2 = 1.5V,
ENLDO = VIN, No Load

PGOOD
(5V/Div)

VIN = 12V, VENM = 5V, RTON = 100kΩ
VENTRIP1 = VENTRIP2 = 1.5V, ENLDO = VIN, No Load

ENM
(5V/Div)

Time (1ms/Div)

Time (10ms/Div)

Power On from ENTRIP1

Power Off from ENTRIP1

RT8243B/C

VOUT1
(2V/Div)

PGOOD
(5V/Div)

ENTRIP1
(5V/Div)

VIN = 12V, VENTRIP1 = VENTRIP2 = 1.5V,
ENLDO = VIN, RTON = 100kΩ, No Load

Time (1ms/Div)

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14

RT8243B/C

ENTRIP1
(5V/Div)

VVIN
= 12V,
12V, VVENTRIP1
= VVENTRIP2
= 1.5V,
1.5V,
IN =
ENTRIP1 =
ENTRIP2 =
ENLDO
ENLDO == VIN,
VIN, R
RTON
= 100kΩ,
100kΩ,No
No Load
Load
TON =

Time (4ms/Div)

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DS8243A/B/C-07 November 2014

RT8243A/B/C
Power On from ENTRIP2

Power Off from ENTRIP2

RT8243B/C

VOUT2
(1V/Div)
PGOOD
(5V/Div)

VOUT2
(1V/Div)
PGOOD
(10V/Div)

ENTRIP2
(5V/Div)

VIN = 12V, VENTRIP1 = VENTRIP2 = 1.5V,
ENLDO = VIN, RTON = 100kΩ, No Load

Time (1ms/Div)

VOUT1 DEM-MODE Load Transient Response

VOUT2 DEM-MODE Load Transient Response

UGATE2
(20V/Div)

UGATE1
(20V/Div)
LGATE1
(5V/Div)

LGATE2
(5V/Div)

VIN = 12V, RTON = 100kΩ,
ENLDO = VIN, IOUT1 =1A to 8A

Inductor
Current
(5A/Div)

VIN = 12V, RTON = 100kΩ,
ENLDO = VIN, IOUT2 =1A to 8A

Time (20μs/Div)

OVP

UVP

VOUT1
(2V/Div)
PGOOD
(5V/Div)
UGATE1
(50V/Div)
LGATE1
(10V/Div)

VOUT1
(2V/Div)
PGOOD
(5V/Div)
VOUT2
(2V/Div)

Time (20ms/Div)

VOUT2_AC
(50mV/Div)

VOUT1_AC
(50mV/Div)

Inductor
Current
(5A/Div)

VIN = 12V, VENTRIP1 = VENTRIP2 = 1.5V,
ENLDO = VIN, RTON = 100kΩ, No Load

VIN = 12V, RTON = 100kΩ, ENLDO = VIN, No Load

Time (10ms/Div)

DS8243A/B/C-07 November 2014

VIN = 12V, RTON = 100kΩ, ENLDO = VIN

Time (100μs/Div)

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15

RT8243A/B/C
Application Information
The RT8243A/B/C is a dual, Mach ResponseTM DRVTM
mode synchronous buck controller targeted for notebook
system power supply solutions. Richtek's Mach
ResponseTM technology provides fast response to load
steps. The topology circumvents the poor load transient
timing problems of fixed frequency current mode PWMs
while avoiding the problems caused by widely varying
switching frequency in conventional constant on-time and
constant off-time PWM schemes. A special adaptive ontime control trades off the performance and efficiency over
wide input voltage range. The RT8243A/B/C includes 5V
(LDO5) and 3.3V (LDO3) linear regulators. The LDO5 linear
regulator steps down the battery voltage to supply both
internal circuitry and gate drivers. The synchronous switch
gate drivers are directly powered by LDO5. When VOUT1
rises above 4.66V, an automatic circuit disconnects the
linear regulator and allows the device to be powered by
VOUT1 via the BYP1 pin.
PWM Operation
The Mach ResponseTM DRVTM mode controller relies on
the output filter capacitor's Effective Series Resistance
(ESR) to act as a current sense resistor, so that the output
ripple voltage provides the PWM ramp signal. Referring to
the RT8243A/B/C's Function Block Diagram, the
synchronous high side MOSFET will be turned on at the
beginning of each cycle. After the internal one-shot timer
expires, the MOSFET will be turned off. The pulse width
of this one-shot is determined by the converter's input
voltage and the output voltage to keep the frequency fairly
constant over the entire input voltage range. Another oneshot sets a minimum off-time (400ns typ.). The on-time
one-shot will be triggered if the error comparator is high,
the low side switch current is below the current limit
threshold, and the minimum off-time one-shot has timed
out.
PWM Frequency and On-time Control
For each specific input voltage range, the Mach
ResponseTM control architecture runs with pseudo constant
frequency by feed forwarding the input and output voltage
into the on-time one-shot timer. The high side switch

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16

on-time is inversely proportional to the input voltage as
measured by VIN and proportional to the output voltage.
There are two benefits of a constant switching frequency.
First, the frequency can be selected to avoid noise
sensitive regions such as the 455kHz IF band. Second,
the inductor ripple current operating point remains
relatively constant, resulting in easy design methodology
and predictable output voltage ripple. The frequency for
3V SMPS is set higher than the frequency for 5V SMPS.
This is done to prevent audio frequency “beating” between
the two sides, which switch asynchronously for each side.
The TON pin is connected to GND through the external
resistor, RTON, to set the switching frequency.
The RT8243A/B/C adaptively changes the operation
frequency according to the input voltage. Higher input
voltage usually comes from an external adapter, so the
RT8243A/B/C operates with higher frequency to have
better performance. Lower input voltage usually comes
from a battery, so the RT8243A/B/C operates with lower
switching frequency for lower switching losses. For a
specific input voltage range, the switching cycle period is
given by :
For 5.5V < VIN < 6.5V :
tS1 = 61.28p x RTON
tS2 = 44.43p x RTON
For 6.5V < VIN < 12V :
tS1 = 51.85p x RTON
tS2 = 44.43p x RTON
For 12V < VIN < 25V :
tS1 = 45.75p x RTON
tS2 = 39.2p x RTON
The on-time guaranteed in the Electrical Characteristics
table is influenced by switching delays in the external
high side power MOSFET. Two external factors that
influence switching frequency accuracy are resistive drops
in the two conduction loops (including inductor and PC
board resistance) and the dead time effect. These effects
are the largest contributors to the change of frequency
with changing load current. The dead time effect increases
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DS8243A/B/C-07 November 2014

RT8243A/B/C
the effective on-time by reducing the switching frequency
as one or both dead times. It occurs only in PWM mode
when the inductor current reverses at light or negative
load currents. With reversed inductor current, the
inductor's EMF causes PHASEx to go high earlier than
normal, hence extending the on-time by a period equal to
the low to high dead time. For loads above the critical
conduction point, the actual switching frequency is :
f = (VOUT  VDROP1 ) / (tON x (VIN  VDROP1  VDROP2 ))
where VDROP1 is the sum of the parasitic voltage drops in
the inductor discharge path, including synchronous
rectifier, inductor, and PC board resistances; VDROP2 is
the sum of the resistances in the charging path; and tON
is the on-time calculated by the RT8243A/B/C.

load current is further decreased, it takes longer and longer
time to discharge the output capacitor to the level that
requires the next “ON” cycle. The on-time is kept the
same as that in the heavy load condition. In reverse, when
the output current increases from light load to heavy load,
the switching frequency increases to the preset value as
the inductor current reaches the continuous conduction.
The transition load point to the light load operation is shown
in Figure 3. and can be calculated as follows :
IL

Slope = (VIN-VOUT)/L
IPEAK

ILOAD = IPEAK/2

Operation Mode Selection
The RT8243A/B supports two operation modes : Diode
Emulation Mode and Ultrasonic Mode. The RT8243C only
supports Ultrasonic Mode. The operation mode can be
set via the ENM pin for RT8243A or SECFB pin for
RT8243B.
Table 1. Operation Mode Setting
Part Number

RT8243A

RT8243B

RT8243C

Pin Name

ENM

SECFB

Pin-13
Voltage Range

Mode State

4.5V to 5V

ASM

2.3V to 3.6V

DEM

ASM

1.2V to 1.8V

ASM

Below 0.8V

Shutdown

UVP

Diode Emulation Mode
In Diode Emulation Mode, the RT8243A/B automatically
reduces switching frequency at light load conditions to
maintain high efficiency. This reduction of frequency is
achieved smoothly. As the output current decreases from
heavy-load condition, the inductor current is also reduced,
and eventually comes to the point that its current valley
touches zero, which is the boundary between continuous
conduction and discontinuous conduction modes. By
emulating the behavior of diodes, the low side MOSFET
allows only partial negative current to flow when the
inductor free wheeling current becomes negative. As the
Copyright © 2014 Richtek Technology Corporation. All rights reserved.

DS8243A/B/C-07 November 2014

tON

Figure 3. Boundary condition of CCM/DEM
(VIN  VOUT )
 tON
2L
where tON is the on-time.
ILOAD(SKIP) 

The switching waveforms may appear noisy and
asynchronous when light loading causes diode emulation
operation. This is normal and results in high efficiency.
Trade offs in PFM noise vs. light load efficiency is made
by varying the inductor value. Generally, low inductor values
produce a broader efficiency vs. load curve, while higher
values result in higher full load efficiency (assuming that
the coil resistance remains fixed) and less output voltage
ripple. Penalties for using higher inductor values include
larger physical size and degraded load transient response
(especially at low input voltage levels).
Ultrasonic Mode
The RT8243A/B/C activates a unique type of Diode
Emulation Mode with a minimum switching frequency of
25kHz, called Ultrasonic Mode. This mode eliminates
audio-frequency modulation that would otherwise be
present when a lightly loaded controller automatically
skips pulses. In Ultrasonic Mode, the low side switch gate
driver signal is “OR”ed with an internal oscillator
(>25kHz). Once the internal oscillator is triggered, the
ultrasonic controller pulls LGATEx high and turns on the
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17

RT8243A/B/C
low side MOSFET to induce a negative inductor current.
After the output voltage falls below the reference voltage,
the controller turns off the low side MOSFET (LGATEx
pulled low) and triggers a constant on-time (UGATEx driven
high). When the on-time has expired, the controller reenables the low side MOSFET until the controller detects
that the inductor current dropped below the zero crossing
threshold.
Linear Regulators (LDOx)
The RT8243A/B/C includes 5V (LDO5) and 3.3V (LDO3)
linear regulators. The regulators can supply up to 100mA
for external loads. Bypass LDOx with a minimum 4.7μF
ceramic capacitor. When VOUT1 is higher than the switch
over threshold (4.66V), an internal 1.5Ω P-MOSFET switch
connects BYP1 to the LDO5 pin while simultaneously
disconnects the internal linear regulator.

10μA (typ.) at room temperature. The current source has
a 4700ppm/°C temperature slope to compensate the
temperature dependency of the RDS(ON). When the voltage
drop across the sense resistor or low side MOSFET
equals 1/10 the voltage across the RILIM resistor, positive
current limit will be activated. The high side MOSFET will
not be turned on until the voltage drop across the MOSFET
falls below 1/10 the voltage across the RILIM resistor.
Choose a current limit resistor according to the following
equation :
VILIM = (RILIM x 10μA) / 10 = IILIM x RDS(ON)
RILIM = (IILIM x RDS(ON)) x 10 / 10μA
Carefully observe the PC board layout guidelines to ensure
that noise and DC errors do not corrupt the current sense
signal at PHASEx and GND. Mount or place the IC close
to the low side MOSFET.

Current Limit Setting (ENTRIPx)

Charge Pump (SECFB)

The RT8243A/B/C has cycle-by-cycle current limit control.
The current limit circuit employs a unique “valley” current
sensing algorithm. If the magnitude of the current sense
signal at PHASEx is above the current limit threshold,
the PWM is not allowed to initiate a new cycle (Figure 4).
The actual peak current is greater than the current limit
threshold by an amount equal to the inductor ripple current.
Therefore, the exact current limit characteristic and
maximum load capability are a function of the sense
resistance, inductor value, and battery and output voltage.

The external 14V charge pump is driven by LGATEx. When
LGATEx is low, C1 will be charged by VOUT1 through D1.
C1 voltage is equal to VOUT1 minus the diode drop. When
LGATEx becomes high, C1 transfers the charge to C2
through D2 and charges C2 voltage to VLGATEX plus C1
voltage. As LGATEx transitions low on the next cycle, C3
is charged to C2 voltage minus a diode drop through D3.
Finally, C3 charges C4 through D4 when LGATEx switches
high. Thus, the total charge pump voltage, VCP, is :

IL
IPEAK
ILOAD

ILIMIT
t

Figure 4. “Valley” Current Limit
The RT8243A/B/C uses the on resistance of the
synchronous rectifier as the current sense element and
supports temperature compensated MOSFET RDS(ON)
sensing. The RILIM resistor between the ENTRIPx pin and
GND sets the current limit threshold. The resistor, RILIM,
is connected to a current source from ENTRIPx which is
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18

VCP = VOUT1 + 2 x VLGATEx − 4 x VD
where VLGATEx is the peak voltage of the LGATEx driver
which is equal to LDO5 and VD is the forward voltage
dropped across the Schottky diode.
The SECFB pin in the RT8243B/C is used to monitor the
charge pump via a resistive voltage divider to generate
approximately 14V DC voltage and the clock driver uses
VOUT1 as its power supply. In the event where SECFB
drops below its feedback threshold, an ultrasonic pulse
will occur to refresh the charge pump driven by LGATEx.
If there's an overload on the charge pump in which SECFB
can not reach more than its feedback threshold, the
controller will enter Ultrasonic Mode. Special care should
be taken to ensure that enough normal ripple voltage is
present on each cycle to prevent charge pump shutdown.
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DS8243A/B/C-07 November 2014

RT8243A/B/C
The robustness of the charge pump can be increased by
reducing the charge pump decoupling capacitor and placing
a small ceramic capacitor, CF (47pF to 220pF), in parallel
with the upper leg of the SECFB resistor feedback network,
RCP1, as shown below in Figure 5.
SECFB

RCP2

LGATE1
C1

RCP1

VOUT1

Charge Pump
D1

D3
C2

Figure 5. Charge pump circuit connected to SECFB
MOSFET Gate Driver (UGATEx, LGATEx)
The high side driver is designed to drive high current, low
RDS(ON) N-MOSFET(s). When configured as a floating driver,
5V bias voltage is delivered from the LDO5 supply. The
average drive current is also calculated by the gate charge
at VGS = 5V times switching frequency. The instantaneous
drive current is supplied by the flying capacitor between
BOOTx and PHASEx pins. A dead time to prevent shoot
through is internally generated from high side MOSFET
off to low side MOSFET on and low side MOSFET off to
high side MOSFET on.
The low side driver is designed to drive high current low
RDS(ON) N-MOSFET(s). The internal pull down transistor
that drives LGATEx low is robust, with a 1.5Ω typical onresistance. A 5V bias voltage is delivered from the LDO5
supply. The instantaneous drive current is supplied by an
input capacitor connected between LDO5 and GND.
For high current applications, some combinations of high
and low side MOSFETs may cause excessive gate drain
coupling, which leads to efficiency killing, EMI producing,
shoot through currents. This is often remedied by adding
a resistor in series with BOOTx, which increases the turn
on time of the high side MOSFET without degrading the
turn-off time. See Figure 6.
VIN

UGATEx
BOOTx

RBOOT

PHASEx

Soft-Start
The RT8243A/B/C provides an internal soft-start function
to prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled. During softstart, the internal current limit circuit gradually ramps up
the inductor current from zero. The maximum current limit
value is set externally as described in previous section.
The soft-start time is determined by the current limit level
and output capacitor value. The current limit threshold ramp
up time is typically 2ms from zero to 200mV after
ENTRIPx is enabled. A unique PWM duty limit control
that prevents output over voltage during soft-start period
is designed specifically for FBx floating.
UVLO Protection
The RT8243A/B/C has LDO5 under voltage lock out
protection (UVLO). When the LDO5 voltage is lower than
4.05V (typ.) and the LDO3 voltage is lower than 2.2V (typ.),
both switch power supplies are shut off. This is a nonlatch protection.
Power Good Output (PGOOD)
PGOOD is an open-drain type output and requires a pull
up resistor. PGOOD is actively held low in soft-start,
standby, and shutdown. It is released when both output
voltages are above 90% of the nominal regulation point
for RT8243A. For RT8243B/C, besides requiring both
output voltages to be above 90% of nominal regulation
point, the SECFB threshold must also be above 50% of
nominal regulation point in order for PGOOD to be released.
The PGOOD signal goes low if either output turns off or is
10% below its nominal regulation point.
Output Over Voltage Protection (OVP)
The output voltage can be continuously monitored for over
voltage. If the output voltage exceeds 12% of its set voltage
threshold, the over voltage protection is triggered and the
LGATEx low side gate drivers are forced high. This
activates the low side MOSFET switch, which rapidly
discharges the output capacitor and pulls the input voltage
downward.

DS8243A/B/C-07 November 2014

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RT8243A/B/C
The RT8243A/B/C is latched once OVP is triggered and
can only be released by either toggling ENLDO, ENTRIPx
or cycling VIN. There is a 5μs delay built into the over
voltage protection circuit to prevent false transition.
Note that latching LGATEx high will cause the output
voltage to dip slightly negative due to previously stored
energy in the LC tank circuit. For loads that cannot tolerate
a negative voltage, place a power Schottky diode across
the output to act as a reverse polarity clamp.
If the over voltage condition is caused by a short in high
side switch, turning the low side MOSFET on 100% will
create an electrical short between the battery and GND,
hence blowing the fuse and disconnecting the battery from
the output.
Output Under voltage Protection (UVP)
The output voltage can be continuously monitored for under
voltage. If the output is less than 58% of its set voltage
threshold, the under voltage protection will be triggered
and then both UGATEx and LGATEx gate drivers will be
forced low. The UVP is ignored for at least 5ms (typ.)
after a start up or a rising edge on ENTRIPx. Toggle
ENTRIPx or cycle VIN to reset the UVP fault latch and
restart the controller.
Thermal Protection
The RT8243A/B/C features thermal shutdown to prevent
damage from excessive heat dissipation. Thermal
shutdown occurs when the die temperature exceeds
150°C. All internal circuitry is inactive during thermal
shutdown. The RT8243A/B/C triggers thermal shutdown
if LDOx is not supplied from VOUTx, while input voltage on
VIN and drawing current from LDOx are too high.
Nevertheless, even if LDOx is supplied from VOUTx,
overloading LDOx can cause large power dissipation on
automatic switches, which may still result in thermal
shutdown.

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20

Discharge Mode (Soft Discharge)
When ENTRIPx is low and a transition to standby or
shutdown mode occurs, or the output under voltage fault
latch is set, the output discharge mode will be triggered.
During discharge mode, an internal switch creates a path
for discharging the output capacitors' residual charge to
GND.
Shutdown Mode
SMPS1, SMPS2, LDO3 and LDO5 all have independent
enabling control. Drive ENLDO, ENTRIP1 and ENTRIP2
below the precise input falling edge trip level to place the
RT8243A/B/C in its low power shutdown state. The
RT8243A/B/C consumes only 20μA of input current while
in shutdown. When shutdown mode is activated, the
reference turns off. The accurate 0.95V falling edge
threshold on ENLDO can be used to detect a specific
analog voltage level and to shutdown the device. Once in
shutdown, the 1.6V rising edge threshold activates,
providing sufficient hysteresis for most applications.
Power Up Sequencing and On/Off Controls
(ENTRIPx, ENM)
ENTRIP1 and ENTRIP2 control SMPS power up
sequencing. When the RT8243A/B/C is applied in the
single channel mode, ENTRIPx disables the respective
output when ENTRIPx voltage rises above 4.5V.
Furthermore, when the RT8243A is applied in the dual
channel mode, the outputs are enabled when ENM voltage
rises above 2.3V.

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DS8243A/B/C-07 November 2014

RT8243A/B/C
Table1. Operation Mode Truth Table
Mode

Condition

Comment

Power Up

LDOx < UVLO threshold

Transitions to discharge mode after VIN POR and
after REF becomes valid. LDO5 and LDO3 remain
active.

Run

ENLDO = high, V OUT1 or VOUT2 are
enabled

Normal Operation.

Over Voltage
Protection

Either output >112% of the nominal level.

Under Voltage
Protection

Either output < 58% of the nominal level
after 3ms time-out expires and output is
enabled

Discharge

Either output is still high in standby mode
or shutdown mode

Standby

ENTRIPx or ENM < startup threshold,
ENLDO = high.

LDO3 and LDO5 are active.

Shutdown

ENLDO = low

All circuitry are off.

Thermal
Shutdown

T J > 150°C

All circuitry are off. Exit by VIN POR or by toggling
ENLDO, ENTRIPx, and ENM.

LGATEx is forced high. LDO3 and LDO5 are active.
Exit by VIN POR or by toggling ENLDO, ENTRIPx,
and ENM.
Both UGATEx and LGATEx are forced low and
enter discharge mode. LDO3 and LDO5 are active.
Exit by VIN POR or by toggling ENLDO, ENTRIPx,
and ENM.
During discharge mode, there is one path to
discharge the output capacitors’ residual charge to
GND via an internal switch.

Table 2. Power Up Sequencing (RT8243A)
ENLDO (V)

ENM (V)

ENTRIP1
(V)

ENTRIP2
(V)

LDO5

LDO3

SMPS1

SMPS2

Low

Off

“>1.6V”
=> High

Low

Off

“>1.6V”
=> High

“>2.3V”
=> High

Off

“>1.6V”
=> High

“>2.3V”
=> High

Off

“>1.6V”
=> High

“>2.3V”
=> High

“>1.6V”
=> High

“>2.3V”
=> High

Off

DS8243A/B/C-07 November 2014

is a registered trademark of Richtek Technology Corporation.

www.richtek.com
21

RT8243A/B/C
Output Voltage Setting (FBx)

Output Capacitor Selection

Connect a resistive voltage divider at the FBx pin between
VOUTx and GND to adjust the output voltage between 2V
and 5.5V (Figure 7). Choose R2 to be approximately 10kΩ,
and solve for R1 using the equation :

The capacitor value and ESR determine the amount of
output voltage ripple and load transient response. Thus,
the capacitor value must be greater than the largest value
calculated from below equations.

  R1  
VOUT  VFBx x  1  

  R2  

VSAG 

where VFBx is 2V (typ.).
VIN

VOUTx

PHASEx
R1

PGND
FBx
R2
GND

Figure 7. Setting VOUTx with a resistive voltage divider
Output Inductor Selection
The switching frequency (on-time) and operating point (%
ripple or LIR) determine the inductor value as shown
below :

t
x (VIN  VOUTx )
L  ON
LIR x ILOAD(MAX)
where LIR is the ratio of the peak-to-peak ripple current to
the average inductor current.
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite cores
are often the best choice, although powdered iron is
inexpensive and can work well at 200kHz. The core must
be large enough not to saturate at the peak inductor
current, IPEAK :
IPEAK = ILOAD(MAX) + [ (LIR / 2) x ILOAD(MAX) ]
The calculation above shall serve as a general reference.
To further improve transient response, the output
inductance can be further reduced. Of course, besides
the inductor, the output capacitor should also be
considered when improving transient response.

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22

2 x COUT   VIN  tON  VOUTx (tON + tOFF(MIN) )

VSOAR 

UGATEx

LGATEx

(ILOAD )2  L  (tON  tOFF(MIN) )

(ILOAD )2  L
2  COUT  VOUTx



1
VP P  LIR x ILOAD(MAX)   ESR +

8
x
C

f
OUT


where VSAG and VSOAR are the allowable amount of
undershoot and overshoot voltage during load transient,
Vp-p is the output ripple voltage, and tOFF(MIN) is the
minimum off-time.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WQFN-20L 3x3 package, the thermal resistance, θJA, is
30°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
P D(MAX) = (125°C − 25°C) / (30°C/W) = 3.33W for
WQFN-20L 3x3 package

is a registered trademark of Richtek Technology Corporation.

DS8243A/B/C-07 November 2014

RT8243A/B/C

Maximum Power Dissipation (W)1

The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 8 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
3.6

Four-Layer PCB
3.0
2.4

Layout Considerations
Layout is very important in high frequency switching
converter design. Improper PCB layout can radiate
excessive noise and contribute to the converter’s
instability. Certain points must be considered before
starting a layout with the RT8243A/B/C.


Place the filter capacitor close to the IC, within 12mm
(0.5 inch) if possible.



Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high-voltage switching node.



Connections from the drivers to the respective gate of
the high side or the low side MOSFET should be as
short as possible to reduce stray inductance. Use
0.65mm (25 mils) or wider trace.



All sensitive analog traces and components such as
FBx, ENTRIPx, PGOOD, and TON should be placed
away from high voltage switching nodes such as
PHASEx, LGATEx, UGATEx, or BOOTx nodes to avoid
coupling. Use internal layer(s) as ground plane(s) and
shield the feedback trace from power traces and
components.



Place ground terminal of VIN capacitor(s), V OUTx
capacitor(s), and source of low side MOSFETs as close
to each other as possible. The PCB trace of PHASEx
node, which connects to source of high side MOSFET,
drain of low side MOSFET and high voltage side of the
inductor, should be as short and wide as possible.

1.8
1.2
0.6
0.0
0

100

125

Ambient Temperature (°C)

Figure 8. Derating Curve of Maximum Power Dissipation

DS8243A/B/C-07 November 2014

is a registered trademark of Richtek Technology Corporation.

www.richtek.com
23

RT8243A/B/C
Outline Dimension

DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters

Dimensions In Inches

Symbol
Min

Max

Min

Max

0.700

0.800

0.028

0.031

0.000

0.050

0.000

0.002

0.175

0.250

0.007

0.010

0.150

0.250

0.006

0.010

2.900

3.100

0.114

0.122

1.650

1.750

0.065

0.069

2.900

3.100

0.114

0.122

1.650

1.750

0.065

0.069

e
L

0.400
0.350

0.016
0.450

0.014

0.018

W-Type 20L QFN 3x3 Package

Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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24

DS8243A/B/C-07 November 2014

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