Si2343DS Datasheet. Www.s Manuals.com. Vishay

User Manual: Marking of electronic components, SMD Codes F3, F3*, F3**, F3***, F30, F30*, F32, F33, F33*, F35, F3=***, F3B. Datasheets 1SS193, BZX585-C3V0, EMF32, EMF33, HSMP-3823, MMSZ5238, PZU2.7B1, R7732AGE, SP6201EM5-3-0, SP6201EM5-3-3, SP6201EM5-3-5, Si2343DS, TC1073-3.0VCH713 , TPCF8102, UMF32N, WL2805N30, WL2805N33.

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Vishay Siliconix
Si2343DS
Document Number: 72079
S09-0133-Rev. B, 02-Feb-09
www.vishay.com
1
P-Channel 30-V (D-S) MOSFET
FEATURES
Halogen-free According to IEC 61249-2-21
Available
TrenchFET® Power MOSFET
APPLICATIONS
Load Switch
PA Switch
PRODUCT SUMMARY
VDS (V) RDS(on) (Ω)I
D (A)
- 30 0.053 at VGS = - 10 V - 4.0
0.086 at VGS = - 4.5 V - 3.1
G
S
D
Top V i ew
2
3
TO-236
(SOT-23)
1
Si2343DS (F3)*
* Marking Code
Ordering Information: Si2343DS-T1
Si2343DS-T1-E3 (Lead (Pb)-free)
Si2343DS-T1-GE3 (Lead (Pb)-free and Halogen-free)
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Pulse width limited by maximum junction temperature.
* Pb containing terminations are not RoHS compliant, exemptions may apply
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter Symbol 5 s Steady State Unit
Drain-Source Voltage VDS - 30 V
Gate-Source Voltage VGS ± 20
Continuous Drain Current (TJ = 150 °C)a, b TA = 25 °C ID
- 4.0 - 3.1
A
TA = 70 °C - 3.2 - 2.5
Pulsed Drain Current IDM - 15
Continuous Source Current (Diode Conduction)a, b IS- 1.0 - 0.6
Maximum Power Dissipationa, b TA = 25 °C PD
1.25 0.75 W
TA = 70 °C 0.8 0.48
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 °C
THERMAL RESISTANCE RATINGS
Parameter Symbol Typical Maximum Unit
Maximum Junction-to-Ambientat 5 s RthJA
75 100
°C/W
Steady State 120 166
Maximum Junction-to-Foot (Drain) Steady State RthJF 40 50
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2
Document Number: 72079
S09-0133-Rev. B, 02-Feb-09
Vishay Siliconix
Si2343DS
Notes:
a. Pulse test: PW 300 µs, duty cycle 2 %.
b. For DESIGN AID ONLY, not subject to production testing.
c. Switching time is essentially independent of operating temperature.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions
Limits
Unit
Min. Typ. Max.
Static
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = - 250 µA - 30 V
Gate-Threshold Voltage VGS(th) VDS = VGS, ID = - 250 µA - 1 - 3
Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 20 V ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = - 24 V, VGS = 0 V - 1 µA
VDS = - 24 V, VGS = 0 V, TJ = 55 °C - 10
On-State Drain CurrentaID(on) V
DS - 5 V, VGS = - 10 V - 15 A
Drain-Source On-ResistanceaRDS(on)
VGS = - 10 V, ID = - 4.0 A 0.043 0.053 Ω
VGS = - 4.5 V, ID = - 3.1 A 0.068 0.086
Forward Transconductanceagfs VDS = - 5 V, ID = - 4.0 A 10 S
Diode Forward Voltage VSD IS = - 1.0 A, VGS = 0 V - 0.7 - 1.2 V
Dynamicb
Total Gate Charge Qg
VDS = - 15 V, VGS = - 10 V
ID - 4.0 A
14 21
nCGate-Source Charge Qgs 1.9
Gate-Drain Charge Qgd 3.7
Input Capacitance Ciss
VDS = - 15 V, VGS = 0 V, f = 1 MHz
540
pFOutput Capacitance Coss 131
Reverse Transfer Capacitance Crss 105
Switchingc
Tur n - O n T i m e td(on)
VDD = - 15 V, RL = 15 Ω
ID - 1.0 A, VGEN = - 10 V
RG = 6 Ω
10 15
ns
tr15 25
Turn-Off Time td(off) 31 50
tf20 30
Document Number: 72079
S09-0133-Rev. B, 02-Feb-09
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3
Vishay Siliconix
Si2343DS
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Output Characteristics
On-Resistance vs. Drain Current
Gate Charge
0
3
6
9
12
15
012345
VGS = 10 thru 5 V
3 V
VDS - Drain-to-Source Voltage (V)
- Drain Current (A)I
D
4 V
0.00
0.02
0.04
0.06
0.08
0.10
0.12
03691215
VGS = 4.5 V
VGS = 10 V
RDS(on)
ID - Drain Current (A)
- On-Resistance (Ω)
0
2
4
6
8
10
03691215
VDS =15 V
ID = 4.0 A
- Gate-to-Source Voltage (V)
Qg - Total Gate Charge (nC)
V
GS
Transfer Characteristics
Capacitance
On-Resistance vs. Junction Temperature
0
3
6
9
12
15
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
- 55 °C
VGS - Gate-to-Source Voltage (V)
- Drain Current (A)ID
TC = 125 °C
25 °C
0
200
400
600
800
1000
0 5 10 15 20 25 30
Crss
Coss
Ciss
VDS - Drain-to-Source Voltage (V)
C - Capacitance (pF)
0.6
0.8
1.0
1.2
1.4
1.6
- 50 - 25 0 25 50 75 100 125 150
VGS = 4.0 V
ID = 4.0 A
TJ - Junction Temperature (°C)
(Normalized)
- On-ResistanceRDS(on)
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4
Document Number: 72079
S09-0133-Rev. B, 02-Feb-09
Vishay Siliconix
Si2343DS
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Source-Drain Diode Forward Voltage
Threshold Voltage
1.0 1.4
1
10
20
0 0.2 0.4 0.6 0.8
TJ = 150 °C
VSD - Source-to-Drain Voltage (V)
- Source Current (A)IS
TJ = 25 °C
1.2
- 0.4
- 0.2
0.0
0.2
0.4
0.6
- 50 - 25 0 25 50 75 100 125 150
ID = 250 µA
Variance (V)VGS(th)
TJ - Temperature (°C)
On-Resistance vs. Gate-to-Source Voltage
Single Pulse Power
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0246810
ID = 4.0 A
- On-Resistance (Ω)RDS(on)
VGS - Gate-to-Source Voltage (V)
ID = 1 A
0.01
0
1
6
12
2
4
10 6000.1
Power (W)
Time (s)
8
10
100
TA = 25 °C
Safe Operating Area
100
1
0.1 1 10 100
0.01
10
T
A
= 25 °C
Single Pulse
- Drain Current (A)I
D
DC
0.1
I
D(on)
Limited
DS(on)
*
Limited by R
BVDSS Limited
P(t) = 1
P(t) = 0.1
P(t) = 0.01
P(t) = 0.001
P(t) = 0.0001
I
DM
Limited
P(t) = 10
V
DS
- Drain-to-Source Voltage (V)
*V
GS
> minimum V
GS
at which R
DS(on)
is specified
Document Number: 72079
S09-0133-Rev. B, 02-Feb-09
www.vishay.com
5
Vishay Siliconix
Si2343DS
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72079.
Normalized Thermal Transient Impedance, Junction-to-Ambient
Square Wave Pulse Duration (s)
Normalized Effective Transient
Thermal Impedance
2
1
0.1
0.01
10-3 10-2 1 10 60010-1
10-4
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
Single Pulse
100
1. Duty Cycle, D =
2. Per Unit Base = RthJA = 120 °C/W
3. TJM - TA = PDMZthJA(t)
t1
t2
t1
t2
Notes:
4. Surface Mounted
PDM
Vishay Siliconix
Package Information
Document Number: 71196
09-Jul-01
www.vishay.com
1
SOT-23 (TO-236): 3-LEAD
b
E
E1
1
3
2
Se
e1
D
A2
A
A1C
Seating Plane
0.10 mm
0.004"
CC
L1
L
q
Gauge Plane
Seating Plane
0.25 mm
Dim MILLIMETERS INCHES
Min Max Min Max
A0.89 1.12 0.035 0.044
A10.01 0.10 0.0004 0.004
A20.88 1.02 0.0346 0.040
b0.35 0.50 0.014 0.020
c0.085 0.18 0.0030.007
D2.80 3.04 0.110 0.120
E2.10 2.64 0.0830.104
E11.20 1.40 0.047 0.055
e0.95 BSC 0.0374 Ref
e11.90 BSC 0.0748 Ref
L0.40 0.60 0.016 0.024
L10.64 Ref 0.025 Ref
S0.50 Ref 0.020 Ref
q3°8°3°8°
ECN: S-03946-Rev. K, 09-Jul-01
DWG: 5479
AN807
Vishay Siliconix
Document Number: 70739
26-Nov-03
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1
Mounting LITTLE FOOTR SOT-23 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use integrated
circuit and small-signal packages which have been been modified
to provide the heat transfer capabilities required by power devices.
Leadframe materials and design, molding compounds, and die
attach materials have been changed, while the footprint of the
packages remains the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET
footprint . In converting this footprint to the pad set for a power
device, designers must make two connections: an electrical
connection and a thermal connection, to draw heat away from the
package.
The electrical connections for the SOT-23 are very simple. Pin 1 is
the gate, pin 2 is the source, and pin 3 is the drain. As in the other
LITTLE FOOT packages, the drain pin serves the additional
function of providing the thermal connection from the package to
the PC board. The total cross section of a copper trace connected
to the drain may be adequate to carry the current required for the
application, but it may be inadequate thermally. Also, heat spreads
in a circular fashion from the heat source. In this case the drain pin
is the heat source when looking at heat spread on the PC board.
Figure 1 shows the footprint with copper spreading for the SOT-23
package. This pattern shows the starting point for utilizing the
board area available for the heat spreading copper. To create this
pattern, a plane of copper overlies the drain pin and provides
planar copper to draw heat from the drain lead and start the
process of spreading the heat so it can be dissipated into the
ambient air. This pattern uses all the available area underneath the
body for this purpose.
FIGURE 1. Footprint With Copper Spreading
0.114
2.9
0.059
1.5
0.0394
1.0
0.037
0.95
0.150
3.8
0.081
2.05
Since surface-mounted packages are small, and reflow soldering
is the most common way in which these are affixed to the PC
board, “thermal” connections from the planar copper to the pads
have not been used. Even if additional planar copper area is used,
there should be no problems in the soldering process. The actual
solder connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the drain
pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low-impedance
path for heat to move away from the device.
Application Note 826
Vishay Siliconix
Document Number: 72609 www.vishay.com
Revision: 21-Jan-08 25
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SOT-23
0.106
(2.692)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.022
(0.559)
0.049
(1.245)
0.029
(0.724)
0.037
(0.950)
0.053
(1.341)
0.097
(2.459)
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Revision: 02-Oct-12 1Document Number: 91000
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