Wistron JV50 TR8 Schematics. Www.s Manuals.com. R1 Schematics
User Manual: Motherboard Wistron JV50-TR8 - Schematics. Free.
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5 4 3 2 Project code: 91.4FN01.001 PCB P/N : 48.4FN02.001 REVISION : 09927-1 JV50-TR_8VRAM Block Diagram DDR2 PCB STACKUP 667/800MHz AMD Caspian CPU S1G3 (35W) 667/800 MHz 16,17 D 1 DDR2 667/800 MHz 16,17 G792 35 IN OUT INPUTS HDMI LAN 1D8V_S3(11A) G9661 27 PWR SW DY W83L351YG 28 Codec A-Link 4X4 AZALIA 34 PCIex1 49 C 1D1V_M92 RT9161 3D3V_S0 Mini Card ALC888S WLAN 28 G957 33 49 30 DY USB 2.0/1.1 ports BIOS ATA 66/100 Line Out (SPDIF) WPC773 MAX8731 DEBUG CONN.37 37 36 1D2V_S5 (400mA) CHARGER LPC MXIC MX25L1605 KBC Winbond High Definition Audio MAX978929 49 3D3V_S5 ETHERNET (10/100/1000Mb) OP AMP G9161 33 LPC BUS AMD SB710 INT.SPKR 1D5V_S0 (1A) Mini Card South Bridge INPUTS CHG_PWR DCBATOUT LPC I/F Touch Pad 38 PCI/PCI BRIDGE 11,12,13,14,15 SATA MODEM MDC Card 31 USB Mini USB Blue Tooth 24 HDD SATA 22 CardReader Realtek RTS5159 32 USB 2 Port ODD SATA Finger Printer 31 23 18V 5V Daughter Board Finger Printer Board 08650-1 100mA CPU DC/DC ISL6265AHR 45 INPUTS OUTPUTS VCC_CORE_S0_0 MS/MS Pro/xD /MMC/SD 0~1.55V 32 DCBATOUT Daughter Board Mini sensor Board 08696-1 18A VCC_CORE_S0_1 0~1.55V 18A VDDNB 0~1.55V 18A 25 JV50-TR8 Camera Daughter Board USB Board 08649-1 A Daughter Board LED Board 08651-1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title BLOCK DIAGRAM Size A3 Date: 5 4 B 6.0A UP+5V INT. KB 36 5 in 1 50 OUTPUTS ACPI 1.1 30 49 2D5V_S0 (200mA) 3D3V_S0 MIC In A DCBATOUT 5V_S5 New card DY RJ11 48 OUTPUTS 8,9,10 30 30 RJ45 27 26 INPUTS RT8209B 60,61,62,63 TXFM Giga LAN BCM5784 30 SYSTEM DC/DC LVDS, CRT I/F INTEGRATED GRAHPICS INT MIC B VRAM DDR3 Madison C Line In DCBATOUT 1D2V_S0(4A) 55,56,57,58,59 AMD RS880M CPU I/F 1D1V_S0(7.5A) BOTTOM 21 North Bridge 47 OUTPUTS TPS51124 GND 16X ICS9LPRS480BKLFT 71.09480.A03 RTM880N-796-VB-GRT 71.00880.A03 SYSTEM DC/DC S 19 CLK GEN. 3 3D3V_S5(6A) S LCD 16X16 D 5V_S5(6A) DCBATOUT 20 4,5,6,7 46 OUTPUTS RT8205A INPUTS VCC CRT 638-Pin uFCPGA638 667/800MHz SYSTEM DC/DC TOP 3 2 Document Number JV50-TR8 Monday, October 05, 2009 Rev -1 Sheet 1 1 of 63 5 4 3 2 1 D D C C B B JV50-TR8 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title USB/PCIE Routing Size A3 Date: 5 4 3 2 Document Number JV50-TR8 Monday, October 05, 2009 Rev -1 Sheet 2 1 of 63 A 5 4 3D3V_S0 3 3D3V_CLK_VDD 1 3D3V_S0 1 1 DY 2 2 C511 3000mA.80ohm 3D3V_S0 Due to PLL issue on current clock chip, the SBlink clock need to come from SRC clocks for RS740 and RS780. Future clock chip revision will fix this. C506 SC1U10V2KX-1GP 2 1 1 2 2 3D3V_48MPW R_S0 2 2R3J-GP SC4D7U6D3V3KX-GP 2 1 1 1 1 C504 SCD1U10V2KX-4GP 2 C492 SCD1U10V2KX-4GP DY C462 SCD1U10V2KX-4GP 2 1 1 C476 SCD1U10V2KX-4GP 2 C453 SCD1U10V2KX-4GP SCD1U10V2KX-4GP 2 C467 SCD1U10V2KX-4GP DY C502 SC10U10V5ZY-1GP SC10U10V5ZY-1GP D C501 2 C500 1 R221 1 1 R215 2 0R0603-PAD 2 D Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose. 1 R197 2 0R0603-PAD 1D1V_CLK_VDDIO C508 SC39P50V2JN-1GP VDDCPU VDDCPU_IO 16 17 11 VDDSRC VDDSRC_IO VDDSRC_IO 35 34 VDDSB_SRC VDDSB_SRC_IO 40 4 55 56 63 VDDSATA VDD VDDHTT VDDREF VDD48 51 PD# 9 CLK_NB_GPPSB 9 CLK_NB_GPPSB# NB A-Link MINI2 TPAD14-GP 56 CLK_NB_GPPSB_1 CLK_NB_GPPSB#_1 R200 1 0R0402-PAD 2 R204 1 0R0402-PAD 2 CLK_PCIE_MINI1_1 CLK_PCIE_MINI1#_1 R205 1 0R0402-PAD 2 R206 1 0R0402-PAD 2 CLK_PCIE_MINI2_1 CLK_PCIE_MINI2#_1 R211 1 0R0402-PAD 2 R208 1 0R0402-PAD 2 34 CLK_PCIE_NEW 34 CLK_PCIE_NEW # NEW CLK_PCIE_LAN_1 CLK_PCIE_LAN#_1 R198 1 0R0402-PAD 2 R199 1 0R0402-PAD 2 TP247 CLK_PCIE_NEW _1 CLK_PCIE_NEW #_1 CLK_SRC0T_LPRS 1 2 1 R353 0R2J-2-GP JTAG_TCK B CLK_SRC0C_LPRS 37 36 32 31 DY R217 1 0R0402-PAD 2 R216 1 0R0402-PAD 2 9 CLK_NBHT_CLK 9 CLK_NBHT_CLK# CLK_NBHT_CLK_1 CLK_NBHT_CLK#_1 54 53 1 CL=20pF±0.2pF 2 3 ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS 30 29 28 27 CLK_PCIE_PEG_1 R187 CLK_PCIE_PEG#_1R188 CLK_NB_GFX_1 R1891 CLK_NB_GFX#_1 R1901 CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4# 23 45 44 39 38 CLKREQ0# CPUKG0T_LPRS CPUKG0C_LPRS 50 49 CPU_CLK_1 CPU_CLK#_1 SRC0T_LPRS SRC0C_LPRS 48MHZ_0 SRC1T_LPRS SRC1C_LPRS SRC2T_LPRS REF0/SEL_HTT66 SRC2C_LPRS REF1/SEL_SATA SRC3T_LPRS REF2/SEL_27 SRC3C_LPRS SRC4T_LPRS SRC4C_LPRS SRC6T/SATAT_LPRS GNDSATA SRC6C/SATAC_LPRS GNDATIG SRC7T_LPRS/27MHZ_SS GND SRC7C_LPRS/27MHZ_NS GNDHTT GNDREF GNDCPU SB_SRC0T_LPRS GND48 SB_SRC0C_LPRS SB_SRC1T_LPRS GNDSRC SB_SRC1C_LPRS GNDSRC HTT0T_LPRS/66M HTT0C_LPRS/66M 64 CLK_48 59 58 57 REF0 REF1 REF2 SMBC0_SB 12,16,17 SMBD0_SB 12,16,17 1 0R0402-PAD 2 10R0402-PAD 2 0R0402-PAD 2 0R0402-PAD 2 TP153 TPAD14-GP LAN_CLKREQ# 26 TP159 TPAD14-GP W LAN_CLKREQ# 33 W LAN2_CLKREQ# 33 CLK_PCIE_PEG 55 CLK_PCIE_PEG# 55 CLK_NB_GFX 9 CLK_NB_GFX# 9 C CLKREQ# Internal pull Low -1 R222 1 0R0402-PAD 2 R220 1 0R0402-PAD 2 CPU_CLK CPU_CLK# R169 10R2J-2-GP 1 2 1 2 CLK48_5158E 32 SB EC50 DY 43 24 7 52 60 46 1 GNDSB_SRC 33 GND 65 6 6 CLK48_USB 12 R170 33R2J-2-GP 10 18 2 SC39P50V2JN-1GP CLK_SMBCLK R214 10R0402-PAD 2 CLK_SMBDAT R213 10R0402-PAD 2 CLKREQ2# 82.30005.891 2ND = 82.30005.951 SB DY EC49 SC22P50V2JN-4GP 33 CLK_PCIE_MINI2 33 CLK_PCIE_MINI2# R193 1 0R0402-PAD 2 R194 1 0R0402-PAD 2 22 21 20 19 15 14 13 12 9 8 42 41 6 5 GEN_XTAL_IN GEN_XTAL_OUT SC22P50V2JN-4GP 33 CLK_PCIE_MINI1 33 CLK_PCIE_MINI1# MINI1 CLK_PCIE_SB_1 CLK_PCIE_SB#_1 SMBCLK SMBDAT 61 62 2 48 47 X1 X2 1 VDDATIG VDDATIG_IO 2 26 25 1 VDD_REF 3D3V_48MPW R_S0 2 26 CLK_PCIE_LAN 26 CLK_PCIE_LAN# LAN 2 C509 PD# R191 1 0R0402-PAD 2 R192 1 0R0402-PAD 2 11 CLK_PCIE_SB 11 CLK_PCIE_SB# SB A-Link 1 X5 X-14D31818M-35GP U20 1 1 R238 2 0R0603-PAD C505 SC1U10V2KX-1GP 2 1D1V_CLK_VDDIO 3D3V_CLK_VDD C DY 10MR2J-L-GP 2 2 3D3V_CLK_VDD 1 1 1 C495 SCD1U10V2KX-4GP 2 C464 SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP 2 C472 1 C461 2 1 1 1 C454 SC10U6D3V3MX-GP SC10U6D3V3MX-GP 2 C460 2 1 C459 2 1 R218 for TR For SB710 RS740 RX780 1 3D3V_S5 3D3V_S0 2 33R2F-3-GP CLK_SB_14M 11 PD# RN70 R234 8 7 6 5 1 2 3 4 2 W LAN_CLKREQ# W LAN2_CLKREQ# RUNPW ROK_D RUNPW ROK_D DY 1 75R2F-2-GP 42 SEL_27 REF2 1 1 R228 10KR2J-3-GP SEL_SATA REF1 SEL_HTT66 REF0 27MHz non-spreading singled clock on pin 5 and 27MHz spread clock on pin 6 0* 100MHz differential spreading SRC clock 1 100MHz non-spreading differential SATA clock 0* 100MHz differential spreading SRC clock 2 2 1 66MHz 3.3V single ended HTT clock 0* 100MHz differential HTT clock 1 R223 10KR2J-3-GP 1 REF0 2 DY 1 R224 10KR2J-3-GP 1 R225 10KR2J-3-GP 2 2 A REF0 REF1 REF2 REFCLK_N 14M SE (3.3V) NC 14M SE (1.8V) NC 14M SE (1.1V) vref GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)* GPP_REFCLK NC 100M DIFF NC or 100M DIFF OUTPUT GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF * RS780 can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode. 2 2 2 R230 10KR2J-3-GP 1 R231 10KR2J-3-GP DY 100M DIFF 100M DIFF -1 SRN10KJ-6-GP DY 100M DIFF 100M DIFF REFCLK_P R229 REF1 2ND = 71.00880.A03 3D3V_S0 NC HT_REFCLKN ICS9LPRS480BKLFT-GP 71.09480.A03 CPU_CLK(200MHz) R232 150R2F-1-GP 1 CLK_NB_14M 9 1 R235 75R2F-2-GP JV50-TR8 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CLKGEN_ICS9LPRS480 A3 Date: 4 A Wistron Corporation OSC_14M_NB RS780M 1.1V 158R/90.9R Size 5 RS780 HT_REFCLKP 66M SE(SINGLE END) NB HT B NB CLOCK INPUT TABLE NB CLOCKS 3 2 Document Number Rev -1 JV50-TR8 W ednesday, November 04, 2009 Sheet 1 3 of 63 5 4 3 2 1 D D 1D2V_S0 B 1 DY 2 1 DY 1.5Amp C177 SC180P50V2JN-1GP C SC180P50V2JN-1GP DY 2 1 C174 2 1 C703 SCD22U6D3V2KX-1GP 2 1 C707 SCD22U6D3V2KX-1GP DY 2 1 C706 SC4D7U6D3V3MX-2GP 2 C704 SC4D7U6D3V3MX-2GP SC4D7U6D3V3MX-2GP 2 1 Place close to socket C705 ACPU1A D1 D2 D3 D4 VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3 HT LINK 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15 E3 E2 E1 F1 G3 G2 G1 H1 J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5 L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15 8 8 8 8 HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1 J3 J2 J5 K5 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1 HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1 N1 P1 P3 P4 8 8 8 8 VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3 AE2 AE3 AE4 AE5 L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15 AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3 HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5 HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7 HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15 L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 Y1 W1 Y4 Y3 HT_CPU_NB_CLK_H0 8 HT_CPU_NB_CLK_L0 8 HT_CPU_NB_CLK_H1 8 HT_CPU_NB_CLK_L1 8 L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1 R2 R3 T5 R5 HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 C 8 8 8 8 8 8 8 8 8 8 8 8 B 8 8 8 8 SKT-CPU638P,DANUB 62.10055.111 2ND = 62.10055.251 SKT-BGA638H176 JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CPU_HT_LINK I/F_(1/4) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 4 of 63 5 4 3 2 1 ACPU1C MEM:DATA Place near to CPU 1 DY 2 1 2 1 2 1 2 1 2 1 2 1 C252 SC180P50V2JN-1GP 2 1 C251 SC180P50V2JN-1GP 2 1 C256 DY SC180P50V2JN-1GP 0D9V_S3 C250 SC180P50V2JN-1GP DY C255 SC180P50V2JN-1GP 2 1 180P x 6 C249 SC180P50V2JN-1GP DY C254 SCD22U6D3V2KX-1GP 2 C258 SCD22U6D3V2KX-1GP 2 0.22u X 2 C263 SC4D7U6D3V3MX-2GP DY C737 SC4D7U6D3V3MX-2GP SC4D7U6D3V3MX-2GP SC4D7U6D3V3MX-2GP DY C736 2 1 C262 1 4.7u x 4 D 750 mA CLOSE TO CPU 1D8V_S3 ACPU1B MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1 16,18 MEM_MA0_CS#0 16,18 MEM_MA0_CS#1 T20 U19 U20 V20 MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1 16,18 MEM_MA_CKE0 16,18 MEM_MA_CKE1 J22 J20 MA_CKE0 MA_CKE1 MEMVREF W17 1 2 1 TP106TPAD14-GP MEM_RSVD_M2 1 TP112 RSVD_M2 B18 MB0_ODT0 MB0_ODT1 MB1_ODT0 W26 W23 Y26 MEM_MB0_ODT0 17,18 MEM_MB0_ODT1 17,18 MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 V26 W25 U22 MEM_MB0_CS#0 17,18 MEM_MB0_CS#1 17,18 MB_CKE0 MB_CKE1 J25 H26 MEM_MB_CKE0 17,18 MEM_MB_CKE1 17,18 MEM_MB_CLK0_P MEM_MB_CLK0_N MEM_MB_CLK1_P MEM_MB_CLK1_N MEM_MA_CLK0_P MEM_MA_CLK0_N MEM_MA_CLK1_P MEM_MA_CLK1_N MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4 MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4 P22 R22 A17 A18 AF18 AF17 R26 R25 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19 MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24 MEM_MB_ADD0 17,18 MEM_MB_ADD1 17,18 MEM_MB_ADD2 17,18 MEM_MB_ADD3 17,18 MEM_MB_ADD4 17,18 MEM_MB_ADD5 17,18 MEM_MB_ADD6 17,18 MEM_MB_ADD7 17,18 MEM_MB_ADD8 17,18 MEM_MB_ADD9 17,18 MEM_MB_ADD10 17,18 MEM_MB_ADD11 17,18 MEM_MB_ADD12 17,18 MEM_MB_ADD13 17,18 MEM_MB_ADD14 17,18 MEM_MB_ADD15 17,18 16,18 MEM_MA_BANK0 16,18 MEM_MA_BANK1 16,18 MEM_MA_BANK2 R20 R23 J21 MA_BANK0 MA_BANK1 MA_BANK2 MB_BANK0 MB_BANK1 MB_BANK2 R24 U26 J26 MEM_MB_BANK0 17,18 MEM_MB_BANK1 17,18 MEM_MB_BANK2 17,18 16,18 MEM_MA_RAS# 16,18 MEM_MA_CAS# 16,18 MEM_MA_W E# R19 T22 T24 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L U25 U24 U23 MEM_MB_RAS# 17,18 MEM_MB_CAS# 17,18 MEM_MB_W E# 17,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 16,18 RN48 1 2 N19 N20 E16 F16 Y16 AA16 P19 P20 16 16 16 16 VREF_DDR_CLAW C391 C388 SCD1U10V2KX-4GP T19 V22 U21 V19 Y10 VTT_SENSE SC1KP50V2KX-1GP RSVD_M1 VTT_SENSE 4 3 SRN1KJ-7-GP 1 MEM_RSVD_M1 MEMZP MEMZN C397 SCD1U10V2KX-4GP 2 1 AF10 AE10 H16 16,18 MEM_MA0_ODT0 16,18 MEM_MA0_ODT1 B MEMZP MEMZN MEM:CMD/CTRL/CLK VTT5 VTT6 VTT7 VTT8 VTT9 1 1D8V_S3 VTT1 VTT2 VTT3 VTT4 W10 AC10 AB10 AA10 A10 2 C R381 39D2R2F-L-GP 1 2 1 2 R383 39D2R2F-L-GPTP111 D10 C10 B10 AD10 17 17 17 17 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12 MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 16 16 16 16 16 16 16 16 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 E12 C15 E19 F24 AC24 Y19 AB16 Y13 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 MEM_MA_DQS0_P MEM_MA_DQS0_N MEM_MA_DQS1_P MEM_MA_DQS1_N MEM_MA_DQS2_P MEM_MA_DQS2_N MEM_MA_DQS3_P MEM_MA_DQS3_N MEM_MA_DQS4_P MEM_MA_DQS4_N MEM_MA_DQS5_P MEM_MA_DQS5_N MEM_MA_DQS6_P MEM_MA_DQS6_N MEM_MA_DQS7_P MEM_MA_DQS7_N G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11 MEM_MB_DATA0 17 MEM_MB_DATA1 17 MEM_MB_DATA2 17 MEM_MB_DATA3 17 MEM_MB_DATA4 17 MEM_MB_DATA5 17 MEM_MB_DATA6 17 MEM_MB_DATA7 17 MEM_MB_DATA8 17 MEM_MB_DATA9 17 MEM_MB_DATA10 17 MEM_MB_DATA11 17 MEM_MB_DATA12 17 MEM_MB_DATA13 17 MEM_MB_DATA14 17 MEM_MB_DATA15 17 MEM_MB_DATA16 17 MEM_MB_DATA17 17 MEM_MB_DATA18 17 MEM_MB_DATA19 17 MEM_MB_DATA20 17 MEM_MB_DATA21 17 MEM_MB_DATA22 17 MEM_MB_DATA23 17 MEM_MB_DATA24 17 MEM_MB_DATA25 17 MEM_MB_DATA26 17 MEM_MB_DATA27 17 MEM_MB_DATA28 17 MEM_MB_DATA29 17 MEM_MB_DATA30 17 MEM_MB_DATA31 17 MEM_MB_DATA32 17 MEM_MB_DATA33 17 MEM_MB_DATA34 17 MEM_MB_DATA35 17 MEM_MB_DATA36 17 MEM_MB_DATA37 17 MEM_MB_DATA38 17 MEM_MB_DATA39 17 MEM_MB_DATA40 17 MEM_MB_DATA41 17 MEM_MB_DATA42 17 MEM_MB_DATA43 17 MEM_MB_DATA44 17 MEM_MB_DATA45 17 MEM_MB_DATA46 17 MEM_MB_DATA47 17 MEM_MB_DATA48 17 MEM_MB_DATA49 17 MEM_MB_DATA50 17 MEM_MB_DATA51 17 MEM_MB_DATA52 17 MEM_MB_DATA53 17 MEM_MB_DATA54 17 MEM_MB_DATA55 17 MEM_MB_DATA56 17 MEM_MB_DATA57 17 MEM_MB_DATA58 17 MEM_MB_DATA59 17 MEM_MB_DATA60 17 MEM_MB_DATA61 17 MEM_MB_DATA62 17 MEM_MB_DATA63 17 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 A12 B16 A22 E25 AB26 AE22 AC16 AD12 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12 MEM_MB_DQS0_P MEM_MB_DQS0_N MEM_MB_DQS1_P MEM_MB_DQS1_N MEM_MB_DQS2_P MEM_MB_DQS2_N MEM_MB_DQS3_P MEM_MB_DQS3_N MEM_MB_DQS4_P MEM_MB_DQS4_N MEM_MB_DQS5_P MEM_MB_DQS5_N MEM_MB_DQS6_P MEM_MB_DQS6_N MEM_MB_DQS7_P MEM_MB_DQS7_N 17 17 17 17 17 17 17 17 D C B 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 SKT-CPU638P,DANUB SKT-CPU638P,DANUB 62.10055.111 A JV50-TR8 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CPU_DDR_(2/4) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 5 of 63 5 4 3 2 1 The Processor has reached a preset maximum operating temperature. 100℃ I=Active HTC O=FAN 8 7 6 5 1D8V_S0 2D5V_S0 2D5V_VDDA_S0 For HDT DBG 1 2 R74 0R0402-PAD 1D2V_S0 1D8V_S3 1 R617 2CPU_TEST25_L 510R2J-1-GP DY 1 TPAD14-GP TPAD14-GP TPAD14-GP TP93 2CPU_TEST25_H 510R2J-1-GP TP105 TP103 TP104 TP97 TP94 1 1 8 7 6 5 1 R81 1 LDT_PW ROK_G 1 2 3 4 DY LDT_PW ROK VDD1_FB_H VDD1_FB_L VDDNB_FB_H VDDNB_FB_L H6 G6 TDO TEST9 TEST6 A3 A5 B3 B5 C1 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 2 1 2 3 4 2 2 45 45 LAYOUT: Route FBCLKOUT_H/L differentially impedance 80 E10 CPU_DBREQ# AE9 CPU_TDO TP92 TP98 TEST17 TEST16 TEST15 TEST14 D7 E7 F7 C7 CPU_TEST17 CPU_TEST16 CPU_TEST15 CPU_TEST14 TP89 TP90 TP91 TP88 TEST7 TEST10 C3 K8 CPU_TEST10 TEST8 C4 TEST29_H TEST29_L C9 C8 1 1 1 1 1D2V_S0 DY R610 300R2J-4-GP CPU_TEST29H CPU_TEST29L 1 1 TP101 TP102 B H18 H19 AA7 D5 C5 HDT Connectors HDT1 CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO 2 1 2 LDT_PW ROK_R R1314 0R2J-2-GP 1 Q24 MMBT3904-4-GP 1 R613 300R2J-4-GP DY 1D8V_S3 DY 3 5 7 9 11 13 15 17 19 21 23 2 DY 4 6 8 10 12 14 16 18 20 22 24 26 SMC-CONN26A-FP HDT_RST# 2 DY JV50-TR8 A 1 B LDT_PW ROK_R R611 300R2J-4-GP DY 1 1 R612 300R2J-4-GP C723 SC1U10V3KX-3GP CPU_TEST22 1 2 CPU_TEST19 2 CPU_TEST18 LDT_PW ROK_R R1312 17K8R2F-GP Wistron Corporation R1313 20KR2F-L-GP THERMTRIP# E C 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. RSMRST# 35,36 2 84.T3904.C11 2ND = 84.03904.L06 Title CPU exceeds to 125℃ Size A3 Date: 5 1 8 7 6 5 1 1 1 CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L CPU_TEST28_H 1 CPU_TEST28_L 1 RSVD10 RSVD9 RSVD8 RSVD7 RSVD6 DY 2 C TP99 TP100 1 PLT_RST1# A 1 1 J7 H8 TEST21 TEST20 TEST24 TEST22 TEST12 TEST27 C2 AA6 CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L TEST28_H TEST28_L TEST25_H TEST25_L PROCHOT#_SB 11 H_THERMDC 35 H_THERMDA 35 2 C213SC3300P50V2KX-1GP -1_20091021 Near CPU PIN 9,11,26,33,36,55 1 DY DBREQ_L 1 R67 2 0R0402-PAD SKT-CPU638P,DANUB DY LDT_PW ROK 1 R375 2 0R0402-PAD CPU_TEST9 45 45 THERMTRIP# PROCHOT# CPU_MEMHOT# 2 Q8 C E MMBT3904-4-GP C205 SCD1U16V2ZY-2GP CPU_PW RGD_SVID_REG 1 1 R77 2 0R0402-PAD RN42 SRN300J-1-GP W9 Y9 E9 E8 CPU_SVC CPU_SVD internal pull high 300 ohm VDDIO_FB_H VDDIO_FB_L 1CPU_TEST25_H 1CPU_TEST25_L AB8 AF7 AE7 AE8 AC8 AF8 AF6 AC7 AA8 VDD0_FB_H VDD0_FB_L TEST18 TEST19 R366 300R2J-4-GP DY RN84 SRN300J-1-GP CPU_DBREQ# THERMTRIP_L PROCHOT_L MEMHOT_L W7 W8 TEST23 R1203 1KR2J-1-GP A6 A4 THERMDC THERMDA H10 G9 CPU_TEST21 CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12 CPU_TEST27 M11 W18 HT_REF0 HT_REF1 CPU_TEST18 CPU_TEST19 1 B 2 1 45 CPU_PW RGD_SVID_REG TP95 TP187 DY 2K2R2J-2-GP 2 DY SIC SID ALERT_L AD7 1D8V_S3 R101 10KR2J-3-GP AF4 AF5 AE6 CPU_TEST23 CPU_TEST21 CPU_TEST20 1 SVC SVD RESET_L PWROK LDTSTOP_L LDTREQ_L DBRDY TMS TCK TRST_L TDI 1 2CPU_TEST25_L 510R2J-1-GP KEY1 KEY2 B7 A7 F10 C6 G10 AA9 AC9 AD9 AF9 1 R615 B CLKIN_H CLKIN_L R104 10R0402-PAD 2CPU_VDD1_RUN_FB_H_RY6 R105 10R0402-PAD 2CPU_VDD1_RUN_FB_L_R AB6 R614 3D3V_S0 A9 A8 45 CPU_VDD1_RUN_FB_H 45 CPU_VDD1_RUN_FB_L CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI 1 VDDA1 VDDA2 45 CPU_VDD0_RUN_FB_H 45 CPU_VDD0_RUN_FB_L 1D8V_S3 for TR 2 2 1 CPU_SIC 1 CPU_SID 1CPU_ALERT# TP186 TP185 TP87 F8 F9 DY 2 1 1 LDT_PW ROK LDT_STP#_CPU CPU_LDT_REQ#_CPU R1204 CPU_HTREF0 R6 1 2 R84 1 2 44D2R2F-GP CPU_HTREF1 P6 R83 44D2R2F-GP R110 10R0402-PAD 2CPU_VDD0_RUN_FB_H_RF6 R108 10R0402-PAD 2CPU_VDD0_RUN_FB_L_R E6 DY 1 R616 2CPU_TEST25_H 510R2J-1-GP CLKCPU_IN CLKCPU#_IN R1205 ACPU1D 1D8V_S3 2 CPU_SIC C 1 1 2 R386 169R2F-GP 2 2SC3900P50V2KX-2GP SC3900P50V2KX-2GP 1 C7341 C732 LDT_RST#_CPU HDT_RST# 2 2 1 R364 390R2J-1-GP CPU_CLK CPU_CLK# 1D8V_S3 1 2 3 3 DY 1KR2J-1-GP Cloce To CPU 1D8V_S0 C264 1KR2J-1-GP 1D8V_S3 C752 DY SCD22U16V3ZY-GP for TR C227 SC10U10V5ZY-1GP DY C745 DY SC3300P50V2KX-1GP 11 CPU_LDT_STOP# 9 ALLOW _LDTSTOP D C739 SC10U10V5ZY-1GP 11,52 CPU_PW RGD 1 R401 2 0R0603-PAD SC4D7U10V5ZY-3GP 1 R78 2 LDT_RST#_CPU 9 0R0402-PAD LDT_PW ROK 1 R86 2 0R0402-PAD 1 R79 2 LDT_STP#_CPU 9 0R0402-PAD CPU_LDT_REQ#_CPU 1 2 R72 0R2J-2-GP 11,52 CPU_LDT_RST# LYAOUT:ROUTE VDDA TRACE APPROX. 50mils WIDE(USE 2X25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG. IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491 2 1 2 3 4 -1 D 2 C196 SC100P50V2JN-3GP 1 1DY RN40 SRN300J-1-GP 4 3 2 CPU_Control&Debug_(3/4) Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 6 of 63 5 4 1 1 1 1 1 2 2 2 2 2 2 1 2 2 2 2 2 2 1 1 1 1 1 2 1 2 1 1 2 1 1 1 1 2 2 1 2 2 1 1 1 1 2 2 2 1 2 1 2 2 1 C DY SC4D7U6D3V3KX-GP -1 DY SC4D7U6D3V3KX-GP 1 DY SC4D7U6D3V3KX-GP 1 DY SC4D7U6D3V3MX-2GP 1 DY SCD22U6D3V2KX-1GP 2 2 2 DY 2 DY 2 DY SC10U6D3V5KX-1GP C392 C398 C381 C356 C372 C349 DY DY SCD22U6D3V2KX-1GP SKT-CPU638P,DANUB DY SCD22U6D3V2KX-1GP Bottom Side Decoupling C351 C362 C385 C379 C375 C365 C358 C361 C347 C363 C378 SCD22U6D3V2KX-1GP 3A for VDDIO 1D8V_S3 3A for VDDIO 1D8V_S3 Place near to CPU SCD01U50V2KX-1GP VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18 DY SCD01U50V2KX-1GP H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 DY VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13 DY SC180P50V2JN-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 D C193 C154 C308 C280 C253 C293 C312 SC10U6D3V5KX-1GP C808 Bottom Side Decoupling SC10U6D3V5KX-1GP C324 K16 M16 P16 T16 V16 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2 SC10U6D3V5KX-1GP 3A for VDDNB VCC_CORE_S0_1 VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26 SCD22U6D3V2KX-1GP SC180P50V2JN-1GP SCD01U50V2KX-1GP SCD22U6D3V2KX-1GP C316 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP VDDNB add 0.1U VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23 SCD01U50V2KX-1GP 2 DY G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 N7 N9 N11 SC180P50V2JN-1GP 2 DY 1 1 1 1 1 C239 C281 C286 C295 C206 C244 C315 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP SC180P50V2JN-1GP SC180P50V2JN-1GP B ACPU1E Bottom Side Decoupling SC10U6D3V5KX-1GP C J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 1 36A for VDD0&VDD1 VCC_CORE_S0_0 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 2 D VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 2 2 ACPU1F AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 3 B SKT-CPU638P,DANUB JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 CPU_Power_(4/4) Document Number Rev -1 JV50-TR8 Monday, October 05, 2009 Sheet 1 7 of 63 5 4 3 2 1 ANB1A C HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22 HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15 4 4 4 4 HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N H24 H25 L21 L20 HT_NB_CPU_CLK_H0 4 HT_NB_CPU_CLK_L0 4 HT_NB_CPU_CLK_H1 4 HT_NB_CPU_CLK_L1 4 HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N M24 M25 P19 R18 HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1 HT_RXCALP HT_RXCALN HT_TXCALP HT_TXCALN B24 B25 GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2 GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2 SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5 PCE_CALRP PCE_CALRN AC8 AB8 HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5 HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15 AC24 AC25 AB25 AB24 AA24 AA25 Y22 Y23 W21 W20 V21 V20 U20 U21 U19 U18 HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N 4 4 4 4 HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1 T22 T23 AB23 AA22 HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N 4 4 4 4 HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1 M22 M23 R21 R20 C23 A24 2 R344 301R2F-GP 1 HT_RXCALP HT_RXCALN Place < 100mils from pin C23 and A24 HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N PART 1 OF 6 HYPER TRANSPORT CPU I/F D Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 HT_TXCALP HT_TXCALN 4 4 4 4 D 4 4 4 4 4 4 4 4 4 4 4 4 C Placement: close RS780 2 R343 301R2F-GP 1 Place < 100mils from pin B25 and B24 RS780M-GP-U2 Placement: close RS780 ANB1B 55 PEG_RXP[15..0] B 26 26 33 33 33 33 34 34 LAN MINICARD1 MINICARD2 NEW CARD TPAD14-GP TPAD14-GP A A-LINK 11 11 11 11 11 11 11 11 D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6 J6 J5 J7 J8 L5 L6 M8 L8 P7 M7 P5 M5 R8 P8 R6 R5 P4 P3 T4 T3 GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N GPP_RX5P GPP_RX5N AE3 AD4 AE2 AD3 AD1 AD2 V5 W6 U5 U6 U8 U7 GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N AA8 Y8 AA7 Y7 AA5 AA6 W5 Y5 SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N PCIE_RXP1 PCIE_RXN1 PCIE_RXP2 PCIE_RXN2 PCIE_RXP3 PCIE_RXN3 PCIE_RXP5 PCIE_RXN5 TP21 TP20 ALINK_NBRX_SBTX_P0 ALINK_NBRX_SBTX_N0 ALINK_NBRX_SBTX_P1 ALINK_NBRX_SBTX_N1 ALINK_NBRX_SBTX_P2 ALINK_NBRX_SBTX_N2 ALINK_NBRX_SBTX_P3 ALINK_NBRX_SBTX_N3 PART 2 OF 6 PCIE I/F GFX 55 PEG_RXN[15..0] PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15 PCIE I/F GPP PCIE I/F SB RS780M-GP-U2 GTXP0 GTXN0 GTXP1 GTXN1 GTXP2 GTXN2 GTXP3 GTXN3 GTXP4 GTXN4 GTXP5 GTXN5 GTXP6 GTXN6 GTXP7 GTXN7 GTXP8 GTXN8 GTXP9 GTXN9 GTXP10 GTXN10 GTXP11 GTXN11 GTXP12 GTXN12 GTXP13 GTXN13 GTXP14 GTXN14 GTXP15 GTXN15 DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 TXP0 TXN0 TXP1 TXN1 TXP3 TXN3 TXP5 TXN5 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C617 C616 C592 C593 C614 C615 C591 C590 C613 C612 C589 C588 C611 C610 C587 C586 C609 C608 C585 C584 C607 C606 C583 C582 C605 C604 C581 C580 C602 C603 C579 C578 C621 C622 C597 C596 C599 C598 C600 C601 1 1 1 1 1 1 1 1 SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP 2 2 2 2 2 2 2 2 SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP GPP_TX5P GPP_TX5N TP16 TP17 ALINK_NBTX_SBRX_P0 ALINK_NBTX_SBRX_N0 ALINK_NBTX_SBRX_P1 ALINK_NBTX_SBRX_N1 ALINK_NBTX_SBRX_P2 ALINK_NBTX_SBRX_N2 ALINK_NBTX_SBRX_P3 ALINK_NBTX_SBRX_N3 PCE_PCAL PCE_NCAL C642 C640 C632 C637 C627 C629 C624 C625 1 R315 1 R16 1 1 1 1 1 1 1 1 PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15 2 2 2 2 2 2 2 2 RS780M Display Port Support(muxed on GFX) DP0 GFX_TX0,TX1,TX2,TX3,AUX0,HPD0 DP1 GFX_TX4,TX5,TX6,TX7,AUX1,HPD1 GTXP0 GTXN0 GTXP1 GTXN1 GTXP2 GTXN2 GTXP3 GTXN3 for TR PCIE_TXP1 PCIE_TXN1 PCIE_TXP2 PCIE_TXN2 PCIE_TXP3 PCIE_TXN3 PCIE_TXP5 PCIE_TXN5 UMA UMA UMA UMA UMA UMA UMA UMA 4 ALINK_NBTX_C_SBRX_P0 ALINK_NBTX_C_SBRX_N0 ALINK_NBTX_C_SBRX_P1 ALINK_NBTX_C_SBRX_N1 ALINK_NBTX_C_SBRX_P2 ALINK_NBTX_C_SBRX_N2 ALINK_NBTX_C_SBRX_P3 ALINK_NBTX_C_SBRX_N3 2 2 2 2 2 2 2 2 SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP HDMI_DATA2+ 21 HDMI_DATA2- 21 HDMI_DATA1+ 21 HDMI_DATA1- 21 HDMI_DATA0+ 21 HDMI_DATA0- 21 HDMI_CLK+ 21 HDMI_CLK- 21 B MINICARD2 NEW CARD 11 11 11 11 11 11 11 11 JV50-TR8 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 2 A Wistron Corporation 1D1V_S0 Place < 100mils from pin AC8 and AB8 3 1 1 1 1 1 1 1 1 LAN MINICARD1 26 26 33 33 33 33 34 34 Date: 5 C30 C29 C27 C26 C25 C22 C21 C19 TPAD14-GP TPAD14-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP 2 2 1K27R2F-L-GP 2KR2F-3-GP PEG_TXP[15..0] 55 PEG_TXN[15..0] 55 ATi-RS880M_HT LINK&PCIe(1/3) Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 8 of 63 4 3 2 2 1D8V_S0 1ST 68.00217.711 2ND = 68.00119.111 1 RN11 1 2 4 3 SRN1KJ-7-GP TPAD14-GP TPAD14-GP SB TP180 TP181 2 L1 VDDA18PCIEPLL 1 SBK160808T-221Y-N-GP 2 C41 SC1U10V2KX-1GP REFCLK_P/OSCIN REFCLK_N T2 T1 GFX_REFCLKP GFX_REFCLKN CLK_NBGPP_CLK CLK_NBGPP_CLK# U1 U2 GPP_REFCLKP GPP_REFCLKN STRP_DATA V4 V3 GPPSB_REFCLKP GPPSB_REFCLKN B9 A9 B8 A8 B7 A7 I2C_CLK I2C_DATA DDC_CLK0/AUX0P DDC_DATA0/AUX0N DDC_CLK1/AUX1P DDC_DATA1/AUX1N B10 STRP_DATA G11 RESERVED GPIO MODE VCC_NB 0 *1 RS780_AUX_CAL 1.1V 1.0V B18 A18 A17 B17 D20 D21 D18 D19 GMCH_TXBOUT0+ GMCH_TXBOUT0GMCH_TXBOUT1+ GMCH_TXBOUT1GMCH_TXBOUT2+ GMCH_TXBOUT2- 19 19 19 19 19 19 TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN B16 A16 D16 D17 GMCH_TXACLK+ GMCH_TXACLKGMCH_TXBCLK+ GMCH_TXBCLK- 19 19 19 19 C 1D8V_S0 VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2 A15 B15 A14 B14 VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7 C14 D15 C16 C18 C20 E20 C22 LVDS_DIGON LVDS_BLON LVDS_ENA_BL 1D8V_S0_VDDLP18 C649 SC1U10V2KX-1GP 1 2 SBK160808T-221Y-N-GP 1 A13 B13 1 VDDLTP18 VSSLTP18 DY 1D8V_S0_VDDLT18 C652 SC4D7U6D3V3MX-2GP 1 E11 F11 VDDA18HTPLL CLK_NB_GFX CLK_NB_GFX# DDC_DATA0/AUX0N DDC_CLK0/AUX0P GMCH_HDMI_CLK GMCH_HDMI_DATA TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N C648 SCD1U10V2KX-4GP L35 1 2 PBY201209T-221Y-N-GP 1ST 68.00217.711 2ND = 68.00119.111 68.00206.121 2ND = 68.00216.161 DY C653 2 HT_REFCLKP HT_REFCLKN C42 DY SCD1U10V2KX-4GP STRP_DATA 1ST 68.00217.711 2ND = 68.00119.111 C25 C24 NB_REFCLK_N 19 19 19 19 19 19 SCD1U10V2KX-4GP -1 E9 GMCH_BL_ON F7 G12 LVDS_ENA_BL GMCH_LCDVDD_ON GMCH_BL_ON 36 TP26 TPAD14-GP RN10 2 1 19 3 4 B SRN4K7J-8-GP R31 1 2 UMA 4K7R2J-2-GP TMDS_HPD HPD D9 D10 NB_DVI_HPD SUS_STAT# D12 SUS_STAT# THERMALDIODE_P THERMALDIODE_N AE8 AD8 MIS. DDC_DATA0/AUX0N DDC_CLK0/AUX0P TESTMODE HDMI_DETECT# 21 TP24 TPAD14-GP 2 R29 RS780_DXP3_1 RS780_DXN3_1 C8 1 10KR2J-3-GP 3D3V_S0 TP23 TP22 TPAD14-GP TPAD14-GP D13 TESTMODE_NB AUX_CAL R347 1K8R2F-GP 1 R294 150R2F-1-GP RS780M-GP-U2 2 2 2 220ohm 200mA 1 1 TP188 TP239 PLLVDD PLLVDD18 PLLVSS SYSRESET# POWERGOOD LDTSTOP# ALLOW_LDTSTOP 2 1D8V_S0 TPAD14-GP TPAD14-GP 21 GMCH_HDMI_CLK 21 GMCH_HDMI_DATA DAC_RSET A12 D14 B12 D8 A10 C10 C12 3 CLK_NB_GPPSB 3 CLK_NB_GPPSB# 19 CLK_DDC_EDID 19 DAT_DDC_EDID G14 VDDA18PCIEPLL1 VDDA18PCIEPLL2 CLK_NB_14M GMCH_TXAOUT0+ GMCH_TXAOUT0GMCH_TXAOUT1+ GMCH_TXAOUT1GMCH_TXAOUT2+ GMCH_TXAOUT2- L34 D7 E7 NB_LDT_STOP# NB_ALLOW _LDTSTOP 3 CLK_NB_GFX 3 CLK_NB_GFX# DAC_HSYNC DAC_VSYNC DAC_SCL DAC_SDA A22 B22 A21 B21 B20 A20 A19 B19 2 2 3 A11 B11 F8 E8 H17 3 CLK_NBHT_CLK 3 CLK_NBHT_CLK# 1D1V_S0 ENABLE External CLK GEN C97 SCD1U10V2KX-4GP 12,42 NB_PW RGD SCD1U10V2KX-4GP 11 NB_ALLOW _LDTSTOP RED REDb GREEN GREENb BLUE BLUEb VDDA18PCIEPLL SYSREST# C77 G18 G17 E18 F18 E19 F19 VDDA18HTPLL 2 2 1 1 DY 2 C78 CRT 2 C82 SC47U6D3V5MX-1-GP C_Pr Y COMP_Pb TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N 2 1 1 2 1ST 68.00217.711 2ND = 68.00119.111 1 1 C643 DY SCD1U10V2KX-4GP CRT 1 2 SBK160808T-221Y-N-GP 2 1D8V_S0_PLVDD18 E17 F17 F15 PART 3 OF 6 1 1 2 C86 DY SC1U10V2KX-1GP R33 2DAC_RSET 1 715R2F-GP 1D1V_S0_PLLVDD SC1U10V2KX-1GP ST100U6D3VBML1GP VDDA18HTPLL SBK160808T-221Y-N-GP L4 UMA-->L4-->2R 0603 C82-->47U/6.3V DIS-->L4-->Bead C82-->DY L5 220ohm 200mA 220ohm 200mA C644 SC1U10V2KX-1GP TC1 1ST 68.00217.711 2ND = 68.00119.111 L33 1ST 68.00217.711 2ND = 68.00119.111 1 2 SBK160808T-221Y-N-GP 220ohm 200mA 80.10715.L04 2ND = 77.C1071.081 2 1D1V_S0 DY 1D8V_S0 1 20 GMCH_HSYNC 20 GMCH_VSYNC 20 GMCH_DDCCLK 20 GMCH_DDCDATA AVDD1 AVDD2 AVDDDI AVSSDI AVDDQ AVSSQ 1 2 NB_LDT_STOP# 1 R14 2 0R0402-PAD R24 1 2 NB_ALLOW _LDTSTOP 0R2J-2-GP for TR 1D8V_S0 GMCH_BLUE 1KR2F-3-GP R69 BOM Option B 20 for TR SB R609 2 6 ALLOW _LDTSTOP GMCH_RED 20 GMCH_GREEN 1D8V_S0 -1 6 LDT_STP#_CPU 2 20 1 C 1D8V_S0_AVDDQ F12 E12 F14 G15 H15 H14 2 1 1 2 R38 140R2F-GP 150R2F-1-GP 150R2F-1-GP 2 1 GMCH_RED R37 C99 SCD1U10V2KX-4GP CRT/TVOUT GMCH_GREEN DY D Selects Loading of STRAPS From EEPROM the loading of EEPROM straps and use Hardware Default Values *10 :: Bypass I2C Master can load strap values from EEPROM if connected, or use default values if not connected ANB1C 1 2 R43 SBK160808T-221Y-N-GP C80 220ohm 200mA SC1U10V2KX-1GP 2 ST100U6D3VBM-5GP GMCH_BLUE R36 1 TC2 Close to NB ball 0 : Enable SUS_STAT# C89 SCD1U10V2KX-4GP PLL PWR LVTM 1D8V_S0 :Disable 1D8V_S0_AVDDDI CLOCKs PM C37 SC220P50V2KX-3GP 1 2 -1 *1 GMCH_VSYNC GMCH_HSYNC R41 2 1 0R0603-PAD C88 SC1U10V2KX-1GP 1 SYSREST# 1 2 2 PLT_RST1# Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#) :Disable 0 : Enable *1 R562 3K3R3J-L-GP RS780: Enables Side port memory ( RS780 use HSYNC#) 2 DY 1 R17 2 0R0402-PAD 1 D 11,26,33,36,55 R563 3K3R3J-L-GP 0R2J-2-GP 1 6 LDT_RST#_CPU C70 DYSCD1U10V2KX-4GP 2 C71 SC1U10V2KX-1GP STRAP_DEBUG_BUS_GPIO_ENABLEb 3D3V_S0_AVDD 1 1 1ST 68.00217.711 2ND = 68.00119.111 R21 1 1 3D3V_S0 220ohm 200mA 1 L3 1 2 SBK160808T-221Y-N-GP 1 3D3V_S0 2 2 5 1 3D3V_S0 R19 A 1 R576 2 DY 2K2R2J-2-GP 2 LVDS_ENA_BL 0R2J-2-GP JV50-TR8 STRP_DATA Wistron Corporation GMCH_BL_ON 36,56 BLON_IN 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 19,56 BRIGHTNESS_AMD 1 R578 2 Title 0R2J-2-GP UMA for TR Size A3 Date: 5 A UMA 4 3 2 ATi-RS880M_LVDS&CRT_(2/3) Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 9 of 63 5 4 3 2 1 ANB1F 1 1 C85 C76 2 1 C46 2 DY 2 C79 2 DY 2 2 1 1 1 1 2 2 C60 3D3V_S0 +3.3V_RUN_VDD33 1 C66 SCD1U10V2KX-4GP VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27 L12 M14 N13 P12 P15 R11 R14 T12 U14 U11 U15 V12 W11 W15 AC12 AA14 Y18 AB11 AB15 AB17 AB19 AE20 AB21 K11 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 1 R30 2 0R0603-PAD DY PART 6/6 GROUND 1 2 2 2 2 1 1 1 1 2 1 1 2 C90 1 R316 2 0R0603-PAD 1 2 C74 DY A25 D23 E22 G22 G24 G25 H19 J22 L17 L22 L24 L25 M20 N22 P20 R19 R22 R24 R25 H20 U22 V19 W22 W24 W25 Y21 AD25 VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8 VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2 D C AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15 RS780M-GP-U2 C65 SCD1U10V2KX-4GP 2 1 1 2 1 2 1 AE10 AA11 Y11 AD10 AB10 AC10 2 1 2 2 2 2 1 2 1 1 1 2 1 1 2 2 1 2 POWER 1 2 1 2 1 2 2 1 1 2 1 2 C36 VDD_MEM RS780M-GP-U2 SC1U10V2KX-1GP 2 1 C52 DY SC10U6D3V3MX-GP 2 1D1V_S0 RS780M: 1V ~ 1.1V, check PWR team K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16 H11 H12 +NB_VCORE Per check list (Rev 0.02) SC10U6D3V3MX-GP VDD33_1 VDD33_2 10A per ANT Rev1.1, Page3 SCD1U10V2KX-4GP C651 VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2 C40 SC4D7U6D3V3MX-2GP -1 SCD1U10V2KX-4GP F9 G9 AE11 AD11 +1.8V_RUN_VDD18_MEM VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6 C68 SCD1U10V2KX-4GP DY 1103 C55 DY SC1U10V2KX-1GP C47 C49 SCD1U10V2KX-4GP C61 SCD1U10V2KX-4GP SC1U10V2KX-1GP 1 R320 2 0R0603-PAD DY VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15 C83 DY SC1U10V2KX-1GP J10 P10 K10 M10 L10 W9 H9 T10 R10 Y9 AA9 AB9 AD9 AE9 U10 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 300mil Width A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9 SCD1U10V2KX-4GP C57 VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13 VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8 VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17 SCD1U10V2KX-4GP SCD1U10V2KX-4GP C59 C53 SCD1U10V2KX-4GP -1 C62 C101 DY VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7 AE25 AD24 AC23 AB22 AA21 Y20 W19 V18 U17 T17 R17 P17 M17 +1.8V_RUN_VDDA18PCIE SCD1U10V2KX-4GP DY SCD1U10V2KX-4GP 1D8V_S0 C63 SC4D7U6D3V3MX-2GP 68.00206.121 2ND = 68.00216.161 SC4D7U6D3V3KX-GP 220 ohm @ 100MHz,2A 80mil Width SCD1U10V2KX-4GP 1 2 PBY201209T-221Y-N-GP DY SCD1U10V2KX-4GP L2 SCD1U10V2KX-4GP 1D8V_S0 C +1.2V_RUN_VDDHTTX C104 C95 C111 SC4D7U6D3V3MX-2GP 68.00206.121 2ND = 68.00216.161 DY H18 G19 F20 E21 D22 B23 A23 PART 5/6 SCD1U10V2KX-4GP C673 220 ohm @ 100MHz,2A SCD1U10V2KX-4GP -1 DY SCD1U10V2KX-4GP 1D2V_S0 SCD1U10V2KX-4GP SC4D7U6D3V3MX-2GP 68.00206.121 2ND = 68.00216.161 L38 1 2 PBY201209T-221Y-N-GP +1.1V_RUN_VDDHTRX C674 C106 C102 C677 220 ohm @ 100MHz,2A VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7 SCD1U10V2KX-4GP -1 0.45A per ANT Rev1.1, Page3 J17 K16 L16 M16 P16 R16 T16 SCD1U10V2KX-4GP L40 1 2 PBY201209T-221Y-N-GP DY 1D1V_S0 ANB1E SCD1U10V2KX-4GP 1D1V_S0 DY +1.1V_RUN_VDDHT C659 C94 SCD1U10V2KX-4GP 68.00206.121 2ND = 68.00216.161 C91 SCD1U10V2KX-4GP 220 ohm @ 100MHz,2A SC4D7U6D3V3MX-2GP 1 C655 1 L36 1 2 PBY201209T-221Y-N-GP D 0.6A per ANT Rev1.1, Page3 -1 2 1D1V_S0 B B ANB1D AB12 AE16 V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14 Y14 MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 AD16 AE17 AD17 MEM_BA0 MEM_BA1 MEM_BA2 W12 Y12 AD18 AB13 AB18 V14 MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT V15 W14 MEM_CKP MEM_CKN SBD_MEM/DVO_I/F PAR 4 OF 6 MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC MEM_DQ2/DVO_DE MEM_DQ3/DVO_D0 MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5 MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7 MEM_DQ12 MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11 AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21 MEM_DQS0P/DVO_IDCKP MEM_DQS0N/DVO_IDCKN MEM_DQS1P MEM_DQS1N Y17 W18 AD20 AE21 MEM_DM0 MEM_DM1/DVO_D8 W17 AE19 IOPLLVDD18 IOPLLVDD AE23 AE24 IOPLLVSS AD23 Wistron Corporation MEM_VREF AE18 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. A AE12 AD12 MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions MEM_COMPP MEM_COMPN 1D8V_S0 1 R339 2 0R0402-PAD +1.8V_IOPLLVDD18 1D1V_S0 1 R341 2 0R0402-PAD JV50-TR8 +1.1V_IOPLLVDD A RS780M-GP-U2 Title ATi-RS880M_Side Port&PWR&GND(3/3) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 05, 2009 Sheet 1 10 of 63 5 4 3 2 1 ASB1A For SB710 DY CLK_SB_14M 1 R440 2CLK_SB_14M_1 0R0402-PAD TP209 TPAD14-GP 1 4 3 25M_48M_66M_OSC J21 J20 25M_X1 25M_X2 32K_X2 1 B3 C433 SC18P50V2JN-1-GP SB F23 F24 F22 G25 G24 X2 ALLOW_LDTSTP PROCHOT# LDT_PG LDT_STP# LDT_RST# LPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/GNT5#/GPIO68 BMREQ#/REQ5#/GPIO65 SERIRQ RTCCLK INTRUDER_ALERT# VBAT G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15 C3 C2 B2 1 1 C TP124 TP119 TP198 TP115 TP197 TP117 TP121 TP118 TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TP120 TPAD14-GP TP201 TPAD14-GP TP116 TP191 TP123 TPAD14-GP TPAD14-GP TPAD14-GP 090917-remove Muxless circuit TP262 INT_PIRQE# INT_PIRQF# INT_PIRQG# PE_GPIO DY TP263 LPCCLK0_R LPCCLK1_R 1 2 INTRUDER# RTC_AUX_S5_R 1 1 B R126 10KR2J-3-GP LPC_LAD[0..3] LPC_LAD[0..3] 36,37 PCLK_FW H 15,37 PCLK_KBC 15,36 DY 2 DY 2SC22P50V2JN-4GP SC22P50V2JN-4GP ARTC1 C409 DY TPAD14-GP TP148 1 2 R158 510R2J-1-GP C408 SCD1U16V2ZY-2GP SC1U10V2KX-1GP 2 TPAD14-GP RN51 4 SRN22-3-GP 3 EC48 LPC_LAD0 36,37 EC47 LPC_LAD1 36,37 LPC_LAD2 36,37 LPC_LAD3 36,37 LPC_LFRAME# 36,37 LDRQ0# TP213 TPAD14-GP LDRQ1# TP193 TPAD14-GP PCI_REQ#5 PCI_REQ#5 12 INT_SERIRQ 36 RTC_AUX_S5 RTC_CLK 15,35 C407 TPAD14-GP PM_CLKRUN# 36 PCI_LOCK# SB700-1-GP-U1 A 2 INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36 AD3 AC4 AE2 AE3 PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PE_GPIO1 PCI_GNT#4 15 15 15 15 15 15 15 15 SCD1U16V2ZY-2GP 9 NB_ALLOW _LDTSTOP 6 PROCHOT#_SB 6,52 CPU_PW RGD 6 CPU_LDT_STOP# 6,52 CPU_LDT_RST# X1 LPC A3 1 2 2 82.30001.691 2ND = 82.30001.A81 2 TP210 TPAD14-GP R164 10MR2J-L-GP X4 GPP_CLK3P GPP_CLK3N L18 32K_X1 -1 X-32D768KHZ-38GPU GPP_CLK2P GPP_CLK2N N22 P22 RTC B 1 C424 SC18P50V2JN-1-GP 3 M19 M20 CPU 2 2 10MR2J-L-GP GPP_CLK1P GPP_CLK1N RTC XTAL 1 R162 L20 L19 1 for TR GPP_CLK0P GPP_CLK0N PCI INTERFACE 14 73.07408.L16 2ND = 73.07408.L15 3RD = 73.07408.02B J19 J18 CLOCK GENERATOR 2 2 7 TSLVC08APW -1-GP 1 SLT_GFX_CLKP SLT_GFX_CLKN PLT_RST1#_B 32,33,34,37 2 PLT_RST1# 2 CPU_HT_CLKP CPU_HT_CLKN M23 M22 SC1U10V2KX-1GP SC1U10V2KX-1GP 6,9,26,33,36,55 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 1 P17 M18 DY DY DY DY 2 NB_HT_CLKP NB_HT_CLKN 3 1 M24 M25 2 U16A 1 2 NB_DISP_CLKP NB_DISP_CLKN 3D3V_S5 TPAD14-GP 1 2 NP1 NP2 1 K23 K22 C TP138 2 PCIE_RCLKP/NB_LNK_CLKP PCIE_RCLKN/NB_LNK_CLKN 3 CLK_PCIE_SB 3 CLK_PCIE_SB# PCI_CLK2 15 PCI_CLK3 15 CLK_PCI4 15 CLK_PCI_LOM 15 D AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1# REQ2# REQ3#/GPIO70 REQ4#/GPIO71 GNT0# GNT1# GNT2# GNT3#/GPIO72 GNT4#/GPIO73 CLKRUN# LOCK# U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5 1 N25 N24 Place R <100mils form pins T25,T24 PCIRST#_SB 2 PCIE_PVSS C811 68.00206.121 2ND = 68.00216.161 PCI CLKS PCIE_PVDD P25 1 1 C810 N1 TPAD14-GP TPAD14-GP SC22P50V2JN-4GP 220 ohm 2A PCIRST# R144 R141 R137 R138 TP204 TP203 1 2 10R0402-PAD 2 10R0402-PAD 2 10R0402-PAD 2 0R0402-PAD EC40 PCIE_CALRP PCIE_CALRN P24 PCIE_CALRP 2 562R2F-GP 2 2K05R2F-GP PCIE_CALRN 1 1 >15mil Width 43 mA PCI_CLK0_R PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R SC22P50V2JN-4GP T25 T24 PCIE_VDDR P4 P3 P1 P2 T4 T3 SC22P50V2JN-4GP PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N ALINK_NBTX_C_SBRX_P0 ALINK_NBTX_C_SBRX_N0 ALINK_NBTX_C_SBRX_P1 ALINK_NBTX_C_SBRX_N1 ALINK_NBTX_C_SBRX_P2 ALINK_NBTX_C_SBRX_N2 ALINK_NBTX_C_SBRX_P3 ALINK_NBTX_C_SBRX_N3 PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5/GPIO41 EC39 U22 U21 U19 V19 R20 R21 R18 R17 8 8 8 8 8 8 8 8 R143 R147 1 2 PBY201209T-221Y-N-GP Part 1 of 5 PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N +1.2V_RUN_PCIE_PVDD L24 SB700 A_RST# SC22P50V2JN-4GP 1D2V_S0 2 2 2 2 2 2 2 2 N2 ALINK_NBRX_C_SBTX_P0 ALINK_NBRX_C_SBTX_N0 ALINK_NBRX_C_SBTX_P1 ALINK_NBRX_C_SBTX_N1 ALINK_NBRX_C_SBTX_P2 ALINK_NBRX_C_SBTX_N2 ALINK_NBRX_C_SBTX_P3 ALINK_NBRX_C_SBTX_N3 V23 V22 V24 V25 U25 U24 T23 T22 ALINK_NBRX_SBTX_P0 ALINK_NBRX_SBTX_N0 ALINK_NBRX_SBTX_P1 ALINK_NBRX_SBTX_N1 ALINK_NBRX_SBTX_P2 ALINK_NBRX_SBTX_N2 ALINK_NBRX_SBTX_P3 ALINK_NBRX_SBTX_N3 1 1 1 1 1 1 1 1 NB_RST# SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP EC41 D C774 C777 C779 C787 C794 C791 C802 C801 EC42 8 8 8 8 8 8 8 8 R146 33R2J-2-GP 1 2 PLT_RST1# PCI EXPRESS INTERFACE 6,9,26,33,36,55 PWR GND NP1 NP2 BAT-CON2-1-GP-U 62.70001.011 JV50-TR8 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title ATi-SB710_PCIE&PCI_(1/5) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 11 of 63 5 FP_ID 10KR2J-3-GP 3D3V_S5 1 R445 1 R443 1 R442 DY 2 DY 2 DY 2 SB_TEST2 2K2R2F-GP SB_TEST1 2K2R2F-GP 3D3V_S0 SB_TEST0 2K2R2F-GP RSMRST#_KBC_SB DY DY DY ICH_PME# 2 10KR2J-3-GP R410 1KR2F-3-GP PCIE_W AKE# 2 10KR2J-3-GP SMB_ALERT# 2 1 1 R154 1 R444 1 R441 10KR2J-3-GP 38 for TR TPAD14-GP PM_SLP_S5# ECSCI#_1 ECSW I# PM_SLP_S3# 1 2 3 4 28 FP_ID GPIO6 GPIO4 AE18 AD18 AA19 W17 GPIO39 V17 W20 W21 SMBC0_SB AA18 SMBD0_SB W18 SMB_CLK K1 SMB_DATA K2 DDC1_SCL AA20 DDC1_SDA Y18 SATA_DET# C1 GPIO5 Y19 GEVENT7# G5 FP_ID TPAD14-GP TPAD14-GP GPIO0/HDMI RN97 8 7 6 5 TP190 TP194 TP192 ACZ_SPKR C SRN10KJ-6-GP 3D3V_S5 3D3V_S0 R570 1 TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP 2 RSMRST#_KBC_SB 10KR2J-3-GP ECSMI#_KBC 2 10KR2J-3-GP 2 PCI_REQ#5 10KR2J-3-GP R571 1 R572 1 PCI_REQ#5 TP196 TP199 TP149 TP200 TP218 SB 28 ACZ_BITCLK 31 ACZ_BTCLK_MDC ECSW I# TPAD14-GP USB_OC#5 TP151 USB_OC#4 25 USB_OC#4 34 CPPE# TPAD14-GP USB_OC#2 TP220 TPAD14-GP USB_OC#1 TP150 25 USB_OC#0 Close to SB710 RN49 SRN33J-5-GP-U 1 4 2 3 1 R172 2 33R2J-2-GP 1 2 R173 33R2J-2-GP 31 ACZ_SDATAOUT_MDC 28 ACZ_SDATAOUT 28 ACZ_SDATAIN0 31 ACZ_SDATAIN1 4 3 1 ACZ_RST#_R 15 TP212 TP214 TP216 1 1 1 IMC_GPIO0 IMC_GPIO1 IMC_GPIO2 IDE_RST# H19 H20 H21 F25 IMC_GPIO0 IMC_GPIO1 SPI_CS2#/IMC_GPIO2 IDE_RST#/F_RST#/IMC_GPO3 10KR2J-3-GP TP221 TP147 TP145 TP222 1 1 1 1 IMC_GPIO4 IMC_GPIO5 IMC_GPIO6 IMC_GPIO7 D22 E24 E25 D23 IMC_GPIO4 IMC_GPIO5 IMC_GPIO6 IMC_GPIO7 3D3V_S0 R152 1 5 6 7 8 NEWCARD /GLAN RN53 4 3 2 1 SRN4K7J-10-GP DY 2 Place these close SB700 USB_FSD12P USB_FSD12N F7 E8 USB_HSD11P USB_HSD11N H11 J10 USB_HSD10P USB_HSD10N E11 F11 USBPP8 19 USBPN8 19 USB_HSD9P USB_HSD9N A11 B11 USBPP4 33 USBPN4 33 Pair USB_HSD8P USB_HSD8N C10 D10 USBPP3 25 USBPN3 25 11 CardReader 10 WEBCAM USB_HSD7P USB_HSD7N G11 H12 USBPP1 25 USBPN1 25 USB_HSD6P USB_HSD6N E12 E14 USBPP2 25 USBPN2 25 USB_HSD5P USB_HSD5N C12 D12 USB_HSD4P USB_HSD4N B12 A12 USB_HSD3P USB_HSD3N G12 G14 USBPP6 38 USBPN6 38 USB_HSD2P USB_HSD2N H14 H15 USBPP9 34 USBPN9 34 USB_HSD1P USB_HSD1N A13 B13 USBPP7 33 USBPN7 33 USB_HSD0P USB_HSD0N B14 A14 USBPP0 25 USBPN0 25 IMC_GPIO8 IMC_GPIO9 IMC_PWM0/IMC_GPIO10 SCL2/IMC_GPIO11 SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14 IMC_PWM1/IMC_GPIO15 IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17 A18 B18 F21 D21 F19 E20 E21 E19 D19 E18 IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25 G20 G21 D25 D24 C25 C24 B25 C23 IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41 B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18 D Place R near pin14. Route it with 10mils Trace width and 25mils spacing to any signals in X, Y, Z directions. USBPP10 32 USBPN10 32 USB USBPP5 24 USBPN5 24 SB_GPO16 SB_GPO17 Device 9 MINIC2 8 USB4 7 USB3 6 USB2 5 Bluetooth 4 NC OCP1# C 3 Fringer print 2 NEW1 1 MINIC1 0 USB1 OCP0# 15 15 Strap Pin / define to use LPC or SPI ROM B SB700-1-GP-U1 A Wistron Corporation 1 1 JV50-TR8 2 C859 SC100P50V2JN-3GP 3 1 1 DY2 DY 2CLK48_USB_R2 C432 R161 10KR2J-3-GP SC10P50V2JN-4GP E6 E7 SMB_CLK SMB_DATA SMBC0_SB SMBD0_SB 2 A AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO42 AZ_SDIN1/GPIO43 AZ_SDIN2/GPIO44 AZ_SDIN3/GPIO46 AZ_SYNC AZ_RST# AZ_DOCK_RST#/GPM8# TO STRAPS 3D3V_S0 26,33,34 26,33,34 3,16,17 3,16,17 USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GPM5# USB_OC4#/IR_RX0/GPM4# USB_OC3#/IR_RX1/GPM3# USB_OC2#/GPM2# USB_OC1#/GPM1# USB_OC0#/GPM0# 2 2 1 2 1 2 1 1 1 1 DY 10KR2J-3-GP DY DY DY DY DY M1 M2 J7 J8 ACZ_SDIN2 L8 TP206 ACZ_SDIN3 M3 TP205 ACZ_SYNC_R L6 ACZ_RST#_R M4 TP207 GPM8# L5 1 R151 SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP SC12P50V2JN-3GP 10KR2J-3-GP 10KR2J-3-GP DY DY 2 2 EC45 EC44 EC43 EC80 EC82 1 2 2 B R439 R448 B9 B8 A8 A9 E5 F8 E4 ACZ_BIT_CLK ACZ_SDATAOUT_R TPAD14-GP TPAD14-GP RN96 SRN33J-5-GP-U 1 2 28,31 ACZ_SYNC 28,31 ACZ_RST# SATA_IS0#/GPIO10 CLK_REQ3#/SATA_IS1#/GPIO6 SMARTVOLT/SATA_IS2#/GPIO4 CLK_REQ0#/SATA_IS3#/GPIO0 CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 SPKR/GPIO2 SCL0/GPOC0# SDA0/GPOC1# SCL1/GPOC2# SDA1/GPOC3# DDC1_SCL/GPIO9 DDC1_SDA/GPIO8 LLB#/GPIO66 SHUTDOWN#/GPIO5 DDR3_RST#/GEVENT7# CLK48_USB 2 USB_FSD13P USB_FSD13N RSMRST# 11 36 3D3V_S5 D3 CLK48_USB USB_PCOMP 1 R167 11K8R2F-GP 1% 2 42 RSMRST#_KBC_SB G8 USB 2.0 2 C8 USB_RCOMP GPIO DY 1 R411 USBCLK/14M_25M_48M_OSC USB MISC 300R2J-4-GP Part 4 of 5 SB700 PCI_PME#/GEVENT4# RI#/EXTEVNT0# SLP_S2/GPM9# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD SUS_STAT# TEST2 TEST1 TEST0 GA20IN/GEVENT0# KBRST#/GEVENT1# LPC_PME#/GEVENT3# LPC_SMI#/EXTEVNT1# S3_STATE/GEVENT5# SYS_RESET#/GPM7# WAKE#/GEVENT8# BLINK/GPM6# SMBALERT#/THRMTRIP#/GEVENT2# NB_PWRGD USB 1.1 E1 E2 H7 F5 34,35,36,42,44,49,53,54 PM_SLP_S3# G1 34,36,48 PM_SLP_S5# H2 36,52 PM_PW RBTN# H1 42 SB_PW RGD PM_SUS_STAT# K3 TP208 TPAD14-GP SB_TEST2 H5 SB_TEST1 H4 SB_TEST0 H3 Y15 36 KA20GATE W15 36 KBRCIN# K4 36 ECSCI#_1 ECSMI#_KBC K24 TPAD14-GP GEVENT5# F1 TP141 TPAD14-GP SYS_RST# J2 TP139 H6 26,34 PCIE_W AKE# EC_TMR F2 36 EC_TMR SMB_ALERT# J6 NB_PW RGD_R W14 NB_PW RGD 2 1ICH_PME# 1 RI# 1 S2# TP143 TP142 TP211 ACPI / WAKE UP EVENTS SB INTEGRATED uC 1 R419 1 ASB1D USB OC DY 2 HD AUDIO D 3D3V_S0 NB_PW RGD_R 1 0R2J-2-GP 2 R422 NB_PW RGD 1D8V_S0 3 INTEGRATED uC 9,42 4 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. C857 SC100P50V2JN-3GP Title ATi-SB710_USB&GPIO_(2/5) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 W ednesday, November 11, 2009 Sheet 1 12 of 63 5 4 3 2 1 PLACE SATA AC DECOUPLING CAPS CLOSE TO SB710 ASB1B C449 1 C446 1 2SCD01U50V2KX-1GP 2SCD01U50V2KX-1GP SATA_RXN1_C AD11 SATA_RXP1_C AE11 SATA_RX1N SATA_RX1P AB12 AC12 SATA_TX2P SATA_TX2N AE12 AD12 SATA_RX2N SATA_RX2P AD13 AE13 SATA_TX3P SATA_TX3N AB14 AC14 SATA_RX3N SATA_RX3P AE14 AD14 SATA_TX4P SATA_TX4N AD15 AE15 SATA_RX4N SATA_RX4P C Very Close to SB710 XTAL-25MHZ-120-GP-U X3 R127 10MR2J-L-GP 2 2 1ST 82.30020.851 SB 2ND = 82.30020.791 R434 1KR2F-3-GP 1 2 1 1 C373 SC15P50V2JN-2-GP 2 1 2 1 SATA_X2_R 1 R128 C367 SC15P50V2JN-2-GP 1D2V_S0 SATA_TX5P SATA_TX5N AE16 AD16 SATA_RX5N SATA_RX5P SATA_CAL V12 SATA_CAL SATA_X1 Y12 SATA_X1 SATA_X2AA12 SATA_X2 2 300R2J-4-GP 39 AB16 AC16 W11 MEDIA_LED# PLLVDD_SATA W12 XTLVDD_SATA 1 2 1 2 C785 DY 3D3V_S0 B XTLVDD_SATA SCD1U10V2KX-4GP C784 SC1U10V2KX-1GP LAN_RST#/GPIO13 ROM_RST#/GPIO14 U15 J1 P5 P8 R8 TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63 TEMPIN3/TALERT#/GPIO64 C6 B6 A6 A5 B5 VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60 A4 B4 C4 D4 D5 D6 A7 B7 AVDD F6 AVSS G7 C778 SC1U10V2KX-1GP Dummy CKG select 3D3V_S0 LAN_RST# ROM_RST# TP217 TP146 TP144 TP215 TP219 CLK_ID_1 CLK_ID_0 TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP R407 10KR2J-3-GP R412 10KR2J-3-GP RTM SEG TP202 TPAD14-GP TP140 TPAD14-GP R416 10KR2J-3-GP R413 10KR2J-3-GP ICS+SEG ICS+RTM ALERT# CLK_ID (1,0) ICS: 0,0 SEG: 0,1 RTM: 1,0 C 35 PSW _CLR# B PSW _CLR# AVDD_HW M 2 1 >15mil Width 1 R428 2 0R0603-PAD G6 D2 D1 F4 F3 FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52 CLK_ID_0 CLK_ID_1 SB_SPI_MISO SPI_MOSI_R ICH_SPICLK SB_SPI_HOLD ICH_SPICS0# SPI_DI/GPIO12 SPI_DO/GPIO11 SPI_CLK/GPIO47 SPI_HOLD#/GPIO31 SPI_CS#/GPIO32 FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49 SATA_ACT#/GPIO67 AA11 >15mil Width AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23 M8 M5 M7 93 mA PLLVDD_SATA 1 R426 2 0R0603-PAD IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23 IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30 1 SATA_RXN1 SATA_RXP1 2 SATA_TX1P SATA_TX1N 23 23 1 SATA_TXP1_C AE10 SATA_TXN1_C AD10 2 2SCD01U50V2KX-1GP 2SCD01U50V2KX-1GP D 2 C369 1 C368 1 AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24 1 SATA_RXN0 SATA_RXP0 SATA_TXP1 SATA_TXN1 IDE_IORDY IDE_IRQ IDE_A0 IDE_A1 IDE_A2 IDE_DACK# IDE_DRQ IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3# 2 SATA_RX0N SATA_RX0P 22 22 23 23 Part 2 of 5 1 SATA_RXN0_C AB10 SATA_RXP0_C AC10 2 2SCD01U50V2KX-1GP 2SCD01U50V2KX-1GP C687 1 C686 1 ATA 66/100/133 SATA_TX0P SATA_TX0N SPI ROM AD9 AE9 HW MONITOR SATA ODD SB700 SATA_TXP0 SATA_TXN0 SATA_TXP0_C SATA_TXN0_C SERIAL ATA 22 22 SATA HDD 2SCD01U50V2KX-1GP 2SCD01U50V2KX-1GP SATA PWR D C370 1 C371 1 3D3V_S5 G106 >15mil Width 210KR2J-3-GP MEDIA_LED# R574 1 210KR2J-3-GP PSW _CLR# R575 1 210KR2J-3-GP ALERT# 1 1 C423 DY 2 1 2 SC2D2U6D3V3KX-GP 3D3V_S0 R573 1 C418 SCD1U10V2KX-4GP SB700-1-GP-U1 GAP-OPEN 1 R163 2 0R0603-PAD Layout connect to Cap then GND JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title ATi-SB710_SATA-IDE_(3/5) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 13 of 63 4 3 2 1 ASB1C SB700-1-GP-U1 1 1 2 2 1 2 1 1 2 2 2 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 2 1 2 1 1 2 3D3V_AVDDC DY 1 1 17mA 1 1 1 2 2 2 2 C437 C436 L28 2 PBY201209T-221Y-N-GP 68.00206.121 2ND = 68.00216.161 DY >15mil Width PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21 R406 1 2 1 1KR2J-1-GP D26 H18 J17 J22 K25 M16 M17 M21 P16 3D3V_S0 K A RB751V-40-2-GP 83.R2004.B8F 2ND = 83.R0304.A8F F9 PCIE_CK_VSS_1 PCIE_CK_VSS_2 PCIE_CK_VSS_3 PCIE_CK_VSS_4 PCIE_CK_VSS_5 PCIE_CK_VSS_6 PCIE_CK_VSS_7 PCIE_CK_VSS_8 AVSSC AVSSCK A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24 D C P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25 B L17 SB700-1-GP-U1 47 mA >15mil Width 1 C426 SC1U10V2KX-1GP DY 2 C425 SCD1U10V2KX-4GP 3D3V_S0 2 L26 1 0R0603-PAD 2 1 AVDDCK_3D3V 62 mA 1D2V_S0 C816 C817 SCD1U10V2KX-4GP DY SC1U10V2KX-1GP 2 1 >15mil Width L52 2 1 0R0603-PAD JV50-TR8 2 1 AVDDK_1D2V A C766 2 3D3V_S5 AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24 5V_S0 C769 AVDDK_1D2V 2 E9 C434 SC10U6D3V3MX-GP 1 J16 AVDDCK_3D3V K17 C417 DY 2 V5_VREF 1 PLL AVDDC C422 DY >10mil Width AE7 2 C421 USB I/O 1 1 2 DY AVDDCK_1.2V C431 DY SC1U10V2KX-1GP 2 1 C420 1 1 2 2 A10 B10 SCD1U10V2KX-4GP 2 1 C415 SCD1U10V2KX-4GP 2 1 C416 SCD1U10V2KX-4GP DY SC1U10V2KX-1GP 2 1 C429 SC1U10V2KX-1GP DY SC10U6D3V3MX-GP 2 C428 SC10U6D3V3MX-GP B >50mil Width AVDDCK_3.3V -1 SC1U10V2KX-1GP AVDD_USB 1 2 PBY201209T-221Y-N-GP 658 mA V5_VREF 1 1 2 DY SCD1U10V2KX-4GP L27 AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5 1D2V_S5 C427 Use Plane Shape for +3.3V_AVDD_USB A16 B16 C16 D16 D17 E17 F15 F17 F18 G15 G17 G18 A15 B15 C14 D8 D9 D11 D13 D14 D15 E15 F12 F14 G9 H9 H17 J9 J11 J12 J14 J15 K10 K12 K14 K15 C405 >30mil Width 197 mA USB_PHY_1.2V_1 USB_PHY_1.2V_2 3D3V_S5 68.00206.121 2ND = 68.00216.161 1 1 1 3.3V_S5 I/O G2 G4 C419 DY 113 mA SATA I/O 1 2 1 2 1 2 1 S5_1.2V_1 S5_1.2V_2 DY SCD1U10V2KX-4GP 2 A17 A24 B17 J4 J5 L1 L2 C414 SCD1U10V2KX-4GP AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7 C404 SC1U10V2KX-1GP 2 1 1 2 DY C401 >20mil Width SC1U10V2KX-1GP AA14 AB18 AA15 AA17 AC18 AD17 AE17 C772 SCD1U10V2KX-4GP SCD1U10V2KX-4GP DY SC10U6D3V3MX-GP 68.00206.121 2ND = 68.00216.161 C366 SC1U10V2KX-1GP C354 SC10U6D3V3MX-GP SCD1U16V2ZY-2GP DY EC81 1D2V_S0 1 R148 2 0R0402-PAD SC4D7U6D3V3MX-2GP 1 2 PBY201209T-221Y-N-GP C770 T10 U10 U11 U12 V11 V14 W9 Y9 Y11 Y14 Y17 AA9 AB9 AB11 AB13 AB15 AB17 AC8 AD8 AE8 DY SCD1U10V2KX-4GP 567 mA C786 C402 DY SCD1U10V2KX-4GP AVDD_SATA >50mil Width L23 2 CORE S0 CLKGEN I/O IDE/FLSH I/O 32 mA SC1U10V2KX-1GP PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7 C 1D2V_S0 DY 3D3V_S5 P18 P19 P20 P21 R22 R24 R25 CORE S5 1 2 1 2 1 2 1 1 2 POWER SCD1U10V2KX-4GP 2 C396 DY C400 DY Part 5 of 5 C386 SC2D2U6D3V3KX-GP C395 SCD1U10V2KX-4GP DY C403 DY SC2D2U6D3V3KX-GP C389 SC1U10V2KX-1GP -1 SC1U10V2KX-1GP SC4D7U6D3V3MX-2GP 68.00206.121 2ND = 68.00216.161 C809 DY SC2D2U6D3V3KX-GP 600 mA CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4 L21 L22 L24 L25 SC2D2U6D3V3KX-GP VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4 PCIE_VDDR >100mil Width C394 C814 CKVDD A-LINK I/O 1 2 1 2 2 2 2 1 1 1 1 2 SCD1U10V2KX-4GP Y20 AA21 AA22 AE25 1D2V_S0 220 ohm 2A DY SB700 C815 >50mil Width 71 mA L25 1 2 PBY201209T-221Y-N-GP C805 SC10U6D3V3MX-GP C773 C806 SCD1U10V2KX-4GP C807 SCD1U10V2KX-4GP DY C799 SCD1U10V2KX-4GP DY C800 SC1U10V2KX-1GP SC4D7U6D3V3KX-GP SC10U6D3V3MX-GP D C781 ASB1E 1D2V_S0 >100mil Width L15 M12 M14 N13 P12 P14 R11 R15 T16 SCD1U10V2KX-4GP C435 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 SC1U10V2KX-1GP 3D3V_S0 Part 3 of 5 PCI/GPIO I/O 3D3V_S0 510 mA SB700 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 SC1U10V2KX-1GP L9 M9 T15 U9 U16 U17 V8 W7 Y6 AA4 AB5 AB21 2 131 mA GROUND 5 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title ATi-SB710_POWER&GND_(4/5) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 05, 2009 Sheet 1 14 of 63 5 4 3 2 1 REQUIRED STRAPS REQUIRED SYSTEM STRAPS D D 1 1 1 2 DY 2 DY R171 2 DY R430 2 DY R160 2 DY 1 1 1 R155 2 DY R153 2 DY R140 2 DY R136 2 DY 3D3V_S5 1 R142 1 R145 1 3D3V_S0 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 2K2R2F-GP PCI_CLK2 11 PCI_CLK3 11 CLK_PCI4 11 CLK_PCI_LOM 11 PCLK_FW H 11,37 PCLK_KBC 11,36 RTC_CLK 11,35 ACZ_RST#_R 12 SB_GPO17 12 RN52 SRN2K2J-1-GP 12 1 SB_GPO16 TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP R166 DY 2K2R2F-GP 2 2 DEBUG STRAPS 4 3 2 2 10KR2J-3-GP 10KR2J-3-GP RN50 SRN10KJ-5-GP DY 10KR2J-3-GP 2 DY 10KR2J-3-GP 3 4 DY 4 3 RN46 SRN10KJ-5-GP C 1 2 R429 1 1 R159 1 2 R139 1 2 1 R135 1 C B PCI_CLK2 PULL HIGH PCI_CLK3 WatchDOG (NB_PWRGD) ENABLED CLK_PCI_LOM CLK_PCI4 USE DEBUG STRAPS PCLK_FWH PCLK_KBC IMC ENABLED (Use Internal) RESERVED PULL LOW CLKGEN ENABLED WatchDog (NB_PWRGD) DISABLED IGNORE DEBUG STRAPS IMC DISABLED DEFAULT DEFAULT DEFAULT CLKGEN DISABLED (Use External) DEFAULT RTCCLK INTERNAL RTC AZ_RST# ENABLE PCI ROM BOOT DEFAULT EXT. RTC (PD on X1, apply 32KHz to RTC_CLK) SB_GPO17 , SB_GPO16 ROM TYPE: PULL HIGH H, H = Reserved H, L = SPI ROM DISABLE PCI ROM BOOT L, H = LPC ROM DEFAULT L, L = FWH ROM DEFAULT PULL LOW TP137 TP136 TP195 TP135 TP134 TP133 TP130 TP129 PCI_AD28 PCI_AD27 PCI_AD26 USE LONG RESET (DEFAULT) USE SHORT RESET PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 11 11 11 11 11 11 11 11 PCI_AD25 PCI_AD24 USE PCI PLL USE ACPI BCLK USE IDE PLL USE DEFAULT PCIE STRAPS Reserved PCI_AD23 (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) BYPASS PCI PLL BYPASS ACPI BCLK BYPASS IDE PLL USE EEPROM PCIE STRAPS Reserved PCI_AD30 PCI_AD29 B Reserved Note: SB700 has 15K internal PU FOR PCI_AD[30:23] NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title ATi-SB710_STRAPPING_(5/5) Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 15 of 63 5 4 3 2 1 ADIMM2 81 82 87 88 95 96 103 104 111 112 117 118 C458 SC2D2U6D3V3KX-GP OTD0 OTD1 C456 SCD1U10V2KX-4GP DY (A0) 1D8V_S3 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH C MEM_MA_CLK0_P C338 SC1D5P50V2CN-1GP MEM_MA_CLK0_N MEM_MA_CLK1_P C331 SC1D5P50V2CN-1GP MEM_MA_CLK1_N DDR_VREF 1D8V_S3 B 1 VREF_DDR_MEM C844 SCD1U10V2KX-4GP RN100 1 2 4 3 2 SRN1KJ-7-GP C834 SCD1U10V2KX-4GP 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196 2 2 DY 1 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 3D3V_S0 2 50 69 83 120 163 SMBD0_SB 3,12,17 SMBC0_SB 3,12,17 1 NC#50 NC#69 NC#83 NC#120 NC#163/TEST 5 5 5 5 5 5 5 5 1 198 200 D 1 SA0 SA1 MH2 1 2 1 VDDSPD MH2 114 119 SCD1U10V2KX-4GP 2 195 197 199 MH1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 1 SDA SCL MH1 13 31 51 70 131 148 169 188 2 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 201 MEM_MA_DQS0_P MEM_MA_DQS1_P MEM_MA_DQS2_P MEM_MA_DQS3_P MEM_MA_DQS4_P MEM_MA_DQS5_P MEM_MA_DQS6_P MEM_MA_DQS7_P Place C2.2uF and 0.1uF < 500mils from DDR connector MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5 10 26 52 67 130 147 170 185 GND 5 5 5 5 5 5 5 5 C847 MEM_MA_CLK0_P 5 MEM_MA_CLK0_N 5 164 166 CK1 CK1# GND DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# C845 SC2D2U6D3V3KX-GP MEM_MA_CKE0 5,18 MEM_MA_CKE1 5,18 30 32 VREF VSS 11 29 49 68 129 146 167 186 A CKE0 CKE1 202 MEM_MA_DQS0_N MEM_MA_DQS1_N MEM_MA_DQS2_N MEM_MA_DQS3_N MEM_MA_DQS4_N MEM_MA_DQS5_N MEM_MA_DQS6_N MEM_MA_DQS7_N VREF_DDR_MEM MEM_MA0_CS#0 5,18 MEM_MA0_CS#1 5,18 79 80 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 5 5 5 5 5 5 5 5 5,18 MEM_MA0_ODT0 5,18 MEM_MA0_ODT1 110 115 2 B CS0# CS1# CK0 CK0# BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 MEM_MA_RAS# 5,18 MEM_MA_WE# 5,18 MEM_MA_CAS# 5,18 1 C 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 108 109 113 2 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 107 106 RAS# WE# CAS# 1 5,18 MEM_MA_BANK2 5,18 MEM_MA_BANK0 5,18 MEM_MA_BANK1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 2 D 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 NORMAL TYPE 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 5,18 C832 SC1KP50V2KX-1GP LAYOUT: Locate close to DIMM A JV50-TR8 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. SKT-SODIMM20020U4GP 62.10017.661 Title 2ND = 62.10017.A41 3RD = 62.10017.G81 LOW 5.2 mm DDR_SO-DIMM SKT_1 Document Number Size Custom Rev 5 4 3 2 -1 JV50-TR8 Date: Monday, October 26, 2009 Sheet 1 16 of 63 5 4 3 2 1 ADIMM1 11 29 49 68 129 146 167 186 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# 5 5 5 5 5 5 5 5 MEM_MB_DQS0_P MEM_MB_DQS1_P MEM_MB_DQS2_P MEM_MB_DQS3_P MEM_MB_DQS4_P MEM_MB_DQS5_P MEM_MB_DQS6_P MEM_MB_DQS7_P 13 31 51 70 131 148 169 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 114 119 5,18 MEM_MB0_ODT0 5,18 MEM_MB0_ODT1 1 2 2 C855 SC2D2U6D3V3KX-GP SCD1U10V2KX-4GP C854 1 VREF_DDR_MEM A Place C2.2uF and 0.1uF < 500mils from DDR connector 1 2 MEM_MB_CKE0 5,18 MEM_MB_CKE1 5,18 30 32 MEM_MB_CLK0_P 5 MEM_MB_CLK0_N 5 164 166 MEM_MB_CLK1_P 5 MEM_MB_CLK1_N 5 10 26 52 67 130 147 170 185 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 CK1 CK1# DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 195 197 VDDSPD 199 SA0 SA1 198 200 NC#50 NC#69 NC#83 NC#120 NC#163/TEST 50 69 83 120 163 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 81 82 87 88 95 96 103 104 111 112 117 118 5 5 5 5 5 5 5 5 SMBD0_SB 3,12,16 SMBC0_SB 3,12,16 DIMM2_SA1 1 R203 3D3V_S0 2 10KR2J-3-GP C507 DY SC2D2U6D3V3KX-GP 2 SDA SCL D OTD0 OTD1 VREF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196 202 GND GND 201 MH1 MH1 MH2 MH2 1 MEM_MB_DQS0_N MEM_MB_DQS1_N MEM_MB_DQS2_N MEM_MB_DQS3_N MEM_MB_DQS4_N MEM_MB_DQS5_N MEM_MB_DQS6_N MEM_MB_DQS7_N B CKE0 CKE1 C499 DY SCD1U10V2KX-4GP 2 5 5 5 5 5 5 5 5 C MEM_MB0_CS#0 5,18 MEM_MB0_CS#1 5,18 79 80 CK0 CK0# BA0 BA1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 110 115 1 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 CS0# CS1# (A2) 1D8V_S3 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH C MEM_MB_CLK0_P 1 5 MEM_MB_DATA0 5 MEM_MB_DATA1 5 MEM_MB_DATA2 5 MEM_MB_DATA3 5 MEM_MB_DATA4 5 MEM_MB_DATA5 5 MEM_MB_DATA6 5 MEM_MB_DATA7 5 MEM_MB_DATA8 5 MEM_MB_DATA9 5 MEM_MB_DATA10 5 MEM_MB_DATA11 5 MEM_MB_DATA12 5 MEM_MB_DATA13 5 MEM_MB_DATA14 5 MEM_MB_DATA15 5 MEM_MB_DATA16 5 MEM_MB_DATA17 5 MEM_MB_DATA18 5 MEM_MB_DATA19 5 MEM_MB_DATA20 5 MEM_MB_DATA21 5 MEM_MB_DATA22 5 MEM_MB_DATA23 5 MEM_MB_DATA24 5 MEM_MB_DATA25 5 MEM_MB_DATA26 5 MEM_MB_DATA27 5 MEM_MB_DATA28 5 MEM_MB_DATA29 5 MEM_MB_DATA30 5 MEM_MB_DATA31 5 MEM_MB_DATA32 5 MEM_MB_DATA33 5 MEM_MB_DATA34 5 MEM_MB_DATA35 5 MEM_MB_DATA36 5 MEM_MB_DATA37 5 MEM_MB_DATA38 5 MEM_MB_DATA39 5 MEM_MB_DATA40 5 MEM_MB_DATA41 5 MEM_MB_DATA42 5 MEM_MB_DATA43 5 MEM_MB_DATA44 5 MEM_MB_DATA45 5 MEM_MB_DATA46 5 MEM_MB_DATA47 5 MEM_MB_DATA48 5 MEM_MB_DATA49 5 MEM_MB_DATA50 5 MEM_MB_DATA51 5 MEM_MB_DATA52 5 MEM_MB_DATA53 5 MEM_MB_DATA54 5 MEM_MB_DATA55 5 MEM_MB_DATA56 5 MEM_MB_DATA57 5 MEM_MB_DATA58 5 MEM_MB_DATA59 5 MEM_MB_DATA60 5 MEM_MB_DATA61 5 MEM_MB_DATA62 5 MEM_MB_DATA63 MEM_MB_RAS# 5,18 MEM_MB_WE# 5,18 MEM_MB_CAS# 5,18 2 107 106 108 109 113 C348 SC1D5P50V2CN-1GP MEM_MB_CLK0_N MEM_MB_CLK1_P 1 5,18 MEM_MB_BANK2 5,18 MEM_MB_BANK0 5,18 MEM_MB_BANK1 RAS# WE# CAS# 2 D A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 NORMAL TYPE 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85 5,18 MEM_MB_ADD0 5,18 MEM_MB_ADD1 5,18 MEM_MB_ADD2 5,18 MEM_MB_ADD3 5,18 MEM_MB_ADD4 5,18 MEM_MB_ADD5 5,18 MEM_MB_ADD6 5,18 MEM_MB_ADD7 5,18 MEM_MB_ADD8 5,18 MEM_MB_ADD9 5,18 MEM_MB_ADD10 5,18 MEM_MB_ADD11 5,18 MEM_MB_ADD12 5,18 MEM_MB_ADD13 5,18 MEM_MB_ADD14 5,18 MEM_MB_ADD15 C340 SC1D5P50V2CN-1GP MEM_MB_CLK1_N B A JV50-TR8 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. DDR2-200P-22-GP-U3 62.10017.A61 Title 2ND = 62.10017.A51 3RD = 62.10017.G71 DDR_SO-DIMM SKT_2 1ST change to 62.10017.E21 Document Number Size Custom HI 9.2mm Date: 5 4 3 2 Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 17 of 63 5 4 3 2 1 Decoupling Capacitor 1 C516 DY 2 1 1 2 2 2 2 1 1 1 2 1 2 1 C514 C513 SC10P50V2JN-4GP 2 1 C515 SC10P50V2JN-4GP DY SC1KP50V2KX-1GP 2 1 C496 SC1KP50V2KX-1GP DY C497 SC1KP50V2KX-1GP 2 C498 SC1KP50V2KX-1GP DY SCD1U16V2ZY-2GP 2 1 1 C469 SCD1U16V2ZY-2GP 2 C468 D RN55 MEM_MB_ADD4 5,17 MEM_MB_ADD11 5,17 MEM_MB_ADD5 5,17 MEM_MB_ADD8 5,17 MEM_MB_CKE1 5,17 MEM_MB_ADD15 5,17 MEM_MB_ADD14 5,17 MEM_MB_ADD7 5,17 1 2 3 4 SRN47J-4-GP RN67 8 7 6 5 MEM_MA_ADD14 5,16 MEM_MA_ADD7 5,16 MEM_MA_ADD11 5,16 MEM_MA_ADD6 5,16 1 2 3 4 SRN47J-4-GP RN56 8 7 6 5 MEM_MB_BANK0 5,17 MEM_MB_ADD10 5,17 MEM_MB_ADD1 5,17 MEM_MB_ADD3 5,17 1 2 3 4 SRN47J-4-GP RN69 8 7 6 5 MEM_MA0_CS#0 5,16 MEM_MA_RAS# 5,16 MEM_MA0_ODT0 5,16 MEM_MA_ADD13 5,16 1 2 3 4 C484 Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3 C Place these Caps near DM2 1 C888 2 1 2 1 C483 DY 1D8V_S3 Place these Caps near PARALLEL TERMINATION 0D9V_S3 Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3 SC180P50V2JN-1GP 2 1 C887 SC180P50V2JN-1GP 2 1 C885 SCD01U50V2KX-1GP 2 1 C839 SCD01U50V2KX-1GP DY SC2D2U6D3V3KX-GP 2 C487 SC2D2U6D3V3KX-GP MEM_MB0_CS#1 5,17 MEM_MB0_ODT1 5,17 MEM_MB_CAS# 5,17 MEM_MB_W E# 5,17 SC2D2U6D3V3KX-GP SRN47J-4-GP RN57 8 7 6 5 C481 2 C840 1 1D8V_S3 SC2D2U6D3V3KX-GP 1 2 1 B C475 DY 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 C489 DY C488 DY SCD1U16V2ZY-2GP 2 1 2 1 C477 C479 SCD1U16V2ZY-2GP 2 2 1 2 C491 SCD1U16V2ZY-2GP 2 C443 SCD1U16V2ZY-2GP DY DY SCD1U16V2ZY-2GP 1 C490 DY SCD1U16V2ZY-2GP C444 SCD1U16V2ZY-2GP DY C527 SCD1U16V2ZY-2GP C442 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 2 C526 SCD1U16V2ZY-2GP C441 DY SCD1U16V2ZY-2GP C440 DY C525 SCD1U16V2ZY-2GP C478 SCD1U16V2ZY-2GP DY C524 SCD1U16V2ZY-2GP Do not share the Term resistor between the DDR addess and Control Signals. C523 SCD1U16V2ZY-2GP DY SCD1U16V2ZY-2GP B 1 SRN47J-4-GP 1 SRN47J-4-GP MEM_MA_BANK0 5,16 MEM_MA_ADD10 5,16 MEM_MA_ADD3 5,16 MEM_MA_ADD1 5,16 1 1 2 3 4 SRN47J-4-GP RN60 8 7 6 5 C884 2 1 2 3 4 SRN47J-4-GP RN62 8 7 6 5 1 MEM_MB_ADD9 5,17 MEM_MB_ADD12 5,17 MEM_MB_BANK2 5,17 MEM_MB_CKE0 5,17 C886 DY 2 SRN47J-4-GP RN54 8 7 6 5 1 1 2 3 4 C841 2 MEM_MA_ADD12 5,16 MEM_MA_ADD9 5,16 MEM_MA_BANK2 5,16 MEM_MA_CKE0 5,16 C838 1 SRN47J-4-GP RN61 8 7 6 5 C480 2 1 2 3 4 C482 1 MEM_MB_RAS# 5,17 MEM_MB0_CS#0 5,17 MEM_MB0_ODT0 5,17 MEM_MB_ADD13 5,17 2 SRN47J-4-GP RN59 8 7 6 5 1 1 2 3 4 1 MEM_MA_ADD4 5,16 MEM_MA_ADD2 5,16 MEM_MA_BANK1 5,16 MEM_MA_ADD0 5,16 SCD1U16V2ZY-2GP SRN47J-4-GP RN68 8 7 6 5 1D8V_S3 SCD1U16V2ZY-2GP 1 2 3 4 Place these Caps near DM1 SCD1U16V2ZY-2GP MEM_MB_ADD6 5,17 MEM_MB_ADD2 5,17 MEM_MB_ADD0 5,17 MEM_MB_BANK1 5,17 SC2D2U6D3V3KX-GP SRN47J-4-GP RN58 8 7 6 5 SC2D2U6D3V3KX-GP 1 2 3 4 SC2D2U6D3V3KX-GP MEM_MA_ADD8 5,16 MEM_MA_ADD5 5,16 MEM_MA_CKE1 5,16 MEM_MA_ADD15 5,16 SC2D2U6D3V3KX-GP SRN47J-4-GP RN66 8 7 6 5 2 8 7 6 5 2 1 2 3 4 2 MEM_MA0_ODT1 5,16 MEM_MA0_CS#1 5,16 MEM_MA_W E# 5,16 MEM_MA_CAS# 5,16 1 8 7 6 5 1 2 3 4 C C470 SCD1U16V2ZY-2GP 1 2 3 4 C452 SCD1U16V2ZY-2GP 0D9V_S3 RN63 DY C451 SCD1U16V2ZY-2GP Put decap near power(0.9V) and pull-up resistor 0D9V_S3 Put decap near power(0.9V) and pull-up resistor SCD1U16V2ZY-2GP PARALLEL TERMINATION C450 SCD1U16V2ZY-2GP D 2 1 0D9V_S3 JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title DDR_DAMPING & TERMINATION Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 18 of 63 5 4 3 2 for TR LCD/INVERTER/CCD CONN 1 RN23 56 56 56 56 LVDS_TXACLKLVDS_TXACLK+ LVDS_TXAOUT2LVDS_TXAOUT2+ LVDS_TXACLKLVDS_TXACLK+ LVDS_TXAOUT2LVDS_TXAOUT2+ 56 56 56 56 LVDS_TXAOUT0LVDS_TXAOUT0+ LVDS_TXAOUT1LVDS_TXAOUT1+ LVDS_TXAOUT0LVDS_TXAOUT0+ LVDS_TXAOUT1LVDS_TXAOUT1+ 1 2 3 4 LCDVDD LCD_TXACLKLCD_TXACLK+ LCD_TXAOUT2LCD_TXAOUT2+ 8 7 6 5 DIS SRN0J-7-GP RN22 1 -1 LCD1 12 12 36 LCD_CB_SEL 1 2 R2531 0R0402-PAD 2 R254 0R0402-PAD USBPP8 USBPN8 USBPP8_R USBPN8_R 36 DBC_EN 3D3V_S0 LCD_EDID_CLK_1 LCD_EDID_DAT_1 BRIGHTNESS_CN BLON_OUT_1 DCBATOUT F1 DCBATOUT_LCD1 2 1 1 POLYSW -1D1A24V-GP C5 2 C SC10U35V0ZY-GP 69.50007.A31 2ND = 69.50007.A41 1 C1 SC10U10V5ZY-1GP Inverter Pin LCD_TXAOUT0LCD_TXAOUT0+ LCD_TXAOUT1LCD_TXAOUT1+ 8 7 6 5 Pin Vin 2 Vin 3 Brightness 4 BLON D DIS SRN0J-7-GP 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 42 Symbol 1 2 -1 D 41 40 1 2 3 4 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 CCD_PW R RN25 56 56 56 56 LCD_TXBCLK+ LCD_TXBCLKLCD_TXBOUT2+ LCD_TXBOUT2LCD_TXBOUT1+ LCD_TXBOUT1LCD_TXBOUT0+ LCD_TXBOUT0LCD_TXACLK+ LCD_TXACLKLCD_TXAOUT2+ LCD_TXAOUT2LCD_TXAOUT1+ LCD_TXAOUT1LCD_TXAOUT0+ LCD_TXAOUT0- LVDS_TXBCLKLVDS_TXBCLK+ LVDS_TXBOUT2LVDS_TXBOUT2+ LVDS_TXBCLKLVDS_TXBCLK+ LVDS_TXBOUT2LVDS_TXBOUT2+ 1 2 3 4 LCD_TXBCLKLCD_TXBCLK+ LCD_TXBOUT2LCD_TXBOUT2+ 8 7 6 5 DIS SRN0J-7-GP 5 GND 6 GND RN24 56 56 56 56 LVDS_TXBOUT0LVDS_TXBOUT0+ LVDS_TXBOUT1LVDS_TXBOUT1+ LVDS_TXBOUT0LVDS_TXBOUT0+ LVDS_TXBOUT1LVDS_TXBOUT1+ 1 2 3 4 LCD_TXBOUT0LCD_TXBOUT0+ LCD_TXBOUT1LCD_TXBOUT1+ 8 7 6 5 CCD Pin Pin DIS SRN0J-7-GP RN17 9 9 9 9 ACES-CONN40C-4-GP GMCH_TXAOUT2+ GMCH_TXAOUT2GMCH_TXACLK+ GMCH_TXACLK- GMCH_TXAOUT2+ GMCH_TXAOUT2GMCH_TXACLK+ GMCH_TXACLK- 1 2 3 4 UMA LCD_TXAOUT2+ LCD_TXAOUT2LCD_TXACLK+ LCD_TXACLK- 8 7 6 5 Symbol 1 CCD_PWR 2 USB- 3 USB+ 4 GND 5 GND SRN0J-7-GP 20.F1296.040 2ND = 20.F1557.040 C RN16 SB USBPN8_R 1 USBPP8_R 1 9 9 9 9 DY 2 EC56 SC22P50V2JN-4GP 2 EC57 SC22P50V2JN-4GP DY GMCH_TXAOUT1+ GMCH_TXAOUT1GMCH_TXAOUT0+ GMCH_TXAOUT0- GMCH_TXAOUT1+ GMCH_TXAOUT1GMCH_TXAOUT0+ GMCH_TXAOUT0- 1 2 3 4 UMA LCD_TXAOUT1+ LCD_TXAOUT1LCD_TXAOUT0+ LCD_TXAOUT0- 8 7 6 5 SRN0J-7-GP RN19 9 9 9 9 GMCH_TXBOUT2+ GMCH_TXBOUT2GMCH_TXBCLK+ GMCH_TXBCLK- GMCH_TXBOUT2+ GMCH_TXBOUT2GMCH_TXBCLK+ GMCH_TXBCLK- 9 9 9 9 GMCH_TXBOUT1+ GMCH_TXBOUT1GMCH_TXBOUT0+ GMCH_TXBOUT0- GMCH_TXBOUT1+ GMCH_TXBOUT1GMCH_TXBOUT0+ GMCH_TXBOUT0- 1 2 3 4 UMA 1 2 3 4 LCD_TXBOUT2+ LCD_TXBOUT2LCD_TXBCLK+ LCD_TXBCLK- 8 7 6 5 SRN0J-7-GP RN18 8 7 6 5 LCD_TXBOUT1+ LCD_TXBOUT1LCD_TXBOUT0+ LCD_TXBOUT0- F2 1 2 UMA 3D3V_S0 SRN0J-7-GP FUSE-1D1A6V-4GP-U 1 2 2 A G5285T11U-GP 74.05285.07F -1 1 2 LCD_EDID_CLK_1 LCD_EDID_DAT_1 4 3 SRN0J-10-GP-U C7 RN13 -1 2 1 9 CLK_DDC_EDID 9 DAT_DDC_EDID 1 4 2 IN#4 RN14 1 2 56 LCD_EDID_CLK 56 LCD_EDID_DAT 1 5 4 3 4 3 1 DIS IN#5 RN2 SRN4K7J-8-GP DY 2 EN GND OUT 3D3V_S0 RN111 SRN4K7J-8-GP U1 1 2 3 SC4D7U6D3V5KX-3GP DY C2 SC4D7U6D3V5KX-3GP 100KR2J-1-GP C6 SCD1U16V2ZY-2GP DY 1 R1 Layout 40 mil LCDVDD_ON_1 3D3V_M92 1 2 2 0R2J-2-GP B R3 10KR2J-3-GP 2 2 C3 DY 2 1 2 1 2 C4 Close to connector LCD1 1 1 R25 DIS DY 3D3V_S0 2 2 0R2J-2-GP 2 LCDVDD_ON -1 1 56 DY LCDVDD 1 R2 1 9 GMCH_LCDVDD_ON D35 PESD5V0S1BB-GP-U BRIGHTNESS 36 BLON_OUT 36 SC100P50V2JN-3GP UMA C554 DY SCD1U16V2ZY-2GP 1 2 R588 33R2J-2-GP 1 2 R589 33R2J-2-GP SC100P50V2JN-3GP for TR 1 C555 SC4D7U6D3V5KX-3GP -1 BRIGHTNESS_AMD 9,56 DY BRIGHTNESS_CN BLON_OUT_1 2 1 B 1 2 R508 33R2J-2-GP 69.50007.691 2ND = 69.50007.771 CCD_PW R C856 3 4 SRN0J-10-GP-U C701 SC220P50V2KX-3GP SC220P50V2KX-3GP UMA JV50-TR8 A for TR Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 LCD CONN Document Number Rev JV50-TR8 Monday, October 26, 2009 Sheet 1 -1 19 of 63 5 4 3 2 1 UMA RN21 8 7 6 5 9 GMCH_BLUE 9 GMCH_GREEN 9 GMCH_RED 1 2 3 4 SRN0J-7-GP Ferrite bead impedance: 10 ohm@100MHz 68.00230.021 2ND = 68.00119.081 for TR CRT_R_1 D L18 3D3V_S0 1 CRT_R 2 Hsync & Vsync level shift D 5V_S0 FCB1608CF-GP 1 L16 CRT_G EC31 2 14 2 1 56,59 CRT_HSYNC 56,59 CRT_VSYNC HSYNC_1 3 4 For System CRT U46A 2 CRT_HSYNC1_1 3 UMA 5 7 4 14 VSYNC_1 U46B 73.74125.L13 2ND = 73.74125.L12 CRT RN31 1 2 4 3 SB CRT_VSYNC1_1 6 UMA-->33R for flicker TSAHCT125PW -GP 73.74125.L13 2ND = 73.74125.L12 2 for TR MLVG04023R0QV05-GP DY EC29 CRT_G 1 C 2 MLVG04023R0QV05-GP Layout Note: * Must be a ground return path between this ground and the ground on the VGA connector. Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. EC28 CRT_B 1 DY DDC_CLK & DATA level shift 5V_CRT_S0 2 5V_S0 83.00016.F11 2ND = 83.00016.B11 3 3D3V_M92 3D3V_S0 D25 BAS16PT-GP 2 69.50007.691 2ND = 69.50007.771 1 2 1 MLVG04023R0QV05-GP F3 FUSE-1D1A6V-4GP-U 3D3V_S0 CRT I/F & CONNECTOR 500mA 8 7 6 5 5V_CRT_DDC CRT1 RN112 SRN2K2J-1-GP 17 6 CRT_B C722 CRT_IN#_R DY 11 SCD01U16V2KX-3GP 1 2 3 4 1 7 2 8 3 9 4 10 5 CRT_G 12 DAT_DDC1_5 13 CRT_HSYNC1 14 CRT_VSYNC1 15 16 CLK_DDC1_5 DIS 56 CRT_DDCDATA 56 CRT_DDCCLK 1 CRT_HSYNC1 DAT_DDC1_5_Q 3 4 4 3 5 2 6 1 DAT_DDC1 1 R49 2DAT_DDC1_5 0R0402-PAD -1 RN20 2 1 2N7002KDW -GP 3 4 CLK_DDC1_5_Q 84.2N702.A3F 2ND = 84.DM601.03F SRN0J-10-GP-U SB CLK_DDC1 1 R50 2CLK_DDC1_5 0R0402-PAD 1 for TR -1 2009/04/28 For 2KV ESD protect R64 CRT_DEC# JV50-TR8 1CRT_IN#_R 2 470R2J-2-GP C129 SC100P50V2JN-3GP EC24 1 36 DY Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. DY 1 UMA-->C150, C161 DY for flicker A 2 2 2ND = 20.20813.015 2 1 1 2 -1 DY SC100P50V2JN-3GP SC15P50V2JN-2-GP SC15P50V2JN-2-GP 2 9 GMCH_DDCCLK 9 GMCH_DDCDATA 20.20378.015 C161 RN33 2 1 UMA CRT_VSYNC1 CLK_DDC1_5 DAT_DDC1_5 C142 C148 DY SC100P50V2JN-3GP CRT_IN#_R U69 SRN0J-10-GP-U D-SUB-15-37-GP C150 1 2 5V_CRT_S0 B RN35 SRN10KJ-6-GP RN26 SRN2K2J-1-GP 1 2 CRT_R 4 3 4 3 B A RN36 SRN22-3-GP CRT_HSYNC1 4 CRT_VSYNC1 3 1 2 TSAHCT125PW -GP SRN0J-10-GP-U 9 GMCH_VSYNC 9 GMCH_HSYNC DY C700 SCD1U16V2ZY-2GP 1 2 RN34 SRN0J-10-GP-U CRT_R 1 Layout Note: Place these resistors close to the CRT-out connector C 2 C176 for TR R489 PU & TR-DIS-->150R TR-UMA & TR-MUX-->140R 1 1 C203 2 1 1 C215 2 2 2 2 2 1 1 1 1 2 Change DIS SC15P50V2JN-2-GP 150R2F-1-GP DY DY CRT_B 2 SC15P50V2JN-2-GP R490 1 EC27 FCB1608CF-GP SC15P50V2JN-2-GP R488 150R2F-1-GP 150R2F-1-GP DY RN37 SRN2K2J-1-GP L15 SC3P50V2CN-1-GP SRN0J-7-GP R489 DY EC30 SC3P50V2CN-1-GP 56 CRT_RED 56 CRT_GREEN 56 CRT_BLUE 1 2 3 4 SC3P50V2CN-1-GP 8 7 6 5 EC32 2 CRT_B_1 DIS RN114 1 68.00230.021 2ND = 68.00119.081 1 2 FCB1608CF-GP 7 1 4 3 68.00230.021 2ND = 68.00119.081 CRT_G_1 2 Title MLVG04023R0QV05-GP Size CRT Connector Document Number Rev -1 JV50-TR8 Date: 5 4 3 2 Monday, October 26, 2009 Sheet 1 20 of 63 5 4 3 2 1 5V_S0 5V_S0 HDMI1 SKT-HDMI19P-11-GP-U2 DY 66.15236.04L 1 DY D EC65 3D3V_M92 3D3V_S0 for TR 4 3 62.10078.171 2ND = 62.10078.121 4 3 MLVG04023R0QV05-GP TMDS_CLOCK_SHIELD TMDS_CLOCK+ TMDS_CLOCK- EC64 1 20 21 22 23 TMDS_DATA0_SHIELD TMDS_DATA1_SHIELD TMDS_DATA2_SHIELD DY EC66 2 GND GND GND GND 8 5 2 HDMI_A_HPD_CN 2 1 SRN1K5J-GP TP14 TPAD14-GP 1 2 RESERVED#14 14 HDMI_A_CEC 3 4 SC220P50V2JN-3GP 13 17 19 TMDS_DATA0+ TMDS_DATA0TMDS_DATA1+ TMDS_DATA1TMDS_DATA2+ TMDS_DATA2- 11 10 12 HDMI_TXC+ HDMI_TXC- CEC DDC/CEC_GROUNG HOT_PLUG_DETECT 7 9 4 6 1 3 TDMS_A_CLK TDMS_A_DAT 1 D 15 16 SC220P50V2JN-3GP HDMI_TX0+ HDMI_TX0HDMI_TX1+ HDMI_TX1HDMI_TX2+ HDMI_TX2- SCL SDA +5V_POWER 2 18 RN6 RN113 SRN1K5J-GP RN79 SRN1K5J-GP 1 2 UMA 66.15236.04L 1 2 DY 66.15236.04L RN32 9 GMCH_HDMI_CLK 9 GMCH_HDMI_DATA 3D3V_S0 RN43 2 1 DIS 3 4 SRN0J-6-GP HDMI_A_CLK 56 HDMI_A_DAT 56 3D3V_S0 2 C RN8 DY 1 TMDS_A_TX0TMDS_A_TX0+ 2 1 TMDS_A_TX1TMDS_A_TX1+ 2 1 3 HDMI_TX04 HDMI_TX0+ SRN0J-10-GP-U RN9 2 2 2 C638 1 2 1 1 DY SCD1U10V2KX-4GP C28 DY SCD1U10V2KX-4GP 56 TMDS_A_TX256 TMDS_A_TX2+ C34 DY SCD1U10V2KX-4GP 56 TMDS_A_TX156 TMDS_A_TX1+ C32 SCD1U10V2KX-4GP 56 TMDS_A_TX056 TMDS_A_TX0+ 2 56 TMDS_A_TXC56 TMDS_A_TXC+ C 2 1 HDMI_A_CLK_1 3 HDMI_A_DAT_1 4 SRN0J-6-GP R282 R281 4K7R2J-2-GP 4K7R2J-2-GP 3 HDMI_TX14 HDMI_TX1+ SRN0J-10-GP-U RN12 TMDS_A_TX2TMDS_A_TX2+ 1 1 DY DY From VGA 3 HDMI_TX24 HDMI_TX2+ SRN0J-10-GP-U 2 1 8 HDMI_DATA08 HDMI_DATA0+ UMA 8 HDMI_DATA18 HDMI_DATA1+ B UMA 8 HDMI_DATA28 HDMI_DATA2+ 2 1 3 4 RN27 SRN0J-10-GP-U 3 4 RN28 SRN0J-10-GP-U 3 4 RN29 SRN0J-10-GP-U 3 4 RN30 SRN0J-10-GP-U 2 1 2 1 2 1 IN_D1IN_D1+ OUT_D1OUT_D1+ 23 22 HDMI_TXCHDMI_TXC+ 41 42 IN_D2IN_D2+ OUT_D2OUT_D2+ 20 19 HDMI_TX0HDMI_TX0+ 44 45 IN_D3IN_D3+ OUT_D3OUT_D3+ 17 16 HDMI_TX1HDMI_TX1+ 47 48 IN_D4IN_D4+ OUT_D4OUT_D4+ 14 13 HDMI_TX2HDMI_TX2+ Recommended Equalization: [PC1,PC0]=01, 4dB R301 2 DY 4K7R2J-2-GP PC0 1 3D3V_S0 R302 2 4K7R2J-2-GP PC1 1 From NB 3 4 DY REXT_HDMI RT_EN#_8101 OE#_8101 DDC_EN_PS8101 3D3V_S0 3D3V_S0 2 R283 1 6 10 25 32 DY PC0 PC1 SDA SCL HPD REXT RT_EN# OE# DDC_EN HPD_SINK SDA_SINK SCL_SINK R288 20KR2F-L-GP DY R303 HDMI_A_HPD_CN TDMS_A_DAT TDMS_A_CLK U72 HDMI_A_CLK_1 HDMI_A_DAT_1 PS8101-GP 71.P8101.003 DY 499R2F-2-GP TDMS_A_CLK TDMS_A_DAT 1 DY 30 29 28 1 2 4K7R2J-2-GP HDMI_A_DAT_1 HDMI_A_CLK_1 HPD OE#_8101 B R492 2K2R2F-GP 1 5 12 18 24 27 31 36 37 43 49 DY 2 2 1 4K7R2J-2-GP R295 8 9 7 3D3V_S0 GND GND GND GND GND GND GND GND GND GND GND 3D3V_S0 35 34 38 39 3 HDMI_TXC4 HDMI_TXC+ SRN0J-10-GP-U 2 1 2 UMA TMDS_A_TXCTMDS_A_TXC+ 1 HDMI_CLKHDMI_CLK+ VCC VCC VCC VCC VCC VCC VCC VCC UMA 8 8 U35 NC#35 NC#34 for TR 2 11 15 21 26 33 40 46 RN7 5V_S0 2 5 A1 A2 BE1 BE2 VCC 8 3 6 B1 B2 GND 4 DDC_OE 1 7 PI5C3305L-GP RT_EN#_8101 Q19 D 73.53305.A0B DY UMA R305 A HDMI_A_HPD_CN 9 G HDMI_DETECT# 56 2N7002EW -1-GP HDMI_DETECT# HDMI_A_HPD JV50-TR8 R477 HPD 2 0R2J-2-GP 1 2 R304 10KR2J-3-GP 1 1 2 0R2J-2-GP Wistron Corporation HDMI 1 S 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. R477 : PU & TR-DIS-->0R PU & TR-UMA & MUXLESS-->5.1K DIS Title HDMI for TR 2 R306 100KR2J-1-GP A HDMI_A_HPD_CN R306 : PU & TR-DIS-->100K PU & TR-UMA & MUXLESS-->10K Size 4 3 2 Rev -1 JV50-TR8 Date: 5 HDMI Connector Document Number Monday, October 26, 2009 Sheet 21 1 of 63 5 4 3 2 1 D D SATA Connector SATA1 23 NP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SATA_RXP0 13 SATA_RXN0 13 2 D23 SS24-GP A SCD1U16V2ZY-2GP 16 17 18 19 20 21 22 NP2 24 C685 DY SC10U10V5ZY-1GP MP K 1 1 TC22 2 C 5V_S0 C 83.2R004.08G 2ND = 83.2R004.J8M 3RD = 83.2R004.H8M SATA_TXN0 13 SATA_TXP0 13 SKT-SATA22P-27-GP-U1 SATA_TXP0 D22 BAV99PT-GP-U 3 SATA_TXN0 DY 3 DY 3 DY D21 BAV99PT-GP-U 3D3V_S0 83.00099.K11 D19 BAV99PT-GP-U D24 BAV99PT-GP-U 2 1 2 1 2 1 1 DY B 2 MP B 3 SATA_RXP0 SATA_RXN0 62.10065.471 2ND = 62.10065.551 3RD = 62.10065.661 3D3V_S0 3D3V_S0 83.00099.K11 83.00099.K11 3D3V_S0 83.00099.K11 JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Date: 5 4 3 2 HDD Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 22 of 63 5 4 3 2 1 SATA ODD Connector D D ODD1 13 S1 S2 S3 S4 S5 S6 S7 13 SATA_TXP1 13 SATA_TXN1 13 SATA_RXN1 13 SATA_RXP1 R165 DY 10KR2J-3-GP 1 2ODD_DP 2 A 1 1ODD_MD TC9 SC10U10V5ZY-1GP SSM24PT-GP SCD1U16V2ZY-2GP D4 83.2R004.H8M C C430 2 DY 1 K 5V_S0 TP152 TPAD14-GP P1 P2 P3 P4 P5 P6 14 SKT-SATA7P+6P-59-GP C 62.10065.751 2ND = 62.10065.851 3RD = 62.10065.B01 SATA_TXN1 D8 BAV99PT-GP-U D7 BAV99PT-GP-U 2 1 2 1 2 1 3D3V_S0 83.00099.K11 B 3 DY D6 BAV99PT-GP-U 2 1 DY 3 D5 DY BAV99PT-GP-U DY 3 3 SATA_TXP1 SATA_RXN1 SATA_RXP1 -1 MP 3D3V_S0 3D3V_S0 83.00099.K11 83.00099.K11 3D3V_S0 B 83.00099.K11 A A JV50-TR8 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Date: 5 4 3 2 ODD Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 23 of 63 5 4 3 2 1 BLUETOOTH MODULE D D 1.5A / High Active Voltage 2V 3D3V_S0 3D3V_BT_S0 U68 1 2 3 EC98 DY SCD1U16V2ZY-2GP C920 SC4D7U10V5ZY-3GP OUT GND NC#3 IN 5 EN 4 1 DY 2 BLUETOOTH_EN 36 G5240B1T1U-GP 2 1 3D3V_BT_S0 74.05240.A7F 2ND = 74.09711.A7F 6 EC21 put near BLUE1 / all USB put one choke near connector by EMI request C 4 3 2 USB_5USB_5+ 1 3D3V_BT_S0 USBPN5 USBPP5 12 12 C 5 BT1 ACES-CON4-1-GP-U2 20.D0197.104 2ND = 20.F0984.004 R527 0R0402-PAD 2 1 2 USB_51 USB_5+ 1 3D3V_BT_S0 1 1 AFTE14P-GP AFTE14P-GP AFTE14P-GP TP235 TP236 TP237 R528 0R0402-PAD B B JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title BLUETOOTH Size Document Number Rev JV50-TR8 Date: 5 4 3 2 Thursday, November 12, 2009 -1 Sheet 1 24 of 63 5 4 3 2 1 5V_USB1_S0 USB1 USB1 USB_2USB_2+ 5V_USB1_S0 5V_S5 2 3 4 5 R157 0R0402-PAD U54 SKT-USB-268-GP USB_PW R_EN# 2 3RD = 22.10218.P01 GND VIN VIN EN# 8 7 6 5 VOUT VOUT VOUT FLG# C836 SC4D7U6D3V3MX-2GP 5V_USB1_S0 D USB_OC#0 12 EC84 SCD1U16V2ZY-2GP RT9715DGF-GP 1 22.10321.111 2ND = 22.10218.W51 D 1 2 3 4 1 USBPN2 USBPP2 DY 74.09715.079 2ND = 74.00547.A79 2 12 12 6 1 R156 0R0402-PAD 2 1 2 1 USB2 USB3 2 3 4 5 R134 0R0402-PAD -1_20091019 5V_USB1_S0 SKT-USB-268-GP 22.10321.111 2ND = 22.10218.W51 1 2 2 TC24 EC79 EC83 DY SCD1U16V2ZY-2GP DY SE220U6D3VM-7GP C TC29 SE220U6D3VM-7GP 79.22710.6AL 2ND = 77.92271.021 1 3RD = 22.10218.P01 2 1 100 mil 1 USB_0USB_0+ 2 R133 0R0402-PAD 2 1 2 1 USBPN0 USBPP0 SC1000P50V3JN-GP-U 12 12 2008/11/06 6 1 C USBCN1 17 USB_OC#4 1 TP173 AFTE14P-GP USBPN1 1 TP174 AFTE14P-GP USBPP1 1 TP176 AFTE14P-GP 12 15 14 13 12 11 10 9 8 7 6 5 4 3 2 USB_OC#4 12 12 USBPN1 USBPP1 12 12 USBPN3 USBPP3 36 USB_PW R_EN# 2 DY USBPN0 1 4 2 3 USBPP0 DY AOZ8001J-GP-U1 83.08000.AAE B 1 C837 1 16 2 EC85 SC1U10V3ZY-6GP SCD1U16V2ZY-2GP 1 5V_S5 B 5V_USB1_S0 U14 -1 5V_USB1_S0 ACES-CON15-8-GP-U1 U17 20.F1290.015 1 4 2 3 2ND = 20.F1035.015 USBPN2 3RD = 21.D0214.115 USBPP2 DY AOZ8001J-GP-U1 83.08000.AAE 1.U75 as close to the USB2 as possible 2.U76 as close to the USB1 as possible JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title USB Size Document Number Rev JV50-TR8 Date: 5 4 3 2 Monday, October 26, 2009 -1 Sheet 25 1 of 63 1 36 BIASVDD_G XTALVDDH 23 XTALVDD_G 1 2 3 4 A0 A1 A2 GND 8 7 6 5 VCC WP SCL SDA 68.00217.241 EE_WP SCLK SO 1 BIASVDDH 2XTALVDD_G FCM1608K-601T03GP AT24C02BN-SH-T-GP C939 SCD1U10V2KX-4GP 2BIASVDD_G FCM1608K-601T03GP C44 SCD1U10V2KX-4GP 2 LAN_AVDD LAN_AVDD R27 GPHY_PLLVDDL 2 3D3V_LAN_S0 C56 SCD1U10V2KX-4GP PCIE_PLLVDD 30 27 PCIE_PLLVDDL PCIE_PLLVDDL 33 24 PCIE_VDDL PCIE_VDDL TRD3_N TRD3_P 49 50 TRD2_N TRD2_P 47 46 MDI2MDI2+ 27 27 TRD1_N TRD1_P 43 44 MDI1MDI1+ 27 27 TRD0_N TRD0_P 41 40 LINKLED# SPD100LED# SPD1000LED# TRAFFICLED# 2 1 67 66 MDI3MDI3+ 27 27 MDI0MDI0+ Place PLLVDD/AVDDL CKT as close to chip as possible C48 3D3V_AUX_S5 27 27 C 1 GPHY_PLLVDD 1 R26 2 0R0603-PAD 2 C67 SCD1U10V2KX-4GP 35 68.00217.241 SCD1U10V2KX-4GP AVDDL AVDDL AVDDL 1 2LAN_AVDD 1 2 48 42 FCM1608K-601T03GP 39 45 51 3D3V_S0 1 D C100 SCD1U10V2KX-4GP R20 1 72.24C02.R01 2ND = 72.24C02.M01 68.00217.241 AVDDH AVDDH AVDDL_G AVDDL_G AVDDL_G C 1 U3 R44 1 3D3V_LAN_S5 2 38 52 68 R549 10KR2J-3-GP 1 2 SCD1U10V2KX-4GP SCD1U10V2KX-4GP VDDC_IO VDDC_IO VDDC VDDC VDDC VDDC 3D3V_LAN_S5 3D3V_LAN_S5 CO-Layout BCM5764 and BCM5784 modify BOM :71.05784.M03 2 5 55 13 20 34 60 1 2 2D5V_1D2V_LAN 2 DC#38 DC#52 NC#68 1D2V_LAN_S5 C114 DY 6 56 61 15 19 1 U4 VDDIO VDDIO VDDIO VDDIO VDDIO 2 2 1 1 2 C93 1 2 1 1 C54 SCD1U10V2KX-4GP 2 1 R46 2 0R0603-PAD SCD1U10V2KX-4GP C107 C64 SCD1U10V2KX-4GP D C103 SCD1U10V2KX-4GP SC4D7U6D3V3MX-2GP C110 3D3V_LAN_S5 3D3V_S5 2 1 1D2V_LAN_S5 3 1 4 LAN_AVDD 5 R35 2 1 2 1 2 1 2 1 4 3 2 1 SC4D7U6D3V3MX-2GP R23 1 2GPHY_PLLVDD FCM1608K-601T03GP 2D5V_1D2V_LAN 3D3V_LAN_S5 REGCTL12 14 Q5 REGCTL12 BCP69-GP 1 3D3V_LAN_S5 11 1ST 84.DCP69.01B 2ND = 84.00069.B1B BCM5784MKMLG-GP SRN1KJ-10-GP-U SUPER_IDDQ 16 2 GND VMAINPRSNT LAN_CLKREQ# VAUX_PRESENT 69 8 7 6 5 1 1 DY 71.05784.M03 2 1 A JV50-TR8 C58 Wistron Corporation C73 SCD1U10V2KX-4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title BCM5784MKMLG Size Custom Document Number Rev 4 3 2 -1 JV50-TR8 Date: Monday, October 26, 2009 5 2 1 C51 SC4D7U6D3V3MX-2GP C84 SCD1U10V2KX-4GP 1D2V_LAN_S5 SC10U10V5ZY-1GP RN15 1 2 3 4 1 R28 2PCIE_SDSVDD 0R0603-PAD CLKREQ# 1 3D3V_LAN_S0 2 1K24R2F-GP LAN_CLKREQ# C81 2 R42 1D5R3F-GP A 3 LAN_CLKREQ# C109 RDAC 2 37 C75 SC4D7U6D3V3MX-2GP 1 18 1 R32 2PCIE_PLLVDD 0R0603-PAD 2 1 2 REGOUT12_IO 1 2RDAC XTALO XTALI 1 1 R22 17 SC4D7U6D3V3MX-2GP SC15P50V2JN-2-GP SC15P50V2JN-2-GP C105 VDDC_IO C116 SCD1U10V2KX-4GP 2 22 21 LAN_XI TEST1 TEST2 2 1 X1 XTAL-25MHZ-102-GP 2 1 2 2 C92 1 2D5V_1D2V_LAN 58 57 3 LAN_XO_R 82.30020.851 2ND = 82.30020.791 C112 VAUX_PRSNT VMAIN_PRSNT LOW_PWR SCD1U10V2KX-4GP 12,33,34 SMB_CLK 12,33,34 SMB_DATA 1 0R2J-2-GP R39 1 2 LAN_SMB_CLK R34 10R0402-PAD 2 LAN_SMB_DATA 0R0402-PAD 2 1LAN_X0 R45 200R2J-L1-GP SC4D7U6D3V3MX-2GP 2 2 R47 DY B SCD1U10V2KX-4GP VAUX_PRESENT54 VMAINPRSNT 53 LOW_PWR 3 LOW_PWR C45 C38 ENERGY_DET 36 SCD1U10V2KX-4GP 36 59 1 68.00217.241 B 1 SRN4K7J-10-GP ENERGY_DET C43 C50 2 5 6 7 8 1 SCLK SI SO CS# 2 AVDDL_G FCM1608K-601T03GP 68.00217.241 2 65 63 64 62 R18 1 2 2 SCLK/EECLK SI SO/EEDATA CS# 1D2V_LAN_S5 1 RN104 DY 10KR2J-3-GP 2 TP183TPAD14-GP R40 C115 1 TP61 TPAD14-GP 2 2 UART_MODE EE_WP GPIO0 C72 SCD1U10V2KX-4GP 1 9 7 4 C108 SCD1U10V2KX-4GP DY C117 SC47P50V2JN-3GP UART_MODE GPIO_1/SERIAL_DI GPIO_0/SERIAL_DO PCIE_TXD_P PCIE_TXD_N PCIE_RXD_P PCIE_RXD_N WAKE# PERST# PCIE_REFCLK_P PCIE_REFCLK_N C113 SCD1U10V2KX-4GP LAN_RST 26 25 31 32 12 10 29 28 C98 SC4D7U6D3V3MX-2GP PCIE_RXDP PCIE_RXDN TP59 TPAD14-GP SCD1U10V2KX-4GP 2 C87 2 C96 12,34 PCIE_WAKE# 1 R48 2 0R0402-PAD 3 CLK_PCIE_LAN 3 CLK_PCIE_LAN# 6,9,11,33,36,55 PLT_RST1# ENERGY_DET LAN_ACT_LED# 27 GPIO2 SCD1U10V2KX-4GP SCD1U16V2KX-3GP 1 SCD1U16V2KX-3GP 1 PCIE_RXP1 PCIE_RXN1 PCIE_TXP1 PCIE_TXN1 8 1 2 GPIO_2 8 8 8 8 DY 10KR2J-3-GP 1 C69 SCD1U10V2KX-4GP 3D3V_LAN_S5 10M/100M/1G_LED# 27 2 1 PCIE_SDSVDD Sheet 1 26 of 63 A B C D E LAN Connector 4 1.route on bottom as differential pairs. 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. 3.No vias, No 90 degree bends. 4.pairs must be equal lengths. 5.6mil trace width,12mil separation. 6.36mil between pairs and any other trace. 7.Must not cross ground moat,except RJ-45 moat. LAN_ACT_LED# 10M/100M/1G_LED# 4 DY DY C11 C558 SC1KP50V2KX-1GP SC1KP50V2KX-1GP GIGA Lan Transformer A2(+) A1(-)::GREEN XF1 2D5V_1D2V_LAN XRF_TDC MDI1+ 3 10 26 MDI1- 2 11 26 MDI0+ 5 8 4 9 6 7 1 C31 SCD1U16V2ZY-2GP 2 C39 SCD1U16V2ZY-2GP 2 1 2 0R2J-2-GP 12 26 DY 1 R15 1 26 MDI0- A2(+) A3(-):ORANGE RJ45_3 MCT2 RJ45_6 RJ45_1 LAN Connector MCT1 RJ45_2 RJ45 XFORM-271-GP 26 10M/100M/1G_LED# 1 2 2 C14 MDI3+ 26 MDI3- 26 MDI2+ 26 SCD1U16V2ZY-2GP C16 SCD1U16V2ZY-2GP 1 XF2 26 MDI2- 1 12 3 10 2 11 5 8 4 9 6 7 RJ45_1 RJ45_2 RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8 CONN_PW R2 2 3 4 5 6 7 8 B1 CONN_PW R 1ST 68.HD081.30B 2ND = 68.68160.30B 3 9 A1 A2 A3 1 RJ45_7 MCT4 RJ45_8 3 RJ45_4 MCT3 B2 10 26 LAN_ACT_LED# RJ45_5 RJ45-125-GP-U1 22.10277.021 2ND = 22.10277.231 XFORM-271-GP B1(+) B2(-):YELLOW 1ST 68.HD081.30B 2ND = 68.68160.30B DOC_TIP,DOC_RING,TIP,RING: W/S : 10/100 @ Surface layers 10/20 @ Inner layers 2 2 RN5 8 7 6 5 DY 1 2 3 4 RN77 SRN75J-1-GP SC100P50V2JN-3GP SC100P50V2JN-3GP MCT1 MCT2 MCT3 MCT4 EC60 DY 1 EC11 SRN470J-3-GP 2 CONN_PW R2 CONN_PW R 2 8 7 6 5 1 1 2 3 4 3D3V_LAN_S5 MCT_R JV50-TR8 1 1 1 2 C570 SC1KP2KV6KX-GP Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title LAN CONN Size A3 Date: A B C D Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet E 27 of 63 5 4 3 2 1 1 3D3V_S0 C898 SC10U10V5ZY-1GP D 2 D 5VA_S0 C901 1 RN108 KBC_BEEP_1 1 2 AUDIO_BEEP 4 3 1 AUDIP_PC_BEEP 2 C897 1 1 SRN47K-2-GP-U 2 2 C896 SC100P50V2JN-3GP MIC1-L_PORT-B 21 MIC1-R_PORT-B 22 IMT_MIC1-L 16 IMT_MIC1-R 17 -1 MIC1V_R MIC1V_L RN109 8 7 6 5 1 C915 DMIC_DAT VREF 1 34 13 1 30 C ALC268_SENSE SC22P50V2JN-4GP SENSE_B SENSE_A LFE CENTER LINEOUT_JD# R519 C899 1 2DY 1 2 10KR2F-2-GP LINEIN_JD# R518 1 2 20KR2F-L-GP MIC_JD# 30 30 Sense resistors need close codec SDATA_OUT SDATA_IN SPDIFO1 SPDIFI/EAPD 48 47 SIDESURR_L SIDESURR_R 45 46 SURR_L SURR_R 39 41 FRONTL 29 FRONTR 29 FRONT_L FRONT_R 35 36 SOUNDL 29 SOUNDR 29 AC97_DATIN 1 R517 AUD_SPDIF_OUT ALC_EAPD 2 39R2J-L-GP ACZ_SDATAOUT 12 ACZ_SDATAIN0 12 AUD_SPDIF_OUT ALC_EAPD 29 30 B ALC888S-VC2-GR-GP 71.00888.D0G DMIC_CLK MXM_SPDIF MONO-OUT 1 2 39K2R2F-L-GP 1 1 TP225 TPAD14-GP TP223 TPAD14-GP TP234 TPAD14-GP C917 SCD47U16V3ZY-3GP R521 20KR2F-L-GP 2 C919 SC10U10V5ZY-1GP 2 DY 2 1 1 TP224 2 2 2 C916 MIC1_VREFO_R MIC1_VREFO_L MIC2_VREFO SC4D7U6D3V5KX-3GP TPAD14-GP C914 SC4D7U6D3V5KX-3GP -1 SC4D7U6D3V5KX-3GP SRN2K2J-2-GP 1 MIC2-VREFO 1 1 2 3 4 B 32 28 30 ALC888S MIC1_L MIC1_R MIC2_L MIC2_R R520 1 CD_L CD_R CD_GND 2C905 2C906 2C902 2C904 ACZ_RST# 12,31 ACZ_SYNC 12,31 ACZ_BITCLK 12 5 8 18 20 19 30 INT_MIC 30 AUD_MICIN_L 30 AUD_MICIN_R LINE1_VREFO LINE2_VREFO GPIO0/DMIC_CLK/SPDIFO2 GPIO1/DMIC_DATA 5 6 7MIC1-L_PORT-B_1 SC4D7U6D3V3MX-2GP 1 8MIC1-R_PORT-B_1SC4D7U6D3V3MX-2GP 1 INT_MIC_2 SC1U10V3ZY-6GP 1 SC1U10V3ZY-6GP SRN75J-1-GP 1 29 31 2 3 RN103 4 3 2 1 LINE1_L LINE1_R LINE2_L LINE2_R VREF -1 23 24 14 15 27 ALC861_LINE_IN_L ALC861_LINE_IN_R JDREF 2C907 2C911 1 SC4D7U6D3V3MX-2GP 1 SC4D7U6D3V3MX-2GP 1 AVSS1 AVSS2 DVSS DVSS LINE_IN_L LINE_IN_R 26 42 4 7 30 30 BEEP RESET# SYNC BCLK AGPIO DVDD DVDD_IO AVDD1 AVDD2 U64 44 43 SPKR_SB_1 2 C894 JDREF PIN37_VREFO 1 SCD47U16V3ZY-3GP 2 C893 12 11 10 6 33 ACZ_SPKR 1 SCD47U16V3ZY-3GP 40 37 12 KBC_BEEP 1 R516 2 0R0402-PAD 1 R514 2 0R0402-PAD 1 2 C895 DY SC22P50V2JN-4GP BCLK 1 9 25 38 C 36 SC33P50V2JN-3GP 1 -1 RESET# 2 R515 1K91R2F-1-GP C912 SCD1U10V2KX-4GP C900 SCD1U10V2KX-4GP 2 SC1U10V3KX-3GP C909 SC10U10V5ZY-1GP 2 3D3V_S0 2 1 "VAUX" Pull high to enable standby mode JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 Azalia codec ALC888 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 28 of 63 A B Close to U70.8 Close to U70.18 1 2 1 2 C929 SC1U6D3V2KX-GP 1 C928 SC10U6D3V5KX-1GP 2 1 2 1 2 C927 SCD1U10V2KX-4GP C926 SC1U6D3V2KX-GP Close to Pin9 30 AUD_LIN_R 2 R533 AUD_LIN_L 2 R534 SPKR_EN# MUTE# HP_EN LDO_EN LDO_OUT BIAS LDO_SET 23 25 22 4 29 24 1 AUD_SPK_ENABLE# AMP_MUTE#_R 1 8K2R2F-1-GP 1 8K2R2F-1-GP AUD_LIN_R_1 AUD_LIN_L_1 R535 2 R537 1 R536 2 2 0R0402-PAD 1 0R2J-2-GP DY 1 SOUNDR SOUNDL 28 28 MAX9789A_SHDN# AMP_SHUTDOW N# 36 1 5V_S0 100KR2J-1-GP C937 SC4D7U6D3V3MX-2GP C938 1AUD_CPVSS 2 1 2 R540 0R0402-PAD +5V_SPK_AMP R538 2 5VA_S0 AUD_BIAS AUD_SET 2C931 SC1U10V3KX-3GP 2C932 SC1U10V3KX-3GP 1 1 1 100KR2J-1-GP DY AMP_REGEN 74.09789.B13 2 4 C930 SC1U6D3V2KX-GP VDD 9 GND GND 28 33 21 5 MAX9789CETJ-GP 2 3 C936 SC1U10V3KX-3GP GAIN1 GAIN2 DY 2 SC1U10V3KX-3GP 2 31 32 C925 SC1U6D3V2KX-GP 1 HP_INR HP_INL 3 17 2 AUD_AMP_GAIN1 AUD_AMP_GAIN2 26 27 C933 1 1 R539 2K2R2J-2-GP SPKR_INR SPKR_INL PVSS HPR HPL CPVSS 15 16 AMP_C1P AMP_C1N 14 SPKR_R+1 SPKR_L+1 AUD_HP1_OUT_R2 AUD_HP1_OUT_L2 DY 10 12 C1P C1N 13 OUTL+ OUTLOUTROUTR+ HPVDD 6 7 19 20 PGND PGND C934 SC1U25V3KX-1-GP 30 SPKR_R+1 30 SPKR_L+1 SPKR_L+ SPKR_LSPKR_RSPKR_R+ CPGND FRONTR FRONTL SPKR_L+ SPKR_LSPKR_RSPKR_R+ 11 30 30 30 30 CPVDD PVDD PVDD 8 18 1 2 1 DY U70 28 28 E +5V_SPK_AMP +5V_SPK_AMP C924 SC1U10V3KX-3GP 2 60ohm 100MHz 3000mA 0.05ohm DC C923 SCD1U10V2KX-4GP 1 4 SC1U25V3KX-1-GP 2K2R2J-2-GP C935 R541 1 2 AUD_HP1_OUT_R1 1 2 1 2 AUD_HP1_OUT_L1 1 2 D +5V_SPK_AMP 2 R532 1 0R0603-PAD 2 +5V_SPK_AMP C922 SC10U6D3V5KX-1GP 5V_S0 C 3 SC1U10V3KX-3GP GAIN SETTING AMP_SHUTDOW N# 36 2 +5V_SPK_AMP AUD_AMP_GAIN2 2 2 DY 2 DY R542 100KR2J-1-GP R548 100KR2J-1-GP 3 2 1 R547 100KR2J-1-GP R544 MAX9789A_SHDN# 1 AUD_SPK_ENABLE# GAIN 0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB 3D3V_S0 DY . GAIN2 . . . . GAIN1 G 2 10KR2J-3-GP U71 AMP_MUTE#_R 2 D32 BAW 56-3-GP R543 0R0402-PAD 1 2 1 DY AUD_AMP_GAIN1 ALC_EAPD 1 28 R546 100KR2J-1-GP 1 R545 100KR2J-1-GP 2 2 Signal inverter for speaker shutdown 1 1 +5V_SPK_AMP D S 2N7002E-1-GP 84.2N702.D31 2ND = 84.2N702.E31 JV50-TR8 1 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title AUDIO AMP Size Document Number Rev -1 JV50-TR8 Date: A B C D Monday, October 26, 2009 Sheet E 29 of 63 5 4 3 2 1 LINE IN Internal Speaker LIN1 D 28 RN107 SPKR_LSPKR_L+ SPKR_RSPKR_R+ SPKR_LSPKR_L+ SPKR_RSPKR_R+ 28 28 2 1 LINE_IN_R LINE_IN_L LINEIN_JD# LINE_IN_R_CONN 3 4 LINE_IN_L_CONN D METAL 29 29 29 29 NP2 NP1 5 4 3 6 2 1 SPKR_R- ACES-CON2-12-GP-U 20.F1240.002 1 1 R512 R513 DY 2 4 PHONE-JK329-GP-U EC96 1ST 22.10133.I51 2ND = 22.10088.H21 3RD = 22.10133.I41 MLVG04023R0QV05-GP SPKR_R+ EC97 2 SPKR_R1 3 1 MLVG04023R0QV05-GP 2 2 2 DYDY 10KR2J-3-GP 10KR2J-3-GP 1 1 SRN75J-2-GP-U DY 2ND = 20.F1561.002 SPKR_L1 -1 3 1 SPKR_L+ SPKR_L- MIC IN MICIN1 2 4 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP TP164 TP158 TP154 TP163 TP155 TP168 TP166 TP165 INT_MIC_1 1 AFTE14P-GP TP4 LINEIN_JD# 1 AFTE14P-GP TP172 LINE_IN_R_CONN 1 AFTE14P-GP TP171 LINE_IN_L_CONN 1 AFTE14P-GP TP170 DYDY R498 R500 1 1 1 1 1 1 1 1 1 EC94 C EC95 DY MLVG04023R0QV05-GP 2 AUD_SPDIF_OUT 5V_SPDIF_S0 LINEOUT_JD# LOUT_R+1 LOUT_L+1 MIC_JD# AUD_MICIN_R_2 AUD_MICIN_L_2 10KR2J-3-GP 10KR2J-3-GP 2 2 B AUD_MICIN_R_2 3 4 SRN0J-10-GP-U AUD_MICIN_L_2 MLVG04023R0QV05-GP 2 1 28 AUD_MICIN_R 28 AUD_MICIN_L MIC_JD# 1 RN41 -1 28 DY 2 1 2ND = 20.F1561.002 1 1 2 ACES-CON2-12-GP-U 20.F1240.002 DY SC100P50V2JN-3GP 2 DY SC100P50V2JN-3GP SC100P50V2JN-3GP SC100P50V2JN-3GP 2 DY EC68 NP2 NP1 5 4 3 6 2 1 METAL DY EC67 2 EC2 1 1 EC1 1 C PHONE-JK330-GP 1ST 22.10133.I61 2ND = 22.10088.H11 3RD = 22.10133.I21 INT MIC B -1 AMIC1 3 1 INT_MIC_1 1 ER1 2 0R0402-PAD ACES-CON2-12-GP-U LOUT1 28 AUD_SPDIF_OUT 5V_SPDIF_S0 C B A DRIVE IC 74.05240.B7F 2ND = 74.09711.07F 69.80024.011 TX U56 MLVG0402220NV05BP-GP-U EC58 20.F1240.002 2ND = 20.F1561.002 NP2 NP1 2 LINE OUT INT_MIC 28 1 2 4 -1 LED NC#3 GND OUT 3 2 1 28 5V_SPDIF_S0 A 1 2 LINEOUT_JD# C853 SCD1U16V2ZY-2GP DY EC104 EC105 DY DY R472 2 1R551 1R550 SPKR_L+1 SPKR_R+1 MLVG04023R0QV05-GP 2 DY G5240B2T1U-GP-U 2 C851 SCD1U16V2ZY-2GP 29 29 1 IN 1 0R2J-2-GP MLVG04023R0QV05-GP 2 EN# 5 1 4 LOUT_L+1 2 LOUT_R+1 2 76D8R3F-2-GP 76D8R3F-2-GP 5 4 3 2 1 7 6 METAL 5V_S0 1 LINEOUT_JD# JV50-TR8 PHONE-JK332-GP DY 1ST 22.10133.H91 Wistron Corporation 2ND = 22.10257.091 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 3RD = 22.10133.I31 Title AUDIO JACK Size Document Number Rev -1 JV50-TR8 Date: 5 4 3 2 Monday, October 26, 2009 Sheet 30 1 of 63 A 5 4 3 MDC 1.5 CONN 1 -1 D 1 D 2 1 R244 2 0R0402-PAD 1 ACZ_BTCLK_MDC 12 1 R243 C541 DUMMY-C2 13 14 15 2 C540 SC4D7U6D3V5KX-3GP 2 C536 SC100P50V2JN-3GP 2 DY ACZ_BTCLK_MDC_1 -1 TYCO-CONN12A-2-GP-U1 20.F0917.012 2ND = 20.F0604.012 -1 3D3V_S5 100KR2J-1-GP -1 C534 SC22P50V2JN-4GP 3D3V_S5 1 4 6 8 10 12 17 18 C539 SC4D7U6D3V5KX-3GP 2 3 5 R437 1 ACZ_SYNC_A 2 7 0R0402-PAD R245 1 ACZ_SDATAIN1_A 2 9 33R2J-2-GP 11 1 R438 2ACZ_RST#_MDC NP2 0R0402-PAD 16 1 15 14 2 2 12,28 ACZ_RST# 13 NP1 1 1 12,28 ACZ_SYNC 12 ACZ_SDATAIN1 ACZ_SDATAOUT_MDC 1 12 ACZ_SDATAOUT_MDC 2 MDC1 2 11 12 16 17 18 C C B B JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title MDC Size Document Number Rev JV50-TR8 Date: 5 4 3 2 Monday, October 26, 2009 -1 Sheet 1 31 of 63 5 4 2 1 3D3V_D_S0 XD_CD# SD_WP SD_CD# SD_DAT1/XD_D4 XD_D5/MS_BS XD_D3/MS_D1 SD_DAT0/XD_D6/MS_D0 SD_DAT7/XD_D2/MS_D2 MS_INS# SD_DAT6/XD_D7/MS_D3 SD_CLK/XD_D1/MS_CLK SD_DAT5/XD_D0 SD_DAT4/XD_WP# XD_R/B# SD_DAT3/XD_WE# SD_DAT2/XD_RE# XD_ALE XD_CE# XD_CLE 3D3V_S0 3 1 R487 2 0R0603-PAD -1 D 2 CARD_3D3V_S0 D 1 DY C876 SC1U10V3KX-3GP CARD_3V3 1 AV_PLL VREG MODE_SEL SD_CMD GPIO0 RREF RST# NC#30 NC#7 NC#3 30 7 3 GND GND GND GND 6 12 32 46 EEDO EEDI C 71.05159.00G 15 18 EESK EECS 17 16 -1 USBPN10 1 R496 2 0R0402-PAD 1 R495 2 0R0402-PAD USB_10+ XDAL_CTR USBPP10 12 USB_10- 12M_XO C858 SC33P50V2JN-3GP 12 1 R485 2 0R0402-PAD 3D3V_D_S0 SB B 45 36 14 2 44 24 22 2 1 DY 1 R482 2 2 C864 SC47P50V2JN-3GP 0R0402-PAD 2 1 -1 1 R474 100KR2J-1-GP -1 MODE_SEL SD_CMD K VBUS_LED R494 LED-W -23-GP 1 2 RREF 6K19R2F-GP RST# 1 R480 2 0R0402-PAD LED1 ADY MODE_SEL DY 1 R479 2RST# 0R0402-PAD D3V3 D3V3 5 4 1 3D3V_D_S0 33 11 C852 SCD1U16V2ZY-2GP XTLO XTLI C DY XTAL_CTR 1 R484 2 VBUS_R 68R2F-GP DY -1 DP DM DY 3D3V_S0 11,33,34,37 PLT_RST1#_B 3V3_IN MS_D5 MS_D4 2 2 C873 SCD1U16V2ZY-2GP 1 2 3D3V_D_S0 C875 SCD1U16V2ZY-2GP 1 2 C871 SC4D7U6D3V5KX-3GP VREG 8 3V_VBUS_S0 1 1 R491 2 0R0603-PAD 3D3V_S0 10 47 48 1 R493 2 0R0402-PAD -1 9 AV_PLL 1 VREG C874 SCD1U16V2ZY-2GP 13 2 2 -1 1 C872 SC1U10V3KX-3GP SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9 SP10 SP11 SP12 SP13 SP14 SP15 SP16 SP17 SP18 SP19 19 20 21 23 25 26 27 28 29 31 34 35 37 38 39 40 41 42 43 U58 RTS5159-GR-GP -1 3 -1 1 R486 2 0R0402-PAD CLK48_5158E 12M_XO B 5 IN1 CARD-READER (SD/MMC/MS/MS PRO/XD) CARD_3D3V_S0 1 -1 C881 SCD1U16V2ZY-2GP 2 2 C880 SC4D7U6D3V5KX-3GP 1 CARD1 DY SD_DAT5/XD_D0 2 0R0402-PAD 1 R506 XD_D3/MS_D1 2 0R0402-PAD 1 R502 SD_DAT4/XD_W P# A SD_DAT0/XD_D6/MS_D0_1 SD_DAT1/XD_D4_1 DY SD_DAT2/XD_RE#_1 DY SD_DAT3/XD_W E#_1 DY SD_W P DY SD_CD# DY SD_CMD_1 DY SD_CLK/XD_D1/MS_CLK DY DY 5 EC88 EC90 EC92 EC89 EC93 EC91 EC86 EC87 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 23 14 33 SD_VCC MS_VCC XD_VCC SD_DAT5/XD_D0_1 SD_CLK/XD_D1/MS_CLK SD_DAT7/XD_D2/MS_D2_1 XD_D3/MS_D1_1 SD_DAT1/XD_D4_1 XD_D5/MS_BS_1 SD_DAT0/XD_D6/MS_D0_1 SD_DAT6/XD_D7/MS_D3_1 8 9 26 27 28 30 31 32 XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7 XD_R/B# SD_DAT2/XD_RE#_1 XD_CE# XD_CLE XD_ALE SD_DAT3/XD_W E#_1 SD_DAT4/XD_W P#_1 XD_CD# 1 2 3 4 5 6 7 34 XD_R/B XD_RE XD_CE XD_CLE XD_ALE XD_WE XD_WP XD_CD_SW CARD_3D3V_S0 1 R505 2 0R0402-PAD NP1 NP2 SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3 25 29 10 11 SD_DAT0/XD_D6/MS_D0_1 SD_DAT1/XD_D4_1 SD_DAT2/XD_RE#_1 SD_DAT3/XD_W E#_1 R471 R475 R476 R473 1 10R0402-PAD 10R0402-PAD 10R0402-PAD 0R0402-PAD 1 0R0402-PAD SD_DAT0/XD_D6/MS_D0 SD_DAT1/XD_D4 SD_DAT2/XD_RE# SD_DAT3/XD_W E# SD_CMD SD_CLK SD_CD_SW SD_WP_SW 12 24 36 35 SD_CMD_1 SD_CLK/XD_D1/MS_CLK SD_CD# SD_W P R470 2 MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3 19 20 18 16 SD_DAT0/XD_D6/MS_D0_1 XD_D3/MS_D1_1 SD_DAT7/XD_D2/MS_D2_1 SD_DAT6/XD_D7/MS_D3_1 R501 2 R507 2 10R0402-PAD 10R0402-PAD SD_DAT7/XD_D2/MS_D2 SD_DAT6/XD_D7/MS_D3 MS_BS MS_INS MS_SCLK 21 17 15 XD_D5/MS_BS_1 MS_INS# SD_CLK/XD_D1/MS_CLK R503 2 10R0402-PAD XD_D5/MS_BS 4IN1_GND 4IN1_GND 4IN1_GND 4IN1_GND 13 22 38 37 2 2 2 2 SD_CMD JV50-TR8 A NP1 NP2 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. CARD-PUSH-36P-5-GP-U Title 20.I0081.011 CARDREADER- RTS5159 Size 2ND = 20.I0109.001 Document Number Rev -1 JV50-TR8 Date: 4 3 2 Monday, October 26, 2009 Sheet 1 32 of 63 A B C Mini Card Connector(WLAN) D E Mini Card Connector(Robson2 and 3G) 3D3V_S0 3D3V_S5 3D3V_S0 DY R331 0R2J-2-GP 4 2 2 2 2 53 NP1 1 R336 0R2J-2-GP R297 0R2J-2-GP MINI1 4 DY 1 R296 0R2J-2-GP 7.3/9.2mm 1 1 1 3D3V_S5 1D5V_S0 MINI3_PW R 2 MINI2_PW R 1D5V_S0 1 3 W LAN2_CLKREQ# 2 MINI2 53 NP1 1 2 W LAN_CLKREQ#_1 0R2J-2-GP DY 1 36 36 R312 10KR2J-3-GP 1 DY 2 PLT_RST1#_MINI2 1 2 R300 100R2J-2-GP SMB_CLK_MINI2 SMB_DATA_MINI2 1 2 R310 1 R307 0R0402-PAD 1 0R0402-PAD 2 2SCD1U16V2KX-3GP SCD1U16V2KX-3GP E51_RxD E51_TxD 36 36 8 8 3 E51_RxD E51_TxD C550 1 C549 1 PCIE_RXN2 PCIE_RXP2 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 NP2 54 RXN2 RXP2 2 DY SCD1U16V2KX-3GP SCD1U16V2KX-3GP DY 2 8 PCIE_TXN2 8 PCIE_TXP2 3D3V_MINI 5V_S5 R241 1 2 0R0402-PAD 5V_S5_MIN2 DY 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 -1_20091022 C639 SC100P50V2JN-3GP W IRELESS2_EN 36 PLT_RST1# 6,9,11,26,36,55 RN78 1 3 CLK_PCIE_MINI1# 3 CLK_PCIE_MINI1 4 6 8 10 12 14 16 2E51_RxD_1 17 18 2E51_TxD_1 19 20 21 22 C631 1 RXN3 23 24 8 PCIE_RXN3 C628 1 RXP3 25 26 8 PCIE_RXP3 27 28 C552 29 30 SC100P50V2JN-3GP DY 10KR2J-3-GP 31 32 8 PCIE_TXN3 1 33 34 DY 2 8 PCIE_TXP3 R252 35 36 37 38 W IRELESS_EN 36 PLT_RST1#_MINI1 R289 1 2 1 23D3V_S0_MIN1_1 39 40 3D3V_S0 PLT_RST1#_B 11,32,34,37 R251 0R2J-2-GP 0R2J-2-GP 41 42 1 2 43 44 DY 3D3V_S5 RN72 SRN33J-5-GP-U R290DY 0R2J-2-GP 45 46 SMB_CLK_MINI1 1 4 47 48 DY SMB_CLK 12,26,34 SMB_DATA_MINI1 2 3 49 50 SMB_DATA 12,26,34 R280 5V_S5_MIN1 1 2 51 52 5V_S5 USBPN7_1 0R0402-PAD 1 DY 2 NP2 USBPN7 12 USBPP7_1 R248 0R2J-2-GP 1 2 54 USBPP7 12 R246DY 0R2J-2-GP LED_W W AN# TP169 TPAD14-GP 1 SKT-MINI52P-20-GP W LAN_LED#_MC 41 4 6 8 10 12 14 16 2 3 5 7 9 11 13 15 R620 1 3 W LAN_CLKREQ# 2 W LAN2_CLKREQ#_1 0R2J-2-GP 3 CLK_PCIE_MINI2# 3 CLK_PCIE_MINI2 R250 0R0603-PAD 2 3 5 7 9 11 13 15 R629 2 3D3V_MINI 3D3V_MINI 1 H=6.0/8.0mm USBPN4_1 USBPP4_1 1 R292 1 R291 LED_W W AN2# 1 4SRN33J-5-GP-U 3 DY SMB_CLK 12,26,34 SMB_DATA 12,26,34 2 0R0402-PAD 2 0R0402-PAD TP15 TPAD14-GP USBPN4 12 USBPP4 12 W LAN2_LED#_MC 41 3 20.F1117.052 2ND = 62.10043.391 SKT-MINI52P-13-GP 1ST 20.F1517.052 2ND = 62.10043.511 SB 2 2 3D3V_S0 R239 0R2J-2-GP 1 DY 2 3D3V_S5 R240 0R2J-2-GP 1 DY 2 3D3V_MINI Place near MINI2 3D3V_S0 1D5V_S0 C538 SCD1U16V2ZY-2GP 1 DY 2 C530 SCD1U16V2ZY-2GP 1 DY 2 1 1 2 DY C553 SC1U10V3ZY-6GP DY DY 2 2 TC13 DY ST100U6D3VBM-8GP C522 SCD1U16V2ZY-2GP 1 C519 SC1U10V3ZY-6GP 1 2 2 DY SCD1U16V2ZY-2GP 1 3D3V_MINI C521 Place near MINI1 3D3V_S0 1D5V_S0 MINI2_PW R -1 1 SCD1U16V2ZY-2GP 1 C630 2 1 2 C594 SCD1U16V2ZY-2GP 2 C658 SC1U10V3ZY-6GP 1 C667 SCD1U16V2ZY-2GP TC20 ST100U6D3VBM-8GP 2 1 DY 2 SC10U6D3V5KX-1GP 2 1 C618 1 JV50-TR8 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title MINI CARD Size B C Rev -1 JV50-TR8 Date: A Document Number D Monday, October 26, 2009 Sheet E 33 of 63 5 4 3 2 1 NEWCARD Connector NEW 2 DY 1 2 D D CARDBUS2P-21-GP-U 21.H0182.001 3D3V_S5 NEW 1 21 20 19 18 17 16 12,36,48 PM_SLP_S5# 12,35,36,42,44,49,53,54 1 2 3 4 5 PM_SLP_S3# 3D3V_S0 3D3V_NEW _S0 3D3V_S0 3D3V_NEW _S0 STBY# 3_3VIN 3_3VOUT NC#4 NC#5 SYSRST# GND PERST# CPUSB# CPPE# GND SHDN# OC# RCLKEN AUXIN NC#16 U26 AUXOUT NC#14 NC#13 1_5VIN 1_5VOUT 15 14 13 12 11 3D3V_NEW _LAN_S5 1D5V_S0 1D5V_NEW _S0 1D5V_S0 1D5V_NEW _S0 DY C W 83L351YG-GP 6 7 8 9 10 C NP2 26 25 8 PCIE_TXP5 24 8 PCIE_TXN5 23 DY C532 1 2 SCD1U16V2KX-3GP RXP5 22 8 PCIE_RXP5 C531 SCD1U16V2KX-3GP RXN5 1 2 21 8 PCIE_RXN5 20 DY 19 3 CLK_PCIE_NEW 3D3V_NEW _S0 18 3 CLK_PCIE_NEW # CPPE# 17 12 CPPE# NEW _PIN16 16 TP167 15 14 3D3V_NEW _LAN_S5 TPS2231_PERST# 13 12 PCIE_W AKE#_NEW 1DY 2 11 12,26 PCIE_W AKE# R226 0R2J-2-GP 10 1D5V_NEW _S0 RN64 9 1 4 SMB_DATA_NEW 8 DY 12,26,33 SMB_DATA 2 3 SMB_CLK_NEW 7 12,26,33 SMB_CLK SRN33J-5-GP-U CONN_TP1 6 TP162 CONN_TP2 5 TP161 CPUTSB# 4 DY R210 1 USBPP9_1 2 0R2J-2-GP 3 12 USBPP9 R207 1 USBPN9_1 2 0R2J-2-GP 2 12 USBPN9 DY 1 NP1 DY R242 PLT_RST1#_NEW CARD 2 1 0R2J-2-GP 11,32,33,37 PLT_RST1#_B 3D3V_S5 TPS2231_PERST# 2 DY RN71 CPUTSB# 2 CPPE# 1 1 DY C533 SC100P50V2JN-3GP DY 3 4 SRN100KJ-6-GP 74.83351.073 CARDBUS26P-20GP-U 62.10081.131 Place them Near to Connector DY DY DY 1 C503 3D3V_NEW _LAN_S5 2 1 2 2 DY C510 SC1U10V3ZY-6GP SCD1U16V2ZY-2GP B 1 C518 C520 SC1U10V3ZY-6GP 1D5V_NEW _S0 2 1 1 3D3V_NEW _S0 SCD1U16V2ZY-2GP DY C543 SCD1U16V2ZY-2GP 2 1 3D3V_S0 2 Place them Near to Chip C512 SCD1U16V2ZY-2GP B DY JV50-TR8 Wistron Corporation A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title NEW CARD Size Document Number Rev -1 JV50-TR8 Date: 5 4 3 2 Monday, October 26, 2009 Sheet 1 34 of 63 A 5 4 3 2 FAN1_VCC 5V_S0 2 2 C670 DY SC2200P50V2KX-2GP 1 D20 BAS16PT-GP R9 2 C679 SC4D7U6D3V5KX-3GP DY 1 3 1 1 *Layout* 15 mil C669 SCD1U16V2ZY-2GP 1 FAN1_VCC 2 1 10KR2J-3-GP D AFAN1 2 D 83.00016.F11 2ND = 83.00016.B11 5 FAN1_FG1 3 2 1 1 4 C18 SC1KP50V2KX-1GP *Layout* 15 mil 2 ACES-CON3-GP-U1 20.F0714.003 2ND = 20.D0246.103 5V_S0 U2 RUNPW ROK 5 17 SGND1 SGND2 SGND3 8 10 12 G792_DXN2 G792_DXN3 1 2 G1 GAP-CLOSE G792SFUF-GP 74.00792.A79 DXP1:108 Degree DXP2:H/W Setting DXP3:88 Degree 12,34,36,42,44,49,53,54 4 PM_SLP_S3# 6 32KHZ R7 10R2J-2-GP 1 2 C551 Q11 MMBT3904-4-GP B SC470P50V3JN-2GP SC2200P50V2KX-2GP C702 84.T3904.C11 SC2200P50V2KX-2GP 2ND = 84.03904.L06 G2 C 84.T3904.C11 2ND = 84.03904.L06 2.H/W Shutdown H_THERMDA 6 Place near chip as close as possible C20 SC2200P50V2KX-2GP H_THERMDC 6 G792_32K 1.For CPU Sensor 5 RTC_CLK 7 11,15 U16B Q23 MMBT3904-4-GP B C8 2 14 3D3V_S5 C C17 GAP-CLOSE R10 49K9R2F-L-GP DGND DGND E 2 1 42 ALERT# THERM# THERM_SET RESET# 3.System Sensor, Put Plamrest. G792_DXP2 G792_DXP3 SC470P50V3JN-2GP 15 13 3 2 V_DEGREE SMBD_Therm 36,56 SMBC_Therm 36,56 C ALERT# T8_HW _SHUT# G792_32K E 13 1 4 14 16 18 19 1 DXP1 DXP2 DXP3 FAN1 FG1 CLK SDA SCL NC#19 2 7 9 11 SCD1U16V2ZY-2GP C T8=90 VCC DVCC 1 2 2 1 2 1 R11 21KR2F-GP 6 20 2 C10 SCD1U16V2ZY-2GP 1 1 1 C9 DY 2 C24 SC1U10V3ZY-6GP C12 SC4D7U6D3V3MX-2GP 2 1 1 2 R12 10R2J-2-GP 5V_G792_S0 1 *Layout* 30 mil 2 5V_S0 TSLVC08APW -1-GP 32K suspend clock output BL3# 73.07408.L16 2ND = 73.07408.L15 3RD = 73.07408.02B 5V_AUX_S5 DCBATOUT 5V_AUX_S5 B U43 HW thermal shut down tempature setting 95 degree . Put Near SB. LOW 3_OFF G680LT1UF-GP 1 1 5 HYST 4 G709_VCC SB_TH_HYST G709T1UF-GP 1 174KR2F-GP RSMRST# 6,36 R314 0R2J-2-GP DY OUT#: Hi active / mount R1110 Low active / mount R1108 2 1 VCC DY R337 D18 BAW 56-7-F-GP 3D3V_AUX_S5 3 U39 C646 SCD1U16V2ZY-2GP 1 2 3 36,52 S5_ENABLE 2 A DY SET GND DY OUT# R309 0R2J-2-GP DY 2 1 1 2 DY 2 2 3 R322 0R0402-PAD D17 BAT54-4-GP 1 2 3 HTH -1 1 R311 10KR2J-3-GP 2 SB_THSET 18KR2F-GP T8_HW _SHUT# DY 2 3D3V_AUX_S5 DY 1 C645 SCD01U16V2KX-3GP U38 R321 2 DY R338 6K04R2F-GP 2 T8_HW _SHUT# 1 LTH 1 1 2 3 2 HTH DY GND RESET#/RESET LTH R308 150R2J-L1-GP-U 5V_AUX_S5 1 VCC 4 1MR2F-GP 2 5 DY DY R330 HTH 2 DY 2 C656 SCD1U16V2ZY-2GP 1 1 1 B HW Thermal Throttling A B GND VCC 5 Y 4 DY S5PW R_ENABLE 46 D34 NC7S08M5X-NL-GP 2 1 R298 2 1KR2J-1-GP 6,36 RSMRST# 1 1ST 83.R2003.E81 4 3 Wistron Corporation 3V5V_ENABLE 46 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 3 KBC_THERMTRIP# 36 BAT54C-7-F-GP 5 A JV50-TR8 Title G792 Size 2ND = 83.BAT54.081 3RD = 83.00054.X81 2 A3 Date: Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 35 of 63 5 4 3 THERMAL-----> 68 67 69 70 35,56 SMBD_Therm 35,56 SMBC_Therm 50,51 BAT_SDA 50,51 BAT_SCL BATTERY-----> 3D3V_S0 R112 10KR2J-3-GP 1 2 E51_RxD 39 24 BLUETOOTH_EN 19 DBC_EN 33 W IRELESS_EN 41 W LAN_TEST_LED DY DBC_EN SP GPIO66/G_PWM RN88 1 2 4 3 33 33 E51_TxD DBC_EN GPIO77 GPIO76/SHBM GPIO75 GPIO81 111 113 CCD_ON 112 E51_TxD E51_RxD TPAD14-GP SRN10KJ-5-GP 84 83 82 91 DC_BATFULL114 LCD_CB_SEL 14 15 GPIO16 GPIO34 GPIO36 GPIO34 and GPIO46 swap VCORF 44 GPIO SER/IR PM_SLP_S3# 12,34,35,42,44,49,53,54 KBC_PW RBTN# 40 AC_IN# 50 LID_CLOSE# 40 SB_ID Volume_up# 1 1 37 37 37 37 2 TPDATA TPCLK SPIDI SPIDO SPICS# SPICLK MODEL_ID0 GPIO12/PSDAT3 GPIO25/PSCLK3 GPIO27/PSDAT2 GPIO26/PSCLK2 GPIO35/PSDAT1 GPIO37/PSCLK1 86 87 90 92 F_SDI F_SDO F_CS0# F_SCK UMA_DISCRETE# LOW _PW R ENERGY_DET Prevent KROW 0 KROW 1 KROW 2 KROW 3 KROW 4 KROW 5 KROW 6 KROW 7 1 1 1 1 1 1 1 1 TP48 TP35 TP49 TP36 TP50 TP37 TP51 TP52 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP C AFTE14P-GP VCC_POR# 85 ECRST# R478 2 1 ECRST# 10KR2J-3-GP 1 KA20GATE 10KR2J-3-GP Q7 1 KBRCIN# 10KR2J-3-GP RSMRST#_R 1 B 10KR2J-3-GP MMBT3906-4-GP R497 2 R1315 2 RSMRST# C731 84.T3906.A11 2ND = 84.03906.F11 74.00690.I7B 2 GND 3D3V_AUX_S5 DY DY 1 R71 3 VCC RESET# 2 0R2J-2-GP B D2 12 ECSCI#_1 6 1 5 2 4 3 ECSCI#_KBC PU-UMA 1 R384 2 0R2J-2-GP GMCH_BL_ON 9 12 ECSW I# for TR ECSW I#_KBC CH731UAPT-GP 83.R0304.B8H 2ND = 83.R2002.B8E PlanarID (1,0) SA: 0,0 -1: 0,1 -1: 1,0 -2: 1,1 3D3V_S0 R114 10KR2J-3-GP 8 7 6 5 LOW _PW R 1 2KBC_THERMTRIP# 3 ENERGY_DET 4 DY 1 R88 2 0R2J-2-GP 3D3V_S0 SRN10KJ-6-GP 2 R115 10KR2J-3-GP 2 DY 3D3V_S5 3D3V_AUX_S5 3D3V_S5 S5_ENABLE 1 1 RN89 JV50-TR8 1 A R258 10KR2J-3-GP 1 1 R393 10KR2J-3-GP R116 10KR2J-3-GP R113 DY 10KR2J-3-GP Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 2 DIS Title CRT_DEC# Size A3 20.K0382.026 2ND = 20.K0320.026 Date: 4 54 55 56 57 58 59 60 61 PS/2 SPI_W P# 37 PCB_VER1 PCB_VER0 R380 10KR2J-3-GP KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 KBC BIOS data loss solution -1_20091026 G690L293T73UF-GP MODEL_ID0 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP FIU 6,35 GND GND GND GND GND GND For TR8 For TR TP39 TP27 TP40 TP28 TP41 TP29 TP42 TP30 TP43 TP31 TP44 TP32 TP45 TP33 TP46 TP25 TP47 TP34 R483 2 LOW _PW R 26 ENERGY_DET 26 BT_LED 41 USB_PW R_EN# 25 SPI_W P_R# 2 R76 1 0R0402-PAD Internal KeyBoard Connector KBSOUT0/JENK# KBSOUT1/TCK KBSOUT2/TMS KBSOUT3/TDI KBSOUT4/JEN0# KBSOUT5/TDO KBSOUT6/RDY# KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62 KBSOUT15/GPIO61/XOR_OUT GPIO60/KBSOUT16 GPIO57/KBSOUT17 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 3D3V_AUX_S5 TP86 TPAD14-GP TP_LOCK_LED 41 BLON_OUT 19 D KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17 3D3V_S0 MODEL_ID1 SPI_W P_R# 1 10KR2J-3-GP DY W PCE773LA0DG-GP FRONT_PW RLED 41 STDBY_LED 41 CAP_LED 39 AD_OFF 51 RSMRST#_KBC 42 PM_SLP_S5# 12,34,48 CHARGE_LED 41 PTW O-CON26-4-GP 5 13 12 11 10 71 72 R66 53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33 TP109 TPAD14-GP Volume_up# 39 W IRELESS2_EN 33 2 28 BECKUP# 40 BECKUP# 39 POW ER CONSUMPTION_LED# 41 L-line_LED 39 POW ER CONSUMPTION# KBC_THERMTRIP# 35 38 TPDATA 38 TPCLK CRT_DEC# 20 PCB_VER0 PCB_VER1 BLON_IN UMA_DISCRETE# GPIO14/TB1 GPIO20/TA2 GPIO56/TA1 GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM W PCE773LA0DG-GP 2 KROW 0 KROW 1 KROW 2 KROW 3 KROW 4 KROW 5 KROW 6 KROW 7 32KX2 GPIO55/CLKOUT 63 117 Volume_down# 31 32 118 62 KBC_CIR 1105 TP189 TPAD14-GP FP_DETECT# 38 RSMRST# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 2 1 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17 KBC_XO_R 2 2 1105 AD_IA 50 TP_LOCK_BTN# 40 W IRELESS_BTN# 40 BT_BTN# 40 TP63 12,52 PM_PW RBTN# 39 Volume_down# 28 KBC_BEEP 12 EC_TMR 19 BRIGHTNESS U86 5 18 45 78 89 116 AGND 71.00773.00G 1 A KCOL0 1 1 1 2 2 2 2 TPAD14-GP 1 103 KB1 27 79 30 KBC_XO VCORF 2 C146 SCD1U16V2ZY-2GP 2 2 1 1 1 1 1 64 95 93 94 119 6 109 120 65 66 16 17 20 21 22 23 24 25 26 27 28 73 74 75 110 32KX1/32KCLKIN 29 AMP_SHUTDOW N# 1 B SPI GPO83/SOUT_CR/BADDR1 GPIO87/SIN_CR GPO84/BADDR0 TP110 41 DC_BATFULL 19 LCD_CB_SEL 35,52 S5_ENABLE GPIO01/TB2 GPIO03 GPIO06 GPIO07 GPIO23 GPIO24 GPIO30 GPIO31 GPIO32/D_PWM GPIO33/H_PWM GPIO40/F_PWM GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO45/E_PWM GPIO46/TRST# GPIO47 GPIO50/TDO GPIO51 GPIO52/RDY# GPIO53 GPIO70 GPIO71 GPIO72 GPO82/TRIS# 77 1 19 46 76 88 115 VCC VCC VCC VCC VCC 102 4 VDD AVCC SMB 2 KBC_XI 10MR2J-L-GP 1 R85 2 2 OF 2 U6B 82.30001.691 2ND = 82.30001.A81 SC1U10V3KX-3GP R111 10KR2J-3-GP 2 E51_TxD GPI94 GPI95 GPI96 GPI97 101 105 106 107 D/A DY 1 BAT_IN# 1105 GPIO74/SDA2 GPIO73/SCL2 GPIO22/SDA1 GPIO17/SCL1 81 NUM_LED LPC GPI90/AD0 GPI91/AD1 GPI92/AD2 GPI93/AD3 GPIO05 GPIO04 97 98 99 100 108 96 X-32D768KHZ-38GPU 1 C BLON_IN R382 100KR2F-L1-GP 104 1 TPAD14-GP TP113 TPAD14-GP TP114 2 9,56 U6A VREF X2 4 5V_AUX_S5 E SC4D7P50V2CN-1GP 3D3V_AUX_S5 2 C 1 C285 1 DY2PCLK_KBC_RC LPC_LFRAME# LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 INT_SERIRQ PM_CLKRUN# KBRCIN# KA20GATE A/D 3 2 2 11,37 11,37 11,37 11,37 11,37 11 11 12 12 R109 0R2J-2-GPDY 80 GPIO41 2 11,15 PCLK_KBC 2 2 1 2 1 1 2 1 2 1 2 3 4 1 2 8 7 6 5 1 GPIO10/LPCPD# LRESET# LCLK LFRAME# LAD0 LAD1 LAD2 LAD3 SERIRQ GPIO11/CLKRUN# KBRST# GA20 ECSCI#/GPIO54 GPIO65/SMI# GPIO67/PWUREQ# C194 R87 30KR2F-GP 124 7 2 3 126 127 128 1 125 8 122 121 ECSCI#_KBC 29 9 ECSW I#_KBC 123 PLT_RST1#_1 DY C730 SCD1U16V2ZY-2GP C232 SC100P50V2JN-3GP DY C749 SCD1U16V2ZY-2GP 100R2J-2-GP -1_20091022 C271 C139 SCD1U16V2ZY-2GP PLT_RST1# 1 OF 2 2 C725 C733 SCD1U16V2ZY-2GP 6,9,11,26,33,55 C259 BAT_IN# R95 1 3D3V_S0 SC10U6D3V3MX-GP 51 3D3V_S0 SCD1U16V2ZY-2GP LPC_LAD[0..3] 11,37 LPC_LAD[0..3] DY 1 R394 2 0R0603-PAD SC10U6D3V3MX-GP D C750 SCD1U16V2ZY-2GP SMBC_Therm SMBD_Therm C754 SC1U16V3ZY-GP SC10U6D3V3MX-GP BAT_SCL BAT_SDA C751 DY DY C207 SC15P50V2JN-2-GP C753 RN39 SRN4K7J-10-GP VBAT 3D3V_AUX_S5 SC15P50V2JN-2-GP VBAT SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP DY 1 FOR KBC DEBUG 3D3V_AUX_S5 EC36 2 3D3V_S0 2 3D3V_AUX_S5 3 2 KBC WPC775 Document Number Rev -1 JV50-TR8 W ednesday, November 11, 2009 Sheet 1 36 of 63 5 4 3 2 1 3D3V_AUX_S5 -1_20091026 Put it near Keyboard connector 3D3V_AUX_S5 2 R106 0R0603-PAD 2 U9 1 2 3 4 VCC HOLD# SCLK SI/SIO0 8 7 6 5 BIOS_VCC SPI_HOLD# BIOS_CLK BIOS_DIO 1 ER3 1 ER2 2 0R0402-PAD 2 0R0402-PAD SPICLK SPIDO 36 36 2 2 1 EC75 DY 2 EC76 DY 72.25165.A01 2ND = 72.25Q16.001 SC4D7P50V2CN-1GP R1317 10KR2J-3-GP 1 MX25L1605DM2I-12G-GP DY SC4D7P50V2CN-1GP DY SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP DY CS# SO/SIO1 WP#/ACC GND 1 BIOS_DO SPI_W P# 1 1 2 33R2J-2-GP EC78 2 EC77 1 ER4 2 36 SPICS# SPIDI SPI_W P# 1 2 R1316 10KR2J-3-GP SPI_HOLD# 36 36 D 3D3V_AUX_S5 R1319 10KR2J-3-GP 2 R1318 10KR2J-3-GP 1 2 DY 1 1 1 EC34 SCD1U16V2ZY-2GP D C C 16M Bits SPI FLASH ROM GOLDEN FINGER FOR DEBUG BOARD 11,36 LPC_LAD[0..3] LPC_LAD[0..3] DB1 3D3V_S0 11,36 LPC_LAD0 11,36 LPC_LAD1 11,36 LPC_LAD2 11,36 LPC_LAD3 11,36 LPC_LFRAME# 11,32,33,34 PLT_RST1#_B 11,15 PCLK_FW H B 1 2 3 4 5 6 7 8 9 10 11 12 DY B MLX-CON10-7-GP 20.D0183.110 SB JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 Document Number BIOS Rev -1 JV50-TR8 W ednesday, November 11, 2009 Sheet 1 37 of 63 5 4 3 2 1 TOUCH PAD 5V_S0 5V_S0 AFTE14P-GP TP62 1 AFTE14P-GP AFTE14P-GP TP69 TP70 1 1 5V_S0 TP_DATA TP_CLK TP_LEFT TP_RIGHT 2 4 3 DY 2 2 DY 1 1 1 DY DY 12 11 10 9 8 7 6 5 4 3 2 TP_DATA TP_CLK SRN33J-5-GP-U 1 1 1 2 4 3 1 2 EC23 SC100P50V2JN-3GP TPDATA TPCLK 36 TPDATA 36 TPCLK 14 EC22 SC100P50V2JN-3GP RN85 TPCN1 EC74 SC100P50V2JN-3GP DY EC73 SC100P50V2JN-3GP EC26 SCD1U10V2KX-4GP RN83 SRN10KJ-5-GP 2 D 2 D TP_RIGHT TP_LEFT 1 13 PTW O-CON12-3-GP-U C C 20.K0370.012 2ND = 20.K0315.012 B B Finger printer 1 3D3V_S0 R427 0R0603-PAD 2 FPCN1 13 -1 12 12 36 12 A 1 R149 1 R150 USBPP6 USBPN6 FP_DETECT# FP_ID TP_LEFT TP_RIGHT 1 3D3V_FP_S0 2 0R0402-PAD USBPP6_1 2 0R0402-PAD USBPN6_1 2 3 4 5 6 7 8 9 10 11 12 A JV50-TR8 14 PTW O-CON12-3-GP-U AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP TP132 TP131 TP128 TP126 TP127 1 1 1 1 1 3D3V_FP_S0 USBPP6_1 USBPN6_1 FP_DETECT# FP_ID Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 20.K0370.012 2ND = 20.K0315.012 Size A3 Date: 5 4 3 2 Touch PAD/Finger printer Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 38 of 63 5 4 3 2 1 -1 EC72 1 2 PSCN1 SC1U10V3ZY-6GP 7 1 3D3V_S0 2 3 4 5 6 Volume_Up#_2 Volume_Down#_2 2 1 3 4 D 1 1 RN115 SRN33J-5-GP-U PTW O-CON6-12-GP 36 Volume_Up# 36 Volume_Down# 36 8 EC107 20.K0382.006 2ND = 20.K0320.006 EC106 MLVG0402220NV05BP-GP-U 2 -1 69.80024.011 2 D POW ER CONSUMPTION# POW ER CONSUMPTION_LED#_R MLVG0402220NV05BP-GP-U 69.80024.011 3D3V_S0 DY Q20 1 3 R1 POW ER CONSUMPTION_LED#_R 210KR2J-3-GP 1 210KR2J-3-GP 1 2 1 10KR2J-3-GP 36 POW ER CONSUMPTION_LED# 2 R2 DTC143ZUB-GP 36 NUM_LED 1 R1 NUM_LED#_R 3 1 2 R2 DTC143ZUB-GP C 2 NUM_LED# CAP_LED 1 R1 R567 1 R568 1 R569 1 2470R2J-2-GP 2470R2J-2-GP 2470R2J-2-GP Volume_Up#_1 Volume_Down#_1 POW ER CONSUMPTION#_1 83.19217.070 2ND = 83.00190.P70 C CAP_LED1 R265 CAP_LED#_R 1 2 CAP_LED# 100R2J-2-GP 2 R2 DTC143ZUB-GP K A LED-B-68-GP 83.19217.070 2ND = 83.00190.P70 84.00143.G1K 2ND = 84.00143.D1K 13 Volume_Up# Volume_Down# POW ER CONSUMPTION# A 5V_S0 Q17 36 K LED-B-68-GP 100R2J-2-GP 84.00143.G1K 2ND = 84.00143.D1K 3 R564 R565 R566 5V_S0 NUM_LED1 R263 Q16 1 MEDIA_LED# 5V_S0 MEDIA_LED1 R264 2 100R2J-2-GP K A LED-B-68-GP POW ER CONSUMPTION# 1 AFTE14P-GP TP55 5V_S0 1 AFTE14P-GP TP125 3D3V_S0 1 AFTE14P-GP TP56 83.19217.070 2ND = 83.00190.P70 DY Power consumption# 1 EC71 NUM_LED#_R EC61 CAP_LED#_R EC63 B MEDIA_LED# EC62 2 SC220P50V2JN-3GP DY 1 2 SC220P50V2JN-3GP DY 1 POW ER CONSUMPTION_LED#_R 2 SC220P50V2JN-3GP 1 AFTE14P-GP TP54 B DY 1 2 SC220P50V2JN-3GP A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 LAUNCH BOARD Document Number Monday, October 26, 2009 Rev -1 JV50-TR8 Sheet 1 39 of 63 5 4 3 2 1 Cover Up Switch Power Button PW R_SW 1 1 3 KBC_PW RBTN#_1 3D3V_AUX_S5 D 4 DY EC3 SC1KP50V2KX-1GP 2 LID1 R621 SW -TACT-119-GP OUT 3 1 GND 2 LID_CLOSE# 36 100R2J-2-GP 1 62.40009.671 LID_CLOSE#_1 2 VDD 3D3V_AUX_S5 1 2 Beckup Button 4 3 1 ME268-002-GP KBC_PW RBTN# LID_CLOSE# 74.00268.07B EC69 SCD1U16V2ZY-2GP 1 SRN10KJ-5-GP BK_SW 1 1 Beckup#_1 3 1 5 DY EC4 4 2 2 EC70 SCD22U6D3V2KX-1GP RN80 2 2ND = 62.40012.101 2 2 5 1 D SC1KP50V2KX-1GP SW -TACT-119-GP C C 3D3V_S0 62.40009.671 2ND = 62.40012.101 RN4 1 2 3 4 8 7 6 5 W IRELESS_BTN# BT_BTN# BECKUP# SRN10KJ-6-GP WIRELESS Button W LAN_SW 1 3 5 4 RN3 Beckup#_1 1 BT_BTN#_1 2 W IRELESS_BTN#_1 3 KBC_PW RBTN#_1 4 DY EC6 2 2 W IRELESS_BTN#_1 1 1 SC1KP50V2KX-1GP 8 7 6 5 Beckup# BECKUP# 36 BT_BTN# BT_BTN# 36 W IRELESS_BTN# W IRELESS_BTN# 36 KBC_PW RBTN# KBC_PW RBTN# 36 SRN470J-3-GP SW -TACT-119-GP 62.40009.671 B B 2ND = 62.40012.101 3D3V_S0 1 T/P lock Button R233 10KR2J-3-GP 3 BT_SW 1 1 5 BT_BTN#_1 3 4 470R2J-2-GP 4 1 DY EC5 2 2 R227 1 2 2 5 TP_LOCK_BTN#_1 SW -TACT-119-GP SC1KP50V2KX-1GP 2 TP_SW 1 1 1 BT/3G Button 2 TP_LOCK_BTN# 36 EC51 SC1KP50V2KX-1GP DY 62.40009.671 SW -TACT-119-GP 2ND = 62.40012.101 62.40009.671 2ND = 62.40012.101 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 Document Number SWITCH Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 40 1 of 63 5 4 3 3 R1 PW RLED#_DB 2 R2 DTC143ZUB-GP D 84.00143.G1K 2ND = 84.00143.D1K 1 SB Q29 1 36 FRONT_PW RLED 2 5V_S5 PW R_LED1 FRONT_PW RLED#_R 3 1 STDBY_LED#_R 4 2 D RN74 Q30 36 R1 1 STDBY_LED R2 DTC143ZUB-GP 84.00143.G1K 2ND = 84.00143.D1K SRN300J-1-GP 4 3 2 1 2 Q31 1 36 DC_BATFULL 1 2 3 4 LED-BY-GP 5 6 7 8 83.00195.J70 8 7 6 5 FRONT_PW RLED#_1 FRONT_PW RLED#_2 FRONT_PW RLED#_3 K RN110 83.01221.I70 2ND = 83.00320.070 K 3 5V_S5 83.01221.I70 2ND = 83.00320.070 CHARGER_LED1 DC_BATFULL#_R PW R_LED3 A LED-B-77-GP-U2 5V_AUX_S5 84.00143.G1K 2ND = 84.00143.D1K 5V_S5 LED-B-77-GP-U2 SA 2 R2 DTC143ZUB-GP PW R_LED4 A SRN200J-GP DC_BATFULL# 3 R1 PW RLED#_DB PW RLED#_DB PW RLED#_DB 3D3V_S5 STDBY_LED#_BD 3 1 K PW R_LED2 A 5V_S5 Q32 3 R1 1 36 CHARGE_LED CHARGE_LED# CHARGE_LED#_R 4 2 R2 DTC143ZUB-GP LED-B-77-GP-U2 3D3V_AUX_S5 83.01221.I70 2ND = 83.00320.070 LED-BY-GP 84.00143.G1K 2ND = 84.00143.D1K C 2 83.00195.J70 C PW R_LED5 Q14 36 R1 1 L-line_LED R560 180R2J-1-GP 1 2 1 2 R561 180R2J-1-GP L-line_LED# 3 2 R2 DTC143ZUB-GP L-line_LED#_1 K A 5V_S5 LED-B-68-GP 83.19217.070 2ND = 83.00190.P70 84.00143.G1K 2ND = 84.00143.D1K PW R_LED6 L-line_LED# L-line_LED#_2 K A 5V_S5 DY LED-B-68-GP DY R530 83.19217.070 2ND = 83.00190.P70 L-line_LED# 1 PW R_LED7 2 K 510R2J-1-GP 3D3V_S0 36 TP_LOCK_LED B TP_LOCK_LED#_1 K 2 1 TP_LED1 A 2 K 180R2J-1-GP 83.01921.P70 2ND = 83.00191.H70 5V_S5 PW R_LED8 A 5V_S5 LED-B-68-GP 83.19217.070 2ND = 83.00190.P70 LED-Y-57-GP 75R2J-1-GP 84.00143.G1K DTC143ZUB-GP 2ND = 84.00143.D1K -1 -1 B SB R13 DY 1 3D3V_S0 D1 W LAN_LED#_1 2 R4 W LAN_LED#_3 2 1 DY 3 1 R5 2 0R0402-PAD 22R2J-2-GP Q4 BAW 56-5-GP D 1 DTA143ZUB-GP 2 . Q2 R174 W LAN2_LED#_1 2 1 . . . . 2 0R2J-2-GP SB 3 R2 R1 DTA143ZUB-GP W LAN_LED#_2 K W LAN_LED1 A W LAN_LED# S R1 3 1ST 84.00143.C1K 2ND = 84.00143.F1K 1 2 0R2J-2-GP G 1 Q1 R2 DY 33 W LAN2_LED#_MC 1 2 R2 33 W LAN_LED#_MC TP_LOCK_LED# 3 R1 1 R531 L-line_LED# R219 Q10 A LED-B-98-GP LED-Y-57-GP 83.01921.P70 2ND = 83.00191.H70 SB 84.2N702.D31 2ND = 84.2N702.E31 36 W LAN_TEST_LED 2N7002E-1-GP 1ST 84.00143.C1K 2ND = 84.00143.F1K A A Q3 36 BT_LED 1 R1 5V_S0 R6 3 2 R2 DTC143ZUB-GP BT_LED# 1 Wistron Corporation BT_LED1 2 BLT_LED#_1 100R2J-2-GP K 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. A LED-B-68-GP Title 83.19217.070 2ND = 83.00190.P70 Size 84.00143.G1K 2ND = 84.00143.D1K A3 Blue-tooth LED Date: 5 4 3 2 Document Number LED Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 41 1 of 63 5 4 3 1 3D3V_S0 4 3 2D5V_S0 2 RN99 SRN100KJ-6-GP D 1 2 D R1310 C825 2 1 D27 2D5V_S0_PG 2 46 SC1U10V3ZY-6GP 2 RSMRST#_KBC_SB 12 0R2J-2-GP VCORE_EN 45,47 1 PM_SLP_S3# 1 12,34,35,36,44,49,53,54 3 1 3V/5V_POK 1 3V/5V_POK DY 2 R457 46 DY 2 R1311 0R2J-2-GP R456 1 DY 2 48 1D8V_S3_PW RGD 1 36 RSMRST#_KBC 2 R1320 100KR2J-1-GP 83.00056.Q11 2ND = 83.00056.G11 3RD = 83.00056.K11 BAW 56-5-GP 1KR2F-3-GP 0R2J-2-GP -1_20091026 C C P/H @ 1D8V_S3 PAGE R120 45 DY 1 VRM_PW RGD 2 1D1V_PW RGD 47 0R2J-2-GP 1D8V_S3 12,34,35,36,44,49,53,54 14 3D3V_S5 47 1D1V_PW RGD 35 1 8 SB_PW RGD 12 84.2N702.D31 2ND = 84.2N702.E31 B TSLVC08APW -1-GP 7 3 RUNPW ROK NB_PW RGD 9,12 2N7002E-1-GP 10 D3 G S U16C 9 PM_SLP_S3# B 2 . . . . D 73.07408.L16 2ND = 73.07408.L15 3RD = 73.07408.02B . Q9 RUNPW ROK_D RUNPW ROK_D 3 PH in page 3 BAW 56-5-GP 83.00056.Q11 2ND = 83.00056.G11 3RD = 83.00056.K11 JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title POWER ON LOGIC Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 W ednesday, November 11, 2009 Sheet 1 42 of 63 5 4 3 Adapter Input Signal AD_OFF AD_IN# (O) Input Signal Input Power AD_JK Output Signal Input Signal VCORE_EN ENTRIP1 Output Power VCC(I) DCDC 1D2V(TPS51124) EN0 S5_ENABLE D 1 DCDC 5V/3D3V(RT8205A) Output Signal (I) 2 VCC(O) PGOOD Input Power DCBATOUT Output Power VCLK VIN CPU_CORE ISL6265HRTZ VREG3 VREG5 Input Signal Output Signal SVD VOUT VRM_PWRGD PGOOD CPU_SVC PGOOD 3V/5V OK Input Power VOUT V5FILT +15V_ALW 3D3V_AUX_S5 Output Power V5DRV DCBATOUT 1D2V_S0 VTT V(I) 5V_AUX_S5 3D3V_S5 5V_S5 SVC DCDC 1D1V(TPS51124) VCORE_EN ENABLE DCDC 1D8V(RT8209B) C CPU_PWRGD_SVID_REG PWROK Input Power +5V_RUN Input Signal PM_SLP_S5# Output Power VCC DCBATOUT VCC_CORE(O) VIN VCC_CORE(O) VCC_CORE(O) Input Signal EN_PSV PGOOD 1D2V_PWRGD Input Power 5V_S5 VCC_CORE1 Output Power VTT V5IN DCBATOUT VDDNB G9161 PM_SLP_S5# +5V_SUS 1D8V_S3 EN_PSV Input Signal C 1D1V_PWRGD PGOOD Output Power V5FILT V5DRV V(I) DCBATOUT RT9026 1D2V_S0 VTT V(I) CHARGER MAX8731 Output Signal LDO_SHDN# Output Signal 1D8V_S3_PWRGD Input Power VCC_VORE0 Output Signal Input Signal Output Signal 0D9V LDO 1D2V LDO B 1D2V_PWRGD EN_PSV D ENTRIP2 AD+ 5V_S5 CPU_SVD Output Signal Input Signal MAX8731A ACIN LDO_POK B Output Signal ACIN MAX8731A ACOK 5V_S5 Input Power 3D3V_S5 IN Output Power OUT Input Power Output Power VIN 1D2V_S5 1D8V_S3 PBAT_SMBDAT LDO_OUT 0D9V_S3 PBAT_SMBCLK LDO_OUT VLDOIN ACOK SDA SCL Input Power 1D5V LDO 2D5V LDO Input Signal R9161 G9571 Input Signal Output Signal Input Power Input Power IN 3D3V_AUX_S5 Output Signal A 3D3V_S0 AD+ Output Power OUT 3D3V_S0 2D5V_S0 Output Power IN OUT DCIN VDDSMB JV50-TR8 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. A3 Date: 3 A 1D5V_S0 Size 4 +VCHGR V(O) Title 5 Output Power 2 Power Block Diagram Document Number Rev -1 JV50-TR8 Monday, October 05, 2009 Sheet 1 43 of 63 5 4 Aux Power 5V_AUX_S5 2 1 3D3V_AUX_S5 I min = 150 mA Run Power 3D3V_AUX_S5 U11 D 3 5V_S5 5V_S0 U28 D G9 GAP-CLOSE-PW R 2 Z_12V S 10KR2J-3-GP Q28 NDS0610-NL-GP 1 R522 C921 1 R525 8 7 6 5 AO4468-GP 1 2 R526 330KR2J-L1-GP SCD22U25V3KX-GP 10KR2J-3-GP R529 100KR2J-1-GP 1 D D D D 84.04468.037 2 R523 1 Z_12V_G3 330KR2J-L1-GP 3D3V_S0 S S S G RUN_POW ER_ON D 3D3V_S0 K DY 1 2 3 4 U25 D31 PDZ9D1B-GP 1 2 3 4 A 2nd source:74.09198.G7F 84.S0610.B31 2ND = 84.00610.C31 DCBATOUT 1 BC1 2 G909-330T1U-GP 74.00909.03F 1 4 C546 SCD1U25V3KX-GP 1 DY2 2 2 NC#4 3D3V_AUX_S5_G 1 G 5 1 VOUT 2 VINDY GND SHDN# SC1U16V3ZY-GP SC1U16V3ZY-GP DY 2 BC2 1 1 2 3 3D3V_S5 S S S G D D D D 8 7 6 5 AO4468-GP 83.9R103.C3F 2ND = 83.9R103.F3F 84.04468.037 1D8V_S0 Z_12V_D4 1D8V_S3 DY R524 U49 2 100R5J-3-GP U67 1 2 3 4 Z_12V_D3 2 3D3V_runpwr D Q33 3 5 2 6 1 PM_SLP_S3# 12,34,35,36,42,49,53,54 1 84.2N702.A3F 2ND = 84.DM601.03F 8 7 6 5 2 84.04468.037 1D8V_S0_ON 1MR2F-GP C795 SC22P50V2JN-4GP S 2 2N7002EW -1-GP D D D D C 2N7002KDW -GP Z_12V_D3 G S S S G AO4468-GP R431 DY 1 C 4 SB For 2KV ESD protect U44 3D3V_M92 3D3V_S5 S 2 1D8V_M92 R585 1 2 0R3J-0-U-GP RUN_POW ER_ON G 2 AO4468-GP Madison-Park C1054 S D 1 R586 2 0R3J-0-U-GP 3D3V_M92_ON M9X TC40 ST150U6D3VBM-1-GP C675 SC22P50V2JN-4GP M9X B 77.C1571.09L 2ND = 80.15715.12L -1_20091023 R1284 2 1 0R5J-5-GP 3D3V_M92 Q41 M9X 84.03400.B37 2 Madison-Park Madison-Park 3D3V_S0 Madison-Park RUNON_R NDS0610-NL-GP G M9X M9X 84.S0610.B31 2ND = 84.00610.C31 DIS_EN_1D8_RUN_R 2 330KR2J-L1-GP R1306 100KR2J-1-GP Madison-Park R1307 330KR2J-L1-GP Madison-Park 2 Madison-Park 1 R1305 1 1 1 R587 2 0R3J-0-U-GP 2 1D8V_S0 2 2MR2F-GP 84.04468.037 for TR 1 1 Madison-Park 1 2 3 4 SCD1U16V2KX-3GP C1053 SC10U6D3V3MX-GP B 1 Madison-Park U85 S S S G D D D D 1 8 7 6 5 AO3400A-GP M9X R342 1D8V_M92 2 1D8V_S3 1 For Madison 1D8V_VGA AO4468, SO-8 Id=11.6A, Qg=9~12nC Rdson=17.4~22m ohm D DIS_EN_1D8_RUN JV50-TR8 D A 49,54 1D1V_M92_POK 1D1V_M92_POK 1 R1308 DGPU_PW ROK_R 2 S 1 Wistron Corporation 84.2N702.D31 2ND = 84.2N702.E31 G 0R2J-2-GP Madison-Park 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Madison-Park Title C1055 2 CO-LAYOUT SCD1U10V2KX-4GP DY Size A3 Date: 5 4 A Q42 2N7002E-1-GP 3 2 RUN AND AUX POWER Document Number Rev -1 JV50-TR8 W ednesday, November 11, 2009 Sheet 1 44 of 63 5 4 DCBATOUT DCBATOUT DCBATOUT_6265_3 2 1 2 2 5 1 2 1 2 1 1 2 1 DY 6265_FB1_R 1 C217 2 R91 1 0R2J-2-GP DY 4 G S S S 4 3 2 1 1 2 1 2 1 2 D D D D 1 TC28 D D D D 5 6 7 8 C218 1 2 54K9R2F-L-GP SC1KP50V2KX-1GP 2 R92 1 316KR2F-GP 2 79.22719.20L 2ND = 77.22271.20L G S S S 4 3 2 1 ISP1 2 SC1KP50V2KX-1GP C241 84.07672.037 R379 1 DY 2 10R2F-L-GP NTC-10K-9-GP ISP1_R DY 2 ISN1 2 G7 2 1 TC23 1 1 2 1 R100 1 TC6 2 2 5 6 7 8 R93 1 2 C240 SCD1U16V2KX-3GP 4 3 2 1 4 3 2 1 2 5 6 7 8 1 1 2 DY 2 SC1KP50V2KX-1GP 3D3V_S0 R90 1 2 4K02R2F-GP TC5 SE330U2VDM-L-GP 2 R396 1 0R2J-2-GP R102 1KR2F-3-GP 1 2 R392 1 2 6K81R2F-1-GP SC180P50V2JN-1GP 6265_FB0_R 1 C742 1 2 249R2F-GP SC4700P50V2KX-1GP SC180P50V2JN-1GP VCC_CORE_S0_1 SE330U2VDM-L-GP to PWM IC 1 C261 SC180P50V2JN-1GP 1 2DY C236 1 2 68.3R31A.10V 2ND = 68.3R310.20A B VCC_CORE_S0_1 Design Current: 12.6A Peak current: 18A OCP_min:24A SE330U2VDM-L-GP 1 2 54K9R2F-L-GP DY C237 1 2 2 IND-3D3UH-116-GP 2 IND-D36UH-9-GP Parts S S S G FDMS7672-GP 84.07672.037 U7 S S S G 1 2 1 2 249R2F-GP C740 SC1KP50V2KX-1GP SC4700P50V2KX-1GP SC180P50V2JN-1GP R98 68.R3610.20C 2ND = 68.R3610.20A R107 16K2R2F-GPclose D D D D D D D D U8 FDMS7672-GP Close to CPU socket 6265_FB1_C VDDNB L53 PHASE_NB 1 LGATE_NB L47 1 BOOT1 1 2 C288 SCD22U10V3KX-2GP Parallel C178 SC4D7U25V5KX-GP 2 1 1 2 SC4D7U25V5KX-GP 4 3 2 1 2 2 2 1 5 6 7 8 6265_VDIFF1 6265_FB1 6265_COMP1 6265_VW1 1 2 1 FDMS8692-GP 84.08692.037 DY C179 SCD1U25V3KX-GP U5 C180 UGATE1 PHASE1 C741 SC180P50V2JN-1GP 1 2 DY C ESR=15mohm C181 SC10U25V6KX-1GP 1 84.04800.D37 R96 DY C822 VDDNB: Design Current: 2.1A Peak current: 3A OCP_min:5A DCBATOUT_6265_2 ISN1 ISP1 DY 0R2J-2-GP R97 10R2F-L-GP C406 SI4800BDY-T1-GP LGATE1 2 R395 1 910KR2J-GP 2 UGATE_NB BOOT_NB 1 2 C364 SCD22U10V3KX-2GP C320 SC2D2U6D3V3KX-GP S S S G R103 10R2J-2-GP R388 10R2J-2-GP 3D3V_S0 1 84.04800.D37 U53 6 CPU_VDD1_RUN_FB_L 6 CPU_VDD1_RUN_FB_H C738 1 2 2 5 6 7 8 LGATE1 PHASE1 UGATE1 BOOT1 6 CPU_VDD0_RUN_FB_H 6 CPU_VDD0_RUN_FB_L R391 1 5V_S0 LGATE0 D D D D R387 10R2J-2-GP Close to CPU socket 1KR2F-3-GP 1 R397 2 2 SI4800BDY-T1-GP 2 74.06265.B73 1D8V_S3 VCC_CORE_S0_0 VCC_CORE_S0_1 C746 1 2 1 BOOT_NB BOOT0 UGATE0 PHASE0 36 35 34 33 32 31 30 29 28 27 26 25 ISP0 ISN0 VSEN0 RTN0 RTN1 VSEN1 VDIFF1 FB1 COMP1 VW1 ISP1 ISN1 U10 ISP0 ISN0 C744 1 2 2 U50 BOOT_NB BOOT0 UGATE0 PHASE0 PGND0 LGATE0 PVCC LGATE1 PGND1 PHASE1 UGATE1 BOOT1 13 14 15 16 17 18 19 20 21 22 23 24 ISL6265AHRTZ-T-GP GNDA_VCORE R398 1 C393 DY SE220U2VDM-8GP 2 GAP-CLOSE-PW R-3-GP 6265_FB0_C close to L75 84.07672.037 1 OFS/VFIXEN PGOOD PWROK SVD SVC ENABLE RBIAS OCSET VDIFF0 FB0 COMP0 VW0 G10 B ISP0 1 6265_VIN 6265_VCC 6265_FB_NB 6265_COMP_NB 6265_FSET_NB 6265_VSEN_NB 2 1 2 2 1 2 3 4 5 6 7 8 9 10 11 12 CPU_PW RGD_SVID_REG R119 1 0R0402-PAD 6265_SVD 2 R117 1 0R0402-PAD 6265_SVC 2 R118 1 0R0402-PAD 6265_ENABLE 2 6265_RBIAS 1 2 R400 93K1R2F-L-GP 6265_OCSET 6265_VDIFF0 6265_FB0 6265_COMP0 6265_VW 0 1 GAP-CLOSE-PW R-3-GP R862 6 SCD1U25V3KX-GP GNDA_VCORE CPU_VDDNB_RUN_FB_L 79.33719.L01 2ND = 77.C3371.051 1 SC10U25V6KX-1GP 1 2 R399 23K7R2F-GP R129 2 1 0R0402-PAD 79.33719.L01 2ND = 77.C3371.051 79.33719.L01 2ND = 77.C3371.051 SC10U25V6KX-1GP GNDA_VCORE 42 VRM_PW RGD 6 CPU_PW RGD_SVID_REG 6 CPU_SVD 6 CPU_SVC 42,47 VCORE_EN CPU_VDDNB_RUN_FB_L_R ISP0_R ISN0 2 G8 TC25 SE330U2VDM-L-GP DCBATOUT_6265_3 GNDA_VCORE R121DY 0R2J-2-GP R403 10KR2F-2-GP UGATE_NB 1 R385 2 4K02R2F-GP 1 2 C735 SCD1U16V2KX-3GP R390 R402 1 2 DY 2 1 DY 10R2F-L-GP NTC-10K-9-GP TC3 49 48 47 46 45 44 43 42 41 40 39 38 37 2 2 1 C LGATE0 GND VIN VCC FB_NB COMP_NB FSET_NB VSEN_NB RTN_NB OCSET_NB PGND_NB LGATE_NB PHASE_NB UGATE_NB 1 3D3V_S0 2 DY 6265_OFS/VFIXEN GNDA_VCORE 5 6 7 8 2 1 1 1 DY 10KR2F-2-GP R122 0R2J-2-GP SRN10J-7-GP PHASE_NB TC4 SE330U2VDM-L-GP R123 0R0603-PAD 4 3 Parts to PWM IC SE330U2VDM-L-GP R124 1 2 CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L S S S G C767 SCD1U25V3KX-GP 2 84.07672.037 RN45 VCC_CORE_S0_0 L49 2 IND-D36UH-9-GP R389 16K2R2F-GPclose D D D D GAP-CLOSE-PW R 3D3V_S0 1 R414 2R3J-GP FDMS7672-GP 5V_S0 6 VDDNB PHASE_NB 1 R125 2 11K3R2F-2-GP LGATE_NB U13 S S S G ST15U25VDM-1-GP GAP-CLOSE-PW R G14 1 2 77.21561.00L CPU_VDDNB_RUN_FB_H DCBATOUT_6265_3 D D D D GAP-CLOSE-PW R G13 1 2 R1301 0R0402-PAD 2 1 BOOT0 1 2 C346 SCD22U10V3KX-2GP U12 FDMS7672-GP GNDA_VCORE D 68.R3610.20C 2ND = 68.R3610.20A UGATE0 PHASE0 4 3 2 1 C768 SC1U10V3KX-3GP GNDA_VCORE TC7 2 SCD1U10V2KX-4GP 1 R132 2 22KR2F-GP 2 GAP-CLOSE-PW R G12 1 2 2 1 2R3J-GP 1 C380 2 DCBATOUT_6265_1 G11 1 2 6265_OCSET_NB DCBATOUT 1 VCC_CORE_S0_0 Design Current: 12.6A Peak current: 18A OCP_min:24A 2 2 SC1KP50V2KX-1GP R415 GAP-CLOSE-PW R C384 5 6 7 8 5V_S0 FDMS8692-GP 84.08692.037 C382 4 3 2 1 D C377 SC180P50V2JN-1GP 1 2 1 R131 26265_FB_NB_R 1 44K2R2F-1-GP C376 2 5 6 7 8 GAP-CLOSE-PW R G6 1 2 2 SC33P50V2JN-3GP 4 3 2 1 77.21561.00L U15 1 C374 1 1 2 GAP-CLOSE-PW R G5 1 2 DY SCD1U25V3KX-GP GAP-CLOSE-PW R C383 C387 SC4D7U25V5KX-GP TC8 ST15U25VDM-1-GP SC4D7U25V5KX-GP GAP-CLOSE-PW R G3 1 2 SC10U25V6KX-1GP D S S D D S D G GAP-CLOSE-PW R G16 1 2 A 1 DCBATOUT_6265_1 G4 G15 1 3 DCBATOUT_6265_2 R858 close to 79.33719.L01 L77 79.33719.L01 2ND = 77.C3371.051 79.33719.L01 2ND = 77.C3371.051 2ND = 77.C3371.051 JV50-TR8 A 1 Wistron Corporation GAP-CLOSE-PW R-3-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 1 R94 2 CPU Vcore(ISL6265HR) 6K81R2F-1-GP Size A3 2 SC180P50V2JN-1GP Date: 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 45 of 63 3D3V_S5 GAP-CLOSE-PW R G131 1 2 DCBATOUT_51125 GAP-CLOSE-PW R SB DY 1 15 4 TONSEL GND 25 VCLK 18 1 VREG5 1 1 2 1 C955 SCD1U10V2KX-4GP 1 2 2 G S S S 5 6 7 8 C958 SC18P50V2JN-1-GP R600 30KR2F-GP 51125_FB1_R DY 1 R237 2 0R0603-PAD 3V/5V_POK 42 R603 20KR2F-L-GP 2009/03/20 Wayne Close to VFB Pin (pin2) 2 5V_AUX_S5_51125 8 DY S5PW R_ENABLE 35 C960 DY Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 2 1 R608 DCDC 5V/3D3V (RT8205A) Date: 4 A JV50-TR8 Size A3 5 B DY SC10U10V5ZY-1GP 2 0R2J-2-GP SC4D7U6D3V3KX-GP 2 0R2J-2-GP R607 2 1 0R2J-2-GP 3D3V_AUX_S5 77.22271.27L 2ND = 77.C2271.00L R606 1 A Close to VFB Pin (pin5) TC36 ST220U6D3VDM-20GP SB R597 0R2J-2-GP TP238 TPAD14-GP R601 0R2J-2-GP 5V_AUX_S5 1 2 1 R605 S Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm 1 17 VREG3 SKIPSEL 74.51125.073 3D3V_AUX_S5_5_51125 51125_SKIPSEL 51125_VCLK 84.04812.A37 G DY 1 GND G134 1 2 VREF 2 IND-3D3UH-116-GP 68.3R31A.10V 2ND = 68.3R310.20A D 5V_PW R L56 1 2 1 ENTRIP2 U79 51125_ENTIP1 3 14 1 DY ENTRIP1 1 2 51125_TONSEL 23 SB 1 51125_FB1 S Design Current = 6A Max Current = 7A OCP min = 10A TAI-TEC 7*7*3 DCR=17.6mohm, Irating=6A Isat=13.5A 2 2 G 4 3 2 1 SCD1U25V3KX-GP C953 1 2 1 VFB1 PGOOD 1 D C 2 24 VFB2 EN0 2 U76 SI4800BDY-T1-GP 2009/03/11 Wayne C950 SC4D7U25V5KX-GP 2 1 2 84.04800.D37 C949 D D D D VO1 5 2 51125_EN 13 820KR2F-GP 51125_ENTIP2 6 C948 G S S S VO2 51125_FB2 C959 DY GAP-CLOSE-PW R G130 1 2 GAP-CLOSE-PW R G132 1 2 SC4D7U25V5KX-GP 1 2 7 51125_VO1 2 1 0R2J-2-GP 51125_VREF 2 2 84.2N702.A3F 2ND = 84.DM601.03F VIN 51125_VO2 1 R236 2 0R0603-PAD 2 51125_DRVL1 DRVL2 3D3V_AUX_S5 0R2J-2-GP 19 12 R604 3D3V_AUX_S5 DRVL1 LL2 51125_DRVL2 TPS51125RGER-GP 51125_VREF LL1 51125_LL1 DRVH2 11 1 51125_FB2_R C957 DYSC18P50V2JN-1-GP 51125_DRVH1 10 51125_LL2 2 8 7 6 5 1 2 3 4 SI4812BDY-T1-E3-GP 1 2 16 8 7 6 5 1 2 3 4 SC4D7U25V5KX-GP 2 SC4D7U25V5KX-GP 2 1 1 Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm 21 20 51125_DRVH2 2 R602 10KR2F-2-GP 2N7002KDW -GP 5 6 7 8 2 1 1 1 2 1 2 1 2 ST220U6D3VDM-20GP 1 2 0R2J-2-GP GAP-CLOSE-PW R G128 1 2 GAP-CLOSE-PWR-3-GP SCD22U6D3V2KX-1GP DYR599 DRVH1 VBST1 51125_VREF C956 51125_VBST1 VBST2 1 R596 G 22 9 U78 G S S S R598 6K98R2-GP Id=7A Qg=8.7~13nC Rdson=23~30mohm SI4812BDY-T1-E3-GP 2 51125_VBST2 84.04812.A37 S 4 C943 SCD01U50V2KX-1GP SCD01U50V2KX-1GP C951 1 D D D D 77.22271.27L 2ND = 77.C2271.00L SB SC10U25V6KX-1GP D TC35 G135 2 2 IND-3D3UH-116-GP GAP-CLOSE-PWR-3-GP B SCD1U10V2KX-4GP SB U77 L55 1 DY SB Rdson=23~30mohm SCD1U25V3KX-GP SB C954 C952 G S S S 68.3R31A.10V 2ND = 68.3R310.20A Id=7A U75 Qg=8.7~13nC SI4800BDY-T1-GP G DY 5 3 D GAP-CLOSE-PW R G126 1 2 DCBATOUT_51125 C947 DY 84.04800.D37 S 3D3V_PW R R594 130KR2F-GP 2 VCC_ENTIP2 GAP-CLOSE-PW R C945 C946 TAI-TEC 7*7*3 DCR=17.6mohm, Irating=6A Isat=13.5A SB For 2KV ESD protect 51125_ENTIP2 DCBATOUT_51125 SB D C941 84.2N702.A3F 2ND = 84.DM601.03F DY 6 GAP-CLOSE-PW R G133 1 2 51125_EN D D D D SCD01U50V2KX-1GP Design Current = 6A Max Current = 7A OCP min = 10A 3V5V_ENABLE 1 2 GAP-CLOSE-PW R G122 1 2 R595 100KR2J-1-GP DCBATOUT_51125 C944 4 2N7002KDW -GP 1 2009/03/11 Wayne C DY 5 3 1 R593 130KR2F-GP 2 2009/03/27 Wayne C942 2 VCC_ENTIP1 2 GAP-CLOSE-PW R G129 1 2 DY 6 SC18P50V2JN-1-GP ST15U25VDM-1-GP 51125_ENTIP1 1 2 3V5V_ENABLE C940 GAP-CLOSE-PW R G127 1 2 77.21561.00L 1 1 GAP-CLOSE-PW R G125 1 2 R592 10KR2J-3-GP Q36 SCD1U25V3ZY-1GP 2 Q35 SC18P50V2JN-1-GP 77.21561.00L R591 10KR2J-3-GP GAP-CLOSE-PW R G121 1 2 TC37 5V_S5 G118 1 1 GAP-CLOSE-PW R 1 GAP-CLOSE-PW R TC34 ST15U25VDM-1-GP 1 GAP-CLOSE-PW R G123 1 2 5V_AUX_S5 5V_PW R SCD1U25V3ZY-1GP 2 GAP-CLOSE-PW R G120 1 2 GAP-CLOSE-PW R G124 1 2 5V_AUX_S5 GAP-CLOSE-PW R G117 1 2 1 GAP-CLOSE-PW R G119 1 2 D 2009/03/20 Wayne 3V5V_ENABLE 35 4 3 2 1 GAP-CLOSE-PW R G116 1 2 2 2KR2F-3-GP 2 2 GAP-CLOSE-PW R G115 1 2 R590 1 35 S5PW R_ENABLE G114 1 1 D D D D 3D3V_PW R 2 1 DCBATOUT_51125 G113 2 1 2 DCBATOUT 1 DCBATOUT_51125 G112 2 2 1 3 1 DCBATOUT 4 2 5 3 2 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 46 of 63 5 4 DCBATOUT 3 2 DCBATOUT_51124 1D1V_PW R G63 G55 G S S S S DCBATOUT_51124_1 1 2 2 2 84.04800.D37 G DCBATOUT C634 D D D D 5 6 7 8 GAP-CLOSE-PW R C633 SC4D7U25V5KX-GP U37 SI4800BDY-T1-GP SC4D7U25V5KX-GP GAP-CLOSE-PW R G65 1 2 GAP-CLOSE-PW R G57 1 2 GAP-CLOSE-PW R G59 1 2 Iomax=8A 39KR2F-GP 1 2 TC16 GAP-CLOSE-PW R G51 1 2 GAP-CLOSE-PW R G52 1 2 GAP-CLOSE-PW R 79.3971V.6AL G54 2ND = 77.93971.02L 1 SB 2 2 DY 2 1 TP182TPAD14-GP 24 7 1 6 U41 1D2V_PW RGD Close to VFB Pin (pin5) SB 1D1V_PW RGD 42 1D2V_PW R 1 1 4 3 2 1 SB 2 51124_V5FILT GAP-CLOSE-PW R G70 1 2 1 TC18 B GAP-CLOSE-PW R G69 1 2 GAP-CLOSE-PW R G73 1 2 2 1 R328 30KR2F-GP 84.04812.A37 SCD1U16V2KX-3GP DY SC1U10V3KX-3GP 2 51124_VFB2 C682 2 1 DY 2 5 6 7 8 R329 17K8R2F-GP D D D D U42 SI4812BDY-T1-E3-GP C657 SC18P50V2JN-1-GP 10KR2J-3-GP 51124_VBST2 R326 0R2J-2-GP 1 C661 1 DY G S S S 2 2 DY R323 1 51124_VBST1 SCD1U16V2KX-3GP 51124_LL2 2 68.1R51A.10F 2ND = 68.1R510.10K 2 GAP-CLOSE-PW R G68 1 2 1D2V Iomax=5A OCP>10A L37 1 C641 1 1 GAP-CLOSE-PW R G67 1 2 1D2V_PW R 1 2 IND-1D5UH-53-GP 2 2 G66 SE390U2D5VM-2GP 51124_LL1 2 2 4 3 2 1 SB C665 2 1 5 6 7 8 84.04800.D37 C664 1 2 R332 9K1R2F-1-GP SB SI4800BDY-T1-GP 74.51124.073 51124_TRIP1 51124_TRIP2 R317 11KR2F-L-GP U45 TPS51124RGER-GPU1 1D2V_S0 C666 S S S G B DRVH2 LL2 DRVL2 51124_DRVH2 51124_LL2 51124_DRVL2 10 11 12 51124_TONSEL 1 DY 51124_DRVH1 51124_LL1 51124_DRVL1 21 20 19 DCBATOUT_51124 17 14 BC4 SCD47U6D3V2KX-GP PGOOD1 PGOOD2 GND GND PGND2 PGND1 TONSEL EN1 EN2 3 25 13 18 DRVH1 LL1 DRVL1 4 23 8 VBST1 VBST2 51124_EN1 51124_EN2 22 9 V5FILT V5IN SCD1U25V3KX-GP 15 16 SC4D7U25V5KX-GP 51124_V5FILT VO1 VO2 VFB1 VFB2 2 C654 SC1U10V2KX-1GP 2 C 2 5 2 1 1 1 2 1 S 4 3 2 1 1 C623 R318 D D D D 1 2 G 1D1V_PW RGD TRIP1 TRIP2 DY 51124_VFB1 1 1 BC3 SC1U10V2KX-1GP 1D2V_PW R 1D1V_PW R 51124_VFB2 51124_VFB1 1 R335 2 0R0402-PAD -1 10KR2J-3-GP DY GAP-CLOSE-PW R 1 2 SB 84.04172.037 SC4D7U25V5KX-GP VCORE_EN 1 SC180P50V2JN-1GP 42,45 C636 1 2 R299 DY 2 1 10KR2J-3-GP R327 2R3J-GP 2 SC4D7U6D3V3MX-2GP 42,45 VCORE_EN R334 16K9R2F-GP S S S G C650 C R313 10KR2J-3-GP -1 79.10712.L02 2ND = 79.10712.6JL 1 3D3V_S0 5V_S5 U40 SI4172DY-T1-GE3-GP SC1U10V3KX-3GP 2 5 6 7 8 3D3V_S0 -1 GAP-CLOSE-PW R 68.1R01B.10K 2ND = 68.1R01A.20B R319 D 1 R333 2 0R0402-PAD D D D D SE100U25VM-L1-GP GAP-CLOSE-PW R G48 1 2 GAP-CLOSE-PW R G53 1 2 C647 2 TC21 Vo(cal)=1.1060V L32 2 IND-1UH-94-GP 1 1 1D1V_PW R SE390U2D5VM-2GP GAP-CLOSE-PW R G47 1 2 SC18P50V2JN-1-GP 1 Vtrip(mV)=Rtrip(Kohm)*10(uA) Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 2 D GAP-CLOSE-PW R G58 1 2 G49 1 2 GAP-CLOSE-PW R G56 1 2 C635 SCD1U25V3KX-GP D 1 SB 1 GAP-CLOSE-PW R G64 1 2 4 3 2 1 TC15 79.10712.L02 2ND = 79.10712.6JL 2 1D1V_S0 DCBATOUT_51124_1 2 1 SE100U25VM-L1-GP 2 1 1 D 1 GAP-CLOSE-PW R G71 1 2 GAP-CLOSE-PW R 79.3971V.6AL 2ND = 77.93971.02L G72 1 2 GAP-CLOSE-PW R 2009/03/27 WAYNE C682 change to 1u10v for ESL A TONSEL GND OPEN V5FILT 240k/CH1 300k/CH2 300k/CH1 360k/CH2 360k/CH1 420k/CH2 JV50-TR8 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Vout=0.758V*(R1+R2)/R2 --> PWM mode Vout=0.764V*(R1+R2)/R2 --> Skip Mode Title TPS51124_1D1V_1D2V Size Document Number A3 Date: 5 4 3 2 Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 47 of 63 4 DCBATOUT_51117 Cyntec 10*10*4 DCR=4.2mohm, Irating=16A Isat=33A 2009/04/29 Wayne 5 6 7 8 VDD VDDP UGATE LGATE 13 9 5117A_DRVH 51117A_DRVL 5 14 FB BOOT PHASE 12 51117A_LL VOUT PGOOD GND PGND NC#15 3 6 7 8 15 1 EN/DEM TON CS 1 C849 2 DY 1 C903 DY SB 1D8V_PW R TC32 SE390U2D5VM-2GP 79.3971V.6AL 2ND = 77.93971.02L C Vout=0.75*(R1+R2)/R2 3D3V_S5 1D8V_PW R R468 200KR2F-L-GP RT8209BGQW -GP R481 15K8R2F-GP R464 21K5R2F-GP 1 0R0402-PAD 1 R467 251117A_EN 1 1 R466 2 51117A_TON 2 51117A_TRIP 11 249KR2F-GP SB Vo(cal)=1.8214V 1D8V Iomax=10A OCP>15A 2 4 10 2 51117A_VFB -1 74.08209.073 1D8V_S3 1D8V_PW R G99 1 2 -1 R465 30KR2F-GP 4 3 2 1 U57 51117A_VFB 12,34,36 PM_SLP_S5# 68.1R51A.10E 84.04172.037 2 SC1U10V2KX-1GP 2 1 2 2 1 C850 51117A_VBST C U60 SI4172DY-T1-GE3-GP SCD1U25V3KX-GP SC18P50V2JN-1-GP 1 2 3D3R3J-L-GP S S S G CH551H-30PT-GP 83.R5003.C8F 51117A_V5FILT C861 51117A_VBST_1 2 1 D D D D D29 DY L54 1 2 IND-1D5UH-52-GP R618 1 R469 10R2F-L-GP 5V_S5 1D8V_PW R 2ND = 68.1R510.10J 1 4 3 2 1 G S S S 84.04800.D37 1 1 C862 SC1U10V2KX-1GP D 2 GAP-CLOSE-PW R 5V_S5 C868 1 U61 SI4800BDY-T1-GP C867 2 GAP-CLOSE-PW R C863 SB SC1U10V3KX-3GP GAP-CLOSE-PW R G96 1 2 1 GAP-CLOSE-PW R G95 1 2 2 GAP-CLOSE-PW R G93 1 2 1 GAP-CLOSE-PW R G94 1 2 1 1 2 DCBATOUT_51117 2 SCD1U25V3KX-GP 79.10712.L02 2ND = 79.10712.6JL 1 SC4D7U25V5KX-GP D 2 SC4D7U25V5KX-GP SE100U25VM-L1-GP 1 2 TC31 1 DCBATOUT G91 5 6 7 8 G92 2 2 DCBATOUT 3 D D D D 5 2 1D8V_S3_PW RGD 42 G103 2 1 2 GAP-CLOSE-PW R G100 1 2 GAP-CLOSE-PW R G104 1 2 GAP-CLOSE-PW R G109 1 2 GAP-CLOSE-PW R G107 1 2 GAP-CLOSE-PW R G101 1 2 GAP-CLOSE-PW R G105 1 2 GAP-CLOSE-PW R G102 1 2 GAP-CLOSE-PW R G108 1 2 GAP-CLOSE-PW R GAP-CLOSE-PW R DDR_0.9V B B 5V_S5 Iomax=1.5A OCP>3A 1D8V_S3 2 1 1 RT9026PFP-GP GAP-CLOSE-PW R C535 SC10U6D3V5KX-1GP 1 1 C542 SCD1U10V2KX-4GP GAP-CLOSE-PW R G34 1 2 1 2 3 4 5 2 VIN VDDQSNS S5 VLDOIN GND VTT S3 PGND VTTREF VTTSNS 1 10 9 8 7 6 2 9026_S3 GND 9026_S5 0D9V_S3 GAP-CLOSE-PW R G33 1 2 11 1 R249 2 0R0402-PAD 1 R247 2 0R0402-PAD 2 DDR_VREF_S3 DDR_VREF_PW R C545 G32 SCD1U10V2KX-4GP 1 2 U27 -1 12,34,36 PM_SLP_S5# 1 SC1U10V3KX-3GP C548 SC10U6D3V5KX-1GP 2 C547 2 -1 C544 SC10U6D3V5KX-1GP -1 A JV50-TR8 74.09026.079 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 DCDC_1D8V_RT8209B/LDO 0D9V Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 48 of 63 5 4 3 G957 D 2 1 G9161 1D5V_S0 Iomax=1A RT9161A 1D2V_S5 Iomax=400mA 1D5V_S0_LDO 1D5V_S0 3D3V_S5 D 2D5V Iomax=0.2A 1D2V_S5 G111 1 DY 1 74.09161.F3C 1 1 Place near to SB710 2 2 C For MINI Card.NEW Card power SW 2 2D5V_S0 GAP-CLOSE-PW R-3-GP C761 C782 2 1 2 IN GND OUT 1 2 3 1 G9161-120U65U-GP 74.09161.E3C 1 3 2 1 RT9161-A-25PG-GP 2 C913 SC1U10V3KX-3GP G74 VOUT VIN GND DY SC22U6D3V5MX-2GP G957T65UF-GP 74.95765.03C C411 SC1U10V3ZY-6GP DY C412 U18 2D5V_LDO U47 SC10U6D3V5KX-1GP 3D3V_S0 3 2 1 VOUT GND VIN C413 DY SC10U6D3V5KX-1GP GAP-CLOSE-PW R-3-GP SC10U6D3V5KX-1GP SC1U10V3KX-3GP U66 2 C410 1 3D3V_S0 GAP-CLOSE-PW R-3-GP G110 SC10U6D3V5KX-1GP 1 2 DY 2 C918 2 2 1 1 C Place near to CPU 1D8V_S3 DIS 1 C819 SC10U10V5ZY-1GP 2 C820 SC10U10V5ZY-1GP 2 1 DY Madison / M96 R1285 1 53 VGA_CORE_POK 2 0R2J-2-GP B Now set to 1V for Madison B Madison-Park D37 VO R421 P/N 1D1V 11K5 64.11525.6DL 1V 8K2 64.82015.6DL 5V_S5 2 1 3 1 2 83.00016.F11 2ND = 83.00016.B11 BAS16PT-GP Madison-Park DIS Iomax=2A U48 M9X 1D1V_M92 G85 9025_EN 2 74.09661.07D 1 1 DIS 9025_FB R446 2K2R2J-2-GP R420 30KR2F-GP 1 1 C776 DIS DY C771 2 GAP-CLOSE-PW R G86 1 2 GAP-CLOSE-PW R JV50-TR8 A Wistron Corporation 2 2 DIS C775 2 DIS 3D3V_S0 A DIS R421 8K2R2F-1-GP 2 5 6 7 8 9 SC10U10V5ZY-1GP NC#5 VO ADJ GND GND SC10U10V5ZY-1GP VPP VIN VEN POK SC100P50V2JN-3GP SCD1U25V3ZY-1GP 4 3 2 1 2 DY 1 C866 1 1 1 PM_SLP_S3# 2 0R2J-2-GP 2 12,34,35,36,42,44,53,54 1D1V_M92_PW R DIS G9661-25ADJF11U-GP R447 1 C803 SC1U10V3ZY-6GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Vo=0.8*(1+(R1/R2)) 1D1V_M92_POK 44,54 1D1V_M92_POK Title Size A3 -1_20091019 Date: 5 4 3 2 LDO 2D5V/1D5V/1D2V_S5/1V_VGA Document Number Rev -1 JV50-TR8 W ednesday, November 11, 2009 Sheet 1 49 of 63 4 SB DCBATOUT BT+ 2 AD+ C573 2 10 SCL 36,51 BAT_SDA 9 SDA 24 ISL88731_DHI PHASE 23 4 3 2 1 UGATE C595 1 2 BAT54PT-GP SC1U10V3KX-3GP -1 1 2 C575 SCD1U50V3KX-GP ISL88731_LX ISL88731_LX 1 PGND 19 CSOP 18 CSON 17 ISL88731_DLO 2 1 ICM ISL88731_CSIN 6 5 4 3 7 12 NC#16 16 VFB 15 1 U33 FDS8884-GP 84.08884.037 C567 SCD22U50V3ZY-1GP R275 PBATT_SENSE_R 1 B 2 BATT_SENSE 51 100R2J-2-GP ISL88731AHRZ-T-GP 74.88731.B73 29 1 2 G44 GAP-CLOSE-PW R-2U-GP 3D3V_AUX_S5 CHG_AGND 1 1 C562 SCD1U25V2ZY-1GP DY DY 2 1 2 C569 SC1U10V3KX-3GP SCD015U25V2KX-GP C566 2 1 1 C565 SCD01U50V2ZY-1GP DY VCOMP NC#5 ICOMP VREF NC#7 GND GND ISL88731_CCV 2 10KR2F-2-GP ISL88731_CCS 2 1ISL88731_CCV1 2 R274 1 C564 SCD01U50V2KX-1GP DY 2 10KR2J-3-GP B 1 R267 SCD01U16V2KX-3GP 2 1 C560 1KR2F-3-GP 10R2F-L-GP ISL88731_CSIP 1 8 2 4 3 2 1 AD_IA 1 S S S G 36 ISL88731_IINP 2 R276 ISL88731_CSIP_R 2 R272 1 NC#14 2 D01R3721F-GP-U 68.1001C.10Y D D D D 14 CHG_AGND BT+ R278 5 6 7 8 20 C619 2009/03/23 WAYNE L31 IND-10UH-209-GP LGATE C C563 SC10U25V6KX-1GP 36,51 BAT_SCL ISL88731_BST1 C15 SC10U25V6KX-1GP 2 1 ACOK ISL88731_BST 1 R284 2 ISL88731_LDO 0R0603-PAD C13 SC10U25V6KX-1GP 2 1 13 25 21 84.08884.037 -1 DY U36 FDS8884-GP 1 ISL88731_ACOK CHG_AGND BOOT VDDP 2 5 6 7 8 CHG_AGND C626 1 3 2 1 D15 1 1 ISL88731_CSSN_R ISL88731_VCC 1 VDDSMB 27 26 R285 4D7R3F-L-GP 2 1 2 1 2 2 C561 SCD1U10V2KX-4GP SCD01U50V2KX-1GP CHG_AGND 11 5V_S5 C571 CSSN VCC CHG_AGND S S S G R279 49K9R2F-L-GP C 28 C568 SC10U25V6KX-1GP 2 1 ACIN CSSP 2 2 2 1 DCIN CHRG_IN C576 SC1U10V3KX-3GP D D D D ISL88731_ACIN 22 D SCD1U25V3KX-GP U32 2 SC1U25V5KX-1GP 2ND = 83.R2003.J8F 3RD = 83.R2003.F8F C23 C577 SCD1U25V3KX-GP 2 83.R2003.C8F R277 215KR3F-1-GP CHG_AGND 1 1 2 C572 NC#1 CH521S-30PT-GP-U SCD047U25V3KX-GP SCD1U25V3KX-GP ISL88731_CSSP K 1 A 2 1 SC4D7U25V5KX-GP 1 GAP-CLOSE-PWR-2U-GP G45 1 2 2 D14 1 C574 ISL88731_ACOK 2 1 2 2 R261 1 10KR2F-2-GP 2 R286 10R2J-2-GP 2 4 5 R287 10R2J-2-GP 8 7 6 5 84.04407.F37 R293 470KR2J-2-GP G50 GAP-CLOSE-PWR-2U-GP 84.2N702.A3F 2ND = 84.DM601.03F 6 2 1 2N7002KDW -GP Q15 G61 GAP-CLOSE-PWR-2U-GP 2 1 3 2 1 SB For 2KV ESD protect G60 GAP-CLOSE-PWR-2U-GP 2 1 100KR2J-1-GP 1 10KR2J-3-GP D D D D AO4407A-GP 1 D G62 GAP-CLOSE-PWR-2U-GP 2 1 2 G43 GAP-CLOSE-PWR-2U-GP 1 2 R259 2 1ISL88731_CSSN 1 2 1 U34 S S S G SCD1U25V3KX-GP AD+_G_1 G42 GAP-CLOSE-PWR-2U-GP D01R3721F-GP-U R260 AO4407A-GP 1 2 3 4 C620 1 1 R262 2 1 2 3 4 SC4D7U25V5KX-GP D D D D G46 GAP-CLOSE-PWR-2U-GP 8 7 6 5 1 2009/03/23 WAYNE AD+_TO_SYS U30 S S S G 2 1 SB 84.04407.F37 AD+ 3 2 5 2 R270 10KR2F-2-GP AC_IN# ISL88731_LDO Q18 R268 10KR2F-2-GP . . . . S 2N7002EW -GP G 84.2N702.B3K 2ND = 84.2N702.C3K A 1 . JV50-TR8 2 AC_IN# D 36 1 R269 1 A ISL88731_ACOK 2 0R0402-PAD Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. R266 15KR2J-1-GP 2 Title ISL88731A Charger Size A3 Date: 5 4 3 2 Document Number Rev -1 JV50-TR8 Thursday, November 12, 2009 Sheet 1 50 of 63 A B C D E Adaptor in to generate DCBATOUT -1_20091023 4 4 -1_20091019 AD_JK AD+ K D40 AD+_2 R256 200KR2F-L-GP DC-JACK177-GP 90W U29 S S S G D D D D 8 7 6 5 AO4407A-GP C557 SC1U50V5ZY-1-GP 84.04407.F37 2 3 1 1 R1 22.10037.I01 2 R2 AD_OFF#_JK 1 Q13 22.10037.I21 65W 1 2 3 4 2 P6SBMJ24APT-GP 1 D9 P6SBMJ24APT-GP A NP1 C556 SCD1U50V3ZY-GP A 5 6 1 1 DY 2 2 83.P6SBM.AAG 83.P6SBM.AAG 2ND = 83.P6SMB.AAG 2ND = 83.P6SMB.AAG AD_JK EC59 SCD1U50V3KX-GP 4 1 2 3 K DCIN1 DTA124EUB-GP Q12 36 1 3 AFTE14P-GP AFTE14P-GP 1 1 R257 1KR2F-3-GP AD_JK AD_JK 2 2ND = 84.00124.T1K 3RD = 84.00124.N1K 3 1ST 84.00124.H1K 2ND = 84.00124.S1K 3RD = 84.00124.M1K 2 TP8 TP7 1ST 84.00124.K1K 2 R2 DTC124EUB-GP AD_OFF R255 100KR2J-1-GP 3 R1 1 BATA_SDA_1 BATA_SCL_1 BAT_IN#_1 BT+ BT+ BATTERY CONNECTOR AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP 1 1 1 1 1 TP9 TP10 TP11 TP13 TP12 83.00099.K11 1 2 ALP-CON7-12-GP DY 83.00099.K11 3 83.00099.K11 D12 BAV99PT-GP-U DY 3 D11 DY BAV99PT-GP-U 3 D10 BAV99PT-GP-U 2 1 2 1 3D3V_AUX_S5 RN76 1 2 3 4 2 36,50 BAT_SDA 36,50 BAT_SCL 8 7 6 5 BATA_SDA_1 BATA_SCL_1 9 8 2 1 GND GND GND GND 5 4 3 BAT_IN CLK DAT 6 7 BT+2 BT+1 BAT_IN#_1 SRN33J-7-GP EC19 2 SC1000P50V3JN-GP-U DY EC14 50 BATT_SENSE DY 2 1 EC16 SC1000P50V3JN-GP-U 1 2 1 1 2 2 K A DY EC18 SCD1U50V3ZY-GP DY EC13 SC10P50V2JN-4GP 2ND = 83.5R603.P3F 3RD = 83.5R603.M3F DY SC10P50V2JN-4GP 83.5R603.E3F EC17 SCD1U50V3ZY-GP D13 MM3Z5V6T1G-GP 1 BT+ 2 BAT_IN# 1 36 2 BAT1 20.81156.007 2ND = 20.81166.007 3RD = 20.81238.007 R8 1 2 0R0402-PAD 1 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size AD/BATT CONN Document Number Rev -1 JV50-TR8 Date: A B C D Monday, October 26, 2009 Sheet E 51 of 63 4 3 1D5V_M92 1 2 1 2 1 2 2 2 2 1 1 1 1 2 2 2 2 1 1 1 1 2 1 1 2 2 2 1 1 2 2 2 1 1 1 1 2 2 1 EC723 DY 2 1 EC103 DY 2 1 EC102 DY 2 1 EC101 DY 2 1 2 1 EC55 DY SC1KP50V2KX-1GP 2 1 EC100 SCD1U25V2ZY-1GP 2 1 1 D 1D8V_M92 SCD1U25V2ZY-1GP DY SCD1U25V2ZY-1GP 2 1 1 EC99 SCD1U25V2ZY-1GP DY SCD1U25V2ZY-1GP 2 EC54 DY SCD1U25V2ZY-1GP DY SCD1U25V2ZY-1GP 2 1 2 1 2 1 1 2 2 2 1 1 2 1 2 1 2 14 7 2 2 1 1 EC736 DY SC1KP50V2KX-1GP 2 EC735 DY SC1KP50V2KX-1GP SC1KP50V2KX-1GP EC53 SCD1U25V2ZY-1GP VCC_CORE_S0_0 EC734 DY SC1KP50V2KX-1GP EC52 DY EC733 DY 1D1V_S0 SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP EC15 EC732 DY 5V_S5 3D3V_S0 DY EC731 DY SC1KP50V2KX-1GP EC21 DY EC730 DY SC1KP50V2KX-1GP EC37 DY EC729 DY SC1KP50V2KX-1GP EC25 DY EC728 DY SC1KP50V2KX-1GP EC46 DY EC727 DY SC1KP50V2KX-1GP EC20 SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP DY EC726 DY SC1KP50V2KX-1GP EC12 DY 1 SC1KP50V2KX-1GP EC10 DY EC725 DY SC1KP50V2KX-1GP EC9 DY EC724 DY SC1KP50V2KX-1GP EC8 SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP DY EC722 DY SC1KP50V2KX-1GP EC7 DY BT+ EC721 DY SC1KP50V2KX-1GP DCBATOUT EC720 DY SC1KP50V2KX-1GP D EC719 DY SC1KP50V2KX-1GP TSLVC08APW -1-GP 73.07408.L16 2ND = 73.07408.L15 3RD = 73.07408.02B EC718 DY SC1KP50V2KX-1GP 11 13 EC717 DY SC1KP50V2KX-1GP SC1KP50V2KX-1GP DY 1 EC716 U16D 12 2 SB 2 5 3D3V_S5 DY DY DY DY 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 EC715 DY C DY DY SPRING_GND22 SPRING-7-GP 1 SPRING_GND21 SPRING-7-GP 1 ASPRING_GND22 SPRING-58-GP 1 34.41Y19.001 DY DY 2 1 1 2 1 1 1 1 1 34.4B312.002 ASPRING_GND21 SPRING-62-GP 1 34.4B312.002 ASPRING_GND20 SPRING-12-GP-U 1 34.39S07.003 ASPRING_GND19 SPRING-58-GP 1 ASPRING_GND18 SPRING-58-GP 1 34.39S07.003 2 1 1 2 2 2 2 1 1 1 1 1 1 2 1 2 DY 1 1 1 1 DY 34.43G01.002 DY EC714 DY SC1KP50V2KX-1GP 34.49U26.001 34.49U26.001 SPRING_GND17 SPRING-62-GP 34.43G01.002 EC713 DY SC1KP50V2KX-1GP ASPRING_GND16 SPRING-62-GP GND11 SPRING-48-GP DY SC1KP50V2KX-1GP B SPRING_GND15 SPRING-7-GP GND10 SPRING-48-GP EC711 EC712 DY SC1KP50V2KX-1GP SPRING_GND14 SPRING-7-GP EC710 DY SC1KP50V2KX-1GP DY EC709 DY SC1KP50V2KX-1GP 34.43G01.002 EC708 DY SC1KP50V2KX-1GP GND6 GND7 GND12 GND9 HOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GP EC707 DY SC1KP50V2KX-1GP 1 EC706 DY SC1KP50V2KX-1GP 1 EC705 DY SC1KP50V2KX-1GP 1 EC704 DY SC1KP50V2KX-1GP 1 EC703 DY SC1KP50V2KX-1GP 1 EC702 DY SC1KP50V2KX-1GP GND5 SPRING-48-GP EC701 DY SC1KP50V2KX-1GP GND4 HOLE355X355R111-S1-GP DY SC1KP50V2KX-1GP GND1 GND2 GND3 HOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GP EC38 SCD1U25V2ZY-1GP DY EC35 SCD1U25V2ZY-1GP SCD1U25V2ZY-1GP DY C DY 2 EC33 DY 2 1 SPRING_GND23 SPRING-U4-GP 1 1D8V_S3 SPRING_GND24 SPRING-U4-GP DY B DY H10 STF237R146H65-GP 1 DY TOP TOP TOP TOP BOT CPU NB VGA MDC MINI1 34.4H103.001 34.4Z003.001 2ND = 34.4Z003.201 5 34.4H103.001 DIS 34.4GD01.001 34.42Y01.011 2ND = 34.42Y01.021 H8 HOLE H9 HOLE TP233 TPAD14-GP TP232 TPAD14-GP 3D3V_S5 TP231 TPAD14-GP 5V_S5 TP230 TPAD14-GP 12,36 PM_PW RBTN# TP229 TPAD14-GP 6,11 CPU_PW RGD TP228 TPAD14-GP 35,36 S5_ENABLE TP227 TPAD14-GP 1 34.4P901.001 6,11 CPU_LDT_RST# TP226 TPAD14-GP Test Point放 放放Dimm Door打 打打打打打打 34.4GD01.001 JV50-TR8 A DY 1 1 1 DIS 34.4GD01.001 H7 1 1 1 1 1 1 DIS 34.4Z003.001 2ND = 34.4Z003.201 3D3V_S0 3D3V_AUX_S5 STF256R142H123-GP AH4 HOLE AH7 STF237R125H42-GP AH3 HOLE AH6 STF237R125H42-GP AH2 STF236R126H101-GP A STF236R126H101-GP AH1 STF237R125H42-GP AH5 Check test point Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Date: 4 3 2 EMI/Spring/Boss Document Number Rev JV50-TR8 Monday, October 26, 2009 Sheet 1 -1 52 of 63 5 DCBATOUT 4 3 2 1 Iomax=23A, OCP>40A DCBATOUT_8209E_VGA VGA_CORE_PW R G136 1 2 1 GAP-CLOSE-PW R G138 1 2 GAP-CLOSE-PW R G140 1 2 GAP-CLOSE-PW R G139 1 2 RT8209E for VGA 5V_S5 1 2 DIS 1 DIS 1 1 5 6 7 8 2 2 4 3 2 1 1 TC38 GAP-CLOSE-PW R G148 1 2 DIS TC39 GAP-CLOSE-PW R G149 1 2 C GAP-CLOSE-PW R G150 1 2 GAP-CLOSE-PW R G151 1 2 79.33719.L01 2 R1292 1 0R0402-PAD-1-GP VGA_CORE_POK 49 79.33719.L01 1 M9X IND-D45UH-14-GP DIS 2 10KR2J-3-GP R1291 10KR2J-3-GP DIS 2 220KR2F-GP 2 1 1 1 R1290 1 PM_SLP_S3# 3D3V_S0 RT8209EGQW -GP R1288 8K2R2F-1-GP U83 DIS S S S G 12,34,35,36,42,44,49,54 U82 S S S G C VGA_CORE_PW R 8209A_PGOOD_VGA 2 3 6 7 8 15 1 EN/DEM 2 TON 11 8209A_CS_VGACS GAP-CLOSE-PW R G147 1 2 2 1 VOUT PGOOD GND PGND NC#15 8209A_EN/DEM_VGA 8209A_TON_VGA DIS L62 1 2 8209A_PHASE_VGA 5 6 7 8 12 4 3 2 1 PHASE SIR460DP-T1-GE3-GP FB BOOT DIS SIR474DP-T1-GE3-GP 5 14 GAP-CLOSE-PW R G146 1 2 VGA_CORE_PW R 5 6 7 8 RT8209_FB_VGA 8209A_BOOT SIR460DP-T1-GE3-GP 2 1 SC1U10V2KX-1GP 2 2 A K 8209A_HGATE_VGA 8209A_LGATE_VGA SE330U2VDM-L-GP 13 9 GAP-CLOSE-PW R G145 1 2 SE330U2VDM-L-GP UGATE LGATE GAP-CLOSE-PW R G144 1 2 -1_20091021 D D D D VDD VDDP D D D D 4 10 C1056 SC10U25V5KX-GP DIS 8209A_VDD_VGA DIS 2 C1042 SC100P50V2JN-3GP -1_20091021 GAP-CLOSE-PW R G152 1 2 2 D38 DIS GAP-CLOSE-PW R G153 1 2 3 1 83.00016.F11 2ND = 83.00016.B11 GAP-CLOSE-PW R G154 1 2 BAS16PT-GP Madison-Park GAP-CLOSE-PW R G155 1 2 Vout=0.75*(1+Rh/Rl) DY 1 DIS -1_20091019 RT8209_FB_VGA NV_VID1 1 2 . . . . PW RCNTL_1 56 DIS Q45 MMBT2222A-3-GP C1046 SCD1U10V2KX-4GP R1299 B NV_VID0 DIS 1 2 GAP-CLOSE-PW R PW RCNTL_0 56 10KR2J-3-GP DIS 2 2 GAP-CLOSE-PW R G161 1 2 NV_VID0_R 1 DY 30k(64.30025.6DL) GAP-CLOSE-PW R G160 1 2 DIS E 10KR2J-3-GP 1.20V 84.2N702.B3K 2ND = 84.2N702.C3K R1298 DY VGA_CORE DIS . C 30K Q40 2N7002EW -GP S R1297 2N7002EW -GP G S 37.4K 84.2N702.B3K 2ND = 84.2N702.C3K . . . . GAP-CLOSE-PW R G159 1 2 R1309 100KR2J-1-GP 2 . M92 XT NV_VID0_Q DY B GAP-CLOSE-PW R G158 1 2 1 2 NV_VID1_Q G Q39 3D3V_S0 R1297 73K2R2F-GP DIS D 2 2 DIS R1296 110KR2F-L-GP DY D R1295 49K9R2F-L-GP 2 DIS 1 1 1 C1043 16KR3F-GP R1295 GAP-CLOSE-PW R G157 1 2 2 Madison-Park 1 10KR2J-3-GP B GAP-CLOSE-PW R G156 1 2 R1294 10KR2F-2-GP 2 C1044 SC47P50V2JN-3GP 1 2 1 R1293 1 3D3V_M92 D GAP-CLOSE-PW R G143 1 2 DIS C1040 SC10U25V5KX-GP U81 R1289 DIS DIS DIS DIS C1039 SC10U25V5KX-GP C1041 2 DIS S S S G D36 B0530W S-7-F-GP SC1U10V2KX-1GP 5V_S5 1 28209A_R_BOOT_VGA 3D3R3J-L-GP C1038 SCD1U16V2KX-3GP 1 D D D D U80 R1287 4 3 2 1 1 10R2F-L-GP C1037 DIS 2 DIS R1286 GAP-CLOSE-PW R DY GAP-CLOSE-PW R G141 1 2 DCBATOUT_8209E_VGA D GAP-CLOSE-PW R G142 1 2 VCC_GFX_CORE G137 2 C1045 SCD1U10V2KX-4GP 73.2k(64.73225.6DL) A Madison Pro Park XT M96 Pro M92-XT A 37.4k (64.37425.6DL) Madison Pro Park XT R1297 73.2K 36.5K 30K VGA_CORE 1.00V 1.12V 1.15V PWRCNTL_0 Wistron Corporation M96 Pro 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 0 1.00V 1.12V 1.15V 1.20V 1 0.90V 0.90V 0.90V 0.95V Title Size A3 Date: 5 4 3 2 RT8209E_VGA CORE Document Number Rev -1 JV50-TR8 Thursday, November 12, 2009 Sheet 1 53 of 63 5 4 3 2 1 1D5V_S0 Iomax=4A OCP>6A D 1D8V_S3 C879 SC10U6D3V5KX-1GP 2 2 1 DIS DIS 2 C877 SC1U10V3KX-3GP 1 1 5V_S5 D DIS C883 SC10U6D3V5KX-1GP 1D5V_M92 for VRAM B 3D3V_S0 DY 2 R624 1 0R2J-2-GP G9731F11U-GP 2 D39 BAS16PT-GP DIS 1 DIS 83.00016.F11 2ND = 83.00016.B11 R623 30K1R3F-GP DIS C870 C878 C 2 2 1 Madison-Park DIS C882 1 DIS 2 R625 26K7R3F-GP SC10U6D3V5KX-1GP DIS 1 5912_FB 2 4 3 2 1 1 VO#4 VO#3 ADJ GND 3 5912_EN VIN VPP POK VEN GND 2 M9X C 1D5V_M92 Vo(cal.)=1.5096V 5 6 7 8 9 SC10U6D3V5KX-1GP 5912_EN SC47P50V2JN-3GP 1 R622 2 0R2J-2-GP PM_SLP_S3# U62 1 12,34,35,36,42,44,49,53 9371_1_POK Vo=0.8*(1+(R1/R2)) R1300 2 0R2J-2-GP Madison-Park 1D5V_S0 Iomax=4A OCP>6A 1 2 5V_S5 Madison-M96 C1047 SC10U6D3V5KX-1GP Madison-M96 C1048 SC10U6D3V5KX-1GP 1 2 SCD1U25V3ZY-1GP DY C1049 SC1U10V3KX-3GP Madison-M96 1D5V_M96 2 1 1D8V_S3 C869 1 1 2 44,49 1D1V_M92_POK for VRAM A Vo(cal.)=1.5096V B B G9731F11U-GP C1050 2 1 Madison-M96 Madison-M96 C1052 Madison-M96 2 R1303 30K1R3F-GP C1051 SC10U6D3V5KX-1GP R1302 26K7R3F-GP U84 1 Madison-M96 Madison-M96 2 9731_FB 1 4 3 2 1 2 VO#4 VO#3 ADJ GND SC10U6D3V5KX-1GP VIN VPP POK VEN GND SC47P50V2JN-3GP 5 6 7 8 9 1 9731_2_POK 5912_EN 1D5V_M96 1 DY 2 R1301 1 0R2J-2-GP Madison-M96 2 3D3V_S0 Vo=0.8*(1+(R1/R2)) JV50-TR8 A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 G9731_1D5V_VRAM POWER Document Number Rev -1 JV50-TR8 W ednesday, November 11, 2009 Sheet 1 54 of 63 5 4 3 8 PEG_TXN[15..0] 1 1 OF 8 AVGA1A 8 PEG_TXP[15..0] 2 PEG_TXP[15..0] 8 PEG_RXP[15..0] PEG_TXN[15..0] 8 PEG_RXN[15..0] PEG_TXP0 PEG_TXN0 AA38 Y37 PCIE_TX0P PCIE_TX0N Y33 Y32 PEG_RXP0_1 PEG_RXN0_1 C222 1 2 SCD1U16V2KX-3GP 1 C231 SCD1U16V2KX-3GP PEG_TXP1 PEG_TXN1 Y35 W36 PCIE_TX1P PCIE_TX1N W33 W32 PEG_RXP1_1 PEG_RXN1_1 C226 1 2 SCD1U16V2KX-3GP 1 C233 SCD1U16V2KX-3GP PEG_TXP2 PEG_TXN2 W38 V37 PCIE_TX2P PCIE_TX2N U33 U32 PEG_RXP2_1 PEG_RXN2_1 C257 PEG_TXP3 PEG_TXN3 V35 U36 PCIE_RX3P PCIE_RX3N PCIE_TX3P PCIE_TX3N U30 U29 PEG_RXP3_1 PEG_RXN3_1 C268 1 2 SCD1U16V2KX-3GP 1 C248 SCD1U16V2KX-3GP PEG_TXP4 PEG_TXN4 U38 T37 PCIE_RX4P PCIE_RX4N PCIE_TX4P PCIE_TX4N T33 T32 PEG_RXP4_1 PEG_RXN4_1 C278 1 2 SCD1U16V2KX-3GP 1 C273 SCD1U16V2KX-3GP PEG_TXP5 PEG_TXN5 T35 R36 PCIE_RX5P PCIE_RX5N PCIE_TX5P PCIE_TX5N T30 T29 PEG_RXP5_1 PEG_RXN5_1 C287 1 2 SCD1U16V2KX-3GP 1 C279 SCD1U16V2KX-3GP PEG_TXP6 PEG_TXN6 R38 P37 PCIE_RX6P PCIE_RX6N PCIE_TX6P PCIE_TX6N P33 P32 PEG_RXP6_1 PEG_RXN6_1 C289 1 2 SCD1U16V2KX-3GP 1 C294 SCD1U16V2KX-3GP PEG_TXP7 PEG_TXN7 P35 N36 PCIE_RX7P PCIE_RX7N PCIE_TX7P PCIE_TX7N P30 P29 PEG_RXP7_1 PEG_RXN7_1 C307 1 2 SCD1U16V2KX-3GP 1 C299 SCD1U16V2KX-3GP PEG_TXP8 PEG_TXN8 N38 M37 PCIE_RX8P PCIE_RX8N PCIE_TX8P PCIE_TX8N N33 N32 PEG_RXP8_1 PEG_RXN8_1 C301 1 2 SCD1U16V2KX-3GP 1 C309 SCD1U16V2KX-3GP PEG_TXP9 PEG_TXN9 M35 L36 PCIE_RX9P PCIE_RX9N PCIE_TX9P PCIE_TX9N N30 N29 PEG_RXP9_1 PEG_RXN9_1 C319 PCIE_RX0P PCIE_RX0N DIS D PCIE_RX1P PCIE_RX1N DIS PCIE_RX2P PCIE_RX2N 1 2 SCD1U16V2KX-3GP 1 C238 SCD1U16V2KX-3GP DIS DIS DIS PEG_TXP10 PEG_TXN10 L38 K37 PEG_TXP11 PEG_TXN11 K35 J36 PEG_TXP12 PEG_TXN12 J38 H37 PEG_TXP13 PEG_TXN13 H35 G36 PEG_TXP14 PEG_TXN14 G38 F37 PCI EXPRESS INTERFACE C PCIE_RX10P PCIE_RX10N PCIE_RX11P PCIE_RX11N PCIE_RX12P PCIE_RX12N PCIE_RX13P PCIE_RX13N PCIE_RX14P PCIE_RX14N DIS DIS DIS DIS 1 2 SCD1U16V2KX-3GP 1 C328 SCD1U16V2KX-3GP DIS PCIE_TX10P PCIE_TX10N L33 L32 PEG_RXP10_1 PEG_RXN10_1 C303 1 2 SCD1U16V2KX-3GP 1 C292 SCD1U16V2KX-3GP DIS PCIE_TX11P PCIE_TX11N L30 L29 PEG_RXP11_1 PEG_RXN11_1 C333 1 2 SCD1U16V2KX-3GP 1 C344 SCD1U16V2KX-3GP DIS PCIE_TX12P PCIE_TX12N K33 K32 PEG_RXP12_1 PEG_RXN12_1 C314 1 2 SCD1U16V2KX-3GP 1 C322 SCD1U16V2KX-3GP DIS PCIE_TX13P PCIE_TX13N J33 J32 PEG_RXP13_1 PEG_RXN13_1 C343 1 2 SCD1U16V2KX-3GP 1 C332 SCD1U16V2KX-3GP DIS PCIE_TX14P PCIE_TX14N K30 K29 PEG_RXP14_1 PEG_RXN14_1 C353 1 2 SCD1U16V2KX-3GP 1 C360 SCD1U16V2KX-3GP DIS PEG_TXP15 PEG_TXN15 F35 E37 PCIE_RX15P PCIE_RX15N PCIE_TX15P PCIE_TX15N H33 H32 PEG_RXP15_1 PEG_RXN15_1 C352 1 2 SCD1U16V2KX-3GP 1 C359 SCD1U16V2KX-3GP DIS B 2 DIS 2 DIS 2 DIS 2 DIS 2 DIS 2 DIS 2 DIS 2 DIS 2 PEG_RXP[15..0] PEG_RXN[15..0] PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 D PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP8 PEG_RXN8 C DIS 2 DIS 2 DIS 2 DIS 2 DIS 2 DIS 2 DIS 2 PEG_RXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15 B DIS CLOCK AB35 AA36 3 CLK_PCIE_PEG 3 CLK_PCIE_PEG# PCIE_REFCLKP PCIE_REFCLKN 1D1V_M92 DIS CALIBRATION CO-LAYOUT PLT_RST1# PLT_RST1# 1 2 R423 0R2J-2-GP DIS NC#AJ21 NC#AK21 PWRGOOD PCIE_CALRP Y30 PCIE_CALRN Y29 VGA_PCIE_CALRN R99 Madison-Park PLT_RST1#_M92_1 1 6,9,11,26,33,36 AJ21 AK21 2VGA_PW RGOOD AH16 10KR2J-3-GP R1231 1 R89 VGA_PCIE_CALRP 1 PERST# MADISON-PRO-GP 2 1 2 2KR2F-3-GP DIS DIS 71.MDSON.M01 2 DY C780 SC47P50V2JN-3GP AA30 1K27R2F-L-GP DIS / UMA A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 Madison PCIE Document Number Rev -1 JV71-TR Monday, October 26, 2009 Sheet 1 55 of 63 5 Layout notice: It should be pleace near HDMI connector DIS 1 C138 TX5P_DPB0P TX5M_DPB0N TXCCP_DPC3P TXCCM_DPC3N TX0P_DPC2P TX0M_DPC2N DPC TX1P_DPC1P TX1M_DPC1N TX2P_DPC0P TX2M_DPC0N TXCDP_DPD3P TXCDM_DPD3N TX3P_DPD2P TX3M_DPD2N DPD I2C AU16 AV15 AT17 AR16 AU20 AT19 1 1 FAN_PWM CRT_BLUE 20 AC36 AC38 CRT_HSYNC CRT_VSYNC DDCCLK_AUX3P DDCDATA_AUX3N DPLUS DMINUS DDCCLK_AUX4P DDCDATA_AUX4N THERMAL DDCCLK_AUX5P DDCDATA_AUX5N AK32 TS_FDO DDC6CLK DDC6DATA TS_A AJ32 AJ33 DDCCLK_AUX7P DDCDATA_AUX7N TSVDD TSVSS MADISON-PRO-GP 1 2 3 4 DAC2_A2VDD 3D3V_M92 2 R70 C173 SCD1U16V2KX-3GP AC32 AD32 AF32 DIS 4 3 1 C187 DIS 2 1 1 2 DIS AVSSQ DAC1_VDD1DI DIS C220 XTAL-27MHZ-58-GP 2 BLM15BD121SS1D-GP DIS 68.00084.F81 2ND = 68.00217.701 1D8V_M92 L17 DIS C221 C204 DIS 2 BLM15BD121SS1D-GP DIS 68.00084.F81 2ND = 68.00217.701 B DAC2_VDD2DI DAC2_A2VDDQ 2mA AD33 C202 SCD1U16V2KX-3GP DAC2_A2VDDQ DIS AF33 AA29 VGA_R2SET 1D8V_M92 L19 1 DAC2_A2VDD 1 AG33 DY 3D3V_M92 2 BLM15BD121SS1D-GP C201 DIS SC1U6D3V2KX-GP 68.00084.F81 2ND = 68.00217.701 R418 1 2 715R2F-GP CRT_DDCCLK CRT_DDCDATA DIS C559 SCD1U16V2KX-3GP U31 20 20 35,36 SMBC_Therm 35,36 SMBD_Therm AM27 AL27 R2711 R2731 DIS DIS AM19 AL19 HDMI_A_CLK HDMI_A_DAT 2 0R2J-2-GP 2 0R2J-2-GP SMBC_G781 8 SMBD_G781 7 ALERT#_G781 6 5 21 21 SMBCLK VCC SMBDATA DXP ALERT# DXN GND THERM# 1 2 3 4 GPU_DPLUS GPU_DMINUS G781_THERM# G781P8F-GP DIS AN20 AM20 AL30 AM30 AL29 AM29 DIS 2 AM26 AN26 RN75 SRN2K2J-1-GP for TR DIS 3D3V_M92 AN21 AM21 AJ30 AJ31 DIS AK30 AK29 Q21 MMBT3904-4-GP A 3D3V_M92 B HPD1 HDMI_A_HPD 21 84.T3904.C11 2ND = 84.03904.L06 DIS / UMA Wistron Corporation R325 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 2 1 DIS Title C689 SC8P250V2CC-GP 82.30034.461 2ND = 82.30034.701 Size A2 Date: 5 C184 1 C156 DY AD29 AC29 AG31 AG32 1 0R0402-PAD DIS 2 DIS C183 1 AD30 AD31 AF30 AF31 1D8V_M92 L14 1 C182 1 DIS 2 1 2 DY 2 DIS DIS C678 SC8P250V2CC-GP 1R559 AVSSQ DAC1_AVDD 1 0R0402-PAD 1 DAC1_VDD1DI AC30 AC31 2 C119 1 2 4 1D8V_M92 R52 C158 SCD1U16V2KX-3GP 71.MDSON.M01 DIS 1R558 DAC2_VDD2DI AVSSQ 1 2 DAC1_AVDD 1 100mA 0R2J-2-GP AVSSQ 499R2F-2-GP DIS 1 2 R80 20,59 20,59 1 65mA X6 3 DIS 1 2 AC33 AC34 RN86 SRN150F-1-GP 20 DIS AB34 VGA_RSET AD34 AE34 8 7 6 5 AF37 AE38 E 1 R360 1MR2J-1-GP DIS 1R557 CRT_GREEN 4 3 AUX2P AUX2N XO_IN2 2 1 1 2 2 SCD1U16V2KX-3GP SC1U10V3KX-3GP C153 1R553 AE36 AD35 1 2 XO_IN AF29 AG29 C C DDC2CLK DDC2DATA AL31 DIS 1R556 CRT_RED 20 2 1 2 TP77 DDC1CLK DDC1DATA AUX1P AUX1N PLL/CLOCK R1232 TSVDD DIS 1R555 AD39 AD37 DIS DPLL_VDDC 1 VGA_XO_IN AW34 R1233 0R2J-2-GP 1 VGA_XO_IN2 AW35 M9X 0R2J-2-GP DIS 71.MDSON.M01 CRT_GREEN DPLL_PVDD DPLL_PVSS XTALIN XTALOUT LVDS_TXAOUT2+ 19 LVDS_TXAOUT2- 19 1 H2SYNC V2SYNC DDC/AUX GPU_DPLUS GPU_DMINUS C125 MADISON-PRO-GP CRT_RED AT23 AR22 LVDS_TXAOUT1+ 19 LVDS_TXAOUT1- 19 AP35 AR35 2 C Y COMP R2SET For Thermal sensor DIS 84.2N702.B3K 2ND = 84.2N702.C3K AU22 AV21 LVDS_TXAOUT0+ 19 LVDS_TXAOUT0- 19 AR37 AU39 AN36 AP37 TXOUT_L3P TXOUT_L3N 2N7002EW-GP AT21 AR20 2 1 2 2 68.00084.F81 2ND = 68.00217.701 TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N LVDS_TXACLK+ 19 LVDS_TXACLK- 19 AW37 AU35 SC10U6D3V3MX-GP 2 L10 D S AP34 AR34 2 B2 B2# A2VDDQ AV33 AU34 M9X A R324 100KR2F-L1-GP TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N 1 G2 G2# VREFG AN31 1 220mA BLM15BD121SS1D-GP G TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N TMDS_A_TX Q22 100mA 125mA 1D8V_M92 TXCLK_LP_DPE3P TXCLK_LN_DPE3N 5V_S0 2 R2 R2# A2VSSQ XTALIN XTALOUT LVDS_TXBOUT2+ 19 LVDS_TXBOUT2- 19 SC10U6D3V3MX-GP VDD1DI VSS1DI 75mA DPLL_VDDC LVDS_TXBOUT1+ 19 LVDS_TXBOUT1- 19 AG38 AH37 LVTMDP DPLL_PVDD DIS LVDS_TXBOUT0+ 19 LVDS_TXBOUT0- 19 SCD1U16V2KX-3GP DIS D AF35 AG36 TXOUT_U3P TXOUT_U3N AU14 AV13 AT15 AR14 130mA AM32 AN32 TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N AT33 AU32 R82 RSET AVDD AVSSQ A2VDD C152 SCD1U16V2KX-3GP BLON_IN 9,36 LCDVDD_ON 19 DIS AH35 AJ36 SC1U6D3V2KX-GP 1 HSYNC VSYNC HPD1 AH13 TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N SCD1U16V2KX-3GP R69 249R2F-GP 9,19 1 2 AR32 AT31 TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N SCD1U16V2KX-3GP 2 B B# = 0.6V) VGA_VREFG R499 1 DY 2 RN38 SRN10KJ-5-GP LVDS_TXBCLK+ 19 LVDS_TXBCLK- 19 AJ38 AK37 SCD1U16V2KX-3GP VREFG VOLTAGE DIVIDER IS (VREFG = VDDR4,5(1.8V) / 3 DIS AV31 AU30 2 2 1 G G# VDD2DI VSS2DI R73 499R2F-2-GP BRIGHTNESS_AMD 0R2J-2-GP AK35 AL36 TXCLK_UP_DPF3P TXCLK_UN_DPF3N SC10U6D3V3MX-GP B R504 1 CRT_BLUE R R# GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT DAC1 GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCS# GPIO_23_CLKREQ# JTAG_TRST# JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 DAC2 GENERICF GENERICG GPIO_VGA_03 GPIO_VGA_04 1 1 VARY_BL DIGON SC1U6D3V2KX-GP AH20 AH18 AN16 AH23 TP83 AJ23 DIS TP80 AH17 59 GPIO_VGA_05 GPIO_VGA_06 R168 1 AJ17 GPIO_VGA_07_BLON TP84 1 2 AK17 9,36 BLON_IN 0R2J-2-GP AJ13 59 GPIO_VGA_08 Thermal_int AH15 DIS 59 GPIO_VGA_09 AJ16 AK16 59 GPIO_VGA_11 AL16 59 GPIO_VGA_12 AM16 59 GPIO_VGA_13 1 GPIO_VGA_14_HPD2 AM14 3D3V_M92 TP64 AM13 53 PWRCNTL_0 GPIO_VGA_16_SSIN AK14 1 Thermal_int TP96 AG30 1 GPIO_VGA_18_HPD3 AN14 R1304 TP66 1 THERMTRIP_VGA AM17 TP79 AL13 1 2 JTAG_TMS 53 PWRCNTL_1 R355 1 10KR2J-3-GP DIS 2VGA_BB_EN AJ14 10KR2J-3-GP AK13 DY 59 GPIO_VGA_22 GPIO_23_CLKREQ# 1 AN13 JTAG_TRSTB AM23 TP184 1JTAG_TDI AN23 JTAG_TCK JTAG_TCK TP65 AK23 3 JTAG_TCK JTAG_TMS AL24 R53 1JTAG_TDO AM24 TP71 1GENERICA AJ19 10KR2J-3-GP TP85 1GENERICB AK19 DY TP76 1GENERICC AJ20 Back Bias (body bias) which minimizes TP81 1GENERICD AK20 power consumption in battery modes. GENERICE TP74 AJ24 1 PD = Disable TP78 1GENERICF AH26 TP75 1GENERICG AH24 PU = Enable TP82 1D8V_M92 HPD1 AK24 59 GPIO_VGA_00 59 GPIO_VGA_01 59 GPIO_VGA_02 AR30 AT29 SCL SDA GENERAL PURPOSE I/O R75 10KR2J-3-GP TMDS_A_TX2+ 21 TMDS_A_TX2- 21 1 3D3V_M92 2 BLON_IN_R AK27 AJ27 1 AK26 AJ26 19 LCD_EDID_CLK 19 LCD_EDID_DAT TX5P_DPD0P TX5M_DPD0N TMDS_A_TX1+ 21 TMDS_A_TX1- 21 DIS2 2 C 0R2J-2-GP 2 It's strap for GDDR3-136ball Need to Clarify TX4P_DPD1P TX4M_DPD1N DIS2 LVDS CONTROL 2 499R2F-2-GP 2 499R2F-2-GP TX4P_DPB1P TX4M_DPB1N TX2P_DPAP0 TX2P_DPAN0 TMDS_A_TX0+ 21 TMDS_A_TX0- 21 2 499R2F-2-GP 2 499R2F-2-GP TX3P_DPB2P TX3M_DPB2N DPB TX2P_DPAP1 TX2P_DPAN1 AT27 AR26 DIS2 2 1 TXCBP_DPB3P TXCBM_DPB3N AU26 AV25 . HYNIX-SAMSUNG TX2P_DPA0P TX2M_DPA0N 1 1 1 2 HYNIX-SAMSUNG 1 HYNIX 2 R374 1 DY DVPCNTL_MVP_0 DVPCNTL_MVP_1 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCLK DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23 TMDS_A_TXC+ 21 TMDS_A_TXC- 21 1R554 2 2 2 2 SAMSUNG 1 2 2 1 DY AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12 TX2P_DPAP2 TX2P_DPAN2 . . . . SAMSUNG 1 1 2 1 1 2 2 TX1P_DPA1P TX1M_DPA1N R371 10KR2J-3-GP (800MHz) (800MHz) R369 10KR2J-3-GP R368 10KR2J-3-GP DVPDATA [3:0] 0100 1GB GDDR3 Hynix-H5TQ1G63BFR-12C 1000 1GB GDDR3 Samsung-K4W1G1646E-HC12 1100 1GB GDDR3 ATI (800MHz) 10KR2J-3-GP R363 HYNIX 10KR2J-3-GP DVPDATA [3:2:1:0] for VRAM type selection H/W strap Should provide VRAM Table for VBios request R370 10KR2J-3-GP MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3 R367 10KR2J-3-GP 10KR2J-3-GP DIS SCD1U16V2KX-3GP DIS SC1U10V3KX-3GP SC10U6D3V3MX-GP DY 68.00084.F81 2ND = 68.00217.701 C130 AT25 AR24 DIS2 2 499R2F-2-GP 2 499R2F-2-GP DPA C696 1DIS 2 SCD1U16V2KX-3GP C6971 SCD1U16V2KX-3GP C694 1DIS 2 SCD1U16V2KX-3GP C6951 SCD1U16V2KX-3GP C692 1DIS 2 C6931 SCD1U16V2KX-3GP SCD1U16V2KX-3GP C690 1DIS 2 SCD1U16V2KX-3GP C6911 SCD1U16V2KX-3GP 2 1D8V_M92 1D8V_M92 1D8V_M92 1D8V_M92 TX2P_DPAP3 TX2P_DPAN3 1R552 TX0P_DPA2P TX0M_DPA2N MUTI GFX DPLL_VDDC AU24 AV23 2 499R2F-2-GP 2 499R2F-2-GP TXCAP_DPA3P TXCAM_DPA3N R365 C120 7 OF 8 AVGA1G DIS C122 DIS 2 OF 8 AVGA1B 1 2 BLM15BD121SS1D-GP 1D1V_M92 1 2 1 2 1 2 SC10U6D3V3MX-GP SC10U6D3V3MX-GP 68.00084.F81 DIS 2ND = 68.00217.701 DY C123 SCD1U16V2KX-3GP C121 D 2 DPLL_PVDD DIS 1 2 BLM15BD121SS1D-GP 1D8V_M92 L6 3 1 L7 4 4 3 2 Madison IO Document Number Rev -1 JV71-TR Wednesday, November 11, 2009 1 Sheet 56 of 63 3 2 -1_20091026 1 1D8V_M92 400mA D 1 2 2 1 1 1 1 2 2 2 1 1 2 1 1 2 2 2 1 1 2 1 2 1 2 1 2 1 2 1 1 2 2 1 2 1 2 1 2 1 1 2 2 1 2 1 2 C172 DIS 1 DIS C185 2 1 C235 2 1 DY 2 1 2 1 2 1 2 1 2 1 2 C208 VCC_GFX_CORE B AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13 C1062 1 DIS 2 1 C1063 DIS 2 1 C1064 DIS 2 1 C1065 DIS 2 C1066 1 DIS 2 C1067 DIS 1 C1068 DIS 2 1 C1069 DIS 2 1 C1070 DIS 2 C225 1 1 DIS 2 2 C300 2 C284 DIS 2 C355 DIS 1 DIS 1 DIS 1 C1061 VCC_GFX_CORE C274 2 1 DIS C357 DIS 2 1 C282 2 C230 1 DIS 1 DIS 2 1 2 2 1 1 2 1 1 2 1 2 DIS VCC_GFX_CORE 2 2 1 2 1 C190 SC10U6D3V3MX-GP 2 2 1 2 1 2 1 2 1 1 2 1 1 2 2 1 2 1 1 2 2 1 2 1 1 2 1 2 1 2 1 2 1 2 2 1 1 2 1 2 2 2 1 2 1 2 1 2 2 1 1 1 2 DY SC10U6D3V3MX-GP 1 C165 SC10U6D3V3MX-GP 2 DIS SC10U6D3V3MX-GP DIS 71.MDSON.M01 SPV10 A SPV18 50mA 1D8V_M92 Madison-Park L60 MPV18 150mA 1 2 Madison-Park 1 2 Madison-Park 1 C987 SCD1U16V2KX-3GP 2 C986 SCD1U16V2KX-3GP Madison-Park 1 C985 SC10U6D3V3MX-GP 2 C984 SC1U6D3V2KX-GP 2 C983 Madison-Park 1 DIS / UMA 68.00084.F81 2ND = 68.00217.701 Madison-Park C982 SC1U6D3V2KX-GP 2 C981 SC10U6D3V3MX-GP Madison-Park 1 1 2 BLM15BD121SS1D-GP C980 SC1U6D3V2KX-GP 1 2 BLM15BD121SS1D-GP 68.00084.F81 2ND = 68.00217.701 SC1U6D3V2KX-GP SCD1U16V2KX-3GP SC1U6D3V2KX-GP SC10U6D3V3MX-GP 1 C137 L59 2 C134 1 C133 2 M9X 1 BLM15BD121SS1D-GP 68.00084.F81 2ND = 68.00217.701 Madison-Park 2 1D8V_M92 Madison-Park DIS 1 DIS 2 DIS 2 Madison-Park L11 1 1 VCC_GFX_CORE 2 A C200 SC10U6D3V3MX-GP MADISON-PRO-GP DIS SC10U6D3V3MX-GP M9X 68.00084.F81 2ND = 68.00217.701 C296 SC10U6D3V3MX-GP R1236 0R2J-2-GP C SC1U6D3V2KX-GP 2 Madison-Park DIS SC10U6D3V3MX-GP L58 1 BLM15BD121SS1D-GP C234 SC2D2U6D3V2MX-GP FB_GND DIS C228 SC1U6D3V2KX-GP AH29 ISOLATED CORE I/O SC1U6D3V2KX-GP FB_GND 1 FB_VDDCI C223 VCC_GFX_CORE SC10U6D3V3MX-GP TP246 FB_VDDC DIS SC10U6D3V3MX-GP AG28 C270 SC10U6D3V3MX-GP FB_VDDCI C265 DIS SC2D2U6D3V2MX-GP 1 C210 DIS SC2D2U6D3V2MX-GP TP245 C350 SCD1U16V2KX-3GP TPAD14-GP C162 DIS SC1U6D3V2KX-GP AF28 C266 DIS SC1U6D3V2KX-GP FB_VDDC C267 DIS SC1U6D3V2KX-GP 1 C297 DY SCD1U16V2KX-3GP SCD1U16V2KX-3GP TP244 VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI SC10U6D3V3MX-GP SPVSS VOLTAGE SENESE TPAD14-GP TPAD14-GP 1D1V_M92 SPV10 AN10 DIS C276 SC1U6D3V2KX-GP C727 SPV18 AN9 DIS C290 DIS SC2D2U6D3V2MX-GP AM10 MPV18 MPV18 DIS SC1U6D3V2KX-GP SPV18 PCIE_PVDD C269 DIS SC10U6D3V3MX-GP H7 H8 C216 DIS SC10U6D3V3MX-GP MPV18 DIS SC10U6D3V3MX-GP AB37 PCIE_PVDD C329 SC1U6D3V2KX-GP PLL M9X DIS SC2D2U6D3V2MX-GP 40mA C283 VCC_GFX_CORE DIS SC10U6D3V3MX-GP C726 SC1U6D3V2KX-GP SC10U6D3V3MX-GP 68.00084.F81 C729 2ND = 68.00217.701 DIS NC_VDDRHB NC_VSSRHB R1235 SPV10 DIS NC_VDDRHA NC_VSSRHA DIS SC1U6D3V2KX-GP M9X 0R2J-2-GP SC1U6D3V2KX-GP 68.00084.F81 2ND = 68.00217.701 V12 U12 C298 SC1U6D3V2KX-GP C310 M20 M21 +VDDRHB +VSSRHB DIS SC1U6D3V2KX-GP M9X +VDDRHA +VSSRHA C337 SC1U6D3V2KX-GP 1D5V_M92 L21 1 2 BLM15BD121SS1D-GP R1234 M9X 0R2J-2-GP DIS SC2D2U6D3V2MX-GP M9X M9x VRAM CLOCK C242 C321 SC1U6D3V2KX-GP M9X 68.00084.F81 = 68.00217.701 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP L20 2ND 1 2 BLM15BD121SS1D-GP VDDR4 VDDR4 VDDR4 VDDR4 DIS SC1U6D3V2KX-GP 1D5V_M92 C149 40mA 1 2 BLM15BD121SS1D-GP VDDR4 VDDR4 VDDR4 VDDR4 C306 SC2D2U6D3V2MX-GP AF13 AF15 AG13 AG15 SC1U6D3V2KX-GP AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 DIS SC2D2U6D3V2MX-GP DIS C191 C313 SC1U6D3V2KX-GP I/O VDDR3 VDDR3 VDDR3 VDDR3 DIS SC1U6D3V2KX-GP AF23 AF24 AG23 AG24 1D1V_M92 SC1U6D3V2KX-GP 60mA VDD_CT VDD_CT VDD_CT VDD_CT C224 1100mA G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28 SC1U6D3V2KX-GP AF26 AF27 AG26 AG27 POWER DIS VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC/BIF_VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC/BIF_VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC CORE LEVEL TRANSLATION 17mA AD12 AF11 AF12 AG11 C272 PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC AA31 AA32 AA33 AA34 V28 W29 W30 Y31 SC1U6D3V2KX-GP SC1U6D3V2KX-GP VDD_CT PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR SC1U6D3V2KX-GP C164 C168 PCIE_PVDD DIS DIS C302 C171 SCD1U16V2KX-3GP C167 SCD1U16V2KX-3GP C198 DIS DIS C188 SC1U6D3V2KX-GP DIS C197 SCD1U16V2KX-3GP C166 SC1U6D3V2KX-GP L46 C260 SC1U6D3V2KX-GP 1D8V_M92 SC1U6D3V2KX-GP B DIS C327 DIS C336 SCD1U16V2KX-3GP DIS 1D8V_M92 C326 DIS SC1U6D3V2KX-GP 3D3V_M92 C668 DIS SC1U6D3V2KX-GP 68.00084.F81 2ND = 68.00217.701 DIS DIS SC1U6D3V2KX-GP SC10U6D3V3MX-GP DIS SC10U6D3V3MX-GP DIS 2 BLM15BD121SS1D-GP C291 SC1U6D3V2KX-GP DIS DIS C169 DIS C318 SCD1U16V2KX-3GP L22 1 DIS SC1U6D3V2KX-GP 1D8V_M92 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC10U6D3V3MX-GP C DIS C199 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 SC1U6D3V2KX-GP DIS C219 AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7 C195 SC1U6D3V2KX-GP DIS C317 DIS C330 DIS SC1U6D3V2KX-GP SC10U6D3V3MX-GP DIS DIS C323 SC10U6D3V3MX-GP DIS C1081 DIS SC1U6D3V2KX-GP PCIE DIS SCD1U16V2KX-3GP MEM I/O DIS C246 2 5 OF 8 AVGA1E 1D5V_M92 1 DIS C245 2 D 1 4 2 5 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A2 Date: 5 4 3 2 Madison POWER Document Number Rev -1 JV71-TR Wednesday, November 11, 2009 1 Sheet 57 of 63 5 4 3 2 1 6 OF 8 AVGA1F Madison-Park DPC_VDD18 DPC_VDD18 DPA_VDD18 DPA_VDD18 DPC_VDD10 DPC_VDD10 DPA_VDD10 DPA_VDD10 DPC_VSSR DPC_VSSR DPC_VSSR DPC_VSSR DPC_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DPD_VDD18 DPD_VDD18 DPB_VDD18 DPB_VDD18 DPD_VDD10 DPD_VDD10 DPB_VDD10 DPB_VDD10 2 AN24 AP24 1 2 1 DPC_VDD18 AP20 AP21 2 0R2J-2-GP Madison-Park 68.00084.F81 2ND = 68.00217.701 1D1V_M92 DPD_VDD18 AP22 AP23 2 0R2J-2-GP Madison-Park 1 400mA DPE_VDD10 AL33 AM33 1 2 1 20mA DP PLL POWER DP E/F POWER AH34 AJ34 DPE_VDD18 DPE_VDD18 DPA_PVDD DPA_PVSS DPE_VDD10 DPE_VDD10 DPB_PVDD DPB_PVSS DPE_VSSR DPE_VSSR DPE_VSSR DPE_VSSR DPC_PVDD DPC_PVSS AU28 AV27 DPA_PVDD AV29 AR28 DPB_PVDD AU18 AV17 DPC_PVDD 20mA C132 1 C136 1D8V_M92 L9 DIS 2 150R2F-1-GP DPE_VDD18 DIS 1 2 BLM15BD121SS1D-GP C127 2 AW28 DIS 1 DPAB_CALR 150R2F-1-GP DIS 68.00084.F81 2ND = 68.00217.701 1D8V_M92 1 R51 2 0R0603-PAD 1D8V_M92 2 DPE_PVDD DPF_VDD18 DPF_VDD18 DPF_VDD10 DPF_VDD10 B AL38 AM35 DPF_PVDD DPF_PVSS DPF_PVDD DPF_PVSS DPF_VSSR DPF_VSSR DPF_VSSR DPF_VSSR DPF_VSSR R1240 DIS Madison-Park DIS R68 150R2F-1-GP MADISON-PRO-GP DIS 71.MDSON.M01 C714 C715 1D8V_M92 1 2 BLM15BD121SS1D-GP C713 SC10U6D3V3MX-GP DPEF_CALR L42 DIS SC1U6D3V2KX-GP AM39 Madison-Park 2 DPEF_CALR R1270 0R2J-2-GP SCD1U16V2KX-3GP 1 1D8V_M92 1 R350 2 0R0603-PAD 0R2J-2-GP 2 DIS 2 DPD_PVDD DPE_PVDD 1 AF39 AH39 AK39 AL34 AM34 20mA 1 AK33 AK34 2 DPE_VDD10 AM37 AN38 1 DPE_PVDD DPE_PVSS 1 400mA 20mA AV19 AR18 2 AF34 AG34 1 R351 2 0R0603-PAD DPD_PVDD DPD_PVDD DPD_PVSS DPE_VDD18 20mA 1 AN34 AP39 AR39 AU37 2 1 2 DPCD_CALR 1 R358 2 1 2 1 2 1 1 DIS C140 SCD1U16V2KX-3GP 2 DIS C141 SC1U6D3V2KX-GP 68.00214.091 2ND = 68.00206.341 C135 SC10U6D3V3MX-GP DIS AW18 DIS DPAB_CALR SC10U6D3V3MX-GP DIS 1 2 HCB1608KF-1-GP 2 DIS C155 1DPCD_CALR F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 U13 V13 AN29 AP29 AP30 AW30 AW32 SC1U6D3V2KX-GP L13 SC1U6D3V2KX-GP R359 DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR 1 1 R65 2 0R0603-PAD SCD1U16V2KX-3GP 1D1V_M92 C708 SCD1U16V2KX-3GP C709 SC10U6D3V3MX-GP DIS 68.00084.F81 2ND = 68.00217.701 2 1 2 BLM15BD121SS1D-GP DIS DPD_VSSR DPD_VSSR DPD_VSSR DPD_VSSR DPD_VSSR DPB_VDD10 AN33 AP33 1D8V_M92 R1239 2 0R2J-2-GP 1 C DIS 68.00214.091 2ND = 68.00206.341 PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS PCIE_VSS Madison-Park 2 AN19 AP18 AP19 AW20 AW22 DIS DIS 1D1V_M92 DPD_VDD10 AP14 AP15 1 R348 2 0R0603-PAD L41 C124 DPB_VDD18 AP25 AP26 1D1V_M92 1D8V_M92 2 1 R1237 1 C128 1 2 HCB1608KF-1-GP SC10U6D3V3MX-GP C131 1D1V_M92 L8 DIS SC1U6D3V2KX-GP 1D8V_M92 AN27 AP27 AP28 AW24 AW26 DIS SCD1U16V2KX-3GP AN17 AP16 AP17 AW14 AW16 DIS DPA_VDD10 AP31 AP32 2 DPC_VDD10 AP13 AT13 1 R349 2 0R0603-PAD 1D8V_M92 L61 1 2 BLM15BD121SS1D-GP C990 SC10U6D3V3MX-GP 1 DP A/B POWER C989 SC1U6D3V2KX-GP DP C/D POWER R1238 C988 SCD1U16V2KX-3GP 8 OF 8 AVGA1H 1D8V_M92 1 Madison-Park Madison-Park Madison-Park DPA_VDD18 2 D AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39 DIS 68.00084.F81 2ND = 68.00217.701 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND MADISON-PRO-GP GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND/PX_EN GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VSS_MECH VSS_MECH VSS_MECH A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13 A39 AW1 AW39 D C B VSS_MECH1 VSS_MECH2 VSS_MECH3 TP240 TP241 TP242 1 1 1 2009/05/16 SB Add DIS 71.MDSON.M01 A A DIS / UMA Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A2 Date: 5 4 3 2 DP POWER_GND Document Number Rev -1 JV71-TR Monday, October 05, 2009 Sheet 1 58 of 63 DIS 1 2 2 1 2 CKEB0 CKEB1 MVREFDB MVREFSB 1 1 TESTEN MAB0_8 MAB1_8 CLKTESTA CLKTESTB DRAM_RST# T10 Y10 RASB0# RASB1# W10 AA10 CASB0# CASB1# P10 L10 CSB0#_0 AD10 AC10 CSB1#_0 R377 1 R378 1 R60 1 R59 1 DY 2 10KR2J-3-GP DIS 2 10KR2J-3-GP 2 10KR2J-3-GP 56 GPIO_VGA_12 2 10KR2J-3-GP DY 2 10KR2J-3-GP DY 1D5V_M92 60,61 60 61 CLKB0 CLKB0# 60 60 CLKB1 CLKB1# 61 61 RASB0# RASB1# 60 61 CASB0# CASB1# 60 61 CSB0#_0 60 CSB1#_0 61 R1241 40D2R2F-GP DIS 1D5V_M92 R1242 100R2F-L1-GP-U DIS For M92-XT R1241, R1243 R435, R436 change to 100R R1243 40D2R2F-GP DIS U10 AA11 CKEB0 CKEB1 N10 AB11 WEB0# WEB1# CKEB0 CKEB1 60 61 WEB0# WEB1# 60 61 DIS DIS DIS 2 MAB13 60,61 0R2J-2-GP AH11 C993 DIS MAB13_R 1 R1248 T8 W8 R1246 100R2F-L1-GP-U Madison M9X C994 C991 DIS C992 MVREFDA MVREFSA 1D5V_M92 1Madison 2 R1244 243R2F-2-GP 1 Park 2 R1245 243R2F-2-GP 1Madison 2 R1247 243R2F-2-GP 1 Park-M9X 2 R1249 243R2F-2-GP 1Madison 2 R1250 243R2F-2-GP 1Madison 2 R1252 243R2F-2-GP DQA0_0/DQA_0 DQA0_1/DQA_1 DQA0_2/DQA_2 DQA0_3/DQA_3 DQA0_4/DQA_4 DQA0_5/DQA_5 DQA0_6/DQA_6 DQA0_7/DQA_7 DQA0_8/DQA_8 DQA0_9/DQA_9 DQA0_10/DQA_10 DQA0_11/DQA_11 DQA0_12/DQA_12 DQA0_13/DQA_13 DQA0_14/DQA_14 DQA0_15/DQA_15 DQA0_16/DQA_16 DQA0_17/DQA_17 DQA0_18/DQA_18 DQA0_19/DQA_19 DQA0_20/DQA_20 DQA0_21/DQA_21 DQA0_22/DQA_22 DQA0_23/DQA_23 DQA0_24/DQA_24 DQA0_25/DQA_25 DQA0_26/DQA_26 DQA0_27/DQA_27 DQA0_28/DQA_28 DQA0_29/DQA_29 DQA0_30/DQA_30 DQA0_31/DQA_31 DQA1_0/DQA_32 DQA1_1/DQA_33 DQA1_2/DQA_34 DQA1_3/DQA_35 DQA1_4/DQA_36 DQA1_5/DQA_37 DQA1_6/DQA_38 DQA1_7/DQA_39 DQA1_8/DQA_40 DQA1_9/DQA_41 DQA1_10/DQA_42 DQA1_11/DQA_43 DQA1_12/DQA_44 DQA1_13/DQA_45 DQA1_14/DQA_46 DQA1_15/DQA_47 DQA1_16/DQA_48 DQA1_17/DQA_49 DQA1_18/DQA_50 DQA1_19/DQA_51 DQA1_20/DQA_52 DQA1_21/DQA_53 DQA1_22/DQA_54 DQA1_23/DQA_55 DQA1_24/DQA_56 DQA1_25/DQA_57 DQA1_26/DQA_58 DQA1_27/DQA_59 DQA1_28/DQA_60 DQA1_29/DQA_61 DQA1_30/DQA_62 DQA1_31/DQA_63 L18 L20 MBM_CALRN0 L27 MBM_CALRN1 N12 MBM_CALRN2AG12 MBM_CALRP1 M12 MBM_CALRP0 M27 MBM_CALRP2AH12 MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0 MAA1_7/MAA_A15_BA1 WCKA0_0/DQMA_0 WCKA0#_0/DQMA_1 WCKA0_1/DQMA_2 WCKA0#_1/DQMA_3 WCKA1_0/DQMA_4 WCKA1#_0/DQMA_5 WCKA1_1/DQMA_6 WCKA1#_1/DQMA_7 GDDR5/DDR2/GDDR3 EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7 DDBIA0_0/QSA_0#/WDQSA_0 DDBIA0_1/QSA_1#/WDQSA_1 DDBIA0_2/QSA_2#/WDQSA_2 DDBIA0_3/QSA_3#/WDQSA_3 DDBIA1_0/QSA_4#/WDQSA_4 DDBIA1_1/QSA_5#/WDQSA_5 DDBIA1_2/QSA_6#/WDQSA_6 DDBIA1_3/QSA_7#/WDQSA_7 ADBIA0/ODTA0 ADBIA1/ODTA1 CLKA0 CLKA0# CLKA1 CLKA1# RASA0# RASA1# CASA0# CASA1# CSA0#_0 CSA0#_1 CSA1#_0 CSA1#_1 MVREFDA MVREFSA CKEA0 CKEA1 MEM_CALRN0 MEM_CALRN1 MEM_CALRN2 WEA0# WEA1# MEM_CALRP1 MEM_CALRP0 MEM_CALRP2 MAA0_8 MAA1_8 MAA[0..12] 62,63 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17 BA2 BA0 BA1 BA2 BA0 BA1 A32 C32 D23 E22 C14 A14 E10 D9 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 C34 D29 D25 E20 E16 E12 J10 D7 RDQSA0 RDQSA1 RDQSA2 RDQSA3 RDQSA4 RDQSA5 RDQSA6 RDQSA7 A34 E30 E26 C20 C16 C12 J11 F8 WDQSA0 WDQSA1 WDQSA2 WDQSA3 WDQSA4 WDQSA5 WDQSA6 WDQSA7 J21 G19 ODTA0 ODTA1 H27 G27 CLKA0 CLKA0# J14 H14 CLKA1 CLKA1# K23 K19 RASA0# RASA1# K20 K17 CASA0# CASA1# K24 K27 CSA0#_0 M13 K16 CSA1#_0 K21 J20 CKEA0 CKEA1 K26 L15 WEA0# WEA1# H23 J19 MAA13_R 1 R1251 62,63 62,63 62,63 ODTA0 ODTA1 62 63 CLKA0 CLKA0# 62 62 CLKA1 CLKA1# 63 63 RASA0# RASA1# 62 63 CASA0# CASA1# 62 63 CSA0#_0 62 CSA1#_0 63 CKEA0 CKEA1 62 63 WEA0# WEA1# D DQMA#[0..7] 62,63 RDQSA[0..7] 62,63 WDQSA[0..7] 62,63 C 62 63 2 MAA13 62,63 0R2J-2-GP Madison CO-LAYOUT 2 R356 2 1 R417 1KR2F-3-GP AD28 CLKTESTA AK10 CLKTESTB AL10 M9X R357 2 1 2 100R2F-L1-GP-U 1 1 2 2 1 1 2 TESTEN DIS CSB1#_0 CSB1#_1 CLKB1 CLKB1# 1 SCD1U16V2KX-3GP DIS Y12 AA12 CSB0#_0 CSB0#_1 WEB0# WEB1# 4K7R2F-GP 100R2F-L1-GP-U MVREFDB MVREFSB 4K7R2F-GP DIS DIS C793 SCD1U16V2KX-3GP C790 SCD01U50V2KX-1GP DIS R433 DIS C792 CASB0# CASB1# CLKB0 CLKB0# R55 2 10KR2J-3-GP SCD01U16V2KX-3GP 2 DIS C789 SCD1U16V2KX-3GP R436 40D2R2F-GP R432 SCD01U50V2KX-1GP DIS RASB0# RASB1# 60,61 WDQSB[0..7] ODTB0 ODTB1 AD8 AD7 1 DIS 56 GPIO_VGA_13 ODTB0 ODTB1 L9 L8 DIS R57 SCD1U16V2KX-3GP 1D5V_M92 CLKB1 CLKB1# RDQSB[0..7] 2 10KR2J-3-GP SCD01U16V2KX-3GP C CLKB0 CLKB0# 20,56 CRT_VSYNC 2 10KR2J-3-GP DY 60,61 20,56 CRT_HSYNC WDQSB0 WDQSB1 WDQSB2 WDQSB3 WDQSB4 WDQSB5 WDQSB6 WDQSB7 G7 K1 P1 W4 AC4 AH3 AJ8 AM3 T7 W7 DQMB#[0..7] 1 C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5 GDDR5 R435 40D2R2F-GP ADBIB0/ODTB0 ADBIB1/ODTB1 RDQSB0 RDQSB1 RDQSB2 RDQSB3 RDQSB4 RDQSB5 RDQSB6 RDQSB7 R56 1 1 1D5V_M92 DDBIB0_0/QSB_0#/WDQSB_0 DDBIB0_1/QSB_1#/WDQSB_1 DDBIB0_2/QSB_2#/WDQSB_2 DDBIB0_3/QSB_3#/WDQSB_3 DDBIB1_0/QSB_4#/WDQSB_4 DDBIB1_1/QSB_5#/WDQSB_5 DDBIB1_2/QSB_6#/WDQSB_6 DDBIB1_3/QSB_7#/WDQSB_7 F6 K3 P3 V5 AB5 AH1 AJ9 AM5 1 2 100R 56 GPIO_VGA_22 2 10KR2J-3-GP DY R54 1 100R 56 GPIO_VGA_11 2 10KR2J-3-GP DIS 2 100R DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 56 GPIO_VGA_09 1 1 MVREF TO GND H3 H1 T3 T5 AE4 AF5 AK6 AK5 60,61 60,61 60,61 R61 2 10KR2J-3-GP DIS 2 40.2R BB2 BB0 BB1 1 1 40.2R 56 GPIO_VGA_08 BB2 BB0 BB1 1 R58 2 1.8/1.5V 1.5V 40.2R 56 GPIO_VGA_05 R62 MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 2 10KR2J-3-GP DIS 1 1.5V MVREF TO PWR 56 GPIO_VGA_01 56 GPIO_VGA_02 DIS 1 2 MVREF WCKB0_0/DQMB_0 WCKB0#_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0#_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1#_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1#_1/DQMB_7 GDDR5/DDR2/GDDR3 EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7 R63 56 GPIO_VGA_00 1 DDR3 60,61 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 2 GDDR3 MAB[0..12] P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9 1 GDDR5 MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8 MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12 MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1 1 3 OF 8 DDR2 GDDR5/GDDR3 DDR3 AVGA1C DDR2 GDDR3/GDDR5 DDR3 62,63 MDA[63..0] 2 DIVIDER RESISTORS DQB0_0/DQB_0 DQB0_1/DQB_1 DQB0_2/DQB_2 DQB0_3/DQB_3 DQB0_4/DQB_4 DQB0_5/DQB_5 DQB0_6/DQB_6 DQB0_7/DQB_7 DQB0_8/DQB_8 DQB0_9/DQB_9 DQB0_10/DQB_10 DQB0_11/DQB_11 DQB0_12/DQB_12 DQB0_13/DQB_13 DQB0_14/DQB_14 DQB0_15/DQB_15 DQB0_16/DQB_16 DQB0_17/DQB_17 DQB0_18/DQB_18 DQB0_19/DQB_19 DQB0_20/DQB_20 DQB0_21/DQB_21 DQB0_22/DQB_22 DQB0_23/DQB_23 DQB0_24/DQB_24 DQB0_25/DQB_25 DQB0_26/DQB_26 DQB0_27/DQB_27 DQB0_28/DQB_28 DQB0_29/DQB_29 DQB0_30/DQB_30 DQB0_31/DQB_31 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_42 DQB1_11/DQB_43 DQB1_12/DQB_44 DQB1_13/DQB_45 DQB1_14/DQB_46 DQB1_15/DQB_47 DQB1_16/DQB_48 DQB1_17/DQB_49 DQB1_18/DQB_50 DQB1_19/DQB_51 DQB1_20/DQB_52 DQB1_21/DQB_53 DQB1_22/DQB_54 DQB1_23/DQB_55 DQB1_24/DQB_56 DQB1_25/DQB_57 DQB1_26/DQB_58 DQB1_27/DQB_59 DQB1_28/DQB_60 DQB1_29/DQB_61 DQB1_30/DQB_62 DQB1_31/DQB_63 2 3D3V_M92 1 For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1. For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1. C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5 GDDR5 D MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 MEMORY INTERFACE B 60,61 MDB[63..0] 3 MEMORY INTERFACE A 4 4 OF 8 DDR2 GDDR5/GDDR3 DDR3 AVGA1D DDR2 GDDR3/GDDR5 DDR3 2 5 MADISON-PRO-GP DIS MADISON-PRO-GP 1D5V_M92 DIS VGA_DRAM_RST# Designator 1 71.MDSON.M01 For M96-M2 For Mannhatton M92-XT 4.7K 71.MDSON.M01 M9X R628 4K7R2F-GP 2 R1230 1 1 10KR2F-2-GP DY 2 VRAM_RST 680R2F-GP R1269 10KR2F-2-GP 2 DIS DIS C961 SC68P50V2JN-1GP 2 B STRAPS PIN DESCRIPTION PCIE FULL TX OUTPUT SWING TX_PWRS_ENB Tansmitter Power Savings Enable 0= 50% Tx output swing 1= Full Tx output swing GPIO0 (Internal PD) TX_DEEMPH_EN Transmitter De-emphasis Enable 0= Tx de-emphasis disabled 1= Tx de-emphasis enabled GPIO1 (Internal PD) RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE R_MEM_1 R628 4.7K DY R_MEM_2 R1230 0R 680R R_MEM_3 R1269 4.7K C_MEM C961 1nF DIS 2 1 1 R1283 3D3V_M92 STRAPS PIN PWRCNTL_[1,0] DESCRIPTION GPIO[15,20] 1 BB_EN 60,61,62,63 GPIO21 1 10K 68pF DY B 2200pF RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE AMD RESERVED CONFIGURATION STRAPS ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET H2SYNC, Power control signals to control the core voltage regulator Back Bias (body bias) which minimizes power consumption in battery modes. 0V = Disable 3D3V = Enable 0R GENERICC PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET GPIO_28_TDO , GPIO21_BB_EN 0 PCIE GNE2 ENABLED BIF_GEN2_EN_A 0 = Advertises the PCI-E device as 2.5GT/s 1 = Advertises the PCI-E device as 5GT/s GPIO2 AUD[1] AUD[0] 1 VGA_HSYNC VGA_VSYNC (Internal PD) AC_BATT GPIO5 AC (Performance mode) = 3.3 V Battery saving mode = 0.0 V AUD[1:0] 00:No audio function 01:Audio for DisplayPort and HDMI ( if adapter is detected) 10:Audio for DisplayPort only 11:Audio for both DisplayPort and HDMI If BIOS_ROM_EN (GPIO22) = 0 1 128MB 256MB 64MB 32MB 512MB 1GB 2GB 4GB V CCBYPASS 0 GENERICC BIF_CLK_PM_EN ROMSO GPIO8 Serial ROM Output from ROM ROMSI GPIO9 Serial ROM Input to ROM A 0 HDMI must only be enabled on systems that are legally entitled. It is the responsibility of the system designer to ensure that the system is entitled to support this feature. VGA ENABLED 0 SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT ROMIDCFG[3:0] GPIO[13,12,11] (Internal PD) if BIOS_ROM_EN=1,then Config[3:0] defines the ROM type if BIOS_ROM_EN=0,then Config[3:0] defines the primary memory apeture size If BIOS_ROM_EN (GPIO22) = 1 Size of the primary GPIO[13,12,11] Manufacturer memory apertures x000 x001 x010 x x x x x ST Microelectronics Chingis (formerly PMC) Part Number GPIO[13,12,11] M25P05A M25P10A M25P20 M25P40 M25P80 0100 0101 0101 0101 0101 Pm25LV512A Pm25LV010A 0100 0101 DIS / UMA X X X STRAPS GPIO PIN DVPDATA(23:20) (Internal PD) DESCRIPTION Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Initialization Behavior: This signal is input during reset (no reference clock is required). After reset, the default state is output low (0 V). The signals above can be left unconnected if not used. Title Size A2 Date: 5 4 A 3 2 Madison Memory / Straps Document Number Rev -1 JV71-TR Wednesday, November 11, 2009 1 Sheet 59 of 63 5 4 3 2 1 GDDR3 BA0 BA1 BA2 CLKB0 CLKB0# J7 K7 CK CK# CKEB0 K9 CKE ODTB0 C 59,61 MAB13 59,61 59,61 59,61 BB0 BB1 BB2 59 59 CLKB0 CLKB0# 59 CKEB0 59 59 DQMB#3 DQMB#2 59 59 59 W EB0# CASB0# RASB0# DQMB#3 DQMB#2 D3 E7 DMU DML W EB0# CASB0# RASB0# L3 K3 J3 WE# CAS# RAS# CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ 59 59 ODTB0 CSB0#_0 1 VREFDQ VREFCA ZQ MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BB0 BB1 BB2 M2 N8 M3 BA0 BA1 BA2 CLKB0 CLKB0# J7 K7 CK CK# CKEB0 K9 CKE 59 VRAM_RST DQSU DQSU# C7 B7 RDQSB0 W DQSB0 DQSL DQSL# F3 G3 RDQSB1 W DQSB1 ODT K1 ODTB0 243R2F-2-GP 59 CSB0#_0 2 H1 M8 L8 59,61,62,63 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9 59,61 MAB13 59,61 59,61 59,61 BB0 BB1 BB2 59 59 CLKB0 CLKB0# 59 CKEB0 59 59 DQMB#0 DQMB#1 59 59 59 W EB0# CASB0# RASB0# DQMB#0 DQMB#1 D3 E7 DMU DML W EB0# CASB0# RASB0# L3 K3 J3 WE# CAS# RAS# CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 RDQSB0 W DQSB0 59 59 RDQSB1 W DQSB1 59 59 ODTB0 CSB0#_0 CLKB0# CLKB0 R409 59 CSB0#_0 DIS 59 VRAM_RST 1 M2 N8 M3 K1 RDQSB2 W DQSB2 VREFD_U0 VREFC_U0 ZQ3 R408 DIS 2 BB0 BB1 BB2 ODT R1200 59,61,62,63 C 1 1D5V_M92 1D5V_M92 R405 4K99R2F-L-GP DIS R404 4K99R2F-L-GP DIS C763 SCD47U6D3V2KX-GP 2 DIS R425 4K99R2F-L-GP DIS VREFC_U0 C762 SCD1U16V2ZY-2GP DIS R424 4K99R2F-L-GP VREFD_U0 1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 243R2F-2-GP DIS 2 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 RDQSB2 W DQSB2 59 59 1 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 DQSL DQSL# F3 G3 RDQSB3 W DQSB3 59,61 RDQSB[0..7] 59,61 W DQSB[0..7] 2 VREFDQ VREFCA ZQ RDQSB3 W DQSB3 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 59,61 DQMB#[0..7] 1 C7 B7 A8 A1 C1 C9 D2 E9 F1 H9 H2 D 2 DQSU DQSU# MDB4 MDB3 MDB7 MDB0 MDB5 MDB1 MDB6 MDB2 MDB[63..0] 59,61 MDB[63..0] 56R2F-1-GP H1 M8 L8 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MAB[0..12] MAB[0..12] 56R2F-1-GP VREFD_U0 VREFC_U0 ZQ1 MDB11 MDB14 MDB8 MDB10 MDB15 MDB13 MDB9 MDB12 1 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ E3 F7 F2 F8 H3 H8 G2 H7 DIS C788 SCD1U16V2ZY-2GP DIS 2 MDB27 MDB28 MDB30 MDB24 MDB25 MDB31 MDB26 MDB29 59,61 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VDD VDD VDD VDD VDD VDD VDD VDD VDD 1 2 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 AFBRAM4 K8 K2 N1 R9 B2 D9 G7 R1 N9 2 1 MDB21 MDB20 MDB22 MDB16 MDB19 MDB17 MDB23 MDB18 1 A8 A1 C1 C9 D2 E9 F1 H9 H2 R1199 E3 F7 F2 F8 H3 H8 G2 H7 2 D DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VDD VDD VDD VDD VDD VDD VDD VDD VDD 1 K8 K2 N1 R9 B2 D9 G7 R1 N9 DIS 1D5V_M92 AFBRAM3 2 1D5V_M92 B B K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP DIS DIS SAMSUNG 1ST=72.41164.H0U HYUNIX 2ND=72.51G63.C0U 72.41164.H0U 2ND = 72.51G63.C0U 72.41164.H0U 2ND = 72.51G63.C0U 1D5V_M92 1 2 1 DIS C710 C728 SC10U6D3V3MX-GP 2 1 DIS C662 SC10U6D3V3MX-GP 2 1 DIS C698 SC10U6D3V3MX-GP 2 1 DIS SC10U6D3V3MX-GP 2 1 C688 SC1U6D3V2KX-GP 2 1 DIS C683 SC1U6D3V2KX-GP 2 1 DIS C676 SC1U6D3V2KX-GP 2 1 DIS C672 SC1U6D3V2KX-GP 2 1 DIS C671 SC1U6D3V2KX-GP 2 1 DIS C724 SC1U6D3V2KX-GP 2 1 DIS C214 SC1U6D3V2KX-GP 2 1 DIS C163 SC1U6D3V2KX-GP 2 1 DIS C212 SC1U6D3V2KX-GP 2 1 DIS C144 SC1U6D3V2KX-GP 2 DIS C660 SCD1U16V2KX-3GP 2 1 DIS C663 SCD1U16V2KX-3GP 2 1 DIS C170 SCD1U16V2KX-3GP DIS SCD1U16V2KX-3GP A 2 1 DIS C192 JV50-TR8 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 A M92 DDR3 B0 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 60 of 63 5 4 3 2 1 GDDR3 ODTB1 C 59,60 MAB13 59,60 59,60 59,60 59 59 BB0 BB1 BB2 CLKB1 CLKB1# 59 CKEB1 59 59 DQMB#4 DQMB#5 59 59 59 W EB1# CASB1# RASB1# N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 BB0 BB1 BB2 M2 N8 M3 BA0 BA1 BA2 CLKB1 CLKB1# J7 K7 CK CK# CKEB1 K9 DQMB#4 DQMB#5 D3 E7 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 DMU DML W EB1# CASB1# RASB1# L3 K3 J3 WE# CAS# RAS# CKE CSB1#_0 RDQSB5 W DQSB5 59 59 ODTB1 59 CSB1#_0 59 VRAM_RST 59,60,62,63 1 2 H1 M8 L8 VREFDQ VREFCA ZQ DQSU DQSU# C7 B7 RDQSB7 W DQSB7 DQSL DQSL# F3 G3 RDQSB6 W DQSB6 ODT K1 ODTB1 CS# RESET# L2 T2 CSB1#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 243R2F-2-GP 59,60 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 MAB13 59,60 59,60 59,60 BB0 BB1 BB2 59 59 DQMB#7 DQMB#6 59 59 59 W EB1# CASB1# RASB1# BB0 BB1 BB2 M2 N8 M3 BA0 BA1 BA2 CLKB1 CLKB1# J7 K7 CK CK# K9 CKE DQMB#7 DQMB#6 D3 E7 DMU DML W EB1# CASB1# RASB1# L3 K3 J3 WE# CAS# RAS# CKEB1 59 59 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 CKEB1 CLKB1 CLKB1# 59 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP DIS DIS 59,60 W DQSB[0..7] RDQSB7 W DQSB7 59 59 RDQSB6 W DQSB6 59 59 CLKB1# ODTB1 59 CLKB1 CSB1#_0 59 VRAM_RST 59,60,62,63 DIS 1D5V_M92 R373 4K99R2F-L-GP DIS DIS C DIS C699 SCD47U6D3V2KX-GP 2 R346 4K99R2F-L-GP DIS VREFC_U2 2 R372 4K99R2F-L-GP 72.41164.H0U 2ND = 72.51G63.C0U SAMSUNG 1ST=72.41164.H0U HYUNIX 2ND=72.51G63.C0U R361 1D5V_M92 C716 SCD1U16V2ZY-2GP R345 4K99R2F-L-GP DIS B VREFD_U2 DIS 2 72.41164.H0U 2ND = 72.51G63.C0U R362 1 DIS 1 B VREFD_U2 VREFC_U2 ZQ4 R1202 59,60 RDQSB[0..7] 1 K1 DIS D 59,60 DQMB#[0..7] 2 ODT 59 59 MDB61 MDB59 MDB63 MDB56 MDB60 MDB58 MDB62 MDB57 MDB[63..0] 59,60 MDB[63..0] 56R2F-1-GP RDQSB5 W DQSB5 RDQSB4 W DQSB4 D7 C3 C8 C2 A7 A2 B8 A3 MAB[0..12] MAB[0..12] 56R2F-1-GP DQSL DQSL# F3 G3 243R2F-2-GP MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13 RDQSB4 W DQSB4 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 59,60 1 C7 B7 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ MDB52 MDB50 MDB48 MDB49 MDB53 MDB54 MDB51 MDB55 2 DQSU DQSU# A8 A1 C1 C9 D2 E9 F1 H9 H2 E3 F7 F2 F8 H3 H8 G2 H7 1 MDB37 MDB35 MDB38 MDB39 MDB34 MDB32 MDB36 MDB33 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 2 D7 C3 C8 C2 A7 A2 B8 A3 VDD VDD VDD VDD VDD VDD VDD VDD VDD 1 VREFDQ VREFCA ZQ DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 AFBRAM1 K8 K2 N1 R9 B2 D9 G7 R1 N9 2 H1 M8 L8 MDB42 MDB41 MDB46 MDB43 MDB44 MDB40 MDB47 MDB45 1 2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ E3 F7 F2 F8 H3 H8 G2 H7 C684 SCD1U16V2ZY-2GP DIS 2 1 VREFD_U2 VREFC_U2 ZQ2 A8 A1 C1 C9 D2 E9 F1 H9 H2 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 1 R1201 VDD VDD VDD VDD VDD VDD VDD VDD VDD 1 D DIS 1D5V_M92 AFBRAM2 K8 K2 N1 R9 B2 D9 G7 R1 N9 2 1D5V_M92 1D5V_M92 1 2 1 2 1 DIS C821 C818 SC10U6D3V3MX-GP 2 1 DIS C743 SC10U6D3V3MX-GP 2 1 DIS C765 SC10U6D3V3MX-GP 2 1 DIS SC10U6D3V3MX-GP 2 1 C764 SC1U6D3V2KX-GP 2 1 DIS C757 SC1U6D3V2KX-GP 2 1 DIS C747 SC1U6D3V2KX-GP 2 1 DIS C755 SC1U6D3V2KX-GP 2 1 DIS C756 SC1U6D3V2KX-GP 2 1 DIS C758 SC1U6D3V2KX-GP 2 1 DIS C748 SC1U6D3V2KX-GP 2 1 DIS C804 SC1U6D3V2KX-GP 2 1 DIS C813 SC1U6D3V2KX-GP 2 1 DIS C399 SC1U6D3V2KX-GP 2 1 DIS C390 SCD1U16V2KX-3GP 2 DIS C783 SCD1U16V2KX-3GP DIS DIS C796 SCD1U16V2KX-3GP A SCD1U16V2KX-3GP 2 1 DIS C812 JV50-TR8 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 A M92 DDR3 B1 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 61 of 63 5 4 1D5V_M96 D A8 A1 C1 C9 D2 E9 F1 H9 H2 VREFD_U3 VREFC_U3 MAA_ZQ0 R1253 2 1 243R2F-2-GP Madison-M96 C 59,63 MAA13 59,63 59,63 59,63 BA0 BA1 BA2 59 59 CLKA0 CLKA0# 59 CKEA0 59 59 DQMA#3 DQMA#2 59 59 59 W EA0# CASA0# RASA0# H1 M8 L8 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 MDA21 MDA20 MDA22 MDA16 MDA19 MDA17 MDA23 MDA18 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA27 MDA28 MDA30 MDA24 MDA25 MDA31 MDA26 MDA29 DQSU DQSU# C7 B7 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BA0 BA1 BA2 M2 N8 M3 BA0 BA1 BA2 CLKA0 CLKA0# J7 K7 CK CK# CKEA0 K9 CKE DQMA#3 DQMA#2 D3 E7 DMU DML W EA0# CASA0# RASA0# L3 K3 J3 WE# CAS# RAS# DQSL DQSL# RDQSA2 W DQSA2 ODT K1 ODTA0 CS# RESET# L2 T2 CSA0#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ RDQSA3 W DQSA3 59 59 RDQSA2 W DQSA2 59 59 ODTA0 59 CSA0#_0 59 VRAM_RST 2 1 243R2F-2-GP Madison-M96 G1 F9 E8 E2 D8 D1 B9 B1 G9 59,63 MAA13 59,63 59,63 59,63 BA0 BA1 BA2 59 59 CLKA0 CLKA0# 59 CKEA0 59 59 DQMA#0 DQMA#1 59 59 59 W EA0# CASA0# RASA0# A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BA0 BA1 BA2 M2 N8 M3 BA0 BA1 BA2 CLKA0 CLKA0# J7 K7 CK CK# CKEA0 K9 CKE DQMA#0 DQMA#1 D3 E7 DMU DML W EA0# CASA0# RASA0# L3 K3 J3 WE# CAS# RAS# C7 B7 RDQSA0 W DQSA0 DQSL DQSL# F3 G3 RDQSA1 W DQSA1 ODT K1 ODTA0 CS# RESET# L2 T2 CSA0#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 RDQSA0 W DQSA0 59 59 RDQSA1 W DQSA1 59 59 ODTA0 59 CSA0#_0 59 VRAM_RST C B 1 1 1 2 2 1 2 C1014 Madison-M96 1 2 2 2 Madison-M96 Madison-M96 1 2 Madison-M96 1 2 Madison-M96 1 2 1 1 2 Madison-M96 1 2 Madison-M96 1 2 Madison-M96 Madison-M96 2 2 1 2 1 2 Madison-M96 1 2 1 2 Madison-M96 1 2 Madison-M96 1 C1013 C997 SCD47U6D3V2KX-GP C1015 JV50-TR8 SC10U6D3V3MX-GP 2 C1012 1 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Date: 4 3 A Wistron Corporation Size A3 5 59,60,61,63 R1258 SC10U6D3V3MX-GP Madison-M96 1 C1011 SC10U6D3V3MX-GP 2 C1010 Madison-M96 SC10U6D3V3MX-GP Madison-M96 1 DQSU DQSU# D R1260 SC1U6D3V2KX-GP 2 C1009 SC1U6D3V2KX-GP Madison-M96 1 C1008 SC1U6D3V2KX-GP 2 Madison-M96 Madison-M96 SC1U6D3V2KX-GP Madison-M96 1 C1007 SC1U6D3V2KX-GP 2 C1006 SC1U6D3V2KX-GP Madison-M96 1 C1005 SC1U6D3V2KX-GP 2 C1004 SC1U6D3V2KX-GP Madison-M96 1 C1003 SC1U6D3V2KX-GP 2 C1002 SC1U6D3V2KX-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP Madison-M96 C1001 MDA4 MDA0 MDA7 MDA3 MDA5 MDA1 MDA6 MDA2 56R2F-1-GP C1000 VREFD_U3 4K99R2F-L-GP C999 C996 R1259 SCD1U16V2KX-3GP 1D5V_M96 Madison-M96 R1257 4K99R2F-L-GP VREFC_U3 4K99R2F-L-GP C995 SCD1U16V2KX-3GP MDA[63..0] R1256 Madison-M96 1 1D5V_M96 Madison-M96 R1255 4K99R2F-L-GP MAA[0..12] Madison-M96 C998 D7 C3 C8 C2 A7 A2 B8 A3 Madison-M96 56R2F-1-GP 59,63 W DQSA[0..7] 59,63 MDA[63..0] DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 CLKA0 1 1D5V_M96 Madison-M96 72.41164.H0U 2ND = 72.51G63.C0U MAA[0..12] MDA11 MDA14 MDA8 MDA12 MDA9 MDA13 MDA10 MDA15 CLKA0# 59,63 RDQSA[0..7] 59,63 E3 F7 F2 F8 H3 H8 G2 H7 K4W 1G1646E-HC12-GP 72.41164.H0U 2ND = 72.51G63.C0U Madison-M96 59,63 DQMA#[0..7] DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VDD VDD VDD VDD VDD VDD VDD VDD VDD MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 59,60,61,63 K4W 1G1646E-HC12-GP B A K8 K2 N1 R9 B2 D9 G7 R1 N9 VREFD_U3 VREFC_U3 MAA_ZQ1 R1254 1 AFBRAM6 1D5V_M96 1D5V_M96 RDQSA3 W DQSA3 F3 G3 2 GDDR3 AFBRAM5 K8 K2 N1 R9 B2 D9 G7 R1 N9 1D5V_M96 3 2 M92 DDR3 A0 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 62 of 63 5 4 K8 K2 N1 R9 B2 D9 G7 R1 N9 D A8 A1 C1 C9 D2 E9 F1 H9 H2 2 R1262 VREFD_U4 VREFC_U4 MAA_ZQ2 1 H1 M8 L8 Madison-M96 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 MDA42 MDA41 MDA46 MDA43 MDA44 MDA40 MDA47 MDA45 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA36 MDA35 MDA39 MDA33 MDA37 MDA32 MDA38 MDA34 DQSU DQSU# C7 B7 DQSL DQSL# F3 G3 ODT K1 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ 59,62 MAA13 59,62 59,62 59,62 BA0 BA1 BA2 59 59 CLKA1 CLKA1# 59 CKEA1 59 59 DQMA#4 DQMA#5 59 59 59 W EA1# CASA1# RASA1# MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BA0 BA1 BA2 M2 N8 M3 BA0 BA1 BA2 CLKA1 CLKA1# J7 K7 CK CK# CKEA1 K9 CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 CKE DQMA#4 DQMA#5 D3 E7 DMU DML W EA1# CASA1# RASA1# L3 K3 J3 WE# CAS# RAS# RDQSA4 W DQSA4 RDQSA5 W DQSA5 GDDR3 1D5V_M96 RDQSA4 W DQSA4 59 59 RDQSA5 W DQSA5 59 59 ODTA1 59 ODTA1 CSA1#_0 VREFD_U4 VREFC_U4 MAA_ZQ3 2 R1261 1 243R2F-2-GP Madison-M96 CSA1#_0 59 VRAM_RST 59,60,61,62 59,62 MAA13 59,62 59,62 59,62 BA0 BA1 BA2 59 59 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 59 CKEA1 59 59 DQMA#7 DQMA#6 59 59 59 W EA1# CASA1# RASA1# K8 K2 N1 R9 B2 D9 G7 R1 N9 VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7 BA0 BA1 BA2 M2 N8 M3 BA0 BA1 BA2 CLKA1 CLKA1# J7 K7 CK CK# CKEA1 K9 CKE DQMA#7 DQMA#6 D3 E7 DMU DML W EA1# CASA1# RASA1# L3 K3 J3 WE# CAS# RAS# CLKA1 CLKA1# 1 AFBRAM8 1D5V_M96 243R2F-2-GP C 2 AFBRAM7 1D5V_M96 1D5V_M96 3 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 MDA52 MDA50 MDA48 MDA49 MDA53 MDA54 MDA51 MDA55 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 MDA61 MDA62 MDA58 MDA56 MDA60 MDA59 MDA57 MDA63 DQSU DQSU# C7 B7 RDQSA7 W DQSA7 DQSL DQSL# F3 G3 RDQSA6 W DQSA6 ODT K1 ODTA1 CS# RESET# L2 T2 CSA1#_0 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 D RDQSA7 W DQSA7 59 59 RDQSA6 W DQSA6 59 59 ODTA1 59 CSA1#_0 59 VRAM_RST 59,60,61,62 C K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP 72.41164.H0U CLKA1# 1 1 1 1 C1036 2 Madison-M96 2 Madison-M96 1 C1035 2 Madison-M96 1 C1034 2 Madison-M96 1 2 Madison-M96 1 1 1 2 Madison-M96 2 Madison-M96 1 2 Madison-M96 1 2 Madison-M96 2 1 2 Madison-M96 Madison-M96 2 1 2 C1033 C1018 SCD47U6D3V2KX-GP SC10U6D3V3MX-GP Madison-M96 1 C1032 2 SC10U6D3V3MX-GP 2 1 SC10U6D3V3MX-GP Madison-M96 1 Madison-M96 SC10U6D3V3MX-GP 2 C1031 R1268 SC1U6D3V2KX-GP Madison-M96 1 C1030 SC1U6D3V2KX-GP 2 C1029 SC1U6D3V2KX-GP Madison-M96 1 Madison-M96 SC1U6D3V2KX-GP 2 C1028 SC1U6D3V2KX-GP Madison-M96 1 C1027 SC1U6D3V2KX-GP 2 C1026 SC1U6D3V2KX-GP Madison-M96 1 C1025 SC1U6D3V2KX-GP 2 C1024 SC1U6D3V2KX-GP Madison-M96 1 C1023 SC1U6D3V2KX-GP 2 C1022 SCD1U16V2KX-3GP Madison-M96 1 C1021 SCD1U16V2KX-3GP 2 C1020 SCD1U16V2KX-3GP SCD1U16V2KX-3GP Madison-M96 C1019 VREFD_U4 4K99R2F-L-GP 1D5V_M96 C1017 R1267 SCD1U16V2KX-3GP C1016 4K99R2F-L-GP MDA[63..0] 59,62 MDA[63..0] SCD1U16V2KX-3GP 1 1 VREFC_U4 Madison-M96 2 R1265 4K99R2F-L-GP 2 2 R1264 4K99R2F-L-GP MAA[0..12] MAA[0..12] Madison-M96 R1266 56R2F-1-GP 59,62 Madison-M96 56R2F-1-GP 59,62 W DQSA[0..7] R1263 Madison-M96 2 1 59,62 RDQSA[0..7] B CLKA1 1D5V_M96 1 1D5V_M96 2 72.41164.H0U 2ND = 72.51G63.C0U 59,62 DQMA#[0..7] Madison-M96 B A Madison-M96 2ND = 72.51G63.C0U Madison-M96 JV50-TR8 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: 5 4 3 2 A M92 DDR3 A1 Document Number Rev -1 JV50-TR8 Monday, October 26, 2009 Sheet 1 63 of 63 www.s-manuals.com
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File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.6 Linearized : No XMP Toolkit : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39 Producer : GPL Ghostscript 8.64 Modify Date : 2016:06:19 14:47:25+03:00 Create Date : 2009:11:16 15:16:37+08:00 Creator Tool : PDFCreator Version 0.9.8 Metadata Date : 2016:06:19 14:47:25+03:00 Document ID : 81ddfa06-d4db-11de-0000-bee99f14bdc3 Instance ID : uuid:0df5ebe3-320e-4827-9565-9d66bc4b3659 Format : application/pdf Title : Wistron JV50-TR8 - Schematics. www.s-manuals.com. Creator : Description : Description (x-repair) : Subject : Wistron JV50-TR8 - Schematics. www.s-manuals.com. Page Count : 64 Keywords : Wistron, JV50-TR8, -, Schematics., www.s-manuals.com.EXIF Metadata provided by EXIF.tools