Wistron LA480 Schematics. Www.s Manuals.com. Rsd Schematics
User Manual: Motherboard Wistron LA480 - Schematics. Free.
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C
C
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Title
Size Document Number Rev
Date: Sheet of
LA480
SD
Cover Page
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
1 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
Cover Page
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
1 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
Cover Page
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
1 103Friday, January 06, 2012
<Core Design>
Intel PCH(Panther Point)
UMA & Optimus Schematics Document
IVY Bridge(rPGA989)
DY :NotInstalled
UMA:UMA platform installed
OPS:Optimus
HR:Huron River
CR:Chief River
V: V-Series installed
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
Block Diagram
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
2 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
Block Diagram
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
2 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
Block Diagram
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
2 103Friday, January 06, 2012
<Core Design>
SYSTEM DC/DC
PCB LAYER
L1:Top
L2:GND
L3:Signal
L4:Signal
VCC_GFXCORE
TPS51640
L5:VCC
L6:Signal
L7:GND
L8:Signal
42~43
45
41
46
1D05V_VTT
44
92
40
INPUTS OUTPUTS
INPUTS
VGA
DCBATOUT
OUTPUTS
26
TPS51728
VGA_CORE
0D75V_S0
3D3V_AUX_S5
TPS51640
INPUTS
VCC_CORE
OUTPUTS
SYSTEM DC/DC
RT8207M
DDR_VREF_S3
OUTPUTS
CPU DC/DC
DCBATOUT
1D5V_S3
INPUTS
TPS51225
DCBATOUT 5V_S5
OUTPUTS
3D3V_S5
TPS51219
OUTPUTS
SYSTEM DC/DC
INPUTS
DCBATOUT
INPUTS
SYSTEM DC/DC
DCBATOUT
OUTPUTS
OUTPUTS
SYSTEM DC/DC
INPUTS
BQ24737
INPUTS
TI CHARGER
DCBATOUT+PBATT
+DC_IN_S5
47
INPUTS OUTPUTS
26
RT8068A
3D3V_S5 1D8V_S0
DCBATOUT
LDO
46
RT8207
5V_S5
71.08111.N03, IC PCIE CTRL RTL8111F-CGT QFN 48P
Finger Print BD
CRT 50
60
71
LPC debug port
NVIDIA
EMC2103-2-AP
ALC269Q-VC2
DMI x 4
GLAN RJ45
CONN
SPI
Flash ROM
8MB
51
HDMI
HDMI
Mini-Card
88,89,90,91
83.84,85,86,87
RTL8111F
KBC
ThermalInt.
KB
LPC Bus
Intel CPU
4,5,6,7,8,9,10
Block Diagram
(UMA/Optimus co-lay)
Bluetooth 63
USB x 2
CAMERA 49
Combo
Jack
Mini-Card
LVDS
LCD
RGB CRT
56
Intel
ODD
56
SATA x 2
USB 3.0/2.0 ports (14)
High Definition Audio
SATA ports (6)
HDD
ACPI 1.1
LPC I/F
74
SD/MMC+/MS/
MS Pro/xD
USB2.0 x 3
Azalia
CODEC
29
Analog DMIC
NPCE885G
ETHERNET (10/100/1000Mb)
NUVOTON
28
PCIE ports (8)
DDR3
800MHz
28
2GB/1GB/512MB
Fan
4
VRAM
27
49
69 25
N13P-GL (V)
N13M-GE1 (B)
17,18,19,20,21,22,23,24,25
PCIe x 16
Touch
PAD
69
FDI x 4 x 2
(UMA only)
AZALIA
65
66
31
64
Finger Print
59
(Discrete only)
##OnMainBoard
SMBus
PCIE x 1/USB2.0 x 1
USB 3.0 x 2
SATA x 1/USB2.0 x 1
PCIE x 1
IVY Bridge
PCH
Panther Point
G-Sensor
79
DDRIII: 1066/1333/1600 MHz
DDRIII
1066/1333/1600
DDRIII 1066/1333/1600 Channel A Slot 0
14
15
Slot 1DDRIII
1066/1333/1600
DDRIII 1066/1333/1600 Channel B
(V only)
ALCOR
REALTEK
Internal DMIC
(V only)
(B only)
WLAN
2CH SPEAKER
CardReader USB 2.0 x 1
AU6435B52
REALTEK
USB x 2
USB 2.0 x 2
Project Code
PCB P/N
Revision
91.4TD01.001
11264
SC
91.4TE01.001
11273
SC
LA480 LA580
0D75V_S0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Table of Content
A3
3 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Table of Content
A3
3 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Table of Content
A3
3 103Friday, January 06, 2012
<Core Design>
PCIe Routing
LANE2
LANE3 Card Reader
LANE4
CFG[6:5]
CFG[7]
Processor Strapping
CFG[2]
Disabled - No Physical Display Port attached to
Embedded DisplayPort.
CFG[4]
Pin Name Strap Description Configuration (Default value for each bit is
1 unless specified otherwise)
1:
0:
PCI-Express Static
Lane Reversal
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Default
Value
PCI-Express
Port Bifurcation
Straps
11 : x16 - Device 1 functions 1 and 2 disabled
10 : x8, x8 - Device 1 function 1 enabled ;
function 2 disabled
01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
enabled
PEG DEFER TRAINING
1
0
1
1:
0: Enabled - An external Display Port device is
connectd to the EMBEDDED display Port
11
1:
0:
PEG Train immediately following xxRESETB de assertion
PEG Wait for BIOS for training
SPKR
Name Schematics Notes
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
HDA_SYNC
Chief River Schematic Checklist Rev0.72
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
GNT3#/GPIO55
GNT2#/GPIO53
GNT1#/GPIO51
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
PCH Strapping
SPI_MOSI
Internal weak Pull-down.
Connect to Vcc3_3 with 8.2-kΩ
- 10-kΩ weak pull-up resistor.
NV_ALE
Enable Danbury:
Disable Danbury:
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
GPIO15
GPIO8
Reboot option at power-up
Default Mode:
No Reboot Mode with TCO Disabled:
Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.
Left floating, no pull-down required.
Connect to +NVRAM_VCCQ with 8.2-kohm
weak pull-up resistor [CRB has it pulled up
with 1-kohm no-stuff resistor]
Leave floating (internal pull-down)
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features.
High (1) - Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down depending on
the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for
strapping functions.
GPIO27
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
Voltage Rails
VOLTAGE DESCRIPTION
ACTIVE IN
POWER PLANE
CPU Core Rail
Graphics Core Rail
AC Brick Mode only
ON for iAMTLegacy WOL
Powered by Li Coin Cell in G3
and 3D3V_S5 in Sx
3D3V_M
3.3V
DSW, Sx ON for supporting Deep Sleep states
S0
S3
All S states
G3, Sx
5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_VTT
1D0V_S0
VCCSA
0D75V_S0
VCC_CORE
VCC_GFXCORE
1D8V_VGA_S0
3D3V_VGA_S0
1V_VGA_S0
5V
3.3V
1.8V
1.5V
1.05V
1.0V
0.9 - 0.675V
0.75V
0.35V to 1.5V
0.4 to 1.25V
1.8V
3.3V
1V
5V
1.5V
0.75V
5V_USBX_S3
1D5V_S3
DDR_VREF_S3
BT+
DCBATOUT
5V_S5
5V_AUX_S5
3D3V_S5
3D3V_AUX_S5
6V-14.1V
6V-14.1V
5V
5V
3.3V
3.3V
3.3V
3D3V_AUX_S5
GNT[3:0]# functionality is not available on Mobile.
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
If pull-ups are used, they should be tied to the Vcc3_3power rail.
Enable Danbury:
Disable Danbury:
Low(0) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no
confidentiality. High(1) - Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality.
Note : This is an un-muxed signal.
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kohm pull-up on this signal to +3.3VA rail.
SML1_CLK/SML1_DATA
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
Device
I C / SMBus Addresses
2
BAT_SCL/BAT_SDA
SMBus ADDRESSES
Chief River CRV
Address Hex Bus
Ref Des
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
LANE1
Mini Card2(WWAN)
LANE5
LANE6
LANE7
LANE8 Express Card
Intel GBE LAN / LAN
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
X
X
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
Mini Card1(WLAN)
SATA Table
Pair
SATA
Device
0
5
4
3
2
1
HDD1
ODD
N/A
mSATA
N/A
ESATA
X
Chief River Schematic Checklist Rev0.72
3D3V_AUX_KBC 3.3V
PCH SMBus
SO-DIMMA (SPD)
SO-DIMMB (SPD)
Digital Pot
G-Sensor
MINI
EC SMBus 2
PCH
eDP
EC SMBus 1
Battery
CHARGER
1D05V_M 1.05V S0/M0, SX/M3, WOL_EN
ON whenever iAMT is active1D05V_LAN 1.05V S0/M0, SX/M3
USB Table
13
12
X
Mini Card1 (WLAN)
Fingerprint (USB1.1)
X
New Card
USB3.0 ext port 4
10
0
11
USB3.0 ext port 2
Pair
4
5
2
3
1
Device
6
7
8
9
BLUETOOTH (USB1.1)
CARD READER
CCD
Mini Card2 (WWAN)
USB3.0 ext port 1
USB ext. port 4 / E-SATA /USB CHARGER
USB3.0 ext port 3
port9 is debug port
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_C_TXN3
PEG_C_TXN15
PEG_C_TXN10
PEG_C_TXN5
PEG_C_TXN0
PEG_C_TXN12
PEG_C_TXN7
PEG_C_TXN2
PEG_C_TXN14
PEG_C_TXN9
PEG_C_TXN4
PEG_C_TXN11
PEG_C_TXN6
PEG_C_TXN1
PEG_C_TXN13
PEG_C_TXN8
PEG_IRCOMP_R
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXN14
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXN13
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXP6
PEG_RXN7
PEG_RXN6
PEG_C_TXP3
PEG_C_TXP15
PEG_C_TXP10
PEG_C_TXP5
PEG_C_TXP0
PEG_C_TXP12
PEG_C_TXP7
PEG_C_TXP2
PEG_C_TXP14
PEG_C_TXP9
PEG_C_TXP4
PEG_C_TXP11
PEG_C_TXP6
PEG_C_TXP1
PEG_C_TXP13
PEG_C_TXP8
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
DP_COMP
FDI_TXP4
FDI_TXP5
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
FDI_TXP6
FDI_TXP7
FDI_TXN0
FDI_TXN1
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXN2
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3 PEG_RXP0
PEG_RXN0
PEG_RXP15
PEG_RXN15
eDP_HPD
1D05V_VTT
1D05V_VTT
DMI_TXN[3:0]19
DMI_TXP[3:0]19
DMI_RXN[3:0]19
DMI_RXP[3:0]19
FDI_TXN[7:0]19
FDI_TXP[7:0]19
FDI_FSYNC019 FDI_FSYNC119
FDI_INT19
FDI_LSYNC019 FDI_LSYNC119
PEG_RXN[0..15] 83
PEG_RXP[0..15] 83
PEG_TXN[0..15] 83
PEG_TXP[0..15] 83
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
CPU (PCIE/DMI/FDI)
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
4 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
CPU (PCIE/DMI/FDI)
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
4 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
CPU (PCIE/DMI/FDI)
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
4 103Friday, January 06, 2012
<Core Design>
SSID = CPU
NOTE.
If PEG is not implemented, the RX&TX pairs can be left as No Connect
NOTE:
Select a Fast FET similar to 2N7002E whose rise/
fall time is less than 6 ns. If HPD on eDP interface is
disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up
resistor on the motherboard.
PEG Static Lane Reversal
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
Note:
Intel DMI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Note:
Lane reversal does not apply to
FDI sideband signals.
Note:
Intel FDI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils.
EDP_COMPIO keep W/S=4/15 mils and routing
length less than 500 mils.
NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
01.00IVY.000 IVY BRIDGE ORCAD SYMBOL.
1 2
C408 SCD22U10V2KX-1GP
OPS
C408 SCD22U10V2KX-1GP
OPS
1 2
C414 SCD22U10V2KX-1GP
OPS
C414 SCD22U10V2KX-1GP
OPS
1 2
C403 SCD22U10V2KX-1GP
OPS
C403 SCD22U10V2KX-1GP
OPS
1 2
C418 SCD22U10V2KX-1GP
OPS
C418 SCD22U10V2KX-1GP
OPS
1 2
C410 SCD22U10V2KX-1GP
OPS
C410 SCD22U10V2KX-1GP
OPS
1 2
R402 24D9R2F-L-GPR402 24D9R2F-L-GP
1 2
C431 SCD22U10V2KX-1GP
OPS
C431 SCD22U10V2KX-1GP
OPS
1 2
C423 SCD22U10V2KX-1GP
OPS
C423 SCD22U10V2KX-1GP
OPS
1 2
C402 SCD22U10V2KX-1GP
OPS
C402 SCD22U10V2KX-1GP
OPS
1 2
C406 SCD22U10V2KX-1GP
OPS
C406 SCD22U10V2KX-1GP
OPS
1 2
C430 SCD22U10V2KX-1GP
OPS
C430 SCD22U10V2KX-1GP
OPS
1 2
R401
24D9R2F-L-GP
R401
24D9R2F-L-GP
1 2
C429 SCD22U10V2KX-1GP
OPS
C429 SCD22U10V2KX-1GP
OPS
1 2
C420 SCD22U10V2KX-1GP
OPS
C420 SCD22U10V2KX-1GP
OPS
1 2
C427 SCD22U10V2KX-1GP
OPS
C427 SCD22U10V2KX-1GP
OPS
1 2
C432 SCD22U10V2KX-1GP
OPS
C432 SCD22U10V2KX-1GP
OPS
1 2
C421 SCD22U10V2KX-1GP
OPS
C421 SCD22U10V2KX-1GP
OPS
1 2
C411 SCD22U10V2KX-1GP
OPS
C411 SCD22U10V2KX-1GP
OPS
1 2
C416 SCD22U10V2KX-1GP
OPS
C416 SCD22U10V2KX-1GP
OPS
1 2
C424 SCD22U10V2KX-1GP
OPS
C424 SCD22U10V2KX-1GP
OPS
1 2
R403 10KR2J-3-GP
DY
R403 10KR2J-3-GP
DY
1 2
C405 SCD22U10V2KX-1GP
OPS
C405 SCD22U10V2KX-1GP
OPS
1 2
C401 SCD22U10V2KX-1GP
OPS
C401 SCD22U10V2KX-1GP
OPS
1 2
C404 SCD22U10V2KX-1GP
OPS
C404 SCD22U10V2KX-1GP
OPS
1 2
C407 SCD22U10V2KX-1GP
OPS
C407 SCD22U10V2KX-1GP
OPS
1 2
C412 SCD22U10V2KX-1GP
OPS
C412 SCD22U10V2KX-1GP
OPS
1 2
C426 SCD22U10V2KX-1GP
OPS
C426 SCD22U10V2KX-1GP
OPS
1 2
C417 SCD22U10V2KX-1GP
OPS
C417 SCD22U10V2KX-1GP
OPS
1 2
C428 SCD22U10V2KX-1GP
OPS
C428 SCD22U10V2KX-1GP
OPS
DMI_RX#0
B27
DMI_RX#1
B25
DMI_RX#2
A25
DMI_RX#3
B24
DMI_RX0
B28
DMI_RX1
B26
DMI_RX2
A24
DMI_RX3
B23
DMI_TX#0
G21
DMI_TX#1
E22
DMI_TX#2
F21
DMI_TX#3
D21
DMI_TX0
G22
DMI_TX1
D22
DMI_TX3
C21 DMI_TX2
F20
FDI0_TX#0
A21
FDI0_TX#1
H19
FDI0_TX#2
E19
FDI0_TX#3
F18
FDI1_TX#0
B21
FDI1_TX#1
C20
FDI1_TX#2
D18
FDI1_TX#3
E17
FDI0_TX0
A22
FDI0_TX1
G19
FDI0_TX2
E20
FDI0_TX3
G18
FDI1_TX0
B20
FDI1_TX1
C19
FDI1_TX2
D19
FDI1_TX3
F17
FDI0_FSYNC
J18
FDI1_FSYNC
J17
FDI_INT
H20
FDI0_LSYNC
J19
FDI1_LSYNC
H17
PEG_ICOMPI J22
PEG_ICOMPO J21
PEG_RCOMPO H22
PEG_RX#0 K33
PEG_RX#1 M35
PEG_RX#2 L34
PEG_RX#3 J35
PEG_RX#4 J32
PEG_RX#5 H34
PEG_RX#6 H31
PEG_RX#7 G33
PEG_RX#8 G30
PEG_RX#9 F35
PEG_RX#10 E34
PEG_RX#11 E32
PEG_RX#12 D33
PEG_RX#13 D31
PEG_RX#14 B33
PEG_RX#15 C32
PEG_RX0 J33
PEG_RX1 L35
PEG_RX2 K34
PEG_RX3 H35
PEG_RX4 H32
PEG_RX5 G34
PEG_RX6 G31
PEG_RX7 F33
PEG_RX8 F30
PEG_RX9 E35
PEG_RX10 E33
PEG_RX11 F32
PEG_RX12 D34
PEG_RX13 E31
PEG_RX14 C33
PEG_RX15 B32
PEG_TX#0 M29
PEG_TX#1 M32
PEG_TX#2 M31
PEG_TX#3 L32
PEG_TX#4 L29
PEG_TX#5 K31
PEG_TX#6 K28
PEG_TX#7 J30
PEG_TX#8 J28
PEG_TX#9 H29
PEG_TX#10 G27
PEG_TX#11 E29
PEG_TX#12 F27
PEG_TX#13 D28
PEG_TX#14 F26
PEG_TX#15 E25
PEG_TX0 M28
PEG_TX1 M33
PEG_TX2 M30
PEG_TX3 L31
PEG_TX4 L28
PEG_TX5 K30
PEG_TX6 K27
PEG_TX7 J29
PEG_TX8 J27
PEG_TX9 H28
PEG_TX10 G28
PEG_TX11 E28
PEG_TX12 F28
PEG_TX13 D27
PEG_TX14 E26
PEG_TX15 D25
EDP_AUX
C15
EDP_AUX#
D15
EDP_TX0
C17
EDP_TX1
F16
EDP_TX2
C16
EDP_TX3
G15
EDP_TX#0
C18
EDP_TX#1
E16
EDP_TX#2
D16
EDP_TX#3
F15
EDP_COMPIO
A18
EDP_HPD
B16 EDP_ICOMPO
A17
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
1 OF 9
SANDY
CPU1A
SANDY
62.10055.421 SKT-BGA989C470395-1H180
2nd = 62.10040.771
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
1 OF 9
SANDY
CPU1A
SANDY
62.10055.421 SKT-BGA989C470395-1H180
2nd = 62.10040.771
1 2
C425 SCD22U10V2KX-1GP
OPS
C425 SCD22U10V2KX-1GP
OPS
1 2
C419 SCD22U10V2KX-1GP
OPS
C419 SCD22U10V2KX-1GP
OPS
1 2
C409 SCD22U10V2KX-1GP
OPS
C409 SCD22U10V2KX-1GP
OPS
1 2
C415 SCD22U10V2KX-1GP
OPS
C415 SCD22U10V2KX-1GP
OPS
1 2
C422 SCD22U10V2KX-1GP
OPS
C422 SCD22U10V2KX-1GP
OPS
1 2
C413 SCD22U10V2KX-1GP
OPS
C413 SCD22U10V2KX-1GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SKTOCC#_R
H_CATERR#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_TRST#
H_PROCHOT#_R
BUF_CPU_RST#
SM_DRAMRST#
XDP_DBRESET#
CLK_DP_P_R
CLK_DP_N_R
H_PROCHOT#
H_CPUPWRGD_R
XDP_TMS
XDP_PREQ#
XDP_TDI
XDP_TCLK
XDP_TDO
XDP_PRDY#
XDP_TRST#
XDP_DBRESET#
CLK_DP_N_R
CLK_DP_P_R
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TCLK
1D05V_VTT
3D3V_S0
1D05V_VTT
1D05V_VTT
H_PECI22,27
H_PROCHOT#27,42
H_PM_SYNC19
H_SNB_IVB#22
H_THERMTRIP#22,36
H_CPUPWRGD22,97
VDDPWRGOOD37
PLT_RST#18,27,31,36,65,66,71,80,82,83,97
SM_DRAMRST# 37
CLK_EXP_P 20
CLK_EXP_N 20
XDP_DBRESET#19
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
CPU (THERMAL/CLOCK/PM )
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
5 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
CPU (THERMAL/CLOCK/PM )
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
5 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480
SD
CPU (THERMAL/CLOCK/PM )
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
5 103Friday, January 06, 2012
<Core Design>
SSID = CPU
Disabling Guidelines:
If motherboard only supports external graphics:
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
through 1K +/- 5% resistorpower (~15 mW) may be
wasted.
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
Intel
recommends
43pf
Connect EC to PROCHOT# through inverting OD buffer.
0511-CHECK
If PROCHOT# is not used, then it must
be terminated with a 68ohm ±5%
pull-up resistor to VTT.
In order to minimize resistance, use thick traces to
route all COMP signals, use 10-mils wide trace for
routing less than 500 mils, or 20-mils wide trace
for routing between 500 mils and 1000 mils. Keep
20-mils spacing to any other signals in order to
minimize crosstalk.
Need Add Test PointC26: PROC_SELECT#
0511-CHECK
DEL U501
DEL R519
DEL C503
DEL R517
DEL R515
ASM R510
ASM R509
1 2
R516 1KR2J-1-GPR516 1KR2J-1-GP
1 2
R501
62R2J-GP
R501
62R2J-GP
1
TP513TP513
1
2 3
4
RN502
SRN1KJ-7-GP
RN502
SRN1KJ-7-GP
1
TP512TP512
SM_RCOMP1 A5
SM_RCOMP2 A4
SM_DRAMRST# R8
SM_RCOMP0 AK1
BCLK# A27
BCLK A28
DPLL_REF_SSCLK# A15
DPLL_REF_SSCLK A16
CATERR#
AL33
PECI
AN33
PROCHOT#
AL32
THERMTRIP#
AN32
SM_DRAMPWROK
V8
RESET#
AR33
PRDY# AP29
PREQ# AP27
TCK AR26
TMS AR27
TRST# AP30
TDI AR28
TDO AP26
DBR# AL35
BPM#0 AT28
BPM#1 AR29
BPM#2 AR30
BPM#3 AT30
BPM#4 AP32
BPM#5 AR31
BPM#6 AT31
BPM#7 AR32
PM_SYNC
AM34
SKTOCC#
AN34
SNB_IVB#
C26
UNCOREPWRGOOD
AP33
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
SANDY
CPU1B
SANDY
62.10055.421 SKT-BGA989C470395-1H180
2nd = 62.10040.771
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
SANDY
CPU1B
SANDY
62.10055.421 SKT-BGA989C470395-1H180
2nd = 62.10040.771
1 2
R510
1K5R2F-2-GP
R510
1K5R2F-2-GP
1
TP511TP511
12
R509
750R2F-GP
R509
750R2F-GP
1 2
R506 140R2F-GPR506 140R2F-GP
1 2
R503 10KR2J-3-GPR503 10KR2J-3-GP
1
TP502TP502
12
C502
SC47P50V2JN-3GP
C502
SC47P50V2JN-3GP
1 2
R504 0R0402-PADR504 0R0402-PAD
1 2
R508 200R2F-L-GPR508 200R2F-L-GP
1 2
R523 51R2J-2-GPR523 51R2J-2-GP
1
TP516TP516
1 2
R513 56R2J-4-GPR513 56R2J-4-GP
1
2
3
4 5
6
7
8
RN501
SRN51J-1-GP
RN501
SRN51J-1-GP
12
R502 4K99R2F-L-GPR502 4K99R2F-L-GP
12
C501
SC220P50V2KX-3GP
DY
C501
SC220P50V2KX-3GP
DY
1
TP501TP501
1 2
R507 25D5R2F-GPR507 25D5R2F-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ59
M_A_DQ54
M_A_DQ53
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49
M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ15
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_A_DQS4
M_A_DQS3
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS2
M_A_DQS1
M_A_DQS0
M_A_A7
M_A_A12
M_A_A14
M_A_A13
M_A_A9
M_A_A15
M_A_A10
M_A_A0
M_A_A6
M_A_A8
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A11
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS#3
M_A_DQS#2
M_A_DQS#1
M_A_DQS#0
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#3
M_B_DQS#2
M_B_DQS#1
M_B_DQS#0
M_B_DQS#7
M_B_DQS#6
M_B_DQS#5
M_B_DQS#4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
M_A_DQ[63:0]14 M_B_DQ[63:0]15
M_A_DQS#[7:0] 14
M_A_A[15:0] 14
M_A_DQS[7:0] 14
M_A_DIM0_CKE0 14
M_A_DIM0_CKE1 14
M_A_DIM0_CS#0 14
M_A_DIM0_CS#1 14
M_A_DIM0_ODT0 14
M_A_DIM0_ODT1 14
M_A_DIM0_CLK_DDR0 14
M_A_DIM0_CLK_DDR#0 14
M_A_DIM0_CLK_DDR1 14
M_A_DIM0_CLK_DDR#1 14
M_B_A[15:0] 15
M_B_DQS[7:0] 15
M_B_DQS#[7:0] 15
M_B_DIM0_CKE0 15
M_B_DIM0_CKE1 15
M_B_DIM0_CS#0 15
M_B_DIM0_CS#1 15
M_B_DIM0_ODT0 15
M_B_DIM0_ODT1 15
M_B_DIM0_CLK_DDR0 15
M_B_DIM0_CLK_DDR#0 15
M_B_DIM0_CLK_DDR1 15
M_B_DIM0_CLK_DDR#1 15
M_A_BS014 M_A_BS114 M_A_BS214
M_A_CAS#14 M_A_RAS#14 M_A_WE#14
M_B_BS015
M_B_WE#15
M_B_BS115 M_B_BS215
M_B_CAS#15 M_B_RAS#15
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (DDR)
A3
6 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (DDR)
A3
6 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (DDR)
A3
6 103Friday, January 06, 2012
<Core Design>
SSID = CPU
SA_BS0
AE10
SA_BS1
AF10
SA_BS2
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CLK0 AB6
SA_CLK1 AA5
SA_CLK#0 AA6
SA_CLK#1 AB5
SA_CKE0 V9
SA_CKE1 V10
SA_CS#0 AK3
SA_CS#1 AL3
SA_ODT0 AH3
SA_ODT1 AG3
SA_DQS0 D4
SA_DQS#0 C4
SA_DQS1 F6
SA_DQS#1 G6
SA_DQS2 K3
SA_DQS#2 J3
SA_DQS3 N6
SA_DQS#3 M6
SA_DQS4 AL5
SA_DQS#4 AL6
SA_DQS5 AM9
SA_DQS#5 AM8
SA_DQS6 AR11
SA_DQS#6 AR12
SA_DQS7 AM14
SA_DQS#7 AM15
SA_MA0 AD10
SA_MA1 W1
SA_MA2 W2
SA_MA3 W7
SA_MA4 V3
SA_MA5 V2
SA_MA6 W3
SA_MA7 W6
SA_MA8 V1
SA_MA9 W5
SA_MA10 AD8
SA_MA11 V4
SA_MA12 W4
SA_MA13 AF8
SA_MA14 V5
SA_MA15 V7
SA_DQ0
C5
SA_DQ1
D5
SA_DQ2
D3
SA_DQ3
D2
SA_DQ4
D6
SA_DQ5
C6
SA_DQ6
C2
SA_DQ7
C3
SA_DQ8
F10
SA_DQ9
F8
SA_DQ10
G10
SA_DQ11
G9
SA_DQ12
F9
SA_DQ13
F7
SA_DQ14
G8
SA_DQ15
G7
SA_DQ16
K4
SA_DQ17
K5
SA_DQ18
K1
SA_DQ19
J1
SA_DQ20
J5
SA_DQ21
J4
SA_DQ22
J2
SA_DQ23
K2
SA_DQ24
M8
SA_DQ25
N10
SA_DQ26
N8
SA_DQ27
N7
SA_DQ28
M10
SA_DQ29
M9
SA_DQ30
N9
SA_DQ31
M7
SA_DQ32
AG6
SA_DQ33
AG5
SA_DQ34
AK6
SA_DQ35
AK5
SA_DQ36
AH5
SA_DQ37
AH6
SA_DQ38
AJ5
SA_DQ39
AJ6
SA_DQ40
AJ8
SA_DQ41
AK8
SA_DQ42
AJ9
SA_DQ43
AK9
SA_DQ44
AH8
SA_DQ45
AH9
SA_DQ46
AL9
SA_DQ47
AL8
SA_DQ48
AP11
SA_DQ49
AN11
SA_DQ50
AL12
SA_DQ51
AM12
SA_DQ52
AM11
SA_DQ53
AL11
SA_DQ54
AP12
SA_DQ55
AN12
SA_DQ56
AJ14
SA_DQ57
AH14
SA_DQ58
AL15
SA_DQ59
AK15
SA_DQ60
AL14
SA_DQ61
AK14
SA_DQ62
AJ15
SA_DQ63
AH15
SA_CLK2 AB4
SA_CLK#2 AA4
SA_CLK3 AB3
SA_CLK#3 AA3
SA_CKE2 W9
SA_CKE3 W10
SA_CS#2 AG1
SA_CS#3 AH1
SA_ODT2 AG2
SA_ODT3 AH2
DDR SYSTEM MEMORY A
3 OF 9
SANDY
CPU1C
SANDY
2nd = 62.10040.771
62.10055.421
DDR SYSTEM MEMORY A
3 OF 9
SANDY
CPU1C
SANDY
2nd = 62.10040.771
62.10055.421
SB_BS0
AA9
SB_BS1
AA7
SB_BS2
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CLK0 AE2
SB_CLK1 AE1
SB_CLK#0 AD2
SB_CLK#1 AD1
SB_CKE0 R9
SB_CKE1 R10
SB_ODT0 AE4
SB_ODT1 AD4
SB_DQS4 AN6
SB_DQS#4 AN5
SB_DQS5 AP8
SB_DQS#5 AP9
SB_DQS6 AK11
SB_DQS#6 AK12
SB_DQS7 AP14
SB_DQS#7 AP15
SB_DQS0 C7
SB_DQS#0 D7
SB_DQS1 G3
SB_DQS#1 F3
SB_DQS2 J6
SB_DQS#2 K6
SB_DQS3 M3
SB_DQS#3 N3
SB_MA0 AA8
SB_MA1 T7
SB_MA2 R7
SB_MA3 T6
SB_MA4 T2
SB_MA5 T4
SB_MA6 T3
SB_MA7 R2
SB_MA8 T5
SB_MA9 R3
SB_MA10 AB7
SB_MA11 R1
SB_MA12 T1
SB_MA13 AB10
SB_MA14 R5
SB_MA15 R4
SB_DQ0
C9
SB_DQ1
A7
SB_DQ2
D10
SB_DQ3
C8
SB_DQ4
A9
SB_DQ5
A8
SB_DQ6
D9
SB_DQ7
D8
SB_DQ8
G4
SB_DQ9
F4
SB_DQ10
F1
SB_DQ11
G1
SB_DQ12
G5
SB_DQ13
F5
SB_DQ14
F2
SB_DQ15
G2
SB_DQ16
J7
SB_DQ17
J8
SB_DQ18
K10
SB_DQ19
K9
SB_DQ20
J9
SB_DQ21
J10
SB_DQ22
K8
SB_DQ23
K7
SB_DQ24
M5
SB_DQ25
N4
SB_DQ26
N2
SB_DQ27
N1
SB_DQ28
M4
SB_DQ29
N5
SB_DQ30
M2
SB_DQ31
M1
SB_DQ32
AM5
SB_DQ33
AM6
SB_DQ34
AR3
SB_DQ35
AP3
SB_DQ36
AN3
SB_DQ37
AN2
SB_DQ38
AN1
SB_DQ39
AP2
SB_DQ40
AP5
SB_DQ41
AN9
SB_DQ42
AT5
SB_DQ43
AT6
SB_DQ44
AP6
SB_DQ45
AN8
SB_DQ46
AR6
SB_DQ47
AR5
SB_DQ48
AR9
SB_DQ49
AJ11
SB_DQ50
AT8
SB_DQ51
AT9
SB_DQ52
AH11
SB_DQ53
AR8
SB_DQ54
AJ12
SB_DQ55
AH12
SB_DQ56
AT11
SB_DQ57
AN14
SB_DQ58
AR14
SB_DQ59
AT14
SB_DQ60
AT12
SB_DQ61
AN15
SB_DQ62
AR15
SB_DQ63
AT15
SB_CLK2 AB2
SB_CLK#2 AA2
SB_CKE2 T9
SB_CLK3 AA1
SB_CLK#3 AB1
SB_CKE3 T10
SB_CS#0 AD3
SB_CS#1 AE3
SB_CS#2 AD6
SB_CS#3 AE6
SB_ODT2 AD5
SB_ODT3 AE5
DDR SYSTEM MEMORY B
4 OF 9
SANDY
CPU1D
SANDY
2nd = 62.10040.771
62.10055.421
DDR SYSTEM MEMORY B
4 OF 9
SANDY
CPU1D
SANDY
2nd = 62.10040.771
62.10055.421
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
CFG2
CFG5
CFG6
CFG7
H_VCCP_SEL
CLK_XDP_ITP_P
CLK_XDP_ITP_N
CFG0
CFG7
CFG2
CFG6
CFG5
CFG4
TP713
CFG1
CFG3
CFG16
DDR_WR_VREF0112 DDR_WR_VREF0212
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (RESERVED)
A3
7 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (RESERVED)
A3
7 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (RESERVED)
A3
7 103Friday, January 06, 2012
<Core Design>
SSID = CPU
0:Lane Reversed
1: PEG Train immediately following xxRESETB de assertion
CFG7
PEG DEFER TRAINING
PEG Static Lane Reversal - CFG2 is for the 16x
1: Normal Operation; Lane #
definition matches socket pin map definition
CFG2
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
0: PEG Wait for BIOS for training
CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled
PCIE Port Bifurcation Straps
0: Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
1: Disabled; No Physical Display Port
attached to Embedded Display Port
CFG4
1
TP705TP705
1
TP717TP717
12
R702
1KR2J-1-GP
OPS
R702
1KR2J-1-GP
OPS
1
TP704TP704
CFG0
AK28
CFG1
AK29
CFG2
AL26
CFG3
AL27
CFG4
AK26
CFG5
AL29
CFG6
AL30
CFG7
AM31
CFG8
AM32
CFG9
AM30
CFG10
AM28
CFG11
AM26
CFG12
AN28
CFG13
AN31
CFG14
AN26
CFG15
AM27
CFG16
AK31
CFG17
AN29
RSVD#AM33 AM33
RSVD#AJ27 AJ27
RSVD#J16 J16
RSVD#AT34 AT34
RSVD#H16 H16
RSVD#G16 G16
RSVD#AR35 AR35
RSVD#AT33 AT33
RSVD#AR34 AR34
RSVD#AT2 AT2
RSVD#AT1 AT1
RSVD#AR1 AR1
RSVD#B34 B34
RSVD#A33 A33
RSVD#A34 A34
RSVD#B35 B35
RSVD#C35 C35
RSVD#AJ32 AJ32
RSVD#AK32 AK32
RSVD#AE7 AE7
RSVD#AK2 AK2
RSVD#L7 L7
RSVD#AG7 AG7
RSVD#J15
J15
RSVD#C30
C30 RSVD#D23
D23
RSVD#A31
A31
RSVD#B30
B30
RSVD#D30
D30 RSVD#B29
B29
RSVD#A30
A30 RSVD#B31
B31
RSVD#C29
C29
RSVD#J20
J20
RSVD#T8 T8
RSVD#B4
B4
RSVD#D1
D1
RSVD#F25
F25
RSVD#F24
F24
RSVD#D24
D24
RSVD#G25
G25
RSVD#G24
G24
RSVD#E23
E23
RSVD#W8 W8
RSVD#AT26 AT26
RSVD#B18
B18
RSVD#AP35 AP35
RSVD#F23
F23
RSVD#AJ26
AJ26
RSVD#AJ31
AJ31
RSVD#AH31
AH31
RSVD#AJ33
AJ33
RSVD#AH33
AH33
RSVD#AH27 AH27
RSVD#A19
A19
RSVD#AN35 AN35
RSVD#AM35 AM35
RESERVED
5 OF 9
SANDY
CPU1E
SANDY
62.10055.421
SKT-BGA989C470395-1H180
2nd = 62.10040.771
RESERVED
5 OF 9
SANDY
CPU1E
SANDY
62.10055.421
SKT-BGA989C470395-1H180
2nd = 62.10040.771
12
R704
1KR2J-1-GP
DY
R704
1KR2J-1-GP
DY
1
TP702TP702
1
TP718TP718
12
R701
1KR2J-1-GP
DY
R701
1KR2J-1-GP
DY
1
TP720TP720
12
R705
1KR2J-1-GP
DY
R705
1KR2J-1-GP
DY
1
TP719TP719
12
R703
1KR2J-1-GP
DY
R703
1KR2J-1-GP
DY
1
TP703TP703
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDCLK
H_CPU_SVIDALRT#
VCCIO_SENSE
VSSIO_SENSE
H_CPU_SVIDDAT
VCC_CORE
VCC_CORE
1D05V_VTT
1D05V_VTT
1D05V_VTT
1D05V_VTT
1D05V_VTT
VCC_CORE
H_CPU_SVIDDAT 42
VR_SVID_ALERT# 42
H_CPU_SVIDCLK 42
VCCSENSE 42
VSSSENSE 42
VCCIO_SENSE 45
VSSIO_SENSE 45
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VCC_CORE)
Custom
8 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VCC_CORE)
Custom
8 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VCC_CORE)
Custom
8 103Friday, January 06, 2012
<Core Design>
For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7
For CRB VIDALERT# need to pull high 75 ohm close to CPU
VCCIO:8.5A
VCC CORE:53A
0511-CHECK CAP.
0511-CHECK CAP.
0511-CHECK
0511-CHECK
check
Place neer PCU pin.
Reserve C846 & C847
12
R809
10R2F-L-GP
R809
10R2F-L-GP
12
C803
SC10U6D3V5KX-1GP
C803
SC10U6D3V5KX-1GP
12
C842
SC10U6D3V5KX-1GP
C842
SC10U6D3V5KX-1GP
12
R801
100R2F-L1-GP-U
R801
100R2F-L1-GP-U
12
C844
SC10U6D3V5KX-1GP
DY
C844
SC10U6D3V5KX-1GP
DY
12
C811
SC10U6D3V5KX-1GP
C811
SC10U6D3V5KX-1GP
12
C820
SC10U6D3V5KX-1GP
C820
SC10U6D3V5KX-1GP
12
C841
SC10U6D3V5KX-1GP
C841
SC10U6D3V5KX-1GP
12
C829
SC10U6D3V5KX-1GP
C829
SC10U6D3V5KX-1GP
12
C837
SC10U6D3V5KX-1GP
C837
SC10U6D3V5KX-1GP
12
C843
SC10U6D3V5KX-1GP
C843
SC10U6D3V5KX-1GP
12
C840
SC10U6D3V5KX-1GP
DY
C840
SC10U6D3V5KX-1GP
DY
1 2
R804 130R2F-1-GPR804 130R2F-1-GP
12
C838
SC10U6D3V5KX-1GP
C838
SC10U6D3V5KX-1GP
12
C808
SC10U6D3V5KX-1GP
C808
SC10U6D3V5KX-1GP
12
C830
SC10U6D3V5KX-1GP
C830
SC10U6D3V5KX-1GP
12
C802
SC10U6D3V5KX-1GP
DY
C802
SC10U6D3V5KX-1GP
DY
12
C819
SC10U6D3V5KX-1GP
C819
SC10U6D3V5KX-1GP
12
C823
SC10U6D3V5KX-1GP
DY
C823
SC10U6D3V5KX-1GP
DY
12
C828
SC10U6D3V5KX-1GP
C828
SC10U6D3V5KX-1GP
1 2
R807 75R2F-2-GPR807 75R2F-2-GP
12
C812
SC10U6D3V5KX-1GP
C812
SC10U6D3V5KX-1GP
12
R802
100R2F-L1-GP-U
R802
100R2F-L1-GP-U
12
C816
SC10U6D3V5KX-1GP
C816
SC10U6D3V5KX-1GP
12
C805
SC10U6D3V5KX-1GP
C805
SC10U6D3V5KX-1GP
12
C821
SC10U6D3V5KX-1GP
C821
SC10U6D3V5KX-1GP
12
C825
SC10U6D3V5KX-1GP
C825
SC10U6D3V5KX-1GP
12
C826
SC10U6D3V5KX-1GP
C826
SC10U6D3V5KX-1GP
12
C804
SC10U6D3V5KX-1GP
DY
C804
SC10U6D3V5KX-1GP
DY
12
C801
SC10U6D3V5KX-1GP
C801
SC10U6D3V5KX-1GP
12
C839
SC10U6D3V5KX-1GP
C839
SC10U6D3V5KX-1GP
12
C818
SC10U6D3V5KX-1GP
C818
SC10U6D3V5KX-1GP
12
C817
SC10U6D3V5KX-1GP
C817
SC10U6D3V5KX-1GP
12
C827
SC10U6D3V5KX-1GP
C827
SC10U6D3V5KX-1GP
12
C832
SC10U6D3V5KX-1GP
DY
C832
SC10U6D3V5KX-1GP
DY
12
C833
SC10U6D3V5KX-1GP
C833
SC10U6D3V5KX-1GP
12
C807
SC10U6D3V5KX-1GP
C807
SC10U6D3V5KX-1GP
12
C813
SC10U6D3V5KX-1GP
C813
SC10U6D3V5KX-1GP
1 2
R803 43R2J-GPR803 43R2J-GP
12
C834
SC10U6D3V5KX-1GP
C834
SC10U6D3V5KX-1GP
12
C822
SC10U6D3V5KX-1GP
C822
SC10U6D3V5KX-1GP
12
C836
SC10U6D3V5KX-1GP
C836
SC10U6D3V5KX-1GP
12
C810
SC10U6D3V5KX-1GP
C810
SC10U6D3V5KX-1GP
12
C824
SC10U6D3V5KX-1GP
C824
SC10U6D3V5KX-1GP
12
C814
SC10U6D3V5KX-1GP
C814
SC10U6D3V5KX-1GP
12
C835
SC10U6D3V5KX-1GP
C835
SC10U6D3V5KX-1GP
12
R808
10R2F-L-GP
R808
10R2F-L-GP
12
C831
SC10U6D3V5KX-1GP
C831
SC10U6D3V5KX-1GP
VCC_SENSE AJ35
VSS_SENSE AJ34
VIDALERT# AJ29
VIDSCLK AJ30
VIDSOUT AJ28
VSSIO_SENSE A10
VCC
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCCIO AH13
VCCIO J11
VCCIO G12
VCCIO F14
VCCIO F13
VCCIO F12
VCCIO F11
VCCIO E14
VCCIO E12
VCCIO AH10
VCCIO AG10
VCCIO AC10
VCCIO Y10
VCCIO U10
VCCIO P10
VCCIO L10
VCCIO J14
VCCIO J13
VCCIO J12
VCCIO H14
VCCIO H12
VCCIO H11
VCCIO G14
VCCIO G13
VCCIO E11
VCCIO C12
VCCIO C11
VCCIO B14
VCCIO B12
VCCIO A14
VCCIO A13
VCCIO A12
VCCIO A11
VCCIO D14
VCCIO D13
VCCIO D12
VCCIO D11
VCCIO C14
VCCIO C13
VCCIO_SENSE B10
VCCIO J23
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
6 OF 9
SANDY
CPU1F
SANDY
2nd = 62.10040.771
62.10055.421
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
6 OF 9
SANDY
CPU1F
SANDY
2nd = 62.10040.771
62.10055.421
12
C815
SC10U6D3V5KX-1GP
C815
SC10U6D3V5KX-1GP
12
C806
SC10U6D3V5KX-1GP
C806
SC10U6D3V5KX-1GP
12
C845
SC10U6D3V5KX-1GP
C845
SC10U6D3V5KX-1GP
12
C809
SC10U6D3V5KX-1GP
C809
SC10U6D3V5KX-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS_AXG_SENSE
VCC_AXG_SENSE
1D5V_S0
VCC_GFXCORE
VCCSA
VCC_GFXCORE
1D8V_S0
VCC_AXG_SENSE 42
+V_SM_VREF_CNT 37
VCCSA_SENSE 48
VSS_AXG_SENSE 42
VCCSA_SELECT1 48
VCCSA_SELECT0 48
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VCC_GFXCORE)
A3
9 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VCC_GFXCORE)
A3
9 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VCC_GFXCORE)
A3
9 103Friday, January 06, 2012
<Core Design>
Routing Guideline:
Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
Refer to the latest Huron River Mainstream PDG
(Doc# 436735) for more details on S3 power
reduction implementation.
+V_SM_VREF_CNT should have 10 mil trace width
VCCA:6A
0511-CHECK CAP
PROCESSOR VAXG: 24A
0511-CHECK
VCCPLL:1.2A
VDDQ:5A
+V0.85S - VCCSA - System Agent rail voltage can be
[0.9, 0.725, 0.8, 0.675] V for IVB
[0.9, 0.8] V for SNB
12
C914
SC10U6D3V5KX-1GP
C914
SC10U6D3V5KX-1GP
12
C916
SC10U6D3V5KX-1GP
C916
SC10U6D3V5KX-1GP
12
C907
SC10U6D3V5KX-1GP
C907
SC10U6D3V5KX-1GP
12
RC901
SC33P50V2JN-3GP
DY
RC901
SC33P50V2JN-3GP
DY
12
C910
SC10U6D3V5KX-1GP
C910
SC10U6D3V5KX-1GP
12
C902
SC10U6D3V5KX-1GP
C902
SC10U6D3V5KX-1GP
12
C903
SC10U6D3V5KX-1GP
C903
SC10U6D3V5KX-1GP
12
C905
SC10U6D3V5KX-1GP
C905
SC10U6D3V5KX-1GP
12
C901
SC10U6D3V5KX-1GP
C901
SC10U6D3V5KX-1GP
12
C922
SC1U10V2KX-1GP
C922
SC1U10V2KX-1GP
12
C913
SC10U6D3V5KX-1GP
C913
SC10U6D3V5KX-1GP
12
C926
SC10U6D3V5KX-1GP
C926
SC10U6D3V5KX-1GP
12
C918
SC10U6D3V5KX-1GP
C918
SC10U6D3V5KX-1GP
12
C906
SC10U6D3V5KX-1GP
C906
SC10U6D3V5KX-1GP
12
RC902
SC33P50V2JN-3GP
DY
RC902
SC33P50V2JN-3GP
DY
12
C921
SC10U6D3V5KX-1GP
C921
SC10U6D3V5KX-1GP
12
C917
SC10U6D3V5KX-1GP
C917
SC10U6D3V5KX-1GP
12
C920
SC10U6D3V5KX-1GP
C920
SC10U6D3V5KX-1GP
1
2 3
4
RN901
SRN1KJ-7-GP
RN901
SRN1KJ-7-GP
12
C915
SC10U6D3V5KX-1GP
C915
SC10U6D3V5KX-1GP
SM_VREF AL1
VSSAXG_SENSE AK34
VAXG_SENSE AK35
VAXG
AT24
VAXG
AT23
VAXG
AT21
VAXG
AT20
VAXG
AT18
VAXG
AT17
VAXG
AR24
VAXG
AR23
VAXG
AR21
VAXG
AR20
VAXG
AR18
VAXG
AR17
VAXG
AP24
VAXG
AP23
VAXG
AP21
VAXG
AP20
VAXG
AP18
VAXG
AP17
VAXG
AN24
VAXG
AN23
VAXG
AN21
VAXG
AN20
VAXG
AN18
VAXG
AN17
VAXG
AM24
VAXG
AM23
VAXG
AM21
VAXG
AM20
VAXG
AM18
VAXG
AM17
VAXG
AL24
VAXG
AL23
VAXG
AL21
VAXG
AL20
VAXG
AL18
VAXG
AL17
VAXG
AK24
VAXG
AK23
VAXG
AK21
VAXG
AK20
VAXG
AK18
VAXG
AK17
VAXG
AJ24
VAXG
AJ23
VAXG
AJ21
VAXG
AJ20
VAXG
AJ18
VAXG
AJ17
VAXG
AH24
VAXG
AH23
VAXG
AH21
VAXG
AH20
VAXG
AH18
VAXG
AH17
VDDQ U4
VDDQ U1
VDDQ P7
VDDQ P4
VDDQ P1
VDDQ AF7
VDDQ AF4
VDDQ AF1
VDDQ AC7
VDDQ AC4
VDDQ AC1
VDDQ Y7
VDDQ Y4
VDDQ Y1
VDDQ U7
VCCPLL
B6
VCCPLL
A6
VCCSA M27
VCCSA M26
VCCSA L26
VCCSA J26
VCCSA J25
VCCSA J24
VCCSA H26
VCCSA H25
VCCSA_SENSE H23
VCCSA_VID1 C24
VCCPLL
A2
FC_C22 C22
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
7 OF 9
SANDY
CPU1G
SANDY
2nd = 62.10040.771
62.10055.421
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
7 OF 9
SANDY
CPU1G
SANDY
2nd = 62.10040.771
62.10055.421
12
C904
SC10U6D3V5KX-1GP
C904
SC10U6D3V5KX-1GP
12
C923
SC10U6D3V5KX-1GP
C923
SC10U6D3V5KX-1GP
12
R906
100R2F-L1-GP-U
R906
100R2F-L1-GP-U
12
C924
SC1U10V2KX-1GP
C924
SC1U10V2KX-1GP
12
C912
SC10U6D3V5KX-1GP
C912
SC10U6D3V5KX-1GP
12
R907
100R2F-L1-GP-U
R907
100R2F-L1-GP-U
12
C919
SC10U6D3V5KX-1GP
C919
SC10U6D3V5KX-1GP
12
C909
SC10U6D3V5KX-1GP
DY
C909
SC10U6D3V5KX-1GP
DY
12
C911
SC10U6D3V5KX-1GP
C911
SC10U6D3V5KX-1GP
12
C908
SC10U6D3V5KX-1GP
C908
SC10U6D3V5KX-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VSS)
A3
10 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VSS)
A3
10 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CPU (VSS)
A3
10 103Friday, January 06, 2012
<Core Design>
SSID = CPU
VSS
T35
VSS
T34
VSS
T33
VSS
T32
VSS
T31
VSS
T30
VSS
T29
VSS
T28
VSS
T27
VSS
T26
VSS
P9
VSS
P8
VSS
P6
VSS
P5
VSS
P3
VSS
P2
VSS
N35
VSS
N34
VSS
N33
VSS
N32
VSS
N31
VSS
N30
VSS
N29
VSS
N28
VSS
N27
VSS
N26
VSS
M34
VSS
L33
VSS
L30
VSS
L27
VSS
L9
VSS
L8
VSS
L6
VSS
L5
VSS
L4
VSS
L3
VSS
L2
VSS
L1
VSS
K35
VSS
K32
VSS
K29
VSS
K26
VSS
J34
VSS
J31
VSS
H33
VSS
H30
VSS
H27
VSS
H24
VSS
H21
VSS
H18
VSS
H15
VSS
H13
VSS
H10
VSS
H9
VSS
H8
VSS
H7
VSS
H6
VSS
H5
VSS
H4
VSS
H3
VSS
H2
VSS
H1
VSS
G35
VSS
G32
VSS
G29
VSS
G26
VSS
G23
VSS
G20
VSS
G17
VSS
G11
VSS
F34
VSS
F31
VSS
F29
VSS F22
VSS F19
VSS E30
VSS E27
VSS E24
VSS E21
VSS E18
VSS E15
VSS E13
VSS E10
VSS E9
VSS E8
VSS E7
VSS E6
VSS E5
VSS E4
VSS E3
VSS E2
VSS E1
VSS D35
VSS D32
VSS D29
VSS D26
VSS D20
VSS D17
VSS C34
VSS C31
VSS C28
VSS C27
VSS C25
VSS C23
VSS C10
VSS C1
VSS B22
VSS B19
VSS B17
VSS B15
VSS B13
VSS B11
VSS B9
VSS B8
VSS B7
VSS B5
VSS B3
VSS B2
VSS A35
VSS A32
VSS A29
VSS A26
VSS A23
VSS A20
VSS A3
VSS
9 OF 9
SANDY
CPU1I
SANDY
62.10055.421
2nd = 62.10040.771
VSS
9 OF 9
SANDY
CPU1I
SANDY
62.10055.421
2nd = 62.10040.771
VSS
AT35
VSS
AT32
VSS
AT29
VSS
AT27
VSS
AT25
VSS
AT22
VSS
AT19
VSS
AT16
VSS
AT13
VSS
AT10
VSS
AT7
VSS
AT4
VSS
AT3
VSS
AR25
VSS
AR22
VSS
AR19
VSS
AR16
VSS
AR13
VSS
AR10
VSS
AR7
VSS
AR4
VSS
AR2
VSS
AP34
VSS
AP31
VSS
AP28
VSS
AP25
VSS
AP22
VSS
AP19
VSS
AP16
VSS
AP13
VSS
AP10
VSS
AP7
VSS
AP4
VSS
AP1
VSS
AN30
VSS
AN27
VSS
AN25
VSS
AN22
VSS
AN19
VSS
AN16
VSS
AN13
VSS
AN10
VSS
AN7
VSS
AN4
VSS
AM29
VSS
AM25
VSS
AM22
VSS
AM19
VSS
AM16
VSS
AM13
VSS
AM10
VSS
AM7
VSS
AM4
VSS
AM3
VSS
AM2
VSS
AM1
VSS
AL34
VSS
AL31
VSS
AL28
VSS
AL25
VSS
AL22
VSS
AL19
VSS
AL16
VSS
AL13
VSS
AL10
VSS
AL7
VSS
AL4
VSS
AL2
VSS
AK33
VSS
AK30
VSS
AK27
VSS
AK25
VSS
AK22
VSS
AK19
VSS
AK16
VSS
AK13
VSS
AK10
VSS
AK7
VSS
AK4
VSS
AJ25
VSS AJ22
VSS AJ19
VSS AJ16
VSS AJ13
VSS AJ10
VSS AJ7
VSS AJ4
VSS AJ3
VSS AJ2
VSS AJ1
VSS AH35
VSS AH34
VSS AH32
VSS AH30
VSS AH29
VSS AH28
VSS AH26
VSS AH25
VSS AH22
VSS AH19
VSS AH16
VSS AH7
VSS AH4
VSS AG9
VSS AG8
VSS AG4
VSS AF6
VSS AF5
VSS AF3
VSS AF2
VSS AE35
VSS AE34
VSS AE33
VSS AE32
VSS AE31
VSS AE30
VSS AE29
VSS AE28
VSS AE27
VSS AE26
VSS AE9
VSS AD7
VSS AC9
VSS AC8
VSS AC6
VSS AC5
VSS AC3
VSS AC2
VSS AB35
VSS AB34
VSS AB33
VSS AB32
VSS AB31
VSS AB30
VSS AB29
VSS AB28
VSS AB27
VSS AB26
VSS Y9
VSS Y8
VSS Y6
VSS Y5
VSS Y3
VSS Y2
VSS W35
VSS W34
VSS W33
VSS W32
VSS W31
VSS W30
VSS W29
VSS W28
VSS W27
VSS W26
VSS U9
VSS U8
VSS U6
VSS U5
VSS U3
VSS U2
VSS
8 OF 9
SANDY
CPU1H
SANDY
62.10055.421
2nd = 62.10040.771
VSS
8 OF 9
SANDY
CPU1H
SANDY
62.10055.421
2nd = 62.10040.771
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
11 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
11 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
11 103Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V_VREF_PATH1
+V_VREF_PATH2
+V_VREF_PATH3
DDR_WR_VREF01_D1DDR_WR_VREF01_B4
DDR_WR_VREF01_B4
DDR_WR_VREF01_D1
M_VREF_DQ_DIMM0
M_VREF_DQ_DIMM1
M_VREF_CA_DIMM0
M_VREF_CA_DIMM1
DDR_VREF_S3DDR_VREF_S3
DDR_VREF_S3 DDR_VREF_S3
DDR_WR_VREF017
DRAMRST_CNTRL_PCH20,37
DDR_WR_VREF027
DRAMRST_CNTRL_PCH20,37
+V_SM_VREF 37
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
M3
A3
12 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
M3
A3
12 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
M3
A3
12 103Friday, January 06, 2012
<Core Design>
SODDIM0
SODDIM1
VREF circuit -M1 (Voltage Driver Network) & M3 (Driven by Processor) Implementation
Driven by process (PIN#B4) Driven by process (PIN#D1)
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
CAD Note: All VREF traces should have 20:20 mil trace geometry. Note that while 20 mil trace width is optimal, short violations is acceptable if
required due to tight routing constraints.
CLOSE PIN1
CLOSE PIN CLOSE PIN
CLOSE PIN
12
R1209
0R2J-2-GP
DY
R1209
0R2J-2-GP
DY
G
S
D
U1201
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
U1201
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
1 2
R1232
0R0402-PAD
R1232
0R0402-PAD
12
R1217
0R0402-PAD
R1217
0R0402-PAD
1 2
R1207
0R0402-PAD
R1207
0R0402-PAD
12
R1204
0R0402-PAD
R1204
0R0402-PAD
12
R1225
0R2J-2-GP
DY
R1225
0R2J-2-GP
DY
G
S
D
U1202
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
U1202
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
12
C1203
SCD1U10V2KX-4GP
C1203
SCD1U10V2KX-4GP
12
R1221
0R0402-PAD
R1221
0R0402-PAD
12
R1227
1KR2F-3-GP
DY
R1227
1KR2F-3-GP
DY
1 2
R1226 0R2J-2-GP
DY
R1226 0R2J-2-GP
DY
12
C1202
SCD1U10V2KX-4GP
C1202
SCD1U10V2KX-4GP
1 2
R1216
0R2J-2-GP
DY
R1216
0R2J-2-GP
DY
1 2
R1219
0R2J-2-GP
DY
R1219
0R2J-2-GP
DY
12
R1210
0R0402-PAD
R1210
0R0402-PAD
1 2
R1203
0R0402-PAD
R1203
0R0402-PAD
12
C1204
SCD1U10V2KX-4GP
C1204
SCD1U10V2KX-4GP
1 2
R1208 0R2J-2-GP
DY
R1208 0R2J-2-GP
DY
1 2
R1222
0R0402-PAD
R1222
0R0402-PAD
12
R1228
1KR2F-3-GP
DY
R1228
1KR2F-3-GP
DY
12
C1201
SCD1U10V2KX-4GP
C1201
SCD1U10V2KX-4GP
12
R1218
0R0402-PAD
R1218
0R0402-PAD
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
13 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
13 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
13 103Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_A1
M_A_DQS#0
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQS3
M_A_DQ0
M_A_DQS#5
M_A_A2
SA0_DIM0
SA0_DIM0
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQS4
M_A_A3
M_A_DQS#6
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
SA1_DIM0
M_A_DQ1
M_A_A4
M_A_DQS5
M_A_DQS#7
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQS#1
M_A_A5
M_A_DQ2
SA1_DIM0
M_A_DQS6
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQS0
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A6
M_A_DQ3
M_A_DQS#2
M_A_DQS7
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQS1
M_A_A13
M_A_A14
M_A_A15
M_A_A12
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQS#3
M_A_A0
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ8
TS#_DIMM0_1
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQS2
M_A_DQS#4
1D5V_S3
1D5V_S3
3D3V_S0
0D75V_S0
0D75V_S0
3D3V_S0
M_VREF_CA_DIMM0
M_VREF_DQ_DIMM0
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6
M_A_DIM0_CS#0 6
M_A_DIM0_CS#1 6
M_A_DIM0_CKE0 6
M_A_DIM0_CKE1 6
M_A_DIM0_CLK_DDR0 6
M_A_DIM0_CLK_DDR#0 6
M_A_DIM0_CLK_DDR1 6
M_A_DIM0_CLK_DDR#1 6
PCH_SMBDATA 15,20,65,66
PCH_SMBCLK 15,20,65,66
TS#_DIMM0_1 15
M_A_DQ[63:0]6
M_A_BS26
M_A_BS06 M_A_BS16
M_A_DQS#[7:0] 6
M_A_DQS[7:0] 6
M_A_DIM0_ODT06 M_A_DIM0_ODT16
DDR3_DRAMRST#15,37
M_A_A[15:0] 6
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM1
A2
14 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM1
A2
14 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM1
A2
14 103
Friday, January 06, 2012
<Core Design>
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
SSID = MEMORY
Thermal EVENT
Place these caps
close to VTT1 and
VTT2.
SODIMM A DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMB.
0511-CHECK
(H=8mm)
12
C1419
SC1U6D3V2KX-GP
C1419
SC1U6D3V2KX-GP
12
C1405
SC10U10V5ZY-1GP
DY
C1405
SC10U10V5ZY-1GP
DY
12
C1408
SC10U10V5ZY-1GP
DY
C1408
SC10U10V5ZY-1GP
DY
NP1 NP1
NP2 NP2
RAS# 110
WE# 113
CAS# 115
CS0# 114
CS1# 121
CKE0 73
CKE1 74
CK0 101
CK0# 103
CK1 102
CK1# 104
DM0 11
DM1 28
DM2 46
DM3 63
DM4 136
DM5 153
DM6 170
DM7 187
SDA 200
SCL 202
EVENT# 198
VDDSPD 199
SA0 197
SA1 201
NC#77 77
NC#122 122
NC#125/TEST 125
VDD 75
VDD 76
VDD 81
VDD 82
VDD 87
VDD 88
VDD 93
VDD 94
VDD 99
VDD 100
VDD 105
VDD 106
VDD 111
VDD 112
VDD 117
VDD 118
VDD 123
VDD 124
VSS 2
VSS 3
VSS 8
VSS 9
VSS 13
VSS 14
VSS 19
VSS 20
VSS 25
VSS 26
VSS 31
VSS 32
VSS 37
VSS 38
VSS 43
VSS 44
VSS 48
VSS 49
VSS 54
VSS 55
VSS 60
VSS 61
VSS 65
VSS 66
VSS 71
VSS 72
VSS 127
VSS 128
VSS 133
VSS 134
VSS 138
VSS 139
VSS 144
VSS 145
VSS 150
VSS 151
VSS 155
VSS 156
VSS 161
VSS 162
VSS 167
VSS 168
VSS 172
VSS 173
VSS 178
VSS 179
VSS 184
VSS 185
VSS 189
VSS 190
VSS 195
VSS 196
VSS 205
VSS 206
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_CA
126
VREF_DQ
1
RESET#
30
VTT1
203
VTT2
204
DIMM1
DDR3-204P-96-GP-U1
62.10017.V61
3RD = *62.10017.V61
2ND = *62.10017.X51
DIMM1
DDR3-204P-96-GP-U1
62.10017.V61
3RD = *62.10017.V61
2ND = *62.10017.X51
12
R1402
10KR2J-3-GP
R1402
10KR2J-3-GP
12
C1422
SC1U6D3V2KX-GP
DY
C1422
SC1U6D3V2KX-GP
DY
12
C1417
SCD1U10V2KX-5GP
C1417
SCD1U10V2KX-5GP
12
C1409
SC10U6D3V5KX-1GP
DY
C1409
SC10U6D3V5KX-1GP
DY
12
C1416
SCD1U10V2KX-5GP
C1416
SCD1U10V2KX-5GP
12
TC1401
ST330U2VDM-4-GP
DY
TC1401
ST330U2VDM-4-GP
DY
12
C1415
SCD1U10V2KX-5GP
C1415
SCD1U10V2KX-5GP
12
C1404
SC10U6D3V5KX-1GP
C1404
SC10U6D3V5KX-1GP
12
C1410
SC10U6D3V5KX-1GP
DY
C1410
SC10U6D3V5KX-1GP
DY
12
C1401
SCD1U10V2KX-5GP
C1401
SCD1U10V2KX-5GP
1 2
R1403
10KR2J-3-GP
R1403
10KR2J-3-GP
12
C1421
SC1U6D3V2KX-GP
C1421
SC1U6D3V2KX-GP
12
C1407
SC10U6D3V5KX-1GP
C1407
SC10U6D3V5KX-1GP
12
C1418
SC10U6D3V5KX-1GP
DY
C1418
SC10U6D3V5KX-1GP
DY
12
C1414
SCD1U10V2KX-5GP
C1414
SCD1U10V2KX-5GP
12
C1402
SC2D2U10V3KX-1GP
DY
C1402
SC2D2U10V3KX-1GP
DY
12
R1401
10KR2J-3-GP
R1401
10KR2J-3-GP
12
C1420
SC1U6D3V2KX-GP
DY
C1420
SC1U6D3V2KX-GP
DY
12
C1406
SC10U6D3V5KX-1GP
C1406
SC10U6D3V5KX-1GP
12
C1403
SC10U6D3V5KX-1GP
C1403
SC10U6D3V5KX-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_A1
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQS#0
M_B_DQ43
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ15
M_B_DQS3
M_B_DQ0
M_B_A2
M_B_DQS#5
SA0_DIM1
SA1_DIM1
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQS4
M_B_A3
M_B_DQS#6
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
SA1_DIM1
M_B_DQ1
M_B_A4
M_B_DQS5
M_B_DQS#7
M_B_DQ53
M_B_DQ52
M_B_DQ24
M_B_DQ55
M_B_DQ54
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQS#1
SA0_DIM1
M_B_DQ2
M_B_A5
M_B_DQS6
M_B_DQ57
M_B_DQ56
M_B_DQS0
M_B_DQ59
M_B_DQ58
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_A7
M_B_A6
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_DQ3
M_B_DQS#2
M_B_DQS7
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ33
M_B_DQ32
M_B_DQ35
M_B_DQ34
M_B_DQS1
M_B_A12
M_B_A15
M_B_A14
M_B_A13
M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ6
M_B_DQS#3
M_B_A0
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ8
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQS2
M_B_DQS#4
0D75V_S0
M_VREF_CA_DIMM1
M_VREF_DQ_DIMM1
3D3V_S0
1D5V_S3
3D3V_S0
1D5V_S3
0D75V_S0
M_B_A[15:0] 6
M_B_BS26
M_B_BS06 M_B_BS16
M_B_DQ[63:0]6
M_B_DQS#[7:0] 6
M_B_DQS[7:0] 6
M_B_DIM0_ODT06 M_B_DIM0_ODT16
DDR3_DRAMRST#14,37
M_B_CAS# 6
M_B_DIM0_CS#0 6
M_B_DIM0_CS#1 6
M_B_DIM0_CKE0 6
M_B_DIM0_CKE1 6
M_B_DIM0_CLK_DDR0 6
M_B_DIM0_CLK_DDR#0 6
M_B_DIM0_CLK_DDR1 6
M_B_DIM0_CLK_DDR#1 6
M_B_RAS# 6
M_B_WE# 6
PCH_SMBDATA 14,20,65,66
PCH_SMBCLK 14,20,65,66
TS#_DIMM0_1 14
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM2
A2
15 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM2
A2
15 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM2
A2
15 103
Friday, January 06, 2012
<Core Design>
SODIMM B DECOUPLING
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
SSID = MEMORY
Place these caps
close to VTT1 and
VTT2.
(H=4mm)
0511-CHECK
62.10017.X41
3RD:62.10017.V51
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS 2
NP1 NP1
NP2 NP2
RAS# 110
WE# 113
CAS# 115
CS0# 114
CS1# 121
CKE0 73
CKE1 74
CK0 101
CK0# 103
CK1 102
CK1# 104
DM0 11
DM1 28
DM2 46
DM3 63
DM4 136
DM5 153
DM6 170
DM7 187
SDA 200
SCL 202
VDDSPD 199
SA0 197
SA1 201
VREF_CA
126
VDD18 124
NC#1 77
NC#2 122
NC#/TEST 125
VDD3 81
VDD4 82
VDD5 87
VDD6 88
VDD7 93
VDD8 94
VDD9 99
VDD10 100
VDD13 111
VDD14 112
VDD15 117
VDD16 118
VSS 3
VSS 8
VSS 9
VSS 13
VSS 14
VSS 19
VSS 20
VSS 25
VSS 26
VSS 31
VSS 32
VSS 37
VSS 38
VSS 43
VSS 44
VSS 48
VSS 49
VSS 54
VSS 55
VSS 60
VSS 61
VDD1 75
VSS 65
VSS 66
VSS 71
VSS 72
VDD2 76
VDD11 105
VDD12 106
VDD17 123
VSS 127
VSS 128
VSS 134
VSS 133
VSS 138
VSS 139
VSS 144
VSS 145
VSS 151
VSS 150
VSS 155
VSS 156
VSS 161
VSS 162
VSS 167
VSS 168
VSS 173
VSS 172
VSS 179
VSS 178
VSS 185
VSS 184
VSS 189
VSS 190
VSS 195
VSS 196
RESET#
30
EVENT# 198
VSS 205
VSS 206
VTT1
203
VTT2
204
DIMM2
DDR3-204P-144-GP-U1
62.10024.G21
3rd = *62.10017.V51
2nd = *62.10017.X41
DIMM2
DDR3-204P-144-GP-U1
62.10024.G21
3rd = *62.10017.V51
2nd = *62.10017.X41
12
C1512
SCD1U10V2KX-5GP
C1512
SCD1U10V2KX-5GP
12
C1514
SCD1U10V2KX-5GP
C1514
SCD1U10V2KX-5GP
12
C1504
SC10U10V5ZY-1GP
DY
C1504
SC10U10V5ZY-1GP
DY
12
C1520
SC1U6D3V2KX-GP
DY
C1520
SC1U6D3V2KX-GP
DY
12
C1505
SC10U6D3V5KX-1GP
C1505
SC10U6D3V5KX-1GP
12
C1508
SC10U10V5ZY-1GP
DY
C1508
SC10U10V5ZY-1GP
DY
12
C1506
SC10U6D3V5KX-1GP
C1506
SC10U6D3V5KX-1GP
12
R1502
10KR2J-3-GP
R1502
10KR2J-3-GP
12
C1511
SCD1U10V2KX-5GP
C1511
SCD1U10V2KX-5GP
12
C1518
SC1U6D3V2KX-GP
DY
C1518
SC1U6D3V2KX-GP
DY
12
C1507
SC10U6D3V5KX-1GP
C1507
SC10U6D3V5KX-1GP
12
C1519
SC1U6D3V2KX-GP
C1519
SC1U6D3V2KX-GP
12
C1501
SCD1U10V2KX-5GP
C1501
SCD1U10V2KX-5GP
12
C1513
SCD1U10V2KX-5GP
C1513
SCD1U10V2KX-5GP
12
C1510
SC10U6D3V5KX-1GP
DY
C1510
SC10U6D3V5KX-1GP
DY
12
C1503
SC10U10V5ZY-1GP
DY
C1503
SC10U10V5ZY-1GP
DY
12
R1501
10KR2J-3-GP
R1501
10KR2J-3-GP
12
C1502
SC2D2U10V3KX-1GP
DY
C1502
SC2D2U10V3KX-1GP
DY
12
C1521
SC1U6D3V2KX-GP
C1521
SC1U6D3V2KX-GP
12
C1509
SC10U6D3V5KX-1GP
C1509
SC10U6D3V5KX-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM2
A4
16 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM2
A4
16 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
DDR3-SODIMM2
A4
16 103
Friday, January 06, 2012
<Core Design>
BLANK
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CRT_BLUE
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_RED
LVDS_IBG
DAC_IREF_R
LVDS_VDD_EN LVDS_VREFH
LVDS_VREFL
L_CTRL_DATA
L_CTRL_DATA
L_CTRL_CLK
L_BKLT_EN
L_CTRL_CLK
CRT_GREEN
3D3V_S0
3D3V_S0
PCH_HDMI_CLK 51
PCH_HDMI_DATA 51
CRT_DDC_CLK50 CRT_DDC_DATA50
L_BKLT_EN49 LVDS_VDD_EN49
L_BKLT_CTRL49
LVDS_DDC_CLK_R49 LVDS_DDC_DATA_R49
LVDSA_CLK#49 LVDSA_CLK49
LVDSA_DATA0#49 LVDSA_DATA1#49 LVDSA_DATA2#49
LVDSA_DATA049 LVDSA_DATA149 LVDSA_DATA249
CRT_BLUE50 CRT_GREEN50 CRT_RED50
CRT_HSYNC50 CRT_VSYNC50
HDMI_DATA2_R# 51
HDMI_DATA2_R 51
HDMI_DATA1_R# 51
HDMI_DATA1_R 51
HDMI_DATA0_R# 51
HDMI_DATA0_R 51
HDMI_CLK_R# 51
HDMI_CLK_R 51
HDMI_PCH_DET 51
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : LVDS/CRT/DDI
A3
17 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : LVDS/CRT/DDI
A3
17 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : LVDS/CRT/DDI
A3
17 103Friday, January 06, 2012
<Core Design>
DDI Port B Detect:(SDVO_CTRL_ DATA)
1: Port B detected
0: Port B not detected
L_DDC_DATA(K47):
This signal is on the LVDS interface.
This signal needs to be left NC if eDP is
used for the local flat panel display
Close to PCH
Close to PCH
Notes:
1K 0.5% 0402
HDMI
0511-CHECK 0511-CHECK
DDPB_[0]P
DDPB_[0]N
DDPB_[1]P
DDPB_[1]N
DDPB_[2]P
DDPB_[2]N
DDPB_[3]P
DDPB_[3]N
DDPB_AUXP
DDPB_AUXN
DDPB_HPD
SDVO_CTRLCLK
SDVO_CTRLDATA
TMDSB_DATA2
TMDSB_DATA2#
TMDSB_DATA1
TMDSB_DATA1#
TMDSB_DATA0
TMDSB_DATA0#
TMDSB_CLK
TMDSB_CLK#
NA
NA
HDMIB_HPD
HDMIB_CTRLCLK
HDMIB_CTRLDATA
DDI PCH Pin
Names HDMI/DVI
Mapping
PORT
PORT-B
The recommended value for this external resistor is 1.0 k ±0.5%. The CRT DAC outputs may be
measured when the display is completely white. If CRT DAC signal voltage value is between 665
mV to 770 mV, then the video level is within VESA specification and the reference resistor
value is optimal for the motherboard design.
Close to PCH and keep 20mil
away from other signal.
12
EC1702
SCD1U50V3KX-GP
DY
EC1702
SCD1U50V3KX-GP
DY
12
EC1701
SCD1U50V3KX-GP
DY
EC1701
SCD1U50V3KX-GP
DY
1
2
3
4 5
6
7
8
RN1705
SRN150F-1-GP
RN1705
SRN150F-1-GP
12
R1702
1KR2D-1-GP
R1702
1KR2D-1-GP
12
EC1703
SCD1U50V3KX-GP
DY
EC1703
SCD1U50V3KX-GP
DY
1
2 3
4
RN1701
SRN2K2J-1-GP
RN1701
SRN2K2J-1-GP
12
R1701
2K37R2F-GP
R1701
2K37R2F-GP
1
2 3
4
RN1704
SRN0J-6-GP
RN1704
SRN0J-6-GP
1
2 3
4
RN1706
SRN2K2J-1-GP
RN1706
SRN2K2J-1-GP
L_BKLTCTL
P45
L_BKLTEN
J47
L_CTRL_CLK
T45
L_CTRL_DATA
P39
L_DDC_CLK
T40
L_DDC_DATA
K47
L_VDD_EN
M45
LVDSA_CLK#
AK39
LVDSA_CLK
AK40
LVDSA_DATA#0
AN48
LVDSA_DATA#1
AM47
LVDSA_DATA#2
AK47
LVDSA_DATA#3
AJ48
LVDSA_DATA0
AN47
LVDSA_DATA1
AM49
LVDSA_DATA2
AK49
LVDSA_DATA3
AJ47
LVDSB_CLK#
AF40
LVDSB_CLK
AF39
LVDSB_DATA#0
AH45
LVDSB_DATA#1
AH47
LVDSB_DATA#2
AF49
LVDSB_DATA#3
AF45
LVDSB_DATA0
AH43
DDPB_0N AV42
DDPB_1N AV45
LVD_VREFH
AE48
LVD_VREFL
AE47
DDPD_2N BF42
DDPD_3N BJ42
DDPB_2N AU48
DDPB_3N AV47
DDPC_0N AY47
DDPC_1N AY43
DDPC_2N BA47
DDPC_3N BB47
DDPD_0N BB43
DDPD_1N BF44
DDPB_0P AV40
DDPB_1P AV46
DDPD_2P BE42
DDPD_3P BG42
DDPB_2P AU47
DDPB_3P AV49
LVDSB_DATA1
AH49
LVDSB_DATA2
AF47
LVDSB_DATA3
AF43
LVD_IBG
AF37
LVD_VBG
AF36
DDPC_1P AY45
DDPC_0P AY49
DDPC_2P BA48
DDPC_3P BB49
DDPD_0P BB45
DDPD_1P BE44
CRT_BLUE
N48
CRT_DDC_CLK
T39
CRT_DDC_DATA
M40
CRT_GREEN
P49
CRT_HSYNC
M47
CRT_IRTN
T42
CRT_RED
T49
CRT_VSYNC
M49
DAC_IREF
T43
SDVO_CTRLCLK P38
SDVO_CTRLDATA M39
DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
DDPD_CTRLCLK M43
DDPD_CTRLDATA M36
DDPB_AUXN AT49
DDPC_AUXN AP47
DDPD_AUXN AT45
DDPB_AUXP AT47
DDPC_AUXP AP49
DDPD_AUXP AT43
DDPB_HPD AT40
DDPC_HPD AT38
DDPD_HPD BH41
SDVO_TVCLKINP AP45
SDVO_TVCLKINN AP43
SDVO_STALLP AM40
SDVO_STALLN AM42
SDVO_INTP AP40
SDVO_INTN AP39
LVDS
Digital Display Interface
CRT
4 OF 10
PCH1D
PANTHER-GP-NF
LVDS
Digital Display Interface
CRT
4 OF 10
PCH1D
PANTHER-GP-NF
1
2 3
4
RN1702
SRN100KJ-6-GP
RN1702
SRN100KJ-6-GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
DGPU_HOLD_RST#
INT_PIRQF#
INT_PIRQB#
BBS_BIT1
CLK_PCI_LPC_R
INT_PIRQF#
INT_PIRQH#
CLK_PCI_FB_R
CLK_PCI_KBC_R
BBS_BIT1
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
DGPU_PWM_SELECT#
PCI_PLTRST#
PCI_GNT3#
PCI_PME#
DGPU_PWR_EN#
USB_OC#8_9USB_OC#6_7
USB_RBIAS
USB_OC#12_13
USB_PP0
USB_PN0
USB_OC#10_11USB_OC#0_1PCI_PLTRST#
DGPU_HOLD_RST#
NV_ALE
PCI_GNT3#
USB_OC#4_5
USB_OC#2_3
INT_PIRQG#
LCD_DET#
INT_PIRQC#INT_PIRQA#
INT_PIRQD#
INT_PIRQG#
USB_OC#0_1
USB_OC#2_3
USB_OC#4_5
USB_OC#6_7
USB_OC#8_9
USB_OC#10_11
USB_OC#12_13
PCH_GPIO14
DGPU_SELECT#
INT_PIRQH#
DGPU_PWR_EN#
PCH_GPIO14
NV_RCOMP
DGPU_PWM_SELECT#
3D3V_S5
3D3V_S5
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
USB_PP8 66
USB_PN12 49
USB_PP12 49
USB_PP5 82
USB_PN5 82
USB_PN11 65
USB_PP11 65
USB_PN4 63
USB_PP4 63
USB_PN8 66
USB_PP1 62
USB_PN1 62
USB_PP10 64
USB_PN10 64
USB_PP9 82
USB_PN9 82
USB_PN2 82
USB_PP2 82
USB3_RX1_N62
USB3_RX1_P62
DGPU_HOLD_RST#83
DGPU_PWR_EN#93
CLK_PCI_LPC65,71 CLK_PCI_FB20 CLK_PCI_KBC27
PLT_RST#5,27,31,36,65,66,71,80,82,83,97
SATA_ODD_DA#27,56
USB3_TX1_N62
USB3_TX1_P62
USB_OC#0_1 62
USB_OC#2_3 61
BBS_BIT0 21
USB_OC#4_5 62
USB_PN3 62
USB_PP3 62
USB3_RX3_N62
USB3_RX3_P62
USB3_TX3_N62
USB3_TX3_P62
USB_OC#8_9 82
LCD_DET#49
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : PCI/USB/NVRAM/RSVD
A2
18 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : PCI/USB/NVRAM/RSVD
A2
18 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : PCI/USB/NVRAM/RSVD
A2
18 103Friday, January 06, 2012
<Core Design>
Reserved 01
11
BOOT BIOS Strap
GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19
0 1 Reserved
SPI(Default)
SSID = PCH
0 0 LPC
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
Utilize Port 9 for USB debug
OC[3:0]# for Device 29 (Ports 0-7)
OC[7:4]# for Device 26 (Ports 8-13)
For PPT USB3.0 feature
USB 2.0 Overcurrent Pin Default Usage
OC0#
OC1#
OC2#
OC3#
Pin
Port 0, Port 1
Port 2, Port 3
Port 4, Port 5
Port 6, Port 7
Default Port
Mapping
OC4#
OC5#
OC6#
OC7#
Pin
Port 8, Port 9
Port 10, Port 11
Port 12, Port 13
Not Used
Default Port
Mapping
Reserve Buffer or not?
Gx8 USB Table
13
12
X
Mini Card1 (WLAN)
USB2.0, ext port4
X
X
USB2.0, ext. port 3
10
0
11
USB3.0, ext port1
Pair
4
5
2
3
1
Device
6
7
8
9
USB3.0, ext port2
CARD READER
Finger Print
CAMERA
Bluetooth
X
3G
USB3.0 ext port 2
USB3.0 ext port 1
USB2.0 ext port 4
Mini Card2 (WWAN)
CARD READER
CAMERA
Mini Card1 (WLAN)
USB2.0 ext port 3
Fingerprint
BLUETOOTH
1
2
3
4
5 6
7
8
9
10
RN1801
SRN8K2J-2-GP-U
RN1801
SRN8K2J-2-GP-U
1
TP1812TP1812
12
R1801
4K7R2J-2-GP
DY
R1801
4K7R2J-2-GP
DY
1 2
R1819 10KR2J-3-GPR1819 10KR2J-3-GP
1 2
R1818
8K2R2J-3-GP
DY
R1818
8K2R2J-3-GP
DY
1 2
R1811
22D6R2F-L1-GP
R1811
22D6R2F-L1-GP
1
TP1813TP1813
12
R1816
100KR2J-1-GP
DY
R1816
100KR2J-1-GP
DY
1
TP1814TP1814
1
TP1819TP1819
1 2
R1807
0R2J-2-GP
R1807
0R2J-2-GP
1
TP1820TP1820
1 2
R1814
10KR2F-2-GP
DY
R1814
10KR2F-2-GP
DY
RSVD23 AV5
RSVD1 AY7
RSVD2 AV7
RSVD3 AU3
RSVD4 BG4
RSVD5 AT10
RSVD6 BC8
RSVD7 AU2
RSVD8 AT4
RSVD17 BB5
RSVD18 BB3
RSVD19 BB7
RSVD20 BE8
RSVD21 BD4
RSVD22 BF6
RSVD9 AT3
RSVD10 AT1
RSVD11 AY3
RSVD12 AT5
RSVD13 AV3
RSVD14 AV1
RSVD15 BB1
RSVD16 BA3
RSVD25 AT8
RSVD24 AV10
RSVD26 AY5
RSVD27 BA2
RSVD28 AT12
RSVD29 BF3
PIRQA#
K40
PIRQB#
K38
PIRQC#
H38
PIRQD#
G38
REQ1#/GPIO50
C46
REQ2#/GPIO52
C44
REQ3#/GPIO54
E40
GNT1#/GPIO51
D47
GNT2#/GPIO53
E42
GNT3#/GPIO55
F46
PIRQE#/GPIO2
G42
PIRQF#/GPIO3
G40
PIRQG#/GPIO4
C42
PIRQH#/GPIO5
D44
USBP0N C24
USBP0P A24
USBP1N C25
USBP1P B25
USBP2N C26
USBP2P A26
USBP3N K28
USBP3P H28
USBP4N E28
USBP4P D28
USBP5N C28
USBP5P A28
USBP6N C29
USBP6P B29
USBP7N N28
USBP7P M28
USBP8N L30
USBP8P K30
USBP9N G30
USBP9P E30
USBP10N C30
USBP10P A30
USBP11N L32
USBP11P K32
USBP12N G32
USBP12P E32
USBP13N C32
USBP13P A32
PME#
K10
CLKOUT_PCI0
H49
CLKOUT_PCI1
H43
CLKOUT_PCI2
J48
USBRBIAS# C33
USBRBIAS B33
OC0#/GPIO59 A14
OC1#/GPIO40 K20
OC2#/GPIO41 B17
OC3#/GPIO42 C16
OC4#/GPIO43 L16
OC5#/GPIO9 A16
OC6#/GPIO10 D14
OC7#/GPIO14 C14
CLKOUT_PCI4
H40 CLKOUT_PCI3
K42
PLTRST#
C6
TP1
BG26
TP2
BJ26
TP3
BH25
TP6
AH38
TP7
AH37
TP8
AK43
TP9
AK45
TP16
Y13
TP17
K24
TP18
L24
TP19
AB46
TP20
AB45
TP21
B21
TP22
M20
TP23
AY16
USB3RN1
BE28
USB3RN2
BC30
USB3RN3
BE32
USB3RN4
BJ32
USB3RP1
BC28
USB3RP2
BE30
USB3RP3
BF32
USB3RP4
BG32
USB3TN1
AV26
USB3TN2
BB26
USB3TN3
AU28
USB3TN4
AY30
USB3TP1
AU26
USB3TP2
AY26
USB3TP3
AV28
USB3TP4
AW30
TP4
BJ16
TP5
BG16
TP15
AM5 TP14
AM4 TP13
AH12 TP12
H3 TP11
N30 TP10
C18
TP24
BG46
RSVD
PCI
USB
5 OF 10
PCH1E
PANTHER-GP-NF
RSVD
PCI
USB
5 OF 10
PCH1E
PANTHER-GP-NF
12
C1801
SC220P50V2KX-3GP
DY
C1801
SC220P50V2KX-3GP
DY
1 2
R1815
10KR2F-2-GP
R1815
10KR2F-2-GP
1 2
R1806 22R2J-2-GPR1806 22R2J-2-GP
1 2
R1803
1KR2J-1-GP
DY
R1803
1KR2J-1-GP
DY
1 2
R1802
1KR2J-1-GP
DY
R1802
1KR2J-1-GP
DY
1 2
R1813
0R2J-2-GP
R1813
0R2J-2-GP
1 2
R1805 22R2J-2-GPR1805 22R2J-2-GP
1 2
R1817
8K2R2J-3-GP
DY
R1817
8K2R2J-3-GP
DY
1 2
R1804 22R2J-2-GPR1804 22R2J-2-GP
1
TP1805TP1805
1
2
3
4
5 6
7
8
9
10
RN1802
SRN8K2J-2-GP-U
RN1802
SRN8K2J-2-GP-U
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
BATLOW#
PM_CLKRUN#
PM_PWRBTN#
SUS_PWR_ACK
DSW ODVREN
PM_SUS_STAT#
SUS_CLK
DSW ODVREN PM_RSMRST#
PCH_DPW ROK
PM_RI#
PM_PWRBTN#
RBIAS_CPY
SUSACK#SUS_PWR_ACK
PWROK
DMI_COMP_R
PWROK
SYS_PWROK
MEPWROK
BATLOW#
PM_RI#
AC_PRESENT
PM_RSMRST#
PCIE_WAKE#
SYS_RESET#
PM_RSMRST#
3V_5V_POK_#
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXP1
DMI_RXP2
DMI_RXP0
DMI_TXN1
DMI_TXN0
DMI_TXN3
DMI_TXN2
DMI_TXP1
DMI_TXP0
DMI_TXP3
DMI_TXP2
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXP3
FDI_TXP0
FDI_TXP5
FDI_TXP4
FDI_TXP6
FDI_TXP1
FDI_TXP2
PM_RSMRST#
DMI_RXN3
DMI_RXP3
FDI_TXP7
FDI_TXN7
PM_SLP_LAN#
PM_SLP_SUS#
PM_SLP_S5#
SUS_PWR_ACK
SYS_RESET#
RTC_AUX_S5
3D3V_S5
3D3V_S0
RTC_AUX_S5
1D05V_VTT
3D3V_AUX_S5
3D3V_S0
H_PM_SYNC 5
PM_CLKRUN# 27
DMI_RXN[3:0]4
DMI_RXP[3:0]4
DMI_TXN[3:0]4
DMI_TXP[3:0]4
XDP_DBRESET#5
SYS_PWROK36
S0_PWR_GOOD27
PM_PWRBTN#27,97
AC_PRESENT27
PM_DRAM_PW RGD37
FDI_TXN[7:0] 4
FDI_TXP[7:0] 4
FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
PCH_SUSCLK_KBC 27
PM_SLP_S3# 27,36,37,47
PM_SLP_S4# 27,46,97
PCIE_WAKE# 31,65,66
RSMRST#_KBC 27
3V_5V_POK 41
PM_SLP_A# 27,45
MPWROK45
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : DMI/FDI/PM
A2
19 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : DMI/FDI/PM
A2
19 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : DMI/FDI/PM
A2
19 103Friday, January 06, 2012
<Core Design>
Signal Routing Guideline:
DMI_ZCOMP keep W=4 mils and
routing length less than 500
mils.
DMI_IRCOMP keep W=4 mils and
routing length less than 500
mils.
PCH_WAKE#
CRB : 1K
CHKLIST: 10K
DSWODVREN - On Die DSW VR Enable
HIGH Enabled (DEFAULT)
LOW Disabled
SSID = PCH
For platforms not supporting Deep S4/S5
1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
2.DPWROK and RSMRST# will rise at the same time (connected on board)
3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms
Platforms supporting Deep S4/S5, but not wishing
to participate in the handshake during wake and Deep S4/S5
entry may tie SUSACK# to SUSWARN#.
For platforms supporting DEEP S4/S5 state, a low on this
signal indicates that PCH is in Deep Sleep state and that
EC/platform logic does not need to keep the Suspend Rails
ON.
If high means EC must keep SUS rails ON.
If DEEP S4/S5 is not supported, then this pin can be left
unconnected.
This signal is used to control power planes to the IntelR ME
sub-system. This signal will be asserted in M-off state. If M3
is not supported then SLP_A# will have the same timings as
SLP_S3#.
Active Sleep Well
(ASW) Power OK
PWROK: it indicates to PCH that
its CORE well power is stable.
SYS_PWROK: the system is ready to start the exit from
reset (de-asserts PLT_RST# to the processor)
SUS_ACK#: For non-DWS platforms, this signal can be left unconnected.
Due to the internal pull-up on this signal it will be pulled high
in order for the boot sequence to proceed.
SUSPWRDNACK : No longer requires a 10-K pull-up to VccSUS
(3.3 V).
1 2
R1930 0R2J-2-GP
Non-SBA
R1930 0R2J-2-GP
Non-SBA
1 2
R1905
10KR2J-3-GP
DY
R1905
10KR2J-3-GP
DY
1 2
R1923 0R2J-2-GP
DY
R1923 0R2J-2-GP
DY
12
R1909 10KR2J-3-GPR1909 10KR2J-3-GP
1
TP1905TP1905
1 2
R1921
1KR2J-1-GP
R1921
1KR2J-1-GP
12
R1922 10KR2J-3-GP
DY
R1922 10KR2J-3-GP
DY
12
R1925 100KR2J-1-GPR1925 100KR2J-1-GP
1
TP1901TP1901
1
2
3
45
6
7
8
RN1901
SRN10KJ-6-GP
RN1901
SRN10KJ-6-GP
12
R1908
10KR2J-3-GP
R1908
10KR2J-3-GP
1 2
R1901
49D9R2F-GP
R1901
49D9R2F-GP
1 2
R1911
10KR2J-3-GP
DY
R1911
10KR2J-3-GP
DY
1 2
R1918 330KR2J-L1-GP
DY
R1918 330KR2J-L1-GP
DY
1 2
R1904 100KR2J-1-GPR1904 100KR2J-1-GP
1 2
R1914 0R0402-PADR1914 0R0402-PAD
1 2
R1992 0R0402-PADR1992 0R0402-PAD
1 2
R1919 8K2R2J-3-GPR1919 8K2R2J-3-GP
1 2
R1916 0R0402-PADR1916 0R0402-PAD
1 2
R1931 0R2J-2-GP
SBA
R1931 0R2J-2-GP
SBA
1 2
R1926 10KR2J-3-GP
DY
R1926 10KR2J-3-GP
DY
1
TP1904TP1904
1
TP1902TP1902
1
2
34
5
6
Q1901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q1901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1 2
R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP
1 2
R1915 0R2J-2-GP
DY
R1915 0R2J-2-GP
DY
1 2
R1924
10KR2J-3-GP
R1924
10KR2J-3-GP
1 2
R1913
0R0402-PAD
R1913
0R0402-PAD
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0 BJ14
FDI_RXN1 AY14
FDI_RXN2 BE14
FDI_RXN3 BH13
FDI_RXN4 BC12
FDI_RXN5 BJ12
FDI_RXN6 BG10
FDI_RXN7 BG9
FDI_RXP0 BG14
FDI_RXP1 BB14
FDI_RXP2 BF14
FDI_RXP3 BG13
FDI_RXP4 BE12
FDI_RXP5 BG12
FDI_RXP6 BJ10
FDI_RXP7 BH9
FDI_FSYNC0 AV12
FDI_FSYNC1 BC10
FDI_LSYNC0 AV14
FDI_LSYNC1 BB10
FDI_INT AW16
PMSYNCH AP14
SLP_SUS# G16
SLP_S3# F4
SLP_S4# H4
SLP_S5#/GPIO63 D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE# B9
SUS_STAT#/GPIO61 G8
SUSCLK/GPIO62 N14
ACPRESENT/GPIO31
H20
BATLOW#/GPIO72
E10
PWROK
L22
CLKRUN#/GPIO32 N3
SUSWARN#/SUSPWRDNACK/GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN#/GPIO29 K14
APWROK
L10
DPWROK E22
DMI2RBIAS
BH21
SLP_A# G10
DSWVRMEN A18
SUSACK#
C12
DMI
FDI
System Power Management
3 OF 10
PCH1C
PANTHER-GP-NF
DMI
FDI
System Power Management
3 OF 10
PCH1C
PANTHER-GP-NF
1 2
R1902
750R2F-GP
R1902
750R2F-GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CLK_BUF_EXP_N
CLK_BUF_EXP_P
EC_SWI#
DGPU_PRSNT#
JTAG_TCK
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
XTAL25_IN
PCIE_CLK_RQ6#
CLK_BUF_EXP_N
CLK_BUF_EXP_P
SMB_CLK
XTAL25_OUT
CLK_BUF_CKSSCD_P
XTAL25_IN
XTAL25_OUT
CLK_PCI_FB
EC_SW I#
PCH_GPIO74
PCIE_CLK_CR_REQ#
PEG_B_CLKRQ#
PCIE_CLK_RQ4#
PCIE_CLK_RQ0#
PCIE_CLK_CR_REQ#
DRAMRST_CNTRL_PCH
PCIE_CLK_RQ6#
PEG_B_CLKRQ#
CLK_27M_VGA_R
PCIE_CLK_XDP_P
PCIE_CLK_XDP_N
CLK_BUF_REF14
SML1_CLK
PEG_CLKREQ#_R
SML1_DATA
PCH_GPIO74
DRAMRST_CNTRL_PCH
SMB_DATA
XCLK_RCOMP
CLK_BUF_REF14
SML0_DATA
SML0_CLK
CL_CLK
CL_DATA
CL_RST#
SMB_DATA
SML0_CLK
PCIE_TXP4_C
PCIE_TXN4_C
SML1_DATA
SML1_CLK
CLK_BUF_DOT96_P
CLK_BUF_DOT96_N
CLK_BUF_CKSSCD_N
SMB_CLK
PEG_CLKREQ#_R
SML0_DATA
CLK_PCIE_NEW _REQ#
SMB_CLK
SMB_DATA
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
DGPU_PRSNT#
PCIE_CLK_LAN_REQ#
CLK_DP_N
CLK_DP_P
PCIE_CLK_RQ4#
PCIE_TXN2_C
PCIE_TXP2_C
PCIE_CLK_RQ5#
PCIE_CLK_LAN_REQ#
PCIE_CLK_WLAN_REQ#
PCIE_CLK_RQ0#
CLK_PCH_SRC1_P
CLK_PCH_SRC1_N
CLK_PCH_SRC3_P
CLK_PCH_SRC3_N
PCIE_CLK_WLAN_REQ#
PCIE_CLK_RQ5#
CLK_PCIE_NEW _REQ#
PCIE_CLK_WLAN_REQ#PCIE_CLK_LAN_REQ#
CLK_PCH_48M_L
3D3V_S0
3D3V_S5
3D3V_S0 3D3V_S0
3D3V_S5
3D3V_S0
3D3V_S5
+VCCDIFFCLKN
PCH_SMBDATA 14,15,65,66
PCH_SMBCLK 14,15,65,66
SML1_DATA 27
SML1_CLK 27
PCIE_TXN265 PCIE_TXP265
PCIE_RXN265 PCIE_RXP265
DRAMRST_CNTRL_PCH 12,37
CLK_PCIE_VGA# 83
CLK_PCIE_VGA 83
CLK_EXP_N 5
CLK_EXP_P 5
CLK_PCH_48M 82
SBA_Support# 22
PEG_CLKREQ# 83
CLK_PCI_FB 18
CLK_PCIE_WLAN#65 CLK_PCIE_WLAN65
CLK_PCIE_LAN#31 CLK_PCIE_LAN31
PCIE_CLK_WLAN_REQ#65
PCIE_CLK_LAN_REQ#31
PCIE_TXN431 PCIE_TXP431
PCIE_RXN431 PCIE_RXP431
SMB_CLK 80
SMB_DATA 80
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : PCIE/SMBUS/CLK
A2
20 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : PCIE/SMBUS/CLK
A2
20 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : PCIE/SMBUS/CLK
A2
20 103Friday, January 06, 2012
<Core Design>
If PCIE port 1 is disabled, it will
cause all PCIE port disabled
LAN CLK
UMA_DISCRETE#
UMA: 1 1
DIS :0 1
SG(PX) : 0 0
Optimus(Muxless) : 1 0
SSID = PCH
WLAN CLK
– Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3
– Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2
if more than 2 PCI clocks + PCI loopback are routed.
PCIECLKRQ1# and PCIECLKRQ2#
Support S0 power only
Card Reader
WWAN
WLAN
PL 10K FOR Integrated CLOCK GEN mode.
LAN
0511-CHECK
0511-CHECK
serial 0ohm RN?
12
C2008
SC15P50V2JN-2-GP
C2008
SC15P50V2JN-2-GP
1 2
C2016 SCD1U10V2KX-5GPC2016 SCD1U10V2KX-5GP
1
TP2007TP2007
1
2 3
4
RN2012 SRN0J-6-GPRN2012 SRN0J-6-GP
12
R2013
10KR2J-3-GP
UMA
R2013
10KR2J-3-GP
UMA
1
TP2004TP2004
41
2 3
X2001
XTAL-25MHZ-155-GP
82.30020.D41
2nd = 82.30020.G71
3rd = 82.30020.G61
X2001
XTAL-25MHZ-155-GP
82.30020.D41
2nd = 82.30020.G71
3rd = 82.30020.G61
PERN1
BG34
PERP1
BJ34
PERN2
BE34
PERP2
BF34
PERN3
BG36
PERP3
BJ36
PERN4
BF36
PERP4
BE36
PERN5
BG37
PERP5
BH37
PERN6
BJ38
PERP6
BG38
PERN7
BG40
PERP7
BJ40
PERN8
BE38
PERP8
BC38
PETN1
AV32
PETP1
AU32
PETN2
BB32
PETP2
AY32
PETN3
AV34
PETP3
AU34
PETN4
AY34
PETP4
BB34
PETN5
AY36
PETP5
BB36
PETN6
AU36
PETP6
AV36
PETN7
AY40
PETP7
BB40
PETN8
AW38
PETP8
AY38
CLKOUT_PCIE0N
Y40
CLKOUT_PCIE0P
Y39
CLKOUT_PCIE1N
AB49
CLKOUT_PCIE1P
AB47
CLKOUT_PCIE2N
AA48
CLKOUT_PCIE2P
AA47
CLKOUT_PCIE3N
Y37
CLKOUT_PCIE3P
Y36
CLKOUT_PCIE4N
Y43
CLKOUT_PCIE4P
Y45
CLKOUT_PCIE5N
V45
CLKOUT_PCIE5P
V46
CLKIN_GND1_N BJ30
CLKIN_GND1_P BG30
CLKIN_DMI_N BF18
CLKIN_DMI_P BE18
CLKIN_DOT_96N G24
CLKIN_DOT_96P E24
CLKIN_SATA_N AK7
CLKIN_SATA_P AK5
XTAL25_IN V47
XTAL25_OUT V49
REFCLK14IN K45
CLKIN_PCILOOPBACK H45
CLKOUT_PEG_A_N AB37
CLKOUT_PEG_A_P AB38
PEG_A_CLKRQ#/GPIO47 M10
PCIECLKRQ0#/GPIO73
J2
PCIECLKRQ1#/GPIO18
M1
PCIECLKRQ2#/GPIO20
V10
PCIECLKRQ3#/GPIO25
A8
PCIECLKRQ4#/GPIO26
L12
PCIECLKRQ5#/GPIO44
L14
CLKOUTFLEX0/GPIO64 K43
CLKOUTFLEX1/GPIO65 F47
CLKOUTFLEX2/GPIO66 H47
CLKOUTFLEX3/GPIO67 K49
CLKOUT_DMI_N AV22
CLKOUT_DMI_P AU22
PEG_B_CLKRQ#/GPIO56
E6
CLKOUT_PEG_B_P
AB40 CLKOUT_PEG_B_N
AB42
XCLK_RCOMP Y47
CLKOUT_DP_P AM13
CLKOUT_DP_N AM12
CLKOUT_PCIE6N
V40
CLKOUT_PCIE6P
V42
PCIECLKRQ7#/GPIO46
K12
CLKOUT_PCIE7N
V38
CLKOUT_PCIE7P
V37
CLKOUT_ITPXDP_N
AK14
CLKOUT_ITPXDP_P
AK13
SMBALERT#/GPIO11 E12
SMBCLK H14
SMBDATA C9
SML0ALERT#/GPIO60 A12
SML0CLK C8
SML0DATA G12
SML1ALERT#/PCHHOT#/GPIO74 C13
SML1CLK/GPIO58 E14
SML1DATA/GPIO75 M16
CL_CLK1 M7
CL_DATA1 T11
CL_RST1# P10
PCIECLKRQ6#/GPIO45
T13
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
2 OF 10
PCH1B
PANTHER-GP-NF
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
2 OF 10
PCH1B
PANTHER-GP-NF
1
2 3
4
RN2016 SRN0J-6-GPRN2016 SRN0J-6-GP
1 2
R2016 22R2J-2-GP
DY
R2016 22R2J-2-GP
DY
1 2
C2015 SCD1U10V2KX-5GPC2015 SCD1U10V2KX-5GP
12
R2004
10KR2J-3-GP
R2004
10KR2J-3-GP
1 2
R2006
1M1R2J-GP
R2006
1M1R2J-GP
1
TP2011TP2011
12
R2011
10KR2J-3-GP
OPS
R2011
10KR2J-3-GP
OPS
1 2
R2007
90D9R2F-1-GP
R2007
90D9R2F-1-GP
1
2
34
5
6
Q2001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q2001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1
TP2005TP2005
1 2
C2006 SCD1U10V2KX-5GPC2006 SCD1U10V2KX-5GP
1
TP2002TP2002
1
2
3
4 5
6
7
8
RN2002
SRN10KJ-6-GP
RN2002
SRN10KJ-6-GP
12
R2005
10KR2J-3-GP
DY
R2005
10KR2J-3-GP
DY
1
2 3
4
RN2018
SRN10KJ-5-GP
RN2018
SRN10KJ-5-GP
1
TP2010TP2010
12
EC2002
SCD1U16V2KX-3GP
DY
EC2002
SCD1U16V2KX-3GP
DY
1
2 3
4
RN2005
SRN2K2J-1-GP
RN2005
SRN2K2J-1-GP
1
2 3
4
RN2006
SRN10KJ-5-GP
RN2006
SRN10KJ-5-GP
1 2
C2005 SCD1U10V2KX-5GPC2005 SCD1U10V2KX-5GP
12
R2010
10KR2J-3-GP
SBA
R2010
10KR2J-3-GP
SBA
1 2
R2009
1KR2J-1-GP
R2009
1KR2J-1-GP
12
R2012
10KR2J-3-GP
Non-SBA
R2012
10KR2J-3-GP
Non-SBA
1
2 3
4
RN2019 SRN10KJ-5-GPRN2019 SRN10KJ-5-GP
12
EC2001
SCD1U16V2KX-3GP
DY
EC2001
SCD1U16V2KX-3GP
DY
1 2
R2003 0R0402-PADR2003 0R0402-PAD
1
2 3
4
RN2020 SRN10KJ-5-GPRN2020 SRN10KJ-5-GP
1
TP2001TP2001
1
TP2003TP2003
1
23
4
RN2003
SRN2K2J-1-GP
RN2003
SRN2K2J-1-GP
1
23
4
RN2004
SRN2K2J-1-GP
RN2004
SRN2K2J-1-GP
1
2 3
4
RN2008
SRN10KJ-5-GP
RN2008
SRN10KJ-5-GP
1
2 3
4
RN2021 SRN10KJ-5-GPRN2021 SRN10KJ-5-GP
12
C2007
SC15P50V2JN-2-GP
C2007
SC15P50V2JN-2-GP
1
TP2006TP2006
12
EC2003
SCD1U16V2KX-3GP
DY
EC2003
SCD1U16V2KX-3GP
DY
1 2
R2008
10KR2J-3-GP
R2008
10KR2J-3-GP
1
2
3
4 5
6
7
8
RN2001
SRN10KJ-6-GP
RN2001
SRN10KJ-6-GP
1
2 3
4
RN2007
SRN2K2J-1-GP
RN2007
SRN2K2J-1-GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
HDA_SYNC
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_CS0#
SPI_CS0#_RHDA_CODEC_BITCLK
HDA_SPKR
PCH_GPIO33
HDA_SDOUT
PCH_JTAG_TMS
HDA_BITCLK
HDA_RST#
HDA_SYNC
PCH_JTAG_TDI
SATA_LED#
SATA_DET#0
LPC_AD0_TPM
LPC_AD1_TPM
LPC_AD2_TPM
LPC_AD3_TPM
PCH_JTAG_TDO
HDA_RST#
HDA_SDOUT
HDA_BITCLK
RBIAS_SATA3
SATA_COMP
HDA_SDOUT
PCH_JTAG_TCK_BUF
RTC_X2
SM_INTRUDER#
RTC_X2
RTC_X1
SRTC_RST#
PCH_INTVRMEN
RTC_X1
RTC_RST#
SATA3_COMP
HDA_CODEC_SDOUT
LPC_AD3
LPC_FRAME#_L
INT_SERIRQ
PCH_JTAG_TCK_BUF
SATA_DET#0
HDA_SYNC
LPC_AD0
LPC_AD1
LPC_AD2
SATA_LED#
HDA_SYNC
HDA_CODEC_SYNC HDA_CODEC_SYNC_L
APS_LED
PCH_SPI_CLK
PCH_SPI_CS1#
RTC_AUX_S5
RTC_AUX_S5
1D05V_VTT
3D3V_S0
1D05V_VTT
3D3V_S0
+3VS_+1.5VS_HDA_IO
+3VS_+1.5VS_HDA_IO
5V_S0
3D3V_S0
LPC_AD[0..3] 27,65,71
HDA_CODEC_SDOUT29
HDA_CODEC_SYNC29
HDA_CODEC_RST#29 HDA_CODEC_BITCLK29
HDA_SPKR29
ME_UNLOCK27
SPI_CLK_R27,60
SPI_CS0#_R27,60
HDA_SDIN029
SPI_SO_R27,60
LPC_FRAME# 27,65,71
INT_SERIRQ 27
SATA_TXN0 66
SATA_TXP0 66
SATA_RXP0 66
SATA_RXN0 66
SATA_LED# 68
BBS_BIT0 18
S_GPIO22
SPI_SI_R27,60
SATA_TXN1 56
SATA_TXP1 56
SATA_RXP1 56
SATA_RXN1 56
SATA_TXN4 56
SATA_TXP4 56
SATA_RXP4 56
SATA_RXN4 56
RTCRST_ON27
KBC_RTCRST# 27
APS_LED 68
SPI_CS1#_R60
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : HDA/JTAG/SATA
A2
21 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : HDA/JTAG/SATA
A2
21 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : HDA/JTAG/SATA
A2
21 103Friday, January 06, 2012
<Core Design>
HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this
signal on the board. Signal may have leakage paths via powered off devices (Audio
Codec) and hence contend with the external pull-up. A blocking FET is
recommended in such a case to isolate HDA_SYNC from the Audio Codec device
until after the Strap sampling is complete.
PLL ODVR VOLTAGE
HDA_SYNC Low = 1.8V (Default)
High = 1.5V
This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310
NO REBOOT STRAP
No Reboot Strap
HDA_SPKR Low = Default
High = No Reboot
ODD
HDD1
Notes:
ME_UNLOCK (HDA_SDO) connect to EC.
Make sure EC drive this pin "low" all the time.
SSID = PCH
INTVRMEN- Integrated SUS
1.05V VRM Enable
High - Enable internal VRs
Low - Enable external VRs
HDA_SDOUT Low = Default
High = Enable
Flash Descriptor Security Overide
0511-CHECK ADD BLOCK FET IN CODEC PAGE.
0511-CHECK
CHECK
CHECK
OD
This signal has a weak internal pull-down.
On Die PLL VR is supplied by 1.5 V from VccVRM when
sampled high, 1.8 V from VccVRM when sampled low.
CHECK 4.7K PD
m-SATA
10K?
Vth?
mSATA, CRV USE PORT2
E-SATA
Check with SW
1 2
R2103 1KR2J-1-GPR2103 1KR2J-1-GP
1 2
EC2102
SC4D7P50V2CN-1GP
DY
EC2102
SC4D7P50V2CN-1GP
DY
1
2
3
D2130
BAS16-6-GP
DY 3rd = 83.00016.N11
2nd = 83.00016.M11
83.00016.K11
D2130
BAS16-6-GP
DY 3rd = 83.00016.N11
2nd = 83.00016.M11
83.00016.K11
1 2
R2134 51R2J-2-GPR2134 51R2J-2-GP
1 2
R2102 1KR2J-1-GP
DY
R2102 1KR2J-1-GP
DY
1 2
R2130
0R2J-2-GP
R2130
0R2J-2-GP
1
2 3
4
RN2104
SRN20KJ-GP-U
RN2104
SRN20KJ-GP-U
1 2
R2118 22R2F-1-GPR2118 22R2F-1-GP
1 2
EC2103
SC4D7P50V2CN-1GP
DY
EC2103
SC4D7P50V2CN-1GP
DY
12
C2103
SC1U6D3V2KX-GP
C2103
SC1U6D3V2KX-GP
1 2
R2108 33R2J-2-GPR2108 33R2J-2-GP
12
R212333R2J-2-GP R212333R2J-2-GP
1 2
R2113 49D9R2F-GPR2113 49D9R2F-GP
12
R2124
33R2J-2-GP
R2124
33R2J-2-GP
1
2
3
4 5
6
7
8
RN2103
SRN10KJ-6-GP
RN2103
SRN10KJ-6-GP
12
C2104
SC1U6D3V2KX-GP
C2104
SC1U6D3V2KX-GP
12
C2101
SC15P50V2JN-2-GP
C2101
SC15P50V2JN-2-GP
1 2
R2131 0R2J-2-GP
DY
R2131 0R2J-2-GP
DY
1 2
X2101
XTAL-32D768KHZ-15-GP
82.30001.C21
X2101
XTAL-32D768KHZ-15-GP
82.30001.C21
1 2
R2112 37D4R2F-GPR2112 37D4R2F-GP
1 2
R2119 22R2F-1-GPR2119 22R2F-1-GP
21
G2101
GAP-OPEN
G2101
GAP-OPEN
1
TP2102TP2102
12
EC2104
SCD1U16V2KX-3GP
DY
EC2104
SCD1U16V2KX-3GP
DY
1 2
R2106 1KR2J-1-GP
DY
R2106 1KR2J-1-GP
DY
G
S
D
Q2102
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q2102
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
12
R2104 1M1R2J-GPR2104 1M1R2J-GP
1 2
R2105 330KR2F-L-GPR2105 330KR2F-L-GP
1
TP2105TP2105
1 2
EC2101
SC4D7P50V2CN-1GP
DY
EC2101
SC4D7P50V2CN-1GP
DY
1 2
R2114 750R2F-GPR2114 750R2F-GP
1 2
R2121 22R2F-1-GPR2121 22R2F-1-GP
G
S
D
Q2101
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q2101
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED# P3
FWH0/LAD0 C38
FWH1/LAD1 A38
FWH2/LAD2 B37
FWH3/LAD3 C37
LDRQ1#/GPIO23 K36
FWH4/LFRAME# D36
LDRQ0# E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN#/GPIO33
C36
HDA_DOCK_RST#/GPIO13
N32
SRTCRST#
G22
SATA0RXN AM3
SATA0RXP AM1
SATA0TXN AP7
SATA0TXP AP5
SATA1RXN AM10
SATA1RXP AM8
SATA1TXN AP11
SATA1TXP AP10
SATA2RXN AD7
SATA2RXP AD5
SATA2TXN AH5
SATA2TXP AH4
SATA3RXN AB8
SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
SATA4RXN Y7
SATA4RXP Y5
SATA4TXN AD3
SATA4TXP AD1
SATA5RXN Y3
SATA5RXP Y1
SATA5TXN AB3
SATA5TXP AB1
SATAICOMPI Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP/GPIO21 V14
SATA1GP/GPIO19 P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ V5
SPKR
T10
SATAICOMPO Y11
SATA3COMPI AB13
SATA3RCOMPO AB12
SATA3RBIAS AH1
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
1 OF 10
PCH1A
PANTHER-GP-NF
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
1 OF 10
PCH1A
PANTHER-GP-NF
1 2
R2107 1KR2J-1-GPR2107 1KR2J-1-GP
1
TP2103TP2103
1
TP2104TP2104
1 2
R2125
8K2R2J-3-GP
R2125
8K2R2J-3-GP
12
C2102
SC15P50V2JN-2-GP
C2102
SC15P50V2JN-2-GP
12
R212933R2J-2-GP R212933R2J-2-GP
1 2
R2117 0R2J-2-GP
SBA
R2117 0R2J-2-GP
SBA
1 2
R2110 33R2J-2-GPR2110 33R2J-2-GP
12
R2127
1MR2F-GP
R2127
1MR2F-GP
12
R212633R2J-2-GP R212633R2J-2-GP
1 2
R2128
10KR2J-3-GP
DY
R2128
10KR2J-3-GP
DY
1 2
R2109 0R2J-2-GPR2109 0R2J-2-GP
12
R212233R2J-2-GP
DY
R212233R2J-2-GP
DY
1 2
R2111 22R2F-1-GPR2111 22R2F-1-GP
1 2
R2120 22R2F-1-GPR2120 22R2F-1-GP
1 2
R2101 10MR2J-L-GPR2101 10MR2J-L-GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
TS_VSS
MFG_MODE
PCH_NCTF_2
PCH_NCTF_4
PCH_NCTF_3
PCH_NCTF_1
PCH_GPIO48
PCH_GPIO15
H_RCIN#
USB3_PWR_ON
H_A20GATE
SATA_ODD_PRSNT#
GPIO0
PCH_GPIO22
EC_SMI#
DGPU_HPD_INTR#
EC_SCI#
ICC_EN#
PLL_ODVR_EN
DMI_OVRVLTG
FDI_OVRVLTG
ICC_EN#
SATA_ODD_PRSNT#
PCH_THERMTRIP_R
INIT3_3V#
FDI_OVRVLTG
H_PECI_R
PLL_ODVR_EN
EC_SMI#
DGPU_HPD_INTR#
USB3_PWR_ON
VRAM_SIZE1
PSW_CLR#
VRAM_SIZE2
PCH_TEMP_ALERT#
PCH_GPIO48
EC_SCI#
PCH_TEMP_ALERT#
PCH_GPIO15
FP_DET#
FP_DET#
PCH_GPIO16
DMI_OVRVLTG
NV_CLE
NV_CLE
PCH_GPIO27
PCH_GPIO27
GFX_CRB_DET
VRAM_SIZE1
VRAM_SIZE2
GFX_CRB_DET
Gsensor_ID
PCH_GPIO22
PLL_ODVR_EN
FP_DET#
PSW_CLR#
MFG_MODE
RTC_DET#
Gsensor_ID
PCH_NCTF_5
PCH_NCTF_6
PCH_NCTF_7
PCH_NCTF_8
PCH_NCTF_9
PCH_NCTF_10
DGPU_PWROK_C
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5
3D3V_S0
3D3V_S0
1D8V_S0
3D3V_S0
3D3V_S0
3D3V_S5
H_PECI 5,27
S_GPIO21
SATA_ODD_PRSNT#56
EC_SCI#27
SATA_ODD_PWRGT 56
SBA_Support# 20
H_CPUPW RGD 5,97
H_SNB_IVB# 5
H_A20GATE 27
H_THERMTRIP# 5,36
H_RCIN# 27
RTC_DET#60
DGPU_PWROK92,93
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : GPIO/NTCF/MISC
A2
22 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : GPIO/NTCF/MISC
A2
22 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : GPIO/NTCF/MISC
A2
22 103Friday, January 06, 2012
<Core Design>
TS Signal Disable Guideline:
TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4
should not float on the motherboard. They
should be tied to GND directly.
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
Note:
For PCH debug with XDP, need to NO STUFF R2218
ICC_EN#
GPIO36
(DMI_OVRVLTG)
DMI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
PLL ON DIE VR ENABLE
NOTE:This signal has a weak internal pull-up 20K
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
DISABLED -- LOW (R2212 STUFFED)
LOW (R2211)- ENABLED
Integrated Clock Chip Enable
HIGH (R2211 DY)- DISABLED [DEFAULT]
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
GPIO37
(FDI_OVRVLTG)
FDI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
GPIO8 has a weak[20K] internal pull up.
NV_CLE Set to Vss when LOW
DMI & FDI Termination Voltage
Set to Vcc when HIGH
INTERNAL GFX EXTERNAL GFX
R2205 DY 10K
R2206 100K DY
PROCPWRGD (PCH) --> UNCOREPOWRGOOD (CPU)
Indicates that VccSA, VDDQ, VccA (1.8V) and VccIO power
supplies are stable. This signal will be asserted only after
PWROK assertion.
R2202
HR:200K (64.20035.6DL)
CRV:10K (63.10334.1DL)
R2211 BOM CTRL
HR:1K
CRV:DY
G-Sensor ST KIXNOK
R2226 DY 10K
R2221 10K DY
1 2
R2202 10KR2J-3-GPR2202 10KR2J-3-GP
12
R2230
10KR2J-3-GP
DY
R2230
10KR2J-3-GP
DY
1 2
R2203 0R2J-2-GP
DY
R2203 0R2J-2-GP
DY
1
2 3
4
RN2203
SRN10KJ-5-GP
RN2203
SRN10KJ-5-GP
1 2
R2222 10KR2J-3-GPR2222 10KR2J-3-GP
A K
D2201
CH751H-40-1-GP
DY
D2201
CH751H-40-1-GP
DY
1 2
R2229 10KR2J-3-GPR2229 10KR2J-3-GP
1
TP2211TP2211
1
TP2206TP2206
1
TP2201TP2201
12
R2210
10KR2J-3-GP
R2210
10KR2J-3-GP
1
TP2213TP2213
1 2
R2228 10KR2J-3-GPR2228 10KR2J-3-GP
1
TP2207TP2207
12
R2208
10KR2J-3-GP
R2208
10KR2J-3-GP
1 2
R2216 0R2J-2-GPR2216 0R2J-2-GP
1 2
R2204
390R2J-1-GP
R2204
390R2J-1-GP
1
23
4
RN2204 SRN10KJ-5-GPRN2204 SRN10KJ-5-GP
1
TP2214TP2214
12
R1808
2K2R2J-2-GP
R1808
2K2R2J-2-GP
1
TP2210TP2210
1
TP2209TP2209
21
G2201
GAP-OPEN
G2201
GAP-OPEN
GPIO27
E16
GPIO28
P8
GPIO24
E8
GPIO57
D6
LAN_PHY_PWR_CTRL/GPIO12
C4
VSS_NCTF_1#A4
A4
VSS_NCTF_2#A44
A44
VSS_NCTF_3#A45
A45
VSS_NCTF_4#A46
A46
VSS_NCTF_5#A5
A5
VSS_NCTF_6#A6
A6
VSS_NCTF_7#B3
B3
VSS_NCTF_8#B47
B47
VSS_NCTF_9#BD1
BD1
VSS_NCTF_10#BD49
BD49
VSS_NCTF_11#BE1
BE1
VSS_NCTF_12#BE49
BE49
TACH2/GPIO6
H36
TACH0/GPIO17
D40
TACH3/GPIO7
E38
SATA3GP/GPIO37
M5
SATA5GP/GPIO49/TEMP_ALERT#
V3
SCLOCK/GPIO22
T5
SLOAD/GPIO38
N2
SDATAOUT0/GPIO39
M3
SDATAOUT1/GPIO48
V13
PROCPWRGD AY11
RCIN# P5
PECI AU16
THRMTRIP# AY10
GPIO8
C10
BMBUSY#/GPIO0
T7
GPIO15
G2
TACH1/GPIO1
A42
SATA2GP/GPIO36
V8
INIT3_3V# T14
STP_PCI#/GPIO34
K1
GPIO35
K4
SATA4GP/GPIO16
U2
VSS_NCTF_32#F49 F49
A20GATE P4
TACH4/GPIO68 C40
TACH6/GPIO70 C41
TACH7/GPIO71 A40
TACH5/GPIO69 B41
VSS_NCTF_17#BH3 BH3
VSS_NCTF_18#BH47 BH47
VSS_NCTF_19#BJ4 BJ4
VSS_NCTF_20#BJ44 BJ44
VSS_NCTF_21#BJ45 BJ45
VSS_NCTF_22#BJ46 BJ46
VSS_NCTF_23#BJ5 BJ5
VSS_NCTF_24#BJ6 BJ6
VSS_NCTF_25#C2 C2
VSS_NCTF_26#C48 C48
VSS_NCTF_27#D1 D1
VSS_NCTF_28#D49 D49
VSS_NCTF_29#E1 E1
VSS_NCTF_30#E49 E49
VSS_NCTF_31#F1 F1
TS_VSS4 AK10
TS_VSS3 AH10
TS_VSS2 AK11
TS_VSS1 AH8
NC_1 P37
VSS_NCTF_13#BF1
BF1
VSS_NCTF_14#BF49
BF49
VSS_NCTF_15#BG2 BG2
VSS_NCTF_16#BG48 BG48
DF_TVS AY1
CPU/MISC
NCTF
GPIO
6 OF 10
NCTF TEST PIN:
A4,A44,A45,A46,A5,A6,B3,B47,
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
D49,E1,E49,F1,F49
PCH1F
PANTHER-GP-NF
CPU/MISC
NCTF
GPIO
6 OF 10
NCTF TEST PIN:
A4,A44,A45,A46,A5,A6,B3,B47,
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
D49,E1,E49,F1,F49
PCH1F
PANTHER-GP-NF
1 2
R2215 0R2J-2-GPR2215 0R2J-2-GP
1 2
R2219
0R0402-PAD
R2219
0R0402-PAD
1 2
R1809 1KR2J-1-GPR1809 1KR2J-1-GP
1
TP2215TP2215
12
R2205
10KR2J-3-GP
DY
R2205
10KR2J-3-GP
DY
1
TP2212TP2212
12
R2232
10KR2J-3-GP
DY
R2232
10KR2J-3-GP
DY
1 2
R2218 100R2J-2-GPR2218 100R2J-2-GP
1 2
R2220 10KR2J-3-GPR2220 10KR2J-3-GP
12
R2207
10KR2J-3-GP
DY
R2207
10KR2J-3-GP
DY
1 2
R2226
10KR2J-3-GP
DY
R2226
10KR2J-3-GP
DY
12
R2206
100KR2J-1-GP
R2206
100KR2J-1-GP
1 2
R2201 1KR2J-1-GPR2201 1KR2J-1-GP
1 2
R2212
1KR2J-1-GP
DY
R2212
1KR2J-1-GP
DY
12
R2209
10KR2J-3-GP
DY
R2209
10KR2J-3-GP
DY
1 2
R2234 10KR2J-3-GP
DY
R2234 10KR2J-3-GP
DY
1
TP2208TP2208
1 2
R2211
1KR2J-1-GP
DY
R2211
1KR2J-1-GP
DY
1 2
R2225
10KR2J-3-GP
R2225
10KR2J-3-GP
1
2
3
4 5
6
7
8
RN2201
SRN10KJ-6-GP
RN2201
SRN10KJ-6-GP
1 2
R2224 10KR2J-3-GP
DY
R2224 10KR2J-3-GP
DY
12
R2223
10KR2J-3-GP
R2223
10KR2J-3-GP
1 2
R2221
10KR2J-3-GP
R2221
10KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS_VCCTX_LVDS
+1.05VS_VCC_DMI_CCI
+1.05VS_VCC_DMI
VCCSPI_3D3V
+VCCA_DAC_1_2
+1.05VS_VCC_DMI
+3VS_VCCA_LVDS
VCCAPLLEXP
VCCFDIPLL
+VCCA_DAC_3V
1D05V_VTT
1D05V_VTT
1D05V_VTT
1D05V_VTT
3D3V_S0
1D05V_VTT
3D3V_S0
1D8V_S0
3D3V_S5
3D3V_S0
3D3V_S0
1D8V_S0
+VCCAFDI_VRM
1D5V_S0+VCCAFDI_VRM
1D05V_VTT
5V_S0 3D3V_DAC_S0
3D3V_DAC_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : POWER1
A3
23 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : POWER1
A3
23 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : POWER1
A3
23 103Friday, January 06, 2012
<Core Design>
0.001A
0.266A
0.16A
Refer to NPCE795 shared SPI flash architecture
0.042A
0.02A
VCCVRM(Internal PLL and VRMs):
A.1.5V for Mobile
B.1.8 V for Desktop
SSID = PCH
6A
2.925A(Total current of VCCIO)
0.266A (Totally VCC3_3 current)
0.159A(Totally current of VCCVRM)
0.042A (Totally current of VCCDMI)
(10uF x1)
(0.1uF x1)
1.3A(Total current of VCCCORE)
(22uF x1)
(0.01uF x2)
0.06A
(0.1uFx1)
(1uFx1)
0.001A
(1uF x1)
(1uFx1)
(10uFx1)
0.02A
0.19A
(0.1uFx1)
Reserve 0ohm for power measurement?
Reserve 0ohm for power measurement?
3.3V CRT LDO
74.09091.J3F GMT OBS REASON:G9091
series is going to EOL and no room for further cost reduction.
Pls help to use AME AME8818 , TI TLV702 and GMT G9090 for replacement.
74.09198.G7F OBS
1 2
R2309
0R0402-PAD
R2309
0R0402-PAD
VCCCORE1
AA23
VCCCORE2
AC23
VCCCORE3
AD21
VCCCORE4
AD23
VCCCORE5
AF21
VCCCORE6
AF23
VCCCORE7
AG21
VCCCORE8
AG23
VCCCORE9
AG24
VCCCORE10
AG26
VCCCORE11
AG27
VCCCORE12
AG29
VCCCORE13
AJ23
VCCCORE14
AJ26
VCCCORE15
AJ27
VCCDFTERM4 AJ17
VCCDFTERM3 AJ16
VCCIO17
AN21
VCCIO18
AN26
VCCIO19
AN27
VCCIO20
AP21
VCCIO23
AP26
VCCIO24
AT24
VCCIO15
AN16
VCCIO16
AN17
VCCIO21
AP23
VCCIO22
AP24
VCCADAC U48
VCCTX_LVDS1 AM37
VCCTX_LVDS2 AM38
VCCALVDS AK36
VCCVRM3 AT16
VCCVRM2
AP16
VCCAPLLEXP
BJ22
VCCAFDIPLL
BG6
VCCIO28
AN19 VCCTX_LVDS4 AP37
VCCTX_LVDS3 AP36
VSSADAC U47
VSSALVDS AK37
VCCIO27
AP17
VCC3_3_6 V33
VCC3_3_7 V34
VCC3_3_3
BH29 VCCDFTERM2 AG17
VCCDFTERM1 AG16
VCCDMI1 AT20
VCCIO25
AN33
VCCIO26
AN34
VCCCORE16
AJ29
VCCCORE17
AJ31
VCCSPI V1
VCCCLKDMI AB36
VCCDMI2
AU20
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
7 OF 10
PCH1G
PANTHER-GP-NF
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
7 OF 10
PCH1G
PANTHER-GP-NF
1 2
L2301
BLM18PG181SN1D-GP
L2301
BLM18PG181SN1D-GP
12
C2312
SC1U6D3V2KX-GP
C2312
SC1U6D3V2KX-GP
12
C2328
SC1U6D3V2KX-GP
C2328
SC1U6D3V2KX-GP
1 2
R2307
0R0402-PAD
R2307
0R0402-PAD
12
C2317
SCD01U50V2KX-1GP
C2317
SCD01U50V2KX-1GP
12
C2326
SC10U6D3V3MX-GP
C2326
SC10U6D3V3MX-GP
12
C2307
SCD1U10V2KX-5GP
C2307
SCD1U10V2KX-5GP
12
C2302
SC1U6D3V2KX-GP
C2302
SC1U6D3V2KX-GP
1 2
R2301 0R2J-2-GP
DY
R2301 0R2J-2-GP
DY
12
C2322
SCD1U10V2KX-5GP
C2322
SCD1U10V2KX-5GP
12
C2320
SC1U6D3V2KX-GP
C2320
SC1U6D3V2KX-GP
1 2
R2306 0R0402-PADR2306 0R0402-PAD
1
TP2302TP2302
12
C2316
SCD01U50V2KX-1GP
C2316
SCD01U50V2KX-1GP
12
C2313
SCD01U50V2KX-1GP
C2313
SCD01U50V2KX-1GP
12
C2306
SC1U6D3V2KX-GP
C2306
SC1U6D3V2KX-GP
12
C2315
SC1U6D3V2KX-GP
C2315
SC1U6D3V2KX-GP
12
C2321
SC1U6D3V2KX-GP
C2321
SC1U6D3V2KX-GP
12
C2330
SC1U6D3V2KX-GP
C2330
SC1U6D3V2KX-GP
IN
1
GND
2
EN
3NC#4 4
OUT 5
U2302
AME8818BEEV330Z-GP
DY
74.08818.B3F
U2302
AME8818BEEV330Z-GP
DY
74.08818.B3F
12
C2310
SCD1U10V2KX-5GP
C2310
SCD1U10V2KX-5GP
12
C2324
SC1U6D3V2KX-GP
DY
C2324
SC1U6D3V2KX-GP
DY
12
C2323
SC1U6D3V2KX-GP
C2323
SC1U6D3V2KX-GP
1 2
R2302 0R2J-2-GPR2302 0R2J-2-GP
12
C2309
SC1U6D3V2KX-GP
C2309
SC1U6D3V2KX-GP
12
C2325
SC1U10V2KX-1GP
DY
C2325
SC1U10V2KX-1GP
DY
12
C2329
SC1U6D3V2KX-GP
C2329
SC1U6D3V2KX-GP
12
C2319
SCD1U10V2KX-5GP
C2319
SCD1U10V2KX-5GP
1 2
R2304
0R0603-PAD
R2304
0R0603-PAD
1
TP2301TP2301
1 2
R2308
0R0402-PAD
R2308
0R0402-PAD
12
C2304
SC1U6D3V2KX-GP
C2304
SC1U6D3V2KX-GP
12
C2311
SC1U6D3V2KX-GP
C2311
SC1U6D3V2KX-GP
12
C2327
SC1U6D3V2KX-GP
C2327
SC1U6D3V2KX-GP
12
C2308
SCD1U10V2KX-5GP
C2308
SCD1U10V2KX-5GP
12
C2303
SCD1U10V2KX-5GP
C2303
SCD1U10V2KX-5GP
1 2
R2305
0R0603-PAD
R2305
0R0603-PAD
12
C2333
SC10U6D3V3MX-GP
C2333
SC10U6D3V3MX-GP
12
C2314
SCD1U10V2KX-5GP
C2314
SCD1U10V2KX-5GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
+V1.05S_SSCVCC
+VCCSUS1
+V1.05S_VCCAPLL_SATA3
+V3.3S_VCC_CLKF33
+V1.05S_SSCVCC
+V3.3S_VCC_CLKF33
+1.05VS_VCCA_A_DPL
+VCCRTCEXT
DCPSUSBYP
VCCACLK
+VCCSST
+VCCDIFFCLK
+1.05VS_VCCA_B_DPL
+5VA_PCH_VCC5REFSUS
+VCCAPLL_CPY_PCH
+5VS_PCH_VCC5REF
+VCCPDSW
+VCCDIFFCLK
+VCCA_USBSUS
V_PROC_IO_R
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
DCPSUS
1D05V_VTT
3D3V_S5
3D3V_S5
3D3V_S5
3D3V_S0
3D3V_S5
1D05V_M
1D05V_VTT
3D3V_S0
3D3V_S0
1D05V_VTT
1D05V_VTT
1D05V_M
1D05V_VTT
RTC_AUX_S5
1D05V_VTT
3D3V_S0
+VCCAFDI_VRM
1D05V_VTT
1D05V_VTT
+VCCDIFFCLKN
1D05V_VTT
3D3V_S5
1D05V_VTT
5V_S0
5V_S5
+VCCAFDI_VRM
+3VS_+1.5VS_HDA_IO
+3VS_+1.5VS_HDA_IO
3D3V_S5
3D3V_S5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : POWER2
A3
24 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : POWER2
A3
24 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : POWER2
A3
24 103Friday, January 06, 2012
<Core Design>
0.08A
0.08A
(220uFx1)
(220uFx1)
(1uFx1)
(1uFx1)
(1uFx1)
(10uFx1)
(0.1uFx1)
(10uFx1)
0.002A
SSID = PCH
1.01A (Total current of VCCASW)
0.16A (Totally current of VCCVRM
(0.1uFx1)
0.055A
(0.1uFx1)
0.095A
0.001A
6uA
(0.1uFx2)
(1uFx1)
(1uFx1)
(0.1uFx2)
(1uFx1)
(1uFx1)
(4.7uFx1_0603)
(1uFx1)
(0.1uFx1)
(1uFx1)
(0.1uFx2)
(1uFx1)
0.01A
(1uFx1)
0.001A
0.001A
0.097A (Totally current of VCCSUS3_3)
(1uFx1)
(0.1uFx1)
(0.1uFx1)
(0.1uFx1)
(0.1uFx1)
(1uFx1)
1
TP2406TP2406
12
C2406
SC1U6D3V2KX-GP
C2406
SC1U6D3V2KX-GP
12
C2408
SC1U6D3V2KX-GP
C2408
SC1U6D3V2KX-GP
12
R2413
0R0402-PAD
R2413
0R0402-PAD
12
C2410
SC1U6D3V2KX-GP
C2410
SC1U6D3V2KX-GP
12
C2415
SCD1U10V2KX-5GP
C2415
SCD1U10V2KX-5GP
1 2
L2401
IND-10UH-218-GP
68.10050.10Y
2nd = 68.1001E.10N
L2401
IND-10UH-218-GP
68.10050.10Y
2nd = 68.1001E.10N
1 2
R2409
0R0603-PAD
R2409
0R0603-PAD
12
C2433
SCD1U10V2KX-5GP
C2433
SCD1U10V2KX-5GP
1 2
L2403
IND-10UH-218-GP
68.10050.10Y
2nd = 68.1001E.10N
L2403
IND-10UH-218-GP
68.10050.10Y
2nd = 68.1001E.10N
12
C2413
SC1U6D3V2KX-GP
C2413
SC1U6D3V2KX-GP
12
C2422
SCD1U10V2KX-5GP
C2422
SCD1U10V2KX-5GP
12
C2409
SC1U6D3V2KX-GP
C2409
SC1U6D3V2KX-GP
12
R2404
0R0402-PAD
R2404
0R0402-PAD
DCPSUSBYP
V12
VCCASW1
AA19
VCCASW2
AA21
VCCASW3
AA24
VCCASW5
AA27
VCCASW6
AA29
VCCSUSHDA P32
VCCSUS3_3_6 P24
VCCIO34 T26
VCCIO4 AD17
VCCASW7
AA31
VCCASW8
AC26
VCCASW9
AC27
VCCASW10
AC29
VCCASW11
AC31
VCCASW12
AD29
V5REF P34
VCC3_3_4 T34
VCCRTC
A22
VCCSUS3_3_10 V24
VCCSUS3_3_9 V23
VCCSUS3_3_8 T24
VCCSUS3_3_7 T23
VCCIO2 AC16
VCCADPLLB
BF47
VCCDIFFCLKN1
AF33
V5REF_SUS M26
VCCIO3 AC17
DCPSUS1
T17
VCCSSC
AG33
VCCADPLLA
BD47
VCCVRM4
Y49
VCCACLK
AD49
DCPRTC
N16
VCCASW4
AA26
VCCDIFFCLKN2
AF34
VCCIO7
AF17
DCPSST
V16
VCCIO5 AF13
VCCASW22 T21
VCCASW23 V21
VCCASW21 T19
VCC3_3_1 AA16
VCC3_3_8 W16
VCCSUS3_3_2 N20
VCCSUS3_3_3 N22
VCCSUS3_3_4 P20
VCCSUS3_3_5 P22
VCCIO29 N26
VCCIO30 P26
VCCIO31 P28
VCCIO32 T27
V_PROC_IO
BJ8
VCCIO33 T29
VCCDIFFCLKN3
AG34
VCCASW13
AD31
VCCASW14
W21
VCCASW15
W23
VCCASW16
W24
VCCASW17
W26
VCCASW18
W29
VCCASW19
W31
VCCASW20
W33
VCCIO6 AF14
VCCVRM1 AF11
VCCIO12 AH13
VCCIO13 AH14
VCC3_3_2 AJ2
VCCAPLLSATA AK1
DCPSUS3
AL24
VCCIO14
AL29
DCPSUS4 AN23
VCCSUS3_3_1 AN24
VCCAPLLDMI2
BH23
DCPSUS2
V19
VCCDSW3_3
T16
VCC3_3_5
T38
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
10 OF 10
PCH1J
PANTHER-GP-NF
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
10 OF 10
PCH1J
PANTHER-GP-NF
12
C2437
SC1U6D3V2KX-GP
C2437
SC1U6D3V2KX-GP
12
R2405
0R0402-PAD
R2405
0R0402-PAD
1
TP2402TP2402
21
D2401
CH751H-40PT-GP
83.R0304.A8F
2nd = 83.R2004.B8F
D2401
CH751H-40PT-GP
83.R0304.A8F
2nd = 83.R2004.B8F
1
TP2404TP2404
1 2
R2408
10R2J-2-GP
R2408
10R2J-2-GP
12
C2411
SCD1U10V2KX-5GP
C2411
SCD1U10V2KX-5GP
12
C2417
SC1U6D3V2KX-GP
C2417
SC1U6D3V2KX-GP
1 2
R2407
10R2J-2-GP
R2407
10R2J-2-GP
1
TP2405TP2405
12
C2403
SC10U6D3V3MX-GP
C2403
SC10U6D3V3MX-GP
1
TP2401TP2401
1 2
R2403
0R0603-PAD
R2403
0R0603-PAD
12
C2424
SCD1U10V2KX-5GP
C2424
SCD1U10V2KX-5GP
12
C2401
SC10U6D3V5KX-1GP
C2401
SC10U6D3V5KX-1GP
12
C2429
SCD1U10V2KX-5GP
C2429
SCD1U10V2KX-5GP
12
C2444
SC10U6D3V3MX-GP
DY
C2444
SC10U6D3V3MX-GP
DY
12
C2414
SC1U6D3V2KX-GP
C2414
SC1U6D3V2KX-GP
1
TP2407TP2407
12
C2402
SC1U10V2KX-1GP
C2402
SC1U10V2KX-1GP
12
C2431
SCD1U10V2KX-5GP
C2431
SCD1U10V2KX-5GP
12
C2432
SC1U6D3V2KX-GP
C2432
SC1U6D3V2KX-GP
12
C2418
SCD1U10V2KX-5GP
C2418
SCD1U10V2KX-5GP
12
C2425
SCD1U10V2KX-5GP
C2425
SCD1U10V2KX-5GP
12
C2421
SCD1U10V2KX-5GP
C2421
SCD1U10V2KX-5GP
12
C2443
SC10U6D3V3MX-GP
DY
C2443
SC10U6D3V3MX-GP
DY
1
TP2403TP2403
12
C2430
SCD1U10V2KX-5GP
C2430
SCD1U10V2KX-5GP
1 2
R2406
0R0603-PAD
R2406
0R0603-PAD
12
C2423
SCD1U10V2KX-5GP
C2423
SCD1U10V2KX-5GP
12
C2435
SCD1U10V2KX-5GP
C2435
SCD1U10V2KX-5GP
12
C2412
SC1U6D3V2KX-GP
C2412
SC1U6D3V2KX-GP
12
C2436
SC1U6D3V2KX-GP
C2436
SC1U6D3V2KX-GP
12
C2407
SC1U6D3V2KX-GP
C2407
SC1U6D3V2KX-GP
12
C2427
SC1U10V2KX-1GP
C2427
SC1U10V2KX-1GP
12
C2426
SCD1U10V2KX-5GP
C2426
SCD1U10V2KX-5GP
12
C2416
SC1U6D3V2KX-GP
C2416
SC1U6D3V2KX-GP
1 2
L2402
IND-10UH-218-GP
68.10050.10Y
2nd = 68.1001E.10N
L2402
IND-10UH-218-GP
68.10050.10Y
2nd = 68.1001E.10N
12
C2428
SC1U6D3V2KX-GP
C2428
SC1U6D3V2KX-GP
12
C2419
SCD1U10V2KX-5GP
C2419
SCD1U10V2KX-5GP
21
D2402
CH751H-40PT-GP
83.R0304.A8F
2nd = 83.R2004.B8F
D2402
CH751H-40PT-GP
83.R0304.A8F
2nd = 83.R2004.B8F
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : VSS
A3
25 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : VSS
A3
25 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
PCH : VSS
A3
25 103Friday, January 06, 2012
<Core Design>
SSID = PCH
VSS159
AY4
VSS160
AY42
VSS161
AY46
VSS162
AY8
VSS163
B11
VSS164
B15
VSS165
B19
VSS166
B23
VSS167
B27
VSS168
B31
VSS169
B35
VSS170
B39
VSS171
B7
VSS173
BB12
VSS174
BB16
VSS175
BB20
VSS176
BB22
VSS177
BB24
VSS178
BB28
VSS179
BB30
VSS180
BB38
VSS181
BB4
VSS182
BB46
VSS183
BC14
VSS184
BC18
VSS185
BC2
VSS186
BC22
VSS187
BC26
VSS188
BC32
VSS189
BC34
VSS190
BC36
VSS191
BC40
VSS192
BC42
VSS193
BC48
VSS194
BD46
VSS195
BD5
VSS196
BE22
VSS197
BE26
VSS198
BE40
VSS199
BF10
VSS200
BF12
VSS201
BF16
VSS202
BF20
VSS203
BF22
VSS204
BF24
VSS205
BF26
VSS206
BF28
VSS207
BD3
VSS208
BF30
VSS209
BF38
VSS210
BF40
VSS211
BF8
VSS212
BG17
VSS213
BG21
VSS214
BG33
VSS215
BG44
VSS216
BG8
VSS217
BH11
VSS218
BH15
VSS219
BH17
VSS220
BH19
VSS222
BH27
VSS223
BH31
VSS224
BH33
VSS225
BH35
VSS226
BH39
VSS227
BH43
VSS228
BH7
VSS229
D3
VSS230
D12
VSS231
D16
VSS232
D18
VSS233
D22
VSS234
D24
VSS235
D26
VSS236
D30
VSS237
D32
VSS264 K7
VSS265 L18
VSS266 L2
VSS267 L20
VSS268 L26
VSS269 L28
VSS270 L36
VSS271 L48
VSS272 M12
VSS273 P16
VSS274 M18
VSS275 M22
VSS276 M24
VSS277 M30
VSS278 M32
VSS279 M34
VSS280 M38
VSS281 M4
VSS282 M42
VSS283 M46
VSS284 M8
VSS285 N18
VSS286 P30
VSS288 P11
VSS289 P18
VSS290 T33
VSS291 P40
VSS292 P43
VSS293 P47
VSS294 P7
VSS295 R2
VSS296 R48
VSS297 T12
VSS298 T31
VSS299 T37
VSS300 T4
VSS301 W34
VSS302 T46
VSS303 T47
VSS304 T8
VSS305 V11
VSS306 V17
VSS307 V26
VSS308 V27
VSS309 V29
VSS310 V31
VSS311 V36
VSS312 V39
VSS313 V43
VSS314 V7
VSS315 W17
VSS316 W19
VSS238
D34
VSS239
D38
VSS240
D42
VSS241
D8
VSS242
E18
VSS243
E26
VSS244
G18
VSS245
G20
VSS246
G26
VSS247
G28
VSS248
G36
VSS249
G48
VSS250
H12
VSS251
H18
VSS317 W2
VSS318 W27
VSS319 W48
VSS320 Y12
VSS321 Y38
VSS322 Y4
VSS323 Y42
VSS324 Y46
VSS325 Y8
VSS328 BG29
VSS329 N24
VSS330 AJ3
VSS287 N47
VSS252
H22
VSS253
H24
VSS254
H26
VSS255
H30
VSS256
H32
VSS257
H34
VSS258
F3
VSS262 K39
VSS263 K46
VSS259 H46
VSS260 K18
VSS261 K26
VSS331 AD47
VSS333 B43
VSS334 BE10
VSS335 BG41
VSS337 G14
VSS338 H16
VSS340 T36
VSS342 BG22
VSS343 BG24
VSS344 C22
VSS345 AP13
VSS172
F45
VSS221
H10
VSS346 M14
VSS347 AP3
VSS348 AP1
VSS349 BE16
VSS350 BC16
VSS351 BG28
VSS352 BJ28
9 OF 10
PCH1I
PANTHER-GP-NF
9 OF 10
PCH1I
PANTHER-GP-NF
VSS1
AA17
VSS2
AA2
VSS3
AA3
VSS5
AA34
VSS6
AB11
VSS7
AB14
VSS8
AB39
VSS9
AB4
VSS10
AB43
VSS11
AB5
VSS12
AB7
VSS13
AC19
VSS14
AC2
VSS15
AC21
VSS16
AC24
VSS17
AC33
VSS18
AC34
VSS19
AC48
VSS20
AD10
VSS21
AD11
VSS22
AD12
VSS23
AD13
VSS24
AD19
VSS25
AD24
VSS26
AD26
VSS27
AD27
VSS28
AD33
VSS29
AD34
VSS30
AD36
VSS31
AD37
VSS33
AD39
VSS34
AD4
VSS35
AD40
VSS36
AD42
VSS37
AD43
VSS38
AD45
VSS39
AD46
VSS43
AF10
VSS44
AF12
VSS46
AD16
VSS47
AF16
VSS48
AF19
VSS49
AF24
VSS50
AF26
VSS51
AF27
VSS52
AF29
VSS53
AF31
VSS54
AF38
VSS55
AF4
VSS56
AF42
VSS57
AF46
VSS59
AF7
VSS60
AF8
VSS61
AG19
VSS62
AG2
VSS63
AG31
VSS64
AG48
VSS65
AH11
VSS66
AH3
VSS67
AH36
VSS68
AH39
VSS69
AH40
VSS70
AH42
VSS71
AH46
VSS72
AH7
VSS73
AJ19
VSS76
AJ33
VSS77
AJ34
VSS78
AK12
VSS79
AK3
VSS80 AK38
VSS81 AK4
VSS82 AK42
VSS83 AK46
VSS84 AK8
VSS85 AL16
VSS86 AL17
VSS87 AL19
VSS88 AL2
VSS89 AL21
VSS90 AL23
VSS91 AL26
VSS92 AL27
VSS93 AL31
VSS96 AL48
VSS97 AM11
VSS98 AM14
VSS99 AM36
VSS100 AM39
VSS102 AM45
VSS103 AM46
VSS104 AM7
VSS105 AN2
VSS106 AN29
VSS107 AN3
VSS108 AN31
VSS109 AP12
VSS110 AP19
VSS111 AP28
VSS112 AP30
VSS113 AP32
VSS114 AP38
VSS116 AP42
VSS117 AP46
VSS118 AP8
VSS119 AR2
VSS120 AR48
VSS121 AT11
VSS122 AT13
VSS123 AT18
VSS124 AT22
VSS125 AT26
VSS126 AT28
VSS127 AT30
VSS128 AT32
VSS131 AT42
VSS132 AT46
VSS133 AT7
VSS134 AU24
VSS135 AU30
VSS136 AV16
VSS137 AV20
VSS138 AV24
VSS139 AV30
VSS140 AV38
VSS141 AV4
VSS142 AV43
VSS143 AV8
VSS144 AW14
VSS145 AW18
VSS146 AW2
VSS147 AW22
VSS148 AW26
VSS149 AW28
VSS150 AW32
VSS151 AW34
VSS152 AW36
VSS153 AW40
VSS154 AW48
VSS155 AV11
VSS156 AY12
VSS157 AY22
VSS158 AY28
VSS40
AD8
VSS42
AE3
VSS45
AD14
VSS115 AP4
VSS0
H5
VSS58
AF5
VSS32
AD38
VSS4
AA33
VSS74
AJ21
VSS75
AJ24
VSS41
AE2
VSS129 AT34
VSS130 AT39
VSS101 AM43
VSS95 AL34
VSS94 AL33
8 OF 10
PCH1H
PANTHER-GP-NF
8 OF 10
PCH1H
PANTHER-GP-NF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
26 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
26 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
26 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
E51_RxD
SML1_DATA
SML1_CLK
BAT_SDA
BAT_SCL
ECSCI#_KBC
BLUETOOTH_EN
PURE_HW_SHUTDOWN#
PROCHOT_EC
H_PROCHOT#_EC
BAT_IN#
ECRST#_B
AC_IN_KBC
ECRST#
EC_SPI_DI_C
S5_ENABLE
KBC_NOVO_BTN#
KBC_PWRBTN_EC#
AD_OFF
PM_SLP_A#
MODEL_ID_AD
PCB_VER_AD
SMBC_THERM
SMBD_THERM
ECRST#
KCOL0
KCOL10
KCOL9
KCOL13
KCOL12
KCOL11
KCOL1
KCOL16
KCOL15
KCOL14
KCOL2
KCOL5
KCOL4
KCOL3
KCOL8
KCOL7
KCOL6
KCOL17
KROW1
KROW0
KROW3
KROW2
KROW5
KROW4
KROW7
KROW6PECI
EC_VTT
ECRST#
VBAT
PLT_RST#_EC
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R LPC_AD0LPC_AD0_R
ECSCI#_KBC
PROCHOT_EC
EC_SPI_DI_C
EC_SPI_CS#_C
EC_SPI_DO_C
EC_SPI_CLK_C
EC_AGND
KBC_VCORF
NC_EC_ENABLE
AC_IN_KBC
KBC_PWRBTN_EC#
MODEL_ID_AD
ADT_TYPE
PCB_VER_AD LPC_AD3
LPC_AD2
LPC_AD1
ADT_TYPE
3G_EN
LID_CLOSE#
PCIE_WLAN_WAKE#
SATA_ODD_DA#_R
-MSATA_DET
HDD_DET#
NC_KBC_GPIO51
3D3V_S0
3D3V_S0
3D3V_AUX_KBC
3D3V_S0
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_S53D3V_AUX_KBC
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_KBC
3D3V_AUX_S5
3D3V_AUX_KBC
1D05V_VTT
3D3V_S0_KBC3D3V_AUX_KBC
RTC_AUX_S5
3D3V_AUX_KBC
3D3V_S0
3D3V_AUX_KBC
3D3V_AUX_S5
3D3V_AUX_S5
SMBC_THERM 28,86
SMBD_THERM 28,86
EC_SCI#22
PURE_HW_SHUTDOWN#28,36,86
H_PROCHOT# 5,42
AC_IN# 40
KBC_PWRBTN#68
KCOL[0..15] 69
KROW[0..7] 69
H_PECI5,22
PM_SLP_S3#19,36,37,47
KBC_BEEP29
STOP_CHG#40
KBC_NOVO_BTN#68
E51_RxD65 E51_TxD65
AMP_MUTE#29
PCH_SUSCLK_KBC19
AD_DETECT38
ME_UNLOCK21
PM_PWRBTN#19,97
PLT_RST# 5,18,31,36,65,66,71,80,82,83,97
CLK_PCI_KBC 18
LPC_FRAME# 21,65,71
INT_SERIRQ 21
PM_CLKRUN# 19
LPC_AD[0..3] 21,65,71
PANEL_BLEN 49
H_A20GATE 22
H_RCIN# 22
TPDATA 69
TPCLK 69
BLON_OUT 49
CHG_USB_OC# 82
GSENSE_ON# 79
BAT_SDA 39,40
BAT_SCL 39,40
SML1_CLK 20
SML1_DATA 20
CHG_ON# 40
LAN_PWR_ON 31
SPI_SO_R21,60
SPI_CS0#_R21,60 SPI_CLK_R21,60
SPI_SI_R21,60
USB_PWR_EN_R61,62,82 AC_PRESENT19
S0_PWR_GOOD19 BLUETOOT H_EN63,65 WIFI_RF_EN65
PM_SLP_S4#19,46,97 RSMRST#_KBC19 LID_CLOSE#49,70 BAT_IN#39
S5_ENABLE36,97
AD_OFF38
GSENSE_Y79 GSENSE_X79
CAMERA_EN49
AD_IA40
CAP_LED68
USB_CHG_EN82
RTCRST_ON 21
KBC_RTCRST#21
CPU_CURRENT42 VGA_CURRENT42 NUM_LED68
ADP_LED82
USB_AO_SEL082ADT_TYPE38
ECRST#41
AOAC_EN65 PM_SLP_A# 19,45
PCIE_WLAN_WAKE#65
SATA_ODD_DA# 18,56
SPI_CS1#_R21,60
CHARGE_LED68
-MSATA_DET66
HDD_DET#56
PWRLED68
DC_BATFULL68
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A1
27 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A1
27 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A1
27 103Friday, January 06, 2012
<Core Design>
Reset IC: Prevent BIOS data loss solution
EC GPIO standard PH/PL
EC_GPIO47 High Active
PCB Version A/D
(Pin98) Pull-Low Resistor Pull-High Resistor
(3D3V_AUX_S5) Voltage
SA
SB
SC
-1
Reserved
Reserved
Reserved
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
10.0K
20.0K
33.0K
47.0K
64.9K
76.8K
100.0K
3.0V
1.87V
1.65V
2.75V
2.48V
2.24V
2.0V
71.00885.A0G
IC EMB CTRL NPCE885PA0DX LQFP 128P
UMA
OPTIMUS
100.0K
MODEL_ID_AD
(Pin100) Pull Down Pull High Voltage
33.0K 2.481V
100.0K 47.0K 2.245V
WHY
R2720 and C2716
Need very close to EC
SSID = KBC
<------ TP
<------ BATTERY / CHARGER
<------PCH / eDP
65W: 1.7V
90W: 3.3V
Code change to Low Active on 8/19
KBSOUT0/GPOB0/JENK# 53
KBSOUT1/GPIOB1/TCK 52
KBSOUT2/GPIOB2/TMS 51
KBSOUT3/GPIOB3/TDI 50
KBSOUT4/GPOB4/JEN0# 49
KBSOUT5/GPIOB5/TDO 48
KBSOUT6/GPIOB6/RDY# 47
KBSOUT7/GPIOB7 43
KBSOUT8/GPIOC0 42
KBSOUT9/GPOC1/SDP_VI S# 41
KBSOUT10_P80_CLK/GPIOC2 40
KBSOUT11_P80_DAT/GPIOC3 39
KBSOUT12/GPIO64 38
KBSOUT13/GPIO63 37
KBSOUT14/GPIO62 36
KBSOUT15/GPIO61/XOR_ OUT 35
GPIO60 /KBSOUT16 34
GPIO57 /KBSOUT17 33
KBSIN0/GPIOA0/N2TCK 54
KBSIN1/GPIOA1/N2TMS 55
KBSIN2/GPIOA2 56
KBSIN3/GPIOA3 57
KBSIN4/GPIOA4 58
KBSIN5/GPIOA5 59
KBSIN6/GPIOA6 60
KBSIN7/GPIOA7 61
GPIO56 /TA1
31
GPIO14 /TB1
63
GPIO1/T B2
64
GPIO15 /A_PWM
32
GPIO21 /B_PWM
118
GPIO13 /C_PWM
62
GPIO32 /D_PWM
65
GPIO66 /G_PWM
81
GPIO33 /H_PWM
66
GPIO45 /E_PWM
22
GPIO40 /F_PWM
16
VCC_PO R#
85
GPIO0/E XTCLK
77
PECI
13
VTT
12
GPIO87 /CIRRXM/SIN_CR
113 GPIO46 /CIRRXM/TRIST#
23
GP/I/O83/SOUT_CR/TRIST #
111
GPIO55 /CLKOUT/IOX_DIN_DIO
30
2 OF 2
U2701B
NPCE885GA0DX-GP
2 OF 2
U2701B
NPCE885GA0DX-GP
12
R2710
10KR2J-3-GP
DY
R2710
10KR2J-3-GP
DY
12
R2705
10KR2J-3-GP
R2705
10KR2J-3-GP
1 2
R2738 0R2J-2-GPR2738 0R2J-2-GP
1
TP2703TP2703
12
R2776
100KR2J-1-GP
R2776
100KR2J-1-GP
1
TP2707TP2707
12
R2773
100KR2J-1-GP
R2773
100KR2J-1-GP
12
R2775
100KR2J-1-GP
R2775
100KR2J-1-GP
1 2
R2711
0R0402-PAD
R2711
0R0402-PAD
12
RC2701
SC33P50V2JN-3GP
DY RC2701
SC33P50V2JN-3GP
DY
12
R2707
10KR2F-2-GP
R2707
10KR2F-2-GP
VCC1 19
VCC2 46
VCC3 76
VCC4 88
VCC5 115
AVCC 102
VDD 4
GND1
18
GND2
45
GND3
78
GND4
89
GND5
116
GND6
5
AGND
103
GPIO11/CLKRUN# 8
LAD3/GP IOF4 1
LAD2/GP IOF3 128
LAD1/GP IOF2 127
LAD0/GP IOF1 126
LFRAME# /GPIOF6 3
LCLK/GP IOF5 2
LRESET#/GPIOF7 7
SERIRQ/GPIOF0 125
GPIO85/GA20 121
KBRST#/GPIO86 122
ECSCI#/GPIO54 29
GPIO65/SMI# 9
GPIO10/LPCPD# 124
GPIO67N2TMS
123
GPIO17/SCL1/N2TCK 70
GPIO73/SCL2 67
GPIO23/SCL3 119
GPIO22/SDA1/N2TMS 69
GPIO74/SDA2 68
GPIO31/SDA3 120
F_SDI_F_SDIO1
86
F_SDI_F_SDIO0
87
F_SCK
92 F_CS0#
90
VREF
104
GPIO90/AD0
97
GPIO91/AD1
98
GPIO92/AD2
99
GPIO93/AD3
100
GPIO94/DA0
101
GPIO95/DA1
105
GPIO96/DA2
106
GPIO37/PSCLK1 72
GPIO26/PSCLK2 10
GPIO35/PSDAT1 71
GPIO27/PSDAT2 11
GPIO24
6
GPIO42/TCK
17
GPIO43/TMS
20
GPIO44/TDI
21
GPIO34/CIRRXL
14
GPIO47/SCL4 24
GPIO50/PSCLK3/TD O 25
GPIO52/PSDAT3/RD Y# 27
GPIO53/SDA4 28
PSL_IN1_GPI70# 73
PSL_OUT_GPIO71# 7 4
VSBY 75
GPIO41/F_WP#
80
GPIO75
82
GPIO76
83
GPIO77
84
GPIO81/F_WP#
91 PSL_IN2_GPI6# 93
GPIO7/AD7
94 GPIO3/AD6
95 GPIO4/AD5
96
GPIO97/DA3
107
GPIO5/AD4
108
GPIO30/F_WP#
109
GPO82/IOX_LDSH/TEST#
110 GP/I/O84 /IOX_SCLK /XORTR#
112
VBKUP 114
VCORF 44
GPIO2
79
GPIO20/TA2/IOX_D IN_DIO
117
GPIO36
15
GPIO51/N2TCK
26
1 OF 2
U2701A
NPCE885GA0DX-GP
1 OF 2
U2701A
NPCE885GA0DX-GP
1 2
R2702
0R0603-PAD
R2702
0R0603-PAD
12
C2709
SC1U6D3V2KX-GP
C2709
SC1U6D3V2KX-GP
12
R2732
100KR2J-1-GP
R2732
100KR2J-1-GP
GND
1
RESET#
2VCC 3
U2702
G690L293T73UF-GP
74.00690.I7B
DY
U2702
G690L293T73UF-GP
74.00690.I7B
DY
1
TP2704TP2704
12
C2717
SC220P50V2KX-3GP
DY
C2717
SC220P50V2KX-3GP
DY
12
C2715
SC1U6D3V2KX-GP
DY
C2715
SC1U6D3V2KX-GP
DY
1 2
R2721 43R2J-GPR2721 43R2J-GP
1
2
34
5
6
Q2703
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q2703
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
12
C2704
SCD1U10V2KX-5GP
C2704
SCD1U10V2KX-5GP
1 2
R2708
10KR2J-3-GP
DY
R2708
10KR2J-3-GP
DY
1 2
R2716 0R2J-2-GP
DY
R2716 0R2J-2-GP
DY
12
C2710
SCD1U10V2KX-5GP
C2710
SCD1U10V2KX-5GP
12
R272233R2J-2-GP R272233R2J-2-GP
1 2
C2711
SC220P50V2KX-3GP
DY
C2711
SC220P50V2KX-3GP
DY
1 2
R2733
0R0402-PAD
R2733
0R0402-PAD
12
R2724
64K9R2F-1-GP
BOM CTRL
R2724
64K9R2F-1-GP
BOM CTRL
1 2
R2729 33R2J-2-GPR2729 33R2J-2-GP
12
C2706
SCD1U10V2KX-5GP
C2706
SCD1U10V2KX-5GP
12
R2701
100KR2F-L1-GP
DY
R2701
100KR2F-L1-GP
DY
1 2
R2730 33R2J-2-GPR2730 33R2J-2-GP
12
R2723
10KR2J-3-GP
R2723
10KR2J-3-GP
1 2
R2741 0R0402-PAD
R2741 0R0402-PAD
1 2
R2720 0R2J-2-GPR2720 0R2J-2-GP
12
C2702
SCD1U10V2KX-5GP
C2702
SCD1U10V2KX-5GP
12
C2716
SCD1U16V2KX-3GP
C2716
SCD1U16V2KX-3GP
12
R2717
10KR2J-3-GP
DY
R2717
10KR2J-3-GP
DY
12
R2714
10KR2J-3-GP
R2714
10KR2J-3-GP
12
R2728
100KR2F-L1-GP
R2728
100KR2F-L1-GP
12
C2713
SCD1U10V2KX-5GP
C2713
SCD1U10V2KX-5GP
12
R2704
10KR2J-3-GP
R2704
10KR2J-3-GP
1
23
4
RN48
SRN10KJ-5-GP
RN48
SRN10KJ-5-GP
1
TP2705TP2705
1 2
R2712
0R0402-PAD
R2712
0R0402-PAD
1
TP2708TP2708
12
33R2J-2-GP R271933R2J-2-GP R2719
1
2
3
D2704
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
D2704
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
1 2
C2714
SCD1U10V2KX-5GP
DY
C2714
SCD1U10V2KX-5GP
DY
1 2
R2740 0R0402-PAD
R2740 0R0402-PAD
12
C2701
SC2D2U10V3KX-1GP
C2701
SC2D2U10V3KX-1GP
G
S
D
Q2702
2N7002K-2-GP
2ND = 84.2N702.J31
84.2N702.031
Q2702
2N7002K-2-GP
2ND = 84.2N702.J31
84.2N702.031
12
C2707
SCD1U10V2KX-5GP
C2707
SCD1U10V2KX-5GP
12
R2727
47KR2F-GP
BOM CTRL
R2727
47KR2F-GP
BOM CTRL
1
23
4
RN2705
SRN10KJ-5-GP
RN2705
SRN10KJ-5-GP
1 2
R2739 0R0402-PADR2739 0R0402-PAD
1
23
4
RN2701
SRN4K7J-8-GP
RN2701
SRN4K7J-8-GP
12
R2770
1KR2J-1-GP
R2770
1KR2J-1-GP
1 2
R2709
0R0805-PAD
R2709
0R0805-PAD
12
RC2702
SC33P50V2JN-3GP
DY
RC2702
SC33P50V2JN-3GP
DY
12
R27370R2J-2-GP R27370R2J-2-GP
1 2
R2735 0R0402-PADR2735 0R0402-PAD
12
33R2J-2-GP R2744
SBA
33R2J-2-GP R2744
SBA
12
R2726
100KR2F-L1-GP
R2726
100KR2F-L1-GP
1 2
R2742 0R0402-PAD
R2742 0R0402-PAD
1
23
4
RN2703
SRN100KJ-6-GP
RN2703
SRN100KJ-6-GP
1 2
R2725
0R0805-PAD
R2725
0R0805-PAD
12
R2774
100KR2J-1-GP
R2774
100KR2J-1-GP
12
33R2J-2-GP R2736
Non-SBA
33R2J-2-GP R2736
Non-SBA
2 1
G2701
GAP-OPEN
G2701
GAP-OPEN
12
C2708
SCD1U10V2KX-5GP
C2708
SCD1U10V2KX-5GP
12
C2712
SC1U10V2KX-1GP
C2712
SC1U10V2KX-1GP
12
R2706
100KR2J-1-GP
DY
R2706
100KR2J-1-GP
DY
12
C2705
SCD1U10V2KX-5GP
DY
C2705
SCD1U10V2KX-5GP
DY
C
B
E
Q2701
MMBT3906-4-GP
2nd = 84.C3906.A11
84.03906.F11
Q2701
MMBT3906-4-GP
2nd = 84.C3906.A11
84.03906.F11
12
R271510KR2J-3-GP
DY
R271510KR2J-3-GP
DY
1 2
R2743 0R0402-PADR2743 0R0402-PAD
12
C2703
SC2D2U10V3KX-1GP
DY
C2703
SC2D2U10V3KX-1GP
DY
12
R2703
470R2J-2-GP
R2703
470R2J-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAN_PWM_C
IMVP_PWRGD_T
FAN_TACH
H_THERMDC
H_THERMDA
SHDN_SEL
REMOTE2-
THERM_SCI#
THERM_SYS_SHDN# SHDN_SEL
TRIP_SET
FAN_TACH_1
2103_VDD
REMOTE2+
FAN_PWM_CFAN_PWM
2103_5
FAN_TACH
2103_4
H_THERMDC
H_THERMDA
REMOTE2+
REMOTE2-
5V_S0_FAN
FAN_PWM
5V_S0_FAN
THERM_SYS_SHDN#
FAN_TACH
THERM_SCI#
3D3V_AUX_S5
3D3V_S0
3D3V_S0
3D3V_S0
5V_S0
3D3V_S0 3D3V_S0
3D3V_S0
SMBC_THERM27,86 SMBD_THERM27,86
PURE_HW_SHUTDOWN#27,36,86
IMVP_PWRGD 36,42
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
THERMAL SENSOR SMSC EMC2103
A3
28 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
THERMAL SENSOR SMSC EMC2103
A3
28 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
THERMAL SENSOR SMSC EMC2103
A3
28 103
Friday, January 06, 2012
<Core Design>
20100707_EMI
TRIP_SET: 649 ohm => 87 dgree C
SA 0905 change to 390p
T8
CPU TEMP:
H_THERMDA and H_THERMDC routing 10mil trace width
and spacing. Locate Capacity near Thermal diode.
SHDN --> 2N3904 ON External diode
T8 = 98
between CPU, VGA and DIMM on bottom side
1
CPU backside or inside the socket
Close to SO-DIMM on top side.
2200p close to smsc2103 chip
2200p close to smsc2103 chip
pin6, ALERT# OD
pin7, SYS_SHDN# OD
2
3
4 WIRE PWM Fan Control circuit
Thermal sensor
SSID = Thermal
CHECK PIN DEFINE
20110718_Carrey:
For Vendor suggestion, add 390pF Cap. as closed to pin B/C and E of Q2803
20110718_Carrey:
For Vendor suggestion, add 10k pull high to 3D3V_S0
1
TP2803TP2803
12
R2812
10KR2J-3-GP
DY
R2812
10KR2J-3-GP
DY
12
EC2801
SC1KP50V2KX-1GP
DY
EC2801
SC1KP50V2KX-1GP
DY
1 2
C2806 SCD1U10V2KX-4GPC2806 SCD1U10V2KX-4GP
1
AFTP2807AFTP2807
12
R2803
10KR2J-3-GP
R2803
10KR2J-3-GP
1 2
R2806 649R2F-GPR2806 649R2F-GP
12
EC2802
SC1KP50V2KX-1GP
DY
EC2802
SC1KP50V2KX-1GP
DY
12
R2808
100KR2J-1-GP
R2808
100KR2J-1-GP
C
B
E
Q2804
MMBT3904WT1G-GP
Q2804
MMBT3904WT1G-GP
1
2
3
4
5
6
FAN1
ACES-CON4-GP-U1
20.F0714.004
FAN1
ACES-CON4-GP-U1
20.F0714.004
12
C2808
SC390P50V2KX-GP
C2808
SC390P50V2KX-GP
C
B
E
Q2803
MMBT3904WT1G-GP
Q2803
MMBT3904WT1G-GP
12
C2807
SCD1U10V2KX-5GP
DY
C2807
SCD1U10V2KX-5GP
DY
1 2
R2804
0R0402-PAD
R2804
0R0402-PAD
1 2
R2811
0R0402-PAD
R2811
0R0402-PAD
1
AFTP2801AFTP2801
1
2 3
4
RN2801
SRN10KJ-5-GP
RN2801
SRN10KJ-5-GP
12
C2805
SC2200P50V2KX-2GP
C2805
SC2200P50V2KX-2GP
G
S
D
Q2801
2N7002K-2-GP
2ND = 84.2N702.J31
84.2N702.031
Q2801
2N7002K-2-GP
2ND = 84.2N702.J31
84.2N702.031
12
R2801
6K8R2J-GP
R2801
6K8R2J-GP
1
AFTP2805AFTP2805
12
R2805
68R2-GP
R2805
68R2-GP
C
B
E
Q2802
MMBT3904WT1G-GP
Q2802
MMBT3904WT1G-GP
1
2
3
D2802
BAT54PT-GP
2ND = 83.BAT54.D81
83.00054.T81 DY
3rd = 83.BAT54.S81
D2802
BAT54PT-GP
2ND = 83.BAT54.D81
83.00054.T81 DY
3rd = 83.BAT54.S81
12
R2802
0R0805-PAD
R2802
0R0805-PAD
12
C2803
SC390P50V2KX-GP
C2803
SC390P50V2KX-GP
12
R2810
10KR2J-3-GP
DY
R2810
10KR2J-3-GP
DY
12
C2801
SC4D7U6D3V3KX-GP
C2801
SC4D7U6D3V3KX-GP
1
AFTP2806AFTP2806
12
C2804
SC390P50V2KX-GP
DY
C2804
SC390P50V2KX-GP
DY
1
TP2802TP2802
21
D2801
CH551H-30PT-GP
2ND = 83.R5003.I8F
83.R5003.C8F
1st = 83.R5003.J8F
D2801
CH551H-30PT-GP
2ND = 83.R5003.I8F
83.R5003.C8F
1st = 83.R5003.J8F
12
C2802
SC2200P50V2KX-2GP
C2802
SC2200P50V2KX-2GP
1 2
R2809
10KR2J-3-GP
R2809
10KR2J-3-GP
VDD
3
GND 12
SMCLK
9
TACH 10
GPIO2 5
ND2/DP3
15 DP2/DN3
16 DN1
1DP1
2
ALERT#
6SYS_SHDN#
7
PWM 11
SHDN_SEL 13
TRIP_SET 14
GPIO1 4
SMDATA
8GND 17
U2801
EMC2103-2-AP-GP
U2801
EMC2103-2-AP-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KBC_BEEP_R
AUD_PVDD
AUD_SENSE_A
AUD_SDATA_OUT
AUD_SDATAIN
AUD_MIC1_VREFO_L
HDA_CODEC_BITCLK_R
HDA_CODEC_RST#
AUD_DMIC_DATA
AUD_JDREF
HDA_CODEC_RST#
AUD_PVDD
AUD_DMIC_CLK_R
AUD_DMIC_CLK
AUD_PORTF_R
AUD_PORTF_L
AUD_PORTB_R
AUD_PORTB_L
AUD_MIC1_COMBO
AUD_COMBOJACK
AUD_SDATA_OUT
AUD_LDO_CAP
AUD_PVDD
AUD_DVDD
AUD_DVDD AUD_PC_BEEP
AUD_CBP
AUD_CBN
AUD_CPVEE
AUD_PORTA_R
AUD_PORTA_L
AMP_MUTE#
AUD_MIC1_COMBO
AUD_COMBOJACK
AUD_MIC1_VREFO_L
AUD_MIC1_COMBO_R
HDA_CODEC_BITCLK_R
AU_GND
5V_S0
AUD_5V
AU_GND
AU_GND
AU_GND
AUD_5V
AU_GND
3D3V_S0
AU_GND
AU_GND
AU_GND
AUD_5V 5V_S0
AU_GND
3D3V_S0
AU_GND AU_GND AU_GND
AUD_MIC2 58
HDA_CODEC_SYNC 21
HDA_SDIN0 21
KBC_BEEP 27
AUD_MIC2_VREFO 58
AUD_HPOUT_L 82
HDA_SPKR 21
HPOUT_JD 82
AMP_MUTE#27
HDA_CODEC_BITCLK 21
AUD_DMIC_DATA58
AUD_DMIC_CLK58
AUD_SPK_L+58
AUD_SPK_L-58
AUD_SPK_R-58
AUD_SPK_R+58
HDA_CODEC_RST# 21
AUD_HPOUT_R 82
HDA_CODEC_SDOUT21
AUD_MIC1_COMBO_R 82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
AUDIO CODEC
A2
29 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
AUDIO CODEC
A2
29 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
AUDIO CODEC
A2
29 103
Friday, January 06, 2012
<Core Design>
1A
Capacitor Working Voltage
ALC269 having AVDD=5V ±5%, so the capacitors must have a 10V working voltage. A working
voltage of 16V is recommended to provide margin for variations in the application
close to pin27
<<Attention>>
Surges of PVDD >7V duration 0.1ms when
class D amplifier is working may damage
the amplifier, 10uF tantalum capacitors
are required at PVDD1 and PVDD2 to
suppress the surge.
close to pin27
For EMI issue.
Tied at one point only under the
ALC269 or near the ALC269
20100705_AUD
ANALOG
DIGITAL
ANALOG MIC
EXT MIC
EXT MIC
Close to Codec
Close to Codec
Close to Codec
1 2
R2925
22KR2J-GP
R2925
22KR2J-GP
1 2
R2913 0R0805-PADR2913 0R0805-PAD
12
C2906
SC2D2U10V3KX-1GP
C2906
SC2D2U10V3KX-1GP
12
C2909
SC1U6D3V2KX-GP
C2909
SC1U6D3V2KX-GP
1 2
C2914 SC4D7U6D3V3KX-GPC2914 SC4D7U6D3V3KX-GP
12
C2911
SC4D7U6D3V3KX-GP
C2911
SC4D7U6D3V3KX-GP
1 2
R2905 75R2J-1-GPR2905 75R2J-1-GP
12
C2919
SC1U6D3V2KX-GP
C2919
SC1U6D3V2KX-GP
12
C2921
SC100P50V2JN-3GP
C2921
SC100P50V2JN-3GP
12
R2921
10KR2J-3-GP
R2921
10KR2J-3-GP
12
R2917 22R2J-2-GPR2917 22R2J-2-GP
1 2
C2916 SC4D7U6D3V3KX-GP
B Series-MIC
C2916 SC4D7U6D3V3KX-GP
B Series-MIC
12
C2905
SC10U6D3V3MX-GP
C2905
SC10U6D3V3MX-GP
12
C2913
SCD1U10V2KX-5GP
C2913
SCD1U10V2KX-5GP
12
R2916
10KR2J-3-GP
R2916
10KR2J-3-GP
1 2
R2912
39K2R2F-L-GP
R2912
39K2R2F-L-GP
12
C2922
SC33P50V2JN-3GP
DY
C2922
SC33P50V2JN-3GP
DY
12
C2926
SC6D8P50V2DN-GP
DY
C2926
SC6D8P50V2DN-GP
DY
1 2
R2903 0R0805-PADR2903 0R0805-PAD
12
C2910
SCD1U10V2KX-5GP
C2910
SCD1U10V2KX-5GP
12
R2915
4K7R2J-2-GP
R2915
4K7R2J-2-GP
1 2
R2924
22KR2J-GP
R2924
22KR2J-GP
12
C2923
SC33P50V2JN-3GP
DY
C2923
SC33P50V2JN-3GP
DY
1 2
R2906 75R2J-1-GPR2906 75R2J-1-GP
12
C2904
SCD1U10V2KX-5GP
C2904
SCD1U10V2KX-5GP
12
R2914
10KR2J-3-GP
R2914
10KR2J-3-GP
1 2
R2918 0R0402-PADR2918 0R0402-PAD
1 2
R2901 0R0402-PADR2901 0R0402-PAD
1 2
R2909
20KR2F-L-GP
R2909
20KR2F-L-GP
12
C2912
SCD1U10V2KX-5GP
C2912
SCD1U10V2KX-5GP
1 2
C2907
SC10U6D3V3MX-GP
C2907
SC10U6D3V3MX-GP
12
C2924
SC22P50V2JN-4GP
DY
C2924
SC22P50V2JN-4GP
DY
12
C2920
SCD1U10V2KX-5GP
C2920
SCD1U10V2KX-5GP
1 2
R2922 2K2R2J-2-GPR2922 2K2R2J-2-GP
DVDD1
1
GPIO0/DMIC-DATA
2
GPIO1/DMIC-CLK
3
PD#
4
SDATA-OUT
5
BIT-CLK
6
DVSS2
7
SDATA-IN
8
DVDD-IO
9
SYNC
10
RESET#
11
PCBEEP
12
SENSE_A 13
LINE2-L 14
LINE2-R 15
MIC2-L 16
MIC2-R 17
SENSE_B 18
JDREF 19
MONO-OUT 20
MIC1-L 21
MIC1-R 22
LINE1-L 23
LINE1-R 24
AVDD1 25
AVSS1 26
VREF 27
LDO-CAP 28
MIC2-VREFO 29
MIC1-VREFO-R 30
MIC1-VREFO-L 31
HP-OUT-L 32
HP-OUT-R 33
CPVEE 34
CBN 35
CBP 36
AVSS2
37
AVDD2
38
PVDD1
39
SPK-L+
40
SPK-L-
41
PVSS1
42
PVSS2
43
SPK-R-
44
SPK-R+
45
PVDD2
46
EAPD/COMBO_JACK
47
SPDIFO
48
GND
49
U2901
ALC269Q-VC-GR-GP
U2901
ALC269Q-VC-GR-GP
12
R2920
4K7R2J-2-GP
DY
R2920
4K7R2J-2-GP
DY
12
C2927
SC10U6D3V3MX-GP
DY
C2927
SC10U6D3V3MX-GP
DY
12
R2919 0R0402-PADR2919 0R0402-PAD
12
C2925
SC6D8P50V2DN-GP
DY
C2925
SC6D8P50V2DN-GP
DY
12
C2928
SC10U6D3V3MX-GP
C2928
SC10U6D3V3MX-GP
12
C2918
SCD1U10V2KX-5GP
C2918
SCD1U10V2KX-5GP
1 2
R2902 0R5J-5-GPR2902 0R5J-5-GP
1 2
C2915 SC4D7U6D3V3KX-GPC2915 SC4D7U6D3V3KX-GP
1 2
R2923 1KR2J-1-GPR2923 1KR2J-1-GP
12
C2902
SC10U6D3V3MX-GP
C2902
SC10U6D3V3MX-GP
12
C2901
SC4D7U6D3V3KX-GP
C2901
SC4D7U6D3V3KX-GP
1 2
R2904 0R0805-PADR2904 0R0805-PAD
1 2
C2917 SC4D7U6D3V3KX-GP
B Series-MIC
C2917 SC4D7U6D3V3KX-GP
B Series-MIC
12
C2908
SC2D2U10V3KX-1GP
C2908
SC2D2U10V3KX-1GP
12
C2903
SCD1U10V2KX-5GP
C2903
SCD1U10V2KX-5GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
30 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
30 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
30 103Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_RSET
LAN_XTAL0
1D05V_LAN_EVDD10
LAN_XTAL1
GPO
1D05V_LAN_REGOUT
LAN_EEDI
LAN_EEDO
LAN_EECS
RTL_ISOLATE#
LAN_EECS
LAN_EEDI
SMB_LAN_DATA
LAN_XTAL1
LAN_XTAL0
RTL_ISOLATE#
LAN_PWR_ON_T
1D05V_LAN_REGOUT
GPO
LAN_ENSWREG
1D05V_LAN_EVDD10
PCIE_RXP4_C
PCIE_RXN4_C
SMB_LAN_DATA
LAN_CLKREQ#
1D05V_LAN_S5
3D3V_S0
3D3V_LAN_S5 3D3V_LAN_S5
1D05V_LAN_S5 1D05V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_VDDSREG
1D05V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_VDDSREG
1D05V_LAN_S5
1D05V_LAN_S5
1D05V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_S5
3D3V_LAN_S5
3D3V_LAN_S5
1D05V_LAN_S5
MDI2+59 MDI2-59
MDI3+59 MDI3-59
PLT_RST# 5,18,27,36,65,66,71,80,82,83,97
PCIE_WAKE# 19,65,66
MDI0+59 MDI0-59
MDI1+59 MDI1-59
LAN_PWR_ON27
LAN_ACT_LED# 59
SPEED_100# 59
CLK_PCIE_LAN20CLK_PCIE_LAN#20
PCIE_RXP420
PCIE_RXN420
PCIE_TXN420 PCIE_TXP420
PCIE_CLK_LAN_REQ#20
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LAN RTL8111F
A2
31 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LAN RTL8111F
A2
31 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LAN RTL8111F
A2
31 103
Friday, January 06, 2012
<Core Design>
High:Link up
C3104 change to 4.7uF X5R
type capacitor
Low:Link down
L3102 adopt spec.
main pwr if have no ASF
The SM DATA with 10K ohm pull GND.
R3125 For Enable Switch Regulator.
R3124 For Disable Switch Regulator.
Layout Note: Close to U3101 pin C3130 ~ C3134,C3138,C3139
For VDD10 pins - 3, 6, 9, 13, 29, 41, 45.
Layout Note: C3128&C3149
Close to U3101 pin21
Layout Note: C3135, C3140~C3144 Close to U3101 pin
For VDD33 pins - 12, 27, 39, 42, 47, 48.
Make sure PCIE_Wake# & PCIE_CLK_LAN_RQ1#connected to 10K
resistor pull high close to PCH side
25MHz XTAL
71.08111.N03, IC PCIE CTRL RTL8111F-CGT QFN 48P
71.08111.J03, IC PCI-E RTL8111E-VL-CGT QFN 48P
8111F can use GPIO to inform system to do LAN PHY power down.
VB480
VB580
C3103 C3148
12pF
12pF
12pF
15pF
78.12034.1FL
78.15034.1FL
1 2
R3131
0R0603-PAD
R3131
0R0603-PAD
12
C3130
SCD1U10V2KX-4GP
C3130
SCD1U10V2KX-4GP
1 2
R3126 10KR2J-3-GPR3126 10KR2J-3-GP
12
C3142
SCD1U10V2KX-4GP
C3142
SCD1U10V2KX-4GP
1 2
R3123 2K49R2F-GPR3123 2K49R2F-GP
12
C3133
SCD1U10V2KX-4GP
C3133
SCD1U10V2KX-4GP
12
C3146
SC4D7U6D3V3KX-GP
C3146
SC4D7U6D3V3KX-GP
12
C3151
SCD1U10V2KX-4GP
C3151
SCD1U10V2KX-4GP
12
C3152
SCD1U10V2KX-4GP
C3152
SCD1U10V2KX-4GP
1 2
R3128 10KR2J-3-GPR3128 10KR2J-3-GP
12
C3138
SCD1U10V2KX-4GP
C3138
SCD1U10V2KX-4GP
12
C3103
SC12P50V2JN-3GP
BOM CTRL
C3103
SC12P50V2JN-3GP
BOM CTRL
1 2
R3120 1KR2J-1-GPR3120 1KR2J-1-GP
1 2
C3147
SCD1U10V2KX-4GP
C3147
SCD1U10V2KX-4GP
1 2
R3135 0R5J-5-GP
DY
R3135 0R5J-5-GP
DY
1 2
L3102
IND-4D7UH-192-GP
L3102
IND-4D7UH-192-GP
12
C3131
SCD1U10V2KX-4GP
C3131
SCD1U10V2KX-4GP
12
R31210R0402-PAD R31210R0402-PAD
12
C3143
SCD1U10V2KX-4GP
C3143
SCD1U10V2KX-4GP
12
C3134
SCD1U10V2KX-4GP
C3134
SCD1U10V2KX-4GP
1 2
R3122 10KR2J-3-GPR3122 10KR2J-3-GP
12
C3139
SCD1U10V2KX-4GP
C3139
SCD1U10V2KX-4GP
12
R3133
100KR2J-1-GP
R3133
100KR2J-1-GP
1 2
R3130 1M1R2J-GPR3130 1M1R2J-GP
12
R3119
15KR2F-GP
R3119
15KR2F-GP
12
R3136
1KR2J-1-GP
R3136
1KR2J-1-GP
12
C3144
SCD1U10V2KX-4GP
C3144
SCD1U10V2KX-4GP
12
C3135
SCD1U10V2KX-4GP
C3135
SCD1U10V2KX-4GP
12
C3128
SC1U10V2KX-1GP
C3128
SC1U10V2KX-1GP
1
TP3102TP3102
1 2
R3125 0R0402-PADR3125 0R0402-PAD
12
C3150
SC1U10V2KX-1GP
C3150
SC1U10V2KX-1GP
12
C3140
SCD1U10V2KX-4GP
C3140
SCD1U10V2KX-4GP
DVDD10
13
GND
24
HSIP
17
HSIN
18
REFCLK_P
19
REFCLK_N
20
EVDD10
21
HSOP
22
HSON
23
SMBCLK
14
SMBDATA
15
CLKREQ#
16
AVDD10
3
MDIP0
1
MDIN0
2
AVDD10
6
MDIP1
4
MDIN1
5
AVDD10
9
MDIP2
7
MDIN2
8
AVDD33
12
MDIP3
10
MDIN3
11
REGOUT 36
VDDREG 35
VDDREG 34
ENSWREG 33
EEDI/SDA 32
LED3/EEDO 31
EECS/SCL 30
DVDD10 29
DVDD33 27
ISOLATE# 26
PERST# 25
LANWAKE# 28
AVDD33 48
AVDD33 47
RSET 46
AVDD10 45
CKXTAL2 44
CKXTAL1 43
AVDD33 42
DVDD10 41
LED0 40
DVDD3 39
GPO/SMBALERT 38
LED1/EESK 37
GND
49
U3101
RTL8111F-CGT-GP
U3101
RTL8111F-CGT-GP
D
G
S
Q3103
AO3419L-GP
3rd = 84.03334.031
2nd = 84.00048.031
84.03419.031
Q3103
AO3419L-GP
3rd = 84.03334.031
2nd = 84.00048.031
84.03419.031
12
R3124
0R2J-2-GP
DY
R3124
0R2J-2-GP
DY
12
C3129
SCD1U10V2KX-4GP
C3129
SCD1U10V2KX-4GP
12
C3149
SCD1U10V2KX-4GP
C3149
SCD1U10V2KX-4GP
1 2
C3145
SCD1U10V2KX-4GP
C3145
SCD1U10V2KX-4GP
12
C3137
SC4D7U6D3V3KX-GP
C3137
SC4D7U6D3V3KX-GP
12
C3148
SC12P50V2JN-3GP
C3148
SC12P50V2JN-3GP
12
C3141
SCD1U10V2KX-4GP
C3141
SCD1U10V2KX-4GP
G
S
D
Q3104
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q3104
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
12
C3132
SCD1U10V2KX-4GP
C3132
SCD1U10V2KX-4GP
4 1
23
X3101
XTAL-25MHZ-155-GP
82.30020.D41
2nd = 82.30020.G71
3rd = 82.30020.G61
X3101
XTAL-25MHZ-155-GP
82.30020.D41
2nd = 82.30020.G71
3rd = 82.30020.G61
12
C3136
SCD1U10V2KX-4GP
C3136
SCD1U10V2KX-4GP
1 2
R3134
0R0603-PAD
R3134
0R0603-PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
R5U220 (CARD READER)
A1
32 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
R5U220 (CARD READER)
A1
32 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
R5U220 (CARD READER)
A1
32 103
Friday, January 06, 2012
<Core Design>
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
33 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
33 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
33 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
34 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
34 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
34 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB 3.0 Controller
A4
35 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB 3.0 Controller
A4
35 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB 3.0 Controller
A4
35 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUN_ENABLE_ALL_G
Z_12V
PM_SLP_S3 PM_SLP_S3#
Z_12V_D4
Z_12V_G3
1D05V_VTT
3D3V_S5
RUN_ENABLE
1D5V_S0 1D5V_S3
3D3V_S0 3D3V_S5
5V_S0 5V_S5
DCBATOUT
3D3V_AUX_S5
PLT_RST#5,18,27,31,65,66,71,80,82,83,97
H_THERMTRIP# 5,22
PURE_HW_SHUTDOWN# 27,28,86
S5_ENABLE 27,97
3V_5V_EN41
PM_SLP_S3#19,27,37,47
PS_S3CNTRL 37,97
PM_SLP_S3#19,27,37,47
IMVP_PWRGD28,42
PM_SLP_S3#19,27,37,47
SYS_PWROK 19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Power Plane Enable
A1
36 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Power Plane Enable
A1
36 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Power Plane Enable
A1
36 103Friday, January 06, 2012
<Core Design>
R3614
CRB : 1K
Power Sequence
Total= 11.39A
1D5V_S0
MAX Current 3000 mA
Design Current 2100 mA
Run Power
12
R3602
200KR2F-L-GP
DY
R3602
200KR2F-L-GP
DY
12
C3602
SCD1U10V2KX-5GP
C3602
SCD1U10V2KX-5GP
C
B
E
Q3601
MMBT2222A-3-GP
Q3601
MMBT2222A-3-GP
12
C3612
SCD01U50V2KX-1GP
DY
C3612
SCD01U50V2KX-1GP
DY
1 2
R3603 2KR2F-3-GPR3603 2KR2F-3-GP
12
R3621
330KR2J-L1-GP
R3621
330KR2J-L1-GP
1
2
34
5
6
Q3605
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q3605
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1 2
R3614
1KR2F-3-GP
R3614
1KR2F-3-GP
1 2
C3607 SCD1U50V3KX-GP
DY
C3607 SCD1U50V3KX-GP
DY
12
R3632
2K2R2J-2-GP
R3632
2K2R2J-2-GP
1 2
R3612 10KR2J-3-GPR3612 10KR2J-3-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
U3601
AO4468-GP
84.04468.037
2nd = 84.08882.037
S
S
S
G D
D
D
D
U3601
AO4468-GP
84.04468.037
2nd = 84.08882.037
12
C3606
SCD22U25V3KX-GP
C3606
SCD22U25V3KX-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
U3602
AO4468-GP
84.04468.037
2nd = 84.08882.037
S
S
S
G D
D
D
D
U3602
AO4468-GP
84.04468.037
2nd = 84.08882.037
G
S
D
Q3606
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q3606
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
1
2
3
D3601
BAS16-6-GP
2ND = 83.00016.M11
83.00016.K11
3rd = 83.00016.N11
D3601
BAS16-6-GP
2ND = 83.00016.M11
83.00016.K11
3rd = 83.00016.N11
A K
D3602
MMPZ5239BPT-GP
83.9R103.D3F
D3602
MMPZ5239BPT-GP
83.9R103.D3F
1 2
R3608 100KR2J-1-GPR3608 100KR2J-1-GP
1 2
R3616
4K7R2J-2-GP
R3616
4K7R2J-2-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
U3606
AO4468-GP
84.04468.037
2nd = 84.08882.037
S
S
S
G D
D
D
D
U3606
AO4468-GP
84.04468.037
2nd = 84.08882.037
G
S D
Q3604
NDS0610-NL-GP
2ND = 84.00610.C31
84.S0610.B31
Q3604
NDS0610-NL-GP
2ND = 84.00610.C31
84.S0610.B31
1
2
3
D3603
BAS16-6-GP
2ND = 83.00016.M11
83.00016.K11
3rd = 83.00016.N11
D3603
BAS16-6-GP
2ND = 83.00016.M11
83.00016.K11
3rd = 83.00016.N11
1 2
R3622
56R2J-4-GP
DY
R3622
56R2J-4-GP
DY
1 2
R3626 0R0402-PADR3626 0R0402-PAD
12
R3617
100KR2J-1-GP
R3617
100KR2J-1-GP
1
TP3601TP3601
G
S
D
Q3603
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3603
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1 2
R3618 330KR2J-L1-GPR3618 330KR2J-L1-GP
12
R3620
10KR2J-3-GP
R3620
10KR2J-3-GP
12
C3611
SCD01U50V2KX-1GP
C3611
SCD01U50V2KX-1GP
1 2
R3619 10KR2J-3-GPR3619 10KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PS_S3CNTRL
Q3702_D
Q3701_D
SM_DRAMRST#_D
VDDPWRGOOD_R
VDDPWRGOOD_D
PM_DRAM_PWRGD_R
0D75V_EN
0D75V_EN
SM_DRAMRST#_R
1D5V_S00D75V_S0
1D5V_S3
3D3V_S5
1D5V_S0
PS_S3CNTRL36,97
+V_SM_VREF_CNT 9
DDR3_DRAMRST# 14,15
DRAMRST_CNTRL_PCH 12,20
SM_DRAMRST#5
PM_DRAM_PWRGD19
VDDPWRGOOD 5
PS_S3CNTRL36,97
0D75V_EN 46
PS_S3CNTRL36,97
1.05VTT_PWRGD 45,48
PM_SLP_S3#19,27,36,47
PM_SLP_S3# 19,27,36,47
+V_SM_VREF12
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
ADAPTER
A3
37 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
ADAPTER
A3
37 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
ADAPTER
A3
37 103Friday, January 06, 2012
<Core Design>
Close to CPU
S3 Power Reduction Circuit Processor VREF_DQ Implementation
Close to DIMM
S3 Power Reduction Circuit SM_DRAMPWROK
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
S3 Power Reduction Circuit
SM_DRAMRST#
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
OD AND gate required
SM_DRAMPWROK must have a maximum of 15ns rise or fall time
over VDDQ * 0.55± 200mV and the edge must be monotonic
5
S3 Power Reduction
add 0.1uF
FROM M1/M3
DEL R3714
R3705 ->100K
DY C3701
12
R3720
0R2J-2-GP
DY
R3720
0R2J-2-GP
DY
12
R3713
200R2F-L-GP
R3713
200R2F-L-GP
12
C3705
SCD1U10V2KX-5GP
DY
C3705
SCD1U10V2KX-5GP
DY
G
S
D
Q3701
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q3701
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
1 2
R3716 22R2J-2-GP
DY
R3716 22R2J-2-GP
DY
12
R3704
220R2J-L2-GP
DY
R3704
220R2J-L2-GP
DY
1 2
R3709 0R2J-2-GP
DY
R3709 0R2J-2-GP
DY
1 2
R3711
0R0402-PAD
R3711
0R0402-PAD
1 2
R3719
130R2F-1-GP
R3719
130R2F-1-GP
12
C3701
SCD1U10V2KX-4GP
DY
C3701
SCD1U10V2KX-4GP
DY
12
R3705
100KR2J-1-GP
R3705
100KR2J-1-GP
12
R3706
1KR2F-3-GP
R3706
1KR2F-3-GP
G
S
D
Q3704
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q3704
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
12
C3704
SCD1U10V2KX-5GP
DY
C3704
SCD1U10V2KX-5GP
DY
12
C3702
SC100P50V2JN-3GP
DY
C3702
SC100P50V2JN-3GP
DY
1 2
R3707 0R2J-2-GP
DY
R3707 0R2J-2-GP
DY
G
S
D
Q3702
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
DY
Q3702
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
DY
12
C3703
SCD047U16V2KX-1-GP
C3703
SCD047U16V2KX-1-GP
12
R3703
22R2J-2-GP
R3703
22R2J-2-GP
1 2
R3712
1KR2F-3-GP
R3712
1KR2F-3-GP
12
R3710
0R0402-PAD
R3710
0R0402-PAD
G
S
D
Q3708
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q3708
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
G
S
D
Q3707
2N7002K-2-GP
DY
84.2N702.J31
2ND = 84.2N702.031
Q3707
2N7002K-2-GP
DY
84.2N702.J31
2ND = 84.2N702.031
12
R3708
200R2F-L-GP
R3708
200R2F-L-GP
G
S
D
Q3703
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q3703
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
12
R3722
39R2J-L-GP
DY
R3722
39R2J-L-GP
DY
1 2
R3715 0R0402-PADR3715 0R0402-PAD
IN B
1
IN A
2
GND
3OUT Y 4
VCC 5
U3701
74VHC1G09DFT2G-GP
73.01G09.AAH
3rd = 73.01G09.BAH
2nd = 73.01G09.0AB
U3701
74VHC1G09DFT2G-GP
73.01G09.AAH
3rd = 73.01G09.BAH
2nd = 73.01G09.0AB
12
R3701
4K99R2F-L-GP
DY
R3701
4K99R2F-L-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AD+_2
ADT_TYPE_R
AD_JK_F
AD_OFF#_1
ADT_TYPE_R
AD_JK_F
ADT_TYPE_R1
GND
AD+
AD_JK
3D3V_AUX_KBC
AD_OFF27
AD_DETECT 27
ADT_TYPE 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
DCIN_JACK
A3
38 103Friday, January 06, 2012
LA480
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
DCIN_JACK
A3
38 103Friday, January 06, 2012
LA480
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
DCIN_JACK
A3
38 103Friday, January 06, 2012
LA480
<Core Design>
Adaptor in to generate DCBATOUT
DCIN14 for 14" VB480 & VB485
DCIN15 for 15" VB580 & VB585
Id= -10A
Qg= -22nC
Rdson=14~22mohm
12
R3801
274R2F-GP
R3801
274R2F-GP
1
2
3
4
5
6
7
8
9
10
DCIN14
MLX-CONN10-4-GP
21.D0241.205
DCIN14
MLX-CONN10-4-GP
21.D0241.205
12
PC3802
SC1U50V5ZY-1-GP
PC3802
SC1U50V5ZY-1-GP
1
AFTP3805AFTP3805
12
PR3804
34K8R2F-1-GP
DY
PR3804
34K8R2F-1-GP
DY
1 2
PR3806
0R0402-PAD
PR3806
0R0402-PAD
1
AFTP3802AFTP3802
12
PR3803
200KR2F-L-GP
DY
PR3803
200KR2F-L-GP
DY
12
PC3806
SCD1U50V3KX-GP
DY
PC3806
SCD1U50V3KX-GP
DY
12
C3802
SC1KP50V2KX-1GP
C3802
SC1KP50V2KX-1GP
1 2
3
PD3802
BAV99-8-GP
PD3802
BAV99-8-GP
12
PR3802
100KR2J-1-GP
PR3802
100KR2J-1-GP
1
AFTP3801AFTP3801
12
PC3807
SCD1U50V3KX-GP
PC3807
SCD1U50V3KX-GP
1
AFTP3804AFTP3804
E
BC
R1
R2
PQ3802
PDTA124EU-1-GP
84.00124.K1K
2ND = 84.00024.01K
R1
R2
PQ3802
PDTA124EU-1-GP
84.00124.K1K
2ND = 84.00024.01K
12
PC3803
SCD1U50V3KX-GP
DY
PC3803
SCD1U50V3KX-GP
DY
12
PR3801
200KR2F-L-GP
PR3801
200KR2F-L-GP
A K
PD3801
P6SBMJ27APT-GP
83.P6SBM.DAG
3TH = 83.P6SMB.CAG
2ND = 83.P6SMB.JAG
PD3801
P6SBMJ27APT-GP
83.P6SBM.DAG
3TH = 83.P6SMB.CAG
2ND = 83.P6SMB.JAG
1
AFTP3806AFTP3806
1
AFTP3803AFTP3803
12
PC3801
SCD1U50V3KX-GP
DY
PC3801
SCD1U50V3KX-GP
DY
1 2
F3801
FUSE-7A24V-5-GP
F3801
FUSE-7A24V-5-GP
E
BC
R1
R2
PQ3801
PDTC124EU-1-GP
84.00124.H1K
2ND = 84.00124.X1K
R1
R2
PQ3801
PDTC124EU-1-GP
84.00124.H1K
2ND = 84.00124.X1K
12
PR3805
100KR2J-1-GP
DY
PR3805
100KR2J-1-GP
DY
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU3801
AO4407AL-GP
84.04407.G37
S
S
S
G D
D
D
D
PU3801
AO4407AL-GP
84.04407.G37
12
C3801
SC100P50V2JN-3GP
C3801
SC100P50V2JN-3GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT+
BATA_SCL_1
BATA_SDA_1
BAT_IN#_1
BAT_SCL
BAT_SDA
BAT_IN#
BATA_SCL_1
BAT_IN#_1
BATA_SDA_1
BT+
3D3V_AUX_KBC
BT+
BAT_IN#27
BAT_SCL27,40 BAT_SDA27,40
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
BATT_CONN
39 103Friday, January 06, 2012
LA480
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
BATT_CONN
39 103Friday, January 06, 2012
LA480
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
BATT_CONN
39 103Friday, January 06, 2012
LA480
<Core Design>
DY on LAB stage
BATTERY CONNECTOR
Varistor
Swap for V480
ME change P/N at SIT
Old 20.81529.007
Nwq 20.81720.007
1
2
3
4 5
6
7
8
RN3901
SRN33J-7-GP
RN3901
SRN33J-7-GP
12
PC3904
SC10P50V2JN-4GP
PC3904
SC10P50V2JN-4GP
12
PC3905
SC470P50V2KX-3GP
PC3905
SC470P50V2KX-3GP
1
AFTP3908AFTP3908
KA
PD3901
MMPZ5232BPT-GP-U
83.5R603.D3F
2ND = 83.5R603.Q3F
PD3901
MMPZ5232BPT-GP-U
83.5R603.D3F
2ND = 83.5R603.Q3F
1
AFTP3910AFTP3910
1
AFTP3906AFTP3906
1
AFTP3903AFTP3903
1
AFTP3909AFTP3909
12
PL3903
MLVS0402M04-GP
DY
PL3903
MLVS0402M04-GP
DY
12
PL3901
MLVS0402M04-GP
DY
PL3901
MLVS0402M04-GP
DY
BAT_VCC
1
BAT_VCC
2
I2C_CLK
3
I2C_DAT
4
TEMP
5
GND
6
GND
7
GND
8
GND
9
BAT1
ALP-CON7-33-GP
20.81720.007
BAT1
ALP-CON7-33-GP
20.81720.007
12
PL3902
MLVS0402M04-GP
DY
PL3902
MLVS0402M04-GP
DY
1 2
3
D3903
BAV99-8-GP
DY
D3903
BAV99-8-GP
DY
1
AFTP3907AFTP3907
1
AFTP3902AFTP3902
12
PC3903
SC10P50V2JN-4GP
PC3903
SC10P50V2JN-4GP
1
AFTP3904AFTP3904
1 2
3
D3902
BAV99-8-GP
DY
D3902
BAV99-8-GP
DY
1
AFTP3905AFTP3905
12
PC3901
SCD1U50V3KX-GP
PC3901
SCD1U50V3KX-GP
1 2
3
D3901
BAV99-8-GP
DY
D3901
BAV99-8-GP
DY
12
PC3902
SC2200P50V2KX-2GP
PC3902
SC2200P50V2KX-2GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BQ24737_CMPIN
PWR_CHG_IOUT
BQ24737_REGN_R
BQ24737_CMPOUT
BQ24737_ILIM
BQ24737_HIDRV
BQ24737_PHASE
BQ24737_CMPOUT
BT+_R
BQ24737_CSOP_1
AC_IN#
PWR_CHG_ACN
PWR_CHG_ACP
BQ24737_BTSTBQ24737_ACDET
AC_IN
AD+_G_2
PWR_CHG_IOUT
AD+_G_1
DC_IN_D
BQ24737_CSON_1
BQ24737_VCC
BQ24737_SRP
BQ24737_SRN
AC_IN#
AC_IN
BAT_SDA
BAT_SCL
BQ24737_LODRV
DCBATOUT_L
DCBATOUT
DCBATOUTAD+_TO_SYS
AD+
CHG_AGND
CHG_AGND
CHG_AGND
CHG_AGND
BT+
AD+
BT+
CHG_AGND
AD_JK
CHG_AGND
3D3V_AUX_S5
CHG_AGND
BQ24737_REGN
3D3V_AUX_S5
3D3V_AUX_S5
3D3V_AUX_S5
3D3V_AUX_S5
CHG_AGND
CHG_AGND
BQ24737_REGN
CHG_AGND
BQ24737_REGN
3D3V_AUX_S5 CHG_AGND
BAT_SDA27,39
BAT_SCL27,39
AD_IA 27
STOP_CHG#27
CHG_ON# 27
AC_IN#27
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
40 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
40 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
40 103Friday, January 06, 2012
<Core Design>
100K90w
120w
AD+ total power
118k
60.4k
100K
R2R1
12.4K
100K
100K
80w
65w
A8( ANNIE/ASTRO)
PR4007,PR4008
41.2k
STOP_CHG#
connects to KBC R1
R2
Charger Current=1.4~3.6A
SSID = Charger
Id= -10A
Qg= -22nC
Rdson=14~22mohm
Id= -10A
Qg= -22nC
Rdson=14~22mohm
64.12425.6DL
64.60425.6DL
12
PC4007
SCD01U50V2KX-1GP
PC4007
SCD01U50V2KX-1GP
12
PR4032
100KR2J-1-GP
PR4032
100KR2J-1-GP
12
PR4008
100KR2F-L1-GP
PR4008
100KR2F-L1-GP
1 2
PR4034 3K3R2J-3-GP
DY
PR4034 3K3R2J-3-GP
DY
12
PR4030
100KR2J-1-GP
PR4030
100KR2J-1-GP
G
S D
PQ4008
2N7002A-7-GP
2ND = 84.2N702.D31
84.2N702.E31
PQ4008
2N7002A-7-GP
2ND = 84.2N702.D31
84.2N702.E31
ILIM
10
VCC
20
GND
14
SCL
9
SDA
8
ACDET
6
IOUT 7
ACOK#
5
ACP 2
ACN 1
BTST 17
REGN 16
HIDRV 18
PHASE 19
LODRV 15
CMPIN
4
SRN 12
CMPOUT
3
SRP 13
GND
21
BM#
11
PU4003
BQ24737RGRR-GP
PU4003
BQ24737RGRR-GP
12
PR4014
120KR2F-L-GP
PR4014
120KR2F-L-GP
1 2
PR4018
0R0402-PAD
PR4018
0R0402-PAD
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4002
AO4407AL-GP
84.04407.G37
S
S
S
G D
D
D
D
PU4002
AO4407AL-GP
84.04407.G37
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4004
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4004
SIS412DN-T1-GE3-GP
12
PC4004
SCD1U50V3KX-GP
PC4004
SCD1U50V3KX-GP
12
PC4016
SCD1U50V3KX-GP
PC4016
SCD1U50V3KX-GP
12
PG4001
GAP-CLOSE-PWR-3-GP
PG4001
GAP-CLOSE-PWR-3-GP
12
PC4017
SCD1U50V3KX-GP
PC4017
SCD1U50V3KX-GP
12
PC4001
SC1U25V5KX-1GP
PC4001
SC1U25V5KX-1GP
12
PC4024
SC10U25V5KX-GP
PC4024
SC10U25V5KX-GP
1 2
PR4025
10R2F-L-GP
PR4025
10R2F-L-GP
G
S D
PQ4005
2N7002A-7-GP
PQ4005
2N7002A-7-GP
K A
PD4003
CH520S-30PT-GP
2nd = 83.1R003.N8F
3rd = 83.R2003.B8M
1st = 83.R2003.P8F
PD4003
CH520S-30PT-GP
2nd = 83.1R003.N8F
3rd = 83.R2003.B8M
1st = 83.R2003.P8F
12
PC4005
SC10U25V5KX-GP
PC4005
SC10U25V5KX-GP
12
PC4019
SC10U25V5KX-GP
PC4019
SC10U25V5KX-GP
12
PR4029
100KR2J-1-GP
PR4029
100KR2J-1-GP
1 2
PG4003
GAP-CLOSE-PWR-3-GP
PG4003
GAP-CLOSE-PWR-3-GP
12
PC4025
SC470P50V2KX-3GP
PC4025
SC470P50V2KX-3GP
1 2
PR4024
7D5R2F-GP
PR4024
7D5R2F-GP
1 2
PL4001
IND-5D6UH-48-GP-U1
PL4001
IND-5D6UH-48-GP-U1
12
PR4001
10KR2F-2-GP
PR4001
10KR2F-2-GP
12
PR4007
12K4R2F-GP
BOM CTRL
PR4007
12K4R2F-GP
BOM CTRL
12
PC4023
SCD1U25V2KX-GP
PC4023
SCD1U25V2KX-GP
12
PC4020
SC10U25V5KX-GP
PC4020
SC10U25V5KX-GP
1 2
PR4009
10KR2F-2-GP
PR4009
10KR2F-2-GP
12
PG4002
GAP-CLOSE-PWR-3-GP
PG4002
GAP-CLOSE-PWR-3-GP
12
PC4003PC4003
12
PC4022
SCD1U50V3KX-GP
PC4022
SCD1U50V3KX-GP
12
PR4002
100KR2J-1-GP
PR4002
100KR2J-1-GP
12
PR4003
49K9R2F-L-GP
PR4003
49K9R2F-L-GP
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
PU4001
AO4407AL-GP
84.04407.G37
S
S
S
GD
D
D
D
PU4001
AO4407AL-GP
84.04407.G37
12
PR4022
10KR2F-2-GP
DY
PR4022
10KR2F-2-GP
DY
12
PR4005
470KR2J-2-GP
PR4005
470KR2J-2-GP
12
PR4016
3D3MR2J-GP
PR4016
3D3MR2J-GP
1 2
PC4009
SC1U10V2KX-1GP
PC4009
SC1U10V2KX-1GP
12
PR4026
33KR2F-GP
DY
PR4026
33KR2F-GP
DY
12
PC4021
SC10U25V5KX-GP
PC4021
SC10U25V5KX-GP
12
PC4002
SCD1U50V3KX-GP
PC4002
SCD1U50V3KX-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4005
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4005
SIS412DN-T1-GE3-GP
12
PR4006
316KR3F-2-GP
PR4006
316KR3F-2-GP
12
PR4011
100KR2J-1-GP
PR4011
100KR2J-1-GP
1 2
L4001
BLM18PG330SN1D-GP
68.00143.041
L4001
BLM18PG330SN1D-GP
68.00143.041
12
PC4006
SCD1U25V2KX-GP
PC4006
SCD1U25V2KX-GP
1 2
PG4004
GAP-CLOSE-PWR-3-GP
PG4004
GAP-CLOSE-PWR-3-GP
1 2
PR4017
D01R3721F-GP-U
PR4017
D01R3721F-GP-U
12
PR4010
49K9R2F-L-GP
PR4010
49K9R2F-L-GP
G
S D
PQ4007
2N7002A-7-GP
PQ4007
2N7002A-7-GP
12
PC4011
SC220P50V2KX-3GP
PC4011
SC220P50V2KX-3GP
12
PR4020
100KR2J-1-GP
PR4020
100KR2J-1-GP
1 2
PR4019
0R2J-2-GP
PR4019
0R2J-2-GP
1 2
L4002
BLM18PG330SN1D-GP
68.00143.041
L4002
BLM18PG330SN1D-GP
68.00143.041
1
2
3 4
5
6
PQ4001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
PQ4001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1 2
PR4004
D01R3721F-GP-U
PR4004
D01R3721F-GP-U
1 2
PR4015
20R5F-1GP
PR4015
20R5F-1GP
1 2
PR4033 3K3R2J-3-GP
DY
PR4033 3K3R2J-3-GP
DY
1 2
PR4013
0R0402-PAD
PR4013
0R0402-PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_3D3V_FB2
PWR_5V3D3V_VREG3
PWR_5V_FB1
PWR_5V_LL1
PWR_3D3V_VBST2
PWR_5V_SNUB
PWR_5V_DRVH1
PWR_5V_DRVL1
PWR_3D3V_DRVH2
PWR_5V_VO1
PWR_3D3V_LL2
PWR_5V_VBST1
PWR_5V_FB1_RPWR_3D3V_FB2_R
PWR_3D3V_CS2
PWR_3D3V_VBST2_1
PWR_3D3V_EN2
PWR_5V_EN1
PWR_3D3V_SNUB
PWR_5V_VBST1_1
PWR_5V_EN1
PWR_5V_CS1
PWR_3D3V_EN2
DCBATOUT_UVP_1
DCBATOUT_UVP_2
PWR_3D3V_DRVL2
3D3V_PWR_2
3D3V_PWR
DCBATOUT_PW R_3D3V DCBATOUT
3D3V_PWR
3D3V_PWR_2
3D3V_S5
DCBATOUT_PW R_5V
5V_PWR_2
3D3V_AUX_S5
5V_PWR 5V_S5
5V_PWR
DCBATOUT_PW R_3D3V
DCBATOUT
3D3V_S5
DCBATOUT_PW R_5V
DCBATOUT
DCBATOUTDCBATOUT 3D3V_PWR_2
3V_5V_EN 36
3V_5V_POK19
ECRST# 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51123_5V_3D3V
41 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51123_5V_3D3V
41 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51123_5V_3D3V
41 103Friday, January 06, 2012
<Core Design>
Close to VFB Pin (pin5)
Close to VFB Pin (pin2)
D
S G
G
D
S
G
D
D
SG
S
SSID = PWR.Plane.Regulator_5v3p3v
Cyntec. 3.3uH 6.5*6.9*3
DCR=28~30mohm
Idc=6A, Isat=13.5A
Design Current=5.25A
OCP>7.8A
Cyntec. 2.2uH 7.3*6.6*3
DCR=18~20mohm
Idc=8A, Isat=14A
Design Current=5.25A
OCP>7.8A
Id=12A, Qg=3.8nC,
Rdson=24~30 mohm
Id=12A, Qg=3.8nC,
Rdson=24~30 mohm
Id=12A, Qg=3.8nC,
Rdson=24~30 mohm
Id=16A, Qg=7.3nC,
Rdson=13.5~16.5 mohm
Vz=5.1V
12
PC4110
SCD1U50V3KX-GP
PC4110
SCD1U50V3KX-GP
12
PR4125
40K2R2F-GP
DY
PR4125
40K2R2F-GP
DY
1 2
PC4118
SCD1U50V3KX-GP
PC4118
SCD1U50V3KX-GP
12
PC4111
SC10U25V5KX-GP
PC4111
SC10U25V5KX-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4105
SIS412DN-T1-GE3-GP
S
S
S
G D
D
D
D
PU4105
SIS412DN-T1-GE3-GP
12
PR4115
15KR2F-GP
PR4115
15KR2F-GP
1 2
PG4101
GAP-CLOSE-PWR-3-GP
PG4101
GAP-CLOSE-PWR-3-GP
1 2
PL4102
IND-2D2UH-46-GP-U
68.2R210.20B
PL4102
IND-2D2UH-46-GP-U
68.2R210.20B
1 2
PG4108
GAP-CLOSE-PWR
PG4108
GAP-CLOSE-PWR
12
PC4128
SC2200P50V2KX-2GP
PC4128
SC2200P50V2KX-2GP
12
PC4119
SCD1U10V2KX-4GP
PC4119
SCD1U10V2KX-4GP
12
PG4116
GAP-CLOSE-PWR-3-GP
PG4116
GAP-CLOSE-PWR-3-GP
12
PC4121
SC330P50V3KX-GP
DY
PC4121
SC330P50V3KX-GP
DY
1 2
PG4109
GAP-CLOSE-PWR
PG4109
GAP-CLOSE-PWR
12
PR4113
0R2J-2-GP
DY
PR4113
0R2J-2-GP
DY
12
PC4123
SC560P50V-GP
DY
PC4123
SC560P50V-GP
DY
1 2
PG4103
GAP-CLOSE-PWR
PG4103
GAP-CLOSE-PWR
12
PR4121
0R0402-PAD
PR4121
0R0402-PAD
1 2
PG4122
GAP-CLOSE-PWR
PG4122
GAP-CLOSE-PWR
12
PR4120
10KR2F-2-GP
PR4120
10KR2F-2-GP
1 2
PG4115
GAP-CLOSE-PWR
PG4115
GAP-CLOSE-PWR
1 2
PL4101
IND-3D3UH-57GP
68.3R310.20A
PL4101
IND-3D3UH-57GP
68.3R310.20A
12
PR4129
750KR2F-GP
DY
PR4129
750KR2F-GP
DY
1 2
PG4114
GAP-CLOSE-PWR
PG4114
GAP-CLOSE-PWR
12
PR4127
0R0402-PAD
PR4127
0R0402-PAD
1 2
PG4111
GAP-CLOSE-PWR
PG4111
GAP-CLOSE-PWR
1 2
PG4104
GAP-CLOSE-PWR
PG4104
GAP-CLOSE-PWR
12
PC4116
SCD1U50V3KX-GP
PC4116
SCD1U50V3KX-GP
12
PR4111
2D2R5F-2-GP
DY
PR4111
2D2R5F-2-GP
DY
12
PC4129
SC2200P50V2KX-2GP
PC4129
SC2200P50V2KX-2GP
12
PR4122
10KR2F-2-GP
DY
PR4122
10KR2F-2-GP
DY
1 2
PG4129
GAP-CLOSE-PWR
PG4129
GAP-CLOSE-PWR
12
PC4114
SC10U25V5KX-GP
PC4114
SC10U25V5KX-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4104
SIS412DN-T1-GE3-GP
S
S
S
G D
D
D
D
PU4104
SIS412DN-T1-GE3-GP
12
PG4117
GAP-CLOSE-PWR-3-GP
PG4117
GAP-CLOSE-PWR-3-GP
12
PC4117
SCD1U50V3KX-GP
PC4117
SCD1U50V3KX-GP
1 2
PG4110
GAP-CLOSE-PWR
PG4110
GAP-CLOSE-PWR
1 2
PC4127
SC1U10V2KX-1GP
PC4127
SC1U10V2KX-1GP
12
PC4125
SC18P50V2JN-1-GP
DY
PC4125
SC18P50V2JN-1-GP
DY
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4101
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4101
SIS412DN-T1-GE3-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4102
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4102
SIS412DN-T1-GE3-GP
12
PR4126
1KR2F-3-GP
DY
PR4126
1KR2F-3-GP
DY
12
PR4119
100KR2J-1-GP
DY
PR4119
100KR2J-1-GP
DY
1 2
PG4133
GAP-CLOSE-PWR
PG4133
GAP-CLOSE-PWR
12
PC4112
SC10U25V5KX-GP
DY
PC4112
SC10U25V5KX-GP
DY
12
PR4117
10KR2F-2-GP
PR4117
10KR2F-2-GP
1 2
PD4105
MMPZ5231BPT-GP
DY
PD4105
MMPZ5231BPT-GP
DY
VBST2
9
DRVH2
10
SW2
8
DRVL2
11
VFB2
4
EN2
6
CS2
5
VREG3
3
VIN 12
VBST1 17
DRVH1 16
SW1 18
DRVL1 15
VO1 14
VFB1 2
EN1 20
CS1 1
VREG5
13
GND 21
VCLK 19
PGOOD
7
PU4103
TPS51225CRUKR-GP
PU4103
TPS51225CRUKR-GP
1 2
PG4121
GAP-CLOSE-PWR
PG4121
GAP-CLOSE-PWR
1 2
PG4131
GAP-CLOSE-PWR
PG4131
GAP-CLOSE-PWR
1 2
PG4102
GAP-CLOSE-PWR
PG4102
GAP-CLOSE-PWR
1 2
PG4120
GAP-CLOSE-PWR
PG4120
GAP-CLOSE-PWR
1 2
PR4108
1D5R2F-GP
PR4108
1D5R2F-GP
1
2
34
5
6
PU4106
2N7002DW-7F-GP
DY
PU4106
2N7002DW-7F-GP
DY
1 2
PG4132
GAP-CLOSE-PWR
PG4132
GAP-CLOSE-PWR
12
PR4114
0R2J-2-GP
DY
PR4114
0R2J-2-GP
DY
1 2
PG4130
GAP-CLOSE-PWR
PG4130
GAP-CLOSE-PWR
12
PR4116
0R0603-PAD
PR4116
0R0603-PAD
12
PC4115
SC10U25V5KX-GP
PC4115
SC10U25V5KX-GP
1 2
PG4112
GAP-CLOSE-PWR
PG4112
GAP-CLOSE-PWR
12
PC4124
SC18P50V2JN-1-GP
DY
PC4124
SC18P50V2JN-1-GP
DY
1 2
PG4128
GAP-CLOSE-PWR
PG4128
GAP-CLOSE-PWR
1 2
PR4109
1D5R2F-GP
PR4109
1D5R2F-GP
12
PC4109
SC10U25V5KX-GP
PC4109
SC10U25V5KX-GP
12
PR4102
121KR2F-L-GP
PR4102
121KR2F-L-GP
12
PT4101
SE330U6D3VM-15-GP
PT4101
SE330U6D3VM-15-GP
1 2
PG4119
GAP-CLOSE-PWR
PG4119
GAP-CLOSE-PWR
12
PT4102
SE220U6D3VM-30-GP
PT4102
SE220U6D3VM-30-GP
12
PR4112
6K65R2F-GP
PR4112
6K65R2F-GP
12
PC4113
SCD01U50V2KX-1GP
PC4113
SCD01U50V2KX-1GP
1 2
PG4113
GAP-CLOSE-PWR
PG4113
GAP-CLOSE-PWR
12
PR4110
2D2R5F-2-GP
DY
PR4110
2D2R5F-2-GP
DY
1 2
PC4126
SC1U10V2KX-1GP
PC4126
SC1U10V2KX-1GP
12
PR4101
121KR2F-L-GP
PR4101
121KR2F-L-GP
12
PC4120
SCD1U10V2KX-4GP
PC4120
SCD1U10V2KX-4GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_CPU_CORE_CCOMP
PWR_CPU_CORE_SLEWAPWR_CPU_CORE_GF-IMAX
PWR_CPU_CORE_GIMON
PWR_CPU_CORE_GTHERM
PWR_CPU_CORE_VREF
PWR_CPU_CORE_GOCP-I
PWR_CPU_CORE_VREF
PWR_CPU_CORE_VREF
PWR_CPU_CORE_GCOMP
H_CPU_SVIDDAT
H_CPU_SVIDCLK
PWR_CPU_CORE_VREF
PWR_CPU_CORE_CTHERM
PWR_CPU_CORE_VREF
PWR_CPU_CORE_CSKIP#
PWR_CPU_CORE_CIMON
PWR_CPU_CORE_COCP-I
PWR_CPU_CORE_VREF
PWR_GFX_PWRGD N221068268
PWR_CPU_CORE_VREF
PWR_CPU_CORE_GF-IMAX
PWR_CPU_CORE_VCLK
PWR_CPU_CORE_VRON
PWR_CPU_CORE_ALERT#
PWR_CPU_CORE_VR_HOT#
PWR_CPU_CORE_SLEWA
PWR_CPU_CORE_VDIO
PWR_CPU_CORE_CF-IMAX
3D3V_S0
DCBATOUT_VCC_CORE
3D3V_S5
VCORE_AGND
VCORE_AGND VCORE_AGND
5V_S5
VCORE_AGND
VCORE_AGND
1D05V_VTT
VCORE_AGND
3D3V_S5
VCORE_AGND
VCORE_AGND
VCORE_AGND
VCORE_AGND
5V_S5
PWR_GFX_GSKIP# 44
PWR_CPU_CORE_CBST2 43
IMVP_PWRGD28,36
VSS_AXG_SENSE9
PWR_GFX_CORE_GSCN44
PWR_GFX_GPWM 44
VCC_AXG_SENSE9
PWR_CPU_CORE_CDL1 43
PWR_CPU_CORE_CDL2 43
H_CPU_SVIDDAT8 VR_SVID_ALERT#8
H_PROCHOT#5,27
D85V_PWRGD48
H_CPU_SVIDCLK8
PWR_CPU_CORE_CCSP2 43
VSSSENSE8
VCCSENSE8
PWR_CPU_CORE_CCSN2 43
PWR_CPU_CORE_CCSN1 43
PWR_CPU_CORE_CCSP1 43
PWR_CPU_CORE_CBST1 43
PWR_GFX_CORE_GSCP44
PWR_CPU_CORE_CDH1 43
PWR_CPU_CORE_CSW2 43
PWR_CPU_CORE_CDH2 43
PWR_CPU_CORE_CSW1 43
VGA_CURRENT 27
CPU_CURRENT 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(1/3)
42 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(1/3)
42 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(1/3)
42 103Friday, January 06, 2012
<Doc>
<Core Design>
Close to PWR IC
Open
1 2
PR4230
0R0402-PAD
PR4230
0R0402-PAD
1 2
PC4209 SC33P50V2JN-3GPPC4209 SC33P50V2JN-3GP
1 2
PR4229 75KR2F-GPPR4229 75KR2F-GP
1 2
PR4208
24KR2F-GP
PR4208
24KR2F-GP
12
PC4208
SC4D7U10V3KX-GP
PC4208
SC4D7U10V3KX-GP
1 2
PR4202
130R2F-1-GP
PR4202
130R2F-1-GP
1 2
PR4226 15K8R2F-GPPR4226 15K8R2F-GP
1 2
PR4206
NTC-100K-1-GP
PR4206
NTC-100K-1-GP
12
PR4225
150KR2F-L-GP
PR4225
150KR2F-L-GP
1 2
PR4204
121KR2F-L-GP
PR4204
121KR2F-L-GP
12
PR4232 0R0402-PADPR4232 0R0402-PAD
1 2
PC4211 SCD1U10V2KX-4GP
DY
PC4211 SCD1U10V2KX-4GP
DY
1 2
PR4219 56KR2F-GPPR4219 56KR2F-GP
12
PR4210
10R2F-L-GP
PR4210
10R2F-L-GP
12
PR4233 0R0402-PADPR4233 0R0402-PAD
12
PC4205
SC1U6D3V2KX-GP
PC4205
SC1U6D3V2KX-GP
1 2
PC4201
SCD22U10V2KX-1GP
PC4201
SCD22U10V2KX-1GP
1 2
PR4217100KR2F-L1-GP
DY
PR4217100KR2F-L1-GP
DY
1 2
PC4204
SCD1U10V2KX-4GP
DY
PC4204
SCD1U10V2KX-4GP
DY
1 2
PR4227 NTC-100K-1-GPPR4227 NTC-100K-1-GP
12
PR4234 0R0402-PADPR4234 0R0402-PAD
1 2
PR4223 20KR2F-L-GP
DY
PR4223 20KR2F-L-GP
DY
12
PR4213 0R0402-PADPR4213 0R0402-PAD
1 2
PC4210
SCD22U10V2KX-1GP
PC4210
SCD22U10V2KX-1GP
12
PR4231 0R0402-PADPR4231 0R0402-PAD
12
PR4224
30KR2F-GP
PR4224
30KR2F-GP
1 2
PR4209
90K9R2F-GP
PR4209
90K9R2F-GP
1 2
PR4239
0R0402-PAD
PR4239
0R0402-PAD
CTHERM 1
COCP_I 2
CIMON 3
CCSP1 4
CCSN1 5
CCSN2 6
CCSP2 7
CCSP3 8
CCSN3 9
CCOMP 10
CVFB 11
CGFB 12
V5 48
CDH1 47
CBST1 46
CSW1 45
CDL1 44
V5DRV 43
PGND 42
CDL2 41
CSW2 40
CBST2 39
CDH2 38
VBAT 37
GND 49
CPWM3
36 CSKIP#
35 GPWM
34 GSKIP#
33 GTHERM
32 GOCP_I
31 GIMON
30 GCSP
29 GCSN
28 GCOMP
27 GVFB
26 GGFB
25
CF_IMAX
13
VREF
14
V3R3
15
VR_ON
16
CPGOOD
17
VCLK
18
ALERT#
19
VDIO
20
VR_HOT#
21
SLEWA
22
GPGOOD
23
GF_IMAX
24
PU4201
TPS51640ARSLR-GP
PU4201
TPS51640ARSLR-GP
12
PC4207
SC2D2U10V3KX-1GP
PC4207
SC2D2U10V3KX-1GP
1 2
PR4201 75KR2F-GPPR4201 75KR2F-GP
1 2
PR4228
309KR2F-GP
PR4228
309KR2F-GP
1 2
PR4216 10KR2F-2-GPPR4216 10KR2F-2-GP
12
PR4221
169KR2F-1-GP
PR4221
169KR2F-1-GP
12
PR4211
10KR2J-3-GP
PR4211
10KR2J-3-GP
1 2
PR4222 100KR2F-L1-GP
DY
PR4222 100KR2F-L1-GP
DY
1 2
PR4218 5K76R2F-2-GPPR4218 5K76R2F-2-GP
1 2
PR4203
54D9R2F-L1-GP
PR4203
54D9R2F-L1-GP
1 2
PC4202
SCD22U10V2KX-1GP
DY
PC4202
SCD22U10V2KX-1GP
DY
1 2
PR4207
15K8R2F-GP
PR4207
15K8R2F-GP
12
PR4220
200KR2F-L-GP
PR4220
200KR2F-L-GP
1 2
PR4205
10K7R2F-GP
PR4205
10K7R2F-GP
1 2
PC4206
SCD33U6D3V2KX-1-GP
PC4206
SCD33U6D3V2KX-1-GP
1 2
PC4203
SC33P50V2JN-3GP
PC4203
SC33P50V2JN-3GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_CPU_CORE_CBST1_1
PWR_CPU_CORE_CBST2_1
VCC_CORE
VCC_CORE
DCBATOUT_VCC_CORE
DCBATOUT_VCC_CORE
DCBATOUT DCBATOUT_VCC_CORE
PWR_CPU_CORE_CDH142
PWR_CPU_CORE_CDL142
PWR_CPU_CORE_CBST142
PWR_CPU_CORE_CSW142
PWR_CPU_CORE_CCSN2 42
PWR_CPU_CORE_CCSP2 42
PWR_CPU_CORE_CCSN1 42
PWR_CPU_CORE_CCSP1 42
PWR_CPU_CORE_CDH242
PWR_CPU_CORE_CDL242
PWR_CPU_CORE_CBST242
PWR_CPU_CORE_CSW242
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(2/3)
43 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(2/3)
43 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(2/3)
43 103Friday, January 06, 2012
<Doc>
<Core Design>
Design current: 42.4A
PU4301
PU4302
PU4303
PU4304
Main source 2nd source
BOM control
84.03606.037
FDMS3606S-GP-U
84.03606.037
FDMS3606S-GP-U
84.03606.037
FDMS3606S-GP-U
84.03606.037
FDMS3606S-GP-U
1 2
PL4302
L-D36UH-1-GP
PL4302
L-D36UH-1-GP
12
PT4306
SE100U25VM-10GP
PT4306
SE100U25VM-10GP
12
PT4301
ST330U2VDM-4-GP
PT4301
ST330U2VDM-4-GP
1 2
PR4310
28KR2F-GP
PR4310
28KR2F-GP
1 2
PG4307
GAP-CLOSE-PWR
PG4307
GAP-CLOSE-PWR
1 2
PG4301
GAP-CLOSE-PWR-3-GP
PG4301
GAP-CLOSE-PWR-3-GP
12
PT4302
ST330U2VDM-4-GP
PT4302
ST330U2VDM-4-GP
1 2
PG4308
GAP-CLOSE-PWR
PG4308
GAP-CLOSE-PWR
1 2
PR4309
121KR2F-L-GP
PR4309
121KR2F-L-GP
12
PC4315
SCD1U50V3KX-GP
PC4315
SCD1U50V3KX-GP
1 2
PR4301
0R3J-0-U-GP
PR4301
0R3J-0-U-GP
1 2
PG4304
GAP-CLOSE-PWR
PG4304
GAP-CLOSE-PWR
1 2
PR4237
28KR2F-GP
PR4237
28KR2F-GP
12
PC4307
SC10U25V5KX-GP
PC4307
SC10U25V5KX-GP
1
2
3
4
5
6
7
8
910
PU4302
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
PU4302
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
12
PT4305
ST330U2VDM-4-GP
PT4305
ST330U2VDM-4-GP
1 2
PR4238
121KR2F-L-GP
PR4238
121KR2F-L-GP
12
PR4236
18KR2F-GP
PR4236
18KR2F-GP
1 2
PG4306
GAP-CLOSE-PWR
PG4306
GAP-CLOSE-PWR
1 2
PR4235
NTC-100K-1-GP
1st = 69.60011.071
PR4235
NTC-100K-1-GP
1st = 69.60011.071
1 2
PG4309
GAP-CLOSE-PWR
PG4309
GAP-CLOSE-PWR
1 2
PR4302
0R3J-0-U-GP
PR4302
0R3J-0-U-GP
1
2
3
4
5
6
7
8
910
PU4303
FDMS3600-02-RJK0215-COLAY-GP
DY
PU4303
FDMS3600-02-RJK0215-COLAY-GP
DY
12
PC4310
SC10U25V5KX-GP
PC4310
SC10U25V5KX-GP
12
PC4302
SC10U25V5KX-GP
PC4302
SC10U25V5KX-GP
1
2
3
4
5
6
7
8
910
PU4304
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
PU4304
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
12
PC4306
SC10U25V5KX-GP
PC4306
SC10U25V5KX-GP
12
PC4316
SCD1U50V3KX-GP
PC4316
SCD1U50V3KX-GP
1
2
3
4
5
6
7
8
910
PU4301
FDMS3600-02-RJK0215-COLAY-GP
DY
PU4301
FDMS3600-02-RJK0215-COLAY-GP
DY
12
PR4308
18KR2F-GP
PR4308
18KR2F-GP
12
PT4303
ST330U2VDM-4-GP
PT4303
ST330U2VDM-4-GP
12
PC4312
SC10U25V5KX-GP
PC4312
SC10U25V5KX-GP
1 2
PR4303
NTC-100K-1-GP
1st = 69.60011.071
PR4303
NTC-100K-1-GP
1st = 69.60011.071
12
PC4303
SC10U25V5KX-GP
PC4303
SC10U25V5KX-GP
1 2
PL4301
L-D36UH-1-GP
PL4301
L-D36UH-1-GP
12
PC4304
SC10U25V5KX-GP
DY
PC4304
SC10U25V5KX-GP
DY
1 2
PC4301
SCD1U50V3KX-GP
PC4301
SCD1U50V3KX-GP
12
PT4304
ST330U2VDM-4-GP
PT4304
ST330U2VDM-4-GP
1 2
PG4305
GAP-CLOSE-PWR
PG4305
GAP-CLOSE-PWR
1 2
PG4302
GAP-CLOSE-PWR-3-GP
PG4302
GAP-CLOSE-PWR-3-GP
1 2
PC4314 SCD027U25V2KX-GPPC4314 SCD027U25V2KX-GP
12
PC4305
SC10U25V5KX-GP
DY
PC4305
SC10U25V5KX-GP
DY
1 2
PC4308
SCD1U50V3KX-GP
PC4308
SCD1U50V3KX-GP
1 2
PC4216 SCD027U25V2KX-GPPC4216 SCD027U25V2KX-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_GFX_CORE_DRVL
PWR_GFX_CORE_BST
PWR_GFX_CORE_SW
PWR_GFX_CORE_DRVH
PWR_GFX_CBST1_1
PWR_GFX_CORE_DRVL
PWR_GFX_CORE_BST
PWR_GFX_CORE_SW
PWR_GFX_CORE_DRVH
VCC_GFXCORE
DCBATOUT_VCC_GFXCORE
5V_S5
DCBATOUT DCBATOUT_VCC_GFXCORE
PWR_GFX_CORE_GSCP 42
PWR_GFX_CORE_GSCN 42
PWR_GFX_GSKIP#42 PWR_GFX_GPWM42
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(3/3)
44 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(3/3)
44 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51640_CPU_CORE(3/3)
44 103Friday, January 06, 2012
<Doc>
<Core Design>
Design current: 22A
2nd source
PU4402
PU4403
Main source
84.07608.037
FDMS7608S-GP
84.07608.037
FDMS7608S-GP
BOM control
12
PT4402
ST330U2VDM-4-GP
PT4402
ST330U2VDM-4-GP
1 2
PG4401
GAP-CLOSE-PWR
PG4401
GAP-CLOSE-PWR
12
PC4402
SC10U25V5KX-GP
PC4402
SC10U25V5KX-GP
1
2
3
4
5
6
7
8
910
PU4403
FDMS3600-02-RJK0215-COLAY-GP
84.07608.037
PU4403
FDMS3600-02-RJK0215-COLAY-GP
84.07608.037
1 2
PG4404
GAP-CLOSE-PWR
PG4404
GAP-CLOSE-PWR
1 2
PG4403
GAP-CLOSE-PWR
PG4403
GAP-CLOSE-PWR
12
PT4403
ST330U2VDM-4-GP
PT4403
ST330U2VDM-4-GP
1 2
PR4409
NTC-100K-1-GP
1st = 69.60011.071
PR4409
NTC-100K-1-GP
1st = 69.60011.071
12
PR4410
18KR2F-GP
PR4410
18KR2F-GP
1 2
PL4401
L-D36UH-1-GP
PL4401
L-D36UH-1-GP
12
PT4401
ST330U2VDM-4-GP
PT4401
ST330U2VDM-4-GP
1 2
PR4405
28KR2F-GP
PR4405
28KR2F-GP
12
PC4409
SC10U25V5KX-GP
PC4409
SC10U25V5KX-GP
12
PC4403
SC10U25V5KX-GP
PC4403
SC10U25V5KX-GP
1
2
3
4
5
6
7
8
910
PU4402
FDMS3600-02-RJK0215-COLAY-GP
84.07608.037
PU4402
FDMS3600-02-RJK0215-COLAY-GP
84.07608.037
1 2
PC4401 SC1U25V3KX-1-GPPC4401 SC1U25V3KX-1-GP
12
PC4407
SC2D2U10V3KX-1GP
PC4407
SC2D2U10V3KX-1GP
1 2
PG4303
GAP-CLOSE-PWR-3-GP
PG4303
GAP-CLOSE-PWR-3-GP
1 2
PR4407
121KR2F-L-GP
PR4407
121KR2F-L-GP
1 2
PC4408 SCD022U25V2KX-GPPC4408 SCD022U25V2KX-GP
1 2
PG4402
GAP-CLOSE-PWR
PG4402
GAP-CLOSE-PWR
12
PC4410
SCD1U50V3KX-GP
PC4410
SCD1U50V3KX-GP
BST
1
SKIP#
2
PWM
3
GND
4
DRVL 5
VDD 6
SW 7
DRVH 8
GND 9
PU4401
TPS51601DRBR-GP
PU4401
TPS51601DRBR-GP
12
PC4404
SC10U25V5KX-GP
PC4404
SC10U25V5KX-GP
1 2
PR4401 0R3J-0-U-GPPR4401 0R3J-0-U-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SNB_IVB#_PWRCTRL
PWR_VCCP_TRIP
PWR_VCCP_COMP
PWR_VCCP_MODE
PWR_VCCP_VREF
TPS51219_GSNS_M
PWR_VCCP_DRVL
PWR_VCCP_LL_1PWR_VCCP_VBST
PWR_VCCP_SW
PWR_VCCP_DRVH
PWR_VCCP_V5FILT
PWR_VCCP_EN
PWR_VCCP_VSNS
PWR_1D05V_SVIN
PWR_1D05V_EN
PWR_1D05V_PHASE
PWR_1D05V_PVDD
1D05V_FB_GAP
PWR_1D05V_FB
3D3V_S0
3D3V_S5
PWR_DCBATOUT_VCCP
1D05V_PWR 1D05V_VTT
1D05V_PWR
5V_S5
PWR_DCBATOUT_VCCPDCBATOUT
1D05V_M
1D05V_PWR_M
3D3V_S5
3D3V_S5
1D05V_VTT
RUNPWROK46,47
VCCIO_SENSE 8
VSSIO_SENSE 8
1.05VTT_PWRGD37,48
PM_SLP_A#19,27 MPWROK19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51211_1D05V
45 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51211_1D05V
45 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51211_1D05V
45 103Friday, January 06, 2012
<Core Design>
L
Vout
1V
REFIN
1.05VH
D
SG
Parallel
77.C3371.051
330uF, 2.5V,
ESR=9mΩ, Iripple=3.726A
Differential Sense feedback
Resistor need close to controller
G S
D
TPS51219 for 1D05V
Design Current = 11.69A
OCP> 17.9A
0.68uH 7.3*6.6*3
DCR=5~5.5mohm
Idc=15.5A, Isat=25A
Id=20A, Qg=9.8~15nC,
Rdson=10.3~12.4 mohm
Id=40A, Qg=16.8~25.5nC,
Rdson=4.9~6.1 mohm
R1
R2
Vo=0.6*(1+(R1/R2))
EC_SC_1003
1 2
PC4512
SCD01U50V2KX-1GP
PC4512
SCD01U50V2KX-1GP
1 2
PG4541
GAP-CLOSE-PWR
PG4541
GAP-CLOSE-PWR
1 2
PR4505
1KR2F-3-GP
PR4505
1KR2F-3-GP
12
PC4521
SC10U6D3V3MX-GP
SBA
PC4521
SC10U6D3V3MX-GP
SBA
1 2
PG4526
GAP-CLOSE-PWR-3-GP
PG4526
GAP-CLOSE-PWR-3-GP
12
PT4501
SE330U2D5VDM-1GP
PT4501
SE330U2D5VDM-1GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4502
SIR172DP-T1-GE3-GP
84.00172.037
S
S
S
GD
D
D
D
PU4502
SIR172DP-T1-GE3-GP
84.00172.037
1 2
PG4540
GAP-CLOSE-PWR
PG4540
GAP-CLOSE-PWR
1 2
PG4528
GAP-CLOSE-PWR-3-GP
PG4528
GAP-CLOSE-PWR-3-GP
12
PC4524
SC22P50V2GN-GP
DY
PC4524
SC22P50V2GN-GP
DY
1 2
PG4519
GAP-CLOSE-PWR
PG4519
GAP-CLOSE-PWR
12
PR4518
8K25R2F-1-GP
DY
PR4518
8K25R2F-1-GP
DY
12
PC4514
SC1U6D3V2KX-GP
DY
PC4514
SC1U6D3V2KX-GP
DY
1 2
PR4524
2D2R2J-GP
SBA
PR4524
2D2R2J-GP
SBA
12
PC4518
SC2D2U6D3V2MX-GP
PC4518
SC2D2U6D3V2MX-GP
1 2
PG4544
GAP-CLOSE-PWR
PG4544
GAP-CLOSE-PWR
12
PR4515
0R0402-PAD
PR4515
0R0402-PAD
1 2
PR4509 10KR2J-3-GPPR4509 10KR2J-3-GP
1 2
PG4527
GAP-CLOSE-PWR-3-GP
PG4527
GAP-CLOSE-PWR-3-GP
1 2
PR4513
0R2J-2-GP
DY
PR4513
0R2J-2-GP
DY
1 2
PC4513
SCD1U50V3KX-GP
PC4513
SCD1U50V3KX-GP
1 2
PL4501
COIL-D68UH-5-GP
PL4501
COIL-D68UH-5-GP
1 2
PG4531
GAP-CLOSE-PWR-3-GP
PG4531
GAP-CLOSE-PWR-3-GP
1 2
PG4518
GAP-CLOSE-PWR
PG4518
GAP-CLOSE-PWR
1 2
R4501 0R5J-5-GP
Non-SBA
R4501 0R5J-5-GP
Non-SBA
PVIN
10
PGOOD
4
SVIN
8
FB 6
NC#7 7
LX#1 1
EN
5
PVIN
9
GND 11
LX#2 2
LX#3 3
PU4504
RT8068AZQW ID-GP-U
SBA
PU4504
RT8068AZQW ID-GP-U
SBA
12
PC4527
SC10U6D3V3MX-GP
SBA
PC4527
SC10U6D3V3MX-GP
SBA
1 2
PR4508 2D2R3J-2-GPPR4508 2D2R3J-2-GP
1 2
PG4520
GAP-CLOSE-PWR-3-GP
PG4520
GAP-CLOSE-PWR-3-GP
1 2
PG4516
GAP-CLOSE-PWR
PG4516
GAP-CLOSE-PWR
VREF
1
REFIN
2
GSNS
3
VSNS
4
COMP
5
TRIP
6
GND
7
PGND
8
V5 9
DL 10
DH 11
SW 12
BST 13
EN 14
MODE 15
PGOOD 16
GND 17
PU4501
TPS51219RTER-GP
PU4501
TPS51219RTER-GP
12
PC4525
SC100P50V2JN-L-GP
SBA
PC4525
SC100P50V2JN-L-GP
SBA
12
PR4514
3D3R2F-GP
PR4514
3D3R2F-GP
1 2
PG4532
GAP-CLOSE-PWR-3-GP
PG4532
GAP-CLOSE-PWR-3-GP
12
PR4521
10KR2F-2-GP
DY
PR4521
10KR2F-2-GP
DY
12
PT4502
SE330U2D5VDM-1GP
PT4502
SE330U2D5VDM-1GP
1 2
PR4523 0R0402-PADPR4523 0R0402-PAD
1 2
PR4510
0R0402-PAD
PR4510
0R0402-PAD
1 2
PG4523
GAP-CLOSE-PWR-3-GP
PG4523
GAP-CLOSE-PWR-3-GP
12
PC4523
SC1U6D3V2KX-GP
SBA
PC4523
SC1U6D3V2KX-GP
SBA
1 2
PL4502
IND-2D2UH-161-GP-U
SBA
PL4502
IND-2D2UH-161-GP-U
SBA
12
PC4510
SC2200P50V2KX-2GP
PC4510
SC2200P50V2KX-2GP
1 2
PG4517
GAP-CLOSE-PWR
PG4517
GAP-CLOSE-PWR
1 2
PG4533
GAP-CLOSE-PWR-3-GP
PG4533
GAP-CLOSE-PWR-3-GP
1 2
PG4530
GAP-CLOSE-PWR-3-GP
PG4530
GAP-CLOSE-PWR-3-GP
12
PC4526
SC10U6D3V3MX-GP
SBA
PC4526
SC10U6D3V3MX-GP
SBA
12
PR4520
64K9R2F-1-GP
PR4520
64K9R2F-1-GP
1 2
PR4522 0R0402-PADPR4522 0R0402-PAD
12
PR4511
100KR2F-L1-GP
PR4511
100KR2F-L1-GP
1 2
PG4543
GAP-CLOSE-PWR
PG4543
GAP-CLOSE-PWR
12
PR4526
15KR2F-GP
SBA
PR4526
15KR2F-GP
SBA
1 2
PG4529
GAP-CLOSE-PWR-3-GP
PG4529
GAP-CLOSE-PWR-3-GP
12
PC4515
SCD1U10V2KX-4GP
PC4515
SCD1U10V2KX-4GP
1 2
PG4522
GAP-CLOSE-PWR-3-GP
PG4522
GAP-CLOSE-PWR-3-GP
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4503
SIR460DP-T1-GE3-GP
84.00460.037
S
S
S
D
D
D
D
G
PU4503
SIR460DP-T1-GE3-GP
84.00460.037
12
PC4516
SC10U25V5KX-GP
PC4516
SC10U25V5KX-GP
1 2
PG4547
GAP-CLOSE-PWR-3-GP
PG4547
GAP-CLOSE-PWR-3-GP
1 2
PR4502 0R0402-PADPR4502 0R0402-PAD
12
PR4527
20KR2F-L-GP
SBA
PR4527
20KR2F-L-GP
SBA
12
PC4522
SC10U6D3V3MX-GP
DY
PC4522
SC10U6D3V3MX-GP
DY
12
PC4517
SC10U25V5KX-GP
PC4517
SC10U25V5KX-GP
12
PC4519
SC1KP50V2KX-1GP
DY
PC4519
SC1KP50V2KX-1GP
DY
1 2
PG4525
GAP-CLOSE-PWR-3-GP
PG4525
GAP-CLOSE-PWR-3-GP
1 2
PR4519 0R0402-PADPR4519 0R0402-PAD
12
PR4525
100KR2F-L1-GP
SBA
PR4525
100KR2F-L1-GP
SBA
1 2
PG4524
GAP-CLOSE-PWR-3-GP
PG4524
GAP-CLOSE-PWR-3-GP
1 2
PG4534
GAP-CLOSE-PWR-3-GP
PG4534
GAP-CLOSE-PWR-3-GP
12
PC4520
SCD1U50V3KX-GP
PC4520
SCD1U50V3KX-GP
1 2
PG4521
GAP-CLOSE-PWR-3-GP
PG4521
GAP-CLOSE-PWR-3-GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PWR_1D5V_TON
PWR_1D5V_VCC5
PWR_1D5V_VDDQ
PWR_1D5V_FB
PWR_1D5V_PHASE
PWR_1D5V_UGATE
PWR_1D5V_VBST PWR_1D5V_VBST_1
PWR_1D5V_EN
PWR_1D5V_EN
PWR_1D5V_CS
PWR_1D5V_PVCC5
PWR_1D5V_VTTREF
PWR_1D5V_SW_1
PWR_1D5V_LGATE
DCBATOUT_1D5V
1D5V_PWR
5V_S5
5V_S5
DDR_VREF_S3
+0D75V_DDR_P
3D3V_S0
1D5V_PWR
DCBATOUT_1D5V
DCBATOUT_1D5VDCBATOUT 1D5V_S31D5V_PWR
+0D75V_DDR_P0D75V_S0
0D75V_EN37
RUNPWROK45,47
PM_SLP_S4#19,27,97
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
RT8207M_1D5V_0D75V
46 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
RT8207M_1D5V_0D75V
46 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
RT8207M_1D5V_0D75V
46 103Friday, January 06, 2012
<Doc>
<Core Design>
Design Current = 11.69A
OCP>19.92A
SSID = PWR.Plane.Regulator_1p5v0p75v
SG
D
SG
D
R1
R2
Vout=0.75*(1+R1/R2)
Cyntec. 1.0uH 7.3*6.6*3
DCR=9~10mohm
Idc=11A, Isat=22A
Id=20A, Qg=9.8~15nC,
Rdson=10.3~12.4 mohm
Id=40A, Qg=16.8~25.5nC,
Rdson=4.9~6.1 mohm
12
PT4602
SE330U2D5VDM-1GP
PT4602
SE330U2D5VDM-1GP
12
PC4607
SC1U10V2KX-1GP
PC4607
SC1U10V2KX-1GP
12
PC4616
SC18P50V2JN-1-GP
DY
PC4616
SC18P50V2JN-1-GP
DY
1 2
PG4626
GAP-CLOSE-PWR-3-GP
PG4626
GAP-CLOSE-PWR-3-GP
1 2
PG4620
GAP-CLOSE-PWR-3-GP
PG4620
GAP-CLOSE-PWR-3-GP
1 2
PG4617
GAP-CLOSE-PWR-3-GP
PG4617
GAP-CLOSE-PWR-3-GP
1 2
PR4603
0R0603-PAD
PR4603
0R0603-PAD
12
PR4604
10KR2F-2-GP
DY
PR4604
10KR2F-2-GP
DY
1 2
PG4601
GAP-CLOSE-PWR-3-GP
PG4601
GAP-CLOSE-PWR-3-GP
1 2
PG4616
GAP-CLOSE-PWR-3-GP
PG4616
GAP-CLOSE-PWR-3-GP
1 2
PG4603
GAP-CLOSE-PWR-3-GP
PG4603
GAP-CLOSE-PWR-3-GP
1 2
PG4608
GAP-CLOSE-PWR-3-GP
PG4608
GAP-CLOSE-PWR-3-GP
12
PC4601
SC1KP50V2KX-1GP
PC4601
SC1KP50V2KX-1GP
1 2
PR4602
9K76R2F-1-GP
PR4602
9K76R2F-1-GP
12
PR4608
30K9R2F-GP
PR4608
30K9R2F-GP
1 2
PG4611
GAP-CLOSE-PWR-3-GP
PG4611
GAP-CLOSE-PWR-3-GP
12
PR4607
2D2R5F-2-GP
DY
PR4607
2D2R5F-2-GP
DY
12
PC4621
SCD1U10V2KX-4GP
PC4621
SCD1U10V2KX-4GP
12
PC4602
SC1U10V2KX-1GP
PC4602
SC1U10V2KX-1GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4602
SIR172DP-T1-GE3-GP
84.00172.037
S
S
S
GD
D
D
D
PU4602
SIR172DP-T1-GE3-GP
84.00172.037
12
PR4609
30KR2F-GP
PR4609
30KR2F-GP
12
PC4617
SC10U6D3V3MX-GP
DY
PC4617
SC10U6D3V3MX-GP
DY
1 2
PC4612
SC10U25V5KX-GP
PC4612
SC10U25V5KX-GP
1 2
PC4611
SC10U25V5KX-GP
PC4611
SC10U25V5KX-GP
1 2
PG4625
GAP-CLOSE-PWR-3-GP
PG4625
GAP-CLOSE-PWR-3-GP
12
EC4601
SCD1U50V3KX-GP
DY
EC4601
SCD1U50V3KX-GP
DY
12
PC4610
SC10U6D3V3MX-GP
PC4610
SC10U6D3V3MX-GP
1 2
PR4610
0R0402-PAD
PR4610
0R0402-PAD
1 2
PG4615
GAP-CLOSE-PWR-3-GP
PG4615
GAP-CLOSE-PWR-3-GP
12
PC4623
SC10U6D3V3MX-GP
PC4623
SC10U6D3V3MX-GP
1 2
PC4608
SCD1U50V3KX-GP
PC4608
SCD1U50V3KX-GP
1 2
PG4606
GAP-CLOSE-PWR-3-GP
PG4606
GAP-CLOSE-PWR-3-GP
12
PC4618
SC10U6D3V3MX-GP
PC4618
SC10U6D3V3MX-GP
1 2
PG4602
GAP-CLOSE-PWR-3-GP
PG4602
GAP-CLOSE-PWR-3-GP
VTT
20
VTTREF
4
FB 6
VTTSNS
2
VDDP 12
VLDOIN
19
PHASE 16
UGATE 17
CS 13
S5
8
VTTGND
1
PGOOD
10
VDDQ 5
BOOT 18
LGATE 15
GND
3
PGND 14
S3
7
VDD 11
TON
9
GND
21
PU4601
RT8207MZQW-GP-U
PU4601
RT8207MZQW-GP-U
1 2
PG4613
GAP-CLOSE-PWR-3-GP
PG4613
GAP-CLOSE-PWR-3-GP
1 2
PG4618
GAP-CLOSE-PWR-3-GP
PG4618
GAP-CLOSE-PWR-3-GP
1 2
PC4613
SCD1U50V3KX-GP
PC4613
SCD1U50V3KX-GP
1 2
PG4604
GAP-CLOSE-PWR-3-GP
PG4604
GAP-CLOSE-PWR-3-GP
1 2
PG4612
GAP-CLOSE-PWR-3-GP
PG4612
GAP-CLOSE-PWR-3-GP
12
PC4615
SC330P50V2KX-3GP
DY
PC4615
SC330P50V2KX-3GP
DY
12
PC4619
SCD033U16V2KX-GP
PC4619
SCD033U16V2KX-GP
1 2
PG4614
GAP-CLOSE-PWR-3-GP
PG4614
GAP-CLOSE-PWR-3-GP
1 2
PG4610
GAP-CLOSE-PWR-3-GP
PG4610
GAP-CLOSE-PWR-3-GP
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4603
SIR460DP-T1-GE3-GP
84.00460.037
S
S
S
D
D
D
D
G
PU4603
SIR460DP-T1-GE3-GP
84.00460.037
12
PC4622
SCD1U10V2KX-5GP
DY
PC4622
SCD1U10V2KX-5GP
DY
12
PC4620
SC4D7U6D3V3KX-GP
PC4620
SC4D7U6D3V3KX-GP
1 2
PG4624
GAP-CLOSE-PWR-3-GP
PG4624
GAP-CLOSE-PWR-3-GP
1 2
PR4606
620KR3J-GP
PR4606
620KR3J-GP
1 2
PG4619
GAP-CLOSE-PWR-3-GP
PG4619
GAP-CLOSE-PWR-3-GP
12
PR4601
5D1R2F-GP
PR4601
5D1R2F-GP
1 2
PR4605 2D2R3J-2-GPPR4605 2D2R3J-2-GP
1 2
PR4611
0R0402-PAD
PR4611
0R0402-PAD
1 2
PG4609
GAP-CLOSE-PWR-3-GP
PG4609
GAP-CLOSE-PWR-3-GP
1 2
PL4601
COIL-1UH-34-GP-U
PL4601
COIL-1UH-34-GP-U
1 2
PG4605
GAP-CLOSE-PWR-3-GP
PG4605
GAP-CLOSE-PWR-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D8V_EN
PWR_1D8V_PHASE
PWR_1D8V_PVDD
1D8V_FB_GAP
PWR_1D8V_FB
PWR_1D8V_SVIN
1D8V_S0
1D8V_PW R
3D3V_S5
3D3V_S0
PM_SLP_S3#19,27,36,37 RUNPW ROK45,46
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
PWM_1D8V_RT8015B
47 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
PWM_1D8V_RT8015B
47 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
PWM_1D8V_RT8015B
47 103Friday, January 06, 2012
<Core Design>
R1
R2
SSID = PWR.Plane.Regulator_1p8v
RT8068A for 1D8V_S0
Vo=0.6*(1+(R1/R2))
Design Current=1.1A
12
PR4706
10KR2F-2-GP
PR4706
10KR2F-2-GP
PVIN
10
PGOOD
4
SVIN
8
FB 6
NC#7 7
LX#1 1
EN
5
PVIN
9
GND 11
LX#2 2
LX#3 3
PU4701
RT8068AZQWID-GP-U
PU4701
RT8068AZQWID-GP-U
1 2
PG4713
GAP-CLOSE-PWR
PG4713
GAP-CLOSE-PWR
12
PR4704
20KR2F-L-GP
PR4704
20KR2F-L-GP
12
PC4702
SC10U6D3V3MX-GP
DY
PC4702
SC10U6D3V3MX-GP
DY
1 2
PG4704
GAP-CLOSE-PWR
PG4704
GAP-CLOSE-PWR
1 2
PL4702
IND-2D2UH-46-GP-U
PL4702
IND-2D2UH-46-GP-U
1 2
PR4702 0R0402-PADPR4702 0R0402-PAD
1 2
PG4701
GAP-CLOSE-PWR
PG4701
GAP-CLOSE-PWR
12
PC4708
SC10U6D3V3MX-GP
PC4708
SC10U6D3V3MX-GP
1 2
PG4703
GAP-CLOSE-PWR
PG4703
GAP-CLOSE-PWR
12
PC4705
SC100P50V2JN-3GP
PC4705
SC100P50V2JN-3GP
12
PC4704
SC22P50V2GN-GP
DY
PC4704
SC22P50V2GN-GP
DY
1 2
PG4711
GAP-CLOSE-PWR
PG4711
GAP-CLOSE-PWR
12
PR4705
100KR2J-1-GP
PR4705
100KR2J-1-GP
12
PC4706
SC10U6D3V3MX-GP
PC4706
SC10U6D3V3MX-GP
1 2
PG4712
GAP-CLOSE-PWR
PG4712
GAP-CLOSE-PWR
1 2
PR4703
2D2R2J-GP
PR4703
2D2R2J-GP
12
PC4709
SCD1U50V3KX-GP
PC4709
SCD1U50V3KX-GP
12
PC4707
SC10U6D3V3MX-GP
PC4707
SC10U6D3V3MX-GP
12
PC4703
SC1U6D3V2KX-GP
PC4703
SC1U6D3V2KX-GP
1 2
PG4705
GAP-CLOSE-PWR
PG4705
GAP-CLOSE-PWR
1 2
PG4714
GAP-CLOSE-PWR-3-GP
PG4714
GAP-CLOSE-PWR-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VCCSA_SLEW
PWR_VCCSA_BST_R
PWR_VCCSA_SNUB
PWR_VCCSA_BST
PWR_VCCSA_V5DRV
PWR_VCCSA_EN
PWR_VCCSA_VOUT
PWR_VCCSA_SW
PWR_VCCSA_COMP_1
PWR_VCCSA_VIN
PWR_VCCSA_COMP
PWR_VCCSA_VID0
PWR_VCCSA_PGOOD
PWR_VCCSA_VID1
PWR_VCCSA_VREF
PWR_VCCSA_VIN 0D85V_S0
5V_S5 3D3V_S0
VCCSA
0D85V_S0
5V_S5 PWR_VCCSA_VIN D85V_PWRGD 42
1.05VTT_PWRGD 37,45
VCCSA_SENSE 9
VCCSA_SELECT1 9
VCCSA_SELECT0 9
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
VCCSA_TPS51461
48 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
VCCSA_TPS51461
48 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
VCCSA_TPS51461
48 103Friday, January 06, 2012
<Doc>
<Core Design>
Design Current = 4.2A
OCP> 8.4A
TPS51461 for VCCSA
VCCSAVID0
L
L 0.725V
0.675V
L 0.8V
H
VID1
H
H
L
H
0.9V
20101130 X02:
Follow the standard schematics.
20101130 X02:
Follow the standard schematics.
20101130 X02:
Follow the standard schematics.
TDK. 0.35uH 5*5*3
DCR=3.9mohm
Idc=11A, Isat=14.9A
1 2
PL4801
IND-D35UH-GP
68.R3510.101
PL4801
IND-D35UH-GP
68.R3510.101
12
PR4803
2D2R5F-2-GP
DY
PR4803
2D2R5F-2-GP
DY
12
PC4814
SC1U10V2KX-1GP
PC4814
SC1U10V2KX-1GP
1 2
PR4807
0R2J-2-GP
PR4807
0R2J-2-GP
1 2
PR4811
100R2F-L1-GP-U
PR4811
100R2F-L1-GP-U
12
PC4810
SC22U6D3V5MX-2GP
PC4810
SC22U6D3V5MX-2GP
GND
1
VREF
2
COMP
3
SLEW
4
VOUT
5
MODE
6
SW#7 7
SW#8 8
SW#9 9
SW#10 10
SW#11 11
BST 12
EN 13
VID0 14
VID1 15
PGOOD 16
V5FILT 17
V5DRV 18
PGND
19
PGND
20
PGND
21
VIN
22
VIN
23
VIN
24
GND
25
PU4801
TPS51461RGER-GP
74.51461.043
PU4801
TPS51461RGER-GP
74.51461.043
1 2
PG4804
GAP-CLOSE-PWR
PG4804
GAP-CLOSE-PWR
1 2
PG4807
GAP-CLOSE-PWR
PG4807
GAP-CLOSE-PWR
12
PR4806
1R2F-GP
PR4806
1R2F-GP
12
PC4801
SC22U6D3V5MX-2GP
PC4801
SC22U6D3V5MX-2GP
12
PC4817
SC3300P50V2KX-1GP
PC4817
SC3300P50V2KX-1GP
1 2
PR4805 0R0402-PADPR4805 0R0402-PAD
12
PC4818
SC560P50V-GP
DY
PC4818
SC560P50V-GP
DY
12
PC4804
SC1U6D3V2KX-GP
DY
PC4804
SC1U6D3V2KX-GP
DY
1 2
PG4805
GAP-CLOSE-PWR
PG4805
GAP-CLOSE-PWR
1 2
PG4802
GAP-CLOSE-PWR
PG4802
GAP-CLOSE-PWR
12
PC4803
SCD1U50V3KX-GP
PC4803
SCD1U50V3KX-GP
1 2
PG4801
GAP-CLOSE-PWR
PG4801
GAP-CLOSE-PWR
12
PR4802
4K99R2F-L-GP
PR4802
4K99R2F-L-GP
12
PC4809
SC22U6D3V5MX-2GP
DY
PC4809
SC22U6D3V5MX-2GP
DY
1 2
PC4802
SCD22U10V2KX-1GP
PC4802
SCD22U10V2KX-1GP
12
PC4812
SCD1U50V3KX-GP
DY
PC4812
SCD1U50V3KX-GP
DY
1 2
PG4803
GAP-CLOSE-PWR
PG4803
GAP-CLOSE-PWR
1 2
PG4808
GAP-CLOSE-PWR
PG4808
GAP-CLOSE-PWR
1 2
PR4804 0R0402-PADPR4804 0R0402-PAD
1 2
PG4806
GAP-CLOSE-PWR
PG4806
GAP-CLOSE-PWR
1 2
PR4812 1KR2F-3-GP
DY
PR4812 1KR2F-3-GP
DY
1 2
PR4810
0R0402-PAD
PR4810
0R0402-PAD
1 2
PC4806
SCD01U50V2KX-1GP
PC4806
SCD01U50V2KX-1GP
1 2
PC4805
SCD1U50V3KX-GP
PC4805
SCD1U50V3KX-GP
12
PC4815
SC4D7U25V5KX-GP
PC4815
SC4D7U25V5KX-GP
12
PC4813
SC4D7U25V5KX-GP
PC4813
SC4D7U25V5KX-GP
1 2
PR4801
0R0402-PAD
PR4801
0R0402-PAD
12
PC4807
SC22U6D3V5MX-2GP
PC4807
SC22U6D3V5MX-2GP
1 2
PG4809
GAP-CLOSE-PWR
PG4809
GAP-CLOSE-PWR
12
PC4816
SC2D2U10V3KX-1GP
PC4816
SC2D2U10V3KX-1GP
1 2
PR4808
0R0402-PAD
PR4808
0R0402-PAD
12
PR4809
4K7R2J-2-GP
PR4809
4K7R2J-2-GP
12
PC4811
SC22U6D3V5MX-2GP
PC4811
SC22U6D3V5MX-2GP
L_BKLT_CTRL
LVDS_VDD_EN
LVDSA_CLK
LCD_BRIGHTNESS
LVDSA_CLK#
3D3V_DDC_S0
LVDS_DDC_CLK_R
BLON_OUT_C
LCD_PRESENCE#
LVDS_DDC_DATA_R
BLON_OUT_C
LCD_BRIGHTNESSL_BKLT_CTRL
USB_CAMERA#
USB_CAMERA
LCDVDD_R
LID_CLOSE#
3D3V_S0_CAMERA_IN
LVDS_VDD_EN
LCDVDD_DISCHARGE
LVDS_VDD_EN
LVDS_VDD_EN#
LID_CLOSE#
DCBATOUT_LCD DCBATOUT
LCDVDD 3D3V_S0
3D3V_S0
3D3V_S0_CAMERA
3D3V_S0
3D3V_S0
DCBATOUT_LCD
3D3V_S0_CAMERA
LCDVDD
3D3V_AUX_S5
LCDVDD
3D3V_AUX_S5
PANEL_BLEN 27
L_BKLT_EN17
LVDS_VDD_EN17 L_BKLT_CTRL17
CAMERA_EN 27
LVDSA_CLK17 LVDSA_CLK#17
LVDSA_DATA217 LVDSA_DATA2#17
LVDSA_DATA117 LVDSA_DATA1#17
LVDSA_DATA017 LVDSA_DATA0#17
LVDS_DDC_CLK_R17
LVDS_DDC_DATA_R17
BLON_OUT27
LID_CLOSE#27,70
USB_PN1218 USB_PP1218
LCD_DET#18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LCD Connector
A2
49 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LCD Connector
A2
49 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LCD Connector
A2
49 103
Friday, January 06, 2012
<Core Design>
Panel BL brightness/Power En/BL En
LCD POWER
LVDS connector
SSID = VIDEO
For EMI request
Close to LVDS connector
Main:69.50007.A41
Second:69.50007.A31
Layout 40 mil
CAMERA POWER
Layout 40 mil
1.2A
LCD / Inverter Connector
74.05285.07F OBS
check 2nd source=74.05285.07F
Pin11 is CAMERA GND
Pin15 is CAMERA shielding GND
Pin20 is Hall Sensor GND
74.06288.07F SY6288CAAC
74.02171.07F AP2171WG-7 High Active
High Active
High Active
High ActiveSILERGY
DIODES
UPI
GMT
74.07534.A7F OBS
74.05240.A7F OBS
LCDVDD Discharge
12
EC4905
SC5D6P50V2CN-1GP
DY
EC4905
SC5D6P50V2CN-1GP
DY
1 2
C4902
SC1U25V3KX-1-GP
C4902
SC1U25V3KX-1-GP
1 2
C4916
SCD01U50V2KX-L-GP
C4916
SCD01U50V2KX-L-GP
1
23
4
RN4902
SRN2K2J-1-GP
RN4902
SRN2K2J-1-GP
OUT
1
GND
2
OC#
3EN/EN# 4
IN 5
U4901
SY6288CAAC-GP
U4901
SY6288CAAC-GP
OUT
1
GND
2
OC#
3EN/EN# 4
IN 5
U4902
SY6288CAAC-GP
74.06288.07F
U4902
SY6288CAAC-GP
74.06288.07F
12
R49260R0402-PAD R49260R0402-PAD
12
C4922
SC1U6D3V2KX-GP
C4922
SC1U6D3V2KX-GP
12
C4908
SC4D7U6D3V3KX-GP
C4908
SC4D7U6D3V3KX-GP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
LVDS1
JAE-CON40-4-GP
20.K0568.040
LVDS1
JAE-CON40-4-GP
20.K0568.040
12
R49250R0402-PAD R49250R0402-PAD
12
C4904
SC1KP50V2KX-1GP
C4904
SC1KP50V2KX-1GP
12
C4921
SCD1U10V2KX-5GP
C4921
SCD1U10V2KX-5GP
12
C4901
SC100P50V2JN-3GP
C4901
SC100P50V2JN-3GP
12
C4911
SC4D7U6D3V3KX-GP
C4911
SC4D7U6D3V3KX-GP
1 2
R4905 0R0402-PADR4905 0R0402-PAD
1
2
34
5
6
Q4901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q4901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
12
R4930
100R2J-2-GP
R4930
100R2J-2-GP
12
EC4904
SC5D6P50V2CN-1GP
DY
EC4904
SC5D6P50V2CN-1GP
DY
1 2
F4902 FUSE-3A32V-12-GPF4902 FUSE-3A32V-12-GP
1 2
R4922 0R0805-PADR4922 0R0805-PAD
12
C4909
SCD1U16V2KX-3GP
DY
C4909
SCD1U16V2KX-3GP
DY
12
C4905
SCD1U50V3KX-GP
C4905
SCD1U50V3KX-GP
1 2
C4906
SCD1U50V3KX-GP
C4906
SCD1U50V3KX-GP
12
R4929
100KR2J-1-GP
R4929
100KR2J-1-GP
1 2
F4903 FUSE-D5A32V-14-GPF4903 FUSE-D5A32V-14-GP
12
R4911
100KR2J-1-GP
R4911
100KR2J-1-GP
12
C4907
SC4D7U6D3V3KX-GP
C4907
SC4D7U6D3V3KX-GP
1
AFTP4901AFTP4901
12
R49240R0402-PAD R49240R0402-PAD
1 2
R4903
1KR2J-1-GP
R4903
1KR2J-1-GP
1 2
R4928 33R2J-2-GPR4928 33R2J-2-GP
12
EC4902
SC33P50V2JN-3GP
DY
EC4902
SC33P50V2JN-3GP
DY
12
F4901
POLYSW-1D1A24V-GP-U
2nd = 69.50007.A41
F4901
POLYSW-1D1A24V-GP-U
2nd = 69.50007.A41
12
C4912
SC4D7U6D3V3KX-GP
C4912
SC4D7U6D3V3KX-GP
12
C4910
SC100P50V2JN-3GP
C4910
SC100P50V2JN-3GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRT_R
CRT_G
CRT_B
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_VSYNC_CON
CRT_HSYNC_CON 3D3V_S0_DDC
CRT_R
CRT_G
CRT_B
3D3V_S0_DDC
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_VSYNC_CON
CRT_DDCDATA_CON
CRT_HSYNC_CON
5V_CRT_DDC
CRT_BLUE
CRT_RED
CRT_GREEN
CRT_VSYNC1_2 CRT_VSYNC_CON
CRT_HSYNC1_2 CRT_HSYNC_CON
CRT_HSYNC_CON
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_VSYNC_CON
5V_CRT_S0
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_R
CRT_G
CRT_B
CRT_VSYNC_CON
CRT_HSYNC_CON
5V_CRT_S0
3D3V_S0
5V_S0
5V_CRT_S0
5V_S0
5V_CRT_S0
3D3V_S0
5V_CRT_S0
CRT_RED17
CRT_GREEN17
CRT_BLUE17
CRT_DDC_CLK17
CRT_DDC_DATA17
CRT_VSYNC 17
CRT_HSYNC 17
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CRT Connector
A2
50 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CRT Connector
A2
50 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CRT Connector
A2
50 103
Friday, January 06, 2012
<Core Design>
CRT Hsync & Vsync level shift
CRT RGB
Pull High 5V Design on CRT Board
CRT DDCDATA & DDCCLK level shift
500mA
CRT connector
1
2
3
D5003
CH221GP-GP-U
DY
D5003
CH221GP-GP-U
DY
12
C5011
SC100P50V2JN-3GP
DY
C5011
SC100P50V2JN-3GP
DY
1
AFTP5006AFTP5006
1
AFTP5001AFTP5001
1
2 3
4
RN5003
SRN10KJ-5-GP
RN5003
SRN10KJ-5-GP
1
23
4
RN5002
SRN2K2J-1-GP
RN5002
SRN2K2J-1-GP
1
AFTP5008AFTP5008
12
C5004
SC10P50V2JN-4GP
C5004
SC10P50V2JN-4GP
12
C5003
SC8P250V2CC-GP
DY
C5003
SC8P250V2CC-GP
DY
1
2
3
D5007
CH221GP-GP-U
DY
D5007
CH221GP-GP-U
DY
12
C5005
SC10P50V2JN-4GP
C5005
SC10P50V2JN-4GP
12
C5002
SC8P250V2CC-GP
DY
C5002
SC8P250V2CC-GP
DY
G1#
1A1 2
Y2 3
GND
4
A2 5
Y1 6
G2#
7
VCC 8
U5001
TC7W T125FU-GP
2nd = 73.2G125.A0B
73.7W125.007
U5001
TC7W T125FU-GP
2nd = 73.2G125.A0B
73.7W125.007
1
2
3
D5004
CH221GP-GP-U
DY
D5004
CH221GP-GP-U
DY
12
C5001
SC8P250V2CC-GP
DY
C5001
SC8P250V2CC-GP
DY
1 2
R5001 10R2J-2-GPR5001 10R2J-2-GP
1
AFTP5003AFTP5003
12
C5013
SCD01U50V2KX-1GP
C5013
SCD01U50V2KX-1GP
2 1
D5001
CH551H-30PT-GP
2ND = 83.5R003.08F
3rd = 83.R5003.G8F
83.R5003.C8F
D5001
CH551H-30PT-GP
2ND = 83.5R003.08F
3rd = 83.R5003.G8F
83.R5003.C8F
1
2
3
D5006
CH221GP-GP-U
DY
D5006
CH221GP-GP-U
DY
1
AFTP5005AFTP5005
1
2
34
5
6
Q5001
2N7002KDW-GP
2nd = 84.2N702.A3F
84.DM601.03F
Q5001
2N7002KDW-GP
2nd = 84.2N702.A3F
84.DM601.03F
12
F5001
FUSE-1D1A6V-4GP-U
69.50007.691
2nd = 69.50007.771
F5001
FUSE-1D1A6V-4GP-U
69.50007.691
2nd = 69.50007.771
1
AFTP5007AFTP5007
1 2
R5003 10KR2J-3-GPR5003 10KR2J-3-GP
12
C5010
SC18P50V2JN-1-GP
DY
C5010
SC18P50V2JN-1-GP
DY
12
C5007
SCD1U10V2KX-5GP
C5007
SCD1U10V2KX-5GP
CRT_RED
1
CRT_GREEN
2
CRT_BLUE
3
NC#4 4
VCC_CRT
9
NC#11 11
DDCDATA_ID1
12
DDCCLK_ID3
15
VSYNC
14
HSYNC
13
GND 5
GND 6
GND 7
GND 8
GND 10
GND 16
GND 17
CRT1
D-SUB-15-136-GP
20.20961.015
CRT1
D-SUB-15-136-GP
20.20961.015
1
2
3
D5002
CH221GP-GP-U
DY
D5002
CH221GP-GP-U
DY
1
2
3
4 5
6
7
8
RN5001
SRN150F-1-GP
RN5001
SRN150F-1-GP
1
AFTP5009AFTP5009
12
C5009
SC18P50V2JN-1-GP
DY
C5009
SC18P50V2JN-1-GP
DY
1
2
3
D5008
CH221GP-GP-U
DY
D5008
CH221GP-GP-U
DY
12
C5008
SC100P50V2JN-3GP
DY
C5008
SC100P50V2JN-3GP
DY
1 2
L5003
FCM1608CF-220T05-GP
68.00245.011
2nd = 68.00230.021
L5003
FCM1608CF-220T05-GP
68.00245.011
2nd = 68.00230.021
1 2
L5002
FCM1608CF-220T05-GP
68.00245.011
2nd = 68.00230.021
L5002
FCM1608CF-220T05-GP
68.00245.011
2nd = 68.00230.021
1
2
3
D5005
CH221GP-GP-U
DY
D5005
CH221GP-GP-U
DY
1 2
L5001
FCM1608CF-220T05-GP
68.00245.011
2nd = 68.00230.021
L5001
FCM1608CF-220T05-GP
68.00245.011
2nd = 68.00230.021
1
AFTP5002AFTP5002
12
C5006
SC10P50V2JN-4GP
C5006
SC10P50V2JN-4GP
1
AFTP5004AFTP5004
1 2
R5002 10R2J-2-GPR5002 10R2J-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI_DATA0_R_C1
HDMI_CLK_R_C1
HDMI_DATA1_R_C1#
HDMI_CLK_R_C1#
HDMI_DATA1_R_C1
HDMI_DATA2_R_C1#
HDMI_DATA2_R_C1
HDMI_DATA1_R_C
HPD_HDMI_CON
5V_HDMI
HDMI_DATA2_R_C
HDMI_DATA0_R_C
DDC_DATA_HDMI
DDC_CLK_HDMI
HPD_HDMI_CON
HDMI_CLK_R_C#
HDMI_DATA1_R_C#
HDMI_DATA2_R_C#
HDMI_DATA0_R_C#
HDMI_CLK_R_C
HDMI_DATA0_R_C1#
HDMI_PLL_GND
HDMI_CLK_R_C1#
HDMI_CLK_R_C1 HDMI_CLK_R_C
HDMI_CLK_R_C#
HDMI_DATA0_R_C1#
HDMI_DATA0_R_C1 HDMI_DATA0_R_C
HDMI_DATA0_R_C#
HDMI_DATA1_R_C1#
HDMI_DATA1_R_C1 HDMI_DATA1_R_C
HDMI_DATA1_R_C#
HDMI_DATA2_R_C1#
HDMI_DATA2_R_C1 HDMI_DATA2_R_C
HDMI_DATA2_R_C#
5V_HDMI_S0_1
DDC_CLK_HDMI
DDC_DATA_HDMI
5V_HDMI_S0_2
5V_HDMI_S0
HPD_HDMI_CON
DDC_CLK_HDMI
DDC_DATA_HDMI
HDMI_CLK_R_C
HDMI_DATA0_R_C#
HDMI_DATA2_R_C
HDMI_DATA1_R_C#
HDMI_DATA0_R_C
HDMI_CLK_R_C#
HDMI_DATA2_R_C#
HDMI_DATA1_R_C
HDMI_PIN13
HDMI_PIN13
3D3V_S0
3D3V_S0
3D3V_S0
5V_S0
5V_S0
HDMI_CLK_R#17 HDMI_CLK_R17
HDMI_DATA0_R#17 HDMI_DATA0_R17
HDMI_DATA1_R#17 HDMI_DATA1_R17
HDMI_DATA2_R#17 HDMI_DATA2_R17
HDMI_PCH_DET17
PCH_HDMI_CLK17
PCH_HDMI_DATA17
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
HDMI Level Shifter/Connector
A2
51 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
HDMI Level Shifter/Connector
A2
51 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
HDMI Level Shifter/Connector
A2
51 103
Friday, January 06, 2012
<Core Design>
HDMI DDC Passive Level Shifter
HDMI Passive Level Shifter
SSID = VIDEO
Close to HDMI Connector
HDMI CONNECTOR
Close to HDMI Connector
DG: 20K PD
EMI's request
DG: 2.2K PU
ESD Request
1 2
C5103 SCD1U10V2KX-5GPC5103 SCD1U10V2KX-5GP
1
2
3 4
5
6
Q5104
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q5104
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1 2
C5110 SCD1U10V2KX-5GPC5110 SCD1U10V2KX-5GP
12
C5102
SCD1U10V2KX-5GP
C5102
SCD1U10V2KX-5GP
1 2
R5120
0R2J-2-GP
R5120
0R2J-2-GP
1 2
R5118
0R2J-2-GP
R5118
0R2J-2-GP
2 1
D5101
CH551H-30PT-GP
2ND = 83.5R003.08F
3rd = 83.R5003.G8F
83.R5003.C8F
D5101
CH551H-30PT-GP
2ND = 83.5R003.08F
3rd = 83.R5003.G8F
83.R5003.C8F
12
R5101
1MR2F-GP
R5101
1MR2F-GP
1 2
C5108 SCD1U10V2KX-5GPC5108 SCD1U10V2KX-5GP
G
S
D
Q5103
2N7002K-2-GP
2ND = 84.2N702.J31
84.2N702.J31
Q5103
2N7002K-2-GP
2ND = 84.2N702.J31
84.2N702.J31
G
S
D
Q5102
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q5102
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
1 2
C5106 SCD1U10V2KX-5GPC5106 SCD1U10V2KX-5GP
1 2
R5110 180R2F-1-GP
DY
R5110 180R2F-1-GP
DY
12
R5104
100KR2J-1-GP
DY
R5104
100KR2J-1-GP
DY
12
F5101
FUSE-1D1A6V-4GP-U
69.50007.691
2nd = 69.50007.771
F5101
FUSE-1D1A6V-4GP-U
69.50007.691
2nd = 69.50007.771
1 2
R5108 180R2F-1-GP
DY
R5108 180R2F-1-GP
DY
1 2
C5109 SCD1U10V2KX-5GPC5109 SCD1U10V2KX-5GP
1 2
R5121
0R2J-2-GP
R5121
0R2J-2-GP
12
D5105
PESD5V0U1BL-GP-U1
D5105
PESD5V0U1BL-GP-U1
1
2
3
4 5
6
7
8
RN5101
SRN680-U-GP
RN5101
SRN680-U-GP
1 2
C5107 SCD1U10V2KX-5GPC5107 SCD1U10V2KX-5GP
1 2
R5115
0R2J-2-GP
R5115
0R2J-2-GP
12
R5106
100KR2J-1-GP
R5106
100KR2J-1-GP
12
D5108
PESD5V0U1BL-GP-U1
D5108
PESD5V0U1BL-GP-U1
1 2
R5114
0R2J-2-GP
R5114
0R2J-2-GP
1
2
3
4 5
6
7
8
RN5102
SRN680-U-GP
RN5102
SRN680-U-GP
1 2
R5119
0R2J-2-GP
R5119
0R2J-2-GP
1 2
R5117
0R2J-2-GP
R5117
0R2J-2-GP
1
2
3
D5102
BAW56-5-GP
83.00056.Q11
2nd = 83.00056.K11
D5102
BAW56-5-GP
83.00056.Q11
2nd = 83.00056.K11
1
AFTP5121AFTP5121
1 2
R5116
0R2J-2-GP
R5116
0R2J-2-GP
1 2
C5105 SCD1U10V2KX-5GPC5105 SCD1U10V2KX-5GP
1 2
R5109 180R2F-1-GP
DY
R5109 180R2F-1-GP
DY
1 2
R5113 0R2J-2-GP
DY
R5113 0R2J-2-GP
DY
1 2
C5104 SCD1U10V2KX-5GPC5104 SCD1U10V2KX-5GP
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
21
10
CHASSIS
CHASSIS
HDMI1
SKT-HDMI21-1-GP-U
22.10296.571
CHASSIS
CHASSIS
HDMI1
SKT-HDMI21-1-GP-U
22.10296.571
1 2
R5107 180R2F-1-GP
DY
R5107 180R2F-1-GP
DY
12
D5106
PESD5V0U1BL-GP-U1
D5106
PESD5V0U1BL-GP-U1
1
2 3
4
RN5103
SRN2K2J-1-GP
RN5103
SRN2K2J-1-GP
12
D5107
PESD5V0U1BL-GP-U1
D5107
PESD5V0U1BL-GP-U1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
eDP
A4
52 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
eDP
A4
52 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
eDP
A4
52 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
S-VIDEO
A4
53 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
S-VIDEO
A4
53 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
S-VIDEO
A4
53 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
54 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
54 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
54 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
ITP
A4
55 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
ITP
A4
55 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
ITP
A4
55 103
Friday, January 06, 2012
<Core Design>
ITP Connector
CPU
TCK(PIN AC5)
FBO(PIN 11)
TCK(PIN 5)
ITP Connector
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.
SSID = User.Interface
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_ODD_PWRGT
SATA_ODD_DA#_C
ODD_PWR_5V
SATA_ODD_PWRGT SATA_ODD_DA#
ODD_PWRGT#
SATA_ODD_DA#_C
SATA_RXP4_C
SATA_RXN4_C
SATA_TXN4_C
SATA_TXP4_C
SATA_ODD_PRSNT#
SATA_ODD_DA#_C
SATA_TXN4_C
SATA_RXP4_C
SATA_RXN4_C
SATA_TXP4_C
ODD_PWR_5V_IN
5V_S0_HDD
3D3V_S0_HDD
FFS_INT2
SATA_RXN1_C
SATA_TXN1_C
SATA_TXP1_C
SATA_RXP1_C
FFS_INT2
SATA_ODD_DA#
3D3V_S0
5V_S0
5V_S0
ODD_PWR_5V
ODD_PWR_5V
3D3V_S0
5V_S0
SATA_ODD_PWRGT22
SATA_ODD_PRSNT# 22
SATA_RXN421 SATA_RXP421
SATA_TXN421 SATA_TXP421
SATA_RXN121
SATA_TXN121 SATA_TXP121
SATA_RXP121
SATA_ODD_DA# 18,27
HDD_DET#27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
HDD/ODD
A3
56 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
HDD/ODD
A3
56 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
HDD/ODD
A3
56 103Friday, January 06, 2012
<Core Design>
SUPPORT ZERO SATA ODD
SATA HDD Connector
ODD Connector
SATA Zero Power ODD
Current limit
Active High
typ =>2A
100 mil
When the drive is powered on, the FET to the MD/DA pin drive is OFF.
When the drive is powered off, the FET to the MD/DA pin is ON
SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
Mars:
Exchange ODD and ESATA differential pair each other.
74.02069.079 TI TPS2069DGNR MSOP 8P
74.07534.D79 UPI UP7534PRA8-15 MSOP 8P
74.00547.C79 GMT G547F1P81U MSOP 8P (OBS)
74.07534.A79 UPI UP7534ARA8-15 MSOP8P
74.02069.079 TPS2069DGNR
AP2171WG-7 High Active
High Active
High ActiveTI
DIODES
UPI 74.07534.A7F OBS
GND S1
A+
S2 A-
S3 GND S4
B-
S5
B+
S6
GND S7
DP P1
+5V
P2
+5V
P3 MD P4
GND P5
GND P6
GND 14
GND 15
NP1
NP1
NP2
NP2
ODD1
SKT-SATA7P-6P-59-GP-U
22.10300.B91
ODD1
SKT-SATA7P-6P-59-GP-U
22.10300.B91
12
R5604
10KR2J-3-GP
DY
R5604
10KR2J-3-GP
DY
1 2
R5607
0R0805-PAD
R5607
0R0805-PAD
12
C5605
SC10U10V5KX-2GP
C5605
SC10U10V5KX-2GP
12
C5601
SCD1U10V2KX-5GP
DY
C5601
SCD1U10V2KX-5GP
DY
12
C5607SCD01U50V2KX-1GP C5607SCD01U50V2KX-1GP
12
C5606
SCD1U10V2KX-5GP
C5606
SCD1U10V2KX-5GP
12
C5612SCD01U50V2KX-1GP C5612SCD01U50V2KX-1GP
1 2
R5606
0R0805-PAD
R5606
0R0805-PAD
GND
1IN
2EN1#
3EN2#
4
OC1# 8
OUT1 7
OUT2 6
OC2# 5
GND 9
U5601
TPS2064DGNR-GP-U
U5601
TPS2064DGNR-GP-U
12
C5604
SC10U6D3V5KX-1GP
DY
C5604
SC10U6D3V5KX-1GP
DY
1
TP5607TP5607
12
R5602
0R2J-2-GP
DY
R5602
0R2J-2-GP
DY
1
2
3 4
5
6
Q5601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q5601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1 2
R5609 10KR2J-3-GP
DY
R5609 10KR2J-3-GP
DY
12
C5611SCD01U50V2KX-1GP C5611SCD01U50V2KX-1GP
12
C5608SCD01U50V2KX-1GP C5608SCD01U50V2KX-1GP
12
C5614SCD01U50V2KX-1GP C5614SCD01U50V2KX-1GP
12
C5609
SC10U6D3V5KX-1GP
C5609
SC10U6D3V5KX-1GP
12
C5613SCD01U50V2KX-1GP C5613SCD01U50V2KX-1GP
1 2
C5615SCD01U50V2KX-1GP C5615SCD01U50V2KX-1GP
12
C5610
SC10U6D3V5KX-1GP
C5610
SC10U6D3V5KX-1GP
1 2
C5616SCD01U50V2KX-1GP C5616SCD01U50V2KX-1GP
NP1
NP2
23
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
HDD1
SKT-SATA22P-27-GP-U1
62.10065.471
HDD1
SKT-SATA22P-27-GP-U1
62.10065.471
12
R5605
100KR2J-1-GP
R5605
100KR2J-1-GP
1 2
R5603
0R0805-PAD
R5603
0R0805-PAD
1 2
R5608 10KR2J-3-GPR5608 10KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
E-SATA+USB
A4
57 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
E-SATA+USB
A4
57 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
E-SATA+USB
A4
57 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_SPK_L+
AUD_SPK_R+
AUD_SPK_L-
AUD_SPK_R-
AUD_DMIC_CLK_L
AUD_DMIC_CLK_L
AUD_DMIC_DATA_L
AUD_DMIC_CLK_L
AUD_DMIC_DATA_L
3D3V_S0
GND
AUD_DMIC_DATA_L
AUD_DMIC_CLK_L
AUD_DMIC_DATA_L
AU_GND
AU_GND AU_GND
3D3V_S0
AUD_SPK_L+29
AUD_SPK_L-29
AUD_MIC2_VREFO29
AUD_MIC229
AUD_DMIC_CLK29
AUD_DMIC_DATA29
AUD_SPK_R+29
AUD_SPK_R-29
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Audio Jack
A2
58 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Audio Jack
A2
58 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Audio Jack
A2
58 103
Friday, January 06, 2012
<Core Design>
Place these EMI components
close to speaker connector.
Only needed if speaker
connector is physically far from
audio codec. When in doubt, it's
always a good idea to have
population option.
INTERNAL STEREO SPEAKERS
83.RSB56.BAF
83.ESD5B.0AF
ROHM
Description Lenovo P/N Wistron P/N
Table 58.1 - Bi-direction ESD multi-source
N/A
N/A
ESD5B5.0ST1G
RSB5.6SMT2R
Supplier
83.0005V.0AFNXP N/APESD5V0S1BB
ON SEMI
CHECK PIN DEFINE, RIGHT? LEFT?
CHECK PIN DEFINE
Int. Mono Analog MIC for B series
Int. Digital MIC for V series
ME change P/N at SIT
Old 20.F1639.004
New 20.F1621.004
1 2
R5808 1KR2J-1-GP
B Series-MIC
R5808 1KR2J-1-GP
B Series-MIC
1
AFTP5804AFTP5804
1
AFTP5805AFTP5805
12
EC5801
SC47P50V2JN-3GP
EC5801
SC47P50V2JN-3GP
1
AFTP5801AFTP5801
1
AFTP5802AFTP5802
1
AFTP5807AFTP5807
1
AFTP5808AFTP5808
1 2
L5802
SBY100505T-601Y-N-GP
V Series-MIC
L5802
SBY100505T-601Y-N-GP
V Series-MIC
12
C5804
SC1KP50V2KX-1GP
V Series-MIC
C5804
SC1KP50V2KX-1GP
V Series-MIC
12
EC5802
SC47P50V2JN-3GP
EC5802
SC47P50V2JN-3GP
12
C5807
SC100P50V2JN-3GP
B Series-MIC
C5807
SC100P50V2JN-3GP
B Series-MIC
4
1
2
3
SPK2
ACES-CON2-17-GP
20.F1621.002
SPK2
ACES-CON2-17-GP
20.F1621.002
12
C5805
MLVG0402220NV09BP-GP
DY
C5805
MLVG0402220NV09BP-GP
DY
1 2
R5811 2K2R2J-2-GP
B Series-MIC
R5811 2K2R2J-2-GP
B Series-MIC
1
AFTP5809AFTP5809
1 2
R5812 0R2J-2-GP
B Series-MIC
R5812 0R2J-2-GP
B Series-MIC
12
C5806
MLVG0402220NV09BP-GP
DY
C5806
MLVG0402220NV09BP-GP
DY
1
AFTP5810AFTP5810
1
2
3
4
5
6
MIC1
ACES-CON4-17-GP-U1
20.F1621.004
MIC1
ACES-CON4-17-GP-U1
20.F1621.004
1 2
R5813 0R2J-2-GP
DY
R5813 0R2J-2-GP
DY
12
EC5803
SC47P50V2JN-3GP
EC5803
SC47P50V2JN-3GP
12
D5801
MLVG0402220NV05BP-GP-U
DY
D5801
MLVG0402220NV05BP-GP-U
DY
1 2
L5801
SBY100505T-601Y-N-GP
V Series-MIC
L5801
SBY100505T-601Y-N-GP
V Series-MIC
1
AFTP5806AFTP5806
1
AFTP5803AFTP5803
12
EC5804
SC47P50V2JN-3GP
EC5804
SC47P50V2JN-3GP
4
1
2
3
SPK1
ACES-CON2-17-GP
20.F1621.002
SPK1
ACES-CON2-17-GP
20.F1621.002
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RJ45_7
RJ45_4
MCT3
MCT_R
MCT1
MCT4
RJ45_1
MCT3
MCT2XRF_TDC
RJ45_5
MCT2
MCT4
RJ45_3
RJ45_6
MCT1
RJ45_8
RJ45_2
RJ45_1
RJ45_2
RJ45_8
RJ45_7
LAN_ACT_LED#_1
RJ45_2
RJ45_8
RJ45_5
RJ45_6
RJ45_4
RJ45_3
RJ45_7
SPEED_100#_1
RJ45_1
RJ45_6
RJ45_4
RJ45_5
RJ45_3
3D3V_LAN_S5
MDI3+31
MDI3-31
MDI2-31
MDI1+31
MDI1-31
MDI0+31
MDI0-31
MDI2+31
LAN_ACT_LED#31
SPEED_100#31
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
RJ45 / Transformer
A3
59 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
RJ45 / Transformer
A3
59 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
RJ45 / Transformer
A3
59 103
Friday, January 06, 2012
<Core Design>
C5901 value modify to 0.01uF ~
0.4uF capacitor
FOR CO-LAY
GIGA Lan Transformer
LAN Connector
1st
68.IH601.301(Taimag) for 1000
68.HH035.301(Taimag) for 10/100
2nd
68.2413S.30A(Lankom) for 1000
68.H6441.301(Lankom) for 10/100
TVS
83.00005.BAE
DIODE ARR SRV05-4.TCT SOT-23-6
83.09904.AAE
DIODE ESD AZC099-04S SOT23-6L
Swap for V480
close to RJ45
1
2
3
4
5
6
7
8
9
11
12 13
14
15
16
17
18
19
20
21
22
23
24
10
1CT:1CT
1CT:1CT
1CT:1CT
1CT:1CT
XF5901
XFORM-24P-19-GP
68.IH601.301
2ND = 68.89240.30D
1CT:1CT
1CT:1CT
1CT:1CT
1CT:1CT
XF5901
XFORM-24P-19-GP
68.IH601.301
2ND = 68.89240.30D
12
EC5901
SCD1U50V3KX-GP
EC5901
SCD1U50V3KX-GP
12
C5903
SCD01U50V2KX-1GP
C5903
SCD01U50V2KX-1GP
1 2
R5903 330R2J-3-GPR5903 330R2J-3-GP
1 2
330R2J-3-GPR5904 330R2J-3-GPR5904
1 2
C5904
SC1KP2KV6KX-GP
C5904
SC1KP2KV6KX-GP
1
2
3
4 5
6
7
8
RN5902
SRN75J-1-GP
RN5902
SRN75J-1-GP
1
2
34
5
6
D5902
SRV05-4-2-GP
DY
D5902
SRV05-4-2-GP
DY
1
9
10
2
3
4
5
6
7
8
11
12 1314
1516
CHASSIS
CHASSIS
CHASSIS CHASSIS
GREEN
YELLOW
RJ45
RJ45-8P-91-GP
22.10277.U11
CHASSIS
CHASSIS
CHASSIS CHASSIS
GREEN
YELLOW
RJ45
RJ45-8P-91-GP
22.10277.U11
1
2
34
5
6
D5901
SRV05-4-2-GP
DY
D5901
SRV05-4-2-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTC_PWR
+RTC_VCC
+RTC_VCC
GND
SPI_SO
SPI_WP#
SPI_SI_R_1
SPI_HOLD_0#
SPI_CLK_R_1
SPI_SO1
SPI_SI_R_2
SPI_CLK_R_2
SPI_WP# SPI_HOLD_0#
RTC_PWR
3D3V_SPI 3D3V_S5
RTC_AUX_S5 3D3V_AUX_S5 +RTC_VCC
3D3V_SPI 3D3V_SPI
3D3V_SPI
3D3V_SPI
3D3V_SPI
SPI_SO_R21,27 SPI_CS0#_R21,27
SPI_SO_R21,27 SPI_CS1#_R21
SPI_CLK_R 21,27
SPI_SI_R 21,27
SPI_CLK_R 21,27
SPI_SI_R 21,27
RTC_DET# 20
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Flash/RTC
A3
60 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Flash/RTC
A3
60 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Flash/RTC
A3
60 103
Friday, January 06, 2012
<Core Design>
SSID = Flash.ROM
SSID = RBATT
SPI FLASH ROM (8M byte) for PCH
the same page 23 VCCSPI power
Width=20mils
MX25L12835EZNI-10G
72.25Q64.D01
72.25320.C01
72.25Q32.A01
72.25032.H01
Marcronix
SO8
Winbond
4MB
MX25L3206EM2I-12G
72.25128.X01
72.25128.Y01
W25Q032BVSSIG
Numonyx N25Q032A13ESE40
Marcronix
SO8
Winbond
8MB
W25Q064CVSSIG
Numonyx N25Q064A13ESE40
72.25128.B03
72.25128.I01
MX25L6406EM2I-12G 72.25640.D01
72.25Q64.B01
Marcronix
WSON
Winbond
16MB
W25Q128BVEIG
Numonyx N25Q128A13EF840
MX25L12836EZNI-10G
1
23
4
RN6001
SRN4K7J-8-GP
RN6001
SRN4K7J-8-GP
1 2
R6002 1KR2J-1-GPR6002 1KR2J-1-GP
12
EC6001
SC4D7P50V2CN-1GP
DY
EC6001
SC4D7P50V2CN-1GP
DY
1 2
R6010
0R0402-PAD
R6010
0R0402-PAD
12
EC6006
SC4D7P50V2CN-1GP
DY
EC6006
SC4D7P50V2CN-1GP
DY
12
C6001
SC10U6D3V5KX-1GP
DY
C6001
SC10U6D3V5KX-1GP
DY
12
C6002
SCD1U10V2KX-5GP
C6002
SCD1U10V2KX-5GP
12
R6004
4K7R2J-2-GP
R6004
4K7R2J-2-GP
12
EC6003
SC4D7P50V2CN-1GP
DY
EC6003
SC4D7P50V2CN-1GP
DY
12
EC6005
SC4D7P50V2CN-1GP
DY
EC6005
SC4D7P50V2CN-1GP
DY
1
AFTP6002AFTP6002
12
EC6004
SC4D7P50V2CN-1GP
DY
EC6004
SC4D7P50V2CN-1GP
DY
2
1
3
Q6001
CH715FPT-GP
2nd = 83.00040.E81
83.R0304.B81
Q6001
CH715FPT-GP
2nd = 83.00040.E81
83.R0304.B81
1 2
C6003
SC1U6D3V2KX-GP
C6003
SC1U6D3V2KX-GP
1 2
R6006 33R2J-2-GPR6006 33R2J-2-GP
1 2
R6001
33R2J-2-GP
R6001
33R2J-2-GP
S#
1
DQ1
2
W#/VPP
3
VSS
4
DQ0 5
C6
HOLD# 7
VCC 8
GND 9
U6002
LILY-BIOS-COLAY-GP-U
SBA
U6002
LILY-BIOS-COLAY-GP-U
SBA
1 2
R6012
0R2J-2-GP
DY
R6012
0R2J-2-GP
DY
1 2
R6007 33R2J-2-GPR6007 33R2J-2-GP
1
AFTP6001AFTP6001
1 2
R6008 33R2J-2-GP
SBA
R6008 33R2J-2-GP
SBA
4
1
2
3
RTC14
ACES-CON2-11-GP
20.F0772.002
RTC14
ACES-CON2-11-GP
20.F0772.002
G
S
D
Q6002
2N7002K-2-GP
Q6002
2N7002K-2-GP
1 2
R6009 33R2J-2-GP
SBA
R6009 33R2J-2-GP
SBA
12
R6005
4K7R2J-2-GP
SBA
R6005
4K7R2J-2-GP
SBA
1 2
R6003
33R2J-2-GP
SBA
R6003
33R2J-2-GP
SBA
1 2
R6011
10MR2J-L-GP
R6011
10MR2J-L-GP
S#
1
DQ1
2
W#/VPP
3
VSS
4
DQ0 5
C6
HOLD# 7
VCC 8
GND 9
U6001
LILY-BIOS-COLAY-GP-U
U6001
LILY-BIOS-COLAY-GP-U
12
EC6002
SC4D7P50V2CN-1GP
DY
EC6002
SC4D7P50V2CN-1GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
5V_USB4_S35V_S5
USB_OC#2_3 18USB_PWR_EN_R27,62,82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB Connector
A3
61 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB Connector
A3
61 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB Connector
A3
61 103Friday, January 06, 2012
<Core Design>
USB Board CONN.
at least 80 milat least 80 mil
Support 2A
Place U6102 close to USBCN1
OUT 1
GND 2
OC# 3
EN/EN#
4
IN
5
U6102
SY6288CAAC-GP
74.06288.07F
U6102
SY6288CAAC-GP
74.06288.07F
12
C6103
SCD1U10V2KX-5GP
DY
C6103
SCD1U10V2KX-5GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB3_RX3_P_R
USB3_TX3_N_R
USB3_TX3_P_R
USB3_RX3_N_R
USB_PN1_R
USB_PP3_R
USB_PN3_R
USB_PP3_R USB_PN3_R
USB_PP1_R
USB_PN1_R
USB3_RX1_P USB3_RX1_P_R
USB3_TX1_N_C USB3_TX1_N_R
USB3_TX1_P_R
USB3_RX1_N USB3_RX1_N_R
USB3_TX1_P_C
USB3_TX3_N_C
USB3_TX3_P_C
USB_PP1_R
USB3_RX1_P_R
USB3_RX1_N_R
USB3_TX1_P_R
USB3_TX1_N_R
USB_PP1_R
USB_PN1_R
USB3_RX3_P_R
USB3_RX3_N_R
USB3_TX3_P_R
USB3_TX3_N_R
USB_PP3_R
USB_PN3_R
USB3_TX3_N_R
USB3_TX3_P_R
USB3_RX3_N_R
USB3_RX3_P_R
USB3_TX3_P_R
USB3_TX3_N_R
USB3_RX3_P_R
USB3_RX3_N_R
USB3_TX1_N_R
USB3_TX1_P_R
USB3_RX1_N_R
USB3_RX1_P_R
USB3_TX1_P_R
USB3_TX1_N_R
USB3_RX1_P_R
USB3_RX1_N_R
5V_USB1_S3
5V_USB2_S3
5V_USB1_S3
5V_USB2_S3
5V_USB1_S3
5V_USB2_S3
5V_S5
USB3_RX3_P18
USB3_RX3_N18
USB_PN318
USB_PP318
USB_PN118
USB_PP118
USB3_RX1_P18
USB3_RX1_N18
USB3_TX1_P18
USB3_TX1_N18 USB3_TX3_N18
USB3_TX3_P18
USB_PWR_EN_R27,61,82
USB_OC#4_5 18
USB_OC#0_1 18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB 3.0 Port*2
A2
62 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB 3.0 Port*2
A2
62 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
USB 3.0 Port*2
A2
62 103
Friday, January 06, 2012
<Core Design>
TC6201 place near
the USB1 connector
TC6202 place near
the USB2 connector
USB3.0 Port4
USB3.0 Port3
2A
at least 80 mil
USB3.0 Port1 USB3.0 Port2
1 2
R6201
0R0402-PAD
R6201
0R0402-PAD
1
2 3
4
D6202
PRTR5V0U2X-GP
DY
D6202
PRTR5V0U2X-GP
DY
1 2
R6209
0R0402-PAD
R6209
0R0402-PAD
1 2
C6206 SCD1U16V2KX-3GPC6206 SCD1U16V2KX-3GP
GND 4
STDA_SSRX+ 6
STDA_SSTX- 8
STDA_SSTX+ 9
GND_DRAIN 7
STDA_SSRX- 5
D+
3D-
2
VBUS
1
10
10
11
11
12
12
13
13
USB2
SKT-USB13-77-GP
22.10339.K61
USB2
SKT-USB13-77-GP
22.10339.K61
1 2
C6210 SCD1U16V2KX-3GPC6210 SCD1U16V2KX-3GP
1 2
R6211
0R0402-PAD
R6211
0R0402-PAD
12
TC6201
SE220U6D3VM-30-GP
TC6201
SE220U6D3VM-30-GP
1 2
C6209 SCD1U16V2KX-3GPC6209 SCD1U16V2KX-3GP
1 2
R6202
0R0402-PAD
R6202
0R0402-PAD
1 2
R6204
0R0402-PAD
R6204
0R0402-PAD
L1#1
1
L2#2
2
GND
G1
L3#3
3
L4#4
4L4#5 5
L3#6 6
L2#7 7
L1#8 8
GND G2
D6201
RCLAMP0524P-GP
1st = 83.3V3U4.0A0
D6201
RCLAMP0524P-GP
1st = 83.3V3U4.0A0
1 2
R6206
0R0402-PAD
R6206
0R0402-PAD
L1#1
1
L2#2
2
GND
G1
L3#3
3
L4#4
4L4#5 5
L3#6 6
L2#7 7
L1#8 8
GND G2
D6204
RCLAMP0524P-GP
1st = 83.3V3U4.0A0
D6204
RCLAMP0524P-GP
1st = 83.3V3U4.0A0
1 2
R6208
0R0402-PAD
R6208
0R0402-PAD
1 2
R6210
0R0402-PAD
R6210
0R0402-PAD
GND 4
STDA_SSRX+ 6
STDA_SSTX- 8
STDA_SSTX+ 9
GND_DRAIN 7
STDA_SSRX- 5
D+
3D-
2
VBUS
1
10
10
11
11
12
12
13
13
USB1
SKT-USB13-77-GP
22.10339.K61
USB1
SKT-USB13-77-GP
22.10339.K61
1 2
R6212
0R0402-PAD
R6212
0R0402-PAD
1 2
C6208 SCD1U16V2KX-3GPC6208 SCD1U16V2KX-3GP
12
C6205
SCD1U10V2KX-5GP
C6205
SCD1U10V2KX-5GP
GND
1
IN
2
EN1#
3
EN2#
4
OC1# 8
OUT1 7
OUT2 6
OC2# 5
GND 9
U6201
TPS2064DGNR-GP-U
U6201
TPS2064DGNR-GP-U
1 2
R6203
0R0402-PAD
R6203
0R0402-PAD
1
2 3
4
D6203
PRTR5V0U2X-GP
DY
D6203
PRTR5V0U2X-GP
DY
1 2
R6205
0R0402-PAD
R6205
0R0402-PAD
1 2
R6207
0R0402-PAD
R6207
0R0402-PAD
12
TC6202
SE220U6D3VM-30-GP
TC6202
SE220U6D3VM-30-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3D3V_BT_S0
USB_PP4
USB_PN4
3D3V_BT_IN
BT_LED
GND
3D3V_BT_S0
BT_LED
3D3V_S0
3D3V_BT_S0
BLUETOOTH_EN 27,65
USB_PN4 18
USB_PP4 18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Bluetooth
A4
63 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Bluetooth
A4
63 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Bluetooth
A4
63 103
Friday, January 06, 2012
<Core Design>
SSID = User.Interface
Bluetooth conn.
BT Module pin definition is same as LA470
74.06288.07F SY6288CAAC
74.02171.07F AP2171WG-7 High Active
High Active
High Active
High ActiveSILERGY
DIODES
UPI
GMT
74.07534.A7F OBS
74.05240.A7F OBS
1
2
3
4
5
6
7
8
BT1
ACES-CON6-42-GP
20.F1705.006
DY
BT1
ACES-CON6-42-GP
20.F1705.006
DY
1
AFTP6304AFTP6304 1
AFTP6303AFTP6303
1 2
R6301
0R0805-PAD
R6301
0R0805-PAD
12
EC6302
SCD1U16V2KX-3GP
DY
EC6302
SCD1U16V2KX-3GP
DY
1
AFTP6306AFTP6306
12
C6302
SC4D7U6D3V3KX-GP
DY
C6302
SC4D7U6D3V3KX-GP
DY
1
AFTP6305AFTP6305
OUT
1
GND
2
OC#
3EN/EN# 4
IN 5
U6301
SY6288CAAC-GP
74.06288.07F
DY
U6301
SY6288CAAC-GP
74.06288.07F
DY
1
AFTP6302AFTP6302
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Biometric_USBPN
Biometric_USBPP
3V_FP_S0
Biometric_USBPP
Biometric_USBPN
3V_FP_S0
3D3V_S0
USB_PP1018 USB_PN1018
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Finger Printer Connector
A4
64 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Finger Printer Connector
A4
64 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Finger Printer Connector
A4
64 103
Friday, January 06, 2012
<Core Design>
Finger Printer Connector
1
2
3
4
5
6
7
8
FPCN1
ACES-CON6-13-GP
20.K0320.006
FPCN1
ACES-CON6-13-GP
20.K0320.006
12
C6401
SCD1U10V2KX-4GP
C6401
SCD1U10V2KX-4GP
1 2
R6403
0R0805-PAD
R6403
0R0805-PAD
1 2
R6402 0R0402-PADR6402 0R0402-PAD
1 2
R6401 0R0402-PADR6401 0R0402-PAD
1
AFTP6401AFTP6401
1
AFTP6404AFTP6404
1
AFTP6402AFTP6402
1
AFTP6403AFTP6403
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_WAKE#_1
CLK_PCI_LPC_C
WLAN_LED#
E51_RXD_R
PLT_RST#_WLAN
E51_TXD_R
+3V_MINI_WLAN
LPC_FRAME#_C
LPC_AD2_C
LPC_AD0_C
LPC_AD3_C
LPC_AD1_C
LPC_FRAME#_C
CLK_PCI_LPC_C
LPC_AD2_C
LPC_AD0_C
LPC_AD3_C
LPC_AD1_C
+3V_MINI_WLAN
+1D5V_MINI_WLAN
BT_ENABLE
AOAC_EN_2
AOAC_EN_1
BLUETOOTH_EN
+5V_MINI_DEBUG
1D5V_S0 3D3V_S0
5V_S5
+3V_MINI_WLAN
5V_S5
+3V_MINI_WLAN
+1D5V_MINI_WLAN
+3V_MINI_WLAN+1D5V_MINI_WLAN
+3V_MINI_WLAN
3D3V_S5 +3V_MINI_WLAN
3D3V_S5
CLK_PCIE_WLAN#20 CLK_PCIE_WLAN20
PCH_SMBCLK 14,15,20,66
WIFI_RF_EN 27
PCIE_CLK_WLAN_REQ#20
E51_RXD27 E51_TXD27
USB_PP11 18
USB_PN11 18
PCIE_TXN220 PCIE_TXP220
PCIE_RXP220 PCIE_RXN220
PLT_RST# 5,18,27,31,36,66,71,80,82,83,97
PCIE_WAKE#19,31,66
LPC_AD2 21,27,71
LPC_AD0 21,27,71
LPC_AD3 21,27,71
LPC_AD1 21,27,71
LPC_FRAME# 21,27,71
CLK_PCI_LPC 18,71
PCH_SMBDATA 14,15,20,66
BLUETOOTH_EN27,63
AOAC_EN27
PCIE_WLAN_WAKE#27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
MINICARD(WLAN)/ITP CONN
A3
65 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
MINICARD(WLAN)/ITP CONN
A3
65 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
MINICARD(WLAN)/ITP CONN
A3
65 103
Friday, January 06, 2012
<Core Design>
SSID = Wireless
Mini Card Connector(802.11a/b/g/n)
G6506~G6511
placememt close close WLAN1
in bottom side
Place near MINI Card CONN
Reserve for AOAC
E
BC
R1
R2
Q6502
PDTC115EE-1-GP
AOAC
84.00115.C1K
2nd = 84.09115.011
3rd = 84.00015.01H
R1
R2
Q6502
PDTC115EE-1-GP
AOAC
84.00115.C1K
2nd = 84.09115.011
3rd = 84.00015.01H
12
C6508
SCD1U10V2KX-5GP
AOAC
C6508
SCD1U10V2KX-5GP
AOAC
21
G6502 GAP-OPEN
G6502 GAP-OPEN
21
G6505 GAP-OPEN
G6505 GAP-OPEN
1 2
R6510 0R0402-PADR6510 0R0402-PAD
1 2
R6502 0R0402-PADR6502 0R0402-PAD
12
R6515
100KR2J-1-GP
AOAC
R6515
100KR2J-1-GP
AOAC
12
C6507
SCD1U16V2KX-3GP
C6507
SCD1U16V2KX-3GP
12
C6502
SCD1U16V2KX-3GP
C6502
SCD1U16V2KX-3GP
21
G6504 GAP-OPEN
G6504 GAP-OPEN
12
R6512
0R5J-5-GP
AOAC-DY
R6512
0R5J-5-GP
AOAC-DY
12
R6517
10KR2J-3-GP
DY
R6517
10KR2J-3-GP
DY
12
C6505
SC10U6D3V5KX-1GP
C6505
SC10U6D3V5KX-1GP
1 2
R6520 0R2J-2-GPR6520 0R2J-2-GP
21
G6503 GAP-OPEN
G6503 GAP-OPEN
12
C6501
SCD1U16V2KX-3GP
C6501
SCD1U16V2KX-3GP
12
R6521
10KR2J-3-GP
R6521
10KR2J-3-GP
12
C6504
SCD1U16V2KX-3GP
C6504
SCD1U16V2KX-3GP
1 2
R6501 0R0402-PADR6501 0R0402-PAD
12
R6518
10KR2J-3-GP
AOAC
R6518
10KR2J-3-GP
AOAC
1 2
R6511 0R2J-2-GP
DY
R6511 0R2J-2-GP
DY
21
G6511 GAP-OPEN
G6511 GAP-OPEN
1
TP6501TP6501
6
54
3
2
1
7
8
U6501
TPCF8105-GP
AOAC
U6501
TPCF8105-GP
AOAC
1 2
R6513 0R2J-2-GPR6513 0R2J-2-GP
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
53
54
NP1
NP2
WLAN1
TYCO-CONN52A-2-GP
20.F1743.052
WLAN1
TYCO-CONN52A-2-GP
20.F1743.052
12
R6516
0R0805-PAD
R6516
0R0805-PAD
12
C6503
SC10U6D3V5KX-1GP
C6503
SC10U6D3V5KX-1GP
21
G6501 GAP-OPEN
G6501 GAP-OPEN
12
C6506
SCD1U16V2KX-3GP
C6506
SCD1U16V2KX-3GP
1 2
R6503 0R3J-0-U-GP
DY
R6503 0R3J-0-U-GP
DY
1 2
R6519 0R2J-2-GPR6519 0R2J-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_SMBCLK
PCH_SMBDATA
USB_P8-
USB_P8+
PLT_RST#_WAN
3G_LED#
+3V_MINI_WWAN
SATA_RXP0_C
SATA_RXN0_C
SATA_TXN0_C
SATA_TXP0_C
+3V_MINI_WWAN
+1D5V_MINI_WWAN
+1D5V_MINI_WWAN
+3V_MINI_WWAN+1D5V_MINI_WWAN
1D5V_S0 3D3V_S0
+3V_MINI_WWAN
+3V_MINI_WWAN +3V_MINI_WWAN+1D5V_MINI_WWAN
+3V_MINI_WWAN
PLT_RST# 5,18,27,31,36,65,71,80,82,83,97
PCH_SMBCLK 14,15,20,65
USB_PN8 18
USB_PP8 18
PCIE_WAKE#19,31,65
SATA_RXP021
SATA_TXN021
SATA_RXN021
SATA_TXP021 PCH_SMBDATA 14,15,20,65
-MSATA_DET27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
WWAN Connector
A3
66 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
WWAN Connector
A3
66 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
WWAN Connector
A3
66 103
Friday, January 06, 2012
<Core Design>
Place near MINI Card CONN
Place near Pin 24
SSID = Wireless
Mini Card Connector(Full Card)
mSATA for V Series Only
12
C6608
SCD1U16V2KX-3GP
C6608
SCD1U16V2KX-3GP
12
R6606
0R0805-PAD
R6606
0R0805-PAD
12
C6619
SC4D7U6D3V3KX-GP
C6619
SC4D7U6D3V3KX-GP
12
C6609
SCD047U16V2KX-1-GP
C6609
SCD047U16V2KX-1-GP
1 2
C6620 SCD01U50V2KX-1GPC6620 SCD01U50V2KX-1GP
12
C6606
SCD047U16V2KX-1-GP
C6606
SCD047U16V2KX-1-GP
12
R6607
0R0805-PAD
R6607
0R0805-PAD
1 2
R6608
0R0402-PAD
R6608
0R0402-PAD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
53
54
NP1
NP2
WLAN2
TYCO-CONN52A-2-GP
20.F1743.052
WLAN2
TYCO-CONN52A-2-GP
20.F1743.052
1 2
C6611 SCD01U50V2KX-1GPC6611 SCD01U50V2KX-1GP
12
C6603
SC33P50V2JN-3GP
C6603
SC33P50V2JN-3GP
1 2
C6614 SCD01U50V2KX-1GPC6614 SCD01U50V2KX-1GP
1
TP6602TP6602
12
C6601
SCD047U16V2KX-1-GP
C6601
SCD047U16V2KX-1-GP
1 2
R6604 0R2J-2-GP
DY
R6604 0R2J-2-GP
DY
1 2
R6603 0R3J-0-U-GP
DY
R6603 0R3J-0-U-GP
DY
12
C6604
SC33P50V2JN-3GP
DY
C6604
SC33P50V2JN-3GP
DY
12
C6607
SC33P50V2JN-3GP
C6607
SC33P50V2JN-3GP
12
C6618
SC4D7U6D3V3KX-GP
C6618
SC4D7U6D3V3KX-GP
1 2
R6605
0R0402-PAD
R6605
0R0402-PAD
1 2
C6612 SCD01U50V2KX-1GPC6612 SCD01U50V2KX-1GP
12
C6610
SC33P50V2JN-3GP
C6610
SC33P50V2JN-3GP
1 2
R6601 0R3J-0-U-GP
DY
R6601 0R3J-0-U-GP
DY
12
C6602
SCD047U16V2KX-1-GP
C6602
SCD047U16V2KX-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
67 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
67 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
67 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAP_LED_Q
NUM_LED_Q
KBC_PWRBTN#_R
PWRLED
KBC_NOVO_BTN#_R
NUM_LED_R
CAP_LED_R
SATA_LED#_R
APS_LED#_R
SATA_LED#_Q
3D3V_S0
NUM_LED_R
APS_LED#_R
SATA_LED#_R
CAP_LED_R
3D3V_S5
PWRLED
KBC_NOVO_BTN#_R
KBC_PWRBTN#_R
APS_LED#_Q
SATA_LED#_Q
NUM_LED_Q
CAP_LED_Q
APS_LED#_Q
CHARGE_LED#_Q
DC_BATFULL#_Q
DC_BATFULL#_Q
CHARGE_LED#_Q
CHARGE_LED#_R
3D3V_S5
3D3V_S0
3D3V_S5
CAP_LED 27NUM_LED27
PWRLED27
KBC_NOVO_BTN#27 KBC_PWRBTN#27
SATA_LED#21
APS_LED21
DC_BATFULL27 CHARGE_LED 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LED Bard/Power Button
A3
68 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LED Bard/Power Button
A3
68 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
LED Bard/Power Button
A3
68 103
Friday, January 06, 2012
<Core Design>
SSID = User.Interface
CHARGER LED
Yellow
GREEN
1
2
34
5
6
Q6802
2N7002KDW-GP
Q6802
2N7002KDW-GP
1 2
R6818 470R2J-2-GP
V Series-APS
R6818 470R2J-2-GP
V Series-APS
1 2
R6807 100R2J-2-GPR6807 100R2J-2-GP
1
AFTP6808AFTP6808
1
AFTP6806AFTP6806
1
AFTP6805AFTP6805
12
EC6809
SC1KP50V2KX-1GP
V Series-APS
EC6809
SC1KP50V2KX-1GP
V Series-APS
1
AFTP6804AFTP6804
1
AFTP6803AFTP6803
1
2
34
5
6
Q6804
2N7002KDW-GP
Q6804
2N7002KDW-GP
1
AFTP6801AFTP6801
12
EC6806
SC1KP50V2KX-1GP
EC6806
SC1KP50V2KX-1GP
2 1
G6801
GAP-OPEN
G6801
GAP-OPEN
1 2
R6813 470R2J-2-GPR6813 470R2J-2-GP
1
2
3
4
5
6
7
8
BTNCN1
ACES-CON6-22-GP-U
20.K0487.006
BTNCN1
ACES-CON6-22-GP-U
20.K0487.006
1 2
R6824
0R2J-2-GP
DY
R6824
0R2J-2-GP
DY
12
EC6811
SC1KP50V2KX-1GP
EC6811
SC1KP50V2KX-1GP
2
13
R1
R2
Q6801
LTC043ZUB-FS8-GP
84.00043.011
R1
R2
Q6801
LTC043ZUB-FS8-GP
84.00043.011
12
EC6802
SC1KP50V2KX-1GP
EC6802
SC1KP50V2KX-1GP
1 2
R6810 100R2J-2-GPR6810 100R2J-2-GP
1 2
R6812 470R2J-2-GPR6812 470R2J-2-GP
E
BC
R1
R2
Q6810
PDTA143ET-GP
84.00143.M11
2nd = 84.02143.011
R1
R2
Q6810
PDTA143ET-GP
84.00143.M11
2nd = 84.02143.011
1
AFTP6809AFTP6809
12
EC6804
SC1KP50V2KX-1GP
EC6804
SC1KP50V2KX-1GP
1
AFTP6810AFTP6810
1
AFTP6811AFTP6811
12
EC6808
SC1KP50V2KX-1GP
EC6808
SC1KP50V2KX-1GP
1
AFTP6814AFTP6814
1 2
R6809 100R2J-2-GPR6809 100R2J-2-GP
1
AFTP6812AFTP6812
12
EC6805
SC1KP50V2KX-1GP
EC6805
SC1KP50V2KX-1GP
12
EC6801
SC1KP50V2KX-1GP
EC6801
SC1KP50V2KX-1GP
1
AFTP6813AFTP6813
1
32
LED2
LED-GY-8-GP-U
83.00326.070
LED2
LED-GY-8-GP-U
83.00326.070
1 2
R6802 100R2J-2-GPR6802 100R2J-2-GP
12
C6813
SCD1U16V2KX-3GP
DY
C6813
SCD1U16V2KX-3GP
DY
1
2
3
4
5
6
7
8
9
10
LEDCN1
ACES-CON8-15-GP
20.K0315.008
LEDCN1
ACES-CON8-15-GP
20.K0315.008
12
EC6807
SC1KP50V2KX-1GP
EC6807
SC1KP50V2KX-1GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
TP_PIN6
TP_DATA
TP_CLK
TPCLK
TPDATA TP_CLK
TP_DATA
TP_SW _L TP_SW_R
TP_PIN5
TP_PIN1
TP_PIN2
TP_PIN4
KCOL15
KCOL15
KCOL10
KCOL10
KCOL11
KCOL11
KCOL14
KCOL14
KCOL13
KCOL13
KCOL12
KCOL12
KCOL3
KCOL3
KCOL6
KCOL6
KCOL8
KCOL8
KCOL7
KCOL7
KCOL4
KCOL4
KCOL2
KCOL2
KROW0
KROW0
KCOL5
KCOL1
KCOL1
KCOL5
KCOL0
KCOL9
KROW5
KROW2
KROW6
KROW1
KROW3
KROW7
KROW4
KCOL0
KCOL9
KROW5
KROW2
KROW6
KROW1
KROW7
KROW3
KROW4
GND
TP_PIN3
TP_SW _L
TP_SW _R
TP_PIN1
TP_PIN6
TP_PIN2
TP_PIN3
TP_PIN4
TP_PIN5
TP_SW _R
TP_SW _L TP_PIN5
TP_PIN4
TP_PIN3
TP_PIN6
TP_PIN1
TP_PIN2TP_CLK
TP_PIN1
TP_PIN2TP_CLK
TP_DATA TP_PIN4
TP_PIN3
TP_DATA
5V_S0
5V_S0
3D3V_S0
KROW[0..7] 27
KCOL[0..15] 27
TPDATA27 TPCLK27
PCH_SMBCLK 14,15,20,66
PCH_SMBDATA 14,15,20,66
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
TOUCH PAD CONNECTOR
A2
69 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
TOUCH PAD CONNECTOR
A2
69 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
TOUCH PAD CONNECTOR
A2
69 103Friday, January 06, 2012
<Core Design>
SB 1015 Swap data and clk
SSID = Touch.Pad
Internal KeyBoard Connector
SSID = KBC ClickPad for V Series 3.3V
Normal Pad for B Series 5V
KB14 for 14" VB480 & VB485
KB15 for 15" VB580 & VB585
1
AFTP6920AFTP6920
1
23
4
RN6904
SRN0J-6-GP
B Series-TP
RN6904
SRN0J-6-GP
B Series-TP
1
AFTP6909AFTP6909
1
AFTP6907AFTP6907
1
AFTP6931AFTP6931
1
AFTP6911AFTP6911
1
AFTP6912AFTP6912
1
AFTP6919AFTP6919
1
AFTP6908AFTP6908
1
AFTP6914AFTP6914
1
23
4
RN6901
SRN10KJ-5-GP
RN6901
SRN10KJ-5-GP
1
AFTP6941AFTP6941
1
AFTP6916AFTP6916
1
AFTP6923AFTP6923
1
AFTP6902AFTP6902
1
AFTP6905AFTP6905
1 2
C6903
SC100P50V2JN-3GP
DY
C6903
SC100P50V2JN-3GP
DY
1
AFTP6913AFTP6913
1
AFTP6922AFTP6922
1
AFTP6942AFTP6942
1
23
4
RN6903
SRN100J-3-GP
B Series-TP
RN6903
SRN100J-3-GP
B Series-TP
1
AFTP6930AFTP6930
1
23
4
RN6905
SRN0J-6-GP
B Series-TP
RN6905
SRN0J-6-GP
B Series-TP
1
AFTP6910AFTP6910
1
AFTP6940AFTP6940
1
23
4
RN6906
SRN0J-6-GP
V Series-TP
RN6906
SRN0J-6-GP
V Series-TP
1
AFTP6928AFTP6928
1
2 3
4
RN6902
SRN33J-5-GP-U
RN6902
SRN33J-5-GP-U
1
AFTP6901AFTP6901
1 2
C6904
SC100P50V2JN-3GP
DY
C6904
SC100P50V2JN-3GP
DY
1 2
43
56
TPSW 2
SW-TACT4-14-GP
62.40009.D71
B Series-TP
TPSW 2
SW-TACT4-14-GP
62.40009.D71
B Series-TP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
KB14
ACES-CON24-7-GP
20.K0320.024
2nd = 20.K0391.024
KB14
ACES-CON24-7-GP
20.K0320.024
2nd = 20.K0391.024
1 2
43
56
TPSW 1
SW-TACT4-14-GP
62.40009.D71
B Series-TP
TPSW 1
SW-TACT4-14-GP
62.40009.D71
B Series-TP
1
AFTP6926AFTP6926
1
AFTP6939AFTP6939
12
C6901
SCD1U10V2KX-4GP
B Series-TP
C6901
SCD1U10V2KX-4GP
B Series-TP
1
AFTP6924AFTP6924
1
AFTP6925AFTP6925
1
AFTP6906AFTP6906
1
AFTP6927AFTP6927
1
AFTP6904AFTP6904
1
AFTP6929AFTP6929
1
AFTP6917AFTP6917
1
2
3
4
5
6
7
8
TPAD1
ACES-CON6-13-GP
20.K0320.006
TPAD1
ACES-CON6-13-GP
20.K0320.006
12
R6901
0R2J-2-GP
DY
R6901
0R2J-2-GP
DY
1
AFTP6921AFTP6921
1
AFTP6903AFTP6903
12
C6902
SCD1U10V2KX-4GP
V Series-TP
C6902
SCD1U10V2KX-4GP
V Series-TP
1
AFTP6918AFTP6918
1
AFTP6932AFTP6932
1
23
4
RN6907
SRN0J-6-GP
V Series-TP
RN6907
SRN0J-6-GP
V Series-TP
1
AFTP6915AFTP6915
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Hall Sensor
A4
70 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Hall Sensor
A4
70 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Hall Sensor
A4
70 103
Friday, January 06, 2012
<Core Design>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3D3V_S0
PLT_RST#5,18,27,31,36,65,66,80,82,83,97
CLK_PCI_LPC18,65
LPC_FRAME#21,27,65
LPC_AD021,27,65 LPC_AD121,27,65 LPC_AD221,27,65 LPC_AD321,27,65
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Dubug connector
A4
71 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Dubug connector
A4
71 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Dubug connector
A4
71 103
Friday, January 06, 2012
<Core Design>
20.D0183.110
1
2
3
4
5
6
7
8
9
10
11
12
DB1
MLX-CON10-7-GP
DY
DB1
MLX-CON10-7-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
72 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
72 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
72 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
73 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
73 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
73 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CARD Reader CONN
A2
74 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CARD Reader CONN
A2
74 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
CARD Reader CONN
A2
74 103
Friday, January 06, 2012
<Core Design>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
New Card
A4
75 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
New Card
A4
75 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
New Card
A4
75 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
76 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
76 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
76 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
77 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
77 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
77 103
Friday, January 06, 2012
<Core Design>
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
78 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
78 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
78 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GSENSE_Y_R
VCC3M_Q34
GSENSE_Z
VCC3_ACC
GSENSE_TST
GSENSE_X_R
ANALOG_AGND
ANALOG_AGND
3D3V_S5
ANALOG_AGND
ANALOG_AGND
GSENSE_ON#27
GSENSE_Y 27
GSENSE_X 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
G-Sensor
A4
79 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
G-Sensor
A4
79 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
G-Sensor
A4
79 103
Friday, January 06, 2012
<Core Design>
Layout Comment :
(1) Place C483, C484, Q46, R528, R530,
C479, C476, R509, R508 close to U55.
(2) Avoid routing under DCDC switching area.
74.KXTC8.0BZ
ROHM-KIONIX
KXTC8-2850-GP
G-Sensor
V Series Only
12
C7901
SC10U6D3V5KX-1GP
C7901
SC10U6D3V5KX-1GP
12
C7904
SCD1U10V2KX-4GP
C7904
SCD1U10V2KX-4GP
12
C7908
SCD1U10V2KX-4GP
C7908
SCD1U10V2KX-4GP
1 2
R7907 56KR2J-L1-GPR7907 56KR2J-L1-GP
12
R7903
100KR2J-1-GP
R7903
100KR2J-1-GP
1
TP7902TP7902
12
C7907
SCD1U10V2KX-4GP
C7907
SCD1U10V2KX-4GP
1 2
R7901 10R2J-2-GP
R7901 10R2J-2-GP
1TP7901TP7901
ST
2
GND
3
GND
5
GND
6
GND
7
NC#1
1
NC#4
4
NC#9
9NC#16 16
NC#13 13
RES 15
VDD 14
VOUTZ 8
VOUTY 10
VOUTX 12
NC#11 11
U7901
LIS34ALTR-GP
2nd = 74.KXTC8.0BZ
U7901
LIS34ALTR-GP
2nd = 74.KXTC8.0BZ
12
C7902
SCD1U10V2KX-4GP
C7902
SCD1U10V2KX-4GP
12
C7905
SCD1U10V2KX-4GP
C7905
SCD1U10V2KX-4GP
12
R7902
100KR2J-1-GP
DY
R7902
100KR2J-1-GP
DY
12
R7904
0R0402-PAD
R7904
0R0402-PAD
1 2
R7906 56KR2J-L1-GPR7906 56KR2J-L1-GP
E
BC
R1
R2
Q7901
PDTA114EE-3-GP-U
2nd = 84.09114.A11
3rd = 84.00014.01H
84.00114.H1K
R1
R2
Q7901
PDTA114EE-3-GP-U
2nd = 84.09114.A11
3rd = 84.00014.01H
84.00114.H1K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROT_EEPROM
3D3V_S5
3D3V_S5
3D3V_S0
PLT_RST# 5,18,27,31,36,65,66,71,82,83,97
SMB_CLK 20
SMB_DATA 20
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
RF ID
A4
80 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
RF ID
A4
80 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
RF ID
A4
80 103
Friday, January 06, 2012
<Core Design>
RFID
LTC015TEB
N/A
N/A
72.BUL08.A0Q
72.24S08.A0Q
ROHM
NXP
SANYO
Description Lenovo P/N Wistron P/N
Table 80.1- Transistor multi-source
84.00115.E1KNXP
ROHM
Description Lenovo P/N Wistron P/N
N/A
84.09115.A11
PDTC115TE
DRC9115T0L
84.00015.B1H
Supplier
Panasonic
Table 80.2- EEPROM multi-source
N/A
N/A
N/A
PCA24S08ADP
BUL08-1FVJ-WGE2
LE26CAP08TT-TLM-H 72.26C08.00R
Supplier
12
C8001
SCD01U50V2KX-1GP
C8001
SCD01U50V2KX-1GP
E
BC
R1
Q8001
PDTC115TE-GP
3rd = 84.00015.B1H
2nd = 84.09115.A11
84.00115.E1K
R1
Q8001
PDTC115TE-GP
3rd = 84.00015.B1H
2nd = 84.09115.A11
84.00115.E1K
NC#1
1
NC#2
2
PROT#
3
GND
4SDA 5
SCL 6
WP 7
VCC 8
U8001
BUL08-1FVJ-WGE2-GP
3rd = 72.26C08.00R
2nd = 72.24S08.A0Q
72.BUL08.A0Q
U8001
BUL08-1FVJ-WGE2-GP
3rd = 72.26C08.00R
2nd = 72.24S08.A0Q
72.BUL08.A0Q
12
R8001
4K7R2J-2-GP
R8001
4K7R2J-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
81 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
81 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
81 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
5V_USB4_S3
USB_PWR_OC#
USB_PP5_R
USB_PN5_R
USB_PN9_R
USB_PP9_R
3D3V_AUX_S5
USB_PN2_R
USB_PP2_R
ADP_LED
AUD_HPOUT_R
AUD_HPOUT_L
AUD_MIC1_COMBO_R
HPOUT_JD
AU_GND
USB_AO_SEL0
USB_PWR_OC#
USB_PP5_R
USB_PN5_R
USB_PP9_R
USB_PN9_R
CLK_PCH_48M
PLT_RST#
3D3V_S0_CARD
USB_PWR_EN
USB_PWR_EN
USB_PWR_OC#
USB_PWR_EN
USB_PWR_EN
USB_PWR_OC#
USB_PN2_R
USB_PP2_R
CLK_PCH_48M
USB_PN2_R
USB_PP2_R
USB_PP9_R
USB_PN9_R
USB_PN5_R
USB_PP5_R
5V_S5
GND
AU_GND
5V_S5
3D3V_S0_CARD
3D3V_S0_CARD3D3V_S0
5V_USB4_S3
3D3V_AUX_S5
CLK_PCH_48M 20
AUD_HPOUT_L 29
AUD_HPOUT_R 29
PLT_RST# 5,18,27,31,36,65,66,71,80,83,97
AUD_MIC1_COMBO_R 29
HPOUT_JD 29
USB_PWR_EN_R27,61,62
USB_CHG_EN27 CHG_USB_OC#27
USB_PN918
USB_PP918
USB_OC#8_918
USB_AO_SEL0 27
USB_PN218
USB_PP218
ADP_LED27
USB_PN518
USB_PP518
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
IO Board Connector
A3
82 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
IO Board Connector
A3
82 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
IO Board Connector
A3
82 103
Friday, January 06, 2012
<Core Design>
Cardreader
USB Port3
R8201 and R8203 Dual layout with TR8201
1
AFTP8224AFTP8224
1
2 3
4
RN8202
SRN0J-6-GP
B Series-USB PWR
RN8202
SRN0J-6-GP
B Series-USB PWR
1
AFTP8223AFTP8223
1 2
R82070R0402-PAD R82070R0402-PAD
1
AFTP8209AFTP8209
1
AFTP8208AFTP8208
1
34
2
TR8201
FILTER-130-GP
1st = 68.11900.20A
TR8201
FILTER-130-GP
1st = 68.11900.20A
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
CDRCN1
ACES-CON30-9-GP-U
20.K0510.030
CDRCN1
ACES-CON30-9-GP-U
20.K0510.030
1
AFTP8213AFTP8213
1
AFTP8210AFTP8210
1
AFTP8222AFTP8222
1 2
R82060R0402-PAD R82060R0402-PAD
1
34
2
TR8202
FILTER-130-GP
1st = 68.11900.20A
TR8202
FILTER-130-GP
1st = 68.11900.20A
12
EC8202
SCD1U16V2KX-3GP
EC8202
SCD1U16V2KX-3GP
1
AFTP8225AFTP8225
12
EC8201
SCD1U16V2KX-3GP
EC8201
SCD1U16V2KX-3GP
1
AFTP8219AFTP8219
1
AFTP8221AFTP8221
1
AFTP8217AFTP8217
1
AFTP8207AFTP8207
1
2
3
4
5
6
7
8
9
10
11
12
USBCN1
ACES-CON10-19-GP
20.K0420.010
USBCN1
ACES-CON10-19-GP
20.K0420.010
1
AFTP8203AFTP8203
1
AFTP8205AFTP8205
1
AFTP8215AFTP8215
1
AFTP8211AFTP8211
1
AFTP8214AFTP8214
1 2
R8202
0R0805-PAD
R8202
0R0805-PAD
1
AFTP8206AFTP8206
1
AFTP8216AFTP8216
12
EC8203
SC22P50V2JN-4GP
DY
EC8203
SC22P50V2JN-4GP
DY
1
2 3
4
RN8201
SRN0J-6-GP
V Series-USB PWR
RN8201
SRN0J-6-GP
V Series-USB PWR
1
AFTP8212AFTP8212
1
AFTP8201AFTP8201
1
AFTP8204AFTP8204
1
AFTP8202AFTP8202
1
AFTP8220AFTP8220
1
AFTP8218AFTP8218
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_RST#
VGA_PEG_CLKREQ#
TESTMODE
PEX_TERMP
VCC1R05VIDEO_PEX_PLLVDD
VGA_RST#
PLT_RST#
PEG_RXN4
PEG_RXN5
PEG_RXP5
PEG_RXN6
PEG_RXN7
PEG_RXP7
PEG_RXP6
PEG_RXP4
PEG_C_RXP5
PEG_C_RXN5
PEG_C_RXP7
PEG_C_RXN7
PEG_C_RXP6
PEG_C_RXN6
PEG_C_RXP4
PEG_C_RXN4
PEG_RXN12
PEG_RXN13
PEG_RXP13
PEG_RXN14
PEG_RXN15
PEG_RXP15
PEG_RXP14
PEG_RXP12
PEG_RXN8
PEG_RXN9
PEG_RXP9
PEG_RXN10
PEG_RXN11
PEG_RXP11
PEG_RXP10
PEG_RXP8
PEG_RXN2
PEG_RXP3
PEG_C_RXP13
PEG_C_RXN15
PEG_RXN1
PEG_RXP1
PEG_C_RXP9
PEG_C_RXN9
PEG_C_RXP11
PEG_C_RXN11
PEG_C_RXP10
PEG_C_RXN10
PEG_C_RXP8
PEG_C_RXN8
PEG_RXN3
PEG_RXP2
PEG_C_RXN13
PEG_C_RXP15
PEG_C_RXP14
PEG_C_RXN14
PEG_C_RXP12
PEG_C_RXN12
PEG_C_RXP1
PEG_C_RXN1
PEG_C_RXP3
PEG_C_RXN3
PEG_C_RXP2
PEG_C_RXN2
PEG_TXP1
PEG_TXN1
PEG_TXP13
PEG_TXN13
PEG_TXP15
PEG_TXN15
PEG_TXN14
PEG_TXP12
PEG_TXN12
PEG_TXP14
PEG_TXN0
PEG_TXP11
PEG_TXN8
PEG_TXP0
PEG_TXP5
PEG_TXN5
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP4
PEG_TXN4
PEG_TXP9
PEG_TXN9
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP8
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_RXN0
PEG_RXP0 PEG_C_RXP0
PEG_C_RXN0
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
VGA_RST#
3D3V_VGA_S0
3D3V_VGA_S0
1D05V_VGA_S0
VGA_CORE
3D3V_VGA_S0
3D3V_S0
3D3V_VGA_S0
1D05V_VGA_S0
PEG_TXN[0..15]4
PEG_TXP[0..15]4
PEG_RXN[0..15] 4
PEG_RXP[0..15] 4
PEG_CLKREQ#20
NVGND_SENSE 92
NVVDD_SENSE 92
CLK_PCIE_VGA20 CLK_PCIE_VGA#20
PLT_RST#5,18,27,31,36,65,66,71,80,82,97
DGPU_HOLD_RST#18
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (1/5): PEG
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
83 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (1/5): PEG
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
83 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (1/5): PEG
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
83 103Friday, January 06, 2012
<Core Design>
dGPU reset
SPEC. (DG-05587-001_v03_p.70)
For PCI ECPRESS connection,
please use 0.22uF,20%,0402,X5R
or better AC couplimg capacitors.
1.05V ±30mV 3300mA total
3.3V ±10% 210mA total
1.05V ±30mV 150mA total
1.0uF
4.7uF
10uF
22uF
X6S (+/-22%
、
-55~105
℃
)
X5R (+/-15%
、
-55~85
℃
)
X6S
X6S
X5R
X5R
0402
0603
0805
0805
4
2
4
4
Under GPU
Near GPU
Midway Between GPU and Power Supply
Midway Between GPU and Power Supply
Footprint PopulationCapacitor Type Location
PCI Express PEX_IOVVD/Q Combined (DG-05587-001_v03_p.72_Table 10)
Under GPU
1uF(X5R)
K0402 ×4
Midway Between GPU and Power Supply
0.1uF
4.7uF
X5R (+/-15%
、
-55~85
℃
)
X5R
X5R 0402
0603 1
2Near GPU
Near GPU
Footprint PopulationCapacitor Type Location
PCI Express PEX_SVDD/PLL_HVDD Connected to NV3V3 (DG-05587-001_v03_p.72_Table 12)
Near GPU
100nF
1.0uF
4.7uF
X6S
X5R
X5R
PopulationFootprint
Under GPU
Near GPU
Near GPU
1
1
1
0402
0603
0805
PCI Express PEX_PLLVDD (DG-05587-001_v03_p.72_Table 11)
LocationCapacitor Type
X6S (+/-22%
、
-55~105
℃
)
X5R (+/-15%
、
-55~85
℃
)
Under GPU Near GPU
SPEC. (DG-05587-001_v03_p.214)
By default, pull-down the TESTMODE pin to GND with a 10kΩ resistor.
For XOR tree testing, TESTMODE should be pulled up to 3v3 with a 10 kΩ resistor.
4.7uF(X5R)
K0603 ×2
10uF(X5R)
M0805 ×4
22uF(X5R)
M0805 ×4
4.7uF(X5R)
K0603 ×2
0.1uF(X5R)
K0402 ×1
0.22uF(X5R)
K0402
SPEC. (DG-05587-001_v03_p.70)
PEX_TSTCLK_OUT should be
terminated with a 200Ω resistor.
100nF(X7R)
K0402 ×1
1.0nF(X5R)
K0402 ×1
4.7nF(X5R)
K0603 ×1
SPEC. (DG-05587-001_v03_p.70)
PEX_CLK_REQ_N is an open-drain bi-directional signal;
by default it should have a 10 kΩ pull-up to 3.3V.
This signal is an active low signal.
(DG-05587-001_v03_p.71_Table 9)
(DG-05587-001_v03_p.71_Table 9)
(DG-05587-001_v03_p.71_Table 9)
Near GPU
SPEC. (DG-05587-001_v03_p.70)
PEX_TERMP is used for internal calibration;
pull-down this signal with 2.49 kΩ,1% resistor.
Stuff 0 ohm(63.00000.00L) for N13P-GS/N13M-GS,
Stuff bead(68.00082.001) for N13P-GL/N13M-GE
12
C8351
SC1U6D3V2KX-GP
OPS
C8351
SC1U6D3V2KX-GP
OPS
1 2
C8304SCD22U10V2KX-1GP
OPS
C8304SCD22U10V2KX-1GP
OPS
1 2
C8301SCD22U10V2KX-1GP
OPS
C8301SCD22U10V2KX-1GP
OPS
12
R8306 200R2F-L-GP
OPS
R8306 200R2F-L-GP
OPS
12
C8343
SC10U6D3V3MX-GP
OPS
C8343
SC10U6D3V3MX-GP
OPS
1 2
C8328SCD22U10V2KX-1GP
OPS
C8328SCD22U10V2KX-1GP
OPS
1 2
C8323SCD22U10V2KX-1GP
OPS
C8323SCD22U10V2KX-1GP
OPS
12
C8340
SC1U6D3V2KX-GP
OPS
C8340
SC1U6D3V2KX-GP
OPS
1 2
C8314SCD22U10V2KX-1GP
OPS
C8314SCD22U10V2KX-1GP
OPS
B
1
A
2
GND
3Y4
VCC 5
U8301
74LVC1G08GW-1-GP
73.01G08.L04
OPS
3rd = 73.01G08.FHG
1st = 73.01G08.DHG
2nd = 73.7SZ08.DAH
U8301
74LVC1G08GW-1-GP
73.01G08.L04
OPS
3rd = 73.01G08.FHG
1st = 73.01G08.DHG
2nd = 73.7SZ08.DAH
12
C8342
SC4D7U6D3V3KX-GP
OPS
C8342
SC4D7U6D3V3KX-GP
OPS
1 2
C8309SCD22U10V2KX-1GP
OPS
C8309SCD22U10V2KX-1GP
OPS
1 2
R8319
10KR2J-3-GP
OPS
R8319
10KR2J-3-GP
OPS
G
S
D
Q8301
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
Q8301
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
1 2
R8309 2K49R2F-GP
OPS
R8309 2K49R2F-GP
OPS
1 2
C8324SCD22U10V2KX-1GP
OPS
C8324SCD22U10V2KX-1GP
OPS
1 2
C8319SCD22U10V2KX-1GP
OPS
C8319SCD22U10V2KX-1GP
OPS
1 2
C8310SCD22U10V2KX-1GP
OPS
C8310SCD22U10V2KX-1GP
OPS
12
C8350
SCD1U10V2KX-5GP
OPS
C8350
SCD1U10V2KX-5GP
OPS
1 2
C8305SCD22U10V2KX-1GP
OPS
C8305SCD22U10V2KX-1GP
OPS
1 2
C8329SCD22U10V2KX-1GP
OPS
C8329SCD22U10V2KX-1GP
OPS
1 2
C8320SCD22U10V2KX-1GP
OPS
C8320SCD22U10V2KX-1GP
OPS
12
C8349
SC4D7U6D3V3KX-GP
OPS
C8349
SC4D7U6D3V3KX-GP
OPS
1 2
C8315SCD22U10V2KX-1GP
OPS
C8315SCD22U10V2KX-1GP
OPS
12
C8347
SCD1U10V2KX-4GP
OPS
C8347
SCD1U10V2KX-4GP
OPS
1 2
C8306SCD22U10V2KX-1GP
OPS
C8306SCD22U10V2KX-1GP
OPS
1 2
R8310 0R2J-2-GP
DY
R8310 0R2J-2-GP
DY
1 2
C8330SCD22U10V2KX-1GP
OPS
C8330SCD22U10V2KX-1GP
OPS
1 2
C8325SCD22U10V2KX-1GP
OPS
C8325SCD22U10V2KX-1GP
OPS
1 2
C8316SCD22U10V2KX-1GP
OPS
C8316SCD22U10V2KX-1GP
OPS
1 2
C8311SCD22U10V2KX-1GP
OPS
C8311SCD22U10V2KX-1GP
OPS
12
C8346
SC22U6D3V5MX-2GP
OPS
C8346
SC22U6D3V5MX-2GP
OPS
1 2
R8304 0R2J-2-GP
DY
R8304 0R2J-2-GP
DY
12
R8305
0R2J-2-GP
DY
R8305
0R2J-2-GP
DY
12
C8352
SC4D7U6D3V3KX-GP
OPS
C8352
SC4D7U6D3V3KX-GP
OPS
12
C8341
SC1U6D3V2KX-GP
OPS
C8341
SC1U6D3V2KX-GP
OPS
1 2
C8326SCD22U10V2KX-1GP
OPS
C8326SCD22U10V2KX-1GP
OPS
1 2
C8321SCD22U10V2KX-1GP
OPS
C8321SCD22U10V2KX-1GP
OPS
12
C8334
SC1U6D3V2KX-GP
OPS
C8334
SC1U6D3V2KX-GP
OPS
1 2
C8312SCD22U10V2KX-1GP
OPS
C8312SCD22U10V2KX-1GP
OPS
PEX_RX15#
AM27 PEX_RX15
AN27
PEX_TX15#
AK25 PEX_TX15
AL25
PEX_RX14#
AP27 PEX_RX14
AP26
PEX_TX14#
AJ24 PEX_TX14
AK24
PEX_RX13#
AM26 PEX_RX13
AN26
PEX_TX13#
AG23 PEX_TX13
AH23
PEX_RX12#
AM24 PEX_RX12
AN24
PEX_TX12#
AJ23 PEX_TX12
AK23
PEX_RX11#
AP24 PEX_RX11
AP23
PEX_TX11#
AK22 PEX_TX11
AL22
PEX_RX10#
AM23 PEX_RX10
AN23
PEX_TX10#
AJ21 PEX_TX10
AK21
PEX_RX9#
AM21 PEX_RX9
AN21
PEX_TX9#
AG20 PEX_TX9
AH20
PEX_RX8#
AP21 PEX_RX8
AP20
PEX_TX8#
AJ20 PEX_TX8
AK20
PEX_RX7#
AM20 PEX_RX7
AN20
PEX_TX7#
AK19 PEX_TX7
AL19
PEX_RX6#
AM18 PEX_RX6
AN18
PEX_TX6#
AJ18 PEX_TX6
AK18
PEX_RX5#
AP18 PEX_RX5
AP17
PEX_TX5#
AG17 PEX_TX5
AH17
PEX_RX4#
AM17 PEX_RX4
AN17
PEX_TX4#
AJ17 PEX_TX4
AK17
PEX_RX3#
AM15 PEX_RX3
AN15
PEX_TX3#
AK16 PEX_TX3
AL16
PEX_RX2#
AP15 PEX_RX2
AP14
PEX_TX2#
AJ15 PEX_TX2
AK15
PEX_RX1#
AM14 PEX_RX1
AN14
PEX_TX1#
AG14 PEX_TX1
AH14
PEX_RX0#
AM12 PEX_RX0
AN12
PEX_TX0#
AJ14 PEX_TX0
AK14
PEX_REFCLK#
AK13 PEX_REFCLK
AL13
PEX_CLKREQ#
AK12
PEX_RST#
AJ12
PEX_WAKE#
AJ11
PEX_TERMP AP29
TESTMODE AK11
PEX_PLLVDD AG26
PEX_TSTCLK_OUT# AK26
PEX_TSTCLK_OUT AJ26
NC_3V3AUX P8
GND_SENSE L5
VDD_SENSE L4
PEX_SVDD_3V3 AG12
PEX_PLL_HVDD AH12
PEX_IOVDDQ_14 AN28
PEX_IOVDDQ_13 AM28
PEX_IOVDDQ_12 AL27
PEX_IOVDDQ_11 AK27
PEX_IOVDDQ_10 AJ27
PEX_IOVDDQ_9 AH27
PEX_IOVDDQ_8 AH26
PEX_IOVDDQ_7 AH18
PEX_IOVDDQ_6 AH15
PEX_IOVDDQ_5 AG25
PEX_IOVDDQ_4 AG18
PEX_IOVDDQ_3 AG16
PEX_IOVDDQ_2 AG15
PEX_IOVDDQ_1 AG13
PEX_IOVDD_6 AH25
PEX_IOVDD_5 AH21
PEX_IOVDD_4 AG24
PEX_IOVDD_3 AG22
PEX_IOVDD_2 AG21
PEX_IOVDD_1 AG19
1/17 PCI_EXPRESS
1 OF 17
VGA1A
N13P-GS-A1-GP
OPS-BOM CTRL
1/17 PCI_EXPRESS
1 OF 17
VGA1A
N13P-GS-A1-GP
OPS-BOM CTRL
1 2
C8307SCD22U10V2KX-1GP
OPS
C8307SCD22U10V2KX-1GP
OPS
1 2
C8302SCD22U10V2KX-1GP
OPS
C8302SCD22U10V2KX-1GP
OPS
12
R8303
10KR2J-3-GP
DY
R8303
10KR2J-3-GP
DY
12
C8348
SC4D7U6D3V3KX-GP
OPS
C8348
SC4D7U6D3V3KX-GP
OPS
12
R8302
10KR2J-3-GP
OPS
R8302
10KR2J-3-GP
OPS
1 2
C8331SCD22U10V2KX-1GP
OPS
C8331SCD22U10V2KX-1GP
OPS
1 2
C8322SCD22U10V2KX-1GP
OPS
C8322SCD22U10V2KX-1GP
OPS
1 2
C8317SCD22U10V2KX-1GP
OPS
C8317SCD22U10V2KX-1GP
OPS
12
C8339
SC22U6D3V5MX-2GP
OPS
C8339
SC22U6D3V5MX-2GP
OPS
1 2
R8307 10KR2J-3-GP
OPS
R8307 10KR2J-3-GP
OPS
1 2
C8308SCD22U10V2KX-1GP
OPS
C8308SCD22U10V2KX-1GP
OPS
1 2
C8303SCD22U10V2KX-1GP
OPS
C8303SCD22U10V2KX-1GP
OPS
12
C8345
SC22U6D3V5MX-2GP
OPS
C8345
SC22U6D3V5MX-2GP
OPS
12
C8336
SC10U6D3V3MX-GP
OPS
C8336
SC10U6D3V3MX-GP
OPS
12
C8335
SC4D7U6D3V3KX-GP
OPS
C8335
SC4D7U6D3V3KX-GP
OPS
12
C8333
SC1U6D3V2KX-GP
OPS
C8333
SC1U6D3V2KX-GP
OPS
12
R8311
0R3J-0-U-GP
OPS-BOM CTRL
R8311
0R3J-0-U-GP
OPS-BOM CTRL
1 2
R8308 10KR2J-3-GP
DY
R8308 10KR2J-3-GP
DY
1 2
C8332SCD22U10V2KX-1GP
OPS
C8332SCD22U10V2KX-1GP
OPS
1 2
C8327SCD22U10V2KX-1GP
OPS
C8327SCD22U10V2KX-1GP
OPS
1 2
C8318SCD22U10V2KX-1GP
OPS
C8318SCD22U10V2KX-1GP
OPS
1 2
C8313SCD22U10V2KX-1GP
OPS
C8313SCD22U10V2KX-1GP
OPS
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_IOVDD
IFPC_IOVDD
IFPC_PLLVDD
IFPC_RSET
IFPD_IOVDD
IFPD_RSET
IFPD_PLLVDD
IFPEF_IOVDD
IFPF_REST
IFPEF_PLLVDD
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
N13P_GPU (2/5): DIGITALOUT
A2
84 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
N13P_GPU (2/5): DIGITALOUT
A2
84 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
N13P_GPU (2/5): DIGITALOUT
A2
84 103Friday, January 06, 2012
<Core Design>
LVDS Interface
HDMI Interface
SPEC. (DG-05587-001_v03_p.160)
Pull down IFPxy IOVDD with 10kΩ resistor.
Pull down IFPxy PLLVDD with 10kΩ resistor.
The other IO pins can be NC, this includes unused data lines.
1
TP8404TP8404
12
R8402
10KR2J-3-GP
OPS
R8402
10KR2J-3-GP
OPS
1
TP8401TP8401
IFPF_IOVDD
AC8
IFPE_IOVDD
AC7
IFPEF_RSET
AD6
IFPEF_PLLVDD
AB8
GPIO19 P3
IFPF_L0 AE3
IFPF_L0# AE4
IFPF_L1 AF4
IFPF_L1# AF5
IFPF_L2 AD4
IFPF_L2# AD5
IFPF_L3 AG1
IFPF_L3# AF1
IFPF_AUX_I2CZ_SCL AF3
IFPF_AUX_I2CZ_SDA# AF2
GPIO18 R1
IFPE_L0 AD2
IFPE_L0# AD3
IFPE_L1 AD1
IFPE_L1# AC1
IFPE_L2 AC2
IFPE_L2# AC3
IFPE_L3 AC4
IFPE_L3# AC5
IFPE_AUX_I2CY_SCL AB3
IFPE_AUX_I2CY_SDA# AB4
ALL PINS NC FOR GF117
IFPF
IFPE
TXD5
TXD5
TXD4
TXD4
TXD3
TXD3
HPD_E
TXD1
TXD1
TXC
TXC
TXD0
TXD0
TXD2
TXD2
I2CY_SDA
I2CY_SCL I2CY_SCL
I2CY_SDA
TXD2
TXD1
TXD1
TXD0
TXD0
TXC
TXC
HPD_E
HPD_F
TXC
TXC
I2CZ_SDA
I2CZ_SCL
TXD1
TXD0
TXD0
TXD1
TXD2
TXD2
TXD2
DVI-DL DVI-SL/HDMI DP
8/17 IFPEF
13 OF 17
VGA1M
N13P-GS-A1-GP
OPS-BOM CTRL
ALL PINS NC FOR GF117
IFPF
IFPE
TXD5
TXD5
TXD4
TXD4
TXD3
TXD3
HPD_E
TXD1
TXD1
TXC
TXC
TXD0
TXD0
TXD2
TXD2
I2CY_SDA
I2CY_SCL I2CY_SCL
I2CY_SDA
TXD2
TXD1
TXD1
TXD0
TXD0
TXC
TXC
HPD_E
HPD_F
TXC
TXC
I2CZ_SDA
I2CZ_SCL
TXD1
TXD0
TXD0
TXD1
TXD2
TXD2
TXD2
DVI-DL DVI-SL/HDMI DP
8/17 IFPEF
13 OF 17
VGA1M
N13P-GS-A1-GP
OPS-BOM CTRL
12
R8405
10KR2J-3-GP
OPS
R8405
10KR2J-3-GP
OPS
1
TP8403TP8403
12
R8408
10KR2J-3-GP
OPS
R8408
10KR2J-3-GP
OPS
IFPB_IOVDD
AG9
IFPA_IOVDD
AG8
IFPAB_PLLVDD
AH8
IFPAB_RSET
AJ8
GPIO14 N4
IFPB_TXD7 AK8
IFPB_TXD7# AL8
IFPB_TXD6 AN8
IFPB_TXD6# AM8
IFPB_TXD5 AM7
IFPB_TXD5# AL7
IFPB_TXD4 AP6
IFPB_TXD4# AP5
IFPB_TXC AJ9
IFPB_TXC# AH9
IFPA_TXD3 AJ6
IFPA_TXD3# AH6
IFPA_TXD2 AL6
IFPA_TXD2# AK6
IFPA_TXD1 AN5
IFPA_TXD1# AM5
IFPA_TXD0 AP3
IFPA_TXD0# AN3
IFPA_TXC AM6
IFPA_TXC# AN6
IFPAB
ALL PINS NC FOR GF117
5/17 IFPAB
10 OF 17
VGA1J
N13P-GS-A1-GP
OPS-BOM CTRL
IFPAB
ALL PINS NC FOR GF117
5/17 IFPAB
10 OF 17
VGA1J
N13P-GS-A1-GP
OPS-BOM CTRL
12
R8401
10KR2J-3-GP
OPS
R8401
10KR2J-3-GP
OPS
IFPC_IOVDD
AF6
IFPC_PLLVDD
AF7
IFPC_RSET
AF8
GPIO15 P2
IFPC_L0 AK1
IFPC_L0# AJ1
IFPC_L1 AJ3
IFPC_L1# AJ2
IFPC_L2 AH3
IFPC_L2# AH4
IFPC_L3 AG5
IFPC_L3# AG4
IFPC_AUX_I2CW_SCL AG3
IFPC_AUX_I2CW_SDA# AG2
ALL PINS NC FOR GF117
IFPC
TXD2
TXD2
TXD1
TXD1
TXD0
TXD0
TXC
TXC
I2CW_SDA
I2CW_SCL
DVI/HDMI DP
6/17 IFPC
11 OF 17
VGA1K
N13P-GS-A1-GP
OPS-BOM CTRL
ALL PINS NC FOR GF117
IFPC
TXD2
TXD2
TXD1
TXD1
TXD0
TXD0
TXC
TXC
I2CW_SDA
I2CW_SCL
DVI/HDMI DP
6/17 IFPC
11 OF 17
VGA1K
N13P-GS-A1-GP
OPS-BOM CTRL
IFPD_IOVDD
AG6
IFPD_PLLVDD
AG7
IFPD_RSET
AN2
GPIO17 M6
IFPD_L0 AM1
IFPD_L0# AM2
IFPD_L1 AM3
IFPD_L1# AM4
IFPD_L2 AL3
IFPD_L2# AL4
IFPD_L3 AK4
IFPD_L3# AK5
IFPD_AUX_I2CX_SCL AK3
IFPD_AUX_I2CX_SDA# AK2
ALL PINS NC FOR GF117
IFPD
DP
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
DVI/HDMI
TXC
TXC
I2CX_SDA
I2CX_SCL
7/17 IFPD
12 OF 17
VGA1L
N13P-GS-A1-GP
OPS-BOM CTRL
ALL PINS NC FOR GF117
IFPD
DP
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
DVI/HDMI
TXC
TXC
I2CX_SDA
I2CX_SCL
7/17 IFPD
12 OF 17
VGA1L
N13P-GS-A1-GP
OPS-BOM CTRL
12
R8406
10KR2J-3-GP
OPS
R8406
10KR2J-3-GP
OPS
1
TP8402TP8402
12
R8403
10KR2J-3-GP
OPS
R8403
10KR2J-3-GP
OPS
12
R8407
10KR2J-3-GP
OPS
R8407
10KR2J-3-GP
OPS
12
R8404
10KR2J-3-GP
OPS
R8404
10KR2J-3-GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBA_D35
FBA_D38
FBA_D37
FBA_D36
FBA_D39
FBA_D0
FBA_D40
FBA_D42
FBA_D41
FBA_D44
FBA_D43
FBA_D47
FBA_D46
FBA_D45
FBA_D50
FBA_D49
FBA_D48
FBA_D51
FBA_D54
FBA_D53
FBA_D52
FBA_D1
FBA_D56
FBA_D55
FBA_D58
FBA_D57
FBA_D59
FBA_D3
FBA_D2
FBA_D5
FBA_D60
FBA_D4
FBA_D6
FBA_D61
FBA_D8
FBA_D7
FBA_D62
FBA_D9
FBA_D63
FBA_D12
FBA_D11
FBA_D10
FBA_D15
FBA_D14
FBA_D13
FBA_D17
FBA_D16
FBA_D20
FBA_D19
FBA_D18
FBA_D23
FBA_D22
FBA_D21
FBA_D25
FBA_D24
FBA_D28
FBA_D27
FBA_D26
FBA_D31
FBA_D30
FBA_D29
FBA_D33
FBA_D32
FBA_D34
FBB_D17
FBB_D23
FBB_D22
FBB_D20
FBB_D21
FBB_D16
FBB_D18
FBB_D29
FBB_D25
FBB_D27
FBB_D26
FBB_D24
FBB_D31
FBB_D30
FBB_D28
FBB_D19
FBB_D1
FBB_D5
FBB_D4
FBB_D6
FBB_D7
FBB_D0
FBB_D33
FBB_D39
FBB_D38
FBB_D36
FBB_D37
FBB_D32
FBB_D34
FBB_D45
FBB_D41
FBB_D43
FBB_D42
FBB_D40
FBB_D47
FBB_D46
FBB_D44
FBB_D35
FBB_D2
FBB_D9
FBB_D13
FBB_D12
FBB_D14
FBB_D15
FBB_D8
FBB_D10
FBB_D11
FBB_D49
FBB_D55
FBB_D54
FBB_D52
FBB_D53
FBB_D48
FBB_D50
FBB_D61
FBB_D57
FBB_D59
FBB_D58
FBB_D56
FBB_D63
FBB_D62
FBB_D60
FBB_D51
FBB_D3
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
FBB_CLK0
FBB_CLK0#FBB_CLK1#
FBB_CLK1
FBB_ODT0FBA_ODT0 FBB_RST
FBA_ODT1
FBA_CKE0 FBB_CKE1FBA_CKE1 FBB_CKE0
FBB_ODT1
FBA_RST
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
FB_VREF FB_PLLVDD
FB_PLLVDD
FB_PLLVDD
PS_FB_CLAMP
1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0
1D5V_VGA_S0
1D05V_VGA_S0
FBA_CS0# 88
FBA_CLK1 89
FBA_CLK1# 89
FBA_CLK0 88
FBA_CLK0# 88
FBA_DQM088 FBA_DQM188 FBA_DQM288 FBA_DQM388 FBA_DQM489 FBA_DQM589 FBA_DQM689 FBA_DQM789
FBB_CLK0# 90
FBB_CLK0 90
FBB_CLK1 91
FBB_CLK1# 91
FBB_DQM090 FBB_DQM190 FBB_DQM290 FBB_DQM390 FBB_DQM491 FBB_DQM591 FBB_DQM691 FBB_DQM791
FBA_D[63..0]
88,89
FBB_D[63..0]90,91
FBA_DQS_WP088 FBA_DQS_W P188 FBA_DQS_W P288 FBA_DQS_W P388 FBA_DQS_W P489 FBA_DQS_WP589 FBA_DQS_WP689 FBA_DQS_WP789
FBA_DQS_RN388 FBA_DQS_RN489 FBA_DQS_RN589 FBA_DQS_RN689
FBA_DQS_RN088
FBA_DQS_RN789
FBA_DQS_RN188 FBA_DQS_RN288
FBB_DQS_W P390 FBB_DQS_W P491
FBB_DQS_RN390 FBB_DQS_RN491 FBB_DQS_RN591 FBB_DQS_RN691
FBB_DQS_RN090
FBB_DQS_RN791
FBB_DQS_RN190 FBB_DQS_RN290
FBB_DQS_W P591 FBB_DQS_W P691
FBB_DQS_W P090
FBB_DQS_W P791
FBB_DQS_W P190 FBB_DQS_W P290
FBA_ODT0 88
FBA_CKE0 88
FBA_A7 88,89
FBA_A2 88,89
FBA_A0 88,89
FBA_A9 88,89
FBA_RST 88,89
FBA_BA0 88,89
FBA_W E# 88,89
FBA_A15 88,89
FBA_A1 88,89
FBA_A4 88,89
FBA_A6 88,89
FBA_A11 88,89
FBA_A5 88,89
FBA_A8 88,89
FBA_A13 88,89
FBA_BA1 88,89
FBA_A12 88,89
FBA_A10 88,89
FBA_BA2 88,89
FBA_A3 88,89
FBA_CAS# 88,89
FBA_RAS# 88,89
FBB_A7 90,91
FBB_A2 90,91
FBB_A0 90,91
FBB_A9 90,91
FBB_RST 90,91
FBB_RAS# 90,91
FBB_ODT0 90
FBB_BA0 90,91
FBB_W E# 90,91
FBB_A15 90,91
FBB_A1 90,91
FBB_A4 90,91
FBB_CKE0 90
FBB_A6 90,91
FBB_A11 90,91
FBB_A5 90,91
FBB_A8 90,91
FBB_A13 90,91
FBB_BA1 90,91
FBB_A12 90,91
FBB_A10 90,91
FBB_BA2 90,91
FBB_A3 90,91
FBB_CAS# 90,91
FBB_CS0# 90
FBA_CS1# 89
FBA_ODT1 89
FBA_CKE1 89
FBB_CS1# 91
FBB_ODT1 91
FBB_CKE1 91
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (3/5): VRAM I/F
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
85 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (3/5): VRAM I/F
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
85 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (3/5): VRAM I/F
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A2
85 103Friday, January 06, 2012
<Core Design>
FBCLK Termination placed at each VRAM
N13x DDR3
mode D Data Bits
[31:0] Data Bits
[63:32]
FBx_CMD0
FBx_CMD1
FBx_CMD2
FBx_CMD3
FBx_CMD4
FBx_CMD5
FBx_CMD6
FBx_CMD7
FBx_CMD8
FBx_CMD9
FBx_CMD10
FBx_CMD11
FBx_CMD12
FBx_CMD13
FBx_CMD14
FBx_CMD15
FBx_CMD16
FBx_CMD17
FBx_CMD18
FBx_CMD19
FBx_CMD20
FBx_CMD21
FBx_CMD22
FBx_CMD23
FBx_CMD24
FBx_CMD25
FBx_CMD26
FBx_CMD27
FBx_CMD28
FBx_CMD29
FBx_CMD30
FBx_CMD31
CS0#
ODT
CKE
A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE#
A15
CAS#
A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#
A14
RST
A9
A7
A2
A0
A4
A1
BA0
WE#
A15
CAS#
CS0#
ODT
CKE
A13
A8
A6
A11
A5
A3
BA2
BA1
A12
A10
RAS#
0.1uF
1uF
4.7uF
10uF
X7R
X7R
X6S
X5R
0402
0603
0603
0805
8
2
2
4
Under GPU
Under GPU
Under GPU
Near GPU
Capacitor Type Footprint Population Location
8
2
2
4
Under GPU
Near GPU
GPU FBVDDQ Decoupling (DG-05587-001_v03_p.86_Table 22)
X7R (+/-15%
、
-55~125
℃
)
X6S (+/-22%
、
-55~105
℃
)
X5R (+/-15%
、
-55~85
℃
)
X7R (+/-15%
、
-55~125
℃
)
X5R (+/-15%
、
-55~85
℃
)
X7R
X5R 0402
0805 Under GPU
Near GPU
Capacitor Type Footprint Population Location
FBx_PLL_AVDD, FB_DLL_AVDD and PLLVDD combined
(DG-05587-001_v03_p.88_Table 26)
100nF
22uF
Bead Type
1 per pin
1
30Ω @100MHz
(ESR=0.01Ω)0603 1 Near GPU
Under GPU
66mA
Mode D Command Mapping
(DG-05587-001_v03_p.78_Table 16)
FB CMD mapping
Mode D-N13x FB CMD mapping
Mode D-N13x
Memory/PKG FBVDDQ FBCAL_PU_GND FBCAL_PU_VDDQ
Default GPU Drive Calibration for DDR3 (DG-05587-001_v03_p.82_Table 17)
FBCAL_TERM_GND
DDR3 42.2Ω40.2Ω51.1Ω1.5V
*Use only 1% resistors for driver calibration.
0.1uF(X7R)
K0402 ×8
1uF(X7R)
K0603 ×4
4.7uF(X5R)
K0603 ×2
10uF(X5R)
M0805 ×2
1.05V ±30mV 167mA total
35mA
(DG-05587-001_v03_p.88_Table 25)
(DG-05587-001_v03_p.88_Table 25)
(DG-05587-001_v03_p.88_Table 25)
100nF(X7R)
K0402 ×3
66mA
(DG-05587-001_v03_p.83_Table 19)
(DG-05587-001_v03_p.84_Table 20)
Memory ODTx, CKEx and RST Termination
E1 (DA-05691-001_v03_p.4_Table 2)
N13P-GL NC
N13M_GE1 NC
N13M-GS Pull down FB_CLAMP with a 10kΩ
N13P-GS Pull down FB_CLAMP with a 10kΩ
Stuff 0 ohm(63.00000.00L) for N13P-GS/N13M-GS,
Stuff bead(68.00084.H41) for N13P-GL/N13M-GE
12
R8512
10KR2J-3-GP
OPS
R8512
10KR2J-3-GP
OPS
12
R8509
10KR2J-3-GP
OPS
R8509
10KR2J-3-GP
OPS
1 2
R8523
0R3J-0-U-GP
OPS-BOM CTRL
R8523
0R3J-0-U-GP
OPS-BOM CTRL
FBVDDQ_44
Y27 FBVDDQ_43
W33 FBVDDQ_42
W30 FBVDDQ_41
W27 FBVDDQ_40
V27 FBVDDQ_39
T33 FBVDDQ_38
T30 FBVDDQ_37
T27 FBVDDQ_36
R27 FBVDDQ_35
P27 FBVDDQ_34
N27 FBVDDQ_33
M27 FBVDDQ_32
L27 FBVDDQ_31
H9 FBVDDQ_30
H8 FBVDDQ_29
H24 FBVDDQ_28
H23 FBVDDQ_27
H22 FBVDDQ_26
H21 FBVDDQ_25
H20 FBVDDQ_24
H19 FBVDDQ_23
H18 FBVDDQ_22
H16 FBVDDQ_21
H15 FBVDDQ_20
H14 FBVDDQ_19
H13 FBVDDQ_18
H12 FBVDDQ_17
H11 FBVDDQ_16
H10 FBVDDQ_15
E19 FBVDDQ_14
E16 FBVDDQ_13
E13 FBVDDQ_12
B19 FBVDDQ_11
B16 FBVDDQ_10
B13 FBVDDQ_9
AG27 FBVDDQ_8
AF27 FBVDDQ_7
AE27 FBVDDQ_6
AD27 FBVDDQ_5
AC27 FBVDDQ_4
AB33 FBVDDQ_3
AB27 FBVDDQ_2
AA30 FBVDDQ_1
AA27
FB_CAL_TERM_GND H25
FB_CAL_PU_GND H27
FB_CAL_PD_VDDQ J27
FB_GND_SENSE F2
FB_VDDQ_SENSE F1
14/17 FBVDDQ
4 OF 17
VGA1D
N13P-GS-A1-GP
OPS-BOM CTRL
14/17 FBVDDQ
4 OF 17
VGA1D
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8518
SCD1U10V2KX-5GP
OPS
C8518
SCD1U10V2KX-5GP
OPS
12
C8511
SC4D7U6D3V3KX-GP
OPS
C8511
SC4D7U6D3V3KX-GP
OPS
FB_VREF
H26
FBA_DQS_RN7
AF32 FBA_DQS_RN6
AM34 FBA_DQS_RN5
AK31 FBA_DQS_RN4
AF30 FBA_DQS_RN3
M34 FBA_DQS_RN2
E34 FBA_DQS_RN1
H30 FBA_DQS_RN0
M30
FBA_DQS_WP7
AF33 FBA_DQS_WP6
AN33 FBA_DQS_WP5
AK30 FBA_DQS_WP4
AE31 FBA_DQS_WP3
M33 FBA_DQS_WP2
E33 FBA_DQS_WP1
G31 FBA_DQS_WP0
M31
FBA_DQM7
AF34 FBA_DQM6
AM32 FBA_DQM5
AL29 FBA_DQM4
AD31 FBA_DQM3
M32 FBA_DQM2
F34 FBA_DQM1
F31 FBA_DQM0
P30
FBA_D63
AG33 FBA_D62
AG32 FBA_D61
AG34 FBA_D60
AF31 FBA_D59
AD33 FBA_D58
AC30 FBA_D57
AD32 FBA_D56
AD34 FBA_D55
AK32 FBA_D54
AK33 FBA_D53
AL31 FBA_D52
AM33 FBA_D51
AP32 FBA_D50
AP30 FBA_D49
AN32 FBA_D48
AN31 FBA_D47
AM30 FBA_D46
AN29 FBA_D45
AM31 FBA_D44
AM29 FBA_D43
AK28 FBA_D42
AJ30 FBA_D41
AK29 FBA_D40
AJ29 FBA_D39
AD28 FBA_D38
AC29 FBA_D37
AD29 FBA_D36
AD30 FBA_D35
AF28 FBA_D34
AG29 FBA_D33
AF29 FBA_D32
AG28 FBA_D31
L33 FBA_D30
L32 FBA_D29
L34 FBA_D28
L31 FBA_D27
P33 FBA_D26
P31 FBA_D25
P32 FBA_D24
P34 FBA_D23
H32 FBA_D22
H33 FBA_D21
F32 FBA_D20
F33 FBA_D19
C33 FBA_D18
B33 FBA_D17
D32 FBA_D16
C34 FBA_D15
F30 FBA_D14
E32 FBA_D13
E31 FBA_D12
G29 FBA_D11
H28 FBA_D10
J29 FBA_D9
H29 FBA_D8
J28 FBA_D7
P28 FBA_D6
R29 FBA_D5
P29 FBA_D4
N31 FBA_D3
M28 FBA_D2
L29 FBA_D1
M29 FBA_D0
L28
FBA_PLL_AVDD U27
FBA_WCKB67# AJ33
FBA_WCKB67 AJ32
FBA_WCKB45# AJ31
FBA_WCKB45 AH31
FBA_WCKB23# J33
FBA_WCKB23 J32
FBA_WCKB1# J31
FBA_WCKB1 J30
FBA_WCK67# AK34
FBA_WCK67 AJ34
FBA_WCK45# AG31
FBA_WCK45 AG30
FBA_WCK23# J34
FBA_WCK23 H34
FBA_WCK1# L30
FBA_WCK1 K31
FBA_CLK1# AC31
FBA_CLK1 AB31
FBA_CLK0# R31
FBA_CLK0 R30
FBA_DEBUG1 AC28
FBA_DEBUG0 R28
FBA_CMD_RFU1 AC32
FBA_CMD_RFU0 R32
FBA_CMD31 V31
FBA_CMD30 Y33
FBA_CMD29 Y34
FBA_CMD28 Y31
FBA_CMD27 AA34
FBA_CMD26 Y30
FBA_CMD25 W31
FBA_CMD24 Y29
FBA_CMD23 Y28
FBA_CMD22 AA33
FBA_CMD21 AA32
FBA_CMD20 AC33
FBA_CMD19 AC34
FBA_CMD18 AA28
FBA_CMD17 AA29
FBA_CMD16 AA31
FBA_CMD15 Y32
FBA_CMD14 V33
FBA_CMD13 V34
FBA_CMD12 U31
FBA_CMD11 U34
FBA_CMD10 V30
FBA_CMD9 V29
FBA_CMD8 V28
FBA_CMD7 U28
FBA_CMD6 U33
FBA_CMD5 U32
FBA_CMD4 R33
FBA_CMD3 R34
FBA_CMD2 U29
FBA_CMD1 T31
FBA_CMD0 U30
FB_DLL_AVDD K27
FB_CLAMP E1
AND FOR GF117
ONLY ON GK107
PINS ARE USED
THE FBA_WCKBxx
FOR GF108
THEY ARE NC
2/17 FBA
2 OF 17
VGA1B
N13P-GS-A1-GP
OPS-BOM CTRL
AND FOR GF117
ONLY ON GK107
PINS ARE USED
THE FBA_WCKBxx
FOR GF108
THEY ARE NC
2/17 FBA
2 OF 17
VGA1B
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8508
SCD1U10V2KX-5GP
OPS
C8508
SCD1U10V2KX-5GP
OPS
12
C8514
SC4D7U6D3V3KX-GP
OPS
C8514
SC4D7U6D3V3KX-GP
OPS
FBB_DQS_RN7
B23 FBB_DQS_RN6
A30 FBB_DQS_RN5
D28 FBB_DQS_RN4
D22 FBB_DQS_RN3
A9 FBB_DQS_RN2
B2 FBB_DQS_RN1
E4 FBB_DQS_RN0
D9
FBB_DQS_WP7
A23 FBB_DQS_WP6
B30 FBB_DQS_WP5
E28 FBB_DQS_WP4
E23 FBB_DQS_WP3
B9 FBB_DQS_WP2
C3 FBB_DQS_WP1
D5 FBB_DQS_WP0
D10
FBB_DQM7
A24 FBB_DQM6
C30 FBB_DQM5
F27 FBB_DQM4
F23 FBB_DQM3
C9 FBB_DQM2
A3 FBB_DQM1
E3 FBB_DQM0
E11
FBB_D63
C26 FBB_D62
B26 FBB_D61
C24 FBB_D60
B24 FBB_D59
C21 FBB_D58
A21 FBB_D57
C23 FBB_D56
B21 FBB_D55
B29 FBB_D54
C29 FBB_D53
A29 FBB_D52
D29 FBB_D51
B32 FBB_D50
C32 FBB_D49
C31 FBB_D48
A32 FBB_D47
D30 FBB_D46
E30 FBB_D45
F29 FBB_D44
E29 FBB_D43
E27 FBB_D42
G26 FBB_D41
D27 FBB_D40
G27 FBB_D39
F21 FBB_D38
G21 FBB_D37
E21 FBB_D36
D21 FBB_D35
G24 FBB_D34
E24 FBB_D33
G23 FBB_D32
F24 FBB_D31
B8 FBB_D30
C8 FBB_D29
A8 FBB_D28
D8 FBB_D27
B11 FBB_D26
D11 FBB_D25
C11 FBB_D24
A11 FBB_D23
C5 FBB_D22
B5 FBB_D21
C4 FBB_D20
B3 FBB_D19
C1 FBB_D18
D3 FBB_D17
D4 FBB_D16
C2 FBB_D15
F3 FBB_D14
E2 FBB_D13
G4 FBB_D12
F4 FBB_D11
F6 FBB_D10
E6 FBB_D9
F5 FBB_D8
G6 FBB_D7
G12 FBB_D6
F12 FBB_D5
G11 FBB_D4
F11 FBB_D3
F9 FBB_D2
G8 FBB_D1
E9 FBB_D0
G9
FBB_PLL_AVDD H17
FBB_WCKB67# A27
FBB_WCKB67 A26
FBB_WCKB45# E26
FBB_WCKB45 F26
FBB_WCKB23# B6
FBB_WCKB23 C6
FBB_WCKB1# D7
FBB_WCKB1 D6
FBB_WCK67# C27
FBB_WCK67 B27
FBB_WCK45# D25
FBB_WCK45 D24
FBB_WCK23# A6
FBB_WCK23 A5
FBB_WCK1# E8
FBB_WCK1 F8
FBB_CLK1# F20
FBB_CLK1 E20
FBB_CLK0# E12
FBB_CLK0 D12
FBB_DEBUG1 G20
FBB_DEBUG0 G14
FBB_CMD_RFU1 C20
FBB_CMD_RFU0 C12
FBB_CMD31 E17
FBB_CMD30 B17
FBB_CMD29 A17
FBB_CMD28 D17
FBB_CMD27 A18
FBB_CMD26 D16
FBB_CMD25 F17
FBB_CMD24 G17
FBB_CMD23 G18
FBB_CMD22 B18
FBB_CMD21 C18
FBB_CMD20 B20
FBB_CMD19 A20
FBB_CMD18 F18
FBB_CMD17 E18
FBB_CMD16 D18
FBB_CMD15 C17
FBB_CMD14 B15
FBB_CMD13 A15
FBB_CMD12 D14
FBB_CMD11 A14
FBB_CMD10 D15
FBB_CMD9 E15
FBB_CMD8 F15
FBB_CMD7 G15
FBB_CMD6 B14
FBB_CMD5 C14
FBB_CMD4 B12
FBB_CMD3 A12
FBB_CMD2 F14
FBB_CMD1 E14
FBB_CMD0 D13
THE FBB_WCKBxx
AND FOR GF117
ONLY ON GK107
PINS ARE USED
FOR GF108
THEY ARE NC
3/17 FBB
3 OF 17
VGA1C
N13P-GS-A1-GP
OPS-BOM CTRL
THE FBB_WCKBxx
AND FOR GF117
ONLY ON GK107
PINS ARE USED
FOR GF108
THEY ARE NC
3/17 FBB
3 OF 17
VGA1C
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8515
SC10U6D3V3MX-GP
OPS
C8515
SC10U6D3V3MX-GP
OPS
12
R8507
160R2F-GP
OPS
R8507
160R2F-GP
OPS
12
R8515
10KR2J-3-GP
OPS
R8515
10KR2J-3-GP
OPS
12
C8502
SCD1U10V2KX-5GP
OPS
C8502
SCD1U10V2KX-5GP
OPS
12
R8502
51D1R2F-GP
OPS
R8502
51D1R2F-GP
OPS
12
R8508
10KR2J-3-GP
OPS
R8508
10KR2J-3-GP
OPS
12
C8516
SC10U6D3V3MX-GP
OPS
C8516
SC10U6D3V3MX-GP
OPS
12
C8513
SC4D7U6D3V3KX-GP
OPS
C8513
SC4D7U6D3V3KX-GP
OPS
12
R8517
10KR2J-3-GP
OPS
R8517
10KR2J-3-GP
OPS
12
R8516
10KR2J-3-GP
OPS
R8516
10KR2J-3-GP
OPS
1 2
R8522 10KR2F-2-GP
DY
R8522 10KR2F-2-GP
DY
12
R8503
42D2R2F-GP
OPS
R8503
42D2R2F-GP
OPS
12
R8504
160R2F-GP
OPS
R8504
160R2F-GP
OPS
12
R8513
10KR2J-3-GP
OPS
R8513
10KR2J-3-GP
OPS
12
R8511
10KR2J-3-GP
OPS
R8511
10KR2J-3-GP
OPS
12
C8501
SCD1U10V2KX-5GP
OPS
C8501
SCD1U10V2KX-5GP
OPS
12
R8506
160R2F-GP
OPS
R8506
160R2F-GP
OPS
12
R8510
10KR2J-3-GP
OPS
R8510
10KR2J-3-GP
OPS
12
C8503
SCD1U10V2KX-5GP
OPS
C8503
SCD1U10V2KX-5GP
OPS
1 2
R8520 60D4R2F-GP
DY
R8520 60D4R2F-GP
DY
12
C8509
SC1U6D3V3KX-2GP
OPS
C8509
SC1U6D3V3KX-2GP
OPS
12
C8504
SCD1U10V2KX-5GP
OPS
C8504
SCD1U10V2KX-5GP
OPS
1 2
R8521 10KR2J-3-GP
DY
R8521 10KR2J-3-GP
DY
12
R8514
10KR2J-3-GP
OPS
R8514
10KR2J-3-GP
OPS
1 2
R8518 60D4R2F-GP
DY
R8518 60D4R2F-GP
DY
12
C8505
SCD1U10V2KX-5GP
OPS
C8505
SCD1U10V2KX-5GP
OPS
12
C8512
SC4D7U6D3V3KX-GP
OPS
C8512
SC4D7U6D3V3KX-GP
OPS
12
R8505
160R2F-GP
OPS
R8505
160R2F-GP
OPS
12
C8519
SCD1U10V2KX-5GP
OPS
C8519
SCD1U10V2KX-5GP
OPS
12
C8510
SC1U6D3V3KX-2GP
OPS
C8510
SC1U6D3V3KX-2GP
OPS
12
C8506
SCD1U10V2KX-5GP
OPS
C8506
SCD1U10V2KX-5GP
OPS
1 2
R8501 40D2R2F-GP
OPS
R8501 40D2R2F-GP
OPS
1
TP8507TP8507
12
C8507
SCD1U10V2KX-5GP
OPS
C8507
SCD1U10V2KX-5GP
OPS
1 2
R8519 10KR2J-3-GP
DY
R8519 10KR2J-3-GP
DY
12
C8517
SCD1U10V2KX-5GP
OPS
C8517
SCD1U10V2KX-5GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STRAP3
STRAP4
MULTI_STRAP_REF2_GND
SMBD_Therm_NV
SMBC_Therm_NV
STRAP3
STRAP4
I2CB_SDA_G2
I2CB_SCL_G3
GPU_LVDS_DATA
N13P_TCK
N13P_TDI
N13P_TDO
N13P_TMS
N13P_TRST
STRAP0
STRAP1
STRAP2
CEC_L3
VGA_LBKLT_CTL
VGA_LCDVDD_EN
-VIDEO_THERM_ALERT
-VIDEO_THERM_OVERT
3V_VGA_S0_R
-VIDEO_THERM_OVERT
SMBC_Therm_NV
SMBD_Therm_NV
DACA_VREF
DACA_RSET
DACA_VDD
VGA_CRT_GREEN
VGA_CRT_RED
VGA_CRT_BLUE
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_GREEN
VGA_CRT_BLUE
VGA_CRT_RED
VGA_CRT_DDCDATA
VGA_CRT_DDCCLK
N12P_XTAL_OUTBUFF
PLLVDD_PWR
27MHZ_IN
VIDEO_CLK_XTAL_SS
27MHZ_OUT_R
ROM_SI_H5
GPU_LVDS_CLK
STRAP0
STRAP2
STRAP1
ROM_SO_H7
PLLVDD
N13P_GPIO12_H7
VGA_BLEN
ROM_SLK_H4
X8601_GND
X8601_GND
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
1D05V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
SMBD_Therm 27,28
SMBC_Therm 27,28
PURE_HW_SHUTDOWN# 27,28,36
NV_VID4 92
NV_VID3 92
NV_VID0 92
NV_VID1 92
NV_VID2 92
NV_VID5 92
Title
Size Document Number Rev
Date: Sheet of
LA48
SD
N13P_GPU (4/5): GPIO/STRAP
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A1
86 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48
SD
N13P_GPU (4/5): GPIO/STRAP
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A1
86 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48
SD
N13P_GPU (4/5): GPIO/STRAP
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A1
86 103Friday, January 06, 2012
<Core Design>
20100702_NV
I2CA=>CRT, I2CC=>LVDS.
20PF 5% 50V +/-0.25PF 0402
1-0073561-007156
72.42164.D0U72.52G63.A0U
1-007157
64.15025.6DL
1-007155
64.20025.6DL
HYNIX
64Mx16
0010
Samsung
64Mx16
0011
34.8Kohm 15Kohm 20Kohm
64.34825.6DL
TABLE VIDEO MEMORY
ROM_SI
PD
R8627
SAMSUNG
128Mx16
0111
HYNIX
128Mx16
0110
45.3Kohm
64.45325.6DL
72.51G63.H0U900MHz 72.41164.Q0U
DY
DY DY
15Kohm45Kohm
R8632
30Kohm
64.30025.6DL
R8633
64.15025.6DL
N12M-GE
DEV ID:
0xA7A
1010
64.45325.6DL
STRAP2
35Kohm
64.34825.6DL
R8635
TABLE
NVIDIA N12P-GE
DEV ID:
0xDF5
0101
N12P-GV
DEV ID:
0x0DF7(ES)
35Kohm
35Kohm
STRAP1
64.34825.6DL
64.34825.6DL
R8634
DY
DYDY
29 x 29 PACKAGE
V: N13P-GS/GL (25~30W)
B: N13M-GS/GE (15~20W)
GPIO pin
Name
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
Normal
Function
GPU_VID4
GPU_VID3
LCD_BL_PWM
LCD_VCC
LCD_BLEN
GPU_VID1
GPU_VID2
3D Vision
OVERT
ALERT
MEM_VREF_CTL
GPU_VID0
PWR_LEVEL
GPU_VID5
HPD_AB
HPD_C
MEM_VDD_CTL
HPD_D
HPD_E
HPD_F
Reserved
Reserved
I/O Function
Description
O
O
O
O
O
O
O
O
I/O
I/O
O
O
I
O
I
I
O
I
I
I
GPU Core VDD VID4
GPU Core VDD VID3
Panel Backlught PWM Brightness Control
Panel Power Enable
panel Backlight Enale
GPU Core VDD VID1
GPU Core VDD VID2
3D Vision Left/Right signal
Active Low Thermal Catastrophic Over Temperature
Active Low Thermal Alert
Memory VREF Control
GPU Core VDD VID0
AC Power Detect Input. High = AC, Low = Battery
GPU Core VDD VID5
Hot Plog Detect for IFPAB
Hot Plog Detect for IFPC
Memory VDD VID
Hot Plog Detect for IFPD
Hot Plog Detect for IFPE
Hot Plog Detect for IFPF
(DG-05587-001_v03_p.177_Table 95)
(DG-05587-001_v03_p.177_Table 95)
1.05V ±30mV 90mA total
1.05V ±30mV 60mA
100nF(X7R)
K0402 ×1
22uF(X5R)
M0805 ×1
Under GPUNear GPU
100nF(X7R)
K0402 ×2
22uF(X5R)
M0805 ×1 4.7uF(X5R)
K0603 ×1
SPEC. (DG-05587-001_v03_p.176)
XTALOUTBUFF signal should be pull down using a 10kΩ resistor.
XTALSSIN signal should be pull down using a 10kΩ resistor.
REmember to place components as close ti the GPU as possible.
SPEC. (DG-05587-001_v03_p.162)
Adding a pull down to the DACA_VDD with a 10kΩ resistor to GND.
All other DAC I/O pins (including DACA_VREF, DACA_REST)
can be left floating.
N13M-GE1
N13M-GS
N13P-GL
N13P-GS
Phase Count Target
Single phase
Two phase
Two phase
Two phase
Recommended NVVDD Voltage Regulator Phase Coount
GPU SKU
The GB4-128 package is available in a 29 mm × 29mm footprint.
128-bit memory interfaces respectively.
SPEC. (DG-05587-001_v03_p.191_Table 102)
Multi_Strap_Ref0_GND 40.2kΩ 1% to GND
128Mx16:
hynix - H5TQ2G63BFR-11C
Samsung - K4W2G1646C-HC11
64Mx16:
Hynix - H5TQ1G63DFR-11C
Samsung - K4W1G1646G-BC11
L3 (DA-05691-001_v04_p.3_Table 2)
N13P-GL 10kΩ pull-up to 3.3V
N13M_GE1 NC
N13M-GS NC
N13P-GS NC
GPIO Description (DG-05587-001_v03_p.82_Tale 98)
X7R (+/-15%
、
-55~125
℃
)
X7R
X7R
0402
0805
Under GPU
Near GPU
Capacitor Type Footprint Population Location
PLL Power Rail Filter-PLL_VDD
(DG-05587-001_v03_p.177_Table 96)
1
Bead Type
30Ω(ESR=0.05) 0402 Near GPU
100nF
22uF
1
1
X7R (+/-15%
、
-55~125
℃
)
X7R
X7R
X7R
0402
0402
0805
Under GPU
Near GPU
Near GPU
Capacitor Type Footprint Population Location
PLL Power Rail Filter-SP_PLLVDD and VIDPLLVDD Combined
(DG-05587-001_v03_p.178_Table 97)
1
Bead Type
180Ω(ESR=0.2) 0603 Near GPU
100nF
4.7uF
22uF
2
1
1
R8636 is reserved for Metal Xtal
12
C8604
SC4D7U6D3V3KX-GP
OPS
C8604
SC4D7U6D3V3KX-GP
OPS
1 2
L8602
BLM18PG181SN1D-GP
OPS
L8602
BLM18PG181SN1D-GP
OPS
1 2
R8623 10KR2J-3-GP
DY
R8623 10KR2J-3-GP
DY
12
R8634
45K3R2F-L-GP
OPS-BOM CTRL
R8634
45K3R2F-L-GP
OPS-BOM CTRL
1 2
R8629
10KR2J-3-GP
OPS
R8629
10KR2J-3-GP
OPS
12
C8607
SC12P50V2JN-3GP
OPS
C8607
SC12P50V2JN-3GP
OPS
12
R8627
15KR2F-GP
OPS-BOM CTRL
R8627
15KR2F-GP
OPS-BOM CTRL
1
TP8612TP8612
XTAL_S SIN
H1
VID_PL LVDD
AD7
SP_PLL VDD
AE8 PLLVDD
AD8
XTAL_OUT H2
XTAL_OUTBUFF J4
XTAL_I N
H3
NC
GF108/GKx GF117
11/17 XTAL_PLL
15 OF 17
VGA1O
N13P-GS-A1-GP
OPS-BOM CTRL
NC
GF108/GKx GF117
11/17 XTAL_PLL
15 OF 17
VGA1O
N13P-GS-A1-GP
OPS-BOM CTRL
12
R8602
10KR2J-3-GP
OPS
R8602
10KR2J-3-GP
OPS
1
TP8603TP8603
1 2
R8611 10KR2J-3-GP
OPS
R8611 10KR2J-3-GP
OPS
1
TP8605TP8605
1
2 3
4
RN8605
SRN4K7J-8-GP
OPS
RN8605
SRN4K7J-8-GP
OPS
1
2
3
4 5
6
7
8
RN8602
SRN75J-1-GP
OPS
RN8602
SRN75J-1-GP
OPS
1
TP8611TP8611
DACA_RSET
AP8
DACA_VREF
AP9
DACA_VDD
AG10
DACA_BLUE AL9
DACA_GREEN AL10
DACA_RED AK9
DACA_VSYNC AN9
DACA_HSYNC AM9
I2CA_SDA R5
I2CA_SCL R4
GF108/GKxGF117
NC
NC
NC
NC
NC
NC
NCNC
GF108/GKx GF117
NC
TSEN_VREF
4/17 DACA
14 OF 17
VGA1N
N13P-GS-A1-GP
OPS-BOM CTRL
GF108/GKxGF117
NC
NC
NC
NC
NC
NC
NCNC
GF108/GKx GF117
NC
TSEN_VREF
4/17 DACA
14 OF 17
VGA1N
N13P-GS-A1-GP
OPS-BOM CTRL
12
R8626
15KR2F-GP
OPS-BOM CTRL
R8626
15KR2F-GP
OPS-BOM CTRL
12
R8618
15KR2F-GP
OPS-BOM CTRL
R8618
15KR2F-GP
OPS-BOM CTRL
1
TP8614TP8614
1
TP8620TP8620
12
R8625
10KR2F-2-GP
DY
R8625
10KR2F-2-GP
DY
1 2
R8628
10KR2F-2-GP
OPS-BOM CTRL
R8628
10KR2F-2-GP
OPS-BOM CTRL
1
2 3
4
RN8603
SRN10KJ-5-GP
OPS
RN8603
SRN10KJ-5-GP
OPS
12
R8632
34K8R2F-1-GP
DY
R8632
34K8R2F-1-GP
DY
1 2
R2813 0R0402-PADR2813 0R0402-PAD
1 2
R8620
10KR2J-3-GP
OPS
R8620
10KR2J-3-GP
OPS
12
R8315
5K1R2F-2-GP
OPS-BOM CTRL
R8315
5K1R2F-2-GP
OPS-BOM CTRL
12
R8316
34K8R2F-1-GP
DY
R8316
34K8R2F-1-GP
DY
12
R8630
45K3R2F-L-GP
OPS
R8630
45K3R2F-L-GP
OPS
1
2
3 4
5
6
Q8601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
OPS
Q8601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
OPS
1
TP8621TP8621
12
R8624
2KR2F-3-GP
DY
R8624
2KR2F-3-GP
DY
12
R8631
2KR2F-3-GP
DY
R8631
2KR2F-3-GP
DY
4
1 2
3
X8601
XTAL-27MHZ-46-GP
82.30034.351
OPS
X8601
XTAL-27MHZ-46-GP
82.30034.351
OPS
12
R8633
34K8R2F-1-GP
OPS-BOM CTRL
R8633
34K8R2F-1-GP
OPS-BOM CTRL
12
R8617
30KR2F-GP
OPS-BOM CTRL
R8617
30KR2F-GP
OPS-BOM CTRL
1 2
R8619
10KR2J-3-GP
DY
R8619
10KR2J-3-GP
DY
12
R8317
20KR2F-L-GP
OPS-BOM CTRL
R8317
20KR2F-L-GP
OPS-BOM CTRL
21
(
(
L8601
BLM18KG300TN1D-GP
OPS
(
(
L8601
BLM18KG300TN1D-GP
OPS
1 2
R8636
0R2J-2-GP
DY
R8636
0R2J-2-GP
DY
1
TP8604TP8604
1 2
R8603 1MR2F-GP
DY
R8603 1MR2F-GP
DY
1
2 3
4
RN8607
SRN10KJ-5-GP
OPS
RN8607
SRN10KJ-5-GP
OPS
G
S
D
Q8602
2N7002K-2-GP
2ND = 84.2N702.J31
OPS
1st = 84.2N702.031
Q8602
2N7002K-2-GP
2ND = 84.2N702.J31
OPS
1st = 84.2N702.031
12
R8601
10KR2J-3-GP
OPS
R8601
10KR2J-3-GP
OPS
1
TP8613TP8613
MULTI_ST RAP_REF0_GND
J1
STRAP4
J3 STRAP3
J5 STRAP2
J6 STRAP1
J7 STRAP0
J2
CEC L3
BUFRST# L 2
ROM_SCL K H4
ROM_SO H7
ROM_SI H5
ROM_CS# H6
12/17 MISC2
16 OF 17
VGA1P
N13P-GS-A1-GP
OPS-BOM CTRL
12/17 MISC2
16 OF 17
VGA1P
N13P-GS-A1-GP
OPS-BOM CTRL
JTAG_TRST#
AN11 JTAG_TDO
AP12 JTAG_TDI
AM11 JTAG_TMS
AP11 JTAG_TCK
AM10
THERMDP
K3
THERMDN
K4
GPIO21 P1
GPIO20 P4
GPIO16 R8
GPIO13 M4
GPIO12 N3
GPIO11 M5
GPIO10 L1
GPIO9 M2
GPIO8 M1
GPIO7 N8
GPIO6 M7
GPIO5 L7
GPIO4 P7
GPIO3 P5
GPIO2 L6
GPIO1 M3
GPIO0 P6
I2CB_SDA R6
I2CB_SCL R7
I2CC_SDA R3
I2CC_SCL R2
I2CS_SDA T3
I2CS_SCL T4
10/19 MISC1
17 OF 17
VGA1Q
N13P-GS-A1-GP
OPS-BOM CTRL
10/19 MISC1
17 OF 17
VGA1Q
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8606
SCD1U10V2KX-5GP
OPS
C8606
SCD1U10V2KX-5GP
OPS
12
R8635
30KR2F-GP
DY
R8635
30KR2F-GP
DY
12
R8314
45K3R2F-L-GP
DY
R8314
45K3R2F-L-GP
DY
1
2 3
4
RN8604
SRN2K2J-1-GP
OPS
RN8604
SRN2K2J-1-GP
OPS
12
C8605
SCD1U10V2KX-5GP
OPS
C8605
SCD1U10V2KX-5GP
OPS
1
2 3
4
RN8606
SRN2K2J-1-GP
OPS
RN8606
SRN2K2J-1-GP
OPS
12
C8602
SCD1U10V2KX-5GP
OPS
C8602
SCD1U10V2KX-5GP
OPS
12
C8608
SC15P50V2JN-2-GP
OPS
C8608
SC15P50V2JN-2-GP
OPS
12
C8601
SC4D7U6D3V3KX-GP
OPS
C8601
SC4D7U6D3V3KX-GP
OPS
12
R8313
40K2R2F-GP
OPS
R8313
40K2R2F-GP
OPS
1 2
R8604
0R2J-2-GP
OPS
R8604
0R2J-2-GP
OPS
1
2 3
4
RN8601
SRN2K2J-1-GP
OPS
RN8601
SRN2K2J-1-GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_CORE
3D3V_VGA_S0
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (5/5): PWR/GND
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
87 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (5/5): PWR/GND
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
87 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA48 SD
N13P_GPU (5/5): PWR/GND
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A3
87 103Friday, January 06, 2012
<Core Design>
4.7uF
0.1uF
47uF
22uF
4.7uF
15
8
1
1
5
X7R (+/-15%
、
-55~125
℃
)
X6S (+/-22%
、
-55~105
℃
)
X5R (+/-15%
、
-55~85
℃
)
X6S
X7R
X5R
X5R
X5R
0603
0402
0805
0805
0805
10
4
1
1
5
Under GPU
Under GPU
Near GPU
Near GPU
Near GPU
Footprint Population Location
NVVDD Decoupling Requirement
(DG-05587-001_v03_p.56_Table 7)
Capacitor Type
Under GPU
0.1uF
1uF
4.7uF
3
2
1
X7R (+/-15%
、
-55~125
℃
)
X5R (+/-15%
、
-55~85
℃
)
X7R
X5R
X5R
0402
0402
0603
Under GPU
Near GPU
Near GPU
Footprint PopulationCapacitor Type Location
VDD33 Decoupling (DG-05587-001_v03_p.57_Table 8)
3
2
1
Near GPUUnder GPU
4.7uF(X5R)
K0603 ×15
0.1uF(X7R)
K0402 ×8
22uF(X5R)
M0805 ×1 47uF(X5R)
M0805 ×1
4.7uF(X5R)
K0805 ×5
0.1uF(X7R)
K0402 ×3 1uF(X5R)
K0402 ×2 4.uF(X5R)
K0603 ×2
GND_F
AG11
GND_169
T22 GND_168
T20 GND_167
T2 GND_166
T18 GND_165
T17 GND_164
T15 GND_163
T13 GND_162
R23 GND_161
R21 GND_160
R19 GND_159
R16 GND_158
R14 GND_157
R12 GND_156
P22 GND_155
P20 GND_154
P18 GND_153
P17 GND_152
P15 GND_151
P13 GND_150
N7 GND_149
N5 GND_148
N33 GND_147
N32 GND_146
N30 GND_145
N28 GND_144
N23 GND_143
N21 GND_142
N2 GND_141
N19
GND_OPT_2 W32
GND_OPT_1 C16
GND_H AH11
GND_198 Y23
GND_197 Y21
GND_196 Y19
GND_195 Y16
GND_194 Y14
GND_193 Y12
GND_192 W28
GND_191 W22
GND_190 W20
GND_189 W18
GND_188 W17
GND_187 W15
GND_186 W13
GND_185 V23
GND_184 V21
GND_183 V19
GND_182 V16
GND_181 V14
GND_180 V12
GND_179 U23
GND_178 U21
GND_177 U19
GND_176 U16
GND_175 U14
GND_174 U12
GND_173 T7
GND_172 T5
GND_171 T32
GND_170 T28
Optional CMD GNDs (2)
NC for 4-Lyr cards
16/17 GND_2/2
8 OF 17
VGA1H
N13P-GS-A1-GP
OPS-BOM CTRL
Optional CMD GNDs (2)
NC for 4-Lyr cards
16/17 GND_2/2
8 OF 17
VGA1H
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8731
SCD1U10V2KX-5GP
OPS
C8731
SCD1U10V2KX-5GP
OPS
12
C8718
SCD1U10V2KX-5GP
OPS
C8718
SCD1U10V2KX-5GP
OPS
12
C8733
SCD1U10V2KX-5GP
OPS
C8733
SCD1U10V2KX-5GP
OPS
12
C8714
SC4D7U6D3V3KX-GP
OPS
C8714
SC4D7U6D3V3KX-GP
OPS
12
C8706
SC4D7U6D3V3KX-GP
DY
C8706
SC4D7U6D3V3KX-GP
DY
12
C8723
SCD1U10V2KX-5GP
DY
C8723
SCD1U10V2KX-5GP
DY
NC#V32
V32 NC#T8
T8 NC#H31
H31 NC#D26
D26 NC#D23
D23 NC#D20
D20 NC#D19
D19 NC#C15
C15 NC#AL11
AL11 NC#AJ5
AJ5 NC#AJ4
AJ4 NC#AJ28
AJ28 NC#AC6
AC6
VDD33_4 M8
VDD33_3 L8
VDD33_2 K8
VDD33_1 J8
17/17 NC/VDD33
7 OF 17
VGA1G
N13P-GS-A1-GP
OPS-BOM CTRL
17/17 NC/VDD33
7 OF 17
VGA1G
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8734
SC1U6D3V2KX-GP
OPS
C8734
SC1U6D3V2KX-GP
OPS
12
C8724
SC22U6D3V5MX-2GP
OPS
C8724
SC22U6D3V5MX-2GP
OPS
12
C8721
SCD1U10V2KX-5GP
DY
C8721
SCD1U10V2KX-5GP
DY
12
C8717
SCD1U10V2KX-5GP
DY
C8717
SCD1U10V2KX-5GP
DY
XVDD_38 AA8
XVDD_37 AA7
XVDD_36 AA6
XVDD_35 AA5
XVDD_34 AA4
XVDD_33 AA3
XVDD_32 AA2
XVDD_31 AA1
XVDD_30 Y8
XVDD_29 Y7
XVDD_28 Y6
XVDD_27 Y5
XVDD_26 Y4
XVDD_25 Y3
XVDD_24 Y2
XVDD_23 Y1
XVDD_22 W8
XVDD_21 W7
XVDD_20 W5
XVDD_19 W4
XVDD_18 W3
XVDD_17 W2
XVDD_16 V8
XVDD_15 V7
XVDD_14 V6
XVDD_13 V5
XVDD_12 V4
XVDD_11 V3
XVDD_10 V2
XVDD_9 V1
XVDD_8 U8
XVDD_7 U7
XVDD_6 U6
XVDD_5 U5
XVDD_4 U4
XVDD_3 U3
XVDD_2 U2
XVDD_1 U1
CHANNELS
POWER
CONFIGURABLE
9/17 XVDD
5 OF 17
VGA1E
N13P-GS-A1-GP
OPS-BOM CTRL
CHANNELS
POWER
CONFIGURABLE
9/17 XVDD
5 OF 17
VGA1E
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8702
SC4D7U6D3V3KX-GP
DY
C8702
SC4D7U6D3V3KX-GP
DY
12
C8735
SC1U6D3V2KX-GP
OPS
C8735
SC1U6D3V2KX-GP
OPS
12
C8703
SC4D7U6D3V3KX-GP
OPS
C8703
SC4D7U6D3V3KX-GP
OPS
12
C8713
SC4D7U6D3V3KX-GP
OPS
C8713
SC4D7U6D3V3KX-GP
OPS
12
C8704
SC4D7U6D3V3KX-GP
DY
C8704
SC4D7U6D3V3KX-GP
DY
12
C8719
SCD1U10V2KX-5GP
DY
C8719
SCD1U10V2KX-5GP
DY
12
C8707
SC4D7U6D3V3KX-GP
OPS
C8707
SC4D7U6D3V3KX-GP
OPS
12
C8736
SC4D7U6D3V3KX-GP
OPS
C8736
SC4D7U6D3V3KX-GP
OPS
12
C8720
SCD1U10V2KX-5GP
OPS
C8720
SCD1U10V2KX-5GP
OPS
12
C8716
SCD1U10V2KX-5GP
OPS
C8716
SCD1U10V2KX-5GP
OPS
12
C8722
SCD1U10V2KX-5GP
OPS
C8722
SCD1U10V2KX-5GP
OPS
12
C8710
SC4D7U6D3V3KX-GP
DY
C8710
SC4D7U6D3V3KX-GP
DY
12
C8705
SC4D7U6D3V3KX-GP
OPS
C8705
SC4D7U6D3V3KX-GP
OPS
12
C8711
SC4D7U6D3V3KX-GP
OPS
C8711
SC4D7U6D3V3KX-GP
OPS
VDD_72
Y22 VDD_71
Y20 VDD_70
Y18 VDD_69
Y17 VDD_68
Y15 VDD_67
Y13 VDD_66
W23 VDD_65
W21 VDD_64
W19 VDD_63
W16 VDD_62
W14 VDD_61
W12 VDD_60
V22 VDD_59
V20 VDD_58
V18 VDD_57
V17 VDD_56
V15 VDD_55
V13 VDD_54
U22 VDD_53
U20 VDD_52
U18 VDD_51
U17 VDD_50
U15 VDD_49
U13 VDD_48
T23 VDD_47
T21 VDD_46
T19 VDD_45
T16 VDD_44
T14 VDD_43
T12 VDD_42
R22 VDD_41
R20 VDD_40
R18 VDD_39
R17 VDD_38
R15 VDD_37
R13 VDD_36
P23 VDD_35
P21 VDD_34
P19 VDD_33
P16 VDD_32
P14 VDD_31
P12 VDD_30
N22 VDD_29
N20 VDD_28
N18 VDD_27
N17 VDD_26
N15 VDD_25
N13 VDD_24
M23 VDD_23
M21 VDD_22
M19 VDD_21
M16 VDD_20
M14 VDD_19
M12 VDD_18
AC23 VDD_17
AC21 VDD_16
AC19 VDD_15
AC16 VDD_14
AC14 VDD_13
AC12 VDD_12
AB22 VDD_11
AB20 VDD_10
AB18 VDD_9
AB17 VDD_8
AB15 VDD_7
AB13 VDD_6
AA23 VDD_5
AA21 VDD_4
AA19 VDD_3
AA16 VDD_2
AA14 VDD_1
AA12
13/17 NVVDD
6 OF 17
VGA1F
N13P-GS-A1-GP
OPS-BOM CTRL
13/17 NVVDD
6 OF 17
VGA1F
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8732
SCD1U10V2KX-5GP
OPS
C8732
SCD1U10V2KX-5GP
OPS
GND_70
AM22 GND_69
AM19 GND_68
AM16 GND_67
AM13 GND_66
AL5 GND_65
AL33 GND_64
AL32 GND_63
AL30 GND_62
AL28 GND_61
AL26 GND_60
AL24 GND_59
AL23 GND_58
AL21 GND_57
AL20 GND_56
AL2 GND_55
AL18 GND_54
AL17 GND_53
AL15 GND_52
AL14 GND_51
AL12 GND_50
AK7 GND_49
AK10 GND_48
AJ7 GND_47
AH7 GND_46
AH5 GND_45
AH33 GND_44
AH32 GND_43
AH30 GND_42
AH29 GND_41
AH28 GND_40
AH24 GND_39
AH22 GND_38
AH2 GND_37
AH19 GND_36
AH16 GND_35
AH13 GND_4
AA15 GND_34
AH10 GND_33
AE7 GND_32
AE5 GND_31
AE33 GND_30
AE32 GND_29
AE30 GND_28
AE28 GND_27
AE2 GND_26
AC22 GND_25
AC20 GND_3
AA13 GND_24
AC18 GND_23
AC17 GND_22
AC15 GND_21
AC13 GND_20
AB7 GND_19
AB5 GND_18
AB32 GND_17
AB30 GND_16
AB28 GND_15
AB23 GND_2
A33 GND_14
AB21 GND_13
AB2 GND_12
AB19 GND_11
AB16 GND_10
AB14 GND_9
AB12 GND_8
AA22 GND_7
AA20 GND_6
AA18 GND_5
AA17 GND_1
A2
GND_140 N16
GND_139 N14
GND_138 N12
GND_137 M22
GND_136 M20
GND_135 M18
GND_134 M17
GND_133 M15
GND_132 M13
GND_131 K7
GND_130 K5
GND_129 K33
GND_128 K32
GND_127 K30
GND_126 K28
GND_125 K2
GND_124 G7
GND_123 G5
GND_122 G33
GND_121 G32
GND_120 G30
GND_119 G3
GND_118 G28
GND_117 G25
GND_116 G22
GND_115 G2
GND_114 G19
GND_113 G16
GND_112 G13
GND_111 G10
GND_110 F7
GND_109 F28
GND_108 E7
GND_107 E5
GND_106 E25
GND_105 E22
GND_104 E10
GND_103 D33
GND_102 D31
GND_101 D2
GND_100 C7
GND_99 C28
GND_98 C25
GND_97 C22
GND_96 C19
GND_95 C13
GND_94 C10
GND_93 B7
GND_92 B4
GND_91 B34
GND_90 B31
GND_89 B28
GND_88 B25
GND_87 B22
GND_86 B10
GND_85 B1
GND_84 AP33
GND_83 AP2
GND_82 AN7
GND_81 AN4
GND_80 AN34
GND_79 AN30
GND_78 AN25
GND_77 AN22
GND_76 AN19
GND_75 AN16
GND_74 AN13
GND_73 AN10
GND_72 AN1
GND_71 AM25
15/17 GND_1/2
9 OF 17
VGA1I
N13P-GS-A1-GP
OPS-BOM CTRL
15/17 GND_1/2
9 OF 17
VGA1I
N13P-GS-A1-GP
OPS-BOM CTRL
12
C8708
SC4D7U6D3V3KX-GP
OPS
C8708
SC4D7U6D3V3KX-GP
OPS
12
C8715
SC4D7U6D3V3KX-GP
OPS
C8715
SC4D7U6D3V3KX-GP
OPS
12
C8709
SC4D7U6D3V3KX-GP
OPS
C8709
SC4D7U6D3V3KX-GP
OPS
12
C8712
SC4D7U6D3V3KX-GP
DY
C8712
SC4D7U6D3V3KX-GP
DY
12
C8701
SC4D7U6D3V3KX-GP
OPS
C8701
SC4D7U6D3V3KX-GP
OPS
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
FBA_D23
FBA_D19
FBA_D18
FBA_D17
FBA_D16
FBA_D20
FBA_D21
FBA_D22
VRAM_CH_A_ZQ_2
FBA_D29
FBA_D28
FBA_D31
FBA_D25
FBA_D26
FBA_D24
FBA_D30
FBA_D27
FBA_D9
FBA_D13
FBA_D11
FBA_D14
FBA_D10
FBA_D15
FBA_D8
FBA_D12
VRAM_CH_A_ZQ_1
FBA_D3
FBA_D4
FBA_D1
FBA_D7
FBA_D2
FBA_D6
FBA_D0
FBA_D5
FBA_VREF_0FBA_VREF_0
FBA_VREF_0
1D5V_VGA_S01D5V_VGA_S0
1D5V_VGA_S0
1D5V_VGA_S0
FBA_CLK0#85 FBA_CLK085
FBA_DQS_WP2 85
FBA_DQS_WP3 85
FBA_DQM385 FBA_DQM285
FBA_DQS_RN3 85
FBA_DQS_RN2 85
FBA_DQS_WP1 85
FBA_DQS_WP0 85
FBA_CLK0#85 FBA_CLK085
FBA_DQM085 FBA_DQM185
FBA_DQS_RN0 85
FBA_DQS_RN1 85
FBA_D[63..0] 85,89 FBA_D[63..0] 85,89
FBA_A285,89
FBA_CKE085
FBA_A385,89 FBA_A485,89
FBA_A785,89 FBA_A885,89 FBA_A985,89
FBA_A585,89 FBA_A685,89
FBA_A1285,89 FBA_A1385,89 FBA_A1585,89
FBA_A1085,89 FBA_A1185,89
FBA_A085,89
FBA_BA085,89 FBA_BA185,89 FBA_BA285,89
FBA_WE#85,89 FBA_CAS#85,89 FBA_RAS#85,89
FBA_A185,89
FBA_A285,89
FBA_CKE085
FBA_A385,89 FBA_A485,89
FBA_A785,89 FBA_A885,89 FBA_A985,89
FBA_A585,89 FBA_A685,89
FBA_A1285,89 FBA_A1385,89 FBA_A1585,89
FBA_A1085,89 FBA_A1185,89
FBA_A085,89
FBA_BA085,89 FBA_BA185,89 FBA_BA285,89
FBA_WE#85,89 FBA_CAS#85,89 FBA_RAS#85,89
FBA_A185,89
FBA_ODT0 85
FBA_CS0# 85
FBA_RST 85,89
FBA_ODT0 85
FBA_CS0# 85
FBA_RST 85,89
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-A_VRAM1,2 (1/4)
A3
88 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-A_VRAM1,2 (1/4)
A3
88 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-A_VRAM1,2 (1/4)
A3
88 103Friday, January 06, 2012
<Core Design>
VIDEO FRAME BUFFER PORT A
128 X 16
72.52G63.A0U
72.42164.D0U IC VRAM K4W2G1646C-HC11 FBGA96
64 X 16
72.51G63.H0U IC VRAM H5TQ1G63DFR-11C FBGA 96BALLS
72.41646.Q0U IC VRAM K4W1G1646G-BC11 FBGA 96BALLS
Close to VRAM(For VRAM1 & VRAM2)
FB CMD mapping
Mode D-N13x
FB CMD mapping
Mode D-N13x
128Mx16:
hynix - H5TQ2G63BFR-11C
Samsung - K4W2G1646C-HC11
64Mx16:
Hynix - H5TQ1G63DFR-11C
Samsung - K4W1G1646G-BC11
0.1uF(X7R)
K0402 ×4
1.0uF(X7R)
K0603 ×8
0.1uF
1uF
X7R (+/-15%
、
-55~125
℃
)
*Per clamshell pair
X7R
X7R 0402
0603 Close to VRAM
Close to VRAM
Capacitor Type Footprint Population Location
Combined Memory FBVDD/Q Decoupling DDR3×16 with Clamshell Layout
(DG-05587-001_v03_p.87_Table 23)
4
8
12
R8801
243R2F-2-GP
OPS
R8801
243R2F-2-GP
OPS
12
R8803
1K33R2F-GP
OPS
R8803
1K33R2F-GP
OPS
12
R8804
1K33R2F-GP
OPS
R8804
1K33R2F-GP
OPS
12
C8809
SC1U6D3V3KX-2GP
OPS
C8809
SC1U6D3V3KX-2GP
OPS
12
C8810
SC1U6D3V3KX-2GP
OPS
C8810
SC1U6D3V3KX-2GP
OPS
12
C8807
SC1U6D3V3KX-2GP
OPS
C8807
SC1U6D3V3KX-2GP
OPS
12
C8812
SC1U6D3V3KX-2GP
OPS
C8812
SC1U6D3V3KX-2GP
OPS
12
C8804
SCD1U10V2KX-5GP
OPS
C8804
SCD1U10V2KX-5GP
OPS
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM1
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM1
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C8806
SC1U6D3V3KX-2GP
OPS
C8806
SC1U6D3V3KX-2GP
OPS
12
R8802
243R2F-2-GP
OPS
R8802
243R2F-2-GP
OPS
12
C8808
SC1U6D3V3KX-2GP
OPS
C8808
SC1U6D3V3KX-2GP
OPS
12
C8805
SC1U6D3V3KX-2GP
OPS
C8805
SC1U6D3V3KX-2GP
OPS
12
C8813
SCD01U50V2KX-1GP
OPS
C8813
SCD01U50V2KX-1GP
OPS
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM2
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM2
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C8801
SCD1U10V2KX-5GP
OPS
C8801
SCD1U10V2KX-5GP
OPS
12
C8803
SCD1U10V2KX-5GP
OPS
C8803
SCD1U10V2KX-5GP
OPS
12
C8811
SC1U6D3V3KX-2GP
OPS
C8811
SC1U6D3V3KX-2GP
OPS
12
C8802
SCD1U10V2KX-5GP
OPS
C8802
SCD1U10V2KX-5GP
OPS
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
VRAM_CH_A_ZQ_4
FBA_D61
FBA_D62
FBA_D56
FBA_D63
FBA_D58
FBA_D59
FBA_D57
FBA_D60
FBA_D50
FBA_D53
FBA_D51
FBA_D55
FBA_D48
FBA_D54
FBA_D49
FBA_D52
VRAM_CH_A_ZQ_3
FBA_D47
FBA_D43
FBA_D44
FBA_D41
FBA_D46
FBA_D40
FBA_D42
FBA_D45
FBA_D33
FBA_D38
FBA_D35
FBA_D39
FBA_D36
FBA_D37
FBA_D32
FBA_D34
FBA_VREF_1 FBA_VREF_1
FBA_VREF_1
1D5V_VGA_S01D5V_VGA_S0
1D5V_VGA_S0
1D5V_VGA_S0
FBA_CLK1#85 FBA_CLK185
FBA_DQM485 FBA_DQM685
FBA_DQS_RN5 85
FBA_DQS_WP6 85
FBA_CLK185 FBA_CLK1#85
FBA_DQS_WP7 85
FBA_DQS_RN4 85 FBA_DQS_WP5 85FBA_DQS_WP4 85
FBA_DQS_RN7 85
FBA_DQM785 FBA_DQM585
FBA_DQS_RN6 85
FBA_D[63..0] 85,88 FBA_D[63..0] 85,88
FBA_A085,88 FBA_A185,88 FBA_A285,88 FBA_A385,88 FBA_A485,88
FBA_A785,88 FBA_A885,88 FBA_A985,88
FBA_A585,88 FBA_A685,88
FBA_A1285,88 FBA_A1385,88 FBA_A1585,88
FBA_A1085,88 FBA_A1185,88
FBA_BA085,88 FBA_BA185,88 FBA_BA285,88
FBA_CKE185
FBA_WE#85,88 FBA_CAS#85,88 FBA_RAS#85,88
FBA_ODT1 85
FBA_CS1# 85
FBA_RST 85,88 FBA_A285,88
FBA_CKE185
FBA_A385,88 FBA_A485,88
FBA_A785,88 FBA_A885,88 FBA_A985,88
FBA_A585,88 FBA_A685,88
FBA_A1285,88 FBA_A1385,88 FBA_A1585,88
FBA_A1085,88 FBA_A1185,88
FBA_A085,88
FBA_BA085,88 FBA_BA185,88 FBA_BA285,88
FBA_WE#85,88 FBA_CAS#85,88 FBA_RAS#85,88
FBA_A185,88
FBA_ODT1 85
FBA_CS1# 85
FBA_RST 85,88
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-A_VRAM3,4 (2/4)
A3
89 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-A_VRAM3,4 (2/4)
A3
89 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-A_VRAM3,4 (2/4)
A3
89 103Friday, January 06, 2012
<Core Design>
VIDEO FRAME BUFFER PORT A
FB CMD mapping
Mode D-N13x
FB CMD mapping
Mode D-N13x
Close to VRAM(For VRAM3 & VRAM4)
1.0uF(X7R)
K0603 ×8
0.1uF(X7R)
K0402 ×4
0.1uF
1uF
X7R (+/-15%
、
-55~125
℃
)
*Per clamshell pair
X7R
X7R 0402
0603 Close to VRAM
Close to VRAM
Capacitor Type Footprint Population Location
Combined Memory FBVDD/Q Decoupling DDR3×16 with Clamshell Layout
(DG-05587-001_v03_p.87_Table 23)
4
8
12
C8905
SC1U6D3V3KX-2GP
OPS
C8905
SC1U6D3V3KX-2GP
OPS
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM4
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM4
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C8911
SC1U6D3V3KX-2GP
OPS
C8911
SC1U6D3V3KX-2GP
OPS
12
C8910
SC1U6D3V3KX-2GP
OPS
C8910
SC1U6D3V3KX-2GP
OPS
12
C8912
SC1U6D3V3KX-2GP
OPS
C8912
SC1U6D3V3KX-2GP
OPS
12
C8902
SCD1U10V2KX-5GP
OPS
C8902
SCD1U10V2KX-5GP
OPS
12
C8907
SC1U6D3V3KX-2GP
OPS
C8907
SC1U6D3V3KX-2GP
OPS
12
R8903
1K33R2F-GP
OPS
R8903
1K33R2F-GP
OPS
12
C8906
SC1U6D3V3KX-2GP
OPS
C8906
SC1U6D3V3KX-2GP
OPS
12
R8901
243R2F-2-GP
OPS
R8901
243R2F-2-GP
OPS
12
C8901
SCD1U10V2KX-5GP
OPS
C8901
SCD1U10V2KX-5GP
OPS
12
C8909
SC1U6D3V3KX-2GP
OPS
C8909
SC1U6D3V3KX-2GP
OPS
12
C8904
SCD1U10V2KX-5GP
OPS
C8904
SCD1U10V2KX-5GP
OPS
12
C8908
SC1U6D3V3KX-2GP
OPS
C8908
SC1U6D3V3KX-2GP
OPS
12
R8904
1K33R2F-GP
OPS
R8904
1K33R2F-GP
OPS
12
R8902
243R2F-2-GP
OPS
R8902
243R2F-2-GP
OPS
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM3
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM3
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C8903
SCD1U10V2KX-5GP
OPS
C8903
SCD1U10V2KX-5GP
OPS
12
C8913
SCD01U50V2KX-1GP
OPS
C8913
SCD01U50V2KX-1GP
OPS
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
VRAM_CH_C_ZQ_2
FBB_D5
FBB_D7
FBB_D13
FBB_D11
FBB_D14
FBB_D10
FBB_D12
FBB_D8
FBB_D15
FBB_D9
VRAM_CH_C_ZQ_1
FBB_VREF_0 FBB_VREF_0
FBB_VREF_0
FBB_D1
FBB_D2
FBB_D0
FBB_D6
FBB_D4
FBB_D3 FBB_D31
FBB_D25
FBB_D28
FBB_D29
FBB_D27
FBB_D30
FBB_D26
FBB_D24
FBB_D17
FBB_D16
FBB_D20
FBB_D19
FBB_D23
FBB_D18
FBB_D22
FBB_D21
1D5V_VGA_S0
1D5V_VGA_S0
1D5V_VGA_S0
1D5V_VGA_S0
FBB_CLK085 FBB_CLK0#85FBB_CLK085 FBB_CLK0#85
FBB_DQM185
FBB_DQS_WP1 85
FBB_DQS_RN1 85
FBB_DQS_RN0 85
FBB_DQS_WP0 85
FBB_DQM085
FBB_D[63..0] 85,91 FBB_D[63..0] 85,91
FBB_ODT0 85
FBB_CS0# 85
FBB_RST 85,91
FBB_A285,91
FBB_CKE085
FBB_A385,91 FBB_A485,91
FBB_A785,91 FBB_A885,91 FBB_A985,91
FBB_A585,91 FBB_A685,91
FBB_A1285,91 FBB_A1385,91 FBB_A1585,91
FBB_A1085,91 FBB_A1185,91
FBB_A085,91
FBB_BA085,91 FBB_BA185,91 FBB_BA285,91
FBB_WE#85,91 FBB_CAS#85,91 FBB_RAS#85,91
FBB_A185,91 FBB_A285,91
FBB_CKE085
FBB_A385,91 FBB_A485,91
FBB_A785,91 FBB_A885,91 FBB_A985,91
FBB_A585,91 FBB_A685,91
FBB_A1285,91 FBB_A1385,91 FBB_A1585,91
FBB_A1085,91 FBB_A1185,91
FBB_A085,91
FBB_BA085,91 FBB_BA185,91 FBB_BA285,91
FBB_WE#85,91 FBB_CAS#85,91 FBB_RAS#85,91
FBB_A185,91
FBB_ODT0 85
FBB_CS0# 85
FBB_RST 85,91
FBB_DQS_WP2 85
FBB_DQS_RN2 85
FBB_DQS_WP3 85
FBB_DQS_RN3 85
FBB_DQM285 FBB_DQM385
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-C_VRAM5,6 (3/4)
A3
90 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-C_VRAM5,6 (3/4)
A3
90 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-C_VRAM5,6 (3/4)
A3
90 103Friday, January 06, 2012
<Core Design>
VIDEO FRAME BUFFER PORT C
FB CMD mapping
Mode D-N13x
FB CMD mapping
Mode D-N13x
Close to VRAM(For VRAM5 & VRAM6)
1.0uF(X7R)
K0603 ×8
0.1uF(X7R)
K0402 ×4
0.1uF
1uF
X7R (+/-15%
、
-55~125
℃
)
*Per clamshell pair
X7R
X7R 0402
0603 Close to VRAM
Close to VRAM
Capacitor Type Footprint Population Location
Combined Memory FBVDD/Q Decoupling DDR3×16 with Clamshell Layout
(DG-05587-001_v03_p.87_Table 23)
4
8
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM6
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM6
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C9003
SCD1U10V2KX-5GP
OPS
C9003
SCD1U10V2KX-5GP
OPS
12
C9005
SC1U6D3V3KX-2GP
OPS
C9005
SC1U6D3V3KX-2GP
OPS
12
R9002
243R2F-2-GP
OPS
R9002
243R2F-2-GP
OPS
12
C9011
SC1U6D3V3KX-2GP
OPS
C9011
SC1U6D3V3KX-2GP
OPS
12
C9006
SC1U6D3V3KX-2GP
OPS
C9006
SC1U6D3V3KX-2GP
OPS
12
R9003
1K33R2F-GP
OPS
R9003
1K33R2F-GP
OPS
12
C9002
SCD1U10V2KX-5GP
OPS
C9002
SCD1U10V2KX-5GP
OPS
12
C9009
SC1U6D3V3KX-2GP
OPS
C9009
SC1U6D3V3KX-2GP
OPS
12
C9007
SC1U6D3V3KX-2GP
OPS
C9007
SC1U6D3V3KX-2GP
OPS
12
R9004
1K33R2F-GP
OPS
R9004
1K33R2F-GP
OPS
12
C9001
SCD1U10V2KX-5GP
OPS
C9001
SCD1U10V2KX-5GP
OPS
12
C9012
SC1U6D3V3KX-2GP
OPS
C9012
SC1U6D3V3KX-2GP
OPS
12
R9001
243R2F-2-GP
OPS
R9001
243R2F-2-GP
OPS
12
C9010
SC1U6D3V3KX-2GP
OPS
C9010
SC1U6D3V3KX-2GP
OPS
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM5
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM5
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C9013
SCD01U50V2KX-1GP
OPS
C9013
SCD01U50V2KX-1GP
OPS
12
C9004
SCD1U10V2KX-5GP
OPS
C9004
SCD1U10V2KX-5GP
OPS
12
C9008
SC1U6D3V3KX-2GP
OPS
C9008
SC1U6D3V3KX-2GP
OPS
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
FBB_D63
FBB_D61
FBB_D60
FBB_D58
FBB_D62
FBB_D57
FBB_D40
FBB_D41
FBB_D42
FBB_D46
FBB_D43
VRAM_CH_C_ZQ_4
FBB_D36
FBB_D38
FBB_D35
FBB_D37
FBB_D39
FBB_D51
FBB_D53
FBB_D48
FBB_D54
FBB_D49
FBB_D55
FBB_D50
FBB_D52
VRAM_CH_C_ZQ_3
FBB_VREF_1 FBB_VREF_1
FBB_VREF_1
FBB_D34
FBB_D32
FBB_D33
FBB_D44
FBB_D47
FBB_D45
FBB_D56
FBB_D59
1D5V_VGA_S0
1D5V_VGA_S0
1D5V_VGA_S0
1D5V_VGA_S0
FBB_CLK185 FBB_CLK1#85
FBB_DQM585
FBB_DQS_WP5 85
FBB_DQS_RN5 85
FBB_CLK185 FBB_CLK1#85
FBB_DQM485
FBB_DQS_RN4 85
FBB_DQS_WP4 85
FBB_DQM785
FBB_DQS_RN7 85
FBB_DQS_WP7 85
FBB_DQM685
FBB_DQS_WP6 85
FBB_DQS_RN6 85
FBB_D[63..0] 85,90 FBB_D[63..0] 85,90
FBB_ODT1 85
FBB_CS1# 85
FBB_RST 85,90
FBB_ODT1 85
FBB_CS1# 85
FBB_RST 85,90 FBB_A285,90
FBB_CKE185
FBB_A385,90 FBB_A485,90
FBB_A785,90 FBB_A885,90 FBB_A985,90
FBB_A585,90 FBB_A685,90
FBB_A1285,90 FBB_A1385,90 FBB_A1585,90
FBB_A1085,90 FBB_A1185,90
FBB_A085,90
FBB_BA085,90 FBB_BA185,90 FBB_BA285,90
FBB_WE#85,90 FBB_CAS#85,90 FBB_RAS#85,90
FBB_A185,90FBB_A285,90
FBB_CKE185
FBB_A385,90 FBB_A485,90
FBB_A785,90 FBB_A885,90 FBB_A985,90
FBB_A585,90 FBB_A685,90
FBB_A1285,90 FBB_A1385,90 FBB_A1585,90
FBB_A1085,90 FBB_A1185,90
FBB_A085,90
FBB_BA085,90 FBB_BA185,90 FBB_BA285,90
FBB_WE#85,90 FBB_CAS#85,90 FBB_RAS#85,90
FBB_A185,90
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-C_VRAM7,8 (4/4)
A3
91 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-C_VRAM7,8 (4/4)
A3
91 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA48
SD
CHANNEL-C_VRAM7,8 (4/4)
A3
91 103Friday, January 06, 2012
<Core Design>
VIDEO FRAME BUFFER PORT C
0.1uF
1uF
X7R (+/-15%
、
-55~125
℃
)
*Per clamshell pair
X7R
X7R 0402
0603 Close to VRAM
Close to VRAM
Capacitor Type Footprint Population Location
Combined Memory FBVDD/Q Decoupling DDR3×16 with Clamshell Layout
(DG-05587-001_v03_p.87_Table 23)
4
8
FB CMD mapping
Mode D-N13x
FB CMD mapping
Mode D-N13x
Close to VRAM(For VRAM7 & VRAM8)
1.0uF(X7R)
K0603 ×8
0.1uF(X7R)
K0402 ×4
12
C9107
SC1U6D3V3KX-2GP
OPS
C9107
SC1U6D3V3KX-2GP
OPS
12
C9104
SCD1U10V2KX-5GP
OPS
C9104
SCD1U10V2KX-5GP
OPS
12
R9102
243R2F-2-GP
OPS
R9102
243R2F-2-GP
OPS
12
R9104
1K33R2F-GP
OPS
R9104
1K33R2F-GP
OPS
12
C9111
SC1U6D3V3KX-2GP
OPS
C9111
SC1U6D3V3KX-2GP
OPS
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM7
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM7
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C9109
SC1U6D3V3KX-2GP
OPS
C9109
SC1U6D3V3KX-2GP
OPS
VDDQ
A1
DQU5 A2
DQU7 A3
DQU4 A7
VDDQ
A8
VSS A9
VSSQ B1
VDD
B2
VSS B3
DQSU# B7
DQU6 B8
VSSQ B9
VDDQ
C1 DQU3 C2
DQU1 C3
DQSU C7
DQU2 C8
VDDQ
C9
VSSQ D1
VDDQ
D2
DMU
D3
DQU0 D7
VSSQ D8
VDD
D9
VSS E1
VSSQ E2
DQL0 E3
DML
E7 VSSQ E8
VDDQ
E9
VDDQ
F1
DQL2 F2
DQSL F3
DQL1 F7
DQL3 F8
VSSQ F9
VSSQ G1
DQL6 G2
DQSL# G3
VDD
G7
VSS G8
VSSQ G9
VREFDQ
H1
VDDQ
H2
DQL4 H3
DQL7 H7
DQL5 H8
VDDQ
H9
NC#J1 J1
VSS J2
RAS#
J3
CK
J7
VSS J8
NC#J9 J9
ODT K1
VDD
K2
CAS#
K3
CK#
K7
VDD
K8
CKE
K9
NC#L1 L1
CS# L2
WE#
L3
A10/AP
L7
ZQ
L8
NC#L9 L9
VSS M1
BA0
M2
BA2
M3
A15
M7
VREFCA
M8
VSS M9
VDD
N1
A3
N2
A0
N3
A12/BC#
N7
BA1
N8
VDD
N9
VSS P1
A5
P2
A2
P3 A1
P7
A4
P8
VSS P9
VDD
R1
A7
R2
A9
R3
A11
R7
A6
R8
VDD
R9
VSS T1
RESET# T2
A13
T3
NC#T7 T7
A8
T8
VSS T9
VRAM8
H5TQ1G63BFR-12C-GP
BOM CTRL
VRAM8
H5TQ1G63BFR-12C-GP
BOM CTRL
12
C9110
SC1U6D3V3KX-2GP
OPS
C9110
SC1U6D3V3KX-2GP
OPS
12
C9101
SCD1U10V2KX-5GP
OPS
C9101
SCD1U10V2KX-5GP
OPS
12
C9108
SC1U6D3V3KX-2GP
OPS
C9108
SC1U6D3V3KX-2GP
OPS
12
C9102
SCD1U10V2KX-5GP
OPS
C9102
SCD1U10V2KX-5GP
OPS
12
C9106
SC1U6D3V3KX-2GP
OPS
C9106
SC1U6D3V3KX-2GP
OPS
12
R9101
243R2F-2-GP
OPS
R9101
243R2F-2-GP
OPS
12
C9105
SC1U6D3V3KX-2GP
OPS
C9105
SC1U6D3V3KX-2GP
OPS
12
C9112
SC1U6D3V3KX-2GP
OPS
C9112
SC1U6D3V3KX-2GP
OPS
12
R9103
1K33R2F-GP
OPS
R9103
1K33R2F-GP
OPS
12
C9113
SCD01U50V2KX-1GP
OPS
C9113
SCD01U50V2KX-1GP
OPS
12
C9103
SCD1U10V2KX-5GP
OPS
C9103
SCD1U10V2KX-5GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VGA_CORE_LGATE1
PWR_VGA_CORE_LGATE2
VGA_CSP1_R
PWR_VGA_CORE_THRM
PWR_VGA_CORE_IMON
VGA_CSN2_R
PWR_VGA_CORE_PN2
VGA_CSP2_R
VGA_CSP2_R PW R_VGA_CORE_CSP2
PWR_VGA_CORE_SLEW
PWR_VGA_CORE_IMON
PWR_VGA_CORE_PCNT
VGA_CSN2_R
PWR_VGA_CORE_VBST2
PWR_VGA_CORE_OSRSEL
PWR_VGA_CORE_CSP1
PWR_VGA_CORE_CSN1
PWR_VGA_CORE_VID1
VGA_VREF_L
PWR_VGA_CORE_PN1
PWR_VGA_CORE_VREF
PWR_VGA_CORE_VR_ON
PWR_VGA_CORE_VID2
PWR_VGA_CORE_VID6
PWR_VGA_CORE_CSP1
PWR_VGA_CORE_VID3
PWR_VGA_CORE_VID5
PWR_VGA_CORE_VID4
PWR_VGA_CORE_VID0
PWR_VGA_CORE_VBST1
PWR_VGA_CORE_SLP
PWR_VGA_CORE_VREF
PWR_VGA_CORE_CSN2
PWR_VGA_CORE_CSP2
VGA_CSN1_R
PWR_VGA_CORE_THRM_R
PWR_VGA_CORE_LL1
PWR_VGA_CORE_VBST1
PWR_VGA_CORE_V5FILT
VGA_VBST1_R
VGA_VBST2_R
PWR_VGA_CORE_TRIPSEL
PWR_VGA_CORE_CSN1
PWR_VGA_CORE_DROOP
PWR_VGA_CORE_VREF
PWR_VGA_CORE_V5FILT
PWR_VGA_CORE_GFB
PWR_VGA_CORE_VFB
VGA_CSP1_R
PWR_VGA_CORE_CSN2
VGA_CSN1_R
PWR_VGA_CORE_VREFPWR_VGA_CORE_V5FILT
PWR_VGA_CORE_VBST2
PWR_VGA_CORE_UGATE1
PWR_VGA_CORE_UGATE2
DGPU_PWROK
PWR_VGA_CORE_LL2
PWR_VGA_CORE_THAL#
PWR_VGA_CORE_TER1
PWR_VGA_CORE_TER2
PWR_VGA_CORE_AGND
PWR_VGA_CORE_AGND
PWR_VGA_CORE_AGND
PWR_VGA_CORE_AGND
PWR_VGA_CORE_AGND
PWR_DCBATOUT_VGA_CORE
PWR_VGA_CORE_AGND
5V_S0
PWR_VGA_CORE_AGND
PWR_VGA_CORE_AGND
DCBATOUT PWR_DCBATOUT_VGA_CORE
PWR_DCBATOUT_VGA_CORE
VGA_CORE
VGA_CORE
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
NVGND_SENSE83
DGPU_PWROK 22,93
NVVDD_SENSE83
NV_VID586 NV_VID486
NV_VID186 NV_VID286 NV_VID386
NV_VID086
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51728_VGA_CORE
92 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51728_VGA_CORE
92 103Friday, January 06, 2012
<Doc>
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
TPS51728_VGA_CORE
92 103Friday, January 06, 2012
<Doc>
<Core Design>
SSID = PWR.Plane.Regulator_GFX
Q1: Id=11A, Qg=10~14nC,
Rdson=7.5~9.8 mohm
Q2: Id=23A, Qg=27~38nC,
Rdson=1.7~2.1 mohm
Panasonic. 0.36uH 10*11.5*4
DCR=1.1mohm
Idc=17A, Isat=24A
2nd source
PU9202
PU9206
Main source
84.03606.037
FDMS3606S-GP-U
84.03606.037
FDMS3606S-GP-U
BOM control
DY DY63.10334.1DL DY
63.10334.1DL
63.10334.1DL
N13P-GS
71.0N13P.00U
63.10334.1DL
63.10334.1DL
0.875V
VID[6:0]0110010
63.10334.1DL
DY
DY
0.9V
VID[6:0]=0110000 0.975V
VID[6:0]=0101010
63.10334.1DL
DY
63.10334.1DL
DY
DY
N13M-GS
71.0N13M.E0U
N13P-GL
71.0N13P.B0U
0.9V
VID[6:0]=0110000
DY
63.10334.1DL
DY
DY
63.10334.1DL
DY
63.10334.1DL
63.10334.1DL
N13M-GE1
71.0N13M.C0U
PR9215
PR9230
PR9217
PR9232
PR9218
PR9233
NVVDD
Boot Voltage
NV_VID1
NV_VID3
NV_VID4
1 2
PR9237 0R0402-PADPR9237 0R0402-PAD
1 2
PG9211
GAP-CLOSE-PWR-3-GP
PG9211
GAP-CLOSE-PWR-3-GP
12
PC9211
SC10U25V5KX-GP
OPS
PC9211
SC10U25V5KX-GP
OPS
1 2
PG9203
GAP-CLOSE-PWR-3-GP
PG9203
GAP-CLOSE-PWR-3-GP
12
PC9202
SCD01U50V2KX-1GP
OPS
PC9202
SCD01U50V2KX-1GP
OPS
12
PT9201
ST330U2VDM-4-GP
OPS
PT9201
ST330U2VDM-4-GP
OPS
12
PC9212
SC10U25V5KX-GP
OPS
PC9212
SC10U25V5KX-GP
OPS
1 2
PG9201
GAP-CLOSE-PWR-3-GP
PG9201
GAP-CLOSE-PWR-3-GP
1 2
PR9254
0R0402-PAD
PR9254
0R0402-PAD
1 2
PR9222 0R0402-PADPR9222 0R0402-PAD
12
PC9201
SCD012U25V2KX-GP
OPS
PC9201
SCD012U25V2KX-GP
OPS
12
PC9221
SC330P50V2KX-3GP
DY
PC9221
SC330P50V2KX-3GP
DY
12
PR9215
10KR2J-3-GP
OPS
PR9215
10KR2J-3-GP
OPS
12
PC9210
SCD01U50V2KX-1GP
OPS
PC9210
SCD01U50V2KX-1GP
OPS
12
PR9235
10KR2J-3-GP
OPS
PR9235
10KR2J-3-GP
OPS
1 2
PR9243 11K8R2F-GP
OPS
PR9243 11K8R2F-GP
OPS
1 2
PC9206
SCD1U50V3KX-GP
OPS
PC9206
SCD1U50V3KX-GP
OPS
12
PR9248
9K09R2F-GP
OPS
PR9248
9K09R2F-GP
OPS
12
PC9218
SCD012U25V2KX-GP
OPS
PC9218
SCD012U25V2KX-GP
OPS
12
PR9234
10KR2J-3-GP
DY
PR9234
10KR2J-3-GP
DY
1
2
3
4
5
6
7
8
910
PU9206
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
PU9206
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
1 2
PG9213
GAP-CLOSE-PWR-3-GP
PG9213
GAP-CLOSE-PWR-3-GP
12
PC9225
SCD1U50V3KX-GP
OPS
PC9225
SCD1U50V3KX-GP
OPS
1 2
PL9201
COIL-D36UH-5-GP
OPS
PL9201
COIL-D36UH-5-GP
OPS
12
PR9228
10KR2J-3-GP
PR9228
10KR2J-3-GP
12
PR9219
10KR2J-3-GP
OPS
PR9219
10KR2J-3-GP
OPS
12
PC9216
SC470P50V2KX-3GP
DY
PC9216
SC470P50V2KX-3GP
DY
12
PR9204
NTC-150K-GP
OPS
PR9204
NTC-150K-GP
OPS
12
PR9229
10KR2J-3-GP
OPS
PR9229
10KR2J-3-GP
OPS
12
PR9232
10KR2J-3-GP
OPS-BOM CTRL
PR9232
10KR2J-3-GP
OPS-BOM CTRL
1 2
PR9247
42K2R2F-L-GP
OPS
PR9247
42K2R2F-L-GP
OPS
1 2
PR9236 0R0402-PADPR9236 0R0402-PAD
12
PC9224
SC330P50V2KX-3GP
DY
PC9224
SC330P50V2KX-3GP
DY
1 2
PR9242
2D2R3J-2-GP
DY
PR9242
2D2R3J-2-GP
DY
12
PC9219
SC220P50V2KX-3GP
OPS
PC9219
SC220P50V2KX-3GP
OPS
1 2
PR9226 0R0402-PADPR9226 0R0402-PAD
1 2
PR9212
2D2R3J-2-GP
DY
PR9212
2D2R3J-2-GP
DY
1 2
PR9250
30K9R2F-GP
OPS
PR9250
30K9R2F-GP
OPS
12
PR9240
NTC-150K-GP
OPS
PR9240
NTC-150K-GP
OPS
1 2
PG9205
GAP-CLOSE-PWR-3-GP
PG9205
GAP-CLOSE-PWR-3-GP
PU 1
GND 2
GFB
7
VFB
8
THRM 9
THAL# 10
IMON 11
SLP
12
PCNT
13
VID6
14 VID5
15 VID4
16 VID3
17 VID2
18 VID1
19 VID0
20
VBST2
29
LL2 28
V5IN
26
PGND 25
LL1 23
VBST1
22
VREF
40
V5FILT
38
SLEW
37
TONSEL 36
EN
35
PG# 34
PGD 33
OSRSEL 32
TRIPSEL 31
GND 41
DROOP 39
DRVH1 21
DRVH2 30
DRVL1 24
DRVL2 27
CSP1
6
CSN1
5
CSP2
3
CSN2
4
PU9201
TPS51728RHAR-GP
OPS
PU9201
TPS51728RHAR-GP
OPS
12
PC9220
SC3300P50V2KX-1GP
OPS
PC9220
SC3300P50V2KX-1GP
OPS
1 2
PR9211
0R0402-PAD
PR9211
0R0402-PAD
1 2
PC9217 SC3300P50V2KX-1GP
OPS
PC9217 SC3300P50V2KX-1GP
OPS
1 2
PR9223 0R0402-PADPR9223 0R0402-PAD
1 2
PR9227 0R0402-PADPR9227 0R0402-PAD
12
PC9207
SC470P50V2KX-3GP
DY
PC9207
SC470P50V2KX-3GP
DY
12
PR9217
10KR2J-3-GP
OPS-BOM CTRL
PR9217
10KR2J-3-GP
OPS-BOM CTRL
1 2
PC9214 SCD22U10V2KX-1GP
OPS
PC9214 SCD22U10V2KX-1GP
OPS
1 2
PG9202
GAP-CLOSE-PWR-3-GP
PG9202
GAP-CLOSE-PWR-3-GP
12
PR9214
10KR2J-3-GP
DY
PR9214
10KR2J-3-GP
DY
12
PC9204
SC10U25V5KX-GP
OPS
PC9204
SC10U25V5KX-GP
OPS
1 2
PR9238
NTC-150K-GP
OPS
PR9238
NTC-150K-GP
OPS
1 2
PL9202
COIL-D36UH-5-GP
OPS
PL9202
COIL-D36UH-5-GP
OPS
1 2
PR9208
0R2J-2-GP
DY
PR9208
0R2J-2-GP
DY
1 2
PR9249
0R0402-PAD
PR9249
0R0402-PAD
1 2
PR9244
2KR2F-3-GP
OPS
PR9244
2KR2F-3-GP
OPS
1 2
PR9201
30K9R2F-GP
OPS
PR9201
30K9R2F-GP
OPS
12
PT9202
ST330U2VDM-4-GP
OPS
PT9202
ST330U2VDM-4-GP
OPS
1 2
PR9221 0R0402-PADPR9221 0R0402-PAD
1 2
PR9203
76K8R2F-GP
OPS
PR9203
76K8R2F-GP
OPS
12
PR9246
76K8R2F-GP
OPS
PR9246
76K8R2F-GP
OPS
1 2
PR9256 10KR2J-3-GP
OPS
PR9256 10KR2J-3-GP
OPS
1 2
PR9225
2D2R2J-GP
OPS
PR9225
2D2R2J-GP
OPS
1 2
PG9204
GAP-CLOSE-PWR-3-GP
PG9204
GAP-CLOSE-PWR-3-GP
1 2
PR9239 0R0402-PADPR9239 0R0402-PAD
1 2
PR9258 0R0402-PADPR9258 0R0402-PAD
12
PR9213
56R2J-4-GP
OPS
PR9213
56R2J-4-GP
OPS
1
2
3
4
5
6
7
8
910
PU9202
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
PU9202
FDMS3600-02-RJK0215-COLAY-GP
84.03606.037
1 2
PR9252
0R2J-2-GP
DY
PR9252
0R2J-2-GP
DY
1 2
PR9251
0R2J-2-GP
DY
PR9251
0R2J-2-GP
DY
12
PR9218
10KR2J-3-GP
OPS-BOM CTRL
PR9218
10KR2J-3-GP
OPS-BOM CTRL
1 2
PR9241 0R0402-PADPR9241 0R0402-PAD
12
PR9233
10KR2J-3-GP
OPS-BOM CTRL
PR9233
10KR2J-3-GP
OPS-BOM CTRL
12
PR9216
10KR2J-3-GP
DY
PR9216
10KR2J-3-GP
DY
1 2
PR9209
2D2R2J-GP
OPS
PR9209
2D2R2J-GP
OPS
1 2
PR9257 0R0402-PADPR9257 0R0402-PAD
12
PR9220
10KR2J-3-GP
DY
PR9220
10KR2J-3-GP
DY
1 2
PR9207
0R0402-PAD
PR9207
0R0402-PAD
1 2
PC9209 SC2D2U10V3KX-1GP
OPS
PC9209 SC2D2U10V3KX-1GP
OPS
1 2
PG9206
GAP-CLOSE-PWR-3-GP
PG9206
GAP-CLOSE-PWR-3-GP
1 2
PR9210
0R2J-2-GP
DY
PR9210
0R2J-2-GP
DY
1 2
PC9215
SCD1U50V3KX-GP
OPS
PC9215
SCD1U50V3KX-GP
OPS
12
PR9253
124KR2F-GP
OPS
PR9253
124KR2F-GP
OPS
12
PR9230
10KR2J-3-GP
DY
PR9230
10KR2J-3-GP
DY
12
PR9202
42K2R2F-L-GP
OPS
PR9202
42K2R2F-L-GP
OPS
12
PR9231
10KR2J-3-GP
OPS
PR9231
10KR2J-3-GP
OPS
1 2
PR9224 0R0402-PADPR9224 0R0402-PAD
12
PC9223
SC330P50V2KX-3GP
DY
PC9223
SC330P50V2KX-3GP
DY
12
PC9203
SC10U25V5KX-GP
OPS
PC9203
SC10U25V5KX-GP
OPS
12
PC9222
SC330P50V2KX-3GP
DY
PC9222
SC330P50V2KX-3GP
DY
1 2
PC9208 SC2D2U10V3KX-1GP
OPS
PC9208 SC2D2U10V3KX-1GP
OPS
12
PR9255
0R0402-PAD
PR9255
0R0402-PAD
12
PT9203
ST330U2VDM-4-GP
OPS
PT9203
ST330U2VDM-4-GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3.3V_RUN_VGA_1
DGPU_PWR_EN
3.3V_ALW_1 RUNON_R_1
RUNON_R
DIS_EN_1D5_RUN_R
DGPU_PWROK_R
DGPU_PWROK#DGPU_PWROK#
DIS_FBVDD_L
DIS_1D05V_NV_L
DIS_EN_1D5_RUN
RUNON_R_2RUNON_R
DCBATOUT_RUN
DGPU_PWROK# DGPU_PWROK_R
RUN_ENABLE_1
3D3V_S0
3D3V_VGA_S0
1D5V_S3 1D5V_VGA_S0
3D3V_S0
1D05V_VTT 1D05V_VGA_S0
1D5V_VGA_S0
1D05V_VGA_S0
DCBATOUT
RUN_ENABLE
3D3V_VGA_S0
3D3V_S0
DGPU_PWR_EN#18
DGPU_PWROK22,92
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
DISCRETE VGA POWER
A3
93 103Friday, January 06, 2012
LA480
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
DISCRETE VGA POWER
A3
93 103Friday, January 06, 2012
LA480
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SD
DISCRETE VGA POWER
A3
93 103Friday, January 06, 2012
LA480
<Core Design>
+3VS to 3.3V_DELAY Transfer
AO4468, SO-8
Id=11.6A, Qg=9~12nC
Rdson=17.4~22m ohm
1D5V_VGA_S0
3.6A
check layout
1.05V to 1.05V_VGA_S0 Transfer
12
R9307
5K1R2F-2-GP
OPS
R9307
5K1R2F-2-GP
OPS
12
TC9301
SE330U2D5VDM-1GP
OPS
TC9301
SE330U2D5VDM-1GP
OPS
1 2
R9317
10KR2J-3-GP
OPS
R9317
10KR2J-3-GP
OPS
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
U9301
AO4494L-GP
84.04494.037
OPS
2nd = 84.04168.037
S
S
S
GD
D
D
D
U9301
AO4494L-GP
84.04494.037
OPS
2nd = 84.04168.037
1 2
R9301 0R5J-5-GP
DY
R9301 0R5J-5-GP
DY
1 2
R9315
0R2J-2-GP
OPS
R9315
0R2J-2-GP
OPS
12
R9312
75R2F-2-GP
OPS
R9312
75R2F-2-GP
OPS
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
U9302
AO4468-GP
84.04468.037
2nd = 84.08882.037
OPS
S
S
S
GD
D
D
D
U9302
AO4468-GP
84.04468.037
2nd = 84.08882.037
OPS
12
C9308
SCD1U16V2KX-3GP
OPS
C9308
SCD1U16V2KX-3GP
OPS
1 2
PR9315
10KR2J-3-GP
DY
PR9315
10KR2J-3-GP
DY
G
S D
Q9303
NDS0610-NL-GP
2ND = 84.00610.C31
84.S0610.B31
OPS
Q9303
NDS0610-NL-GP
2ND = 84.00610.C31
84.S0610.B31
OPS
12
R9304
100R2J-2-GP
OPS
R9304
100R2J-2-GP
OPS
12
C9309
SCD1U16V2KX-3GP
DY
C9309
SCD1U16V2KX-3GP
DY
12
R9302
100KR2J-1-GP
OPS
R9302
100KR2J-1-GP
OPS
12
R9306
100KR2J-1-GP
OPS
R9306
100KR2J-1-GP
OPS
1 2
R9308
30KR2F-GP
OPS
R9308
30KR2F-GP
OPS
1 2
R9310
0R2J-2-GP
OPS
R9310
0R2J-2-GP
OPS
12
C9304
SCD1U10V2KX-4GP
DY
C9304
SCD1U10V2KX-4GP
DY
1
2
3 4
5
6
Q9308
2N7002KDW-GP
OPS
Q9308
2N7002KDW-GP
OPS
G
S
D
Q9305
2N7002K-2-GP
2ND = 84.2N702.J31
OPS
84.2N702.J31
Q9305
2N7002K-2-GP
2ND = 84.2N702.J31
OPS
84.2N702.J31
1 2
R9314
30KR2F-GP
OPS
R9314
30KR2F-GP
OPS
1 2
R9313
0R2J-2-GP
DY
R9313
0R2J-2-GP
DY
1 2
R9305
330KR2J-L1-GP
OPS
R9305
330KR2J-L1-GP
OPS
A K
D9301
MMPZ5239BPT-GP
83.9R103.D3F
OPS
D9301
MMPZ5239BPT-GP
83.9R103.D3F
OPS
D
G
S
Q9302
AO3419L-GP
84.03419.031
3rd = 84.03334.031
2nd = 84.00048.031
OPS
Q9302
AO3419L-GP
84.03419.031
3rd = 84.03334.031
2nd = 84.00048.031
OPS
1 2
R9316
0R2J-2-GP
DY
R9316
0R2J-2-GP
DY
12
R9311
75R2F-2-GP
OPS
R9311
75R2F-2-GP
OPS
12
C9302
SCD1U16V2KX-3GP
OPS
C9302
SCD1U16V2KX-3GP
OPS
1
2
3 4
5
6
Q9301
2N7002KDW-GP
2nd = 84.2N702.A3F
OPS
84.2N702.A3F
Q9301
2N7002KDW-GP
2nd = 84.2N702.A3F
OPS
84.2N702.A3F
G
S
D
Q9304
2N7002K-2-GP
2ND = 84.2N702.J31
OPS
84.2N702.J31
Q9304
2N7002K-2-GP
2ND = 84.2N702.J31
OPS
84.2N702.J31
12
C9310
SCD1U50V3KX-GP
OPS
C9310
SCD1U50V3KX-GP
OPS
12
R9318
10KR2J-3-GP
OPS
R9318
10KR2J-3-GP
OPS
1 2
R9303
5K1R2F-2-GP
OPS
R9303
5K1R2F-2-GP
OPS
12
C9301
SC10U6D3V3MX-GP
OPS
C9301
SC10U6D3V3MX-GP
OPS
1
2
34
5
6
Q9309
2N7002KDW-GP
OPS
Q9309
2N7002KDW-GP
OPS
12
C9303
SCD1U50V3KX-GP
OPS
C9303
SCD1U50V3KX-GP
OPS
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
94 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
94 103Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
LA480 SD
<Title>
Wistron Corporation
21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C
A4
94 103Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
95 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
95 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Reserved
A4
95 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
TOUCH PANEL
A4
96 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
TOUCH PANEL
A4
96 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
TOUCH PANEL
A4
96 103
Friday, January 06, 2012
<Core Design>
BLANK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PS_S3CNTRL
CORE_RUNPWR
PS_S3CNTRL
GFX_RUNPWR
PS_S3CNTRL
1D8V_RUNPWR
PS_S3CNTRL
VTT_RUNPWR
PS_S3CNTRL
3D3V_RUNPWR
PS_S3CNTRL
5V_RUNPWR
PS_S3CNTRL
1D05V_RUNPWR
1D5V_RUNPWR
PM_SLP_S4
AD+
VCC_CORE
1D05V_VTT
1D8V_S0
VCC_GFXCORE
3D3V_S0 5V_S0
VCCSA 1D5V_S3
3D3V_S5
3D3V_AUX_KBC ODD_PWR_5V 5V_S53D3V_AUX_S5 3D3V_VGA_S0 VCC_CORE3D3V_S0_CAMERADCBATOUT
5V_USB2_S3 5V_USB1_S3
DCBATOUT VCCSA
PM_SLP_S4#19,27,46
PS_S3CNTRL36,37
XDP_DBRESET# 5,19
H_CPUPWRGD 5,22
PLT_RST# 5,18,27,31,36,65,66,71,80,82,83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
UNUSED PARTS/EMI Capacitors
A3
97 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
UNUSED PARTS/EMI Capacitors
A3
97 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
UNUSED PARTS/EMI Capacitors
A3
97 103
Friday, January 06, 2012
<Core Design>
CPU Plate VGA Std-Off
14" Structure boss
For Discharge
MINI PCIE
12
R9709
100R2J-2-GP
DY
R9709
100R2J-2-GP
DY
12
EC9725
SCD1U25V2KX-GP
EC9725
SCD1U25V2KX-GP
12
EC9717
SCD1U25V2KX-GP
DY
EC9717
SCD1U25V2KX-GP
DY
12
EC9711
SCD1U25V2KX-GP
EC9711
SCD1U25V2KX-GP
1
H16
HOLET157B276R134-GP
ZZ.SCREW.091
H16
HOLET157B276R134-GP
ZZ.SCREW.091
12
EC9712
SCD1U25V2KX-GP
DY
EC9712
SCD1U25V2KX-GP
DY
1
H21
STF237R128H42-1-GP
34.4GD01.001
H21
STF237R128H42-1-GP
34.4GD01.001
G
S D
Q9710
2N7002A-7-GP
DY
Q9710
2N7002A-7-GP
DY
12
EC9733
SCD1U25V2KX-GP
DY
EC9733
SCD1U25V2KX-GP
DY
12
R9710
100KR2J-1-GP
DY
R9710
100KR2J-1-GP
DY
12
EC9715
SCD1U25V2KX-GP
DY
EC9715
SCD1U25V2KX-GP
DY
12
R9711
100R2J-2-GP
DY
R9711
100R2J-2-GP
DY
12
EC9721
SCD1U25V2KX-GP
DY
EC9721
SCD1U25V2KX-GP
DY
1
H14
HOLET157B276R134-GP
ZZ.SCREW.091
H14
HOLET157B276R134-GP
ZZ.SCREW.091
12
EC9732
SCD1U25V2KX-GP
DY
EC9732
SCD1U25V2KX-GP
DY
12
EC9713
SCD1U25V2KX-GP
EC9713
SCD1U25V2KX-GP
12
EC9705
SCD1U25V2KX-GP
EC9705
SCD1U25V2KX-GP
1
H7
HOLE355X355R111-S1-GP
ZZ.00PAD.571
H7
HOLE355X355R111-S1-GP
ZZ.00PAD.571
12
R9702
100R2J-2-GP
DY
R9702
100R2J-2-GP
DY
12
EC9720
SCD1U25V2KX-GP
DY
EC9720
SCD1U25V2KX-GP
DY
12
EC9708
SCD1U25V2KX-GP
DY
EC9708
SCD1U25V2KX-GP
DY
G
S D
Q9707
2N7002A-7-GP
DY
Q9707
2N7002A-7-GP
DY
12
R9706
100R2J-2-GP
DY
R9706
100R2J-2-GP
DY
12
EC9707
SCD1U25V2KX-GP
EC9707
SCD1U25V2KX-GP
12
EC9706
SCD1U25V2KX-GP
DY
EC9706
SCD1U25V2KX-GP
DY
G
S D
Q9705
2N7002A-7-GP
DY
Q9705
2N7002A-7-GP
DY
12
EC9722
SCD1U25V2KX-GP
DY
EC9722
SCD1U25V2KX-GP
DY
12
EC9729
SCD1U25V2KX-GP
EC9729
SCD1U25V2KX-GP
G
S D
Q9706
2N7002A-7-GP
DY
Q9706
2N7002A-7-GP
DY
12
EC9703
SCD1U25V2KX-GP
EC9703
SCD1U25V2KX-GP
12
EC9723
SCD1U25V2KX-GP
DY
EC9723
SCD1U25V2KX-GP
DY
12
EC9730
SC1KP50V2KX-1GP
EC9730
SC1KP50V2KX-1GP
1
H18
STF256R89H178-GP
34.4B417.001
H18
STF256R89H178-GP
34.4B417.001
G
S D
Q9704
2N7002A-7-GP
DY
Q9704
2N7002A-7-GP
DY
12
EC9704
SCD1U25V2KX-GP
DY
EC9704
SCD1U25V2KX-GP
DY
12
EC9731
SCD1U25V2KX-GP
DY
EC9731
SCD1U25V2KX-GP
DY
1
H8
HOLE335R115-GP
ZZ.00PAD.D01
H8
HOLE335R115-GP
ZZ.00PAD.D01
1
H15
HOLET157B276R134-GP
ZZ.SCREW.091
H15
HOLET157B276R134-GP
ZZ.SCREW.091
12
EC9709
SCD1U25V2KX-GP
DY
EC9709
SCD1U25V2KX-GP
DY
12
R9704
100R2J-2-GP
DY
R9704
100R2J-2-GP
DY
1
H5
HOLE315X315R91-S1-GP
ZZ.00PAD.581
H5
HOLE315X315R91-S1-GP
ZZ.00PAD.581
G
S D
Q9709
2N7002A-7-GP
DY
Q9709
2N7002A-7-GP
DY
1
H12
HOLE335R115-GP
ZZ.00PAD.D01
H12
HOLE335R115-GP
ZZ.00PAD.D01
12
EC9719
SCD1U25V2KX-GP
DY
EC9719
SCD1U25V2KX-GP
DY
1
H19
HOLE315R95-GP
ZZ.00PAD.911
H19
HOLE315R95-GP
ZZ.00PAD.911
1
H13
HOLE237R95-GP
ZZ.00PAD.921
H13
HOLE237R95-GP
ZZ.00PAD.921
12
EC9714
SCD1U25V2KX-GP
DY
EC9714
SCD1U25V2KX-GP
DY
12
EC9728
SCD1U25V2KX-GP
EC9728
SCD1U25V2KX-GP
1
H2
STF237R128H42-1-GP
34.4GD01.001
H2
STF237R128H42-1-GP
34.4GD01.001
12
R9707
100R2J-2-GP
DY
R9707
100R2J-2-GP
DY
12
EC9718
SCD1U25V2KX-GP
DY
EC9718
SCD1U25V2KX-GP
DY
1
H1
STF237R128H42-1-GP
34.4GD01.001
H1
STF237R128H42-1-GP
34.4GD01.001
12
EC9724
SCD1U25V2KX-GP
DY
EC9724
SCD1U25V2KX-GP
DY
G
S D
Q9711
2N7002A-7-GP
DY
Q9711
2N7002A-7-GP
DY
1
H11
HOLE237R95-GP
ZZ.00PAD.921
H11
HOLE237R95-GP
ZZ.00PAD.921
12
EC9727
SCD1U25V2KX-GP
EC9727
SCD1U25V2KX-GP
12
EC9702
SCD1U25V2KX-GP
EC9702
SCD1U25V2KX-GP
1
H4
HOLE256R115-GP
ZZ.00PAD.D11
H4
HOLE256R115-GP
ZZ.00PAD.D11
1
H10
HOLE237R95-GP
ZZ.00PAD.921
H10
HOLE237R95-GP
ZZ.00PAD.921
12
EC9726
SCD1U25V2KX-GP
EC9726
SCD1U25V2KX-GP
1
H3
HOLE256R115-GP
ZZ.00PAD.D11
H3
HOLE256R115-GP
ZZ.00PAD.D11
12
R9705
100R2J-2-GP
DY
R9705
100R2J-2-GP
DY
G
S D
Q9701
2N7002A-7-GP
DY
Q9701
2N7002A-7-GP
DY
12
EC9716
SCD1U25V2KX-GP
DY
EC9716
SCD1U25V2KX-GP
DY
12
EC9710
SCD1U25V2KX-GP
EC9710
SCD1U25V2KX-GP
G
S D
Q9702
2N7002A-7-GP
DY
Q9702
2N7002A-7-GP
DY
1
H17
HOLET157B276R134-GP
ZZ.SCREW.091
H17
HOLET157B276R134-GP
ZZ.SCREW.091
12
R9701
100R2J-2-GP
DY
R9701
100R2J-2-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A4
98 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A4
98 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A4
98 103
Friday, January 06, 2012
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A2
99 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A2
99 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A2
99 103
Friday, January 06, 2012
<Core Design>
SLP_A#SLP_A#
Wake Event
SLP_S5#
(TEST POINT)
PM_SLP_S5#SLP_S5#
PM_SLP_S4#SLP_S4#
Vcc_WLAN +3V_MINI_WLAN
PWROK/APWROK S0_PWR_GOOD
SLP_LAN#
CL_ RST# CL_ RST#
Minimum duration of PWRBTN# assertion = 16mS
SLP_A#
S0
1D5V_S0VDDQ
PM_DRAM_PWRGD
VccCore
IMVP7_PWRGD
VCC_GFXCOREVccAXG
3D3V_AUX_S5
S5
(S5-to-S0-to-S5)
Intel-Power Sequence
PM_PWRBTN#
S5
PM_PWRBTN#PWRBTN#
Intel PCH
Pin Name Main board PCH
Pin Name
3D3V_AUX_S5VccSUS
(5V/3V )
SLP_LAN# SLP_LAN#
SLP_S4#
SLP_S3#
T09 >30us ( SLP_S5# t0 SLP_S4# )
T10 >30us ( SLP_S4# t0 SLP_S3# )
VccASW/
VccSPI
VccASW/
VccSPI
PM_SLP_S3#SLP_S3#
IMVP_PWRGD
T29 >0s ( VccSUS to VccASW )
VccASW/
VccSPI
+3V_MINI_WLAN
S0_PWR_GOOD T11 >1ms ( VccASW to APWROK )
CL_ RST#(TEST POINT) T12 >500Us ( APWROK to CL_RST# )
1D8V_S0
VCCPLL 1D8V_S0
1D5V_S0
VCCSA
T13 >5ms<650ms ( VCCPLL to UNCOREPWRGOOD )
T17 >2ms<650ms ( VDDQ to DRAMPWROK )
T17 >2ms<650ms ( VCCSA to DRAMPWROK )
SYS_PWROK
IMVP_PWRGD
VCC_CORE
D85V_PWRGD
S0_PWR_GOOD
VCCSA VCCSA
D85V_PWRGDIMVP7_VR_EN
VCC_CORE
VCC_GFXCORE
SYS_PWROK SYS_PWROK
PWROK S0_PWR_GOOD
PM_DRAM_PWRGDDRAMPWROK
VR_VDDQPWRGOOD VDDPWRGOOD
VDDPWRGOOD
H_CPUPWRGD
H_CPUPWRGDUNCOREPWRGOOD
PLT_RST#
PLT_RST#PLTRST#
T25 >1ms<100ms
( UNCOREPOWERGOOD to PLTRST# )
T12 >100ms ( APWROK to PLTRST# )
T17 >2ms<650ms ( VCCPLL to DRAMPWROK )
T20 >100ms ( PWROK to UNCOREPWRGOOD)
Tn >30us
(PLTRST# to UNCOREPOWERGOOD )
Ta >30us ( SLP_S4# t0 SLP_S5# )
Tb >30us ( SLP_S3# t0 SLP_S4# )
Tc >40ns
(APWROK# to VCCASW/VCCSPI)
Te >0s ( SLP_A# to APWROK )
Tf <500ms
(SLP_3# to VCCCORE/VCCAWG)
Tk >100ns (DRAMPWROK to SLP_S4# )
Wake Event
SLP_S5#
(TEST POINT)
SLP_LAN#
SLP_A#
S0
PM_DRAM_PWRGD
3D3V_AUX_S5
(S3-to-S0-to-S3)
PM_PWRBTN#
S3
SLP_S4#
SLP_S3#
VccASW/
VccSPI
+3V_MINI_WLAN
S0_PWR_GOOD
CL_ RST#(TEST POINT)
1D8V_S0
1D5V_S0
VCCSA
SYS_PWROK
IMVP_PWRGD
VCC_CORE
D85V_PWRGD
S0_PWR_GOOD
VCC_GFXCORE
VDDPWRGOOD
H_CPUPWRGD
PLT_RST#
S3
T11 >1ms ( VccASW to APWROK )
T12 >500Us ( APWROK to CL_RST# )
T25 >1ms<100ms
( UNCOREPOWERGOOD to PLTRST# )
T20 >100ms ( PWROK to UNCOREPWRGOOD)
T12 >100ms ( APWROK to PLTRST# )
T13 >5ms<650ms ( VCCPLL to UNCOREPWRGOOD )
Tc >40ns
(APWROK# to VCCASW/VCCSPI)
Te >0s ( SLP_A# to APWROK )
Tf <500ms
(SLP_3# to VCCCORE/VCCAWG)
Tn >30us
(PLTRST# to UNCOREPOWERGOOD )
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Power Block Diagram
A3
100 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Power Block Diagram
A3
100 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Power Block Diagram
A3
100 103
Friday, January 06, 2012
<Core Design>
42,43,44 4
Charger
BQ24707ARGRR
Adapter
Battery
TPS51225RUKR
PU4201
TPS51640RSLR
VCC_CORE
PU4501
TPS51219
DCBATOUT
PU4601
RT8207MZQW
0D75V_S0DDR_VREF_S3
AO4407A
+PBATT
VCC_GFXCORE 1D5V_S31D05V_VTT
5V_S5 3D3V_S53D3V_AUX_S5 5V_AUX_S5
U3602
AO4468-GP
3D3V_S03D3V_AUX_KBC
R2707
5V_USB4_S3
U6102
UP7534BRA8
1D8V_VGA_S0
PU4701
RT8068AZQW
Q9302
DMP2130L
3D3V_VGA_S0
PU9201
TPS51728RHAR
VGA_CORE
G5285T11U
LCDVDD
93
0
2 2 3
39
473641
-4
U3601
AO4468-GP
5V_S0
49
-3
46
41
61
40
-2
-2 -1
6
38
45
36
1
HDMI
CRT
HDD
ODD
FAN
TouchPad Audio_Codec
R5607
withuot
F5101
R2802
R6903
R5606
R2903
R5603
R2913
R2904
56
Camera
LCD
Fingerprint
Bluetooth
Cardreader
WLAN
LAN
R4922
F4902
R6403
R6301
R6512
R8202
R6516
F4901
F4903
D85V_PWRGD RUNPWROK PM_SLP_S4# 0D75V_EN3D3V_VGA_S0
DGPU_PWROK
Q3103
AO3419L 3D3V_LAN_S5
LAN_PWR_ON
RUNPWROK
PM_SLP_S3#
U4901
SY6288CAAC
IMVP_PWRGD PWR_GFX_PWRGD 1.05VTT_PWRGD
5
U9302
AO4494L(MOS)
1D05V_VGA_S0
U9301
AO4494L(MOS)
1D5V_VGA_S0
93
PU4801
TPS51461RGER
0D85V_S0
1.05VTT_PWRGD
VCCSA
D85V_PWRGD
4892
R6010
60
3D3V_SPI
RUNPWROK
-1
-1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
SMBUS Block Diagram
A2
101 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
SMBUS Block Diagram
A2
101 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
SMBUS Block Diagram
A2
101 103
Friday, January 06, 2012
<Core Design>
SML0CLK
SML0DATA
SML0_CLK
SML0_DATA
BQ24707
SCL
SDA
CRT_DDC_DATA
CRT_DDC_CLK
LVDS_DDC_CLK_R
LVDS_DDC_DATA_R
SRN10KJ-5-GP
SRN4K7J-8-GP
TPDATA
TPCLK
5V_S0
‧
‧
‧
TouchPad Conn.
TPDATA
TPCLKGPIO37/PSCLK1
GPIO35/PSDAT1
GPU
LCD CONN
PCH SMBus Block Diagram
PCH
SMBCLK
SMBDATA
KBC
I2C_CLK
Thermal IC
SMCLK
SMDATA
3D3V_S0
‧
SRN2K2J-1-GP
3D3V_S5
‧
‧
‧
SRN2K2J-1-GP
3D3V_S0
2N7002KDW
‧
‧
‧
I2C_DAT
SML1_CLK
SML1_DATASML1DATA
SML1CLK
BAT_SCL
BAT_SDA
PCH_SMBCLK
PCH_SMBDATA
TPDATA
TPCLK
CRT_DDC_CLK
CRT_DDC_DATA
Minicard
WLAN
SMB_DATA
SMB_CLK
GPIO17/SCL1/N2TCK
GPIO22/SDA1/N2TMS
SMBus Address:A0
SMBus Address:A4
DIMM 1
SCL
SDA
3D3V_AUX_KBC
‧
DIMM 2
SCL
SDA
SMB_CLK
SMB_DATA
PCH_SMBCLK
PCH_SMBDATA
BATA_SCL_1
BATA_SDA_1
KBC SMBus Block Diagram
Battery Conn.
PCH_SMBDATA
PCH_SMBCLK
‧
‧
‧
3D3V_S0
SRN2K2J-1-GP
NPCE855
SRN33J-3-GP
L_DDC_DATA
L_DDC_CLK CLK
DATA
Minicard
W-WAN
SMB_DATA
SMB_CLK
PCH_SMBDATA
PCH_SMBCLK
3D3V_S5
‧
SRN2K2J-1-GP
‧
‧
GPIO74/SDA2
GPIO73/SCL2
2N7002KDW
‧
SMBC_THERM
SMBD_THERM
3D3V_S5
‧
SRN10K2J-1-GP
‧
‧
3D3V_S0
‧
‧
‧
‧
2N7002DW-1-GP
‧
‧
3D3V_S0
SRN2K2J-1-GP
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT CONN
5V_S0
‧
SRN10KJ-6-GP
3D3V_S0
2N7002DW-1-GP
‧
‧
3D3V_S0
SRN2K2J-1-GP
CRT_DDCCLK_CON
CRT_DDCDATA_CON
HDMI CONN
5V_S0
‧
SRN10KJ-6-GP
3D3V_S0
SDVO_CTRLCLK
SDVO_CTRLDATA PCH_HDMI_DATA
PCH_HDMI_CLK
‧
‧
‧
‧
‧
‧
SRN2K2J-8-GP
3D3V_S5
‧
CPU
PEG_RXP0~15
PEG_RXN0~15
PEG_TXP0~15
PEG_TXN0~15
PEG_RX0~15
PEG_RX#0~15
PEG_RT#0~15
PEG_TX0~15
PEG_RX0~15
PEG_RX#0~15
PEG_RT#0~15
PEG_TX0~15
I2CS_SDA
I2CS_SCL
2N7002DW-1-GP
3D3V_VGA_S0
SMBC_Therm_NV
SMBD_Therm_NV
SRN4K7J-8-GP
‧‧
‧
‧
‧
‧
SRN33J-5-GP
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Thermal/Audio Block Diagram
Custom
102 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Thermal/Audio Block Diagram
Custom
102 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Thermal/Audio Block Diagram
Custom
102 103
Friday, January 06, 2012
<Core Design>
OTZ 2N7002
THERM_SYS_SHDN#
SD
G
IMVP_PWRGD
PURE_HW_SHUTDOWN#
VR
3V/5V
EN
PGOD
OTZ
T8
PH
FAN CONTROL
PAGE28
VIN
VSET
FAN1_DAC
GPIO94
5V
VOUT
FAN
VIN
TACH
GPIO56
FAN_TACH1
P2793
Digital
MIC
Put under CPU(T8 HW shutdown)
P2800_DXP
P2800_DXN
DMIC_CLK/GPIO1
DMIC0/GPIO2
THRMDC
THRMDA
VGA
MMBT3904-3-GP
Place near CPU
PWM CORE
Audio Block Diagram
Codec
92HD79B1 HP
OUT
MIC
IN
SPEAKER
HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_OR_F
MMBT3904-3-GP
TDR
TDL
KBC
NPCE795P
GPIO5
GPIO92
SYS_THRM
CPU_THRM
GPIO4 TDR
VGA_THRM
PAGE28
PAGE28
PAGE27
Place near GPU(DISCRETE only).
HP1_PORT_B_L
HP1_PORT_B_R
Analog
MIC
PORTC_L
PORTC_R
VREFOUT_C
SPKR_PORT_D_L-
SPKR_PORT_D_R+
Thermal Block Diagram
UMA
Thermal
P2800
DXP
DXN
MMBT3904-3-GP
VGA
Thermal
P2800
DXP
DXN
P2800_VGA_DXP
P2800_VGA_DXN
SC2200P50V2KX-2GPSC2200P50V2KX-2GP
SC2200P50V2KX-2GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A4
103 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A4
103 103
Friday, January 06, 2012
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LA480
SD
Change History
A4
103 103
Friday, January 06, 2012
<Core Design>
(Blanking)
