Wistron Leopard2 Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Wistron Leopard2 - Schematics. Free.

Open the PDF directly: View PDF PDF.
Page Count: 48

A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Block Diagram
A3
147Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Block Diagram
A3
147Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Block Diagram
A3
147Monday, July 11, 2005
<Core Design>
Leopard2 Block Diagram
SVIDEO/COMP
RGB CRT
LVDS
CRT
TVOUT
LCD
VGA
ATI M26P
Host BUS
400/533MHz
Dothan
Mobile CPU
HY5DS573222F-28
DDR-SDRAM
ICH6-M
Alviso
CLK GEN
ICS954206
DMI I/F
100MHz
CARDBUS
1394
SD/MS/MMC/SM
PCI 7411
1394
Conn
PCMCIA
1 SLOT
SD/MS
6 in 1
Card Slost
Power
Switch
802.11a/b/g
Mini-PCI
10/100 RTL8100C
PCI BUS
30,31
34
21,22,23,24
6,7,8,9,10
4,5
27,28
31
3
13,14,15
16,17
19
PEG
TPS2220A
DDRII*2
11,12
OUTPUTS
1D2V_VGA_S0
3V_AUX
1D05V_S0
OUTPUTS
5V_S3
MAX8743
SYSTEM DC/DC
INPUTS
DCBATOUT
DCBATOUT
TPS5130
INPUTS
SYSTEM DC/DC
RJ45
CONN
31
MODEM
MDC Card
31
RJ11
CONN
AC97-LINK
OP AMP
LINE OUT
G1420B
MIC IN AC'97 CODEC
AD1981B
5V 100mA
OUTPUTS
OUTPUTS
BT+
0.844~1.3V
27A
18V 4.0A
VCC_CORE
INPUTS
DCBATOUT
MAXIM CHARGER
INPUTS
CPU DC/DC
MAX8725
MAX1907
DCBATOUT
29 28
29
42
40
45
41
LPC
Debug
Conn
KBC
Thermal
& Fan
Touch
Pad
PCI EXPRESS/ USB2.0
35 3837
G768D
4Mb
(512kB)
Int.
KB
EXPRESSCARD
25
LPC Bus
FlashRom
36
26
TPS2231
Power
Switch
NS97551
Comsumer
IR
37
38
26
HDD
P EIDE
USB 2.0
USB x 2
USB x 2
S EIDE
DVD/
CD-RW
26
35
DAUGHTER BOARD
DAUGHTER BOARD
26
Project code: 91.4C701.001
PCB P/N : 48.4C701.011
REVISION : 05202 -1
35
31
33
18
18
Docking
18
1D8V_S3
GNDL7:
Signal 5L8:
PCB LAYER
VCC
Signal 4
Signal 3
Signal 2
Signal 1
GND
L3:
L2:
L5:
L4:
L6:
L1:
BLUE THUMB
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ITP
A3
247Wednesday, July 06, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ITP
A3
247Wednesday, July 06, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ITP
A3
247Wednesday, July 06, 2005
<Core Design>
ICH6 internal 20K pull-ups
approximately 33 ohm
DD[15:0],
DDACK#,
ICH6 internal 20K pull-downs
IORDY,
LAN_RXD[2:0]
ICH6-M Integrated Pull-up
and Pull-down Resistors
ICH6 internal 10K pull-ups
DCS3#,
DCS1#,
DIOR#, DREQ,DIOW#,
ICH6-M EDS 14308 0.8V1
DA[2:0],
ACZ_BIT_CLK,
ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC,
ACZ_SDOUT,ACZ_BITCLK,
USB[7:0][P,N]
ICH6 internal 11.5K pull-downs
LAN_CLK
DD[7],
ICH6 internal 100K pull-downs
ICH6-M IDE Integrated Series
Termination Resistors
SDDREQ
ICH6 internal 15K pull-downs
DPRSLPVR,
DPRSLP#, EE_DIN,
EE_DOUT, EE_CS, GNT[5]#/GPO[17],
GNT[6]#/GPO[16],
LAD[3:0]#/FB[3:0]#, LDRQ[0],
LDRQ[1]/GPI[41],
PME#, PWRBTN#,
SPKR
TP[3]
IDEIRQ
5V_S0= 5 Voltage power up on system work(S0 state)
Power name description
5V_S3= 5 Voltage suspend to RAM(S3 state)
5V_S5= 5 Voltage soft off(S5 state)
3D3V_S0= 3.3 Voltage power up on system work(S0 state)
3D3V_S3= 3.3 Voltage suspend to RAM(S3 state)
3D3V_S5= 3.3 Voltage soft off(S5 state)
LVDDR_2D8V= 2.8 Voltage power up on system work(S0 state)
2D5V_S0= 2.5 Voltage power up on system work(S0 state)
1D8V_S3= 1.8 Voltage suspend to RAM(S3 state)
1D5V_S5= 1.5 Voltage soft off(S5 state)
VCC_CORE_S0= CPU VID Voltage power up on system work(S0 state)
1D5V_VCCA_S0= 1.5 Voltage power up on system work(S0 state)
1D5V_S0= 1.5 Voltage power up on system work(S0 state)
DDR_VREF= 0.9 Voltage power up on system work(S0 state)
1D05V_S0= 1.05 Voltage power up on system work(S0 state)
CORE_GMCH_S0= 1.05 Voltage power up on system work(S0 state) for ALVISO core power
VCCP_GMCH_S0= 1.05 Voltage power up on system work(S0 state)for ALVISO BUSIO power
PCI RESOURCE TABLE
REQ1#/GNT1#
PCI IRQ
P_INTE#
(CARBUS)P_INTG#
(1394)P_INTF#
(CARD READER)P_INTG#
P_INTE#
Cardbus Controller
TI7411
AD23
REQ# / GNT#
Blue Thumb
AD22
AD24
LAN
DEVICE IDSEL
REQ0#/GNT0#
REQ2#/GNT2#
AD21
Mini-PCI
1D2V_VGA_S0= 1.2 Voltage power up on system work(S0 state) for VGA
VRAM_VDDQ= 1.8 Voltage power up on system work(S0 state) for VRAM
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
3D3V_APWR_S0 3D3V_48MPWR_S0
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
DREFSSCLK
DREFSSCLK#
ITP_EN
CLK_PCIE_ICH
CLK_MCH_3GPLL#
CLK_PCIE_ICH#
CLK_MCH_3GPLL
CLK_XDP_CPU
CLK_XDP_CPU#
CLK_PCIE_NEW
CLK_PCIE_NEW#
3D3V_CLKGEN_S0
SS_SEL
FS_A
DREFCLK
DREFCLK#
REQSEL
SS_SEL
ITP_EN
CLK_PCI3
CLK_PCI4
CLK_PCI5
REQSEL
CLK_IREF
CLK_XOUT
CLK_XIN 3D3V_CLKGEN_S0
3D3V_48MPWR_S0
3D3V_APWR_S0
CLK_SRCC1
CLK_SRCT1
CLK_SRCC3
CLK_SRCT3
CLK_SRCT5
CLK_SRCC5
TP_SRCC6 CLK_SRCT6
TP_SRCT6 CLK_SRCC6
CLK_REF14
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPUC2
CLK_CPUT2
CLK_CPUT0
CLK_CPUC0
FS_A
CLK_CPUC1
CLK_CPUT1
CLK_SRCC0
CLK_SRCT0
DOT96C
DOT96T
CLK_SRCT2
CLK_SRCC2
CLK_PCIE_PEG
CLK_PCIE_PEG#
CLK_PWRGD#25,41
PM_STPPCI#22
PCLK_KBC36
CLK_ICHPCI22
PCLK_PCM 27
PCLK_LAN 30
PCLK_MINI 34
CLK_PCIE_NEW#26 CLK_PCIE_NEW26
CLK_MCH_3GPLL#7 CLK_MCH_3GPLL7
CLK_PCIE_ICH22CLK_PCIE_ICH#22
PREQ2#26 CLK_ICH1422
CLK_CODEC32
CPU_SEL04,7
SMBD_ICH11,24 SMBC_ICH11,24
PM_STPCPU# 22,41
CPU_SEL1 4,7
CLK_XDP_CPU 4
CLK_XDP_CPU# 4
CLK_CPU_BCLK# 4
CLK_CPU_BCLK 4
CLK48_CARDBUS 27
CLK48_USB 22
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
DREFSSCLK 7
DREFSSCLK# 7
DREFCLK 7
DREFCLK# 7
CLK_PCIE_PEG#13 CLK_PCIE_PEG13
3D3V_S0
3D3V_S03D3V_S0
3D3V_S0
3D3V_S0
3D3V_CLKGEN_S0
3D3V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator (ICS954206AG )
A3
347Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator (ICS954206AG )
A3
347Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator (ICS954206AG )
A3
347Monday, July 11, 2005
Leopard2
-1
<Core Design>
Mounting R200(up side),DummyR221(down side)
--CPU2_ITP on
DummyR200(up side),Mounting R221(down side)
--SRC7 on
0
0
1
200M
0
1 Reserved
0
1 100M
FS_B
0
133M
1
1
1
CPU
0
0
0
333M
FS_C
1
1
166M
0
1
1
0
0
0
1
FS_A
1
266M
400M
NEAR CLKGEN
SS3 SS2 SS1 SS0 Spread Amount%
000
00
0
0
0
0
1
11
0
1
-0.8
-1.0
-1.25
-1.5
-1.75
-2.0
-2.5
-3.0
00
0
0
1
1
1
11
11
+-1.0
+-1.25
+-1.5
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1 +-0.3
+-0.4
+-0.5
+-0.6
+-0.8
H/L: 100/96MHz
ICS954206AG Spread
Spectrum Select
close to CPU
SB SC
1 2
L38
MLB-201209-11
L38
MLB-201209-11
1 2
L17
MLB-201209-11
L17
MLB-201209-11
12
C218
SC4D7U10V5ZY
C218
SC4D7U10V5ZY
1 2
R196 4D7R3
R196 4D7R3
12
C199
SC4D7U10V5ZY
C199
SC4D7U10V5ZY
12
R201 33R2R201 33R2
12
C532
SCD1U16V
C532
SCD1U16V
1 2
R592 10R2R592 10R2
12
C523
SCD1U16V
C523
SCD1U16V
12
C538
SCD1U16V
C538
SCD1U16V
12
C543
SCD1U16V
C543
SCD1U16V
96MHZ_SSC/SRCCLKC0 18
96MHZ_SST/SRCCLKT0 17
CPU_STOP# 54
CPUCLKC0 43
CPUCLKC1 40
CPUCLKC2_ITP/SRCCLKC7 35
CPUCLKT0 44
CPUCLKT1 41
CPUCLKT2_ITP/SRCCLKT7 36
DOTC_96MHZ 15
DOTT_96MHZ 14
FSLA/USB_48MHZ 12
FSLB/TEST_MODE 16
GND
2GND
6GND
13 GND
29 GND
45 GND
51
GNDA
38
IREF
39
ITP_EN/PCICLK_F0
8PCI/SRC_STOP#
55
PCICLK2
56 PCICLK3
3PCICLK4
4PCICLK5
5
REF0
52
REF1/FSLC/TEST_SEL
53
SCLK
46
SDATA
47
SEL100_96MHZ#/PCICLK_F1
9
SRCCLKC1
20
SRCCLKC2
23
SRCCLKC3
25
SRCCLKC4_SATA
27
SRCCLKC5
30
SRCCLKC6
32
SRCCLKT1
19
SRCCLKT2
22
SRCCLKT3
24
SRCCLKT4_SATA
26
SRCCLKT5
31
SRCCLKT6
33
VDD48 11
VDDA 37
VDDCPU 42
VDDPCI 1
VDDPCI 7
VDDREF 48
VDDSRC 21
VDDSRC 28
VDDSRC 34
VTT_PWRGD#/PD 10
X1 50
X2 49
U72
ICS954206AG
U72
ICS954206AG
1 2
R586 49D9R2F
R586 49D9R2F
1 2
R593 33R2R593 33R2
1 2
R585 49D9R2F
R585 49D9R2F
1 2
R595 49D9R2F
R595 49D9R2F
12
R181
475R2F R181
475R2F
1 2
R596 49D9R2F
R596 49D9R2F
1 2
R195 49D9R2F
R195 49D9R2F
1 2
R194 49D9R2F
R194 49D9R2F
1 2
R567 49D9R2F
R567 49D9R2F
12
R199 33R2R199 33R2
1 2
R570 49D9R2F
R570 49D9R2F
1 2
R566 49D9R2F
R566 49D9R2F
1 2
R569 49D9R2F
R569 49D9R2F
12
R200
10KR2
R200
10KR2
12
R221
10KR2
DY
R221
10KR2
DY
1 2
R582 49D9R2F
R582 49D9R2F
1 2
C544 SC22PC544 SC22P
1 2
R580 49D9R2F
R580 49D9R2F
1 2
R603 49D9R2F
DY
R603 49D9R2F
DY
1 2
R594 49D9R2F
DY
R594 49D9R2F
DY
12
C518
SCD1U16V
DY
C518
SCD1U16V
DY
1 2
R589 22R2
R589 22R2
12
C219
SCD1U16V
DY
C219
SCD1U16V
DY
1
2 3
4
RN23
SRN33-2-U2
RN23
SRN33-2-U2
12
C525
SCD1U16V
DY
C525
SCD1U16V
DY
12
R222
2K2R2 R222
2K2R2
1
23
4
RN20
SRN33-2-U2
RN20
SRN33-2-U2
1
2 3
4
RN24
SRN33-2-U2
DY
RN24
SRN33-2-U2
DY
12
R605
DUMMY-R2
R605
DUMMY-R2
1 2
R197 10KR2
R197 10KR2
1 2
C545 SC22PC545 SC22P
1 2
R583 49D9R2F
R583 49D9R2F
1
2 3
4
RN25
SRN33-2-U2
RN25
SRN33-2-U2
1
23
4
RN18
SRN33-2-U2
RN18
SRN33-2-U2
TP31TPAD30 TP31TPAD30
12
C519
SC10U10V6ZY-U
C519
SC10U10V6ZY-U
12
R606
10KR2
R606
10KR2
1 2
R581 49D9R2F
R581 49D9R2F
12
R584 0R2-0
DY
R584 0R2-0
DY
1 2
R202 49D9R2F
R202 49D9R2F
1 2
R198 49D9R2F
R198 49D9R2F
TP33
TPAD30
TP33
TPAD30
12
R218
33R2 R218
33R2
1 2
R602 22R2
R602 22R2
12
R568 0R2-0
DY
R568 0R2-0
DY
12
C524
SCD1U16V
DY
C524
SCD1U16V
DY
12
R219
33R2 R219
33R2
TP32
TPAD30
TP32
TPAD30
1 2
R601 22R2
R601 22R2
1 2
R220 33R2
R220 33R2
TP30TPAD30 TP30TPAD30
12
R600
33R2 R600
33R2
1
2 3
4
RN22
SRN33-2-U2
RN22
SRN33-2-U2
12
R590
10KR2
R590
10KR2
1
23
4
RN21
SRN33-2-U2
RN21
SRN33-2-U2
12
R591
10KR2
DY
R591
10KR2
DY
1
23
4
RN19
SRN33-2-U2
RN19
SRN33-2-U2
1 2
X7
X-14D31818M-17
X7
X-14D31818M-17
12
C539
SCD1U16V
DY
C539
SCD1U16V
DY
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
XDP_TDI
XDP_TRST#
XDP_TDO
DBR#
H_RS#0
H_RS#1
H_RS#2
H_IERR#
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#41
H_D#40
H_D#42
H_D#43
H_D#48
H_D#49
H_D#51
H_D#50
H_D#52
H_D#53
H_D#54
H_D#55
H_D#57
H_D#56
H_D#58
H_D#59
H_D#60
H_D#61
H_D#63
H_D#62
H_D#44
H_D#45
H_D#46
H_D#47
COMP0
COMP1
COMP2
COMP3
TEST2
TEST1
CPU_SEL0_CPU
CPU_SEL1_CPU
GTLREF
CPU_PROCHOT#
XDP_TDI
XDP_TMS
XDP_TRST#
PSI#
XDP_BPM#5
CPU_PROCHOT#
XDP_TCK
XDP_TDO
H_CPURST#
XDP_TMS
XDP_TCK
H_A#[31..3]6
H_ADSTB#06
H_REQ#[4..0]6
H_ADSTB#16
H_FERR#21 H_A20M#21
H_IGNNE#21
H_STPCLK#21 H_INTR21 H_NMI21 H_SMI#21
H_ADS# 6
H_BNR# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_HIT# 6
H_HITM# 6
H_BPRI# 6
H_DEFER# 6
H_INIT# 21
H_TRDY# 6
CLK_XDP_CPU# 3
CLK_XDP_CPU 3
CLK_CPU_BCLK# 3
THERMDN 25
THERMDP1 25
PM_THRMTRIP-A# 7,21
H_RS#[2..0] 6
H_D#[63..0] 6
H_DINV#2 6
H_DSTBP#2 6
H_DSTBN#2 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
H_DPRSLP# 21
H_DPSLP# 21
H_DPWR# 6
H_CPUSLP# 6,21 H_PWRGD 21
H_DSTBN#16 H_DSTBP#16 H_DINV#16
H_DSTBN#06 H_DSTBP#06 H_DINV#06
PM_THRMTRIP-I# 7,21
CPU_SEL03,7 CPU_SEL13,7
H_CPURST# 6
H_LOCK# 6
CLK_CPU_BCLK 3
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
VCC_CORE_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
A3
447Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
A3
447Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
A3
447Monday, July 11, 2005
Leopard2
-1
<Core Design>
Place testpoint on
H_IERR# with a GND
0.1" away
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
trace length shorter than 0.5" .
Layout Note:
0.5" max length.
DATA GRP 2
DATA GRP 0DATA GRP 1
DATA GRP 3
MISC
HCLK THERM XTP/ITP SIGNALS CONTROL
ADDR GROUP 1
ADDR GROUP 0
All place within 2" to CPU
( No stub)
should connect to
PM_THRMTRIP#
without T-ing
ICH6 and Alviso
BSEL[1:0] Freq.(MHz)
L H 100
L L 133
TCK(PIN A13)
CPU
TCK(PIN 5)
FBO(PIN 11)
ITP Conn.
TP2TP2
12
R27
150R2
R27
150R2
1 2
R390 27D4R2F
R390 27D4R2F
1 2
R388 680R2
R388 680R2
12
R386 54D9R2F
R386 54D9R2F
12
R391 54D9R2F
R391 54D9R2F
1 2
R385 0R0402-PAD
R385 0R0402-PAD
12
R384 56R2J
R384 56R2J
A22#
AE4
A23#
AD2
A24#
AB4
A25#
AC6
A26#
AD5
A27#
AE2
A28#
AD6
A29#
AF3
A30#
AE1
A31#
AF1
REQ0#
R2
REQ1#
P3
REQ2#
T2
REQ3#
P1
REQ4#
T1
ADSTB#1
AE5
A20M#
C2
FERR#
D3
IGNNE#
A3
LINT0
D1
A3#
P4
A4#
U4
A5#
V3
A6#
R3
A7#
V2
A8#
W1
A9#
T4
A10#
W2
A11#
Y4
A12#
Y1
A13#
U1
A14#
AA3
A15#
Y3
A16#
AA2
ADSTB#0
U3
LINT1
D4
SMI#
B4
STPCLK#
C6
ADS# N2
BNR# L1
BPRI# J3
DEFER# L4
DRDY# H2
DBSY# M2
BR0# N4
IERR# A4
INIT# B5
LOCK# J2
RESET# B11
RS0# H1
RS1# K1
RS2# L2
TRDY# M3
HIT# K3
HITM# K4
BPM#0 C8
BPM#1 B8
BPM#2 A9
BPM#3 C9
PRDY# A10
PREQ# B10
TCK A13
TDI C12
TDO A12
TMS C11
TRST# B13
DBR# A7
PROCHOT# B17
THERMDA B18
THERMDC A18
THERMTRIP# C17
BCLK0 B15
BCLK1 B14
ITP_CLK0 A16
ITP_CLK1 A15
A17#
AF4
A18#
AC4
A19#
AC7
A20#
AC3
A21#
AD3
U53A
PZ47903
62.10055.011
U53A
PZ47903
62.10055.011
1 2
R383 0R0402-PAD
R383 0R0402-PAD
D24#
M23
D25#
J25
D26#
L26
D27#
N24
D28#
M25
D29#
H26
D30#
N25
D31#
K25
DSTBN0#
C23
DSTBN1#
K24
DSTBP0#
C22
DSTBP1#
L24
DINV0#
D25
DINV1#
J26
GTLREF0
AD26
RSVD5
E26 RSVD4
AC1
BSEL1
C14
RSVD2
C3
RSVD3
AF7
BSEL0
C16
PSI#
E1
D32# Y26
D0#
A19
D1#
A25
D2#
A22
D3#
B21
D4#
A24
D5#
B26
D6#
A21
D7#
B20
D8#
C20
D9#
B24
D10#
D24
D11#
E24
D12#
C26
D13#
B23
D14#
E23
D15#
C25
D16#
H23
D17#
G25
D18#
L23
D19#
M26
D20#
H24
D21#
F25
D22#
G24
D23#
J23
DPSLP# B7
DPWR# C19
DPRSTP# G1
PWRGOOD E4
SLP# A6
D33# AA24
D34# T25
D35# U23
D36# V23
D37# R24
D38# R26
D39# R23
D40# AA23
D41# U26
D42# V24
D43# U25
D44# V26
D45# Y23
D46# AA26
D47# Y25
D48# AB25
D49# AC23
D50# AB24
D51# AC20
D52# AC22
D53# AC25
D54# AD23
D55# AE22
D56# AF23
D57# AD24
D58# AF20
D59# AE21
D60# AD21
D61# AF25
D62# AF22
D63# AF26
DSTBN2# W25
DSTBP2# W24
DINV2# T24
DSTBN3# AE24
DSTBP3# AE25
DINV3# AD20
COMP0 P25
COMP1 P26
COMP2 AB2
COMP3 AB1
TEST1 C5
TEST2 F23
U53B
PZ47903
62.10055.011
U53B
PZ47903
62.10055.011
12
R29
1KR2
DY
R29
1KR2
DY
12
R396
56R2J
R396
56R2J
1 2
R389 39D2R2F
R389 39D2R2F
1 2
R402 27D4R2FR402 27D4R2F
12
R395
200R2J
R395
200R2J
1 2
R35 27D4R2FR35 27D4R2F
1 2
R403 54D9R2FR403 54D9R2F
12
R392
1KR2
DY
R392
1KR2
DY
1 2
R36 54D9R2FR36 54D9R2F
12
R393
56R2J
R393
56R2J
1 2
R34 1KR2F
R34 1KR2F
12
R33
2KR2F
R33
2KR2F
1 2
R387 150R2
R387 150R2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
TP_VCCA3
TP_VCCA2
TP_VCCA1
CPU_D10
TP_VCCSENSE
TP_VSSSENSE
1D5V_VCCA_SET
H_VID3 41
H_VID0 41
H_VID2 41
H_VID4 41
H_VID5 41
H_VID1 41
VCC_CORE_S0 VCC_CORE_S0
1D5V_VCCA_S0
3D3V_S0
1D5V_VCCA_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
1D5V_VCCA_S0 1D5V_S0
VCC_CORE_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
A3
547Sunday, July 03, 2005
Leopard2
SC
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
A3
547Sunday, July 03, 2005
Leopard2
SC
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
A3
547Sunday, July 03, 2005
Leopard2
SC
<Core Design>
Layout Note:
should be of equal length.
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
VCCSENSE and VSSSENSE lines
0.1u *10 150u *1
I max = 120 mA
12
C16
SCD1U10V2MX-1
C16
SCD1U10V2MX-1
12
C17
SCD01U16V2KX
C17
SCD01U16V2KX
12
C324
SC10U10V5ZY-L
DY
C324
SC10U10V5ZY-L
DY
12
C28
SCD1U10V2MX-1
C28
SCD1U10V2MX-1
12
C29
SCD1U10V2MX-1
C29
SCD1U10V2MX-1
12
C31
SCD1U10V2MX-1
C31
SCD1U10V2MX-1
12
C20
SCD1U10V2MX-1
C20
SCD1U10V2MX-1
12
C22
SCD1U10V2MX-1
C22
SCD1U10V2MX-1
TP3TP3
12
C32
SCD1U10V2MX-1
C32
SCD1U10V2MX-1
12
C18
SC10U6D3V5MX
C18
SC10U6D3V5MX
12
C326
SC10U10V5ZY-L
DY
C326
SC10U10V5ZY-L
DY
12
C19
SC10U6D3V5MX
C19
SC10U6D3V5MX
12
C23
SC10U6D3V5MX
C23
SC10U6D3V5MX
12
C24
SC10U6D3V5MX
C24
SC10U6D3V5MX
1 2
R394 0R2-0
R394 0R2-0
12
C33
SC10U6D3V5MX
C33
SC10U6D3V5MX
12
C30
SCD1U10V2MX-1
C30
SCD1U10V2MX-1
12
C35
SC10U6D3V5MX
C35
SC10U6D3V5MX
12
C42
SC10U6D3V5MX
C42
SC10U6D3V5MX
12
C36
SC10U6D3V5MX
C36
SC10U6D3V5MX
12
R39
54D9R2F
DY
R39
54D9R2F
DY
12
C39
SC10U6D3V5MX
C39
SC10U6D3V5MX
12
C41
SC10U6D3V5MX
C41
SC10U6D3V5MX
12
R40
54D9R2F
DY
R40
54D9R2F
DY
12
C25
SCD1U10V2MX-1
C25
SCD1U10V2MX-1
VCC0
AA11
VCC1
AA13
VCC2
AA15
VCC3
AA17
VCC4
AA19
VCC5
AA21
VCC6
AA5
VCC7
AA7
VCC8
AA9
VCC9
AB10
VCC10
AB12
VCC11
AB14
VCC12
AB16
VCC13
AB18
VCC14
AB20
VCC15
AB22
VCC16
AB6
VCC17
AB8
VCC18
AC11
VCC19
AC13
VCC20
AC15
VCC21
AC17
VCC22
AC19
VCC23
AC9
VCC24
AD10
VCC25
AD12
VCC26
AD14
VCC27
AD16
VCC28
AD18
VCC29
AD8
VCC30
AE11
VCC31
AE13
VCC32
AE15
VCC33
AE17
VCC34
AE19
VCC35
AE9
VCC36
AF10
VCC37
AF12
VCC38
AF14
VCC39
AF16
VCC40
AF18
VCC41
AF8
VCC42
D18
VCC43
D20
VCC44
D22
VCC45
D6
VCC46
D8
VCC47
E17
VCC48
E19
VCC49
E21
VCC50
E5
VCC51
E7
VCC52
E9
VCC53
F18
VCC54
F20
VCC55
F22
VCC56
F6
VCC57
F8
VCC58
G21
VCC59 G5
VCC60 H22
VCC61 H6
VCC62 J21
VCC63 J5
VCC64 K22
VCC65 U5
VCC66 V22
VCC67 V6
VCC68 W21
VCC69 W5
VCC70 Y22
VCC71 Y6
VCCA0 F26
VCCA1 B1
VCCA2 N1
VCCA3 AC26
VCCP0 D10
VCCP1 D12
VCCP2 D14
VCCP3 D16
VCCP4 E11
VCCP5 E13
VCCP6 E15
VCCP7 F10
VCCP8 F12
VCCP9 F14
VCCP10 F16
VCCP11 K6
VCCP12 L21
VCCP13 L5
VCCP14 M22
VCCP15 M6
VCCP16 N21
VCCP17 N5
VCCP18 P22
VCCP19 P6
VCCP20 R21
VCCP21 R5
VCCP22 T22
VCCP23 T6
VCCP24 U21
VCCQ0 P23
VCCQ1 W4
VID0 E2
VID1 F2
VID2 F3
VID3 G3
VID4 G4
VID5 H4
VCCSENSE AE7
VSSSENSE AF6
U53C
PZ47903
62.10055.011
U53C
PZ47903
62.10055.011
TP1TP1
12
C319
SC10U10V5ZY-L
DY
C319
SC10U10V5ZY-L
DY
12
BC85
SC1U10V3ZY
DY
BC85
SC1U10V3ZY
DY
12
C15
SC10U10V6ZY-U
C15
SC10U10V6ZY-U
12
C322
SC10U10V5ZY-L
DY
C322
SC10U10V5ZY-L
DY
12
BC2
SC1U10V3ZY
DY
BC2
SC1U10V3ZY
DY
1 2
R28 0R2-0
R28 0R2-0
12
C325
SC10U10V5ZY-L
DY
C325
SC10U10V5ZY-L
DY
12
R398
49K9R2F
DY
R398
49K9R2F
DY
12
TC1
ST100U6D3VM-U
TC1
ST100U6D3VM-U
12
R397
12K7R3F
DY
R397
12K7R3F
DY
SHDN#
1
GND
2
IN
3OUT 4
SET 5
U52
G913C-U
DY
U52
G913C-U
DY
12
C40
SC10U10V5ZY-L
DY
C40
SC10U10V5ZY-L
DY
12
BC84
SC22P
DY
BC84
SC22P
DY
12
C50
SC10U10V5ZY-L
DY
C50
SC10U10V5ZY-L
DY
12
C21
SCD1U10V2MX-1
C21
SCD1U10V2MX-1
12
C318
SC10U10V5ZY-L
DY
C318
SC10U10V5ZY-L
DY
TP20TP20
12
C321
SC10U10V5ZY-L
DY
C321
SC10U10V5ZY-L
DY
VSS1
A5
VSS2
A8
VSS3
A11
VSS4
A14
VSS5
A17
VSS6
A20
VSS7
A23
VSS8
A26
VSS9
AA1
VSS10
AA4
VSS11
AA6
VSS12
AA8
VSS13
AA10
VSS14
AA12
VSS15
AA14
VSS16
AA16
VSS17
AA18
VSS18
AA20
VSS19
AA22
VSS20
AA25
VSS21
AB3
VSS22
AB5
VSS23
AB7
VSS24
AB9
VSS25
AB11
VSS26
AB13
VSS27
AB15
VSS28
AB17
VSS29
AB19
VSS30
AB21
VSS31
AB23
VSS32
AB26
VSS33
AC2
VSS34
AC5
VSS35
AC8
VSS36
AC10
VSS37
AC12
VSS38
AC14
VSS39
AC16
VSS40
AC18
VSS41
AC21
VSS42
AC24
VSS43
AD1
VSS44
AD4
VSS45
AD7
VSS46
AD9
VSS47
AD11
VSS48
AD13
VSS49
AD15
VSS50
AD17
VSS51
AD19
VSS52
AD22
VSS53
AD25
VSS54
AE3
VSS55
AE6
VSS56
AE8
VSS57
AE10
VSS58
AE12
VSS59
AE14
VSS60
AE16
VSS61
AE18
VSS62
AE20
VSS63
AE23
VSS64
AE26
VSS65
AF2
VSS66
AF5
VSS67
AF9
VSS68
AF11
VSS69
AF13
VSS70
AF15
VSS71
AF17
VSS72
AF19
VSS73
AF21
VSS74
AF24
VSS75
B3
VSS76
B6
VSS77
B9
VSS78
B12
VSS79
B16
VSS80
B19
VSS81
B22
VSS82
B25
VSS83
C1
VSS84
C4
VSS85
C7
VSS86
C10
VSS87
C13
VSS88
C15
VSS89
C18
VSS90
C21
VSS91
C24
VSS92
D2
VSS0
A2
VSS94
D7 VSS93
D5
VSS95
D9
VSS96
D11
VSS97 D13
VSS187 W26
VSS186 W23
VSS188 Y2
VSS98 D15
VSS99 D17
VSS100 D19
VSS101 D21
VSS102 D23
VSS103 D26
VSS104 E3
VSS105 E6
VSS106 E8
VSS107 E10
VSS108 E12
VSS109 E14
VSS110 E16
VSS111 E18
VSS112 E20
VSS113 E22
VSS114 E25
VSS115 F1
VSS116 F4
VSS117 F5
VSS118 F7
VSS119 F9
VSS120 F11
VSS122 F15
VSS123 F17
VSS124 F19
VSS125 F21
VSS126 F24
VSS127 G2
VSS128 G6
VSS129 G22
VSS130 G23
VSS131 G26
VSS132 H3
VSS133 H5
VSS134 H21
VSS135 H25
VSS136 J1
VSS137 J4
VSS138 J6
VSS139 J22
VSS140 J24
VSS141 K2
VSS142 K5
VSS143 K21
VSS144 K23
VSS145 K26
VSS146 L3
VSS147 L6
VSS148 L22
VSS149 L25
VSS150 M1
VSS151 M4
VSS152 M5
VSS153 M21
VSS154 M24
VSS155 N3
VSS156 N6
VSS157 N22
VSS158 N23
VSS159 N26
VSS160 P2
VSS161 P5
VSS162 P21
VSS163 P24
VSS164 R1
VSS165 R4
VSS166 R6
VSS167 R22
VSS168 R25
VSS169 T3
VSS170 T5
VSS171 T21
VSS172 T23
VSS173 T26
VSS174 U2
VSS175 U6
VSS176 U22
VSS177 U24
VSS178 V1
VSS179 V4
VSS180 V5
VSS181 V21
VSS182 V25
VSS183 W3
VSS184 W6
VSS185 W22
VSS190 Y21
VSS189 Y5
VSS191 Y24
VSS121 F13
U53D PZ47903
62.10055.011
U53D PZ47903
62.10055.011
12
C323
SC10U10V5ZY-L
DY
C323
SC10U10V5ZY-L
DY
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_XRCOMP
H_XSCOMP
H_XSWING
H_YSCOMP
H_YSWING
H_YRCOMP
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_A#29
H_A#30
H_A#31
H_A#26
H_A#27
H_A#28
H_A#23
H_A#24
H_A#25
H_A#20
H_A#21
H_A#22
H_A#17
H_A#18
H_A#19
H_A#14
H_A#15
H_A#16
H_A#11
H_A#12
H_A#13
H_A#8
H_A#9
H_A#10
H_A#5
H_A#6
H_A#7
H_A#3
H_A#4
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_VREF
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#3
H_DSTBP#2
H_DSTBP#0
H_DSTBP#3
H_DSTBP#1
H_DSTBN#2
H_DSTBN#1
H_DSTBN#0
H_REQ#1
H_REQ#3
H_REQ#2
H_REQ#0
H_RS#1
H_RS#2
H_RS#0
H_REQ#4
H_YSWING
H_DPWR#
H_CPUSLP#_GMCH
H_D#[63..0]4 H_A#[31..3] 4
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BREQ#0 4
H_BPRI# 4
H_CPURST# 4
CLK_MCH_BCLK# 3
CLK_MCH_BCLK 3
H_DEFER# 4
H_DBSY# 4 H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_DPWR# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
H_CPUSLP# 4,21
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
CORE_GMCH_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (1 of 5)
A3
647Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (1 of 5)
A3
647Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (1 of 5)
A3
647Monday, July 11, 2005
Leopard2
-1
<Core Design>
VID
VR_ON
Vcc_core
Vccp
Vcc_mch
MCH_PWERGD
CLK_ENABLE#
VGATE TO ICH6
10~30uS
3~10mS
<10uS
>100uS
>3mS
Power On Sequencing
Vboot
Vboot Vvid
SDVOCRTL
_DATA
CFG17
CFG19
CFG20
CFG16
CFG18
FSB Dynamic ODT
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
(Default)
Reversed
GMCH core VCC
Select
CPU VTT Select
Reversed
SDVO Present
0 = 1.05V
1 = 1.5V
(Default)
1 = 1.2V
0 = 1.05V
(Default)
(Default)
1= SDVO device present
0 = No SDVO device present
NOTE: All strap signals are sampled with respect to the leading
edge of the Alviso GMCH PWORK In signal.
CFG[2:0]
Pin Name
001 = FSB533FSB Frequency Select
others = Reversed
Strap Description Configuration
Alviso Strapping Signals
and Configuration
page 183
101 = FSB400
REV.NO. 1.0
REF. NO. 15577
(Default)
0 = DMI x2
1 = DMI x4
CFG5 DMI x2 Select
CFG[4:3] Reserved
CFG6 Reserved 0 = DDR2
1 = DDR1
(Default)
CFG[15:14] Reversed
CFG7
(Default)
CFG9
CPU Strap
CFG8
0 = Reserved
01 = XOR mode enabled
1 = Dothan
10 = All Z mode enabled
1 = Normal
Reserved
(Default)
11 = Normal Operation
00 = Reserved
straps
0 = Reserve Lanes
XOR/ALL Z test
(Default)
PCI Express Graphics
Lane Reversal
Reserved
CFG[13:12]
CFG[11:10]
Trace 10 mil wide with 20 mil spacing
Trace 10 mil wide with 20 mil spacing
ALVISO-GM:71.0GMCH.08U
ALVISO-PM:71.0GMCH.0BU
ALVISO-GML:71.0GMCH.0JU
12
R117
100R2F
R117
100R2F
12
R457
100R2F
R457
100R2F
HD35#
R5
HD36#
P3
HD37#
T8
HD38#
R7
HD39#
R8
HD40#
U8
HD41#
R4
HD42#
T4
HD43#
T5
HD44#
R1
HD45#
T3
HD46#
V8
HD47#
U6
HD48#
W6
HD49#
U3
HD50#
V5
HD51#
W8
HD52#
W7
HD53#
U2
HD54#
U1
HD55#
Y5
HD56#
Y2
HD57#
V4
HD58#
Y7
HD59#
W1
HD60#
W3
HD61#
Y3
HD62#
Y6
HD63#
W2
HXRCOMP
C1
HXSCOMP
C2
HXSWING
D1
HYRCOMP
T1
HYSCOMP
L1
HYSWING
P1
HD0#
E4
HD1#
E1
HD2#
F4
HD3#
H7
HD4#
E2
HD5#
F1
HD6#
E3
HD7#
D3
HD8#
K7
HD9#
F2
HD10#
J7
HD11#
J8
HD12#
H6
HD13#
F3
HD14#
K8
HD15#
H5
HD16#
H1
HD17#
H2
HD18#
K5
HD19#
K6
HD20#
J4
HD21#
G3
HD22#
H3
HD23#
J1
HD24#
L5
HD25#
K4
HD26#
J5
HD27#
P7
HD28#
L7
HD29#
J3
HD30#
P5
HD31#
L3
HD32#
U7
HD33#
V6
HD34#
R6
HA3# G9
HA4# C9
HA5# E9
HA6# B7
HA7# A10
HA8# F9
HA9# D8
HA10# B10
HA11# E10
HA12# G10
HA13# D9
HA14# E11
HA15# F10
HA16# G11
HA17# G13
HA18# C10
HA19# C11
HA20# D11
HA21# C12
HA22# B13
HA23# A12
HA24# F12
HA25# G12
HA26# E12
HA27# C13
HA28# B11
HA29# D13
HA30# A13
HA31# F13
HADS# F8
HADSTB#0 B9
HADSTB#1 E13
HVREF J11
HBNR# A5
HBPRI# D5
HBREQ0# E7
HCPURST# H10
HCLKINN AB1
HCLKINP AB2
HDBSY# C6
HDEFER# E6
HDINV#0 H8
HDINV#1 K3
HDINV#2 T7
HDINV#3 U5
HDPWR# G6
HDRDY# F7
HDSTBN#0 G4
HDSTBN#1 K1
HDSTBN#2 R3
HDSTBN#3 V3
HDSTBP#0 G5
HDSTBP#1 K2
HDSTBP#2 R2
HDSTBP#3 W4
HEDRDY# F6
HHIT# D4
HHITM# D6
HLOCK# B3
HPCREQ# A11
HREQ#0 A7
HREQ#1 D7
HREQ#2 B8
HREQ#3 C7
HREQ#4 A8
HRS0# A4
HRS1# C5
HRS2# B4
HCPUSLP# G8
HTRDY# B5
HOST
U19A
ALVISO-GM
HOST
U19A
ALVISO-GM
12
R458
200R2F
R458
200R2F
12
R519
0R2-0
DY
R519
0R2-0
DY
1 2
R54 0R0402-PADR54 0R0402-PAD
12
R97
24D9R2F
R97
24D9R2F
1 2
R96
54D9R2F
R96
54D9R2F
12
C384
SCD1U10V2KX
C384
SCD1U10V2KX
1 2
C95
SCD1U16V
C95
SCD1U16V
12
R105
221R3F
R105
221R3F
12
R95
100R2F
R95
100R2F
12
R116
221R3F
R116
221R3F
1 2
R109
54D9R2F
R109
54D9R2F
12
R118
24D9R2F
R118
24D9R2F
1 2
C128
SCD1U16V
C128
SCD1U16V
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
SDVO_DAT
SDVO_CLK
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG20
CFG19
CFG1
CFG0
PM_EXTTS#1
RST1#
SMYSLEW
SMXSLEW
M_RCOMPP
M_RCOMPN
DMI_RXP3
DMI_RXP2
DMI_RXP1
DMI_RXP0
DMI_RXN3
DMI_RXN2
DMI_RXN1
DMI_RXN0
DMI_TXP3
DMI_TXP2
DMI_TXP1
DMI_TXP0
DMI_TXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0
M_OCDCOMP1
M_OCDCOMP0
PM_EXTTS#0
PM_EXTTS#1
M_RCOMPP
CFG4
CFG3 PEG_COMP
CFG0
CFG2
CFG4
CFG3
CFG5
CFG13
CFG9
CFG8
CFG14
CFG15
CFG12
CFG16
CFG7
CFG10
CFG6
CFG17
CFG11
PM_EXTTS#0
CFG1
M_RCOMPN
CFG2
CFG20
CFG19
CFG18
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
TXN0
TXN1
TXN2
TXN3
TXN4
TXN5 PEG_TXN4
TXN6
TXN7
TXN8
TXN9
TXN10
TXN11 PEG_TXN10
TXN12
TXN13
TXN14
TXN15 PEG_TXN14
TXP0
TXP1 PEG_TXP2
TXP3
TXP2
PEG_TXP4TXP4
TXP5 PEG_TXP6
TXP7
TXP6
PEG_TXP8TXP8
TXP9 PEG_TXP10
TXP11
TXP10
TXP12
TXP13
TXP14
TXP15
PEG_TXN2
PEG_TXN7
PEG_TXN0
PEG_TXN6
PEG_TXN13
PEG_TXN12
PEG_TXN1
PEG_TXN11
PEG_TXN8
PEG_TXN15
PEG_TXN3
PEG_TXN9
PEG_TXN5
PEG_TXP13
PEG_TXP14
PEG_TXP5
PEG_TXP12
PEG_TXP3
PEG_TXP7
PEG_TXP15
PEG_TXP0
PEG_TXP11
PEG_TXP9
PEG_TXP1
CLK_MCH_3GPLL#3 CLK_MCH_3GPLL3
PM_BMBUSY# 22
PLT_RST1# 13,24,26
DREFCLK# 3
DREFCLK 3
DMI_RXP[3..0]22
DMI_RXN[3..0]22
DMI_TXP[3..0]22
DMI_TXN[3..0]22
PM_THRMTRIP-A# 4,21
PWROK 25
CPU_SEL0 3,4
CPU_SEL1 3,4
DREFSSCLK# 3
DREFSSCLK 3
PEG_RXN[15..0] 13
PEG_RXP[15..0] 13
M_CS#011,12 M_CS#111,12 M_CS#211,12 M_CS#311,12
M_CKE011,12 M_CKE111,12 M_CKE211,12 M_CKE311,12
M_CLK_DDR#311 M_CLK_DDR#411
M_CLK_DDR311 M_CLK_DDR411
M_CLK_DDR111 M_CLK_DDR011
M_CLK_DDR#111 M_CLK_DDR#011
M_ODT011,12 M_ODT111,12 M_ODT211,12 M_ODT311,12
PEG_TXP[15..0]
13
PEG_TXN[15..0]
13
2D5V_S0
1D5V_S0
1D8V_S3
DDR_VREF_S3
VCCP_GMCH_S0
2D5V_S0
CORE_GMCH_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (2 of 5)
A3
747Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (2 of 5)
A3
747Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (2 of 5)
A3
747Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Layout Note:
Route as short
as possible
and CTRLDATA pulldowns on-die
Alviso will provide SDVO_CTRLCLK
When Low 2.2K Ohm
Ref ALVISO EDS-1 Page 115
CFG(2..1) FREQ.(MHz)
10 400
00 533
11 Reserved
FOR DDR2
Intel suggest NC Due to votusly DVO
CFG2=0(R419):133MHZ
CFG2=1(R420):100MHZ
For Dothan-B
CFG[17:3] have internal pullup resistors.
CFG[19:18] have internal pulldown
resistors
Strapping
When High 1K Ohm
Intel design guide suggest
Ref no.:14511
page 210
Place 150 Ohm termination resistors close to GMCH
Note: Intel design guide
suggest(page 203)
If the LVDS interface is
not implementd, all
signals associated with
the interface can be left
as no connects.
Note:
CRT_RED,
CRT_GREEN,
CRT_BLUE, are
ground
referenced.
12
R543
80D6R2F
R543
80D6R2F
12
R533
80D6R2F
R533
80D6R2F
1 2
R466 DUMMY-R2R466 DUMMY-R2
12
R534
40D2R2F
R534
40D2R2F
1 2
C408 SCD1U16V
C408 SCD1U16V
1 2
R497 DUMMY-R2R497 DUMMY-R2
1 2
R468 DUMMY-R2R468 DUMMY-R2
1 2
C131 SCD1U16V
C131 SCD1U16V
12
R535
40D2R2F
R535
40D2R2F
1 2
R442 DUMMY-R2R442 DUMMY-R2
1 2
C129 SCD1U16V
C129 SCD1U16V
1 2
C429 SCD1U16V
C429 SCD1U16V
1 2
R440 DUMMY-R2R440 DUMMY-R2
1 2
R496 DUMMY-R2R496 DUMMY-R2
TP23TPAD30 TP23TPAD30
DMIRXN0
AA31
DMIRXN1
AB35
DMIRXN2
AC31
DMIRXN3
AD35
DMIRXP0
Y31
DMIRXP1
AA35
DMIRXP2
AB31
DMIRXP3
AC35
DMITXN0
AA33
DMITXN1
AB37
DMITXN2
AC33
DMITXN3
AD37
DMITXP0
Y33
DMITXP1
AA37
DMITXP2
AB33
DMITXP3
AC37
SM_CK0
AM33
SM_CK1
AL1
SM_CK2
AE11
SM_CK3
AJ34
SM_CK4
AF6
SM_CK5
AC10
SM_CK0#
AN33
SM_CK1#
AK1
SM_CK2#
AE10
SM_CK3#
AJ33
SM_CK4#
AF5
SM_CK5#
AD10
SM_CKE0
AP21
SM_CKE1
AM21
SM_CKE2
AH21
SM_CKE3
AK21
SM_CS0#
AN16
SM_CS1#
AM14
SM_CS2#
AH15
SM_CS3#
AG16
SM_OCDCOMP0
AF22
SM_OCDCOMP1
AF16
SM_ODT0
AP14
SM_ODT1
AL15
SM_ODT2
AM11
SM_ODT3
AN10
SMRCOMPN
AK10
SMRCOMPP
AK11
SMVREF0
AF37
SMVREF1
AD1
SMXSLEWIN
AE27
SMXSLEWOUT
AE28
SMYSLEWIN
AF9
SMYSLEWOUT
AF10
CFG0 G16
CFG1 H13
CFG2 G14
CFG3 F16
CFG4 F15
CFG5 G15
CFG6 E16
CFG7 D17
CFG8 J16
CFG9 D15
CFG10 E15
CFG11 D14
CFG12 E14
CFG13 H12
CFG14 C14
CFG15 H15
CFG16 J15
CFG17 H14
CFG18 G22
CFG19 G23
CFG20 D23
RSVD21 G25
RSVD22 G24
RSVD23 J17
RSVD24 A31
RSVD25 A30
RSVD26 D26
RSVD27 D25
BM_BUSY# J23
EXT_TS0# J21
EXT_TS1# H22
THRMTRIP# F5
PWROK AD30
RSTIN# AE29
DREF_CLKN A24
DREF_CLKP A23
DREF_SSCLKN C37
DREF_SSCLKP D37
NC1 AP37
NC2 AN37
NC3 AP36
NC4 AP2
NC5 AP1
NC6 AN1
NC7 B1
NC8 A2
NC9 B37
NC10 A36
NC11 A37
DDR MUXING
NC CLK PM
DMI
CFG/RSVD
U19B
ALVISO-GM
DDR MUXING
NC CLK PM
DMI
CFG/RSVD
U19B
ALVISO-GM
1 2
C431 SCD1U16V
C431 SCD1U16V
1 2
R464 DUMMY-R2R464 DUMMY-R2
12
R473 24D9R2F
R473 24D9R2F
1 2
C130 SCD1U16V
C130 SCD1U16V
1 2
R469 2K2R2R469 2K2R2
1 2
C143 SCD1U16V
C143 SCD1U16V
1 2
R463 DUMMY-R2R463 DUMMY-R2
1 2
C452 SCD1U16V
C452 SCD1U16V
12
R420
1KR2
R420
1KR2
1 2
R441 DUMMY-R2R441 DUMMY-R2
1 2
C372 SCD1U16V
C372 SCD1U16V
12
R465
10KR2
R465
10KR2
1 2
R52 1KR2
R52 1KR2
1 2
C453 SCD1U16V
C453 SCD1U16V
1 2
C142 SCD1U16V
C142 SCD1U16V
1 2
R467 DUMMY-R2R467 DUMMY-R2
1 2
C107 SCD1U16V
C107 SCD1U16V
1 2
C432 SCD1U16V
C432 SCD1U16V
1 2
C373 SCD1U16V
C373 SCD1U16V
TP22TPAD30 TP22TPAD30
1 2
C387 SCD1U16V
C387 SCD1U16V
1 2
C132 SCD1U16V
C132 SCD1U16V
1 2
C97 SCD1U16V
C97 SCD1U16V
12
R437
10KR2
R437
10KR2
SDVOCTRL_DATA
H24
SDVOCTRL_CLK
H25
GCLKN
AB29
GCLKP
AC29
TVDAC_A
A15
TVDAC_B
C16
TVDAC_C
A17
TV_REFSET
J18
TV_IRTNA
B15
TV_IRTNB
B16
TV_IRTNC
B17
DDCCLK
E24
DDCDATA
E23
BLUE
E21
BLUE#
D21
GREEN
C20
GREEN#
B20
RED
A19
RED#
B19
VSYNC
H21
HSYNC
G21
REFSET
J20
LBKLT_CRTL
E25
LBKLT_EN
F25
LCTLA_CLK
C23
LCTLB_DATA
C22
LDDC_CLK
F23
LDDC_DATA
F22
LVDD_EN
F26
LIBG
C33
LVBG
C31
LVREFH
F28
LVREFL
F27
LACLKN
B30
LACLKP
B29
LBCLKN
C25
LBCLKP
C24
LADATAN0
B34
LADATAN1
B33
LADATAN2
B32
LADATAP0
A34
LADATAP1
A33
LADATAP2
B31
LBDATAN0
C29
LBDATAN1
D28
LBDATAN2
C27
LBDATAP0
C28
LBDATAP1
D27
LBDATAP2
C26
EXP_COMPI D36
EXP_ICOMPO D34
EXP_RXN0 E30
EXP_RXN1 F34
EXP_RXN2 G30
EXP_RXN3 H34
EXP_RXN4 J30
EXP_RXN5 K34
EXP_RXN6 L30
EXP_RXN7 M34
EXP_RXN8 N30
EXP_RXN9 P34
EXP_RXN10 R30
EXP_RXN11 T34
EXP_RXN12 U30
EXP_RXN13 V34
EXP_RXN14 W30
EXP_RXN15 Y34
EXP_RXP0 D30
EXP_RXP1 E34
EXP_RXP2 F30
EXP_RXP3 G34
EXP_RXP4 H30
EXP_RXP5 J34
EXP_RXP6 K30
EXP_RXP7 L34
EXP_RXP8 M30
EXP_RXP9 N34
EXP_RXP10 P30
EXP_RXP11 R34
EXP_RXP12 T30
EXP_RXP13 U34
EXP_RXP14 V30
EXP_RXP15 W34
EXP_TXN0 E32
EXP_TXN1 F36
EXP_TXN2 G32
EXP_TXN3 H36
EXP_TXN4 J32
EXP_TXN5 K36
EXP_TXN6 L32
EXP_TXN7 M36
EXP_TXN8 N32
EXP_TXN9 P36
EXP_TXN10 R32
EXP_TXN11 T36
EXP_TXN12 U32
EXP_TXN13 V36
EXP_TXN14 W32
EXP_TXN15 Y36
EXP_TXP0 D32
EXP_TXP1 E36
EXP_TXP2 F32
EXP_TXP3 G36
EXP_TXP4 H32
EXP_TXP5 J36
EXP_TXP6 K32
EXP_TXP7 L36
EXP_TXP8 M32
EXP_TXP9 N36
EXP_TXP10 P32
EXP_TXP11 R36
EXP_TXP12 T32
EXP_TXP13 U36
EXP_TXP14 V32
EXP_TXP15 W36
MISCTVVGALVDS
PCI-EXPRESS GRAPHICS
U19G
ALVISO-GM
MISCTVVGALVDS
PCI-EXPRESS GRAPHICS
U19G
ALVISO-GM
1 2
C108 SCD1U16V
C108 SCD1U16V
1 2
C389 SCD1U16V
C389 SCD1U16V
1 2
C116 SCD1U16V
C116 SCD1U16V
1 2
C106 SCD1U16V
C106 SCD1U16V
1 2
C409 SCD1U16V
C409 SCD1U16V
1 2
R494 0R2-0R494 0R2-0
12
C154
SCD1U10V2MX-1
C154
SCD1U10V2MX-1
1 2
C388 SCD1U16V
C388 SCD1U16V
1 2
C118 SCD1U16V
C118 SCD1U16V
1 2
R461 DUMMY-R2R461 DUMMY-R2
1 2
R498 10KR2
R498 10KR2
1 2
R495 0R2-0R495 0R2-0
1 2
R439 DUMMY-R2R439 DUMMY-R2
12
R438
4K7R2
DY
R438
4K7R2
DY
1 2
C105 SCD1U16V
C105 SCD1U16V
1 2
R471 10KR2
R471 10KR2
1 2
C386 SCD1U16V
C386 SCD1U16V
12
R419
4K7R2
DY
R419
4K7R2
DY
1 2
R493 0R2-0R493 0R2-0
1 2
C119 SCD1U16V
C119 SCD1U16V
1 2
C410 SCD1U16V
C410 SCD1U16V
1 2
R69 DUMMY-R2R69 DUMMY-R2
1 2
R492 0R2-0R492 0R2-0
1 2
R460 DUMMY-R2R460 DUMMY-R2
1 2
C407 SCD1U16V
C407 SCD1U16V
1 2
C117 SCD1U16V
C117 SCD1U16V
1 2
R459 DUMMY-R2R459 DUMMY-R2
1 2
C115 SCD1U16V
C115 SCD1U16V
1 2
R462 DUMMY-R2R462 DUMMY-R2
1 2
R470 DUMMY-R2R470 DUMMY-R2
1 2
C430 SCD1U16V
C430 SCD1U16V
1 2
R536 100R2
R536 100R2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
GMCH_TP48
GMCH_TP49
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ15
M_A_DQ8
M_A_DQ11
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ59
M_A_DQ54
M_A_DQ53
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49
M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS7
M_A_DQS5
M_A_DQS6
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS0
M_A_DQS1
M_A_DQS#3
M_A_DQS#0
M_A_DQS#6
M_A_DQS#4
M_A_DQS#1
M_A_DQS#2
M_A_DQS#5
M_A_DQS#7
M_A_A6
M_A_A3
M_A_A5
M_A_A7
M_A_A1
M_A_A2
M_A_A0
M_A_A4
M_A_A10
M_A_A8
M_A_A13
M_A_A11
M_A_A9
M_A_A12
GMCH_TP51
GMCH_TP50
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_A12
M_B_A9
M_B_A11
M_B_A13
M_B_A8
M_B_A10
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_A_DQ[63..0]11
M_A_DM[7..0] 11
M_A_BS#0 11,12
M_A_BS#1 11,12
M_A_BS#2 11,12
M_A_DQS#[7..0] 11
M_A_DQS[7..0] 11
M_A_CAS# 11,12
M_A_RAS# 11,12
M_A_A[13..0] 11,12
M_A_WE# 11,12
M_B_DQ[63..0]11
M_B_A[13..0] 11,12
M_B_DM[7..0] 11
M_B_BS#0 11,12
M_B_BS#1 11,12
M_B_BS#2 11,12
M_B_DQS[7..0] 11
M_B_DQS#[7..0] 11
M_B_CAS# 11,12
M_B_RAS# 11,12
M_B_WE# 11,12
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (3 of 5)
A3
847Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (3 of 5)
A3
847Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (3 of 5)
A3
847Thursday, July 07, 2005
Leopard2
-1
<Core Design>
TP26 TPAD30TP26 TPAD30
TP27 TPAD30TP27 TPAD30
SADQ0
AG35
SADQ1
AH35
SADQ2
AL35
SADQ3
AL37
SADQ4
AH36
SADQ5
AJ35
SADQ6
AK37
SADQ7
AL34
SADQ8
AM36
SADQ9
AN35
SADQ10
AP32
SADQ11
AM31
SADQ12
AM34
SADQ13
AM35
SADQ14
AL32
SADQ15
AM32
SADQ16
AN31
SADQ17
AP31
SADQ18
AN28
SADQ19
AP28
SADQ20
AL30
SADQ21
AM30
SADQ22
AM28
SADQ23
AL28
SADQ24
AP27
SADQ25
AM27
SADQ26
AM23
SADQ27
AM22
SADQ28
AL23
SADQ29
AM24
SADQ30
AN22
SADQ31
AP22
SADQ32
AM9
SADQ33
AL9
SADQ34
AL6
SADQ35
AP7
SADQ36
AP11
SADQ37
AP10
SADQ38
AL7
SADQ39
AM7
SADQ40
AN5
SADQ41
AN6
SADQ42
AN3
SADQ43
AP3
SADQ44
AP6
SADQ45
AM6
SADQ46
AL4
SADQ47
AM3
SADQ48
AK2
SADQ49
AK3
SADQ50
AG2
SADQ51
AG1
SADQ52
AL3
SADQ53
AM2
SADQ54
AH3
SADQ55
AG3
SADQ56
AF3
SADQ57
AE3
SADQ58
AD6
SADQ59
AC4
SADQ60
AF2
SADQ61
AF1
SADQ62
AD4
SADQ63
AD5
SA_BS0# AK15
SA_BS1# AK16
SA_BS2# AL21
SA_DM0 AJ37
SA_DM1 AP35
SA_DM2 AL29
SA_DM3 AP24
SA_DM4 AP9
SA_DM5 AP4
SA_DM6 AJ2
SA_DM7 AD3
SA_DQS0 AK36
SA_DQS1 AP33
SA_DQS2 AN29
SA_DQS3 AP23
SA_DQS4 AM8
SA_DQS5 AM4
SA_DQS6 AJ1
SA_DQS7 AE5
SA_DQS0# AK35
SA_DQS1# AP34
SA_DQS2# AN30
SA_DQS3# AN23
SA_DQS4# AN8
SA_DQS5# AM5
SA_DQS6# AH1
SA_DQS7# AE4
SA_MA0 AL17
SA_MA1 AP17
SA_MA2 AP18
SA_MA3 AM17
SA_MA4 AN18
SA_MA5 AM18
SA_MA6 AL19
SA_MA7 AP20
SA_MA8 AM19
SA_MA9 AL20
SA_MA10 AM16
SA_MA11 AN20
SA_MA12 AM20
SA_MA13 AM15
SA_CAS# AN15
SA_RAS# AP16
SA_RCVENIN# AF29
SA_RCVENOUT# AF28
SA_WE# AP15
DDR SYSTEM MEMORY A
U19C
ALVISO-GM
DDR SYSTEM MEMORY A
U19C
ALVISO-GM
SBDQ27
AK22
SBDQ28
AH24
SBDQ29
AH23
SBDQ30
AG22
SBDQ31
AJ21
SBDQ32
AG10
SBDQ33
AG9
SBDQ34
AG8
SBDQ35
AH8
SBDQ36
AH11
SBDQ37
AH10
SBDQ38
AJ9
SBDQ39
AK9
SBDQ40
AJ7
SBDQ41
AK6
SBDQ42
AJ4
SBDQ43
AH5
SBDQ44
AK8
SBDQ45
AJ8
SBDQ46
AJ5
SBDQ47
AK4
SBDQ48
AG5
SBDQ49
AG4
SBDQ50
AD8
SBDQ51
AD9
SBDQ52
AH4
SBDQ53
AG6
SBDQ54
AE8
SBDQ0
AE31
SBDQ1
AE32
SBDQ2
AG32
SBDQ3
AG36
SBDQ4
AE34
SBDQ5
AE33
SBDQ6
AF31
SBDQ7
AF30
SBDQ8
AH33
SBDQ9
AH32
SBDQ10
AK31
SBDQ11
AG30
SBDQ12
AG34
SBDQ13
AG33
SBDQ14
AH31
SBDQ15
AJ31
SBDQ16
AK30
SBDQ17
AJ30
SBDQ18
AH29
SBDQ19
AH28
SBDQ20
AK29
SBDQ21
AH30
SBDQ22
AH27
SBDQ23
AG28
SBDQ24
AF24
SBDQ25
AG23
SBDQ26
AJ22
SBDQ55
AD7
SBDQ56
AC5
SBDQ57
AB8
SBDQ58
AB6
SBDQ59
AA8
SBDQ60
AC8
SBDQ61
AC7
SBDQ62
AA4
SBDQ63
AA5
SB_BS0# AJ15
SB_BS1# AG17
SB_BS2# AG21
SB_DM0 AF32
SB_DM1 AK34
SB_DM2 AK27
SB_DM3 AK24
SB_DM4 AJ10
SB_DM5 AK5
SB_DM6 AE7
SB_DM7 AB7
SB_DQS0 AF34
SB_DQS1 AK32
SB_DQS2 AJ28
SB_DQS3 AK23
SB_DQS4 AM10
SB_DQS5 AH6
SB_DQS6 AF8
SB_DQS7 AB4
SB_DQS0# AF35
SB_DQS1# AK33
SB_DQS2# AK28
SB_DQS3# AJ23
SB_DQS4# AL10
SB_DQS5# AH7
SB_DQS6# AF7
SB_DQS7# AB5
SB_MA0 AH17
SB_MA1 AK17
SB_MA2 AH18
SB_MA3 AJ18
SB_MA4 AK18
SB_MA5 AJ19
SB_MA6 AK19
SB_MA7 AH19
SB_MA8 AJ20
SB_MA9 AH20
SB_MA10 AJ16
SB_MA11 AG18
SB_MA12 AG20
SB_MA13 AG15
SB_RAS# AK14
SB_RCVENIN# AF15
SB_RCVENOUT# AF14
SB_WE# AH16
SB_CAS# AH14
DDR SYSTEM MEMORY B
U19D
ALVISO-GM
DDR SYSTEM MEMORY B
U19D
ALVISO-GM
TP28 TPAD30TP28 TPAD30
TP29 TPAD30TP29 TPAD30
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
VCCP_GMCH_CAP1
VCCP_GMCH_CAP3
V1.8_DDR_CAP4
V1.8_DDR_CAP1
V1.8_DDR_CAP5
V1.8_DDR_CAP2
V1.8_DDR_CAP6
VCCP_GMCH_CAP2
1D5V_DPLLB_S0
V1.8_DDR_CAP3
1D5V_DPLLA_S0
1D5V_HPLL_S0
1D5V_HMPLL_S0
1D5V_MPLL_S0
VCCP_GMCH_CAP4
GMCH_CORE_VCC
1D5V_3GPLL_S0
1D5V_S01D5V_PCIE_S0
1D5V_S01D5V_DDRDLL_S0
2D5V_TXLVDS_S02D5V_ALVDS_S0
1D5V_DLVDS_S0
2D5V_S02D5V_TVDAC_S0
1D5V_S0
1D8V_S3
VCCP_GMCH_S0
1D5V_S0
2D5V_3GBG_S0 2D5V_S0
1D5V_S0
2D5V_S0 2D5V_ALVDS_S0
2D5V_S0 2D5V_TXLVDS_S0
VCCP_GMCH_S0
CORE_GMCH_S0
1D5V_DLVDS_S0
3D3V_S0 2D5V_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
2D5V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (4 of 5)
A3
947Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (4 of 5)
A3
947Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (4 of 5)
A3
947Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Note: All VCCSM
pins shorted
internally
Note: All VCCSM
pins shorted
internally
FOR DDR2
12
C426
SC4D7U10V5ZY
C426
SC4D7U10V5ZY
12
C127
SCD22U16V3ZY
C127
SCD22U16V3ZY
12
TC9
ST100U4VBM-U
DY
TC9
ST100U4VBM-U
DY
12
C103
SCD1U10V2MX-1
C103
SCD1U10V2MX-1
12
C473
SC10U10V5ZY-L
C473
SC10U10V5ZY-L
12
C73
SCD47U16V3ZY
C73
SCD47U16V3ZY
21
D6
SSM5818SL
D6
SSM5818SL
12
C74
SCD47U16V3ZY
C74
SCD47U16V3ZY
12
C141
SCD1U10V2MX-1
C141
SCD1U10V2MX-1
12
C404
SC10U10V5ZY-L
C404
SC10U10V5ZY-L
12
C403
SC10U10V5ZY-L
C403
SC10U10V5ZY-L
12
C448
SC10U10V5ZY-L
C448
SC10U10V5ZY-L
12
C84
SCD1U10V2MX-1
C84
SCD1U10V2MX-1
12
C79
SCD1U10V2MX-1
C79
SCD1U10V2MX-1
1 2
G10
GAP-CLOSE-PWR
G10
GAP-CLOSE-PWR
12
C81
SCD1U10V2MX-1
C81
SCD1U10V2MX-1
12
C140
SCD1U10V2MX-1
C140
SCD1U10V2MX-1
1 2
L2
IND-D1UH
L2
IND-D1UH
1 2
L11
IND-D1UH
L11
IND-D1UH
12
C80
SC10U10V5ZY-L
C80
SC10U10V5ZY-L
1 2
L31
IND-D1UH
L31
IND-D1UH
1 2
G55
GAP-CLOSE-PWR
G55
GAP-CLOSE-PWR
1 2
L13
IND-D1UH
L13
IND-D1UH
12
C451
SC10U10V5ZY-L
C451
SC10U10V5ZY-L
12
C159
SCD1U10V2MX-1
C159
SCD1U10V2MX-1
12
C359
SCD1U10V2MX-1
C359
SCD1U10V2MX-1
12
C166
ST100U6D3VM-U
C166
ST100U6D3VM-U
12
C371
SCD1U10V2MX-1
C371
SCD1U10V2MX-1
1 2
G54
GAP-CLOSE-PWR
G54
GAP-CLOSE-PWR
12
C158
SCD1U10V2MX-1
C158
SCD1U10V2MX-1
12
C114
SC10U10V6ZY-U
C114
SC10U10V6ZY-U
12
C83
SCD01U16V3KX
C83
SCD01U16V3KX
1 2
C164
SCD1U10V2MX-1
C164
SCD1U10V2MX-1
1 2
G14
GAP-CLOSE-PWR
G14
GAP-CLOSE-PWR
12
C76
SCD1U10V2MX-1
C76
SCD1U10V2MX-1
12
C160
SCD1U10V2MX-1
C160
SCD1U10V2MX-1
12
C161
SCD1U10V2MX-1
C161
SCD1U10V2MX-1
1 2
C165
SCD1U10V2MX-1
C165
SCD1U10V2MX-1
12
C450
SCD1U10V2MX-1
C450
SCD1U10V2MX-1
12
C428
SCD1U10V2MX-1
C428
SCD1U10V2MX-1
12
G53
GAP-CLOSE-PWR
G53
GAP-CLOSE-PWR
12
C96
SCD1U10V2MX-1
C96
SCD1U10V2MX-1
12
C405
SCD1U10V2MX-1
C405
SCD1U10V2MX-1
1 2
G13
GAP-CLOSE-PWR
G13
GAP-CLOSE-PWR
VCC0
T29
VCC1
R29
VCC2
N29
VCC3
M29
VCC4
K29
VCC5
J29
VCC6
V28
VCC7
U28
VCC8
T28
VCC9
R28
VCC10
P28
VCC11
N28
VCC12
M28
VCC13
L28
VCC14
K28
VCC15
J28
VCC16
H28
VCC17
G28
VCC18
V27
VCC19
U27
VCC20
T27
VCC21
R27
VCC22
P27
VCC23
N27
VCC24
M27
VCC25
L27
VCC26
K27
VCC27
J27
VCC28
H27
VCC29
K26
VCC30
H26
VCC31
K25
VCC32
J25
VCC33
K24
VCC34
K23
VCC35
K22
VCC36
K21
VCC37
W20
VCC38
U20
VCC39
T20
VCC40
K20
VCC41
V19
VCC42
U19
VCC43
K19
VCC44
W18
VCC45
V18
VCC46
T18
VCC47
K18
VCC48
K17
VCCH_MPLL1
AC2
VCCH_MPLL0
AC1
VCCA_DPLLA
B23
VCCA_DPLLB
C35
VCCA_HPLL
AA1
VCCA_MPLL
AA2
VCCA_CRTDAC0
F19
VCCA_CRTDAC1
E19
VSSA_CRTDAC
G19
VCC_SYNC
H20
VTT0
K13
VTT1
J13
VTT2
K12
VTT3
W11
VTT4
V11
VTT5
U11
VTT6
T11
VTT7
R11
VTT8
P11
VTT9
N11
VTT10
M11
VTT11
L11
VTT12
K11
VTT13
W10
VTT14
V10
VTT15
U10
VTT16
T10
VTT17
R10
VTT18
P10
VTT19
N10
VTT20
M10
VTT21
K10
VTT22
J10
VTT23
Y9
VTT24
W9
VTT25
U9
VTT26
R9
VTT27
P9
VTT28
N9
VTT29
M9
VTT30
L9
VTT31
J9
VTT32
N8
VTT33
M8
VTT34
N7
VTT35
M7
VTT36
N6
VTT37
M6
VTT38
A6
VTT39
N5
VTT40
M5
VTT41
N4
VTT42
M4
VTT43
N3
VTT44
M3
VTT45
N2
VTT46
M2
VTT47
B2
VTT48
V1
VTT49
N1
VTT50
M1
VTT51
G1
VCCSM0 AM37
VCCSM1 AH37
VCCSM2 AP29
VCCSM3 AD28
VCCSM4 AD27
VCCSM5 AC27
VCCSM6 AP26
VCCSM7 AN26
VCCSM8 AM26
VCCSM9 AL26
VCCSM10 AK26
VCCSM11 AJ26
VCCSM12 AH26
VCCSM13 AG26
VCCSM14 AF26
VCCSM15 AE26
VCCSM16 AP25
VCCSM17 AN25
VCCSM18 AM25
VCCSM19 AL25
VCCSM20 AK25
VCCSM21 AJ25
VCCSM22 AH25
VCCSM23 AG25
VCCSM24 AF25
VCCSM25 AE25
VCCSM26 AE24
VCCSM27 AE23
VCCSM28 AE22
VCCSM29 AE21
VCCSM30 AE20
VCCSM31 AE19
VCCSM32 AE18
VCCSM33 AE17
VCCSM34 AE16
VCCSM35 AE15
VCCSM36 AE14
VCCSM37 AP13
VCCSM38 AN13
VCCSM39 AM13
VCCSM40 AL13
VCCSM41 AK13
VCCSM42 AJ13
VCCSM43 AH13
VCCSM44 AG13
VCCSM45 AF13
VCCSM46 AE13
VCCSM47 AP12
VCCSM48 AN12
VCCSM49 AM12
VCCSM50 AL12
VCCSM51 AK12
VCCSM52 AJ12
VCCSM53 AH12
VCCSM54 AG12
VCCSM55 AF12
VCCSM56 AE12
VCCSM57 AD11
VCCSM58 AC11
VCCSM59 AB11
VCCSM60 AB10
VCCSM61 AB9
VCCSM62 AP8
VCCSM63 AM1
VCCSM64 AE1
VCCA_TVDACA0 F17
VCCA_TVDACA1 E17
VCCA_TVDACB0 D18
VCCA_TVDACB1 C18
VCCA_TVDACC0 F18
VCCA_TVDACC1 E18
VCCA_TVBG H18
VSSA_TVBG G18
VCCD_TVDAC D19
VCCDQ_TVDAC H17
VCCD_LVDS0 B26
VCCD_LVDS1 B25
VCCD_LVDS2 A25
VCCA_LVDS A35
VCCHV0 B22
VCCHV1 B21
VCCHV2 A21
VCCTX_LVDS0 B28
VCCTX_LVDS1 A28
VCCTX_LVDS2 A27
VCCA_SM0 AF20
VCCA_SM1 AP19
VCCA_SM2 AF19
VCCA_SM3 AF18
VCC3G0 AE37
VCC3G1 W37
VCC3G2 U37
VCC3G3 R37
VCC3G4 N37
VCC3G5 L37
VCC3G6 J37
VCCA_3GPLL2 Y27
VCCA_3GPLL0 Y29
VCCA_3GBG F37
VCCA_3GPLL1 Y28
VSSA_3GBG G37
POWER
U19E
POWER
U19E
12
C82
SC4D7U10V5ZY
C82
SC4D7U10V5ZY
1 2
G12
GAP-CLOSE-PWR
G12
GAP-CLOSE-PWR
12
C472
SCD1U10V2MX-1
C472
SCD1U10V2MX-1
12
C406
SCD1U10V2MX-1
C406
SCD1U10V2MX-1
1 2
G11
GAP-CLOSE-PWR
G11
GAP-CLOSE-PWR
12
C78
SC10U6D3V5MX
DY
C78
SC10U6D3V5MX
DY
1 2
G15
GAP-CLOSE-PWR
G15
GAP-CLOSE-PWR
12
C63
SC4D7U6D3V5KX
C63
SC4D7U6D3V5KX
12
C447
SC10U10V5ZY-L
C447
SC10U10V5ZY-L
12
C153
SC10U6D3V5MX
DY
C153
SC10U6D3V5MX
DY
12
C449
SC10U10V5ZY-L
C449
SC10U10V5ZY-L
12
C370
SC10U6D3V5MX
DY
C370
SC10U6D3V5MX
DY
12
C139
SC10U6D3V5MX
DY
C139
SC10U6D3V5MX
DY
12
TC22
ST100U6D3VM-U
DY
TC22
ST100U6D3VM-U
DY
GND 1
VOUT 2
VIN
3
U59
APL5308-25AC-TR
U59
APL5308-25AC-TR
1 2
R55 10R2R55 10R2
12
C75
SC10U10V5ZY-L
C75
SC10U10V5ZY-L
12
C427
SC4D7U10V5ZY
C427
SC4D7U10V5ZY
12
C385
SC10U10V5ZY-L
C385
SC10U10V5ZY-L
12
C104
SCD22U16V3ZY
C104
SCD22U16V3ZY
12
C77
SCD1U10V2MX-1
C77
SCD1U10V2MX-1
12
C102
ST100U6D3VM-U
C102
ST100U6D3VM-U
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
1D8V_S3
VCCP_GMCH_S0
CORE_GMCH_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (5 of 5)
A3
10 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (5 of 5)
A3
10 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (5 of 5)
A3
10 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
FOR DDR2
VSS0 AG37
VSS1 Y37
VSS2 V37
VSS3 T37
VSS4 P37
VSS5 M37
VSS6 K37
VSS7 H37
VSS8 E37
VSS9 AN36
VSS10 AL36
VSS11 AJ36
VSS12 AF36
VSS13 AE36
VSS14 AD36
VSS15 AC36
VSS16 AB36
VSS17 AA36
VSS18 C36
VSS19 AE35
VSS20 Y35
VSS21 W35
VSS22 V35
VSS23 U35
VSS24 T35
VSS25 R35
VSS26 P35
VSS27 N35
VSS28 M35
VSS29 L35
VSS30 K35
VSS31 J35
VSS32 H35
VSS33 G35
VSS34 F35
VSS35 E35
VSS36 D35
VSS37 B35
VSS38 AN34
VSS39 AH34
VSS40 AD34
VSS41 AC34
VSS42 AB34
VSS43 AA34
VSS44 C34
VSS45 AL33
VSS46 AF33
VSS47 AD33
VSS48 W33
VSS49 V33
VSS50 U33
VSS51 T33
VSS52 R33
VSS53 P33
VSS54 N33
VSS55 M33
VSS56 L33
VSS57 K33
VSS58 J33
VSS59 H33
VSS60 G33
VSS61 F33
VSS62 E33
VSS63 D33
VSS64 AN32
VSS65 AJ32
VSS66 AD32
VSS67 AC32
VSS68 AB32
VSS69 AA32
VSS70 Y32
VSS71 C32
VSS72 A32
VSS73 AL31
VSS74 AG31
VSS75 AD31
VSS76 W31
VSS77 V31
VSS78 U31
VSS79 T31
VSS80 R31
VSS81 P31
VSS82 N31
VSS83 M31
VSS84 L31
VSS85 K31
VSS86 J31
VSS87 H31
VSS88 G31
VSS89 F31
VSS90 E31
VSS91 D31
VSS92 AP30
VSS93 AE30
VSS94 AC30
VSS95 AB30
VSS96 AA30
VSS97 Y30
VSS98 C30
VSS99 AM29
VSS100 AJ29
VSS101 AG29
VSS102 AD29
VSS103 AA29
VSS104 W29
VSS105 V29
VSS106 U29
VSS107 P29
VSS108 L29
VSS109 H29
VSS110 G29
VSS111 F29
VSS112 E29
VSS113 D29
VSS114 A29
VSS115 AC28
VSS116 AB28
VSS117 AA28
VSS118 W28
VSS119 E28
VSS120 AN27
VSS121 AL27
VSS122 AJ27
VSS123 AG27
VSS124 AF27
VSS125 AB27
VSS126 AA27
VSS127 W27
VSS128 G27
VSS129 E27
VSS261 B27
VSS262 J26
VSS263 G26
VSS264 E26
VSS265 A26
VSS266 AN24
VSS267 AL24
VSS196
Y11
VSS195
AA11
VSS194
AF11
VSS193
AG11
VSS192
AJ11
VSS191
AL11
VSS190
AN11
VSS189
B12
VSS188
D12
VSS187
J12
VSS186
A14
VSS185
B14
VSS184
F14
VSS183
J14
VSS182
K14
VSS181
AG14
VSS180
AJ14
VSS179
AL14
VSS178
AN14
VSS177
C15
VSS176
K15
VSS175
A16
VSS174
D16
VSS173
H16
VSS172
K16
VSS171
AL16
VSS170
C17
VSS169
G17
VSS168
AF17
VSS167
AJ17
VSS166
AN17
VSS165
A18
VSS164
B18
VSS163
U18
VSS162
AL18
VSS161
C19
VSS160
H19
VSS159
J19
VSS158
T19
VSS157
W19
VSS156
AG19
VSS155
AN19
VSS154
A20
VSS153
D20
VSS152
E20
VSS151
F20
VSS150
G20
VSS149
V20
VSS148
AK20
VSS147
C21
VSS146
F21
VSS145
AF21
VSS144
AN21
VSS143
A22
VSS142
D22
VSS141
E22
VSS140
J22
VSS139
AH22
VSS138
AL22
VSS137
H23
VSS136
AF23
VSS135
B24
VSS134
D24
VSS133
F24
VSS132
J24
VSS131
AG24
VSS130
AJ24
VSS259
P2
VSS258
T2
VSS257
V2
VSS256
AD2
VSS255
AE2
VSS254
AH2
VSS253
AL2
VSS252
AN2
VSS251
A3
VSS250
C3
VSS249
AA3
VSS248
AB3
VSS247
AC3
VSS246
AJ3
VSS245
C4
VSS244
H4
VSS243
L4
VSS242
P4
VSS241
U4
VSS240
Y4
VSS239
AF4
VSS238
AN4
VSS237
E5
VSS236
W5
VSS235
AL5
VSS234
AP5
VSS233
B6
VSS232
J6
VSS231
L6
VSS230
P6
VSS229
T6
VSS228
AA6
VSS227
AC6
VSS226
AE6
VSS225
AJ6
VSS224
G7
VSS223
V7
VSS222
AA7
VSS221
AG7
VSS220
AK7
VSS219
AN7
VSS218
C8
VSS217
E8
VSS216
L8
VSS215
P8
VSS214
Y8
VSS213
AL8
VSS212
A9
VSS211
H9
VSS210
K9
VSS209
T9
VSS208
V9
VSS207
AA9
VSS206
AC9
VSS205
AE9
VSS204
AH9
VSS203
AN9
VSS202
D10
VSS201
L10
VSS200
Y10
VSS199
AA10
VSS198
F11
VSS197
H11
VSSALVDS
B36
VSS260
L2 VSS268
J2 VSS269
G2 VSS270
D2 VSS271
Y1
VSS
U19F
ALVISO-GM
VSS
U19F
ALVISO-GM
VCCSM_NCTF0 AD26
VCCSM_NCTF1 AC26
VCCSM_NCTF2 AD25
VCCSM_NCTF3 AC25
VCCSM_NCTF4 AD24
VCCSM_NCTF5 AC24
VCCSM_NCTF6 AD23
VCCSM_NCTF7 AC23
VCCSM_NCTF8 AD22
VCCSM_NCTF9 AC22
VCCSM_NCTF10 AD21
VCCSM_NCTF11 AC21
VCCSM_NCTF12 AD20
VCCSM_NCTF13 AC20
VCCSM_NCTF14 AD19
VCCSM_NCTF15 AC19
VCCSM_NCTF16 AD18
VCCSM_NCTF17 AC18
VCCSM_NCTF18 AD17
VCCSM_NCTF19 AC17
VCCSM_NCTF20 AD16
VCCSM_NCTF21 AC16
VCCSM_NCTF22 AD15
VCCSM_NCTF23 AC15
VCCSM_NCTF24 AD14
VCCSM_NCTF25 AC14
VCCSM_NCTF26 AD13
VCCSM_NCTF27 AC13
VCCSM_NCTF28 AB13
VCCSM_NCTF29 AD12
VCCSM_NCTF30 AC12
VCCSM_NCTF31 AB12
VCC_NCTF49 P21
VCC_NCTF50 N21
VCC_NCTF51 M21
VCC_NCTF52 L21
VCC_NCTF53 Y20
VCC_NCTF54 R20
VCC_NCTF55 P20
VCC_NCTF56 N20
VCC_NCTF57 M20
VCC_NCTF58 L20
VCC_NCTF59 Y19
VCC_NCTF60 R19
VCC_NCTF61 P19
VCC_NCTF62 N19
VCC_NCTF63 M19
VCC_NCTF64 L19
VCC_NCTF65 Y18
VCC_NCTF66 R18
VCC_NCTF67 P18
VCC_NCTF68 N18
VCC_NTTF69 M18
VCC_NCTF70 L18
VCC_NCTF71 W17
VCC_NCTF72 V17
VCC_NCTF73 U17
VCC_NCTF74 T17
VCC_NCTF75 P17
VCC_NCTF76 N17
VCC_NCTF77 M17
VCC_NCTF78 L17
VCC_NCTF0 W26
VCC_NCTF1 V26
VCC_NCTF2 U26
VCC_NCTF3 T26
VCC_NCTF4 R26
VCC_NCTF5 P26
VCC_NCTF6 N26
VCC_NCTF7 M26
VCC_NCTF8 L26
VCC_NCTF9 W25
VCC_NCTF10 V25
VCC_NCTF11 U25
VCC_NCTF12 T25
VCC_NCTF13 R25
VCC_NCTF14 P25
VCC_NCTF15 N25
VCC_NCTF16 M25
VCC_NCTF17 L25
VCC_NCTF18 W24
VCC_NCTF19 V24
VCC_NCTF20 U24
VCC_NCTF21 T24
VCC_NCTF22 R24
VCC_NCTF23 P24
VCC_NCTF24 N24
VCC_NCTF25 M24
VCC_NCTF26 L24
VCC_NCTF27 W23
VCC_NCTF28 V23
VCC_NCTF29 U23
VCC_NCTF30 T23
VCC_NCTF31 R23
VCC_NCTF32 P23
VCC_NCTF33 N23
VCC_NCTF34 M23
VCC_NCTF35 L23
VCC_NCTF36 W22
VCC_NCTF37 V22
VCC_NCTF38 U22
VCC_NCTF39 T22
VCC_NCTF40 R22
VCC_NCTF41 P22
VCC_NCTF42 N22
VCC_NCTF43 M22
VCC_NCTF44 L22
VCC_NCTF45 W21
VCC_NCTF46 V21
VCC_NCTF47 U21
VCC_NCTF48 T21
VSS_NCTF68
Y12
VSS_NCTF67
AA12
VSS_NCTF66
Y13
VSS_NCTF65
AA13
VSS_NCTF64
L14
VSS_NCTF63
M14
VSS_NCTF62
N14
VSS_NCTF61
P14
VSS_NCTF60
R14
VSS_NCTF59
T14
VSS_NCTF58
U14
VSS_NCTF57
V14
VSS_NCTF56
W14
VSS_NCTF55
Y14
VSS_NCTF54
AA14
VSS_NCTF53
AB14
VSS_NCTF52
L15
VSS_NCTF51
M15
VSS_NCTF50
N15
VSS_NCTF49
P15
VSS_NCTF48
R15
VSS_NCTF47
T15
VSS_NCTF46
U15
VSS_NCTF45
V15
VSS_NCTF44
W15
VSS_NCTF43
Y15
VSS_NCTF42
AA15
VSS_NCTF41
AB15
VSS_NCTF40
L16
VSS_NCTF39
M16
VSS_NCTF38
N16
VSS_NCTF37
P16
VSS_NCTF36
R16
VSS_NCTF35
T16
VSS_NCTF34
U16
VSS_NCTF33
V16
VSS_NCTF32
W16
VSS_NCTF31
Y16
VSS_NCTF30
AA16
VSS_NCTF29
AB16
VSS_NCTF28
R17
VSS_NCTF27
Y17
VSS_NCTF26
AA17
VSS_NCTF25
AB17
VSS_NCTF24
AA18
VSS_NCTF23
AB18
VSS_NCTF22
AA19
VSS_NCTF21
AB19
VSS_NCTF20
AA20
VSS_NCTF19
AB20
VSS_NCTF18
R21
VSS_NCTF17
Y21
VSS_NCTF16
AA21
VSS_NCTF15
AB21
VSS_NCTF14
Y22
VSS_NCTF13
AA22
VSS_NCTF12
AB22
VSS_NCTF11
Y23
VSS_NCTF10
AA23
VSS_NCTF9
AB23
VSS_NCTF8
Y24
VSS_NCTF7
AA24
VSS_NCTF6
AB24
VSS_NCTF5
Y25
VSS_NCTF4
AA25
VSS_NCTF3
AB25
VSS_NCTF2
Y26
VSS_NCTF1
AA26
VSS_NCTF0
AB26
VTT_NCTF17
L12
VTT_NCTF16
M12
VTT_NCTF15
N12
VTT_NCTF14
P12
VTT_NCTF13
R12
VTT_NCTF12
T12
VTT_NCTF11
U12
VTT_NCTF10
V12
VTT_NCTF9
W12
VTT_NCTF8
L13
VTT_NCTF7
M13
VTT_NCTF6
N13
VTT_NCTF5
P13
VTT_NCTF4
R13
VTT_NCTF3
T13
VTT_NCTF2
U13
VTT_NCTF1
V13
VTT_NCTF0
W13
NCTF
U19H
ALVISO-GM
NCTF
U19H
ALVISO-GM
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
M_CLK_DDR#1
M_CLK_DDR1
M_CLK_DDR#4
M_CLK_DDR4
M_CLK_DDR#0
M_CLK_DDR0
M_CLK_DDR#3
M_CLK_DDR3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DQ60
M_A_DQ49
M_A_DQ58
M_A_DQ51
M_A_DQ50
M_A_DQ63
M_A_DQ53
M_A_DQ54
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ8
M_A_DQ9
M_A_DQ11
M_A_DQ10
M_A_DQ62
M_A_DQ61
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ12
M_A_DQ16
M_A_DQ17
M_A_DQ19
M_A_DQ18
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ20
M_A_DQ28
M_A_DQ31
M_A_DQ30
M_A_DQ27
M_A_DQ25
M_A_DQ24
M_A_DQ26
M_A_DQ29
M_A_DQ32
M_A_DQ33
M_A_DQ35
M_A_DQ34
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ36
M_A_DQ44
M_A_DQ47
M_A_DQ46
M_A_DQ43
M_A_DQ41
M_A_DQ40
M_A_DQ42
M_A_DQ45
M_A_DQ55
M_A_DQ57
M_A_DQ59
M_A_DQ48
M_A_DQ52
M_A_DQ56
M_A_DM5
M_A_DM7
M_A_DM0
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM6
M_A_DM4
M_A_DQS2
M_A_DQS1
M_A_DQS3
M_A_DQS7
M_A_DQS0
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS#2
M_A_DQS#3
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS#1
M_A_DQS#0
M_A_DQS#4
SMBC_ICH
SMBD_ICH
M_B_A10
M_B_A7
M_B_A13
M_B_A1
M_B_A8
M_B_A5
M_B_A2
M_B_A11
M_B_A6
M_B_A3
M_B_A12
M_B_A9
M_B_A0
M_B_A4
M_B_DQ53
M_B_DQ45
M_B_DQ19
M_B_DQ14
M_B_DQ57
M_B_DQ52
M_B_DQ30
M_B_DQ22
M_B_DQ61
M_B_DQ35
M_B_DQ24
M_B_DQ0
M_B_DQ46
M_B_DQ38
M_B_DQ8
M_B_DQ3
M_B_DQ51
M_B_DQ40
M_B_DQ16
M_B_DQ10
M_B_DQ62
M_B_DQ54
M_B_DQ28
M_B_DQ18
M_B_DQ56
M_B_DQ32
M_B_DQ27
M_B_DQ44
M_B_DQ34
M_B_DQ7
M_B_DQ1
M_B_DQ48
M_B_DQ43
M_B_DQ15
M_B_DQ9
M_B_DQ60
M_B_DQ50
M_B_DQ23
M_B_DQ17
M_B_DQ59
M_B_DQ26
M_B_DQ31
M_B_DQ39
M_B_DQ33
M_B_DQ4
M_B_DQ42
M_B_DQ47
M_B_DQ13
M_B_DQ6
M_B_DQ55
M_B_DQ49
M_B_DQ21
M_B_DQ12
M_B_DQ58
M_B_DQ63
M_B_DQ25
M_B_DQ20
M_B_DQ37
M_B_DQ29
M_B_DQ2
M_B_DQ41
M_B_DQ36
M_B_DQ11
M_B_DQ5
M_B_DQS#3
M_B_DQS#1
M_B_DQS#7
M_B_DQS#0
M_B_DQS#6
M_B_DQS#5
M_B_DQS#2
M_B_DQS#4
M_B_DM0
M_B_DM7
M_B_DM1
M_B_DM6
M_B_DM4
M_B_DM5
M_B_DM3
M_B_DM2
M_B_DQS3
M_B_DQS7
M_B_DQS0
M_B_DQS1
M_B_DQS6
M_B_DQS4
M_B_DQS2
M_B_DQS5
M_A_A[13..0]8,12
M_A_BS#28,12
M_A_BS#18,12 M_A_BS#08,12
M_A_DQ[63..0]8
M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7
M_A_DM[7..0] 8
M_ODT07,12 M_ODT17,12
M_A_DQS[7..0]8
M_A_DQS#[7..0]8
M_CS#1 7,12
M_A_RAS# 8,12
M_A_WE# 8,12
M_A_CAS# 8,12
M_CS#0 7,12
M_CKE1 7,12
M_CKE0 7,12
M_B_A[13..0]8,12
M_B_BS#28,12
M_B_BS#08,12 M_B_BS#18,12
M_B_DQ[63..0]8
M_B_DQS[7..0]8
M_B_DQS#[7..0]8
M_B_DM[7..0] 8
M_ODT37,12 M_ODT27,12
M_CLK_DDR3 7
M_CLK_DDR#3 7
M_CLK_DDR4 7
M_CLK_DDR#4 7
M_CS#2 7,12
SMBC_ICH 3,24
M_CKE3 7,12
M_CKE2 7,12
M_CS#3 7,12
SMBD_ICH 3,24
M_B_CAS# 8,12
M_B_RAS# 8,12
M_B_WE# 8,12
3D3V_S0
1D8V_S3
DDR_VREF_S3DDR_VREF_S3
3D3V_S0
3D3V_S0
1D8V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
DDR2 Socket
Custom
11 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
DDR2 Socket
Custom
11 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
DDR2 Socket
Custom
11 47Thursday, July 07, 2005
<Core Design>
NORMAL TYPE
Place near DM2
Place near DM1
Low5.2 mm
Hi 9.2 mm
NORMAL TYPE
High 9.2mm
SBSB
12
C244
SC10P50V2JN-1
DY
C244
SC10P50V2JN-1
DY
12
BC123
SCD1U16V
BC123
SCD1U16V
12
C548
SC2D2U6D3V3MX-1
C548
SC2D2U6D3V3MX-1
12
BC122
SCD1U16V
BC122
SCD1U16V
12
C510
SC10P50V2JN-1
DY
C510
SC10P50V2JN-1
DY
12
R175
10KR2
R175
10KR2
12
C547
SC2D2U6D3V3MX-1
DY
C547
SC2D2U6D3V3MX-1
DY
12
BC44
SCD1U16V
BC44
SCD1U16V
1 2
R229 10KR2
R229 10KR2
12
C220
SC2D2U6D3V3MX-1
DY
C220
SC2D2U6D3V3MX-1
DY
12
R230
10KR2
R230
10KR2
A0
102
A1
101
A2
100
A3
99
A4
98
A5
97
A6
94
A7
92
A8
93
A9
91
A10/AP
105
A11
90
A12
89
A13
116
A14
86
A15
84
A16/BA2
85
/RAS 108
/WE 109
/CAS 113
/CS0 110
/CS1 115
CKE0 79
CKE1 80
CK0 30
/CK0 32
CK1 164
/CK1 166
DM0 10
DM1 26
DM2 52
DM3 67
DM4 130
DM5 147
DM6 170
DM7 185
SDA 195
SCL 197
VDDSPD 199
SA0 198
SA1 200
NC#50 50
NC#69 69
NC#83 83
NC#120 120
NC#163/TEST 163
VDD 81
VDD 82
VDD 87
VDD 88
VDD 95
VDD 96
VDD 103
VDD 104
VDD 111
VDD 112
VDD 117
VSS 3
VSS 8
VSS 9
VSS 12
VSS 15
VSS 18
VSS 21
VSS 24
VSS 27
VSS 28
VSS 33
VSS 34
VSS 39
VSS 40
VSS 41
VSS 42
VSS 47
VSS 48
VSS 53
VSS 54
VSS 59
VSS 60
VSS 65
VSS 66
VSS 71
VSS 72
VSS 77
VSS 78
VSS 121
VSS 122
VSS 127
VSS 128
VSS 132
VSS 133
VSS 138
VSS 139
VSS 144
VSS 145
VSS 149
VSS 150
VSS 155
VSS 156
VSS 161
VSS 162
VSS 165
VSS 168
VSS 171
VSS 172
VSS 177
VSS 178
VSS 183
VSS 184
VSS 187
VSS 190
VSS 193
VSS 196
GND 201
BA0
107
BA1
106
DQ0
5
DQ1
7
DQ2
17
DQ3
19
DQ4
4
DQ5
6
DQ6
14
DQ7
16
DQ8
23
DQ9
25
DQ10
35
DQ11
37
DQ12
20
DQ13
22
DQ14
36
DQ15
38
DQ16
43
DQ17
45
DQ18
55
DQ19
57
DQ20
44
DQ21
46
DQ22
56
DQ23
58
DQ24
61
DQ25
63
DQ26
73
DQ27
75
DQ28
62
DQ29
64
DQ30
74
DQ31
76
DQ32
123
DQ33
125
DQ34
135
DQ35
137
DQ36
124
DQ37
126
DQ38
134
DQ39
136
DQ40
141
DQ41
143
DQ42
151
DQ43
153
DQ44
140
DQ45
142
DQ46
152
DQ47
154
DQ48
157
DQ49
159
DQ50
173
DQ51
175
DQ52
158
DQ53
160
DQ54
174
DQ55
176
DQ56
179
DQ57
181
DQ58
189
DQ59
191
DQ60
180
DQ61
182
DQ62
192
DQ63
194
/DQS0
11
/DQS1
29
/DQS2
49
/DQS3
68
/DQS4
129
/DQS5
146
/DQS6
167
/DQS7
186
DQS0
13
DQS1
31
DQS2
51
DQS3
70
DQS4
131
DQS5
148
DQS6
169
DQS7
188
ODT0
114
ODT1
119
VREF
1
VSS
2
GND
202
VDD 118
DM1
DDR2-200P-5
DM1
DDR2-200P-5
12
C231
SC10P50V2JN-1
DY
C231
SC10P50V2JN-1
DY
12
R176
10KR2
R176
10KR2
12
C205
SC2D2U6D3V3MX-1
C205
SC2D2U6D3V3MX-1
A0
102
A1
101
A2
100
A3
99
A4
98
A5
97
A6
94
A7
92
A8
93
A9
91
A10/AP
105
A11
90
A12
89
A13
116
A14
86
A15
84
A16/BA2
85
/RAS 108
/WE 109
/CAS 113
/CS0 110
/CS1 115
CKE0 79
CKE1 80
CK0 30
/CK0 32
CK1 164
/CK1 166
DM0 10
DM1 26
DM2 52
DM3 67
DM4 130
DM5 147
DM6 170
DM7 185
SDA 195
SCL 197
VDDSPD 199
SA0 198
SA1 200
NC#50 50
NC#69 69
NC#83 83
NC#120 120
NC#163/TEST 163
VDD 81
VDD 82
VDD 87
VDD 88
VDD 95
VDD 96
VDD 103
VDD 104
VDD 111
VDD 112
VDD 117
VSS 3
VSS 8
VSS 9
VSS 12
VSS 15
VSS 18
VSS 21
VSS 24
VSS 27
VSS 28
VSS 33
VSS 34
VSS 39
VSS 40
VSS 41
VSS 42
VSS 47
VSS 48
VSS 53
VSS 54
VSS 59
VSS 60
VSS 65
VSS 66
VSS 71
VSS 72
VSS 77
VSS 78
VSS 121
VSS 122
VSS 127
VSS 128
VSS 132
VSS 133
VSS 138
VSS 139
VSS 144
VSS 145
VSS 149
VSS 150
VSS 155
VSS 156
VSS 161
VSS 162
VSS 165
VSS 168
VSS 171
VSS 172
VSS 177
VSS 178
VSS 183
VSS 184
VSS 187
VSS 190
VSS 193
VSS 196
GND 201
BA0
107
BA1
106
DQ0
5
DQ1
7
DQ2
17
DQ3
19
DQ4
4
DQ5
6
DQ6
14
DQ7
16
DQ8
23
DQ9
25
DQ10
35
DQ11
37
DQ12
20
DQ13
22
DQ14
36
DQ15
38
DQ16
43
DQ17
45
DQ18
55
DQ19
57
DQ20
44
DQ21
46
DQ22
56
DQ23
58
DQ24
61
DQ25
63
DQ26
73
DQ27
75
DQ28
62
DQ29
64
DQ30
74
DQ31
76
DQ32
123
DQ33
125
DQ34
135
DQ35
137
DQ36
124
DQ37
126
DQ38
134
DQ39
136
DQ40
141
DQ41
143
DQ42
151
DQ43
153
DQ44
140
DQ45
142
DQ46
152
DQ47
154
DQ48
157
DQ49
159
DQ50
173
DQ51
175
DQ52
158
DQ53
160
DQ54
174
DQ55
176
DQ56
179
DQ57
181
DQ58
189
DQ59
191
DQ60
180
DQ61
182
DQ62
192
DQ63
194
/DQS0
11
/DQS1
29
/DQS2
49
/DQS3
68
/DQS4
129
/DQS5
146
/DQS6
167
/DQS7
186
DQS0
13
DQS1
31
DQS2
51
DQS3
70
DQS4
131
DQS5
148
DQS6
169
DQS7
188
ODT0
114
ODT1
119
VREF
1
VSS
2
GND
202
VDD 118
DM2
DDR2-200P-4
DM2
DDR2-200P-4
12
BC43
SCD1U16V
BC43
SCD1U16V
12
C511
SC10P50V2JN-1
DY
C511
SC10P50V2JN-1
DY
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
M_B_A3
M_A_A12
M_B_A5
M_A_A9
M_B_A0
M_B_A1
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A2
M_B_A4
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_A_A0
M_A_A1
M_A_A10
M_A_A11
M_A_A13
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A[13..0] 8,11
M_B_A[13..0] 8,11
M_CS#1 7,11
M_CS#3 7,11
M_CKE3 7,11
M_A_BS#1 8,11
M_A_BS#2 8,11
M_A_CAS# 8,11
M_B_BS#0 8,11
M_B_BS#1 8,11
M_B_BS#2 8,11
M_B_CAS# 8,11
M_B_RAS# 8,11
M_B_WE# 8,11
M_CKE0 7,11
M_CKE1 7,11
M_CKE2 7,11
M_CS#2 7,11
M_ODT1 7,11
M_ODT2 7,11
M_ODT3 7,11
M_A_BS#0 8,11
M_A_RAS# 8,11
M_A_WE# 8,11
M_CS#0 7,11
M_ODT0 7,11
1D8V_S3
1D8V_S3
DDR_VREF
DDR_VREF
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
DDR2 Termination Resistor
A3
12 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
DDR2 Termination Resistor
A3
12 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
DDR2 Termination Resistor
A3
12 47Thursday, July 07, 2005
<Core Design>
Put decap near power(0.9V) and pull-up resistor
PARALLEL TERMINATION Decoupling Capacitor
Place these Caps near DM1
Put decap near power(0.9V)
and pull-up resistor
Place these Caps near DM2
12
C192
SCD1U16V
DY
C192
SCD1U16V
DY
12
C557
SCD1U16V
C557
SCD1U16V
1 2
R609 56R2JR609 56R2J
12
C202
SCD1U16V
DY
C202
SCD1U16V
DY
12
C240
SC2D2U6D3V3MX-1
C240
SC2D2U6D3V3MX-1
12
C559
SCD1U16V
C559
SCD1U16V
12
C550
SCD1U16V
DY
C550
SCD1U16V
DY
1
2
3
45
6
7
8
RN27
SRN56-1
RN27
SRN56-1
12
C492
SCD1U16V
C492
SCD1U16V
12
C554
SCD1U16V
DY
C554
SCD1U16V
DY
1
2
3
45
6
7
8
RN12
SRN56-1
RN12
SRN56-1
12
C232
SC2D2U6D3V3MX-1
C232
SC2D2U6D3V3MX-1
12
C193
SC2D2U6D3V3MX-1
C193
SC2D2U6D3V3MX-1
12
C503
SCD1U16V
DY
C503
SCD1U16V
DY
1
2
3
45
6
7
8
RN28
SRN56-1
RN28
SRN56-1
12
C495
SCD1U16V
DY
C495
SCD1U16V
DY
12
C190
SC2D2U6D3V3MX-1
C190
SC2D2U6D3V3MX-1
12
C493
SCD1U16V
DY
C493
SCD1U16V
DY
1
2
3
45
6
7
8
RN31
SRN56-1
RN31
SRN56-1
12
C497
SCD1U16V
DY
C497
SCD1U16V
DY
12
C236
SC2D2U6D3V3MX-1
C236
SC2D2U6D3V3MX-1
12
C498
SCD1U16V
DY
C498
SCD1U16V
DY
12
C552
SCD1U16V
C552
SCD1U16V
12
C494
SCD1U16V
DY
C494
SCD1U16V
DY
12
C496
SCD1U16V
C496
SCD1U16V
1
2
3
45
6
7
8
RN29
SRN56-1
RN29
SRN56-1
12
C553
SCD1U16V
C553
SCD1U16V
1 2
R561 56R2JR561 56R2J
12
C500
SCD1U16V
C500
SCD1U16V
1
2
3
45
6
7
8
RN15
SRN56-1
RN15
SRN56-1
12
C243
SC2D2U6D3V3MX-1
C243
SC2D2U6D3V3MX-1
12
C200
SC2D2U6D3V3MX-1
C200
SC2D2U6D3V3MX-1
1 2
R562 56R2JR562 56R2J
12
C499
SCD1U16V
C499
SCD1U16V
12
C551
SCD1U16V
C551
SCD1U16V
12
C241
SCD1U16V
DY
C241
SCD1U16V
DY
1
2
3
45
6
7
8
RN13
SRN56-1
RN13
SRN56-1
12
C561
SCD1U16V
C561
SCD1U16V
12
C558
SCD1U16V
C558
SCD1U16V
12
C504
SCD1U16V
C504
SCD1U16V
12
C204
SC2D2U6D3V3MX-1
C204
SC2D2U6D3V3MX-1
1
2
3
45
6
7
8
RN14
SRN56-1
RN14
SRN56-1
12
C555
SCD1U16V
C555
SCD1U16V
12
C562
SCD1U16V
C562
SCD1U16V
1 2
R608 56R2JR608 56R2J
1
2
3
45
6
7
8
RN16
SRN56-1
RN16
SRN56-1
12
C234
SC2D2U6D3V3MX-1
C234
SC2D2U6D3V3MX-1
12
C242
SCD1U16V
DY
C242
SCD1U16V
DY
12
C556
SCD1U16V
C556
SCD1U16V
12
C203
SC2D2U6D3V3MX-1
C203
SC2D2U6D3V3MX-1
1
2
3
45
6
7
8
RN30
SRN56-1
RN30
SRN56-1
12
C235
SCD1U16V
DY
C235
SCD1U16V
DY
12
C560
SCD1U16V
C560
SCD1U16V
12
C502
SCD1U16V
C502
SCD1U16V
12
C233
SCD1U16V
DY
C233
SCD1U16V
DY
1
2
3
45
6
7
8
RN26
SRN56-1
RN26
SRN56-1
12
C201
SCD1U16V
DY
C201
SCD1U16V
DY
12
C501
SCD1U16V
C501
SCD1U16V
12
C191
SCD1U16V
DY
C191
SCD1U16V
DY
1
2
3
45
6
7
8
RN17
SRN56-1
RN17
SRN56-1
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
VGA_GPIO10
VGA_GPIO1
VGA_GPIO3
VGA_GPIO2
VGA_GPIO0
VGA_GPIO9
VGA_GPIO4
VGA_GPIO8
VGA_GPIO7
VGA_GPIO13
VGA_GPIO5
VGA_GPIO12
VGA_GPIO6
VGA_GPIO11
STERE0SYNC PWRGD_MASK
VGA_DDCDATA DDC_DATA
VGA_DDCCLK DDC_CLK
P2779A_LF
P2779A_XOUT
P2779A_XIN
P2779A_REF
VGA_GPIO16
XTALIN_M24
3D3V_SS_S0
TEST_MCLK
TEST_YCLK
TESTEN
STERE0SYNC
XTALIN_M24
PEG_CALI
PEG_CALRN
PEG_CALRP
PEG_TESTIN
PERSTB
ATI_R2SET
PWRGD_MASK
DDC3_CLK
DDC3_DATA
RXP0
RXN0
RXP1
RXN1
RXP2
RXN2
RXN3
RXP3
RXP4
RXN4
RXN5
RXP5
RXP7
RXN7
RXP6
RXN6
RXP8
RXN8
RXN9
RXP9
RXP11
RXN11
RXP10
RXN10
RXP15
RXP12
RXN15
RXN12
RXP13
RXN14
RXP14
RXN13
PEG_RXN2
PEG_RXN3
PEG_RXN5
PEG_RXN7
PEG_RXN11
PEG_RXN13
PEG_RXN15
PEG_RXN12
PEG_RXP8
PEG_RXP5
PEG_RXP3
PEG_RXP0
PEG_RXN0
PEG_RXP2
PEG_RXN4
PEG_RXN9
PEG_RXP11
PEG_RXP14
PEG_RXP4
PEG_RXN6
PEG_RXN10
PEG_RXN1
PEG_RXN8
PEG_RXP13
PEG_RXP7
PEG_RXP12
PEG_RXP10
PEG_RXP15
PEG_RXP9
PEG_RXN14
PEG_RXP6
PEG_RXP1
PEG_TXP0
PEG_TXN2
PEG_TXP1
PEG_TXP2
PEG_TXN1
PEG_TXN3
PEG_TXN0
PEG_TXP5
PEG_TXP4
PEG_TXN4
PEG_TXN5
PEG_TXP3
PEG_TXP8
PEG_TXN6
PEG_TXN7
PEG_TXP7
PEG_TXP6
PEG_TXN8
PEG_TXP10
PEG_TXP9
PEG_TXN10
PEG_TXN9
PEG_TXN11
PEG_TXP13
PEG_TXN12
PEG_TXP12
PEG_TXN13
PEG_TXP11
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
GPIO_AUXWIN
VGA_DDCCLK
VGA_DDCDATA
ATI_RSET
HPD
ATI_VREFG
DVPCNTL_1
DVPCNTL_0
DVPCNTL_3
DVPCNTL_2
EDID_DAT
EDID_CLK
VGA_GPIO11
VGA_GPIO10
VGA_GPIO12
VGA_GPIO13
VGA_GPIO14
VGA_GPIO3
VGA_GPIO2
VGA_GPIO5
VGA_GPIO0
VGA_GPIO9
VGA_GPIO8
VGA_GPIO6
VGA_GPIO7
VGA_GPIO4
VGA_GPIO1
DVOMODE
VGA_GPIO16
ATI_SSOUT
ATI_SSIN
PERSTBPERSTB
VGA_GPIO14
ATI_MODE_0
PEG_RXP[15..0]7
PEG_TXN[15..0]7
PEG_RXN[15..0]7
PEG_TXP[15..0]7
EDID_DAT 19,25
EDID_CLK 19,25
DDC3_CLK 19,25
DDC3_DATA 19,25
CLK_PCIE_PEG#3 CLK_PCIE_PEG3
DDC_DATA 20
DDC_CLK 20
M24_RST#22
PLT_RST1#7,24,26
THERMDP_M24 25
THERMDN_M24 25
LUMA_VGA18 CRMA_VGA18 COMP_VGA18
VGA_VSYNC 20
VGA_HSYNC 20
VGA_BLUE 20
VGA_RED 20
VGA_GREEN 20
TXAOUT1- 19
LCDVDD_ON 19
TXBCLK+ 19
TXBOUT2- 19
TXACLK+ 19
TXBCLK- 19
BL_ON 36
TXAOUT2+ 19
TXBOUT1- 19
TXACLK- 19
TXAOUT2- 19
TXBOUT2+ 19
TXBOUT1+ 19
TXAOUT0+ 19
TXAOUT1+ 19
TXAOUT0- 19
TXBOUT0+ 19
TXBOUT0- 19
VGA_PWRCNTL 45
ATI_MODE_0 15
DVPDATA_1 15
DVPDATA_2 15
DVPDATA_0 15
VGA_ALERT# 25
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S03D3V_S0 3D3V_S0
3D3V_S0
1D2V_VDDR_S0
3D3V_S0
3D3V_S0
3D3V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(1 of 3)
A3
13 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(1 of 3)
A3
13 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(1 of 3)
A3
13 47Monday, July 11, 2005
<Core Design>
GPIO8
GPIO4
GPIO(3:2)
GPIO1
GPIO5
ROMIDCFG(3:0)
LCDDATA(17:16)
0
0000
DEBUG_ACCESS
0
GPIO(9,13:11)
LCDDATA(21)
LCDDATA(20)
GPIO[0..13] are internal
pull-down.
0
0
0
ICOMP
BYPASS_PLL
MULTIFUNC(1:0)
PCIE_MODE(1:0)
PLL_CAL_FORCE_EN
CAL_OFF
DWNGR0
0
VIP_DEVICE
0
GPIO0CAL_BG_BACKUP
GPIO6
DEFAULTPIN
00
0
STRAPS
00
(internal pull-down)
ATI Ref. Datasheets(page 3-32)
DOC.NO.:CHS-216M24-03
DVOMODE=VSS 3.3V MODE
DVOMODE=GND NO USE DVPDATA
DVOMODE=VDDC to 1.8V 1.8V MODE
ATI suggest 0 ohm
DDC_CLK & DATA level shift
adjust SWING at 1.2v
SB
SB
0703 -1
1 2
C454C454
1 2
R84 10KR2
DY
R84 10KR2
DY
1 2
C411C411
1
2 3
GS
D
Q38 2N7002
GS
D
Q38 2N7002
1 2
C457C457
1 2
R499 499R3F
R499 499R3F
12
R505
4K7R2
R505
4K7R2
XIN/CLKIN
1
XOUT
2
PD#
3
LF
4VSS 5
MODOUT 6
REF 7
VDD 8
U57
P2779A-08ST
U57
P2779A-08ST
12
R474
105R3F
R474
105R3F
1 2
C122C122
1 2
R100 10KR2
DY
R100 10KR2
DY
12
R74
150R2
R74
150R2
1 2
C136C136
1 2
R86 10KR2
DY
R86 10KR2
DY
12
R506
4K7R2
R506
4K7R2
1 2
C413C413
1 2
C109C109
1 2
R515 0R2-0
R515 0R2-0
PCIE_RX0N
AG30 PCIE_RX0P
AH30
PCIE_RX10N
R30 PCIE_RX10P
T30
PCIE_RX11N
P29 PCIE_RX11P
R29
PCIE_RX12N
N30 PCIE_RX12P
N29
PCIE_RX13N
M29 PCIE_RX13P
M30
PCIE_RX14N
K29 PCIE_RX14P
L29
PCIE_RX15N
J30 PCIE_RX15P
K30
PCIE_RX1N
AF29 PCIE_RX1P
AG29
PCIE_RX2N
AE30 PCIE_RX2P
AE29
PCIE_RX3N
AD29 PCIE_RX3P
AD30
PCIE_RX4N
AB29 PCIE_RX4P
AC29
PCIE_RX5N
AA30 PCIE_RX5P
AB30
PCIE_RX6N
Y29 PCIE_RX6P
AA29
PCIE_RX7N
W30 PCIE_RX7P
W29
PCIE_RX8N
V29 PCIE_RX8P
V30
PCIE_RX9N
T29 PCIE_RX9P
U29
PCIE_TX0N
AE26 PCIE_TX0P
AF26
PCIE_TX10N
N25 PCIE_TX10P
P25
PCIE_TX11N
N27 PCIE_TX11P
P27
PCIE_TX12N
N26 PCIE_TX12P
P26
PCIE_TX13N
K25 PCIE_TX13P
L25
PCIE_TX14N
K27 PCIE_TX14P
L27
PCIE_TX15N
K26 PCIE_TX15P
L26
PCIE_TX1N
AB25 PCIE_TX1P
AC25
PCIE_TX2N
AB27 PCIE_TX2P
AC27
PCIE_TX3N
AB26 PCIE_TX3P
AC26
PCIE_TX4N
W25 PCIE_TX4P
Y25
PCIE_TX5N
W27 PCIE_TX5P
Y27
PCIE_TX6N
W26 PCIE_TX6P
Y26
PCIE_TX7N
T25 PCIE_TX7P
U25
PCIE_TX8N
T27 PCIE_TX8P
U27
PCIE_TX9N
T26 PCIE_TX9P
U26
PCIE_REFCLKN
AE27 PCIE_REFCLKP
AF27
PCIE_CALI
AB23 PCIE_CALRN
AB24 PCIE_CALRP
AC23
PCIE_TEST
AE25
PERSTB
AD25
PERSTB_MASK
AD24
R2SET
AH21
C_R_PR
AJ22
COMP_B_PB
AK22
H2SYNC
AJ24
V2SYNC
AK24
DDC3CLK
AG22
DDC3DATA
AG23
Y_G
AK21
SSIN
AJ23
SSOUT
AH24
XTALIN
AH28
XTALOUT
AJ29
TEST_MCLK
B6 TEST_YCLK
E8 TESTEN
AH27
PLLTEST
AF25
STEREOSYNC
AH25
GPIO_0 AJ5
GPIO_1 AH5
GPIO_10 AH2
GPIO_11 AH1
GPIO_12 AG3
GPIO_13 AG1
GPIO_14 AG2
GPIO_17 C6
GPIO_2 AJ4
GPIO_3 AK4
GPIO_4 AH4
GPIO_5 AF4
GPIO_6 AJ3
GPIO_7 AK3
GPIO_8 AH3
GPIO_9 AJ2
GPIO_MEMSSIN AF2
GPIO_PWRCNTL AF3
DVPDATA_0 AH6
DVPDATA_1 AJ6
DVPDATA_10 AK9
DVPDATA_11 AH10
DVPDATA_12 AE6
DVPDATA_13 AG6
DVPDATA_14 AF6
DVPDATA_15 AE7
DVPDATA_16 AF7
DVPDATA_17 AE8
DVPDATA_18 AG8
DVPDATA_19 AF8
DVPDATA_2 AK6
DVPDATA_20 AE9
DVPDATA_21 AF9
DVPDATA_22 AG10
DVPDATA_23 AF10
DVPDATA_3 AH7
DVPDATA_4 AK7
DVPDATA_5 AJ7
DVPDATA_6 AH8
DVPDATA_7 AJ8
DVPDATA_8 AH9
DVPDATA_9 AJ9
DVOVMODE AE10
DVPCNTL_0 AJ10
DVPCNTL_1 AK10
DVPCNTL_2 AJ11
DVPCNTL_3 AH11
VREFG AG4
TXOUT_L0N AH15
TXOUT_L0P AH16
TXOUT_L1N AJ16
TXOUT_L1P AJ17
TXOUT_L2N AJ18
TXOUT_L2P AK18
TXOUT_L3N AJ20
TXOUT_L3P AJ21
TXOUT_U0N AG16
TXOUT_U0P AG17
TXOUT_U1N AF16
TXOUT_U1P AF17
TXOUT_U2N AE18
TXOUT_U2P AE19
TXOUT_U3N AF19
TXOUT_U3P AF20
TXCLK_LN AK19
TXCLK_LP AJ19
TXCLK_UN AG19
TXCLK_UP AG20
DIGON AE12
BLON AG12
TX0P AJ13
TX1M AJ14
TX1P AJ15
TX2M AK15
TX2P AK16
TXCM AJ12
TXCP AK12
DDC2CLK AE13
DDC2DATA AE14
HPD1 AF12
TX0M AK13
RAK27
GAJ27
BAJ26
HSYNC AJ25
VSYNC AK25
RSET AH26
DDC1DATA AG25
DDC1CLK AF24
GPIO_AUXWIN AG24
DPLUS AF11
DMINUS AE11
1 OF 6
THERM DAC1
SS
CLK DAC2
TMDS LVDS
PCI EXPRESS DVO / EXT TMDS / GPIO
U20A
M26-P-1
1 OF 6
THERM DAC1
SS
CLK DAC2
TMDS LVDS
PCI EXPRESS DVO / EXT TMDS / GPIO
U20A
M26-P-1
1 2
C456C456
12
R57
0R2-0
R57
0R2-0
12
R71
150R2
R71
150R2
1 2
R56 620R3F
R56 620R3F
1 2
C134C134
1 2
C110
SCD1U16V
C110
SCD1U16V
1 2
R516 10KR2
DY
R516 10KR2
DY
1 2
R435 0R2-0
DY
R435 0R2-0
DY
1 2
R85 10KR2
DY
R85 10KR2
DY
1 2
C455C455
12
R444
182R3F
R444
182R3F
1 2
R70 10KR2R70 10KR2
1 2
R654 0R2-0
DY
R654 0R2-0
DY
1 2
R101 10KR2
DY
R101 10KR2
DY
12
R509
DUMMY-R2
R509
DUMMY-R2
1 2
C137C137
12
R513
10KR2
R513
10KR2
1 2
C392C392
BC90
SC6P50V3DN
BC90
SC6P50V3DN
1 2
R434 0R2-0
DY
R434 0R2-0
DY
1 2
C146C146
A
1
B
2
GND
3Y4
VCC 5
U62
NC7S08-U
U62
NC7S08-U
12
R507
100R2F
R507
100R2F
1 2
R501 10KR2
R501 10KR2
1 2
C123C123
1 2
R653
0R2-0
R653
0R2-0
12
R472
0R5J-1
R472
0R5J-1
1 2
C391C391
1 2
R514 100KR2
R514 100KR2
12
R508
100R2F
R508
100R2F
1 2
C436C436
1 2
R106 10KR2
DY
R106 10KR2
DY
1 2
R447 150R2FR447 150R2F
12
R73
150R2
R73
150R2
12
R481
DUMMY-R2
R481
DUMMY-R2
1 2
C112C112
12
R443
1MR2
R443
1MR2
1 2
R500 4K7R2
R500 4K7R2
1 2
C435C435
1 2
R78 0R2-0R78 0R2-0
1 2
R525
0R2-0
DY
R525
0R2-0
DY
1 2
R107 10KR2
DY
R107 10KR2
DY
1 2
C111C111
1 2
R520 100R2FR520 100R2F
12
R504
10KR2
R504
10KR2
1 2
X5
XTAL-27MHZ-3-U1
X5
XTAL-27MHZ-3-U1
12
R445
4K7R2
R445
4K7R2
1 2
R511 10KR2
DY
R511 10KR2
DY
1 2
C433C433
1 2
R524
0R2-0
R524
0R2-0
1 2
R77 0R2-0R77 0R2-0
1 2
C390C390
1 2
R138 1KR2R138 1KR2
1 2
R480
0R2-0
R480
0R2-0
1 2
C434C434
12
C64
SC270P50V
C64
SC270P50V
12
R446
4K7R2
R446
4K7R2
1 2
C121C121
12
C381
SCD1U16V
C381
SCD1U16V
1 2
R83 10KR2
DY
R83 10KR2
DY
1 2
R99 1KR2R99 1KR2
1 2
R448 10KR2F-UR448 10KR2F-U
12
R503
DUMMY-R2
R503
DUMMY-R2
1 2
R477
150R2
R477
150R2
1 2
C135C135
1 2
R98 10KR2R98 10KR2
12
C65
SCD1U16V3KX
C65
SCD1U16V3KX
1 2
R517 10KR2
DY
R517 10KR2
DY
1 2
C393C393
1 2
R75 0R2-0R75 0R2-0
1 2
R537 1KR2R537 1KR2
1 2
R478
150R2
R478
150R2
1 2
R502 715R3
R502 715R3
1 2
C133C133
1 2
C120C120
1 2
R76 0R2-0R76 0R2-0
1 2
C147C147
1 2
R479
150R2
R479
150R2
12
C360
SCD1U16V
C360
SCD1U16V
1 2
R87 10KR2
DY
R87 10KR2
DY
1 2
R82 10KR2
R82 10KR2
1 2
C412C412
1 2
C145C145
1
2 3
GS
D
Q37
2N7002
GS
D
Q37
2N7002
1 2
R510 10KR2
DY
R510 10KR2
DY
1 2
C414C414
12
BC95
SC22P
BC95
SC22P
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
3D3V_VDDR3
PCIE_PVDD
PCIE_PVDD_1D8V
3D3V_VDDR4
APL1085_ADJ
MPVDD_1D8V
A2VDDQ_1D8V
A2VDD_2D5V
VDDRH
PVDD_1D8V
VDD1DI_1D8V
LPVDD_1D8V
LVDDR_1D8V
AVDD_1D8V
LVDDR_2D8V_S0
2D8V_SET
PCIE_VDDR
VDDRH
3D3V_S0
3D3V_S0
1D5V_S0
1D2V_VGA_S0
3D3V_S0
3D3V_S0
3D3V_S0
1D8V_VGA_S0
1D5V_1_S0
1D2V_VGA_S0
1D2V_VGA_S0
1D2V_VDDR_S0
1D2V_VDDR_S0
1D8V_VGA_S0
VRAM_VDDQ
1D8V_VGA_S0
1D8V_VGA_S0
1D8V_VGA_S0
LVDDR_2D8V
2D5V_S0
1D8V_VGA_S0
1D8V_VGA_S0
1D8V_VGA_S0
1D8V_VGA_S0
3D3V_S0
VRAM_VDDQ VRAM_VDDQ
LVDDR_2D8V
LVDDR_2D8V
VRAM_VDDQ
1D5V_VGA_S0
3D3V_S0
1D5V_VGA_S0
1D5V_1_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(2 of 3)
A3
14 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(2 of 3)
A3
14 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(2 of 3)
A3
14 47Thursday, July 07, 2005
<Core Design>
PLACED CLOSE TO THE POWER/GND PINS
ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED
WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC
Imax=1A
Vo=1.25/110*(110+48.7)=1.803V
1.8V
1.8V
1.2V
1.2V
1.2V
1.5V
3.3V
3.3V
3D3_VDDR3
3D3_VDDR4
2D5_VDDR1
1D2_VDDC
M26 Power UP Squence
1.8V
2.8V
2.5V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
T1 < 1mS
T2 < 1mS
/PCIE_PVDD_12
VDD_15
T3 < 1mS
T4 < 1mS
PCIE_PVDD_18
PCIE_VDDR_12
T5 --
T6 --
T5 time delay between full PCIE_PVDD_18 and
90% of PCIE_VDDR_12
T6 time delay between full PCIE_VDDR_12 and
90% of 1D2_VDDC
TO VDDC RAIL
WHILE VDDC REGULATOR
STABALIZES DURING POWER ON
DIODE SUPPLIES POWER
SC
SC
SC
12
C479
SCD01U16V3KX
C479
SCD01U16V3KX
12
C382
SCD01U16V3KX
C382
SCD01U16V3KX
1 2
R669 0R2-0
DY
R669 0R2-0
DY
12
C343
SC22P
C343
SC22P
12
C348
SC10U10V6ZY-U
C348
SC10U10V6ZY-U
2 1
D7
SSM5818SL
D7
SSM5818SL
12
C478
SC1U10V3ZY
C478
SC1U10V3ZY
12
C416
SCD01U16V3KX
C416
SCD01U16V3KX
12
C396
SC1U10V3ZY
C396
SC1U10V3ZY
12
C465
SCD01U16V3KX
DY
C465
SCD01U16V3KX
DY
12
C468
SCD01U16V3KX
C468
SCD01U16V3KX
12
C361
SC22U10V6ZY-L1
C361
SC22U10V6ZY-L1
2 1
D9
SSM5818SL
D9
SSM5818SL
12
C364
SC10U10V6ZY-U
C364
SC10U10V6ZY-U
1 2
L33
MLB-201209-11
L33
MLB-201209-11
12
C481
SC10U10V6ZY-U
C481
SC10U10V6ZY-U
12
C421
SCD01U16V3KX
C421
SCD01U16V3KX
12
C458
SCD01U16V3KX
DY
C458
SCD01U16V3KX
DY
GND 1
VOUT 2
VIN
3
U83
APL5308-15AC-TR
DY
U83
APL5308-15AC-TR
DY
12
C463
SCD01U16V3KX
C463
SCD01U16V3KX
12
C462
SCD01U16V3KX
DY
C462
SCD01U16V3KX
DY
12
C69
SC1U10V3ZY
DY
C69
SC1U10V3ZY
DY
1 2
L32
MLB-201209-11
L32
MLB-201209-11
12
C355
SC10U10V6ZY-U
C355
SC10U10V6ZY-U
12
C469
SCD01U16V3KX
C469
SCD01U16V3KX
1 2
L37
MLB-201209-11
L37
MLB-201209-11
1 2
R126
GAP-CLOSE-PWR
R126
GAP-CLOSE-PWR
12
C460
SC1U10V3ZY
C460
SC1U10V3ZY
12
C619
SC2D2U10V3ZY
DY
C619
SC2D2U10V3ZY
DY
12
C466
SC1U10V3ZY
C466
SC1U10V3ZY
1 2
R668 0R2-0R668 0R2-0
1 2
L25
MLB-201209-11
L25
MLB-201209-11
12
C437
SC1U10V3ZY
C437
SC1U10V3ZY
12
C363
SC1U10V3ZY
C363
SC1U10V3ZY
12
C476
SC1U10V3ZY
C476
SC1U10V3ZY
12
C444
SC10U10V6ZY-U
C444
SC10U10V6ZY-U
12
EC119
SCD1U10V2MX-1
DY
EC119
SCD1U10V2MX-1
DY
12
C443
SCD01U16V3KX
C443
SCD01U16V3KX
1 2
R60
GAP-CLOSE-PWR
R60
GAP-CLOSE-PWR
12
C67
SCD1U16V3KX
C67
SCD1U16V3KX
1 2
L26
MLB-201209-11
L26
MLB-201209-11
12
C464
SCD01U16V3KX
C464
SCD01U16V3KX
12
C441
SCD01U16V3KX
DY
C441
SCD01U16V3KX
DY
12
C353
SC1U10V3ZY
C353
SC1U10V3ZY
12
C486
SC10U10V6ZY-U
C486
SC10U10V6ZY-U
12
C419
SC22U10V6ZY-L1
C419
SC22U10V6ZY-L1
12
C375
SC1U10V3ZY
C375
SC1U10V3ZY
12
C68
SCD1U16V3KX
C68
SCD1U16V3KX
12
C349
SC1U10V3ZY
C349
SC1U10V3ZY
1 2
L3
MLB-201209-11
L3
MLB-201209-11
12
R48
110R3
R48
110R3
12
C422
SC1U10V3ZY
DY
C422
SC1U10V3ZY
DY
12
C399
SC1U10V3ZY
C399
SC1U10V3ZY
12
C475
SCD01U16V3KX
C475
SCD01U16V3KX
12
R417
124KR2F
R417
124KR2F
12
C397
SCD1U16V2KX-1
C397
SCD1U16V2KX-1
12
C438
SC1U10V3ZY
C438
SC1U10V3ZY
12
C378
SC100P
C378
SC100P
1 2
L36
MLB-201209-11
L36
MLB-201209-11
12
C440
SC1U10V3ZY
C440
SC1U10V3ZY
12
C400
SCD01U16V3KX
C400
SCD01U16V3KX
12
C461
SC1U10V3ZY
DY
C461
SC1U10V3ZY
DY
12
C365
SC10U10V6ZY-U
C365
SC10U10V6ZY-U
12
C66
SC10U10V6ZY-U
C66
SC10U10V6ZY-U
12
C424
SCD01U16V3KX
C424
SCD01U16V3KX
12
C420
SC1U10V3ZY
C420
SC1U10V3ZY
12
C395
SC1U10V3ZY
C395
SC1U10V3ZY
ADJ/GND 1
VOUT 2
VIN 3
U14
APL1087
U14
APL1087
12
C470
SC10U10V6ZY-U
DY
C470
SC10U10V6ZY-U
DY
12
C347
SC10U10V6ZY-U
C347
SC10U10V6ZY-U
12
C354
SC1U10V3ZY
C354
SC1U10V3ZY
12
C459
SCD01U16V3KX
C459
SCD01U16V3KX
12
C98
SC47U6D3V0ZY
C98
SC47U6D3V0ZY
12
C85
SC10U10V6ZY-U
C85
SC10U10V6ZY-U
12
C362
SC1U10V3ZY
C362
SC1U10V3ZY
12
C144
SC22U10V6ZY-L1
C144
SC22U10V6ZY-L1
12
C418
SC1U10V3ZY
C418
SC1U10V3ZY
12
C86
SC1U10V3ZY
C86
SC1U10V3ZY
12
C398
SC100P
C398
SC100P
1 2
R58
GAP-CLOSE-PWR
R58
GAP-CLOSE-PWR
12
C467
SC1U10V3ZY
DY
C467
SC1U10V3ZY
DY
12
C446
SCD01U16V3KX
C446
SCD01U16V3KX
12
C417
SC1U10V3ZY
C417
SC1U10V3ZY
12
R45
48D7R3F
R45
48D7R3F
12
C423
SC1U10V3ZY
C423
SC1U10V3ZY
12
C477
SC10U10V6ZY-U
C477
SC10U10V6ZY-U
12
C439
SCD01U16V3KX
C439
SCD01U16V3KX
12
C377
SC1U10V3ZY
C377
SC1U10V3ZY
12
C374
SC10U10V6ZY-U
C374
SC10U10V6ZY-U
12
C350
SC10U10V5ZY-L
C350
SC10U10V5ZY-L
VDDR1
A15
VDDR1
A21
VDDR1
A28
VDDR1
A3
VDDR1
A9
VDDR1
AA1
VDDR1
AA4
VDDR1
AA7
VDDR1
AA8
VDDR1
AD4
VDDR1
B1
VDDR1
B30
VDDR1
D11
VDDR1
D14
VDDR1
D17
VDDR1
D20
VDDR1
D23
VDDR1
D26
VDDR1
D5
VDDR1
D8
VDDR1
E27
VDDR1
F4
VDDR1
G10
VDDR1
G13
VDDR1
G15
VDDR1
G19
VDDR1
G22
VDDR1
G27
VDDR1
G7
VDDR1
H10
VDDR1
H13
VDDR1
H15
VDDR1
H17
VDDR1
H19
VDDR1
H22
VDDR1
J1
VDDR1
J4
VDDR1
J7
VDDR1
J8
VDDR1
K23
VDDR1
K24
VDDR1
L23
VDDR1
L8
VDDR1
M4
VDDR1
N4
VDDR1
N7
VDDR1
N8
VDDR1
R1
VDDR1
R4
VDDR1
T7
VDDR1
T8
VDDR1
V4
VDDR1
V7
VDDR1
V8
LPVDD
AH19
TPVDD
AH13
TXVDDR
AF13
TXVDDR
AF14
VDDRH0
F18
VDDRH1
N6
A2VDD
AF21
A2VDD
AE20
A2VDDQ
AF23
AVDD
AH23
VDD1DI
AE23
VDD2DI
AE22
PVDD
AK28
MPVDD
A7
LVDDR_25
AE16
LVDDR_25
AE17
LVDDR_18
AE15
LVDDR_18
AF15
VDDC AC13
VDDC AC15
VDDC AC17
VDDC AD13
VDDC AD15
VDD15 AC11
VDD15 AC20
VDD15 H11
VDD15 H20
VDD15 M23
VDD15 P8
VDD15 Y23
VDD15 Y8
VDDR3 AC19
VDDR3 AC21
VDDR3 AC22
VDDR3 AC8
VDDR3 AD19
VDDR3 AD21
VDDR3 AD7
VDDR4 AC10
VDDR4 AC9
VDDR4 AD10
VDDR4 AD9
VDDR4 AG7
PCIE_VDDR_12 AG26
PCIE_VDDR_12 AG27
PCIE_VDDR_12 AG28
PCIE_VDDR_12 AJ30
PCIE_VDDR_12 AK29
PCIE_PVDD_12 N23
PCIE_PVDD_12 N24
PCIE_PVDD_12 P23
PCIE_PVDD_18 T23
PCIE_PVDD_18 U23
PCIE_PVDD_18 V23
PCIE_PVDD_18 W23
NC#D9 D9
NC#D13 D13
NC#D19 D19
NC#D25 D25
NC#E4 E4
NC#T4 T4
NC#AB4 AB4
AVSSQ AD22
LVSSR AF18
LVSSR AG15
LVSSR AG18
LVSSR AH17
LPVSS AH18
TPVSS AH12
TXVSSR AG13
TXVSSR AG14
TXVSSR AH14
VSSRH0 F19
VSSRH1 M6
A2VSSN AH20
A2VSSN AG21
A2VSSQ AF22
AVSSN AH22
VSS1DI AE24
VSS2DI AE21
PVSS AJ28
MPVSS A6
4 OF 6
I/O
POWER
U20D
M26-P-1
4 OF 6
I/O
POWER
U20D
M26-P-1
1 2
L4
MLB-201209-11
L4
MLB-201209-11
12
C442
SCD01U16V3KX
C442
SCD01U16V3KX
12
C376
SC1U10V3ZY
C376
SC1U10V3ZY
SHDN#
1
GND
2
IN
3OUT 4
SET 5
U55
G913C-U
U55
G913C-U
12
TC21
SE220U2VDM-6
TC21
SE220U2VDM-6
1 2
R475
GAP-CLOSE-PWR
R475
GAP-CLOSE-PWR
1 2
L28
MLB-201209-11
L28
MLB-201209-11
12
TC19
ST100U6D3VM-U
TC19
ST100U6D3VM-U
12
C90
SC10U10V6ZY-U
C90
SC10U10V6ZY-U
12
C415
SC1U10V3ZY
C415
SC1U10V3ZY
12
R418
100KR2F
R418
100KR2F
1 2
R449 0R5J-1
R449 0R5J-1
12
C394
SCD01U16V3KX
C394
SCD01U16V3KX
12
C445
SCD01U16V3KX
DY
C445
SCD01U16V3KX
DY
1 2
L34
MLB-201209-11
L34
MLB-201209-11
12
C344
SC1U10V3ZY
C344
SC1U10V3ZY
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
MDB57
MDB25
MDB13
MDB55
MDB56
MDB15
MDB7
MDB5
MDB49
MDB33
MDB6
MDB2
MDB40
MDB41
MDB63
MDB26
MDB16
MDB44
MDB39
MDB62
MDB17
MDB11
MDB4
MDB52
MDB58
MDB23
MDB36
MDB34
MDB1
MDB42
MDB60
MDB14
MDB61
MDB37
MDB31
MDB27
MDB18
MDB59
MDB53
MDB43
MDB21
MDB3
MDB45
MDB46
MDB24
MDB12
MDB10
MDB30
MDB28
MDB9
MDB47
MDB50
MDB38
MDB8
MDB0
MDB35
MDB29
MDB20
MDB51
MDB54
MDB48
MDB32
MDB22
MDB19
MDA45
MDA21
MDA39
MDA33
MDA54
MDA12
MDA36
MDA49
MDA5
MDA19
MDA46
MDA7
MDA15
MDA56
MDA55
MDA22
MDA59
MDA61
MDA58
MDA13
MDA25
MDA57
MDA8
MDA4
MDA16
MDA43
MDA26
MDA2
MDA35
MDA27
MDA60
MDA1
MDA62
MDA6
MDA48
MDA29
MDA10
MDA34
MDA40
MDA47
MDA14
MDA51
MDA18
MDA50
MDA24
MDA23
MDA17
MDA20
MDA42
MDA41
MDA37
MDA52
MDA32
MDA28
MDA30
MDA11
MDA44
MDA0
MDA38
MDA9
MDA3
MDA53
MDA31
MDA63
CKEA
CKEB
MAA3
MAA9
DQMA#2
MAA12
QSA7
MAA8
DQMA#6
DQMA#3
QSA0
MAA2
MAA7
MAA11
DQMA#4
MAA4
MAA13
QSA1
DQMA#7
QSA3
MAA1
MAA10
DQMA#0
QSA4
QSA5
MAA5
MAA0
MAA6
QSA2
DQMA#1
DQMA#5
QSA6
CLKA#0_R
CLKA1_R
CLKA0_R
CLKA#1_R
ATI_MVREFD
ATI_MVREFS
DIMA_1
DIMA_0
QSB6
QSB7
QSB0
QSB5
DQMB#7
DQMB#4
DQMB#1
DQMB#2
DQMB#0
DQMB#3
QSB1
QSB2
QSB3
QSB4
DQMB#5
DQMB#6
MAB4
MAB1
MAB0
MAB3
MAB2
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
CLKB#1_R
DIMB_1
DIMB_0
ROMCS#
CLKB0_R
CLKB#0_R
CLKB1_R
ATI_MODE_0
ATI_MODE_1
MEMTEST
VDDCI
MDA[63..0]16 MDB[63..0]17
DVPDATA_2 13
DVPDATA_1 13
DVPDATA_0 13
DQMA#[7..0] 16
QSA[7..0] 16
MAA[13..0] 16
CSA#1 16
WEA# 16
CSA#0 16
RASA# 16
CASA# 16
CKEA 16
CLKA0 16
CLKA#0 16
CLKA1 16
CLKA#1 16
MAB[13..0] 17
QSB[7..0] 17
DQMB#[7..0] 17
CSB#1 17
RASB# 17
CASB# 17
WEB# 17
CSB#0 17
CKEB 17
CLKB0 17
CLKB#0 17
CLKB1 17
CLKB#1 17
ATI_MODE_0 13
1D2V_VGA_S0
VRAM_VDDQ
VRAM_VDDQ 1D8V_VGA_S0
VRAM_VDDQ
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(3 of 3)
A3
15 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(3 of 3)
A3
15 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI(3 of 3)
A3
15 47Thursday, July 07, 2005
<Core Design>
MEMORY CHANNEL BMEMORY CHANNEL A
VDDR1 MEMVMODE_0 MEMVMODE_1
1.8V
2.5V
2.8V
+VDDC_CTGND
GND+VDDC_CT
+VDDC_CT +VDDC_CT
VRAM Selection
Vendor/Size
HYNIX/128M 000
SAMSUNG/128M
SETTING
DVPDATA_[2:0]
001
010
011
100
101
110
111
RESERVED
RESERVED
RESERVED
As close to
CHIP as
possible
ATI suggest
RESERVED
RESERVED
RESERVED
Hynix : HY5DS573222F(P)-28 (8Mx32)
Samsung : K4D553235F-VC2A (8Mx32)
Samsng : 72.45532.M0U
Hynix : 72.55732.B0U
12
R545
10KR2
R545
10KR2
12
C162
SCD1U16V
C162
SCD1U16V
1 2
R544 DUMMY-R2R544 DUMMY-R2
12
C163
SCD1U16V
C163
SCD1U16V
1 2
R129 10R2R129 10R2
12
C380
SC10U10V6ZY-U
C380
SC10U10V6ZY-U
TP25TP25
12
R133
100R2
R133
100R2
1 2
R128 10R2R128 10R2
TP24TP24
1 2
L35
MLB-201209-11
L35
MLB-201209-11
DQB_0
D7
DQB_1
F7
DQB_2
E7
DQB_3
G6
DQB_4
G5
DQB_5
F5
DQB_6
E5
DQB_7
C4
DQB_8
B5
DQB_9
C5
DQB_10
A4
DQB_11
B4
DQB_12
C2
DQB_13
D3
DQB_14
D1
DQB_15
D2
DQB_16
G4
DQB_17
H6
DQB_18
H5
DQB_19
J6
DQB_20
K5
DQB_21
K4
DQB_22
L6
DQB_23
L5
DQB_24
G2
DQB_25
F3
DQB_26
H2
DQB_27
E2
DQB_28
F2
DQB_29
J3
DQB_30
F1
DQB_31
H3
DQB_32
U6
DQB_33
U5
DQB_34
U3
DQB_35
V6
DQB_36
W5
DQB_37
W4
DQB_38
Y6
DQB_39
Y5
DQB_40
U2
DQB_41
V2
DQB_42
V1
DQB_43
V3
DQB_44
W3
DQB_45
Y2
DQB_46
Y3
DQB_47
AA2
DQB_48
AA6
DQB_49
AA5
DQB_50
AB6
DQB_51
AB5
DQB_52
AD6
DQB_53
AD5
DQB_54
AE5
DQB_55
AE4
DQB_56
AB2
DQB_57
AB3
DQB_58
AC2
DQB_59
AC3
DQB_60
AD3
DQB_61
AE1
DQB_62
AE2
DQB_63
AE3
MAB_0 N5
MAB_1 M1
MAB_2 M3
MAB_3 L3
MAB_4 L2
MAB_5 M2
MAB_6 M5
MAB_7 P6
MAB_8 N3
MAB_9 K2
MAB_10 K3
MAB_11 J2
MAB_12 P5
MAB_13 P3
MAB_14 P2
DQMB_3# G3
DQMB_4# W6
DQMB_5# W2
DQMB_6# AC6
DQMB_7# AD2
DQMB_0# E6
DQMB_1# B2
DQMB_2# J5
QSB_0 F6
QSB_1 B3
QSB_2 K6
QSB_3 G1
QSB_4 V5
QSB_5 W1
QSB_6 AC5
QSB_7 AD1
RASB# R2
CASB# T5
WEB# T6
CSB_0# R5
CSB_1# R6
CKEB R3
CLKB0 N1
CLKB0# N2
CLKB1 T2
CLKB1# T3
NC_DIMB_0 E3
NC_DIMB_1 AA3
ROMCS# AF5
NC_MEMVMODE_1 C7
MEMTEST C8
3 OF 6
MEMORY INTERFACE
B
U20C
M26-P-1
3 OF 6
MEMORY INTERFACE
B
U20C
M26-P-1
TP5TP5
TP4TP4
1 2
R131 10R2R131 10R2
TP6TP6
1 2
R121 10R2R121 10R2
1 2
R130 10KR2
R130 10KR2
12
C379
SC1U10V3ZY
C379
SC1U10V3ZY
1 2
R132 10R2R132 10R2
VSS
A2
VSS
A10
VSS
A16
VSS
A22
VSS
A29
VSS
C1
VSS
C3
VSS
C28
VSS
C30
VSS
D27
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
D10
VSS
D6
VSS
D4
VSS
F27
VSS
G9
VSS
G12
VSS
G16
VSS
G18
VSS
G21
VSS
G24
VSS
H27
VSS
H23
VSS
H21
VSS
H18
VSS
H16
VSS
H14
VSS
H12
VSS
H9
VSS
H8
VSS
H4
VSS
J23
VSS
J24
VSS
AD12
VSS
AG5
VSS
AG9
VSS
AG11
VSS
R7
VSS
P4
VSS
M7
VSS
M8
VSS
L4
VSS
K1
VSS
K7
VSS
K8
VSS
R8
VSS
T1
VSS U4
VSS U8
VSS W7
VSS W8
VSS Y4
VSS AB8
VSS AB7
VSS AB1
VSS AC4
VSS AC12
VSS AC14
VSS AD16
VSS AC16
VSS AC18
VSS AD18
VSS AK2
VSS AJ1
PCIE_VSS K28
PCIE_VSS L28
PCIE_VSS M27
PCIE_VSS M26
PCIE_VSS M24
PCIE_VSS M25
PCIE_VSS M28
PCIE_VSS P28
PCIE_VSS N28
PCIE_VSS R25
PCIE_VSS R23
PCIE_VSS R24
PCIE_VSS R26
PCIE_VSS R27
PCIE_VSS R28
PCIE_VSS T28
PCIE_VSS T24
PCIE_VSS U28
PCIE_VSS V24
PCIE_VSS V26
PCIE_VSS V27
PCIE_VSS V25
PCIE_VSS V28
PCIE_VSS Y28
PCIE_VSS W24
PCIE_VSS W28
PCIE_VSS AA26
PCIE_VSS AA27
PCIE_VSS AA23
PCIE_VSS AA24
PCIE_VSS AA25
PCIE_VSS AA28
PCIE_VSS AB28
PCIE_VSS AC28
PCIE_VSS AD28
PCIE_VSS AD26
PCIE_VSS AD27
PCIE_VSS AE28
PCIE_VSS AF28
PCIE_VSS AH29
5 OF 6
CORE GND
U20E
5 OF 6
CORE GND
U20E
VDDC
P17
VDDC
P18
VDDC
P19
VDDC
U12
VDDC
U13
VDDC
U14
VDDC
U17
VDDC
U18
VDDC
U19
VDDC
V19
VDDC
V18
VDDC
V17
VDDC
V14
VDDC
V13
VDDC
V12
VDDC
N18
VDDC
N17
VDDC
N14
VDDC
W17
VDDC
W18
VDDC
W12
VDDC
W13
VDDC
W14
VDDC
N13
VDDC
N19
VDDC
M19
VDDC
M18
VDDC
M12
VDDC
N12
VDDC
M13
VDDC
M14
VDDC
P12
VDDC
P13
VDDC
P14
VDDC
M17
VDDC
W19
VSS M16
VSS N16
VSS N15
VSS P15
VSS P16
VSS R18
VSS R17
VSS R16
VSS R15
VSS R14
VSS R13
VSS R12
VSS T13
VSS T14
VSS T15
VSS W15
VSS V16
VSS V15
VSS U15
VSS U16
VSS T19
VSS T18
VSS T17
VSS T16
VDDCI W16
VDDCI M15
VDDCI R19
VDDCI T12
6 OF 6
ARRAYCENTER
U20F
M26-P-1
6 OF 6
ARRAYCENTER
U20F
M26-P-1
1 2
R526 10KR2
R526 10KR2
1 2
R120 10R2R120 10R2
12
R135
240R2J
R135
240R2J
1 2
R122 10R2R122 10R2
12
R483
10KR2
R483
10KR2
12
R538
DUMMY-R2
R538
DUMMY-R2
1 2
R119 10R2R119 10R2
DQA_0
H28
DQA_1
H29
DQA_2
J28
DQA_3
J29
DQA_4
J26
DQA_5
H25
DQA_6
H26
DQA_7
G26
DQA_8
G30
DQA_9
D29
DQA_10
D28
DQA_11
E28
DQA_12
E29
DQA_13
G29
DQA_14
G28
DQA_15
F28
DQA_16
G25
DQA_17
F26
DQA_18
E26
DQA_19
F25
DQA_20
E24
DQA_21
F23
DQA_22
E23
DQA_23
D22
DQA_24
B29
DQA_25
C29
DQA_26
C25
DQA_27
C27
DQA_28
B28
DQA_29
B25
DQA_30
C26
DQA_31
B26
DQA_32
F17
DQA_33
E17
DQA_34
D16
DQA_35
F16
DQA_36
E15
DQA_37
F14
DQA_38
E14
DQA_39
F13
DQA_40
C17
DQA_41
B18
DQA_42
B17
DQA_43
B15
DQA_44
C13
DQA_45
B14
DQA_46
C14
DQA_47
C16
DQA_48
A13
DQA_49
A12
DQA_50
C12
DQA_51
B12
DQA_52
C10
DQA_53
C9
DQA_54
B9
DQA_55
B10
DQA_56
E13
DQA_57
E12
DQA_58
E10
DQA_59
F12
DQA_60
F11
DQA_61
E9
DQA_62
F9
DQA_63
F8
MAA_0 E22
MAA_1 B22
MAA_2 B23
MAA_3 B24
MAA_4 C23
MAA_5 C22
MAA_6 F22
MAA_7 F21
MAA_8 C21
MAA_9 A24
MAA_10 C24
MAA_11 A25
MAA_12 E21
MAA_13 B20
MAA_14 C19
DQMA_0# J25
DQMA_1# F29
DQMA_2# E25
DQMA_3# A27
DQMA_4# F15
DQMA_5# C15
DQMA_6# C11
DQMA_7# E11
QSA_0 J27
QSA_1 F30
QSA_2 F24
QSA_3 B27
QSA_4 E16
QSA_5 B16
QSA_6 B11
QSA_7 F10
RASA# A19
CASA# E18
WEA# E19
CSA_0# E20
CSA_1# F20
CKEA B19
CLKA0 B21
CLKA0# C20
CLKA1 C18
CLKA1# A18
MVREFD B7
MVREFS B8
NC_DIMA_0 D30
NC_DIMA_1 B13
2 OF 6
MEMORY INTERFACE
A
U20B
M26-P-1
2 OF 6
MEMORY INTERFACE
A
U20B
M26-P-1
12
R484
10KR2
R484
10KR2
1 2
R80 DUMMY-R2R80 DUMMY-R2
1 2
R539 DUMMY-R2R539 DUMMY-R2
1 2
R81 DUMMY-R2R81 DUMMY-R2
12
R134
100R2
R134
100R2
12
R482
10KR2
R482
10KR2
12
R136
100R2
R136
100R2
1 2
R79 DUMMY-R2R79 DUMMY-R2
12
R137
100R2
R137
100R2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAA13
MAA12
CSA#0
VDDR_VREF1
RASA#
CASA#
MDA43
MDA42
MDA41
MDA44
MDA45
MDA46
MDA47
MDA40
MDA9
MDA3
MDA13
MDA2
MDA7
MDA14
MDA5
MDA10
MDA12
MDA6
MDA11
MDA15
MDA4
MDA8
MDA0
MDA1
MDA25
BC108_1
WEA#
MDA24
MDA30
MDA31
MDA26
MDA29
MDA27
MDA28
CSA#1
MDA19
MDA16
MDA21
MDA23
MDA22
MDA18
MDA20
MDA17
MAA13
MAA12
MDA59
MDA60
MDA56
MDA57
MDA61
MDA63
MDA58
MDA62
MDA32
MDA35
MDA39
MDA38
MDA37
MDA36
MDA34
MDA33
VDDR_VREF2
CKEA
MDA49
MDA50
MDA51
MDA53
MDA54
MDA48
MDA52
MDA55
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA0
MAA1
MAA2
MAA3
MAA4
MAA8
MAA9
MAA5
MAA6
MAA10
MAA7
MAA11
BC107_1
QSA1
DQMA#1
QSA2
DQMA#2
DQMA#0
QSA0
QSA3
DQMA#3
QSA5
DQMA#5
QSA6
DQMA#6
QSA4
DQMA#4
QSA7
DQMA#7
MDA[0..63]15
DQMA#[0..7]15
MAA[0..13]15
QSA[0..7]15
RASA#15
WEA#15 CSA#015
CASA#15
CSA#115
CKEA15
CLKA015 CLKA#015
CLKA115 CLKA#115
VRAM_VDDQ
VRAM_VDDQ
VRAM_VDDQ
VRAM_VDDQ
VRAM_VDDQ VRAM_VDDQ
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI VRAM (1/2)
A3
16 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI VRAM (1/2)
A3
16 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI VRAM (1/2)
A3
16 47Thursday, July 07, 2005
<Core Design>
Layout trace 20 mil
CLOSE TO MEM !!
Layout trace 20 mil
CLOSE TO MEM
All dampings in this page must near the VRAM.
CLOSE TO MEM !!
12
BC104
SCD1U16V
BC104
SCD1U16V
DQ8
K13
DQ9
K12
DQ10
J13
DQ11
J12
DQ12
G13
DQ13
G12
DQ14
F13
DQ15
F12
DQS1
H13 DM1
H12
3 of 5
U21C
HY5DS573222F-28
3 of 5
U21C
HY5DS573222F-28
VSS_THERMAL
F6
VSS_THERMAL
F7
VSS_THERMAL
F8
VSS_THERMAL
F9
VSS_THERMAL
G6
VSS_THERMAL
G7
VSS_THERMAL
G8
VSS_THERMAL
G9
VSS_THERMAL
H6
VSS_THERMAL
H7
VSS_THERMAL
H8
VSS_THERMAL
H9
VSS_THERMAL
J6
VSS_THERMAL
J7
VSS_THERMAL
J8
VSS_THERMAL
J9
A0
N5
A1
N6
A2
M6
A3
N7
A4
N8
A5
M9
A6
N9
A7
N10
A8/AP
N11
A9
M8
A10
L6
A11
M7
CS#
N2
RAS#
M2
CAS#
L2
WE#
L3
CLK
M11
CLK#
M12
CKE
N12
MCL/DSF
M13
BA0
N4
BA1
M5
VDD D7
VDD D8
VDD E4
VDD E11
VDD L4
VDD L7
VDD L8
VDD L11
VDDQ C3
VDDQ C5
VDDQ C7
VDDQ C8
VDDQ C10
VDDQ C12
VDDQ E3
VDDQ E12
VDDQ F4
VDDQ F11
VDDQ G4
VDDQ G11
VDDQ J4
VDDQ J11
VDDQ K4
VDDQ K11
VSSQ B4
VSSQ B11
VSSQ D4
VSSQ D5
VSSQ D6
VSSQ D9
VSSQ D10
VSSQ D11
VSSQ E6
VSSQ E9
VSSQ F5
VSSQ F10
VSSQ G5
VSSQ G10
VSSQ H5
VSSQ H10
VSSQ J5
VSSQ J10
VSSQ K5
VSSQ K10
VSS E5
VSS E7
VSS E8
VSS E10
VSS K6
VSS K7
VSS K8
VSS K9
VSS L5
VSS L10
VREF N13
NC#C4
C4
NC#C11
C11
NC#H4
H4
NC#H11
H11
NC#L12
L12
NC#L13
L13
NC#M3
M3
NC#M4
M4
NC#N3
N3
NC#L9
L9
NC#M10
M10
1 of 5
U65A
HY5DS573222F-28
1 of 5
U65A
HY5DS573222F-28
12
BC39
SC330P50V2KX
BC39
SC330P50V2KX
12
BC29
SCD1U16V
BC29
SCD1U16V
DQ24
E13 DQ25
D13 DQ26
D12
DQ27
C13
DQ28
B10
DQ29
B9
DQ30
C9
DQ31
B8
DQS3
B13 DM3
B12
5 of 5
U21E
HY5DS573222F-28
5 of 5
U21E
HY5DS573222F-28
12
BC37
SC10U10V5ZY-L
BC37
SC10U10V5ZY-L
12
C484
SCD1U16V
C484
SCD1U16V
12
R550
1KR2F
R550
1KR2F
12
BC33
SC330P50V2KX
BC33
SC330P50V2KX
1 2
R145
60D4R2F
R145
60D4R2F
DM0
B3
DQ0
B7
DQ1
C6
DQ2
B6
DQ3
B5
DQ4
C2 DQ5
D3 DQ6
D2
DQ7
E2
DQS0
B2
2 of 5
U65B
HY5DS573222F-28
2 of 5
U65B
HY5DS573222F-28
DQ24
E13 DQ25
D13 DQ26
D12
DQ27
C13
DQ28
B10
DQ29
B9
DQ30
C9
DQ31
B8
DQS3
B13 DM3
B12
5 of 5
U65E
HY5DS573222F-28
5 of 5
U65E
HY5DS573222F-28
12
C489
SCD1U16V
C489
SCD1U16V
12
BC40
SCD01U16V2KX
BC40
SCD01U16V2KX
DQ16
F3
DQ17
F2
DQ18
G3
DQ19
G2
DQ20
J3
DQ21
J2
DQ22
K2
DQ23
K3
DQS2
H2 DM2
H3
4 of 5
U65D
HY5DS573222F-28
4 of 5
U65D
HY5DS573222F-28
DQ8
K13
DQ9
K12
DQ10
J13
DQ11
J12
DQ12
G13
DQ13
G12
DQ14
F13
DQ15
F12
DQS1
H13 DM1
H12
3 of 5
U65C
HY5DS573222F-28
3 of 5
U65C
HY5DS573222F-28
12
BC35
SCD1U16V
BC35
SCD1U16V
12
R144
1KR2F
R144
1KR2F
1 2
R553
60D4R2F
R553
60D4R2F
12
R549
1KR2F
R549
1KR2F
12
BC28
SC10U10V5ZY-L
BC28
SC10U10V5ZY-L
12
BC112
SCD1U16V
BC112
SCD1U16V
12
C488
SCD1U16V
C488
SCD1U16V
VSS_THERMAL
F6
VSS_THERMAL
F7
VSS_THERMAL
F8
VSS_THERMAL
F9
VSS_THERMAL
G6
VSS_THERMAL
G7
VSS_THERMAL
G8
VSS_THERMAL
G9
VSS_THERMAL
H6
VSS_THERMAL
H7
VSS_THERMAL
H8
VSS_THERMAL
H9
VSS_THERMAL
J6
VSS_THERMAL
J7
VSS_THERMAL
J8
VSS_THERMAL
J9
A0
N5
A1
N6
A2
M6
A3
N7
A4
N8
A5
M9
A6
N9
A7
N10
A8/AP
N11
A9
M8
A10
L6
A11
M7
CS#
N2
RAS#
M2
CAS#
L2
WE#
L3
CLK
M11
CLK#
M12
CKE
N12
MCL/DSF
M13
BA0
N4
BA1
M5
VDD D7
VDD D8
VDD E4
VDD E11
VDD L4
VDD L7
VDD L8
VDD L11
VDDQ C3
VDDQ C5
VDDQ C7
VDDQ C8
VDDQ C10
VDDQ C12
VDDQ E3
VDDQ E12
VDDQ F4
VDDQ F11
VDDQ G4
VDDQ G11
VDDQ J4
VDDQ J11
VDDQ K4
VDDQ K11
VSSQ B4
VSSQ B11
VSSQ D4
VSSQ D5
VSSQ D6
VSSQ D9
VSSQ D10
VSSQ D11
VSSQ E6
VSSQ E9
VSSQ F5
VSSQ F10
VSSQ G5
VSSQ G10
VSSQ H5
VSSQ H10
VSSQ J5
VSSQ J10
VSSQ K5
VSSQ K10
VSS E5
VSS E7
VSS E8
VSS E10
VSS K6
VSS K7
VSS K8
VSS K9
VSS L5
VSS L10
VREF N13
NC#C4
C4
NC#C11
C11
NC#H4
H4
NC#H11
H11
NC#L12
L12
NC#L13
L13
NC#M3
M3
NC#M4
M4
NC#N3
N3
NC#L9
L9
NC#M10
M10
1 of 5
U21A
HY5DS573222F-28
1 of 5
U21A
HY5DS573222F-28
12
BC113
SC330P50V2KX
BC113
SC330P50V2KX
12
BC105
SCD1U16V
BC105
SCD1U16V
12
BC106
SC10U10V5ZY-L
BC106
SC10U10V5ZY-L
12
BC31
SCD1U16V
BC31
SCD1U16V
12
C172
SCD1U16V
C172
SCD1U16V
12
C485
SCD1U16V
C485
SCD1U16V
12
BC32
SCD1U16V
BC32
SCD1U16V
12
C168
SCD1U16V
C168
SCD1U16V
12
C487
SCD1U16V
C487
SCD1U16V
12
BC111
SC330P50V2KX
BC111
SC330P50V2KX
1 2
R146
60D4R2F
R146
60D4R2F
DQ16
F3
DQ17
F2
DQ18
G3
DQ19
G2
DQ20
J3
DQ21
J2
DQ22
K2
DQ23
K3
DQS2
H2 DM2
H3
4 of 5
U21D
HY5DS573222F-28
4 of 5
U21D
HY5DS573222F-28
12
BC36
SC330P50V2KX
BC36
SC330P50V2KX
12
BC38
SC330P50V2KX
BC38
SC330P50V2KX
12
BC110
SCD01U16V2KX
BC110
SCD01U16V2KX
12
BC34
SC330P50V2KX
BC34
SC330P50V2KX
12
BC103
SCD1U16V
BC103
SCD1U16V
12
C490
SCD1U16V
C490
SCD1U16V
12
BC120
SC330P50V2KX
BC120
SC330P50V2KX
DM0
B3
DQ0
B7
DQ1
C6
DQ2
B6
DQ3
B5
DQ4
C2 DQ5
D3 DQ6
D2
DQ7
E2
DQS0
B2
2 of 5
U21B
HY5DS573222F-28
2 of 5
U21B
HY5DS573222F-28
1 2
R554
60D4R2F
R554
60D4R2F
12
BC121
SCD01U16V2KX
BC121
SCD01U16V2KX
12
R141
1KR2F
R141
1KR2F
12
BC42
SC10U10V5ZY-L
BC42
SC10U10V5ZY-L
12
BC41
SC330P50V2KX
BC41
SC330P50V2KX
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BC139_1
CKEB
MAB10
MAB1
MAB7
MAB5
MAB9
MAB0
MAB2
MAB8
MAB6
MAB4
MAB3
MAB11
MAB13
MAB12
VDDR_VREF3
MDB30
MDB11
MDB13
MDB25
MDB28
MDB12
MDB7
MDB31
MDB26
MDB5
MDB0
MDB1
MDB29
MDB22
MDB19
MDB10
MDB8
MDB24
MDB18
MDB17
MDB16
MDB21
MDB20
MDB4
MDB3
MDB9
MDB23
MDB15
MDB2
MDB6
MDB14
MDB27
VDDR_VREF4
MDB63
MDB45
MDB55
MDB61
MDB50
MDB60
MDB32
MDB52
MDB51
MDB58
MDB41
MDB56
MDB49
MDB42
MDB48
MDB36
MDB46
MDB38
MDB40
MDB47
MDB53
MDB54
MDB57
MDB34
MDB35
MDB39
MDB33
MDB37
MDB59
MDB43
MDB44
MDB62
CSB#0
RASB#
WEB#
CASB#
CSB#1
BC140_1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB13
MAB12
DQMB#0
QSB0
DQMB#3
QSB3
DQMB#1
QSB1
DQMB#2
QSB2
QSB4
DQMB#4
QSB7
DQMB#7
QSB5
DQMB#5
QSB6
DQMB#6
MDB[0..63]15
DQMB#[0..7]15
MAB[0..13]15
QSB[0..7]15
CSB#015
RASB#15
WEB#15 CASB#15
CSB#115
CKEB15
CLKB015 CLKB#015
CLKB115 CLKB#115
VRAM_VDDQ
VRAM_VDDQ
VRAM_VDDQ
VRAM_VDDQ
VRAM_VDDQ
VRAM_VDDQ
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI VRAM (2/2)
A3
17 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI VRAM (2/2)
A3
17 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
ATI VRAM (2/2)
A3
17 47Thursday, July 07, 2005
<Core Design>
CLOSE TO MEM !!
Layout trace 20 mil
CLOSE TO MEM
Layout trace 20 mil
CLOSE TO MEM
All dampings in this page must near the VRAM.
CLOSE TO MEM !!
12
BC108
SCD1U16V
BC108
SCD1U16V
DM0
B3
DQ0
B7
DQ1
C6
DQ2
B6
DQ3
B5
DQ4
C2 DQ5
D3 DQ6
D2
DQ7
E2
DQS0
B2
2 of 5
U64B
HY5DS573222F-28
2 of 5
U64B
HY5DS573222F-28
DQ16
F3
DQ17
F2
DQ18
G3
DQ19
G2
DQ20
J3
DQ21
J2
DQ22
K2
DQ23
K3
DQS2
H2 DM2
H3
4 of 5
U64D
HY5DS573222F-28
4 of 5
U64D
HY5DS573222F-28
12
R521
1KR2F
R521
1KR2F
1 2
R111
60D4R2F
R111
60D4R2F
DM0
B3
DQ0
B7
DQ1
C6
DQ2
B6
DQ3
B5
DQ4
C2 DQ5
D3 DQ6
D2
DQ7
E2
DQS0
B2
2 of 5
U61B
HY5DS573222F-28
2 of 5
U61B
HY5DS573222F-28
12
BC109
SCD1U16V
BC109
SCD1U16V
DQ8
K13
DQ9
K12
DQ10
J13
DQ11
J12
DQ12
G13
DQ13
G12
DQ14
F13
DQ15
F12
DQS1
H13 DM1
H12
3 of 5
U61C
HY5DS573222F-28
3 of 5
U61C
HY5DS573222F-28
12
BC96
SC10U10V5ZY-L
BC96
SC10U10V5ZY-L
VSS_THERMAL
F6
VSS_THERMAL
F7
VSS_THERMAL
F8
VSS_THERMAL
F9
VSS_THERMAL
G6
VSS_THERMAL
G7
VSS_THERMAL
G8
VSS_THERMAL
G9
VSS_THERMAL
H6
VSS_THERMAL
H7
VSS_THERMAL
H8
VSS_THERMAL
H9
VSS_THERMAL
J6
VSS_THERMAL
J7
VSS_THERMAL
J8
VSS_THERMAL
J9
A0
N5
A1
N6
A2
M6
A3
N7
A4
N8
A5
M9
A6
N9
A7
N10
A8/AP
N11
A9
M8
A10
L6
A11
M7
CS#
N2
RAS#
M2
CAS#
L2
WE#
L3
CLK
M11
CLK#
M12
CKE
N12
MCL/DSF
M13
BA0
N4
BA1
M5
VDD D7
VDD D8
VDD E4
VDD E11
VDD L4
VDD L7
VDD L8
VDD L11
VDDQ C3
VDDQ C5
VDDQ C7
VDDQ C8
VDDQ C10
VDDQ C12
VDDQ E3
VDDQ E12
VDDQ F4
VDDQ F11
VDDQ G4
VDDQ G11
VDDQ J4
VDDQ J11
VDDQ K4
VDDQ K11
VSSQ B4
VSSQ B11
VSSQ D4
VSSQ D5
VSSQ D6
VSSQ D9
VSSQ D10
VSSQ D11
VSSQ E6
VSSQ E9
VSSQ F5
VSSQ F10
VSSQ G5
VSSQ G10
VSSQ H5
VSSQ H10
VSSQ J5
VSSQ J10
VSSQ K5
VSSQ K10
VSS E5
VSS E7
VSS E8
VSS E10
VSS K6
VSS K7
VSS K8
VSS K9
VSS L5
VSS L10
VREF N13
NC#C4
C4
NC#C11
C11
NC#H4
H4
NC#H11
H11
NC#L12
L12
NC#L13
L13
NC#M3
M3
NC#M4
M4
NC#N3
N3
NC#L9
L9
NC#M10
M10
1 of 5
U64A
HY5DS573222F-28
1 of 5
U64A
HY5DS573222F-28
12
BC26
SCD01U16V2KX
BC26
SCD01U16V2KX
12
BC25
SC330P50V2KX
BC25
SC330P50V2KX
DQ8
K13
DQ9
K12
DQ10
J13
DQ11
J12
DQ12
G13
DQ13
G12
DQ14
F13
DQ15
F12
DQS1
H13 DM1
H12
3 of 5
U64C
HY5DS573222F-28
3 of 5
U64C
HY5DS573222F-28
12
BC22
SCD01U16V2KX
BC22
SCD01U16V2KX
12
BC98
SCD1U16V
BC98
SCD1U16V
12
BC16
SC330P50V2KX
BC16
SC330P50V2KX
12
C99
SCD1U16V
C99
SCD1U16V
DQ16
F3
DQ17
F2
DQ18
G3
DQ19
G2
DQ20
J3
DQ21
J2
DQ22
K2
DQ23
K3
DQS2
H2 DM2
H3
4 of 5
U61D
HY5DS573222F-28
4 of 5
U61D
HY5DS573222F-28
12
BC15
SC330P50V2KX
BC15
SC330P50V2KX
12
C155
SCD1U16V
C155
SCD1U16V
12
C156
SCD1U16V
C156
SCD1U16V
12
BC14
SC330P50V2KX
BC14
SC330P50V2KX
12
BC12
SC330P50V2KX
BC12
SC330P50V2KX
1 2
R140
60D4R2F
R140
60D4R2F
12
BC24
SC330P50V2KX
BC24
SC330P50V2KX
12
BC19
SCD1U16V
BC19
SCD1U16V
12
R522
1KR2F
R522
1KR2F
12
C474
SCD1U16V
C474
SCD1U16V
12
BC101
SC10U10V5ZY-L
BC101
SC10U10V5ZY-L
12
C157
SCD1U16V
C157
SCD1U16V
12
BC27
SCD1U16V
BC27
SCD1U16V
1 2
R110
60D4R2F
R110
60D4R2F
12
BC21
SCD1U16V
BC21
SCD1U16V
12
R552
1KR2F
R552
1KR2F
DQ24
E13 DQ25
D13 DQ26
D12
DQ27
C13
DQ28
B10
DQ29
B9
DQ30
C9
DQ31
B8
DQS3
B13 DM3
B12
5 of 5
U61E
HY5DS573222F-28
5 of 5
U61E
HY5DS573222F-28
12
BC100
SC330P50V2KX
BC100
SC330P50V2KX
12
C124
SCD1U16V
C124
SCD1U16V
VSS_THERMAL
F6
VSS_THERMAL
F7
VSS_THERMAL
F8
VSS_THERMAL
F9
VSS_THERMAL
G6
VSS_THERMAL
G7
VSS_THERMAL
G8
VSS_THERMAL
G9
VSS_THERMAL
H6
VSS_THERMAL
H7
VSS_THERMAL
H8
VSS_THERMAL
H9
VSS_THERMAL
J6
VSS_THERMAL
J7
VSS_THERMAL
J8
VSS_THERMAL
J9
A0
N5
A1
N6
A2
M6
A3
N7
A4
N8
A5
M9
A6
N9
A7
N10
A8/AP
N11
A9
M8
A10
L6
A11
M7
CS#
N2
RAS#
M2
CAS#
L2
WE#
L3
CLK
M11
CLK#
M12
CKE
N12
MCL/DSF
M13
BA0
N4
BA1
M5
VDD D7
VDD D8
VDD E4
VDD E11
VDD L4
VDD L7
VDD L8
VDD L11
VDDQ C3
VDDQ C5
VDDQ C7
VDDQ C8
VDDQ C10
VDDQ C12
VDDQ E3
VDDQ E12
VDDQ F4
VDDQ F11
VDDQ G4
VDDQ G11
VDDQ J4
VDDQ J11
VDDQ K4
VDDQ K11
VSSQ B4
VSSQ B11
VSSQ D4
VSSQ D5
VSSQ D6
VSSQ D9
VSSQ D10
VSSQ D11
VSSQ E6
VSSQ E9
VSSQ F5
VSSQ F10
VSSQ G5
VSSQ G10
VSSQ H5
VSSQ H10
VSSQ J5
VSSQ J10
VSSQ K5
VSSQ K10
VSS E5
VSS E7
VSS E8
VSS E10
VSS K6
VSS K7
VSS K8
VSS K9
VSS L5
VSS L10
VREF N13
NC#C4
C4
NC#C11
C11
NC#H4
H4
NC#H11
H11
NC#L12
L12
NC#L13
L13
NC#M3
M3
NC#M4
M4
NC#N3
N3
NC#L9
L9
NC#M10
M10
1 of 5
U61A
HY5DS573222F-28
1 of 5
U61A
HY5DS573222F-28
12
BC97
SC10U10V5ZY-L
BC97
SC10U10V5ZY-L
12
BC13
SC330P50V2KX
BC13
SC330P50V2KX
12
R551
1KR2F
R551
1KR2F
12
C148
SCD1U16V
C148
SCD1U16V
12
BC107
SCD01U16V2KX
BC107
SCD01U16V2KX
12
BC17
SCD1U16V
BC17
SCD1U16V
12
C401
SCD1U16V
C401
SCD1U16V
DQ24
E13 DQ25
D13 DQ26
D12
DQ27
C13
DQ28
B10
DQ29
B9
DQ30
C9
DQ31
B8
DQS3
B13 DM3
B12
5 of 5
U64E
HY5DS573222F-28
5 of 5
U64E
HY5DS573222F-28
12
BC99
SCD1U16V
BC99
SCD1U16V
12
BC23
SC330P50V2KX
BC23
SC330P50V2KX
1 2
R139
60D4R2F
R139
60D4R2F
12
BC102
SC10U10V5ZY-L
BC102
SC10U10V5ZY-L
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PR_INSERT#
CRMA
LUMA
MIC_PR
DK_SPKR_R+
COMP_PR
VOL_UP_DK#
VOL_DWN_DK#
PR_INSERT#
PR_INSERT#CRMA
LUMA
DOCK_PRESENT
PR_PRESENT#
BT_LED
CRMA_PR_1
DOCK_PRESENT
SPDIF
IR_OUT
PR_PRESENT#
CIR_PR
CRMA_PR
COMP_PR
PR_PRESENT#
USB_N_CON6
MIC_PR
COMP_PR
USB_P_CON6
LUMA_PR
LUMA_PR
DOCK_PRESENT SPDIF_OUT
CIR_PR
CRMA_CN5
5V_Dock_S0
LUMA_CN5
LUMA_PR_1
CRMA_PR
JACK_DETECT#
MUTE_LED
DK_SPKR_L+
EARPHONE
SPDIF
CRMA_CN5
USB_P_CON1
USB_N_CON0
USB_P_CON0
USB_N_CON1
LUMA_CN5
MIC_PR
VOL_UP_DK# VOL_DWN_DK#
USB_N_CON0
USB_P_CON0
USB_N_CON6
USB_P_CON6
LID_SW
USB_P_CON1
USB_N_CON1
PR_INSERT# 36
RJ45-3 31
RJ45-431 RJ45-531 RJ45-6 31
RJ45-8 31
RJ45-7 31
RJ45-131
1394_TPB1P_PR 31
RJ45-231
1394_TPA1N_PR 31
MUTE_LED 19,36
1394_TPB1N_PR 31
VOL_DWN_DK#36
VOL_UP_DK#36
1394_TPA1P_PR 31
LUMA_VGA 13
CRMA_VGA 13
COMP_VGA 13
PCI_AD24 22,27,30,34
ICH_PME# 22,30,34
SPDIF_OUT32
BC0EX131
BC0EX231
BT_LED 19,31
CIR_KBC 36
CIR20
JACK_DETECT# 33
DK_SPKR_R+33 DK_SPKR_L+33
LID_SW 19
EARPHONE 33
HP_OUT_R 32
HP_OUT_L 32
EXT_MIC_2 32
EXT_MIC_1 32
CRT_B 20
CRT_G 20
CRT_R 20
JVGA_VS 20
JVGA_HS 20
DDC_CLK_CON 20
DDC_DATA_CON 20
USB_PN722
USB_PP722
USB_PN122
USB_PP122
USB_PN3 22
USB_PP3 22
5V_DOCK
5V_S0
AD+ AD+
DCBATOUT
5V_DOCK
5V_S0
5V_S0
AUD_AGND
5V_S3 AD+ DCBATOUT 5V_S0
5V_S0
5V_S3
3D3V_S0
5V_DOCK
AUD_AGND
AUD_AGND
5V_S0
5V_S3
5V_S3
AUD_AGND
5V_S0 5V_S0
3D3V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Board to board conn/ Docking
A3
18 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Board to board conn/ Docking
A3
18 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Board to board conn/ Docking
A3
18 47Monday, July 11, 2005
<Core Design>
Docking Connector
HP suggest
100 mil
MIC-IN
Please close to ICH6
HIGH B1
FUNCTIONINPUT
B0LOW
CIR,CIR_PR,CIR_KBC are connect togather. default setting 12/12
LINE-OUT
Close to Docking CN
Place near the GMCH
Place near the DOCK
Analog Signal CONN
Digital Signal CONN
B1
1
GND
2
B0
3A4
VCC 5
S6
U15
NC7SB3157P6X-U
U15
NC7SB3157P6X-U
1 2
EC30
SC1000P16V2KX
EC30
SC1000P16V2KX
1 2
EC103
SC1000P16V2KX
EC103
SC1000P16V2KX
1 2
EC28
SC1000P16V2KX
EC28
SC1000P16V2KX
B1
1
GND
2
B0
3A4
VCC 5
S6
U16
NC7SB3157P6X-U
U16
NC7SB3157P6X-U
12
C315
SC470P25V2KN
C315
SC470P25V2KN
1 2
EC118
SC1000P16V2KX
EC118
SC1000P16V2KX
1
2
3
D5
BAV99LT1
DY
D5
BAV99LT1
DY
1 2
R455 0R2-0R455 0R2-0
12
C62
SC470P25V2KN
C62
SC470P25V2KN
1 2
EC19
SCD1U16V
EC19
SCD1U16V
12
C352
SC47P50V2JN
C352
SC47P50V2JN
1
2
3
D30
BAV99LT1
DY
D30
BAV99LT1
DY
12
C351
SC47P50V2JN
C351
SC47P50V2JN
12
C617
SCD1U16V
C617
SCD1U16V
1 2
R624 DUMMY-R2R624 DUMMY-R2
1
2
3
4
5
6
7
8
9
10
11
12
CN6
MOLEX-CON10-1
CN6
MOLEX-CON10-1
1 2
R310 DUMMY-R2R310 DUMMY-R2
1 2
R361 0R2-0
R361 0R2-0
1 2
R512 0R2-0
R512 0R2-0
12
C367
SCD1U16V
C367
SCD1U16V
TP21
TPAD30
TP21
TPAD30
12
R94
1KR2
R94
1KR2
12
TC6
ST47U6D3V-U1
DY
TC6
ST47U6D3V-U1
DY
1 2
EC14
SCD1U16V
EC14
SCD1U16V
1
2
3
D31
BAV99LT1
D31
BAV99LT1
12
C368
SC4D7U10V5ZY
C368
SC4D7U10V5ZY
1 2
EC104
SCD1U16V
EC104
SCD1U16V
3
1
2
Q31
S2N3904-U3
Q31
S2N3904-U3
1 2
R103 47R2
R103 47R2
12
C94
SCD1U25V3KX
C94
SCD1U25V3KX
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
CN5
JST-CON20
CN5
JST-CON20
1 2
EC131
SCD1U16V
DY
EC131
SCD1U16V
DY
1 2
R51 0R2-0
R51 0R2-0
1 2
EC106
SC1000P16V2KX
EC106
SC1000P16V2KX
1 2
EC105
SC1000P16V2KX
EC105
SC1000P16V2KX
12
C369
SC47P50V2JN
C369
SC47P50V2JN
1 2
L29
IND-1D2UH
L29
IND-1D2UH
1 2
L27
IND-1D2UH
L27
IND-1D2UH
12
C356
SC47P50V2JN
C356
SC47P50V2JN
1 2
L30
IND-1D2UH
L30
IND-1D2UH
1 2
EC110
SC1000P16V2KX
EC110
SC1000P16V2KX
12
R456
150R2F
R456
150R2F
1 2
EC109
SC1000P16V2KX
EC109
SC1000P16V2KX
1 2
F1
FUSE-2A6V
F1
FUSE-2A6V
12
R491
150R2F
R491
150R2F
1 2
R72 0R2-0
R72 0R2-0
12
R436
150R2F
R436
150R2F
12
R548
47KR2
63.47334.1D1
R548
47KR2
63.47334.1D1
12
R408
10KR2
R408
10KR2
12
C357
SC47P50V2JN
C357
SC47P50V2JN
1 2
L12
BLM11B750S
L12
BLM11B750S
1 2
L8
BLM11B750S
L8
BLM11B750S
1 2
L19
BLM18PG600SN1
L19
BLM18PG600SN1
12
R123
150R2F
R123
150R2F
12
BC18
SC3P50V2CN
BC18
SC3P50V2CN
12
R124
150R2F
R124
150R2F
12
C101
SCD1U25V3KX
C101
SCD1U25V3KX
12
R104
2K2R2
R104
2K2R2
12
34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 4142 4344 4546 4748 4950 5152 5354
5556
5758
59
60
MH1
MH2
CN12
FOX-CONN58D-U3
CN12
FOX-CONN58D-U3
12
C149
SC3P50V2CN
DY
C149
SC3P50V2CN
DY
12
C138
SC3P50V2CN
DY
C138
SC3P50V2CN
DY
12
BC20
SC3P50V2CN
BC20
SC3P50V2CN
12
C358
SC47P50V2JN
C358
SC47P50V2JN
1 2
EC111
SC1000P16V2KX
EC111
SC1000P16V2KX
12
C471
SCD1U16V
C471
SCD1U16V
12
C425
SCD1U16V
C425
SCD1U16V
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CHG_LED#
PWR_LED#
IDE_LED#
SI3865_R2
SI3865_R1C1
LCDVDD_ON_1
CAPS_LED#
7421_LED#
LCDVDD_ON
ID_DET
LID_SW
802_BT_LED
CHG_LED#
IDE_LED#
ID_DET#
ID_DET
ID_DET#
ID_DET
ID_DET#
IDE_LED#
CHG_LED#
PWR_LED#
CAPS_LED#
7421_LED#
7421_LED#
CAPS_LED#
TXAOUT0-13
EDID_DAT13,25 EDID_CLK13,25
TXBCLK+13 TXBCLK-13
TXBOUT2-13 TXBOUT2+13
TXBOUT1+13
TXAOUT1-13
TXBOUT1-13
TXBOUT0+13 TXBOUT0-13
TXACLK-13 TXACLK+13
TXAOUT2+13 TXAOUT2-13
TXAOUT0+13
TXAOUT1+13
BRIGHTNESS36 FPBACK36
LCDVDD_ON13
7421_LED27
CAPS_LED36
NUM_LED# 37
NUM_LED36
ID_DET36,37
LID_SW 18KBC_LID#36
BT_LED 18,31
802_ACT_LED 34
802_BT_LED#37
PWR_LED# 37
PWR_LED36
CHG_LED36
CDROM_LED# 26
HDD_LED# 26
MUTE_LED18,36 MUTE_LED# 37
3D3V_LCD_S0
DCBATOUT
5V_S0
3D3V_S0
3D3V_LCD_S0
3D3V_S0
3D3V_LCD_S0
5V_S5
5V_AUX
3D3V_S3
5V_S0_PA
5V_S0_PR
5V_AUX_PR
5V_S3_PR
5V_S0_PA
5V_S0
5V_S0_PR
5V_AUX_PA
5V_AUX_PR
5V_AUX 5V_S3_PR
5V_S3
5V_S3_PA
5V_S0_PA
5V_AUX_PA
5V_S3_PA
5V_S0_PA
5V_S0_PR
5V_S0_PR
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Inverter/LCD
A3
19 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Inverter/LCD
A3
19 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Inverter/LCD
A3
19 47Monday, July 11, 2005
<Core Design>
INVERTER/LCD
change R from 100 to 200 ohm
IRCHRPWR HDD
PA
Botton
Blue
PR
Top
Amber
Blue
LED9
Amber
CAPS 7421
Amber Amber
Blue Blue
LED7
LED5 LED6 LED2LED1
Amber
Blue
LED8
U42
U64
LED4
LED1 LED2
SC
12
NC
LED5
LED-O-11-U
LED5
LED-O-11-U
12
NC
LED7
LED-O-11-U
LED7
LED-O-11-U
12
NC
LED6
LED-O-11-U
LED6
LED-O-11-U
12
BC8
SCD1U16V
BC8
SCD1U16V
1 2
R192 200R2J
R192 200R2J
1 2
R355 200R2J
R355 200R2J
1 2
R359 200R2J
R359 200R2J
1 2
R358 200R2J
R358 200R2J
R2 1
D2 2
D2 3
S2
4ON/OFF
5R1/C1
6
U58
SI3865DV-U
U58
SI3865DV-U
12
BC92
SC1U10V3ZY
BC92
SC1U10V3ZY
1 2
R357 1K2R2J-1
R357 1K2R2J-1
3 2
1
Q22
2N3906-2-U
Q22
2N3906-2-U
3 2
1
Q20
2N3906-2-U
Q20
2N3906-2-U
12
C346
SC1000P16V2KX
C346
SC1000P16V2KX
21
3
IN
OUT
R1
R2
GND
Q12
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q12
DTC114EUA-U1
12
BC87
SC1000P16V2KX
BC87
SC1000P16V2KX
21
3
IN
OUT
R1
R2
GND
Q34
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q34
DTC114EUA-U1
1
2
3
D26
CH715F
D26
CH715F
1 2
R346 47KR2
R346 47KR2
12
BC93
SCD1U16V
BC93
SCD1U16V
1 2
R354 47KR2
R354 47KR2
2
1
3
IN
OUT
R1
R2
GND
Q33
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q33
DTC114EUA-U1
12
R350
10KR2
R350
10KR2
1 2
BC89
SC4700P50V3KX
BC89
SC4700P50V3KX
12
R546
4K7R2
R546
4K7R2
1 2
R547 100KR2
R547 100KR2
1 2
LED1
LED-B-53
LED1
LED-B-53
12
C482
SC1000P50V
C482
SC1000P50V
1 2
LED3
LED-B-53
LED3
LED-B-53
3 2
1
Q23
2N3906-2-U
Q23
2N3906-2-U
21
3
IN
OUT
R1
R2
GND
Q28
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q28
DTC114EUA-U1
12
NC
LED8
LED-B-54-U
LED8
LED-B-54-U
3 2
1
Q25
2N3906-2-U
Q25
2N3906-2-U
12
NC
LED10
LED-B-54-U
LED10
LED-B-54-U
12
NC
LED9
LED-B-54-U
LED9
LED-B-54-U
12
R344
47KR2
R344
47KR2
12
C345
SCD1U16V
C345
SCD1U16V
12
R345
100KR2
R345
100KR2
21
3
IN
OUT
R1
R2
GND
Q32
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q32
DTC114EUA-U1
1 2
R433 270KR2F
R433 270KR2F
1 2
R125 1K2R2J-1
R125 1K2R2J-1
1 2
R180 1K2R2J-1
R180 1K2R2J-1
1 2
R356 1K2R2J-1
R356 1K2R2J-1
1 2
R360 1K2R2J-1
R360 1K2R2J-1
3 2
1
Q24
2N3906-2-U
Q24
2N3906-2-U
1 2
R351 47KR2
R351 47KR2
12
BC94
SC10U10V6ZY-U
BC94
SC10U10V6ZY-U
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
41 43
45
46
4442
MH1
MH2
CN3
IPEX-CON40-1-U1
CN3
IPEX-CON40-1-U1
1 2
R127 100R2
R127 100R2
21
3
IN
OUT
R1
R2
GND
Q10
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q10
DTC114EUA-U1
12
BC91
SCD1U
BC91
SCD1U
12
BC88
SCD1U16V
BC88
SCD1U16V
21
3
IN
OUT
R1
R2
GND
Q27
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q27
DTC114EUA-U1
1
2 3
GS
D
Q21
2N7002
GS
D
Q21
2N7002
1 2
LED2
LED-O-10
LED2
LED-O-10
21
3
IN
OUT
R1
R2
GND
Q35
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q35
DTC114EUA-U1
1 2
LED4
LED-O-10
LED4
LED-O-10
1
2 3
GS
D
Q36
2N7002
GS
D
Q36
2N7002
12
R430
10KR2
R430
10KR2
1 2
R353 47KR2
R353 47KR2
1 2
R352 47KR2
R352 47KR2
1 2
R431 1KR2
R431 1KR2
12
R432
150R2
R432
150R2
12
R476
47KR2
R476
47KR2
3 2
1
Q26
2N3906-2-U
Q26
2N3906-2-U
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CIR
CRT_G
CRT_R
CRT_B
JVGA_HS
DDC_CLK_CON
DDC_DATA_CON
JVGA_VS
CIR 18
VGA_RED13
VGA_BLUE13
VGA_GREEN13
JVGA_VS18
CRT_B 18
CRT_G 18
CRT_R 18
JVGA_HS18
DDC_CLK13
DDC_DATA13
DDC_CLK_CON 18
DDC_DATA_CON 18
VGA_VSYNC 13
VGA_HSYNC 13
5V_AUX
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
CRT/ CIR
A3
20 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
CRT/ CIR
A3
20 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
CRT/ CIR
A3
20 47Thursday, July 07, 2005
<Core Design>
CIR
010804 Modified on Astro ID request
FOR FF
Close to CN5
CRT
Close to U19 (N/B)
1 2
L9
BLM11B750S
L9
BLM11B750S
1 2
L10 BLM11B750SL10 BLM11B750S
1 2
R114 33R2R114 33R2
GND 1
GND 2
VS 3
OUT 4
U50
IR-TSOP6236-U
DY
U50
IR-TSOP6236-U
DY
12
C88
SC15P50V2JN-1
C88
SC15P50V2JN-1
1 2
R115 33R2R115 33R2
1 2
L7
BLM11B750S
L7
BLM11B750S
1 2
L6
BLM11B750S
L6
BLM11B750S
1 2
L5
BLM11B750S
L5
BLM11B750S
12
C87
SC15P50V2JN-1
C87
SC15P50V2JN-1
12
C89
SC15P50V2JN-1
C89
SC15P50V2JN-1
12
R363
100R2
R363
100R2
GND 1
GND 2
VS 3
OUT 4
U81
IR-TSOP6236-U
U81
IR-TSOP6236-U
12
R362
10KR2
R362
10KR2
12
C113
SC3P50V2CN
C113
SC3P50V2CN
12
C126
SC3P50V2CN
C126
SC3P50V2CN
12
C125
SC3P50V2CN
C125
SC3P50V2CN
12
R113
150R2F
R113
150R2F
12
R112
150R2F
R112
150R2F
12
R108
150R2F
R108
150R2F
1 2
C316
SC4D7U10V5ZY
C316
SC4D7U10V5ZY
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
LPC_LDRQ1#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
H_CPUSLP#_ICH
H_DPSLP#_R
H_THERMTRIP_R
H_DPRSLP#_R
RCT_X1
RCT_X2
RCT_RST#
SATA_RBIAS_PN
INTRUDER#
BAT
ICH_TP5
LAN_RSTSYNC
H_DPSLP#
H_DPRSLP#
AC97_SYNC_ICH
AC97_RST#_ICH
AC97_DOUT_ICH
RCIN#
LPC_LDRQ1#
H_FERR_R
IDE_DREQ 26
IDE_D15 26
IDE_D0 26
IDE_D1 26
IDE_D2 26
IDE_D3 26
IDE_D4 26
IDE_D5 26
IDE_D6 26
IDE_D7 26
IDE_D8 26
IDE_D9 26
IDE_D10 26
IDE_D11 26
IDE_D12 26
IDE_D13 26
IDE_D14 26
IDE_CS#1 26
IDE_CS#0 26
IDE_A2 26
IDE_A1 26
IDE_A0 26
H_STPCLK# 4
RCIN# 36
H_INTR 4
H_INIT# 4
H_IGNNE# 4
H_PWRGD 4
H_A20M# 4
ICH_A20GATE 36
LPC_LFRAME# 36
H_CPUSLP# 4,6
H_DPSLP# 4
H_SMI# 4
H_FERR# 4
PM_THRMTRIP-I# 4,7
H_DPRSLP# 4
IDE_IORDY26 IDE_IRQ1426 IDE_DACK#26 IDE_IOW#26 IDE_IOR#26
LPC_LAD[3..0] 36
LPC_LDRQ0# 36
AC97_SYNC32,35
AC97_RST#32,35
AC97_DIN032
AC97_DOUT32,35
AC97_DIN135
RSMRST#25,36,43
AC97_BITCLK32,35
H_NMI 4
3D3V_AUX RTC_AUX_S5
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
VCCP_GMCH_S0
3D3V_S0
3D3V_S0
RTC_VCC
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (1 of 4)
A3
21 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (1 of 4)
A3
21 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (1 of 4)
A3
21 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Layout Note: R6V7 needs to placed
within 2" of ICH6, R6V9 must be placed
within 2" of R6V7 w/o stub.
R6V7
R6V9
RTC circuitry
Place within 500 mils
of ICH6 ball
The symbol use 2nd source
The P/N is the main source
Main source:20.D0152.103
2nd source:20.D0012.103
SB
12
R256
56R2J
R256
56R2J
1
2 3
GS
D
Q17
2N7002
DY
GS
D
Q17
2N7002
DY
1 2
R53 0R2-0
DY
R53 0R2-0
DY
1 2
R250 0R2-0R250 0R2-0
1 2
R245 0R2-0R245 0R2-0
12
R334
1KR2
R334
1KR2
1 2
R270 10KR2
R270 10KR2
12
C614
SC1U10V3ZY
C614
SC1U10V3ZY
12
R319
10MR2J
R319
10MR2J
1 2
R627 0R2-0
R627 0R2-0
1 2
R272
0R2-0
R272
0R2-0
1
2
3
4
5
RTC1
ETY-CON3-S1
RTC1
ETY-CON3-S1
1 2
R269 33R2
R269 33R2
1 2
R271 33R2
R271 33R2
1 2
R252 56R2J
R252 56R2J
1 2
R258 56R2J
R258 56R2J
1 2
R623 33R2
R623 33R2
1 2
R617 10KR2
R617 10KR2
1 2
R629 10KR2
R629 10KR2
12
R257
75R2
R257
75R2
1 2
C299 SC4D7P50V3CNC299 SC4D7P50V3CN
12
R251
56R2J
DY
R251
56R2J
DY
12
C300
SC1U10V3ZY
C300
SC1U10V3ZY
41
2 3
X4
XTAL-32D768K-4P
X4
XTAL-32D768K-4P
21
D21
CH751H-40-U
D21
CH751H-40-U
1 2
R632 20KR2
R632 20KR2
12
R246
56R2J
DY
R246
56R2J
DY
LAD[0]/FWH[0] P2
LAD[1]/FWH[1] N3
LAD[2]/FWH[2] N5
LAD[3]/FWH[3] N4
LDRQ[0]# N6
LDRQ[1]#/GPI[41] P4
LFRAME#/FWH[4] P3
A20GATE AF22
A20M# AF23
CPUSLP# AE27
DPRSLP# AE24
DPSLP# AD27
FERR# AF24
CPUPWRGD/GPO[49] AG25
IGNNE# AG26
INIT3_3V# AE22
INIT# AF27
INTR AG24
RCIN# AD23
NMI AF25
SMI# AG27
STPCLK# AE26
THRMTRIP# AE23
DA[0] AC16
DA[1] AB17
DA[2] AC17
DCS1# AD16
DCS3# AE17
DD[0] AD14
DD[1] AF15
DD[2] AF14
DD[3] AD12
DD[4] AE14
DD[5] AC11
DD[6] AD11
DD[7] AB11
DD[8] AE13
DD[9] AF13
DD[10] AB12
DD[11] AB13
DD[12] AC13
DD[13] AE15
DD[14] AG15
DD[15] AD13
DDREQ AB14
RTCX1
Y1
RTCX2
Y2
RTCRST#
AA2
INTRUDER#
AA3
INTVRMEN
AA5
EE_CS
D12
EE_SHCLK
B12
EE_DIN
F13 EE_DOUT
D11
LAN_CLK
F12
LAN_RSTSYNC
B11
LANRXD[0]
E12
LANRXD[1]
E11
LANRXD[2]
C13
LANTXD[0]
C12
LANTXD[1]
C11
LANTXD[2]
E13
ACZ_BIT_CLK
C10
ACZ_SYNC
B9
ACZ_RST#
A10
ACZ_SDIN[0]
F11
ACZ_SDO
C9
SATALED#
AC19
ACZ_SDIN[1]
F10
ACZ_SDIN[2]
B10
SATA[0]RXN
AE3
SATA[0]RXP
AD3
SATA[0]TXN
AG2
SATA[0]TXP
AF2
SATA[2]RXN
AD7
SATA[2]RXP
AC7
SATA[2]TXN
AF6
SATA[2]TXP
AG6
SATA_CLKN
AC2
SATA_CLKP
AC1
SATARBIAS#
AG11
SATARBIAS
AF11
IORDY
AF16
IDEIRQ
AB16
DDACK#
AB15
DIOW#
AC14
DIOR#
AE16
LPC
RTCLAN
CPU
IDE
SATA AC-97/AZALIA
U42A
ICH6M
LPC
RTCLAN
CPU
IDE
SATA AC-97/AZALIA
U42A
ICH6M
12
R333
10KR2
DY
R333
10KR2
DY
1 2
C298 SC3D9P50V3CNC298 SC3D9P50V3CN
TP42TP42
21
D22
CH751H-40-U
D22
CH751H-40-U
12
R633
1MR2
R633
1MR2
21
G70
GAP-OPEN
G70
GAP-OPEN
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
USB_OC#0
PCI_SERR#
PCI_STOP#
INT_PIRQB#
PCI_AD24
PCI_AD18
PCI_AD3
ICH_GPO16
PCI_AD31
PCI_AD28
PCI_AD7
PCI_AD19
PCI_AD4
PCI_AD0
ICH_GNT3
INT_PIRQC#
PCI_AD8
PCI_AD5
ICH_GPO17
INT_PIRQD#
PCI_AD9 PCB_VER2
PCI_AD12
PCI_AD17
INT_PIRQA#
PCI_AD14
PCI_AD22
ICH_GPO48
PCI_AD1
PCI_AD25
PCI_AD10
PCI_AD15
PCI_AD11
INT_PIRQG#
ICH_GPI0_R
PCI_REQ#3
PCI_AD2
PCI_AD13
PCI_AD27
PCI_AD21
INT_PIRQF#
PCI_LOCK#
PCI_REQ#2
PCI_AD29
PCI_AD23
PCI_AD20
PCI_AD16
INT_PIRQH#
PCI_AD30
PCI_AD26
PCI_AD6
INT_PIRQE#
PCI_REQ#1
PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_REQ#5
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PM_CLKRUN#
PCI_SERIRQ
PM_THRM#
MCH_SYNC#
PCI_REQ#0
PCI_REQ#5
USB_OC#1
USB_OC#2
USB_OC#3 USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
INT_PIRQD#
INT_PIRQH#
PCI_REQ#2
PCI_REQ#3
PCI_REQ#0
PM_BATLOW#_R
PM_SUS_STAT#
PCI_REQ#1
ICH_GPI7
GPI12
SMLINK0
SMB_LINK_ALERT#
PM_RI#
SMLINK1
GPI12
USB_OC#3
PM_RI#
ECSWI#
MCH_SYNC#
PCIE_TXP0_R
DMI_IRCOMP_R
USB_OC#2
PLT_RST#
USB_OC#7
USB_PN0
ICH_GPI7
ICH_SLP_S5#
PM_DPRSLPVR_R
ECSMI#
ECSCI#
PM_BATLOW#_R
SMLINK0
PCIE_TXN0_RSATA0_R0
SMLINK1
USB_OC#4
PM_SUS_STAT#
USB_OC#6
ICH6_GPO19
USB_PP0
PM_SUS_CLK
ECSCI#
USB_RBIAS_PN
SATA0_R2
USB_OC#5
PCB_VER1
SMB_LINK_ALERT#
USB_OC#0
SYS_RESET#
ICH6_GPO21
ECSWI#
SATA0_R3
SATA0_R1
PCB_VER0
ECSMI#
USB_OC#1
ICH_GPO27
PCIE_WAKE#
PCB_VER1
PCB_VER0
PCB_VER2
PCI_AD[31..0]18,27,30,34
PCI_REQ#0 34
PCI_GNT#0 34
PCI_REQ#1 27
PCI_C/BE#0 27,30,34
PCI_C/BE#1 27,30,34
PCI_C/BE#2 27,30,34
PCI_C/BE#3 27,30,34
PCI_IRDY# 27,30,34
PCI_PAR 27,30,34
PCI_DEVSEL# 27,30,34
PCI_PERR# 27,30,34
PCI_SERR# 27,30,34
PCI_STOP# 27,30,34
PCI_TRDY# 27,30,34
ICH_PME# 18,30,34
INT_PIRQE# 30,34
INT_PIRQF# 27
PLT_RST# 24
ICH_PCIRST# 24
CLK_ICHPCI 3
PCI_FRAME#27,30,34
PM_DPRSLPVR41
PCI_REQ#2 30
PCI_GNT#2 30
PCI_GNT#1 27
PCIE_TXN0 26
PCIE_TXP0 26
INT_PIRQG# 27
ECSMI#_KBC 36
ECSWI#_KBC 36
ECSCI#_KBC 36
PM_SUS_STAT#36 USB_PN6 26
DMI_RXP1 7
DMI_TXP2 7
USB_PP4 35
DMI_TXP0 7
USB_PN3 18
USB_PP6 26
DMI_RXP2 7
PM_THRM#25
DMI_RXN1 7
DMI_RXN3 7
CLK48_USB3
PM_BMBUSY#7
DMI_TXN2 7
PCIE_RXN0 26
USB_PN5 35
SMB_CLK24,26
CLK_ICH143
VRM_PWRGD25
DMI_RXP0 7
DMI_TXN0 7
USB_PP5 35
DMI_RXP3 7
NEWCARD_RST#26
PCIE_WAKE#26
ICH6_PWROK25
DMI_TXN1 7
USB_PP1 18
PM_STPPCI#3
USB_PN4 35
PM_SLP_S3#26,33,36,42,44,45,46
DMI_TXN3 7
DMI_TXP3 7
USB_PN2 31
USB_PP2 31
PM_CLKRUN#27,30,34,36
PCIE_RXP0 26
CLK_PCIE_ICH# 3
USB_PN1 18
SMB_DATA24,26
PM_STPCPU#3,41
DMI_RXN2 7
ICH_SPKR32
RSMRST#_KBC36
USB_PP3 18
PCI_SERIRQ27,34,36
PM_SLP_S4#26,36,42
DMI_RXN0 7
DMI_TXP1 7
CLK_PCIE_ICH 3
PM_PWRBTN#36
WIRELESS_EN#34 BT_EN31
M24_RST#13
CPPE#26
USB_PP7 18
USB_PN7 18
1D5V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5 3D3V_S5
3D3V_S5
3D3V_S0
3D3V_S0
3D3V_S5
3D3V_S0
3D3V_S5
3D3V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (2 of 4)
A3
22 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (2 of 4)
A3
22 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (2 of 4)
A3
22 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Place within 500 mils of ICH
Place within 500 mils of ICH
Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.
ICH6 Pullups
PCIE AC coupling caps
need to be within 250 mils of the driver.
Intel 22.6 ohm 1%
To avoide leakage current
0706 -1
0-2
0
1
PCB_VER1
11
SA 1SB
PUMA Board Version Setting
PCB_VER0
-1
00
Ver.
SC 0
PCB_VER2
0
0
0
0
10
TP49TP49
TP14
TPAD30
TP14
TPAD30
1 2
R255 22D6R2F
R255 22D6R2F
1
2
3
4 5
6
7
8
RN8
SRN100K
RN8
SRN100K
1 2
R628 10KR2
R628 10KR2
TP48TP48
1 2
R631 10KR2
DY
R631 10KR2
DY
1 2
R287 10KR2
R287 10KR2
TP50
TPAD30
TP50
TPAD30
12
R318
10KR2
R318
10KR2
TP51
TPAD30
TP51
TPAD30
1
2
3
4 5
6
7
8
RN10
SRN10K
RN10
SRN10K
TP13TP13
1 2
R264 10KR2
R264 10KR2
12
R330
10KR2
R330
10KR2
13
D15
S1N4148-U2
DY
D15
S1N4148-U2
DY
12
R626
10KR2
R626
10KR2
1 2
R618 100R2
R618 100R2
12
R616
100KR2
R616
100KR2
TP12TP12
12
R317
100KR2
R317
100KR2
12
R637
100KR2
R637
100KR2
12
R638
100KR2
R638
100KR2
12
R331
DUMMY-R2
R331
DUMMY-R2
PERn[1] H25
LINKALERT#
Y5
SMLINK[0]
W4
MCH_SYNC#
AG21 SMLINK[1]
U6
BMBUSY#
AD19
PETp[1] G26
PETn[1] G27
PERp[1] H24
PERn[2] K25
PERp[2] K24
PETn[2] J27
PETp[2] J26
PERn[3] M25
PERp[3] M24
PETn[3] L27
PETp[3] L26
PERn[4] P24
PERp[4] P23
PETn[4] N27
PETp[4] N26
DMI[0]RXN T25
DMI[0]RXP T24
DMI[0]TXN R27
DMI[0]TXP R26
DMI[1]RXN V25
DMI[1]RXP V24
DMI[1]TXN U27
DMI[1]TXP U26
DMI[2]RXN Y25
DMI[2]RXP Y24
DMI[2]TXN W27
DMI[2]TXP W26
DMI[3]RXN AB24
DMI[3]RXP AB23
DMI[3]TXN AA27
DMI[3]TXP AA26
DMI_CLKN AD25
DMI_CLKP AC25
DMI_ZCOMP F24
DMI_IRCOMP F23
OC[4]#/GPI[9] C23
OC[5]#/GPI[10] D23
OC[6]#/GPI[14] C25
OC[7]#/GPI[15] C24
OC[0]# C27
OC[1]# B27
OC[2]# B26
OC[3]# C26
USBP[0]N C21
USBP[0]P D21
USBP[1]N A20
USBP[1]P B20
USBP[2]N D19
USBP[2]P C19
USBP[3]N A18
USBP[3]P B18
USBP[4]N E17
USBP[4]P D17
USBP[5]N B16
USBP[5]P A16
USBP[6]N C15
USBP[6]P D15
USBP[7]N A14
USBP[7]P B14
USBRBIAS# A22
USBRBIAS B22
RI#
T2
SATA[0]GP/GPI[26]
AF17
SATA[3]GP/GPI[31]
AG18 SATA[2]GP/GPI[30]
AF18 SATA[1]GP/GPI[29]
AE18
SMBCLK
Y4
SMBDATA
W5
SPKR
F8
SUS_STAT#/LPCPD#
W3
SYS_RESET#
U2
GPI[7]
AE19
GPI[8]
R1
GPI[12]
M2
GPI[13]
R6
SMBALERT#/GPI[11]
W6
STP_PCI#
AC21
GPO[19]
AB21
STP_CPU#
AD22
GPO[21]
AD20
GPO[23]
AD21
GPIO[24]
V3
GPIO[25]
P5
GPIO[27]
R3
GPIO[28]
T3
CLKRUN#
AF19
GPIO[33]
AF20
GPIO[34]
AC18
WAKE#
U5
SERIRQ
AB20
THRM#
AC20
CLK48
A27
CLK14
E10
VRMPWRGD
AF21
SUSCLK
V6
SLP_S3#
T4
SLP_S4#
T5
SLP_S5#
T6
PWROK
AA1
DPRSLPVR
AE20
BATLOW#
V2
PWRBTN#
U1
LAN_RST#
V5
RSMRST#
Y3
GPIO
PCI-EXPRESSDirect Media Interface
USB
POWER MGT CLOCKS
U42C
ICH6M
GPIO
PCI-EXPRESSDirect Media Interface
USB
POWER MGT CLOCKS
U42C
ICH6M
12
R329
DUMMY-R2
R329
DUMMY-R2
12
R615
24D9R2F
R615
24D9R2F
REQ[0]# L5
GNT[0]# C1
REQ[2]# M5
REQ[1]# B5
REQ[3]# B8
GNT[2]# F1
GNT[1]# B6
GNT[3]# C8
REQ[4]#/GPI[40] F7
REQ[5]#/GPI[1] E8
REQ[6]#/GPI[0] B7
GNT[4]#/GPO[48] E7
GNT[5]#/GPO[17] F6
GNT[6]#/GPO[16] D8
C/BE[0]# J6
C/BE[1]# H6
C/BE[2]# G4
C/BE[3]# G2
IRDY# A3
PAR E1
PCIRST# R2
DEVSEL# C3
PERR# E3
PLOCK# C5
SERR# G5
STOP# J1
TRDY# J2
PLTRST# R5
PCICLK G6
PME# P6
PIRQ[E]#/GPI[2] D9
PIRQ[F]#/GPI[3] C7
PIRQ[G]#/GPI[4] C6
PIRQ[H]#/GPI[5] M3
RSVD[6] AD9
RSVD[7] AF8
TP[3] U3
RSVD[8] AG8
AD[0]
E2
AD[2]
C2
AD[3]
F5
AD[11]
D2
AD[9]
D3
AD[4]
F3
AD[5]
E9
AD[6]
F2
AD[7]
D6
AD[12]
D5
AD[13]
H3
AD[14]
B4
AD[15]
J5
AD[10]
A2
AD[8]
E6
AD[16]
K2
AD[17]
K5
AD[18]
D4
AD[19]
L6
AD[20]
G3
AD[21]
H4
AD[22]
H2
AD[23]
H5
AD[24]
B3
AD[25]
M6
AD[26]
B2
AD[27]
K6
AD[28]
K3
AD[29]
A5
AD[30]
L1
AD[31]
K4
AD[1]
E5
FRAME#
J3
PIRQ[A]#
N2
PIRQ[B]#
L2
PIRQ[C]#
M1
PIRQ[D]#
L3
RSVD[1]
AC5
RSVD[2]
AD5
RSVD[3]
AF4
RSVD[4]
AG4
RSVD[5]
AC9
Interrupt I/F
RESERVED
PCI
U42B
ICH6M
Interrupt I/F
RESERVED
PCI
U42B
ICH6M
1 2
R630 8K2R2
R630 8K2R2
1
2
3
4
5 6
7
8
9
10
RP3
SRP10K
RP3
SRP10K
1 2
C250 SCD1U16V
C250 SCD1U16V
1 2
C251
SCD1U16V
C251
SCD1U16V
TP47TP47
TP46TP46
1
2
34
5
6
D20
CH731U-U
D20
CH731U-U
1 2
R286 10KR2
R286 10KR2
TP40
TPAD30
TP40
TPAD30
TP39
TPAD30
TP39
TPAD30
12
R625
DUMMY-R2
R625
DUMMY-R2
1 2
R639 5K6R2
R639 5K6R2
1
2
3
4
5 6
7
8
9
10
RP2
SRP10K
RP2
SRP10K
1
2
3
4
5 6
7
8
9
10
RP4
SRP10K
RP4
SRP10K
1
2
3
4
5 6
7
8
9
10
RP1
SRP10K
RP1
SRP10K
12
R332
10KR2
R332
10KR2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
V5REF_S5
ICH6_VCCLAN1D5V
V5REF_S0
V5REF_S0
3D3V_S0
3D3V_S0
V5REF_S5
ICH6_VCCLAN3D3V
ICH6_VCCLAN1D5V
ICH_VCC1_5
3D3V_S5
RTC_AUX_S5
3D3V_S5
2D5V_S0
V2D5S_PCI_IDE
1D5V_ICH_S0
1D5V_ICH_S5
3D3V_S0
3D3V_S0
1D5V_GPLL_ICH_S0
3D3V_S0
3D3V_S0
5V_S0
5V_S53D3V_S5
1D5V_ICH_S5 1D5V_S5
1D5V_ICH_S5
1D5V_ICH_S0
3D3V_S0
3D3V_S5
VCCP_GMCH_S0
3D3V_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_S5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (3 of 4)
A3
23 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (3 of 4)
A3
23 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (3 of 4)
A3
23 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Place within 100
mils of ICH
near pin AG5
Place within 100
mils of ICH
near pin AG9
mils of ICH
Place within 100
mils of ICH
Place within 100
near E26, E27
mils of ICH
Place within 100
pin AE1
mils of ICH
Place within 100
pin AG10
mils of ICH
Place within 100
pin A13
mils of ICH
Place within 100
pin G10
Place near AB3
Layout Note:
Layout Note:
Place near AG23
Place within 100
mils of ICH
Place within 100
mils of ICH
Place both
within 100 mils
of ICH near D27
Place within 100
mils of ICH pin
AG13, AG16
Layout Note:
Distribute in PCI section
near pin A2-A6 near D1-H1
Layout Note:
ALL NO_STUFF Caps do
not have layout
requirements but if
layout allows then place
next to ICH6
*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail
Layout Note:
Place above caps within
100 mils of ICH near F27, P27, AB27
PCI decoupling
Layout Note:
Layout Note:
Place near pin AA19
Intel 10 ohm
Intel 10 ohm
Intel dummy
IDE decoupling
Place within 100
mils of ICH
pin V7
mils of ICH
Place within 100
pin A17
Layout Note:
Place near U7
Layout Note:
Place near AB18
SC
12
C271
SCD1U16V
C271
SCD1U16V
12
C254
SCD01U16V3KX
C254
SCD01U16V3KX
12
C566
SCD1U16V
C566
SCD1U16V
12
C597
SCD1U10V2MX-1
DY
C597
SCD1U10V2MX-1
DY
12
TC12
ST220U10V-U
DY
TC12
ST220U10V-U
DY
12
C573
SCD1U10V2MX-1
C573
SCD1U10V2MX-1
12
C575
SCD1U10V2MX-1
C575
SCD1U10V2MX-1
12
C584
SCD1U10V2MX-1
C584
SCD1U10V2MX-1
12
C577
SCD1U10V2MX-1
C577
SCD1U10V2MX-1
12
C596
SCD1U10V2MX-1
DY
C596
SCD1U10V2MX-1
DY
12
C585
SCD1U10V2MX-1
C585
SCD1U10V2MX-1
1 2
G29
GAP-CLOSE-PWR
G29
GAP-CLOSE-PWR
12
R660
0R2-0
DY
R660
0R2-0
DY
12
C592
SCD1U10V2MX-1
DY
C592
SCD1U10V2MX-1
DY
12
C568
SCD1U10V2MX-1
C568
SCD1U10V2MX-1
12
C576
SCD1U10V2MX-1
C576
SCD1U10V2MX-1
12
C252
SCD1U10V2MX-1
C252
SCD1U10V2MX-1
12
C590
SCD1U10V2MX-1
DY
C590
SCD1U10V2MX-1
DY
12
C598
SCD1U10V2MX-1
DY
C598
SCD1U10V2MX-1
DY
2 1
D35
CH751H-40-U
D35
CH751H-40-U
12
C586
SCD1U10V2MX-1
C586
SCD1U10V2MX-1
12
R285
100R2
R285
100R2
12
C272
SCD1U10V2MX-1
C272
SCD1U10V2MX-1
12
C583
SCD1U10V2MX-1
DY
C583
SCD1U10V2MX-1
DY
12
C595
SCD1U10V2MX-1
C595
SCD1U10V2MX-1
1 2
G69
GAP-CLOSE-PWR
G69
GAP-CLOSE-PWR
12
C589
SCD1U10V2MX-1
C589
SCD1U10V2MX-1
12
C296
SCD1U10V2MX-1
C296
SCD1U10V2MX-1
12
C297
SCD1U10V2MX-1
C297
SCD1U10V2MX-1
12
C574
SCD1U10V2MX-1
C574
SCD1U10V2MX-1
12
C604
SCD1U10V2MX-1
DY
C604
SCD1U10V2MX-1
DY
12
C587
SCD1U10V2MX-1
C587
SCD1U10V2MX-1
12
C259
SCD1U10V2MX-1
C259
SCD1U10V2MX-1
12
C572
SCD1U10V2MX-1
C572
SCD1U10V2MX-1
12
C581
SCD1U10V2MX-1
C581
SCD1U10V2MX-1
12
C571
SCD1U10V2MX-1
DY
C571
SCD1U10V2MX-1
DY
12
C263
SCD1U10V2MX-1
DY
C263
SCD1U10V2MX-1
DY
12
C609
SCD1U10V2MX-1
C609
SCD1U10V2MX-1
12
C615
SCD1U10V2MX-1
DY
C615
SCD1U10V2MX-1
DY
2 1
D19
CH751H-40-U
D19
CH751H-40-U
1 2
G26
GAP-CLOSE-PWR
G26
GAP-CLOSE-PWR
12
C281
SCD1U10V2MX-1
DY
C281
SCD1U10V2MX-1
DY
12
C268
SC10U10V5ZY-L
C268
SC10U10V5ZY-L
12
C295
SC10U10V5ZY-L
C295
SC10U10V5ZY-L
12
C549
SC1U10V3ZY
C549
SC1U10V3ZY
2 1
D16
CH751H-40-U
D16
CH751H-40-U
12
C253
SC10U10V5ZY-L
C253
SC10U10V5ZY-L
12
C569
SCD1U10V2MX-1
C569
SCD1U10V2MX-1
12
C565
SCD1U10V2MX-1
C565
SCD1U10V2MX-1
12
C567
SCD1U10V2MX-1
C567
SCD1U10V2MX-1
12
C591
SCD1U10V2MX-1
C591
SCD1U10V2MX-1
12
C594
SCD1U10V2MX-1
C594
SCD1U10V2MX-1
12
C282
SCD1U10V2MX-1
DY
C282
SCD1U10V2MX-1
DY
12
C267
SCD1U10V2MX-1
C267
SCD1U10V2MX-1
12
C264
SCD1U10V2MX-1
C264
SCD1U10V2MX-1
12
R611
10R2
R611
10R2
1 2
R659
0R2-0
R659
0R2-0
12
C582
SCD1U10V2MX-1
DY
C582
SCD1U10V2MX-1
DY
12
C273
SCD1U10V2MX-1
DY
C273
SCD1U10V2MX-1
DY
12
C593
SCD1U10V2MX-1
DY
C593
SCD1U10V2MX-1
DY
12
C610
SCD1U10V2MX-1
DY
C610
SCD1U10V2MX-1
DY
12
C258
SCD01U16V3KX
C258
SCD01U16V3KX
12
C280
SC1U10V3ZY
C280
SC1U10V3ZY
VCC1_5_B
AA22 VCC1_5_A F9
VCC1_5_A U17
VCC1_5_A U16
VCC1_5_A U14
VCC1_5_A U12
VCC1_5_A U11
VCC1_5_A T17
VCC1_5_A T11
VCC1_5_A P17
VCC1_5_A P11
VCC1_5_A M17
VCC1_5_A M11
VCC1_5_A L17
VCC1_5_A L16
VCC1_5_A L14
VCC1_5_A L12
VCC1_5_A L11
VCC1_5_A AA21
VCC1_5_A AA20
VCC1_5_A AA19
VCC3_3 AA10
VCC3_3 AG19
VCC3_3 AG16
VCC3_3 AG13
VCC3_3 AD17
VCC3_3 AC15
VCC3_3 AA17
VCC3_3 AA15
VCC3_3 AA14
VCC3_3 AA12
VCC3_3 P1
VCC3_3 M7
VCC3_3 L7
VCC3_3 L4
VCC3_3 J7
VCC3_3 H7
VCC3_3 H1
VCC3_3 E4
VCC3_3 B1
VCC3_3 A6
VCCSUS1_5 U7
VCCSUS1_5 R7
VCCSUS1_5 G19
VCC1_5_A G20
VCC1_5_A F20
VCC1_5_A E24
VCC1_5_A E23
VCC1_5_A E22
VCC1_5_A E21
VCC1_5_A E20
VCC1_5_A D27
VCC1_5_A D26
VCC1_5_A D25
VCC1_5_A D24
VCC1_5_A G8
VCC2_5 AB18
VCC2_5 P7
V5REF AA18
V5REF A8
V5REF_SUS F21
VCCUSBPLL A25
VCCSUS3_3 A24
VCCRTC AB3
VCCLAN1_5/VCCSUS1_5 G11
VCCLAN1_5/VCCSUS1_5 G10
V_CPU_IO AG23
V_CPU_IO AD26
V_CPU_IO AB22
VCCSUS3_3 G16
VCCSUS3_3 G15
VCCSUS3_3 F16
VCCSUS3_3 F15
VCCSUS3_3 E16
VCCSUS3_3 D16
VCCSUS3_3 C16
VCC1_5_B
AA24
VCC1_5_B
AA25
VCC1_5_B
AB25
VCC1_5_B
AB26
VCC1_5_B
AB27
VCC1_5_B
F25
VCC1_5_B
F26
VCC1_5_B
F27
VCC1_5_B
G22
VCC1_5_B
G23
VCC1_5_B
G24
VCC1_5_B
G25
VCC1_5_B
H22
VCC1_5_B
J21
VCC1_5_B
J22
VCC1_5_B
K21
VCC1_5_B
K22
VCC1_5_B
L21
VCC1_5_B
L22
VCC1_5_B
M22
VCC1_5_B
N21
VCC1_5_B
N22
VCC1_5_B
N23
VCC1_5_B
N24
VCC1_5_B
N25
VCC1_5_B
P21
VCC1_5_B
P25
VCC1_5_B
P26
VCC1_5_B
P27
VCC1_5_B
R21
VCC1_5_B
R22
VCC1_5_B
T21
VCC1_5_B
T22
VCC1_5_B
U21
VCC1_5_B
U22
VCC1_5_B
V21
VCC1_5_B
V22
VCC1_5_B
W21
VCC1_5_B
W22
VCC1_5_B
Y21
VCC1_5_B
Y22
VCC1_5_B
AA23
VCC1_5_A
AA6
VCC1_5_A
AB4
VCC1_5_A
AB5
VCC1_5_A
AB6
VCC1_5_A
AC4
VCC1_5_A
AD4
VCC1_5_A
AE4
VCC1_5_A
AE5
VCC1_5_A
AF5
VCC1_5_A
AG5
VCC1_5_A
AA7
VCC1_5_A
AA8
VCC1_5_A
AA9
VCC1_5_A
AB8
VCC1_5_A
AC8
VCC1_5_A
AD8
VCC1_5_A
AE8
VCC1_5_A
AE9
VCC1_5_A
AF9
VCC1_5_A
AG9
VCCDMIPLL
AC27
VCC3_3
E26
VCCSATAPLL
AE1
VCC3_3
AG10
VCCLAN3_3/VCCSUS3_3
A13
VCCLAN3_3/VCCSUS3_3
F14
VCCLAN3_3/VCCSUS3_3
G13
VCCLAN3_3/VCCSUS3_3
G14
VCCSUS3_3
A11
VCCSUS3_3
U4
VCCSUS3_3
V1
VCCSUS3_3
V7
VCCSUS3_3
W2
VCCSUS3_3
Y7
VCCSUS3_3
A17
VCCSUS3_3
B17
VCCSUS3_3
C17
VCCSUS3_3
F18
VCCSUS3_3
G17
VCCSUS3_3
G18
VCC1_5_B
H21
VCC1_5_B
M21
PCIE
COREIDEPCI
SATA
USB CORE USB
PCI/IDE
REF
U42E
ICH6M
PCIE
COREIDEPCI
SATA
USB CORE USB
PCI/IDE
REF
U42E
ICH6M
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PLT_RST#_R
ICH_PCIRST#_R
SMB_ICH_CTL
PLT_RST# RSTDRV#_R
PLT_RST1# 7,13,26
PCIRST1# 27,28,30,34,36
PLT_RST#22
ICH_PCIRST#22
SMBD_ICH 3,11
SMBC_ICH 3,11
SMB_DATA22,26
SMB_CLK22,26
RSTDRV#_5 26
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5
5V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (4 of 4)
A3
24 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (4 of 4)
A3
24 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ICH6-M (4 of 4)
A3
24 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
SMBUS(ICH6 ---> SODIMM,CLKGEN)
PCIRST# Buffer to enhance the driving strength
Secondary PCI Bus reset signal.
ICH6 asserts PLTRST# to reset
devices on the platform.
PCIRST# 3V to 5V level shift for HDD & CDROM
2
14
3
RN5
SRN10KJ
RN5
SRN10KJ
1
2
34
5
6
U37
2N7002DW
U37
2N7002DW
2
14
3
RN4
SRN4D7KJ
RN4
SRN4D7KJ
1
23
147
U78A
TSAHCT32
U78A
TSAHCT32
VSS F22
VSS F4
VSS F19
VSS F17
VSS E25
VSS E19
VSS E18
VSS E15
VSS E14
VSS D7
VSS D22
VSS D20
VSS D18
VSS D14
VSS D13
VSS D10
VSS D1
VSS C4
VSS C22
VSS C20
VSS C18
VSS C14
VSS B25
VSS B24
VSS B23
VSS B21
VSS B19
VSS B15
VSS B13
VSS AG7
VSS AG3
VSS AG22
VSS AG20
VSS AG17
VSS AG14
VSS AG12
VSS AG1
VSS AF7
VSS AF3
VSS AF26
VSS AF12
VSS AF10
VSS AF1
VSS AE7
VSS AE6
VSS AE25
VSS AE21
VSS AE2
VSS AE12
VSS AE11
VSS AE10
VSS AD6
VSS AD24
VSS AD2
VSS AD18
VSS AD15
VSS AD10
VSS AD1
VSS AC6
VSS AC3
VSS AC26
VSS AC24
VSS AC23
VSS AC22
VSS AC12
VSS AC10
VSS AB9
VSS AB7
VSS AB2
VSS AB19
VSS AB10
VSS AB1
VSS AA4
VSS AA16
VSS AA13
VSS AA11
VSS A9
VSS A7
VSS A4
VSS A26
VSS A23
VSS A21
VSS A19
VSS A15
VSS A12
VSS A1
VSS
E27
VSS
Y6
VSS
Y27
VSS
Y26
VSS
Y23
VSS
W7
VSS
W25
VSS
W24
VSS
W23
VSS
W1
VSS
V4
VSS
V27
VSS
V26
VSS
V23
VSS
U25
VSS
U24
VSS
U23
VSS
U15
VSS
U13
VSS
T7
VSS
T27
VSS
T26
VSS
T23
VSS
T16
VSS
T15
VSS
T14
VSS
T13
VSS
T12
VSS
T1
VSS
R4
VSS
R25
VSS
R24
VSS
R23
VSS
R17
VSS
R16
VSS
R15
VSS
R14
VSS
R13
VSS
R12
VSS
R11
VSS
P22
VSS
P16
VSS
P15
VSS
P14
VSS
P13
VSS
P12
VSS
N7
VSS
N17
VSS
N16
VSS
N15
VSS
N14
VSS
N13
VSS
N12
VSS
N11
VSS
N1
VSS
M4
VSS
M27
VSS
M26
VSS
M23
VSS
M16
VSS
M15
VSS
M14
VSS
M13
VSS
M12
VSS
L25
VSS
L24
VSS
L23
VSS
L15
VSS
L13
VSS
K7
VSS
K27
VSS
K26
VSS
K23
VSS
K1
VSS
J4
VSS
J25
VSS
J24
VSS
J23
VSS
H27
VSS
H26
VSS
H23
VSS
G9
VSS
G7
VSS
G21
VSS
G12
VSS
G1
VSS
U42D
ICH6M
VSS
U42D
ICH6M
1 2
R644 33R2
R644 33R2
4
56
147
U44B
TSLCX08-U
U44B
TSLCX08-U
1 2
R268 33R2
R268 33R2
9
10 8
147
U44C
TSLCX08-U
U44C
TSLCX08-U
1 2
R284 33R2
R284 33R2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
THERMDP1
THERMDP2
THERMDP2THERMDP1
THERMDP2
G768_RST#
M6509_SET
FAN_FB
VCC_FAN
THERMDN
THERMDNTHERMDN
RUNPWROK
SMBD_G768D
SMBC_G768D
VRM_PWRGD
RUNPWROK
VCC_FAN
FAN_FB
SMBD_G768D
SMBC_G768D
THERMDN_M24
THERMDP_M24
THERMDP14
RSMRST# 21,36,43
S5PWR_ENABLE 46
S5_ENABLE36,42
THERMDN4
SMBC_KBC36
SMBD_KBC36
PM_THRM# 22
VGATE41
VRM_PWRGD 22
PWROK 7
CLK_PWRGD#3,41
ICH6_PWROK 22
VCCP_PWRGD42,44,45
CLK32_G768 36
DDC3_CLK 13,19
DDC3_DATA 13,19
THERMDN_M2413 THERMDP_M2413 VGA_ALERT# 13
5V_S0 5V_G768_S0 5V_G768_S0
3D3V_AUX
3D3V_AUX
5V_S0
5V_S0
5V_S5
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
G768D
A3
25 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
G768D
A3
25 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
G768D
A3
25 47Monday, July 11, 2005
<Core Design>
SYSTEM SENSOR
THERMDP1/DP2/THERMDN ON THE SAME LAYER
W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS
CAPS CLOSE TO G768B
Put these two Caps near the thermal diode.
180 ms after VCC_G768 > 4.38v, p2, 7
Close to G768D
Reserve for G768B
works at High
Speed
Put under CPU Socket
R30:5K SET TO 120°C
Must close to MAX6509
The symbol use 2nd source
The P/N is the main source
Main source:20.D0152.103
2nd source:20.D0012.103
G781 Close to VGA chip
12
R68
10KR2
R68
10KR2
12
C34
SCD1U25V3KX
C34
SCD1U25V3KX
12
BC10
SCD1U16V
DY
BC10
SCD1U16V
DY
12
BC6
SCD1U16V
BC6
SCD1U16V
1
23
D8
BAT54-1
DY
D8
BAT54-1
DY
1 2
G9
GAP-CLOSE-PWR
G9
GAP-CLOSE-PWR
VCC
1
DXP
2
DXN
3
THERM#
4
SMBCLK 8
SMBDATA 7
ALERT# 6
GND 5
U13
G781 74.00781.0BD
U13
G781 74.00781.0BD
12
R30
22KR3F
R30
22KR3F
3
1
2
Q9
S2N3904-U3
Q9
S2N3904-U3
A
1
B
2
GND
3Y4
VCC 5
U18
NC7S08-U
U18
NC7S08-U
1 2
BC9
SC2K2P
BC9
SC2K2P
12
BC5
SC10U10V6ZY-U
DY
BC5
SC10U10V6ZY-U
DY
12
EC20
SC1000P50V
EC20
SC1000P50V
SET
1
GND
2
OUT#
3HYST 4
VCC 5
U4
MAX6509HAUK-T-U
U4
MAX6509HAUK-T-U
1 2
R46 4K7R2
R46 4K7R2
12
BC7
SC2K2P
BC7
SC2K2P
1 2
BC4
SC2K2P
BC4
SC2K2P
BC1
SC470P50V3JN
DY
BC1
SC470P50V3JN
DY
BC11
SC470P50V3JN
DY
BC11
SC470P50V3JN
DY
2
14
3
RN1
SRN10KJ
RN1
SRN10KJ
FANVCC
1
VCC
2
DXP1
3
DXN
4
DXP2
5
RESET#
6
GND
7
AGND
8
TH_SHUT 16
VCC 15
SMBCLK 14
NC 13
SMBDATA 12
ALERT# 11
FG 10
CLK 9
U12
G768D
U12
G768D
NC
1
A
2
GND
3Y4
VCC 5
U63
NC7S14-U
DY
U63
NC7S14-U
DY
1 3
D33
S1N4148-U2
D33
S1N4148-U2
12
R557
10KR2
R557
10KR2
1 2
R530
0R0402-PAD
R530
0R0402-PAD
12
13 11
147
U44D
TSLCX08-U
U44D
TSLCX08-U
1 2
R529
0R0402-PAD
R529
0R0402-PAD
12
BC117
SC10U10V6ZY-U
BC117
SC10U10V6ZY-U
12
C57
SCD1U16V
C57
SCD1U16V
12
R59
2K2R2
R59
2K2R2
12
R38
10KR2
R38
10KR2
12
BC119
SCD1U16V
BC119
SCD1U16V
12
BC118
SCD1U16V
BC118
SCD1U16V
1
2
3
4
5
FAN1
ETY-CON3-S1
FAN1
ETY-CON3-S1
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
HDDCSEL1
IDE_D10
IDE_D15
IDE_D9
IDE_D11
IDE_D13
IDE_D12
IDE_D14
IDE_D8
IDE_IRQ14
IDE_D1
PBIDDACK#
IDE_D0
IDE_D6
IDE_D7
IDE_D4
IDE_D3
IDE_D2
HDD_LED#
IDE_D5
DIAG
CONN_TP2
PCIE_RXP0_R
CONN_WAKE#
CONN_CLKREQ#
PERST#
SMB_CLK_C
CPUSB#
CPPE#
CONN_TP3
CPUSB#
CPUSB#
NEWCARD_OC#
TPS2231_RST#
PERST#
CPPE#
PCIE_RXN0_R
CONN_CLKREQ#
IDE_D5
IDE_A1
IDE_DACK#
RSTDRV#_5
IDE_D14
IDE_D0
BAY_ID0
IDE_A0
IDE_D9
IDE_D3
CDROM_CSEL
IDE_IRQ14
IDE_D12
IDE_CS#1
DIAG
IDE_IOW#
IDE_D15
IDE_D11
IDE_IORDY
IDE_D6
IDE_D8
IDE_D1
IDE_D4
IDE_A2
IDE_DREQ
IDE_D13
IDE_D10 IDE_D7
IDE_IOR#
IDE_CS#0
IDE_D2
SMB_DATA_C
PLT_RST1#
TPS2231_RST#
IDE_CS#121 IDE_A221
IDE_D[15..0]21
CD_AUDR32
SMB_CLK22,24 SMB_DATA22,24
IDE_A1 21
IDE_IOR# 21
IDE_A0 21
IDE_IOW# 21
IDE_DREQ 21
IDE_CS#0 21
IDE_IORDY 21
IDE_DACK# 21
HDD_LED# 19
IDE_IRQ14 21
CD_AUDL 32
CD_AGND 32
CDROM_LED# 19
CLK_PCIE_NEW3
PCIE_RXP022 PCIE_RXN022
CLK_PCIE_NEW#3
PCIE_WAKE#22
PCIE_TXN022 PCIE_TXP022
USB_PP622 USB_PN622
CPPE#22
PM_SLP_S3# 22,33,36,42,44,45,46
PLT_RST1# 7,13,24
RSTDRV#_5 24
PM_SLP_S4# 22,36,42
PREQ2# 3
NEWCARD_RST#22
5V_S0
3D3V_S5 1D5V_S0 3D3V_NEW_LAN_S53D3V_NEW_S0 1D5V_NEW_S0
5V_S0
3D3V_S0
3D3V_S0
3D3V_S0
5V_S0
5V_S0
3D3V_NEW_S0
3D3V_NEW_LAN_S5
1D5V_NEW_S0
5V_S0
3D3V_S5
5V_S0
5V_S0
1D5V_NEW_S0
3D3V_NEW_S0
3D3V_S5
1D5V_S0
3D3V_S0
3D3V_NEW_LAN_S5
3D3V_S5
3D3V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
HDD / CDROM/NEWCARD
A3
26 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
HDD / CDROM/NEWCARD
A3
26 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
HDD / CDROM/NEWCARD
A3
26 47Monday, July 11, 2005
<Core Design>
CDROM
HDD Connector
NEWCARD Connector
Place them Near to Chip Place them Near to Connector
SMBUS(ICH6--NEWCARD,LAN)
For Newcard socket
CSEL
PIN 49,50 DON'T USE
The symbol use 2nd source
The P/N is the main source
Main source:20.10150.050
2nd source:20.B0040.050
SC
12
R288
DUMMY-R2
R288
DUMMY-R2
2
1 4
3
RN7
SRN100KJ
RN7
SRN100KJ
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
47
45
46
48
HDD1
SYN-CONN44D-5
HDD1
SYN-CONN44D-5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
MH2
MH1
CN14
JAE-CON26-U
CN14
JAE-CON26-U
1 2
R311
10KR2
R311
10KR2
1 2
R267 0R2-0R267 0R2-0
12
C257
SCD1U16V
DY
C257
SCD1U16V
DY
1
3 4
2
SKT3
CARD-SKT21-U2
SKT3
CARD-SKT21-U2
A
1
B
2
GND
3Y4
VCC 5
U43
NC7SZ08-U
DY
U43
NC7SZ08-U
DY
NC#1 1
SYSRST# 2
SHDN# 3
STBY# 4
3.3VIN
5
3.3VIN
6
3.3VOUT
7
3.3VOUT
8
PERST#
9
NC#10 10
GND 11
NC#12 12
NC#13 13
CPUTSB# 14
CPPE# 15
1.5VOUT
16
1.5VIN
18 1.5VIN
19
AUX_OUT
20
3.3VAUX_IN
21
RCLKEN 22
OC#
23 NC#24 24
1.5VOUT
17
GND 25
U41
TPS2231
U41
TPS2231
1 2
R542
10KR2
R542
10KR2
12
C483
SCD1U16V
C483
SCD1U16V
12
R528
470R2
R528
470R2
1 2
R532 0R0402-PADR532 0R0402-PAD
12
C256
SCD1U16V
DY
C256
SCD1U16V
DY
52
54
51
53 12
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
CN16
SYN-CONN50-4R3GP
CN16
SYN-CONN50-4R3GP
12
C480
SC10U10V5ZY-L
C480
SC10U10V5ZY-L
12
C265
SCD1U16V
C265
SCD1U16V
12
C269
SCD1U16V
C269
SCD1U16V
12
C261
SCD1U16V
C261
SCD1U16V
TP18TP18
TP35TP35
TP38TP38
TP45TP45
21
D32
SSM24L-U
DY
D32
SSM24L-U
DY
12
C292
SCD1U16V
C292
SCD1U16V
12
R527
4K7R2
R527
4K7R2
12
R540
2K7R2J
DY
R540
2K7R2J
DY
12
R531
4K7R2
DY
R531
4K7R2
DY
12
R541
4K7R2
R541
4K7R2
1
2 3
G
S
D
Q16
2N7002
G
S
D
Q16
2N7002
12
BC69
SC10U10V6ZY-U
BC69
SC10U10V6ZY-U
TP15
TP-2
TP15
TP-2
12
C270
SC10U10V5ZY-L
C270
SC10U10V5ZY-L
1 2
R320 8K2R2
R320 8K2R2
12
C260
SC10U10V5ZY-L
C260
SC10U10V5ZY-L
12
R488
10KR2
R488
10KR2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PCI_AD22
PCI_AD2
PCI_AD31
1394_CNA
PCI_AD13
PCI_AD15
PCI_AD22
PCI_AD29
1394_XO
PCI_AD11
PCI_AD12
PCI_AD20
PCI_AD28
1394_XI
CB_MFUNC5
VDPLL_15
PCI_AD6
PCI_AD7
VDPLL_33
PCI_AD21
1394_PHYTEST
PCI_AD19
PCI_AD27
1394_R0
7421_PME#
1394_R1
PCI_AD18
PCI_AD26
1394_CPS
CS_SUSPEND#
CS_IDSEL
B_USB_EN
PCI_AD8
PCI_AD9
PCI_AD17
PCI_AD25
PCI_AD3
MC_PWR_CTRL-1
PCI_AD5
PCI_AD10
PCI_AD16
PCI_AD24
MC_PWR_CTRL#
PCI_AD4
PCI_AD14
PCI_AD23
PCI_AD30
PCM_INTB#
1394_TPB1N
1394_TPB1P
INT_PIRQG#
SD_CD#
SM_CD# 7421_LED
MC_PWR_CTRL#
1394_TPBIAS1
1394_TPB1P
1394_TPB1N
PCI_AD0
A_USB_EN
PCI_AD1
PCI_AD[31..0]18,22,30,34
PCIRST1#24,28,30,34,36
PCI_SPKR32
INT_PIRQG# 22
INT_PIRQF# 22
PCI_C/BE#222,30,34
1394_TPB0N 31
MS_SDIO 29
SM_D7 29
SM_R/B# 29
PCI_REQ#122
1394_TPBIAS0 31
SM_D4 29
SD_WP 29
CB_LATCH28
PCI_C/BE#122,30,34
PCI_FRAME#22,30,34
PCI_STOP#22,30,34
MS_D1 29
1394_TPB0P 31
PCLK_PCM3
SM_CD# 29
PCI_DEVSEL#22,30,34
MS_CLK 29
SM_D5 29
SM_CLE 29
PCI_IRDY#22,30,34
CLK48_CARDBUS 3
PCI_C/BE#022,30,34
CB_CLOCK28
1394_TPA0N 31
MS_BS 29
PCI_GNT#122
SM_RE# 29
SM_D6 29
PCI_C/BE#322,30,34
PCI_PAR22,30,34
MS_D3 29
CB_DATA28
PCI_SERR#22,30,34
MS_CD# 29
PCI_TRDY#22,30,34
1394_TPA0P 31
SM_ALE 29
PCI_PERR#22,30,34
MS_D2 29
7421_LED 19
1394_TPB1N 31
1394_TPB1P 31
PCI_SERIRQ 22,34,36
PM_CLKRUN# 22,30,34,36
SD_CD# 29
MC_PWR_CTRL 29
1394_TPBIAS1 31
1394_TPA1P 31
1394_TPA1N 31
3D3V_S0
3D3V_PLL_S0
3D3V_PLL_S03D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_PLL_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TI SNC1Q21 (1 of 2)
A3
27 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TI SNC1Q21 (1 of 2)
A3
27 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TI SNC1Q21 (1 of 2)
A3
27 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
MS/MS_pro XD
SM
MS/MS_pro
SD
PC[2:0]=000
INTA# CARBUS 1
INTB# NONE
INTC# 1394
INTD# CARD READER
* All 1394 signals must be routed on top side only
* Differential pairs of each ports should have equal trace length
* Stubs must be keep as short as possible
Bypass/Decupoling Capacitors
Should be places as close to
PCI7421 as possible
1 2
X2
X-24D576M-2
X2
X-24D576M-2
1 2
R281
100KR2
R281
100KR2
12
C275
SC10U10V5ZY-L
C275
SC10U10V5ZY-L
1 2
C294
SC12P
C294
SC12P
1 2
R338 0R2-0R338 0R2-0
12
C276
SC1000P50V
C276
SC1000P50V
12
C311
SCD1U16V
DY
C311
SCD1U16V
DY
12
C314
SCD1U16V
C314
SCD1U16V
12
C310
SCD1U16V
DY
C310
SCD1U16V
DY
12
C313
SC1000P50V
C313
SC1000P50V
12
C287
SCD1U16V
C287
SCD1U16V
12
R282
10KR2
R282
10KR2
12
C288
SCD1U16V
C288
SCD1U16V
12
C289
SCD1U16V
DY
C289
SCD1U16V
DY
TP19
TPAD30
TP19
TPAD30
12
C312
SC1000P50V
DY
C312
SC1000P50V
DY
1
23
D17
BAW56-1
D17
BAW56-1
1 2
R289 6K34R3F
R289 6K34R3F
1
2
34
5
6
U45
2N7002DW
U45
2N7002DW
12
R280
10KR2
R280
10KR2
1 2
R335
4K7R2
R335
4K7R2
1 2
R300 100R2
R300 100R2
1 2
C293
SCD1U16V
C293
SCD1U16V
VCCP
W3
VCCP
W10
AD31
U2
AD30
V1
AD29
V2
AD28
U3
AD27
W2
AD26
V3
AD25
U4
AD24
V4
AD23
V5
AD22
U5
AD21
R6
AD20
P6
AD19
W6
AD18
V6
AD17
U6
AD16
R7
AD15
V9
AD14
U9
AD13
R9
AD12
N9
AD11
V10
AD10
U10
AD9
R10
AD8
N10
AD7
V11
AD6
U11
AD5
R11
AD4
W12
AD3
V12
AD2
U12
AD1
N11
AD0
W13
C/BE0#
W11
C/BE1#
W9
C/BE2#
W7
C/BE3#
W4
PAR
P9
FRAME#
V7
TRDY#
R8
IRDY#
U7
STOP#
W8
DEVSEL#
N8
IDSEL
W5
PERR#
V8
SERR#
U8
REQ#
U1
GNT#
T2
PCLK
P5
PRST#
R3
GRST#
T1
RI_OUT#/PME#
T3
SUSPEND#
R2
DATA
N1
CLOCK
L6
LATCH
N2
SPKROUT
L7
B_USB_EN#
E1
A_USB_EN#
E2
SDA
M2
SCL
M3
NC#W17
W17
RSVD
T19
TEST0
P12
RSVD
L5
RSVD
L2
RSVD
K5
RSVD
K3
RSVD
K7
RSVD
L1
RSVD
L3
SD_WP/SM_CE H7
SM_CLE J7
SM_R/B# K1
SM_PHYS_WP# K2
SD_DAT0/SM_D4 H3
SD_DAT1/SM_D5 J6
SD_DAT2/SM_D6 J1
SD_DAT3/SM_D7 J2
SD_CD# E3
MS_CD# F5
SM_CD# F6
MS_CLK/SD_CLK/SM_EL_WP# G5
MS_BS/SD_CMD/SM_WE# F3
MS_DATA3/SD_DAT3/SM_D3 H5
MS_DATA2/SD_DAT2/SM_D2 G3
MS_DATA1/SD_DAT1/SM_D1 G2
MS_SDIO(DATA0)/SD_DAT0/SM_D0 G1
SD_CLK/SM_RE# J5
SD_CMD/SM_ALE J3
MC_PWR_CTRL_0 F1
MC_PWR_CTRL_1 F2
AVDD R13
AVDD R14
AVDD V17
VDPLL_33 V19
VSSPLL P14
VDPLL_15 T18
VSSPLL T17
R0 U18
R1 U19
TPBIAS0 U15
TPA0P V15
TPA0N W15
TPB0P V14
TPB0N W14
PHY_TEST_MA R17
CPS M11
CNA P15
XO R19
XI R18
PC0(TEST1) R12
PC1(TEST2) U13
PC2(TEST3) V13
AGND N12
AGND U14
AGND U16
TPBIAS1 U17
TPA1P V18
TPA1N W18
TPB1P V16
TPB1N W16
MFUNC0 N3
MFUNC1 M5
MFUNC2 P1
MFUNC3 P2
MFUNC4 P3
MFUNC5 N5
MFUNC6 R1
CLK_48 M1
U1-1
U1-7
U1-10
U1-5
U1-6
U1-9
U1-8
CARD BUS
1394
SD/SDIO
UNUSED TERMINALS
1 of 4
U47A
PCI7411-1
U1-1
U1-7
U1-10
U1-5
U1-6
U1-9
U1-8
CARD BUS
1394
SD/SDIO
UNUSED TERMINALS
1 of 4
U47A
PCI7411-1
1 2
R324 0R2-0
R324 0R2-0
1 2
R312 10KR2
R312 10KR2
1 2
R322
4K7R2
R322
4K7R2
1 2
G28
GAP-CLOSE-PWR
G28
GAP-CLOSE-PWR
TP52TPAD30 TP52TPAD30
1 2
C301
SC15P
C301
SC15P
1 2
R336 10KR2R336 10KR2
1 2
R337 10KR2
R337 10KR2
12
C274
SC1U10V3KX
C274
SC1U10V3KX
12
R323
150R2
R323
150R2
12
C283
SCD1U16V
C283
SCD1U16V
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PS_SHDN#
PT_PORT
VR_PORT
PCIRST1#
CBB_WAIT# 29
CBB_INPACK# 29
CBB_BVD1# 29
CBB_WP 29
CBB_RESET 29
CBB_BVD2# 29
CBB_CD1# 29
CBB_CD2# 29
CBB_VS1# 29
CBB_VS2# 29
CBB_CE2# 29
CBB_OE# 29
CBB_D10 29
CBB_D9 29
CBB_D1 29
CBB_D8 29
CBB_D0 29
CBB_D15 29
CBB_D7 29
CBB_D13 29
CBB_D6 29
CBB_D12 29
CBB_D5 29
CBB_D11 29
CBB_D4 29
CBB_D3 29
CBB_D14 29
CBB_D2 29
CBB_A18 29
CBB_A0 29
CBB_A1 29
CBB_A2 29
CBB_A3 29
CBB_A4 29
CBB_A5 29
CBB_A6 29
CBB_A25 29
CBB_A7 29
CBB_A24 29
CBB_A17 29
CBB_A9 29
CBB_A11 29
CBB_A10 29
CBB_A12 29
CBB_A8 29
CBB_A13 29
CBB_A23 29
CBB_A22 29
CBB_A15 29
CBB_A20 29
CBB_A21 29
CBB_A19 29
CBB_A14 29
CBB_IOWR# 29
CBB_IORD# 29
CBB_RDY 29
CBB_REG# 29
CBB_CE1# 29
CBB_WE# 29
CBB_A16 29
CB_DATA27
PCIRST1#24,27,30,34,36
CB_CLOCK27 CB_LATCH27
3D3V_S0
VPP_ASKT_S0
3D3V_S0
5V_S0
VCC_ASKT_S0
VCC_ASKT_S0
VCC_ASKT_S0VPP_ASKT_S0
5V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TI PCI7411 GHK (2 of 2)
A3
28 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TI PCI7411 GHK (2 of 2)
A3
28 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
TI PCI7411 GHK (2 of 2)
A3
28 47Monday, July 11, 2005
Leopard2
-1
<Core Design>
Power switch
12
C607
SC150P50V2JN
C607
SC150P50V2JN
12
C612
SCD1U16V
C612
SCD1U16V
VCCA A5
VCCA A11
A_CAD31/A_D10 D1
A_CAD30/A_D9 C1
A_CAD29/A_D1 D3
A_CAD28/A_D8 C2
A_CAD27/A_D0 B1
A_CAD26/A_A0 B4
A_CAD25/A_A1 A4
A_CAD24/A_A2 E6
A_CAD23/A_A3 B5
A_CAD22/A_A4 C6
A_CAD21/A_A5 B6
A_CAD20/A_A6 G9
A_CAD19/A_A25 C7
A_CAD18/A_A7 B7
A_CAD17/A_A24 A7
A_CAD16/A_A17 A10
A_CAD15/A_IOWR# E11
A_CAD14/A_A9 G11
A_CAD13/A_IORD# C11
A_CAD12/A_A11 B11
A_CAD11/A_OE# C12
A_CAD10/A_CE2# B12
A_CAD9/A_A10 A12
A_CAD8/A_D15 E12
A_CAD7/A_D7 C13
A_CAD6/A_D13 F12
A_CAD5/A_D6 A13
A_CAD4/A_D12 C14
A_CAD3/A_D5 E13
A_CAD2/A_D11 A14
A_CAD1/A_D4 B14
A_CAD0/A_D3 E14
A_CC/BE3#/A_REG# C5
A_CC/BE2#/A_A12 F9
A_CC/BE1#/A_A8 B10
A_CC/BE0#/A_CE1# G12
A_CPAR/A_A13 G10
A_CFRAME#/A_A23 C8
A_CTRDY#/A_A22 A8
A_CIRDY#/A_A15 B8
A_CSTOP#/A_A20 A9
A_CDEVSEL#/A_A21 C9
A_CBLOCK#/A_A19 E10
A_CPERR#/A_A14 F10
A_CSERR#/A_WAIT# B3
A_CREQ#/A_INPACK# E7
A_CGNT#/A_WE# B9
A_CSTSCHG/A_BVD1(STSCHG#/RI#) B2
A_CCLKRUN#/A_WP(IOIS16#) C3
A_CCLK/A_A16 E9
A_CINT#/A_READY(IREQ#) C4
A_CRST#/A_RESET A6
A_CAUDIO/A_BVD2(SPKR#) A2
A_CCD1#/A_CD1# C15
A_CCD2#/A_CD2# E5
A_CVS1/A_VS1# A3
A_CVS2/A_VS2# E8
A_RSVD/A_D14 B13
A_RSVD/A_D2 D2
A_RSVD/A_A18 C10
CARDBUS A
U1-2
2 of 4
U47B
PCI7411-1
CARDBUS A
U1-2
2 of 4
U47B
PCI7411-1
RSVD D19
RSVD K19
RSVD B15
RSVD A16
RSVD B16
RSVD A17
RSVD C16
RSVD D17
RSVD C19
RSVD D18
RSVD E17
RSVD E19
RSVD G15
RSVD F18
RSVD H14
RSVD H15
RSVD G17
RSVD K17
RSVD L13
RSVD K18
RSVD L15
RSVD L17
RSVD L18
RSVD L19
RSVD M17
RSVD M14
RSVD M15
RSVD N19
RSVD N18
RSVD N15
RSVD M13
RSVD P18
RSVD P17
RSVD P19
RSVD F15
RSVD G18
RSVD K14
RSVD M18
RSVD K13
RSVD G19
RSVD H17
RSVD J13
RSVD J17
RSVD H19
RSVD J19
RSVD J18
RSVD B18
RSVD E18
RSVD J15
RSVD F14
RSVD A18
RSVD H18
RSVD B19
RSVD F17
RSVD C17
RSVD N13
RSVD B17
RSVD C18
RSVD F19
RSVD N17
RSVD A15
RSVD K15
CARDBUS B
U1-3
3 of 4
U47C
PCI7411-1
CARDBUS B
U1-3
3 of 4
U47C
PCI7411-1
VCC
H8
VCC
H9
VCC
H10
VCC
H11
VCC
H12
VCC
J8
VCC
M7
VCC
J12
VCC
M9
VCC
M10
VCC
M12
VCC
K8
VCC
K12
VCC
N7
GND
G7
GND
G8
GND
G13
GND
H13
GND
J9
GND
J10
GND
J11
GND
K9
GND
K10
GND
K11
GND
L8
GND
L9
GND
L10
GND
L11
GND
L12
GND
M8
VR_PORT M19
VR_PORT H1
VR_EN# H2
POWER TERMINALS
U1-4
4 of 4
U47D
PCI7411-1
POWER TERMINALS
U1-4
4 of 4
U47D
PCI7411-1
12
C611
SC1U10V3ZY
C611
SC1U10V3ZY
12
C603
SC4D7U10V5ZY
DY
C603
SC4D7U10V5ZY
DY
1 2
C606
SCD01U16V2KX
C606
SCD01U16V2KX
DATA
3
CLOCK
4
LATCH
5
RESET#
12
SHDN#
21
GND
11
NC 6
NC 16
NC 22
NC 23
3.3V
13
NC 14
5V
1
5V
2NC 24
12V
7
12V
20
AVCC 9
AVCC 10
AVPP 8
NC 17
NC 18
NC 19
OC# 15
GND
25
U77
TSP2220A
U77
TSP2220A
12
C302
SCD1U16V
C302
SCD1U16V
12
C602
SC4D7U10V5ZY
C602
SC4D7U10V5ZY
12
C605
SCD1U16V
C605
SCD1U16V
12
R634
100KR2
R634
100KR2
12
C613
SCD1U16V
C613
SCD1U16V
12
C309
SCD1U16V
C309
SCD1U16V
1 2
R635 10KR2
R635 10KR2
12
C608
SCD1U16V
C608
SCD1U16V
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
MS_BS_1
MS_CLK
MS_D1
MS_D2
MS_D3
SD_CD#
MS_BS_1
MS_CD#
MS_SDIO
SD_WP
SM_RE#
SM_R/B#
SM_CLE
SD_WP
SM_ALE
MS_CLK_R0
SM_D4
SM_D5
SM_D6
SM_D7
MS_SDIO
MS_D1
MS_D2
MS_D3
SM_CD#
SM_CD#
MS_CLK_R0
MS_CLK_R
MS_CLK_R MS_CLK
CBB_REG#
CBB_RESET
CBB_D13
CBB_D2
CBB_D8
CBB_INPACK#
CBB_WP
CBB_D0
CBB_A12
CBB_D10
CBB_BVD1#
CBB_A24
CBB_A4
CBB_BVD2#
CBB_CD1#
CBB_A23
CBB_A5
CBB_D9
CBB_WAIT#
CBB_A3
CBB_D3
CBB_D11
CBB_A1
CBB_D4
CBB_D14
CBB_A6
CBB_A25
CBB_D1
CBB_D5
CBB_A16
CBB_A16
CBB_A22
CBB_D12
CBB_VS2#
CBB_A0
CBB_A2
CBB_A7
CBB_CE1#
CBB_CD2#
CBB_A15
CBB_D7
CBB_D6
CBB_A14
CBB_A21
CBB_A18
CBB_IORD#
CBB_A20
CBB_A19
CBB_VS1#
CBB_A9
CBB_A11
CBB_OE#
CBB_A17
CBB_A8
CBB_RDY
CBB_WE#
CBB_CE2#
CBB_A13
CBB_A10
CBB_D15
CBB_IOWR#
SM_CD#
CBB_RESET SM_RE# MS_BS
SM_ALE
SM_R/B# SD_WP
SM_CLE
MS_D2
MS_D1
MS_SDIO
MS_D3
MS_BS
SD_CD#
MS_CLK
MS_CLK_R
MS_SDIO27 MS_D127 MS_D227 MS_D327
SM_CD#27
MS_CD# 27
SM_ALE 27
SD_CD# 27
SM_CLE 27
SM_RE# 27
SM_R/B# 27
SD_WP 27
SM_D427
SM_D727
SM_D527 SM_D627
MS_CLK 27
CBB_BVD2# 28
CBB_BVD1# 28
CBB_VS2# 28
CBB_VS1# 28
CBB_CE2# 28
CBB_CE1# 28
CBB_RESET 28
CBB_INPACK# 28
CBB_WAIT# 28
CBB_WP 28
CBB_CD1# 28
CBB_REG# 28
CBB_WE# 28
CBB_OE# 28
CBB_IOWR# 28
CBB_CD2# 28
CBB_IORD# 28
CBB_D[0..15] 28
CBB_A[0..25] 28
CBB_RDY 28
MS_BS 27
MC_PWR_CTRL 27
3D3V_CR_S0
VPP_ASKT_S0
VCC_ASKT_S0
VCC_ASKT_S0
3D3V_CR_S0 3D3V_CR_S0
3D3V_CR_S0
3D3V_CR_S0 3D3V_CR_S0
3D3V_CR_S0
3D3V_S0
3D3V_CR_S0 3D3V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PCMCIA SLOT/ CARDBUS SKT
A3
29 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PCMCIA SLOT/ CARDBUS SKT
A3
29 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PCMCIA SLOT/ CARDBUS SKT
A3
29 47Thursday, July 07, 2005
Leopard2
-1
<Core Design>
PCMCIA Socket
Clock AC termination
Place close to pin 19.
33MHz clock for 32-bit
Cardbus card I/F
6 in 1 Connector
Cardbus I/F
47K
1 2
R215 22R2R215 22R2
69
1
35
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
70
CBUS1
CARDBUS68P-9
62.10024.491
CBUS1
CARDBUS68P-9
62.10024.491
12
C290
SCD01U16V3KX
C290
SCD01U16V3KX
12
C239
SC1U10V3ZY
C239
SC1U10V3ZY
12
R301
DUMMY-R2
R301
DUMMY-R2
12
C601
SC1000P50V
C601
SC1000P50V
1 2
R599 33R2
R599 33R2
12
C517
SCD01U16V2KX
C517
SCD01U16V2KX
12
C509
SCD01U16V2KX
C509
SCD01U16V2KX
12
C537
SCD01U16V2KX
C537
SCD01U16V2KX
12
C531
SCD01U16V2KX
C531
SCD01U16V2KX
1 2
3 4
SKT1
CARDBUS-SKT45-U1
SKT1
CARDBUS-SKT45-U1
12
C600
SCD1U16V
C600
SCD1U16V
OUT
1
GND
2
SET
3ON# 4
IN 5
U34
AAT46101GV-1
U34
AAT46101GV-1
12
R558
2K2R2
DY
R558
2K2R2
DY
A
1
B
2
GND
3SE 4
VCC 5
U75
NC7SZ66P5X
DY
U75
NC7SZ66P5X
DY
1 2
R193 33R2
R193 33R2
1 2
R604 33R2
R604 33R2
12
R579
2K2R2
R579
2K2R2
12
R228
4K7R2
R228
4K7R2
1 2
R588 330R2
R588 330R2
12
R216
2K2R2
R216
2K2R2
12
C599
SCD1U16V
C599
SCD1U16V
1 2
R217 33R2
R217 33R2
12
R283
DUMMY-R2
R283
DUMMY-R2
12
C279
DUMMY-C2
C279
DUMMY-C2
12
C588
SC22U10V6ZY-U
C588
SC22U10V6ZY-U
12
R239
15KR2
R239
15KR2
12
R560
2K2R2
DY
R560
2K2R2
DY
12
R578
4K7R2
R578
4K7R2
12
R577
2K2R2
R577
2K2R2
SM-CD-COM 2
SM-CD-SW 3
RSV#4 4
SD-WP-SW 5
SD-CLK 8
SD-VCC
9
SD-CMD 10
MS-BS 13
MS-INS 17
MS-SCLK 19
MS-VCC
20
S.M-LVD
25
S.M-VCC
29
S.M-CD#
30
S.M-D0
34
XD-CD 39
XD-VCC
40
SD-CD-COM 41
SD-CD-SW 42
SM-WP-SW 43
SD-DAT1
6SD-DAT0
7
SD-DAT3
11 SD-DAT2
12
MS-DATA1
14 MS-DATA0
15
MS-DATA2
16
MS-DATA3
18
S.M/XD-D4
21
S.M/XD-D5
22
S.M/XD-D6
23
S.M/XD-D7
24
S.M/XD-D3
31 S.M/XD-D2
32 S.M/XD-D1
33
S.M/XD-WP-IN 35
S.M#/XD-R/B 26
S.M#/XD-RE 27
S.M#/XD-CE 28
S.M#/XD-WE 36
S.M#/XD-ALE 37
S.M#/XD-CLE 38
GND 1
GND 44
GND 45
GND 46
SKT2
SKT-MEMO-9-U1
SKT2
SKT-MEMO-9-U1
1 2
R559 0R2-0
DY
R559 0R2-0
DY
12
C230
SCD1U16V
C230
SCD1U16V
1 2
R213 33R2
R213 33R2
1 2
R214 33R2
R214 33R2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
EEDO
EECS_3
PCI_AD3
PCI_PAR
PCI_AD18
PCI_AD13
PCI_AD20
AVDD33 PCI_AD14
PCI_SERR#
PCI_C/BE#2
PCI_AD22
PCI_C/BE#3
LAN_X1
EEDO
VDD25
PCI_AD10
PCI_AD11
PCI_PERR#
PCI_AD4
PCI_AD19
PCI_AD29
LAN_X1
EEDI
EESK
EESK
PCI_C/BE#1
PCI_AD25
PCI_AD26
LAN_X2
PCI_STOP#
PCI_AD24
PCI_AD2
PCI_AD5
PCI_AD15
VDD25
AVDD25
LAN_LED0
EEDI
PCI_DEVSEL#
PCI_AD17
PCI_AD30
AVDD33
LAN_LED2
PCI_C/BE#0
PCI_AD12
VDD25
PCI_TRDY#
PCI_AD16
PCI_AD31
EECS_3
PCI_AD1
PCI_AD8
VDD25
CTRL25
PCI_AD21
PCI_AD23
PCI_AD28
PCI_AD0
PCI_AD6
PCI_AD7
LAN_IDSEL
LAN_X2
LAN_LED1
PCI_AD9
ISOLATE
AVDD33
CTRL25 LAN_PWR_CTRL
PCI_AD27
PCI_AD23
ISOLATE
TX-
TX+ RX+
RX-
INT_PIRQE#22,34
PCI_REQ#222
RX-31
PCI_TRDY# 22,27,34
PCI_DEVSEL# 22,27,34
PCI_PAR 22,27,34
PCI_FRAME# 22,27,34
TX+31
PCI_GNT#222
PCI_IRDY# 22,27,34
PCLK_LAN3 PCIRST1#24,27,28,34,36
PCI_PERR# 22,27,34
PCI_SERR# 22,27,34
PM_CLKRUN# 22,27,34,36
RX+31
TX-31
PCI_STOP# 22,27,34
ICH_PME#18,22,34
PCI_C/BE#[0..3] 22,27,34
PCI_AD[0..31] 18,22,27,34
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
AVDD33
3D3V_LAN_S53D3V_S5
VDD25
AVDD25
3D3V_LAN_S5
VDD25
3D3V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
LAN RTL8100C
A3
30 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
LAN RTL8100C
A3
30 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
LAN RTL8100C
A3
30 47Thursday, July 07, 2005
<Core Design>
Close to RTL8100C
Pin121,Pin122
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
GND
GND
GND
GND
GND
GND
AVDD33
GND
GND
GND
GND
GND
VDD25
VDD25
VDD25
GND
AVDD25
TX+
TX-
AVDD33
RX+
RX-
AVDD33
ISOLATEB
INTAB
PCIRSTB
GNTB
REQB
PMEB
FRAMEB
IRDYB
CLKRUNB
TRDYB
DEVSELB
STOPB
PERRB
SERRB
VDD25
Close
to LAN
chip
1 2
R152 0R3-U
R152 0R3-U
12
C177
SCD1U16V
C177
SCD1U16V
12
C178
SCD1U16V
C178
SCD1U16V
12
C175
SCD1U16V
C175
SCD1U16V
12
C170
SCD1U16V
DY
C170
SCD1U16V
DY
TP8TP8
1 2
G19
GAP-CLOSE-PWR
G19
GAP-CLOSE-PWR
1 2
G23
GAP-CLOSE-PWR
G23
GAP-CLOSE-PWR
TP9TP9
12
R157 5K6R3F
R157 5K6R3F
1 2
R174 3K6R3
R174 3K6R3
12
L14
BLM11A601S
L14
BLM11A601S
12
C176
SCD1U16V
C176
SCD1U16V
1 2
R165
100R2
R165
100R2
12
R153
49D9R2F
R153
49D9R2F
CS
1
SK
2
DI
3
DO
4
VCC 8
DC 7
ORG 6
GND 5
U27
M93C46-W-3
U27
M93C46-W-3
TP7TP7
12
R154
49D9R2F
R154
49D9R2F
12
R150
1KR2
R150
1KR2
2
1
3
Q11
CHP69
Q11
CHP69
12
C169
SCD1U16V
C169
SCD1U16V
VSS 128
RSET 127
AVDD18 126
CTRL18 125
VSS 124
VSS 123
XTAL2 122
XTAL1 121
AVDDH 120
VSSPST 119
GND 118
LED0 117
VDD18 116
LED1 115
LED2 114
LED3 113
GND 112
EESK 111
VDD18 110
EEDI 109
EEDO 108
VDD33 107
EECS 106
LANWAKE 105
PCIAD0 104
PCIAD1 103
MDI0+
1
MDI0-
2
AVDDL
3
VSS
4
MDI1+
5
MDI1-
6
AVDDL
7
CTRL25
8
VSS
9
AVDDH
10
HSDAC+
11
HSDAC-
12
VSS
13
MDI2+
14
MDI2-
15
AVDDL
16
VSS
17
MDI3+
18
MDI3-
19
AVDDL
20
VSSPST
21
GND
22
ISOLATE#
23
VDD18
24
INTA#
25
VDD33
26
PCIRST#
27
PCICLK
28
GNT#
29
REQ#
30
PME#
31
VDD18
32
PCIAD31
33
PCIAD30
34
GND
35
PCIAD29
36
PCIAD28
37
VSSPST
38
PCIAD27
39
PCIAD26
40
VDD33
41
PCIAD25
42
PCIAD24
43
CBEB3
44
VDD18
45
IDSEL
46
PCIAD23
47
GND
48
PCIAD22
49
PCIAD21
50
VSSPST
51
GND
52
PCIAD20
53
VDD18
54
PCIAD19
55
VDD33
56
PCIAD18
57
PCIAD17
58
PCIAD16
59
CBEB2
60
FRAME#
61
GND
62
IRDY#
63
VDD18
64
PCIAD2 102
VSSPST 101
GND 100
VDD18 99
PCIAD3 98
PCIAD4 97
PCIAD5 96
PCIAD6 95
VDD33 94
PCIAD7 93
CBEB0 92
VSSPST 91
PCIAD8 90
PCIAD9 89
M66EN 88
PCIAD10 87
PCIAD11 86
PCIAD12 85
VDD33 84
PCIAD13 83
PCIAD14 82
VSSPST 81
GND 80
PCIAD15 79
VDD18 78
CBEB1 77
PAR 76
SERR# 75
NC 74
GND 73
NC 72
VDD33 71
PERR# 70
STOP# 69
DEVSEL# 68
TRDY# 67
VSSPST 66
CLKRUN# 65
U24
RTL8100CL-U
U24
RTL8100CL-U
1 2
X6
XTAL-25MHZ-43
X6
XTAL-25MHZ-43
12
C167
SC22U10V6ZY-U
C167
SC22U10V6ZY-U
1 2
R166
DUMMY-R2
R166
DUMMY-R2
12
C225
SCD1U16V
C225
SCD1U16V
12
R149
15KR2
R149
15KR2
1 2
R151 0R2-0
R151 0R2-0
12
C185
SC12P50V2JN
C185
SC12P50V2JN
12
C213
SCD1U16V
C213
SCD1U16V
12
C186
SC12P50V2JN
C186
SC12P50V2JN
12
C215
SCD1U16V
C215
SCD1U16V
12
C184
SCD1U16V
C184
SCD1U16V
12
C216
SCD1U16V
C216
SCD1U16V
12
R155
49D9R2F
R155
49D9R2F
12
C198
SCD1U16V
C198
SCD1U16V
12
C174
SCD1U16V
C174
SCD1U16V
12
C189
SCD1U16V
C189
SCD1U16V
12
C217
SCD1U16V
C217
SCD1U16V
12
R156
49D9R2F
R156
49D9R2F
12
C188
SCD1U16V
C188
SCD1U16V
12
C214
SCD1U16V
C214
SCD1U16V
12
C173
SCD1U16V
C173
SCD1U16V
12
C171
SCD1U16V
C171
SCD1U16V
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
XFR_RDC
RJ45-6
RJ45-8
RJ45_END1
RJ45-7
XFR_RXC
XFR_CMT
RJ45-2
1394_TPB0_T
1394_TPB1_T
RJ45_END
RJ45-8
TIP
RING
RJ45-7
RJ45-4
RJ45_END2
RJ45-5
RING
TIP_MDC TIP
RING_MDC
RJ45-4
LAN_TERMINAL
RJ45-2
RJ45-5
RJ45-6
USB_N_CON2
USB_P_CON2
BC0EX2
BT_LED
BC0EX1
USB_N_CON2
3D3V_BT_SETBT_EN#
BT_EN#
TPB0-
TPA0+
TPA0-
TPB0+
RJ45-3
XFR_CMT
XFR_RXC
RJ45-3
RJ45-1
XFR_TDC
RJ45-1
USB_P_CON2
1394_TPBIAS027
1394_TPA0P27
1394_TPB0N27
1394_TPB0P27
1394_TPA0N27
1394_TPB1N27
1394_TPBIAS127
1394_TPB1P27
RJ45-2 18
RJ45-1 18
RJ45-6 18
RJ45-3 18
RJ45-5 18
RJ45-4 18
RJ45-8 18
RJ45-7 18
TX+30 TX-30
RX- 30
RX+ 30
USB_PP222
BC0EX218 BC0EX118
USB_PN222 BT_LED18,19
1394_TPA1N27
1394_TPA1P27
1394_TPB1N_PR 18
1394_TPA1P_PR 18
1394_TPB1P_PR 18
1394_TPA1N_PR 18
BT_EN22
BT_PRIOR34 WLAN_ACT34
TPS5130_1D8V_EN# 31
3D3V_BT_S0
3D3V_BT_S0
3D3V_BT_S0
5V_S3 3D3V_BT_S0
5V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
LAN / 1394 Connector
A3
31 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
LAN / 1394 Connector
A3
31 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
LAN / 1394 Connector
A3
31 47Monday, July 11, 2005
<Core Design>
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
10/100M Lan Transformer
1394 Connector
RX-
TX+
RX+
TX-
These components near to chip side.
RJ45 PIN10/100 LAN Transformer
TD+ --> TX+ RJ45-1
RJ45-2
RJ45-3
RJ45-6
TD- --> TX-
RD+ --> RX+
RD- --> RX-
Place on bottom side
BC0EX1 connect to ICH_PME# on main board.
From NEW!
BC0EX2 connect to PCI_AD22 on main board.
Blue thumb
Close to CN20
MAX 150mA
POWER SWITCH
I max = 150 mA
1004-1
1 2
R67 0R0402-PADR67 0R0402-PAD
12
EC116
SCD1U
DY
EC116
SCD1U
DY
1 2
R50 0R0402-PADR50 0R0402-PAD
12
EC27
SCD1U
DY
EC27
SCD1U
DY
12
EC29
SCD1U
DY
EC29
SCD1U
DY
1
2 3
GS
D
QB2
2N7002
GS
D
QB2
2N7002
1 2
R65 0R0402-PADR65 0R0402-PAD
12
C26
SCD1U16V
DY
C26
SCD1U16V
DY
TD+
7TD-
8
RX+ 16
RX- 15
CT
6CT
14 CT
11 CT
3
TX+ 10
TX- 9
RD+ 1
RD- 2
U3
XFORM-187-U
U3
XFORM-187-U
12
C402
SC1U10V3ZY
C402
SC1U10V3ZY
RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
RJ11_1
RJ11_2
9
10
JK1
RJ45-74-U1
JK1
RJ45-74-U1
12
EC117
SCD1U
DY
EC117
SCD1U
DY
12
R518
10KR2
R518
10KR2
12
R292
56R2F
R292
56R2F
C366
SC20P
C366
SC20P
12
R290
56R2F
R290
56R2F
SHDN#
1
GND
2
IN
3OUT 4
SET 5
U60
G913C-U
U60
G913C-U
12
R291
56R2F
R291
56R2F
12
C383
SC4D7U10V5ZY
C383
SC4D7U10V5ZY
12
R294
56R2F
R294
56R2F
1
2
3 4
CN1
ETY-CON2-R1
20.D0151.102
CN1
ETY-CON2-R1
20.D0151.102
12
C284
SC1U10V3KX
C284
SC1U10V3KX
1 2
R148 0R0402-PADR148 0R0402-PAD
1
3
5
6
2
4
1394_1
SKT-1394-4P-6-U1
1394_1
SKT-1394-4P-6-U1
12
R454
11KR3F
R454
11KR3F
12
R490
18KR3F
R490
18KR3F
1 2
L21
MLB160808
L21
MLB160808
12
C100
SCD1U16V
C100
SCD1U16V
1 2
R147 0R0402-PADR147 0R0402-PAD
12
C27
SCD1U16V
C27
SCD1U16V
1 2
R400 75R2F
R400 75R2F
1
2 3
G
S
D
QB3
2N7002
G
S
D
QB3
2N7002
1 2
R143 0R0402-PADR143 0R0402-PAD
1 2
L20 MLB160808
L20 MLB160808
1 2
R399 75R2F
R399 75R2F
12
C277
SC1U10V3KX
C277
SC1U10V3KX
1
2
3
4
5
6
7
8
9
10
CN4
JST-CON8-7
CN4
JST-CON8-7
12
R299
5K1R2
R299
5K1R2
12
R293
5K1R2
R293
5K1R2
12
R298
56R2F
R298
56R2F
C285
SC220P
C285
SC220P
C286
SC220P
C286
SC220P
1 2
R621 100R2
R621 100R2
1 2
R142 0R0402-PADR142 0R0402-PAD
12
R295
56R2F
R295
56R2F
12
R296
56R2F
R296
56R2F
1 2
R453 100R2
R453 100R2
12
R297
56R2F
R297
56R2F
12
R401
75R2F
R401
75R2F
1 2
R66 0R0402-PADR66 0R0402-PAD
12
R404
75R2F
R404
75R2F
1 2
C320
SC1500P2KV8KX
C320
SC1500P2KV8KX
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CDAGND
CDAUDL
CDAUDR
EXT_MIC_2
EXT_MIC_1
AUD_PC_BEEPAUD_SYS_BEEP
U39_PL
AUD_BEEP
ADAF4
ADAF3
CODECVREF
ADAF2
SPDIF_OUT
ADAF1
VREFOUT
AUD_MICIN1
AUD_MICIN2
AC97_CBITCLK
AUD_MDC_CODEC
CDAUD_GND
AC97_DIN0_CODEC
XTALOUT_CODEC
CDAUD_L
AUD_PC_BEEP
CDAUD_R
AUD_PHONE_CODEC
AUD_BEEP1
AUD_BEEP2
5VA_SET
AD1981_JS0
XTALOUT_CODEC_R
VREFOUT
VREFOUT
AUD_LOL33
CD_AGND26
EAPD 33,36
AUD_LOR33
CD_AUDR26
AC97_BITCLK 21,35
AUD_MDC_OUT35
AC97_DOUT 21,35
AC97_DIN0 21
CD_AUDL26
AUD_PHONE35
AC97_SYNC 21,35
AC97_RST# 21,35
PCI_SPKR27
KBC_BEEP36
ICH_SPKR22
EXT_MIC_118
EXT_MIC_218
HPSENSE 33
HP_OUT_L18 HP_OUT_R18
CLK_CODEC 3
SPDIF_OUT 18
HPSENSE_1 33
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
3D3V_S0
5V_AUDIO_S0
AUD_AGND
AUD_AGNDAUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
5V_AUDIO_S0
5V_AUDIO_S0
5V_AUDIO_S0
5V_AUDIO_S0
5V_S0
AUD_AGND
AUD_AGND
5V_AUDIO_S0
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
3D3V_S0
AUD_AGND
AUD_AGND
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
AUDIO CODEC AD1981B
A3
32 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
AUDIO CODEC AD1981B
A3
32 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
AUDIO CODEC AD1981B
A3
32 47Monday, July 11, 2005
<Core Design>
CUT MOAT
MIC1 PREAMP
MIC2 PREAMP
CLOSE TO CODEC
CLOSE TO CODEC UNDER CODEC
For High limit --> H45
SB-27-02
12
BC66 SC1U10V3ZYBC66 SC1U10V3ZY
1 2
BC59 SC1U25V5ZYBC59 SC1U25V5ZY
12
BC138
SC10U10V6ZY-U
BC138
SC10U10V6ZY-U
12
BC77
SCD1U16V
BC77
SCD1U16V
12
R646
28K7R3F
R646
28K7R3F
1
23
147
U49A
TSAHCT86
U49A
TSAHCT86
1 2
C306
SC270P50V3JN
C306
SC270P50V3JN
12
BC58 SC1U10V3ZYBC58 SC1U10V3ZY
1 2
C308
SC270P50V3JN
C308
SC270P50V3JN
1 2
R316 33R2
R316 33R2
1 2
C305
SC270P50V3JN
C305
SC270P50V3JN
1 2
R308 22R2
R308 22R2
12
BC128
SCD1U16V
BC128
SCD1U16V
1 2
BC71
SC22P
DY
BC71
SC22P
DY
1 2
R315 22R2
R315 22R2
12
R647
10KR3F
R647
10KR3F
1 2
R327 DUMMY-R2R327 DUMMY-R2
12
BC74
SCD1U16V
BC74
SCD1U16V
1 3
D18
S1N4148-U2
D18
S1N4148-U2
1 2
BC61 SC1U25V5ZYBC61 SC1U25V5ZY
12
BC140
SC1U10V3ZY
BC140
SC1U10V3ZY
12
R342
4K7R2
R342
4K7R2
12
BC139
SC22P
BC139
SC22P
1 2
R305 22R2
R305 22R2
1 2
G31
GAP-CLOSE
G31
GAP-CLOSE
12
EC160
SCD1U16V
EC160
SCD1U16V
12
BC68 DUMMY-C2BC68 DUMMY-C2
12
R313
3KR2F
R313
3KR2F
12
X3
X-24D576MHZ-3-U1
DY
X3
X-24D576MHZ-3-U1
DY
1 2
R636 2K2R2
DY
R636 2K2R2
DY
12
BC65
SC1U10V3ZY
DY
BC65
SC1U10V3ZY
DY
12
R314
3KR2F
R314
3KR2F
4
56
147
U49B
TSAHCT86
U49B
TSAHCT86
1 2
R302
10KR2
R302
10KR2
9
10 8
147
U49C
TSAHCT86
U49C
TSAHCT86
12
R309
150KR2J
R309
150KR2J
1 2
R347
10KR2
R347
10KR2
1 2
G33
GAP-CLOSE
G33
GAP-CLOSE
12
BC133
SCD1U16V
BC133
SCD1U16V
1 2
BC67 SCD1U16VBC67 SCD1U16V
1 2
R306 22R2
R306 22R2
1 2
BC75 SCD1U16VBC75 SCD1U16V
BC63
SC1000P50V3KX
BC63
SC1000P50V3KX
BC62
SC1000P50V3KX
BC62
SC1000P50V3KX
12
R307
150KR2J
R307
150KR2J
1 2
G73
GAP-CLOSE
G73
GAP-CLOSE
12
R325
1KR2
R325
1KR2
XTL_IN 2
XTL_OUT 3
SDATA_OUT 5
BIT_CLK 6
SDATA_IN 8
SYNC 10
RESET# 11
SPDIF 48
ID0#
45 ID1#
46
JS0 17
JS1 16
EAPD 47
PHONE_IN
13
AUX_L
14
AUX_R
15
CD_L
18
CD_GND_REF
19 CD_R
20
MIC1
21
MIC2
22
LINE_IN_L
23
LINE_IN_R
24 LINE_OUT_L
35
LINE_OUT_R
36
MONO_OUT
37
HP_OUT_L
39
HP_OUT_R
41
DVDD1 1
DVDD2 9
AVDD1 25
AVDD2 38
AVDD3 43
AVDD4 34
DVSS1
4
DVSS2
7
AVSS1
26
AVSS2
40
AVSS3
44
AVSS4
33
NC
12
NC
42
VREF 27
VREFOUT 28
AFILT1 29
AFILT2 30
AFILT3 31
AFILT4 32
U48
AD1981B-AS
U48
AD1981B-AS
12
R304
150KR2J
R304
150KR2J
1 2
R343 0R2-0
R343 0R2-0
1 2
R326 10KR2
R326 10KR2
1 2
BC78
SC22P
DY
BC78
SC22P
DY
12
BC135
SCD1U16V
BC135
SCD1U16V
12
BC137
SCD1U16V
BC137
SCD1U16V
SHDN#
1
GND
2
IN
3OUT 4
SET 5
U80
MAX8863-S
U80
MAX8863-S
12
BC64
SC1U10V3ZY
DY
BC64
SC1U10V3ZY
DY
12
BC134
SC1U10V3ZY
BC134
SC1U10V3ZY
1 2
G72
GAP-CLOSE
G72
GAP-CLOSE
1 2
G30
GAP-CLOSE
G30
GAP-CLOSE
12
C303
SCD1U16V
C303
SCD1U16V
1 2
C307
SC270P50V3JN
C307
SC270P50V3JN
1 2
BC60 SC1U25V5ZY
BC60 SC1U25V5ZY
12
BC76
SCD1U16V
BC76
SCD1U16V
1 2
C304
SCD1U16V
C304
SCD1U16V
1 2
G32
GAP-CLOSE
G32
GAP-CLOSE
1 2
BC72 DUMMY-C2BC72 DUMMY-C2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CSOUTR1
CSOUTL1
AUD_MUTE_1
CSOUTR2AUD_LOR
CSOUTL2AUD_LOL
EARPHONE_R
AUD_MUTE
HPSENSE
SPKR_R-
SPKR_L+
SPKR_R+
L_BYPASS
SPKR_L+
L_BYPASS
HP_L
L_LINE_IN
R_BYPASS
HP_R
SPKR_R+
HPSENSE_1
SPKR_L+
SPKR_L-
SPKR_R+
G1420_SHUTDOWN#
SPKR_L-
SPKR_L+
SPKR_R-
SPKR_R+
R_BYPASS
R_LINE_IN
HPSENSE_1
AUD_MUTEG1420_SHUTDOWN# G1420_SHUTDOWN#
AUD_LOL32
AUD_LOR32
EAPD32,36
KBC_MUTE36
JACK_DETECT#18 EARPHONE18 HPSENSE 32
HPSENSE_1 32
DK_SPKR_L+ 18
DK_SPKR_R+ 18
PM_SLP_S3#22,26,36,42,44,45,46
5V_S0
5V_S0
5V_S0
AUD_AGNDAUD_AGND
5V_S0
5VA_OP_S0
5V_S0
AUD_AGND
5V_S0
AUD_AGND
5VA_OP_S0
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
AUDIO
A3
33 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
AUDIO
A3
33 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
AUDIO
A3
33 47Thursday, July 07, 2005
<Core Design>
Speaker
SC
SC
SC
SC
1 2
G71
GAP-CLOSE-PWR
G71
GAP-CLOSE-PWR
12
R339
100KR2
R339
100KR2
12
R640
100KR2
R640
100KR2
1
2 3
GS
D
Q41
2N7002
GS
D
Q41
2N7002
12
R641
100KR2
R641
100KR2
1 2
TC14
SE100U16VGM-2
TC14
SE100U16VGM-2
EC161
SC220P
EC161
SC220P EC159
SC220P
EC159
SC220P
EC155
SC220P
EC155
SC220P EC158
SC220P
EC158
SC220P
9
10 8
147
U78C
TSAHCT32
U78C
TSAHCT32
1 2
R340
15KR2
R340
15KR2
1 2
R649 20KR2
R649 20KR2
1 2
R341 18KR2JR341 18KR2J
12
C616
SC1U10V3ZY
C616
SC1U10V3ZY
12
BC142
SC10U10V6ZY-U
BC142
SC10U10V6ZY-U
12
C291
SC1U10V3ZY
C291
SC1U10V3ZY
1 2
R303 22KR2J
R303 22KR2J
BC70
SC220P
BC70
SC220P
12
BC129
SCD1U16V3KX
BC129
SCD1U16V3KX
12
BC79
SC4D7U10V5ZY
BC79
SC4D7U10V5ZY
12
BC130
SC4D7U10V5ZY
BC130
SC4D7U10V5ZY
1 2
BC131
SC10P50V2JN-1
BC131
SC10P50V2JN-1
12
R645
10KR2
R645
10KR2
12
BC141
SCD1U16V3KX
BC141
SCD1U16V3KX
1 2
R348 18KR2JR348 18KR2J
4
56
147
U78B
TSAHCT32
U78B
TSAHCT32
1 2
R643 20KR2
R643 20KR2
GND/HS 1
TJ
2
LOUT+ 3
LLINEIN
4
LHPIN
5
LBYPASS
6
LVDD
7
SHUTDOWN
8
MUTEOUT 9
LOUT- 10
MUTEIN 11
GND/HS 12
GND/HS 13
SE/BTL# 14
ROUT- 15
HP/LINE# 16
HP-IN
17
RVDD
18
RBYPASS
19
RHPIN
20
RLINEIN
21 ROUT+ 22
VOL
23
GND/HS 24
GND
25
U79
G1421BF3U
U79
G1421BF3U
5
1
2
3
4
6
SPK1
ETY-CON4-11-U
20.D0151.104
SPK1
ETY-CON4-11-U
20.D0151.104
1 2
BC136
SC4D7U10V5ZY
BC136
SC4D7U10V5ZY
1
2 3
GS
D
Q19
2N7002
GS
D
Q19
2N7002
1 2
R648
10KR2
DY
R648
10KR2
DY
1 2
R650
15KR2
R650
15KR2
1 2
BC132
SC4D7U10V5ZY
BC132
SC4D7U10V5ZY
BC80
SC220P
BC80
SC220P
1 2
BC81
SCD1U16V3KX
BC81
SCD1U16V3KX
1 2
BC73
SCD1U16V3KX
BC73
SCD1U16V3KX
1 2
R349
15KR2
R349
15KR2
1 2
R642
15KR2
R642
15KR2
1 2
BC143
SC10P50V2JN-1
BC143
SC10P50V2JN-1
1 2
TC15
SE100U16VGM-2
TC15
SE100U16VGM-2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PCI_AD17
MINI_PIN21
PCI_AD26
PCI_AD29
MOD_IDSEL
PCI_C/BE#3 PCI_AD24
PCI_AD31
PCI_AD21
PCI_AD23
PCI_AD1
PCI_AD18
PCI_AD8
PCI_AD14
PCI_C/BE#1
PCI_C/BE#0
PCI_AD13
PCI_AD4
PCI_AD12
PCI_AD25
PCI_AD7
PCI_AD3
PCI_AD11
PCI_AD5
PCI_AD0
PCI_AD20PCI_AD19
PCI_AD10
PCI_AD21
PCI_C/BE#2
PCI_AD9
PCI_AD30
PCI_AD6
PCI_AD27
PCI_AD22
PCI_AD16
PCI_AD15
PCI_AD2
MINI_PME#
INT_PIRQE#
PCI_AD28
WIRELESS_EN
WIRELESS_EN
PCI_GNT#0 22
PM_CLKRUN#22,27,30,36
PCI_REQ#022
ICH_PME# 18,22,30
PCI_PAR 22,27,30
PCI_FRAME# 22,27,30
PCI_TRDY# 22,27,30
PCI_STOP# 22,27,30
PCI_DEVSEL# 22,27,30
PCI_IRDY#22,27,30
PCI_SERR#22,27,30
PCI_PERR#22,27,30
PCI_AD[31..0] 18,22,27,30
PCI_C/BE#[3..0] 22,27,30
INT_PIRQE# 22,30
PCIRST1# 24,27,28,30,36
PCI_SERIRQ 22,27,36
PCLK_MINI3
802_ACT_LED19
WIRELESS_EN#22
WLAN_ACT31
BT_PRIOR 31
5V_S0
5V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5
3D3V_S5
3D3V_S5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MINI-PCI
A3
34 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MINI-PCI
A3
34 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MINI-PCI
A3
34 47Thursday, July 07, 2005
<Core Design>
RINGTIP
MINI-PCI
The symbol use 2nd source
The P/N is the main source
Main source:62.10032.001
2nd source:62.10032.031
12
BC125
SCD1U16V
BC125
SCD1U16V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
125
126
CN13
PCIMODEM124A1U1
62.10032.001
CN13
PCIMODEM124A1U1
62.10032.001
12
BC127
SCD1U16V
BC127
SCD1U16V
1 2
R620 10R2
R620 10R2
12
BC124
SCD1U16V
BC124
SCD1U16V
1 2
R612
DUMMY-R2
R612
DUMMY-R2
12
BC126
SC4D7U10V5ZY
BC126
SC4D7U10V5ZY
12
R613
10KR2
R613
10KR2
TP11TP11
1 2
R619 0R2-0
DY
R619 0R2-0
DY
1
2 3
GS
D
Q18
2N7002
GS
D
Q18
2N7002
12
R328
10KR2
R328
10KR2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
USB_N_CON3
USB_P_CON3 USB_N_CON4
USB_P_CON4
ACSDATAIN1_B
AUD_MDCIN
MDC_S3_1
USB_N_CON4
USB_N_CON3
ACSDATAIN1_A
USB_P_CON3
USB_P_CON4
AC97_DOUT21,32 AC97_DIN1 21
AUD_PHONE 32
AUD_MDC_OUT32
AC97_SYNC 21,32
AC97_BITCLK 21,32
AC97_RST#21,32
USB_PN422
USB_PP422
USB_PN522
USB_PP522
5V_S3 5V_USB1_S3
3D3V_S0
3D3V_S3
5V_USB1_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
USB / MDC CONN.
A3
35 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
USB / MDC CONN.
A3
35 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
USB / MDC CONN.
A3
35 47Thursday, July 07, 2005
<Core Design>
USB POWER
100 mil
MDC Connector
Check with Ambit
SC
12
TC7
ST100U6D3VBM
TC7
ST100U6D3VBM
12
G68
GAP-CLOSE-PWR
G68
GAP-CLOSE-PWR
12
C151
SC1000P50V
C151
SC1000P50V
12
C152
SC4D7U10V5ZY
C152
SC4D7U10V5ZY
12
C579
SC4D7U10V5ZY
C579
SC4D7U10V5ZY
12
C150
SCD1U16V
C150
SCD1U16V
12
C578
SCD1U16V
C578
SCD1U16V
12
C580
SCD1U16V
DY
C580
SCD1U16V
DY
31
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
33
36
34
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
32
35
CN9
AMP-CONN30A-1
20.F0099.030
CN9
AMP-CONN30A-1
20.F0099.030
1 2
R263 22R2
DY
R263 22R2
DY
1 2
R266 22R2
R266 22R2
12
R622
DUMMY-R2
R622
DUMMY-R2
1 2
R254 DUMMY-R2R254 DUMMY-R2
12
C266
SC22P
DY
C266
SC22P
DY
1
2
3
4
5
6
7
8
9
10
11
12
USB1
SKT-USB-76-U
USB1
SKT-USB-76-U
1 2
F2
MINISMDC110-U
F2
MINISMDC110-U
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
KBC_32KX2_1
ECSWI#_KBC
KCOL8
KROW4
KBC_D7
KCOL15
KCOL7
KCOL1
KBC_D6
TMS
KBC_D0
KCOL3
KBC_D5
KBC_PME#
TINT#
KCOL14
KROW2
KBC_D4
KBC_32KX1
KCOL16
KCOL2
LPC_LAD2
KBC_32KX2
KCOL13
KROW8
KBC_PWUREQ#
LPC_LAD3
KBC_D3
BT_SCL
TDI
KCOL6
KROW3
KCOL12
KROW6
LPC_LAD1
KBC_D2
KCOL11
KCOL5
KROW5
KROW1
TDO
LPC_LAD0
KBC_D1
KCOL4
KROW7
BT_SDA
TCK
KCOL10
KBC_SEIO#
PSDAT4
KCOL9
THERMAL_DP
THERMAL_DN
CHG_VCTL
KBC_SEL1
KBC_CLK
CHG_ON#
PSCLK1
PSDAT1
PSCLK2
KBC_AVCC
CHG_I_SEL
CHG_ICTL
A4/TRIS
A3/BADDR1
A5/SHBM
A0/ENV0
WR1#
PSDAT2
KBC_PIN21
BT_SENSE
BT_SENSE
TINT#
TDI
TDO
TCK
KBC_RTC_VCC
KBC_D0
TMS
AD_IA
BT_SCL
BT_SDA
SMBD_KBC
SMBC_KBC
PM_PWRBTN#
KBC_PME#
RSMRST#_KBC
S5_ENABLE
A1/ENV1
A2/BADDR0
VOL_UP_BTN#
VOL_DWN_BTN#
DVD_BT#
CDROM_BT#
VOL_DWN_DK#
VOL_UP_DK#
PWM_BRI
DA_BRI
BRIGHTNESS
VCC_+3VSB
AC_IN#
CHG_I_PRE_SEL
A9 38
A8 38
KBCBIOS_WE# 38
A7 38
A18 38
A10 38
A6 38
A14 38
A4/TRIS 38
A3/BADDR1 38
A1/ENV1 38
TDATA_537
A0/ENV0 38
KBC_BEEP 32
A17 38
PCIRST1# 24,27,28,30,34
BT_SDA 39
BT_SCL 39
A13 38
A11 38
PM_PWRBTN# 22
SMBD_KBC 25
SMBC_KBC 25
TCLK_537
KBC_PWRBTN# 37
A16 38
A12 38
ECSCI#_KBC22
PCLK_KBC3
PCI_SERIRQ22,27,34
LPC_LFRAME#21
ECSMI#_KBC22
KROW[1..8]37
KBC_D[0..7] 38
BRIGHTNESS 19
LPC_LDRQ0#21
PWR_LED 19
A5/SHBM 38
A15 38
LPC_LAD[0..3]21
ECSWI#_KBC 22
KCOL[1..16]37
KBC_MUTE 33
PM_CLKRUN# 22,27,30,34
KBCBIOS_RD# 38
A2/BADDR0 38
KBCBIOS_CS#38
FPBACK19
RSMRST#_KBC22
S5_ENABLE25,42
AD_OFF39
AC_IN# 40
KBC_MATRIX1 37
KBC_MATRIX2 37
CHG_ON#40
CHG_I_SEL40
CAPS_LED 19
NUM_LED 19
BL_ON13
BT_TH 39,40
CHG_LED 19
VOL_UP_BTN# 37
VOL_DWN_BTN# 37
MUTE_BTN# 37
CLK32_G768 25
CIR_KBC 18
RSMRST#21,25,43
PR_INSERT# 18
PM_SLP_S3# 22,26,33,42,44,45,46
PM_SLP_S4# 22,26,42
AIRLINE_VOLT 40
EAPD 32,33
MUTE_LED 18,19
AD_IA 40
RCIN#21
ICH_A20GATE21
VOL_UP_DK#18
VOL_DWN_DK#18
PM_SUS_STAT# 22
KBC_LID# 19
DVD_BT# 37
CDROM_BT# 37
802_BT_BTN# 37
ID_DET19,37
CHG_I_PRE_SEL40
3D3V_S5
KBC_3D3V_AUX
3D3V_AUX KBC_3D3V_AUX
KBC_3D3V_AUX
KBC_3D3V_AUX
KBC_3D3V_AUX
3D3V_S0
3D3V_S0
RTC_AUX_S5
BT+
KBC_3D3V_AUX
3D3V_S0
KBC_3D3V_AUX
3D3V_S0
KBC_3D3V_AUX
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
KBC NS97551
Custom
36 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
KBC NS97551
Custom
36 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
KBC NS97551
Custom
36 47Thursday, July 07, 2005
<Core Design>
PortH
PortP
PortD-1
Key Matrix Scan
Host Interface
AD input
PWM or PortA
JTAG Debug Port
PortK
PortJ-1
PortJ-2
PS2 Interface
PortD-2
PortL
PortM
DA Output
PortE
PortC
PortB
(HCFGBAH, HCFGBAL)+1(HCFGBAH, HCFGBAL)
4E
I/O Address
TRIS=1: While in IRE and OBD, float all the
signals for clip-on ISE use
BADDR1-0 Index
2F
Data
2E
Reserved
4F0 1
0 0
1 0
1 1
1
0DEV
TRIS
OBD
00
ENV0
00
1
SHBM=1: Enable shared memory with host BIOS
0
0
1
PROG
1
IRE
ENV1
0
KBC HARDWARE SETTING
For NS97551 use only
SB-31-02
SB
1 2
R261 10KR2
R261 10KR2
12
BC45
SCD1U16V
DY
BC45
SCD1U16V
DY
1 2
R233 10KR2
R233 10KR2
1
2
3
45
6
7
8
RN6
SRN10K-2
RN6
SRN10K-2
1 2
G27
GAP-CLOSE-PWR
G27
GAP-CLOSE-PWR
1 2
R260 0R2-0
R260 0R2-0
12
BC50
SC3P50V2CN
BC50
SC3P50V2CN
12
BC48
SC3P50V2CN
BC48
SC3P50V2CN
TP44TP44
1 2
R651 10KR2
R651 10KR2
1 2
R253 10KR2
R253 10KR2
12
R274
560KR3F
R274
560KR3F
1 2
R243 DUMMY-R2R243 DUMMY-R2
1 2
R275 100KR3F
R275 100KR3F
12
BC47
SCD1U16V
BC47
SCD1U16V
1 2
R231 6K8R2F
R231 6K8R2F
1 2
R236 0R2-0
R236 0R2-0
1 2
R247 100KR2
R247 100KR2
12
C255
SCD1U16V
C255
SCD1U16V
12
BC53
SCD1U16V
BC53
SCD1U16V
12
BC52
SC1U10V3ZY
BC52
SC1U10V3ZY
12
R237
20MR3
R237
20MR3
2
1 4
3
RN2
SRN10KJ
DY
RN2
SRN10KJ
DY
2
1 4
3
RN3
SRN10KJ
RN3
SRN10KJ
1 2
R248 DUMMY-R2R248 DUMMY-R2
1 2
R232 6K8R2F
R232 6K8R2F
1 2
R242 100KR2
R242 100KR2
1 2
R259 10KR2
R259 10KR2
1 2 C278
SCD1U16V3KX
C278
SCD1U16V3KX
TP17TP17
TP16TP16
1 2
L18
BLM11P600S
L18
BLM11P600S
1
2
3
4 5
6
7
8
RN9
SRN10K
RN9
SRN10K
TP43TPAD30 TP43TPAD30 TP34TPAD30 TP34TPAD30
VCC 34
VCC 45
VCC 123
VCC 136
VCC 157
VCC 166
VDD 16
AVCC 95
VBAT 161
NC#11
11
NC#12
12
NC#20
20
VCORF
21
NC#85
85
NC#86
86
NC#91
91
NC#92
92
NC#97
97
NC#98
98
AGND
96
GND
17
GND
35
GND
46
GND
122
GND
159
GND
167
GND
137
SERIRQ
7
IOPQ0/LDRQ#
8
LFRAME#
9
LAD0
15
LAD1
14
LAD2
13
LAD3
10
LCLK
18
RESET1#
19
IOPQ1/SMI#
22
IOPQ2/PWUREQ#
23
IOPD3/ECSCI
31
IOPB5/(GA20)
5
IOPB6/KBRST#
6
KBSIN0
71
KBSIN1
72
KBSIN2
73
KBSIN3
74
KBSIN4
77
KBSIN5
78
KBSIN6
79
KBSIN7
80
KBSOUT0
49
KBSOUT1
50
KBSOUT2
51
KBSOUT3
52
KBSOUT4
53
KBSOUT5
56
KBSOUT6
57
KBSOUT7
58
KBSOUT8
59
KBSOUT9
60
KBSOUT10
61
KBSOUT11
64
KBSOUT12
65
KBSOUT13
66
KBSOUT14
67
KBSOUT15/XOR_OUT
68
TINT#
105
TCK
106
TDO
107
TDI
108
TMS
109
IOPF0/PSCLK1
110
IOPF1/PSDAT1
111
IOPF2/PSCLK2
114
IOPF3/PSDAT2
115
IOPF4/PSCLK3
116
IOPF5/PSDAT3
117
IOPF6/PSCLK4
118
IOPF7/PSDAT4
119
32KX1/32KCLKIN
158
32KX2
160
IOPJ4/BST2
69
IOPJ5/PFS
70
IOPJ6/PLI
75
IOPJ7/BRKL_RSTO#
76
IOPM0/D8
148
IOPM1/D9
149
IOPM2/D10
155
IOPM3/D11
156
IOPM4/D12
3
IOPM5/D13
4
IOPM6/D14
27
SEL0#
173
SEL12_SEL2#
174
IOPQ3/CLK
47
IOPM7/D15
28
AD0 81
AD1 82
AD2 83
AD3 84
IOPE0 87
IOPE1 88
IOPE2 89
IOPE3 90
NC#93 93
NC#94 94
DA0 99
DA1 100
DA2 101
DA3 102
IOPA0/PWM0 32
IOPA1/PWM1 33
IOPA2/PWM2 36
IOPA3/PWM3 37
IOPA4/PWM4 38
IOPA5/PWM5 39
IOPA6/PWM6 40
IOPA7/PWM7 43
IOPB0/URXD1 153
IOPB1/UTXD1 154
IOPB2/USCLK1 162
IOPB3/SCL1 163
IOPB4/SDA1 164
IOPB7/RING#/PFAIL#/RESET2# 165
IOPC0 168
IOPC1/SCL2 169
IOPC2/SDA2 170
IOPC3/TA1 171
IOPC4/TB1/EXWINT22 172
IOPC5/TA2 175
IOPC6/TB2/EXWINT23 176
IOPC7/CLKOUT 1
IOPD0/RI1#/EXWINT20 26
IOPD1/RI2/EXWINT21 29
IOPD2/EXWINT24/RESET2# 30
IOPE4/SWIN 2
IOPE5/A20//EXWINT40 44
IOPE6/LPCPD#/EXWINT45 24
IOPE7/CLKRUN#/EXWINT46 25
A0/ENV0 124
A1/ENV1 125
A2/BADDR0 126
A3/BADDR1 127
A4/TRIS 128
A5/SHBM 131
A6 132
A7 133
D0 138
D1 139
D2 140
D3 141
D4 144
D5 145
D6 146
D7 147
RD# 150
WR0# 151
SELIO# 152
IOPD4 41
IOPD5 42
A8 143
A9 142
A10 135
A11 134
A12 130
A13_BE0 129
A14_BE1 121
A15_CBRD 120
A16 113
A17 112
A18 104
IOPL3/A19 103
IOPL4/WR1# 48
IOPD6 54
IOPD7 55
IOPJ2/BST0
62
IOPJ3/BST1
63
U40
PC97551-VPC-U
U40
PC97551-VPC-U
1 2
R249 DUMMY-R2R249 DUMMY-R2
1 2
R235 1KR2
R235 1KR2
12
BC56
SCD1U16V
BC56
SCD1U16V
12
BC57
SCD1U16V
BC57
SCD1U16V
12
BC55
SCD1U16V
BC55
SCD1U16V
12
BC54
SCD1U16V
BC54
SCD1U16V
12
BC49
SCD1U16V
BC49
SCD1U16V
12
BC46
SCD1U16V
BC46
SCD1U16V
12
BC51
SCD1U16V
BC51
SCD1U16V
1 2
R244
10KR2
R244
10KR2
1 2
R273 DUMMY-R2R273 DUMMY-R2
1 2
R238 10KR2
R238 10KR2
TP10 TPAD30TP10 TPAD30
14
3 2
X1
X-32D768KHZ-12-U
X1
X-32D768KHZ-12-U
TP36TP36
TP41TP41
TP37TP37
9
10
1
2
3
4
5
6
7
8
CN15
MOLEX-CON8-2
DY
CN15
MOLEX-CON8-2
DY
2 1
D13
SSM5818SL
D13
SSM5818SL
1 2
R262
0R2-0
DY
R262
0R2-0
DY
12
R234 DUMMY-R2R234 DUMMY-R2
1 2
R265 0R2-0
R265 0R2-0
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
VOL_DWN_BTN#
MUTE_LED#
VOL_UP_BTN#
802_BT_LED#
CDROM_BT#
PWRBTN#
DVD_BT#
KROW6
KCOL8
KCOL14
KCOL15
KCOL11
KCOL6
KROW8
KROW7
KCOL1
KROW4
KCOL7
KCOL12
KROW5
KCOL13
KROW2
KCOL10
KROW3
KROW1
KCOL16
KCOL9
KCOL2
KCOL3
KCOL4
KCOL5
PWR_LED#
NUM_LED#
KCOL7
KCOL4
KCOL13
KCOL14
KCOL12
KCOL15
KCOL16
KCOL11
KROW5
KROW6
KCOL1
KROW3
KROW8
KROW2
KCOL10
KROW7
KCOL3
KCOL5
KCOL8
KCOL9
KROW4
KCOL6
KCOL2
KROW1
802_BT_BTN# MUTE_BTN#
VOL_DWN_BTN#
VOL_UP_BTN#
KCOL[1..16] 36KROW[1..8] 36
KBC_PWRBTN#36
802_BT_BTN#36
VOL_DWN_BTN#36
MUTE_LED#19
ID_DET19,36
PWR_LED#19
802_BT_LED#19
NUM_LED#19
DVD_BT#36
CDROM_BT#36
KBC_MATRIX2 36
KBC_MATRIX1 36
TDATA_536 TCLK_536
MUTE_BTN#36
VOL_UP_BTN#36
KBC_3D3V_AUX
3D3V_AUX
5V_S3
5V_S3
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
5V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
KEYBOARD/TOUCH PAD/Launch key
A3
37 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
KEYBOARD/TOUCH PAD/Launch key
A3
37 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
KEYBOARD/TOUCH PAD/Launch key
A3
37 47Thursday, July 07, 2005
<Core Design>
TouchPad Connector
INTERNAL KEYBOARD CONNECTOR
LAUNCH Board
POWER
BUTTON
for EMI
for EMI
for EMI
the matrix table for PCB
PA PR
Discrete
UMA
00
10
01
11
KBC_MATRIX2,KBC_MATRIX1
1 2
C335 SCD1U10V2MX-1C335 SCD1U10V2MX-1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
CN2
JST-CON20
CN2
JST-CON20
1
2
3
4 5
6
7
8
RC6
SRC100P50V-U
RC6
SRC100P50V-U
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CN8
ETY-CON24-1
20.K0170.001
CN8
ETY-CON24-1
20.K0170.001
1 2
R416 470R2
R416 470R2
12
BC86
SCD1U16V
BC86
SCD1U16V
1
2
3
4 5
6
7
8
RC5
SRC100P50V-U
RC5
SRC100P50V-U
12
R407
10KR2
R407
10KR2
1
2
3
4 5
6
7
8
RC1
SRC100P50V-U
RC1
SRC100P50V-U
12
EC97
SC1000P16V2KX
EC97
SC1000P16V2KX
1
2
3
4
5
6
7
8
9
10
CN7
ETY-CON8-5
CN7
ETY-CON8-5
12
EC98
SC1000P16V2KX
EC98
SC1000P16V2KX
12
EC100
SC1000P16V2KX
EC100
SC1000P16V2KX
12
R415
10KR2
R415
10KR2
12
EC101
SC1000P16V2KX
EC101
SC1000P16V2KX
12
EC99
SC1000P16V2KX
EC99
SC1000P16V2KX
12
EC94
SC1000P16V2KX
EC94
SC1000P16V2KX
12
EC95
SC1000P16V2KX
EC95
SC1000P16V2KX
12
BC115
SC47P50V2JN
DY
BC115
SC47P50V2JN
DY
12
EC96
SC1000P16V2KX
EC96
SC1000P16V2KX
12
BC116
SC47P50V2JN
DY
BC116
SC47P50V2JN
DY
12
BC114
SCD1U16V
DY
BC114
SCD1U16V
DY
12
R406
10KR2
R406
10KR2
12
BC30
SC1U10V3ZY
DY
BC30
SC1U10V3ZY
DY
1
2
3
4 5
6
7
8
RC4
SRC100P50V-U
RC4
SRC100P50V-U
1 2
R277
10KR2
DY
R277
10KR2
DY
1 2
R278
10KR2
DY
R278
10KR2
DY
1
2
3
D28
BAV99LT1
DY
D28
BAV99LT1
DY
12
R279 10KR2R279 10KR2
12
R276 10KR2
R276 10KR2
1
2
3
4 5
6
7
8
RC3
SRC100P50V-U
RC3
SRC100P50V-U
1
2
3
4 5
6
7
8
RC2
SRC100P50V-U
RC2
SRC100P50V-U
12
R556
10KR2
R556
10KR2
12
R555
10KR2
R555
10KR2
12
C336 SCD1U10V2MX-1C336 SCD1U10V2MX-1
1
2
3
D29
BAV99LT1
DY
D29
BAV99LT1
DY
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
KBC_D4
KBC_D6
A0/ENV0
A1/ENV1
A4/TRIS
A2/BADDR0 KBC_D2
KBC_D1
KBC_D5
KBC_D7
KBC_D3
KBC_D0
A3/BADDR1
A13
A17
A8
A15
A18
A11
A9
A6
A5/SHBM
A12
A16
A10
A14
A7
KBCBIOS_RD# 36
KBCBIOS_CS# 36
A0/ENV036 A1/ENV136 A2/BADDR036 A3/BADDR136 A4/TRIS36 A5/SHBM36 A636
A836 A736
A936 A1036 A1136
KBCBIOS_WE# 36
A1236 A1336 A1436 A1536 A1636 A1736 A1836
KBC_D[0..7] 36
KBC_3D3V_AUX
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
BIOS/GF
A3
38 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
BIOS/GF
A3
38 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2 -1
BIOS/GF
A3
38 47Thursday, July 07, 2005
<Core Design>
512KB Flash
FLASH ROM
A11
1
A9
2A8
3
A13
4
A14
5
A17
6
WE# 7
VDD
8
A18
9
A16
10 A15
11
A12
12
A7
13 A6
14 A5
15 A4
16 A3
17 A2
18 A1
19 A0
20 DQ0 21
DQ1 22
DQ2 23
VSS 24
DQ3 25
DQ4 26
DQ5 27
DQ6 28
DQ7 29
CE# 30
A10
31
OE# 32
U46
PM39LV040-70VC
U46
PM39LV040-70VC
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
AD_OFF#
AD+_2
BT_SCL BT_SDA BT_TH
AD_JK
BT+SENSE40 BT_TH36,40 BT_SDA36 BT_SCL36
AD_OFF36
AD+
3D3V_AUX 3D3V_AUX 3D3V_AUX
BT+
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Adaptor/ Bettery conn.
A3
39 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Adaptor/ Bettery conn.
A3
39 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
Adaptor/ Bettery conn.
A3
39 47Thursday, July 07, 2005
<Core Design>
Adaptor in to generate DCBATOUT
Layout 200mil
BATTERY CONNECTOR
SB
1
2
3
D24
BAV99LT1
D24
BAV99LT1
1
2
3
D25
BAV99LT1
D25
BAV99LT1
1
2
3
4
5
DCIN1
SKT-JACK-134-GP
DCIN1
SKT-JACK-134-GP
1
2
3
D3
BAV99LT1
D3
BAV99LT1
1
2
3
4
5
6
7
8
CN11
SYN-CON6-2-U2
CN11
SYN-CON6-2-U2
12
EC1
SCD1U50V3ZY
EC1
SCD1U50V3ZY
3
1
2
C
B
E
Q5
PDTA124EU
C
B
E
Q5
PDTA124EU
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U2
AO4407
S
S
S
GD
D
D
D
U2
AO4407
1 2
C317
SCD1U50V5KX
C317
SCD1U50V5KX
1 2
G6
GAP-CLOSE
G6
GAP-CLOSE
12
BC3
SC1000P50V
BC3
SC1000P50V
12
BC82
SC1000P50V
BC82
SC1000P50V
12
R26
100KR2
R26
100KR2
12
R25
200KR2J
R25
200KR2J
21
3
IN
OUT
R1
R2
GND
Q3
DTC114EUA-U1
IN
OUT
R1
R2
GND
Q3
DTC114EUA-U1
12
BCC1
SCD1U
BCC1
SCD1U
12
BC83
SCD1U50V3ZY
BC83
SCD1U50V3ZY
1 2
F3
FUSE-10A125V
F3
FUSE-10A125V
12
EC2
SCD1U50V3ZY
EC2
SCD1U50V3ZY
3 1
D23
MMBZ5252B
D23
MMBZ5252B
MAX8725_CCS
MAX8725_DLOV
MAX8725_REF
MAX8725_CCV
PKPRES#
CHG_PWR-2 CHG_PWR-3
MAX8725_DHIV
MAX8725_DHI
MAX8725_DLO
MAX8725_CLS
MAX8725_CCI
MAX8725_ICTL
MAX8725_VCTL
AD+_TO_SYS
MAX18725_DC_IN
MAX8725_ACIN
AD+_TO_SYS
MAX8725_IINP
MAX8725_MODE
MAX8725_PDS
MAX8725_CLS
MAX8725_ICTL
AC_IN
PKPRES#
AC_IN
AD_IA36
BT+SENSE 39
CHG_I_PRE_SEL36
AIRLINE_VOLT 36
BT_TH36,39
CHG_ON#36
CHG_I_SEL36
AC_IN# 36
BT+
MAX8725_LDO
MAX8725_LDO
DCBATOUT
AD+
BT+
AD+_TO_SYS
AD+ DCBATOUT
MAX8725_REF
3D3V_AUX
MAX8725_LDO
MAX8725_GND
MAX8725_GND
MAX8725_GND
MAX8725_GND MAX8725_GND
MAX8725_GND
MAX8725_GND
MAX8725_GND
MAX8725_GND MAX8725_GND
MAX8725_GND
MAX8725_GND
MAX8725_GND
3D3V_S5
MAX8725_LDO
MAX8725_GND
MAX8725_GND
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
CHARGER MAX8725
Custom
40 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
CHARGER MAX8725
Custom
40 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
CHARGER MAX8725
Custom
40 47Thursday, July 07, 2005
<Core Design>
V_REF :4.2235V (<500uA)
Close to
MAX1909 pin 24
Near MAX8725
Pin 2
Near MAX8725
Pin 21
From Battery Connector
AC_IN Threshold 2.089V Max.
AC_IN > 2.089V --> AC DETECT
4.2V/cell
HM1-SB
AD<=17V, disable
charger function
parallel to KBC
GND is KBC's GND
Charge OFF
Charge ONCHG_PBATT is L:
CHG_PBATT is H:
If Charger is MAX1909,dummy them.
ICTL :
CHG_ON# CHG_I_SEL CHG_I_PRE_SEL
0A H L L
0.3A L L H
1.5A L H L
2.5A L L L
SB
SB
SC
SC
ISOURCE_MAX = (0.075/R364)*(VCLS/VREF)
TOTAL_POWER :
Adapter=90W,Total_Power=81W
0707 -1
0707 -1
PDS
27
SRC
24
DCIN
1
VCTL
11
ICTL
10
MODE
7
ACIN
3
IINP
8
CLS
9
ACOK
6
PKPRES
5
CCV
13
CCI
12
CCS
14
CSSP 26
CSSN 25
REF
4
DHIV 22
PDL 28
LDO 2
DLOV 21
DHI 23
DLO 20
PGND 19
CSIP 18
CSIN 17
BATT 16
GND 15
PGND 29
U7
MAX8725ETI
U7
MAX8725ETI
1 2
R409 D015R2512F-1
R409 D015R2512F-1
12
R425
19K1R2F
R425
19K1R2F
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U6
SI4800BDY
S
S
S
GD
D
D
D
U6
SI4800BDY
1 2
R426 31K6R3F
R426 31K6R3F
12
R37
DUMMY-R3
R37
DUMMY-R3
1 2
L22
IND-10UH-28
L22
IND-10UH-28
1 2
G34
GAP-CLOSE-PWR
G34
GAP-CLOSE-PWR
12
C43
SCD01U50V3KX
C43
SCD01U50V3KX
12
C38
SCD1U
C38
SCD1U
12
R421 0R2-0
R421 0R2-0
1 2
G7
GAP-CLOSE-PWR
G7
GAP-CLOSE-PWR
1 2
G36GAP-CLOSE-PWR G36GAP-CLOSE-PWR
12
R41
10KR2
R41
10KR2
12
C54
SCD1U
C54
SCD1U
12
C339
SCD1U25V3KX
C339
SCD1U25V3KX
12
C342
SC1U10V3ZY
C342
SC1U10V3ZY
1
2 3
GS
D
Q8
2N7002
GS
D
Q8
2N7002
1
2 3
GS
D
Q7
2N7002
GS
D
Q7
2N7002
1 2
G5
GAP-CLOSE-PWR
G5
GAP-CLOSE-PWR
1
2
3
D1
BAV99LT1
D1
BAV99LT1
12
C52
SCD01U50V3KX
C52
SCD01U50V3KX
12
R411
100KR2
R411
100KR2
1 2
G37GAP-CLOSE-PWR G37GAP-CLOSE-PWR
1 2
G35
GAP-CLOSE-PWR
G35
GAP-CLOSE-PWR
12
R44
2K2R2F
R44
2K2R2F
3
1
2
Q43
S2N3904-U3
Q43
S2N3904-U3
12
C332
SC10U25V0KX
C332
SC10U25V0KX
12
R427
49K9R2F
R427
49K9R2F
1 2
G8
GAP-CLOSE-PWR
G8
GAP-CLOSE-PWR
1 2
R18
15K4R2F-GP
R18
15K4R2F-GP
12
R412
49K9R2F
R412
49K9R2F
12
C333
SC10U25V0KX
C333
SC10U25V0KX
12
R414
68KR3F
R414
68KR3F
12
R42
20KR2F
R42
20KR2F
12
R413
39KR2F
R413
39KR2F
12
C331
SC10U25V6KX
C331
SC10U25V6KX
12
C56
SC1U10V3ZY
C56
SC1U10V3ZY
12
C340
SCD1U25V3KX
C340
SCD1U25V3KX
12
R424
100KR2F
R424
100KR2F
12
C338
SC1U50V5ZY
C338
SC1U50V5ZY
1 2
R17
100KR2F
R17
100KR2F
1 2
R364 D01R2512F-1-GP
R364 D01R2512F-1-GP
12
C44
SCD1U25V3KX
DY
C44
SCD1U25V3KX
DY
12
C53
SCD1U25V3KX
C53
SCD1U25V3KX
1 2
R405 DUMMY-R3R405 DUMMY-R3
1 2
C4
SCD1U
C4
SCD1U
12
C330
SC10U25V6KX
C330
SC10U25V6KX
12
R43
29K4R2F
R43
29K4R2F
1
2
3
45
6
7
8
S
S
GD
D
D
DS
U5
SI4431BDY
S
S
GD
D
D
DS
U5
SI4431BDY
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U54
AO4407
S
S
S
GD
D
D
D
U54
AO4407
12
C341
SCD1U
C341
SCD1U
12
C51
SCD1U
C51
SCD1U
12
R47
100KR2
R47
100KR2
12
R422
100KR2
R422
100KR2
12
R429
100KR2F
R429
100KR2F
1 2
C55
SC1U10V3ZY
C55
SC1U10V3ZY
12
R410
33R2
R410
33R2
1
2 3
GS
D
Q44
2N7002
DY
GS
D
Q44
2N7002
DY
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
U51
AO4407
S
S
S
GD
D
D
D
U51
AO4407
21
D27
CH521S-30
D27
CH521S-30
12
R423
68KR3F
R423
68KR3F
12
C334
SC10U25V6KX
C334
SC10U25V6KX
12
R205
20KR2F
DY
R205
20KR2F
DY
12
R428
49K9R2F
R428
49K9R2F
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
MAX1907_DH
H_VID1
H_VID0
H_VID2
H_VID4
H_VID5
H_VID3
MAX1907_POS
MAX1907_B0
MAX1907_B2
MAX1907_ILIM
MAX1907_S2
MAX1907_OAIN-
SYSPOK
MAX1907_S1
1907_CSP1
MAX1907_CC
1907_CSP
MAX1907_S0
MAX1907_B1
MAX1907_OAIN+
1907_CSN1
MAX1907_NEG
MAX1907_S2MAX1907_S0 MAX1907_S1 MAX1907_B0 MAX1907_B1 MAX1907_B2
PM_STPCPU#
1907_CSP_G
VCC_CORE_S0_G92
MAX1907_LX
MAX1907_DL
SYSPOK
CLK_PWRGD#3,25
PM_STPCPU#3,22
VGATE25
H_VID05 H_VID15 H_VID25 H_VID35 H_VID45 H_VID55
CPU_SHDN#42
PM_DPRSLPVR22
3D3V_S0
MAX1907_VCC
MAX1907_REF
DCBATOUT
VCC_CORE_S0
DCBATOUT
5V_S05V_S0 5V_S0 5V_S0 5V_S05V_S0
3D3V_S0
3D3V_AUX
VCCP_GMCH_S0
5V_S5 5V_S0 5V_S5
DCBATOUT
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
IMVP IV-CPU POWER-MAX1907
A3
41 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
IMVP IV-CPU POWER-MAX1907
A3
41 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
IMVP IV-CPU POWER-MAX1907
A3
41 47Monday, July 11, 2005
<Core Design>
CPU_CORE-MAX1907
LS/IRFR3709Z/8.2mOhm/@4.5V
offset 1.2%
Ton=NC, Freq.=300KHz
1
1
1
Vcore
0
1.260
0
1
0
0
1
V
0
VID2
1
0
0
0
01
0
0.940
0
1
VID3 VID1 VID0
1.180
1
0.972
1
1.100
0
1
0
0
1
VID4
1
1
1.244
VID5
1
0
1
1.340
1
1
110
0
1.020
1
1
0
1
1
0
0
0
1
1
0
1.052
1
0
1.212
0
1
1
00
0
1
1
1
1
0
1.148
1
1
0
1.324
0
0
0
0
0
1
1
1
1
0
0
1.292
1
1
1
OCP=30A, Vally current = 27.5A,
Vilim=550mV(55mVp-p*10)
Deeper Sleep Voltage : 0.748V
, S0=L, S1=H, S2=Open,
Boot-up Voltage : 1.2V
, B0=L, B1=L, B2=Open
VID
HS/IRFR3707Z/12.5mOhm/@4.5V
1 2
R24 0R3-0-U
R24 0R3-0-U
12
R2
0R3-0-U
R2
0R3-0-U
12
C11
SC4D7U25V6KX-L
C11
SC4D7U25V6KX-L
1 2
C2
SC4D7U10V5ZY
C2
SC4D7U10V5ZY
12
R7
47KR3
R7
47KR3
12
R378
DUMMY-R2
R378
DUMMY-R2
1 2
C5
SC100P50V2JN-U
C5
SC100P50V2JN-U
12
TC16
SE100U25VM-L1-GP
TC16
SE100U25VM-L1-GP
1 2
C37
SCD47U10VKX
C37
SCD47U10VKX
12
C12
SC4D7U10V5ZY
C12
SC4D7U10V5ZY
12
R32
698R2F
R32
698R2F
12
R3
10R3
R3
10R3
1 2
R8
2K2R2F
R8
2K2R2F
12
R366
DUMMY-R2
R366
DUMMY-R2
1
2 3
GS
D
Q1
2N7002
GS
D
Q1
2N7002
1 2
R15
100KR2
R15
100KR2
1 2
R31 DUMMY-R3R31 DUMMY-R3
1 2
R16 0R2-0
R16 0R2-0
12
R368
DUMMY-R2
R368
DUMMY-R2
1
3 4
G
S
D
Q6
IRFR3707Z
G
S
D
Q6
IRFR3707Z
1 2
R11 110R2F
R11 110R2F
1 2
R13 130R3F
R13 130R3F
1 2
R381 698R2F
R381 698R2F
12
R369
DUMMY-R2
R369
DUMMY-R2
1
3 4
G
S
D
Q29
IRFR3707Z
G
S
D
Q29
IRFR3707Z
1 2
C1
SC270P50V2JN
C1
SC270P50V2JN
1 2
R9
100KR2
R9
100KR2
1 2
R5 1KR2
R5 1KR2
1 2
R22 200R2F
R22 200R2F
1 2
R12 698R2F
R12 698R2F
1 2
R23 200R2F
R23 200R2F
12
G2
GAP-CLOSE-PWR
G2
GAP-CLOSE-PWR
12
R380
20KR2
R380
20KR2
1 2
G1
GAP-CLOSE
G1
GAP-CLOSE
12
TC4
SE220U2VDM-6
TC4
SE220U2VDM-6
12
C13
SC4D7U25V6KX-L
C13
SC4D7U25V6KX-L
12
R382
1K18R3F
R382
1K18R3F
1 2
R10 130R3F
DY
R10 130R3F
DY
1 2
C6
SC470P50V2KX
C6
SC470P50V2KX
1
3 4
G
S
D
Q30
IRFR3709Z
G
S
D
Q30
IRFR3709Z
12
G3
GAP-CLOSE-PWR
G3
GAP-CLOSE-PWR
12
R4
0R3-0-U
DY
R4
0R3-0-U
DY
12
R367
DUMMY-R2
R367
DUMMY-R2
12
R19
10KR2
R19
10KR2
1 2
C9
SC1000P50V
C9
SC1000P50V
B0
1
B1
2
B2
3
S0
4
S1
5
S2
6
SHDN#
7
REF
8
ILIM
9
VCC 10
GND 11
CC
12
POS 13
NEG 14
FB 15
OAIN- 16
OAIN+ 17
CSP 18
CSN 19
DPSLP#
20
D5
21 D4
22 D3
23 D2
24 D1
25 D0
26
DDO#
27
PGND 28
DL 29
VDD 30
BST 31
LX 32
DH 33
V+ 34
SUS
35
SYSPOK
36
IMVPOK
37
CLKEN#
38
TIME
39
TON
40
NC 41
U1
MAX1907AETL-U
U1
MAX1907AETL-U
1 2
R374
100KR2
R374
100KR2
12
C329
SC4D7U25V6KX-L
C329
SC4D7U25V6KX-L
12
C3
SC1U10V3KX
C3
SC1U10V3KX
12
R365
DUMMY-R2
R365
DUMMY-R2
12
R1
100KR2
DY
R1
100KR2
DY
12
C8
SCD1U10V2MX-1
C8
SCD1U10V2MX-1
12
R377
20KR2
R377
20KR2
21
D2
SSM5818SL
D2
SSM5818SL
1 2
C10
SCD1U25V3KX
C10
SCD1U25V3KX
12
R375
DUMMY-R2
R375
DUMMY-R2
12
R21
4K7R2
R21
4K7R2
1 2
C7
SCD1U25V3KX
C7
SCD1U25V3KX
12
G4
GAP-CLOSE-PWR
G4
GAP-CLOSE-PWR
1
3 4
G
S
D
Q4
IRFR3709Z
G
S
D
Q4
IRFR3709Z
12
R14
DUMMY-R2
R14
DUMMY-R2
12
R372
DUMMY-R2
R372
DUMMY-R2
1 2
R371 100KR2F
R371 100KR2F
12
R20
22KR2J
R20
22KR2J
12
TC17
SE220U2VDM-6
TC17
SE220U2VDM-6
3
1
2
Q2
S2N3904-U3
Q2
S2N3904-U3
12
C14
SCD1U
C14
SCD1U
12
R6
100KR2
R6
100KR2
12
R376
20KR2
R376
20KR2
12
R370
DUMMY-R2
R370
DUMMY-R2
12
TC2
SE220U2VDM-6
TC2
SE220U2VDM-6
12
R373
150KR2F
R373
150KR2F
12
TC3
SE220U2VDM-6
TC3
SE220U2VDM-6
1 2
L1
IND-D68UH-10
L1
IND-D68UH-10
12
C327
SC4D7U25V6KX-L
C327
SC4D7U25V6KX-L
12
C328
SCD1U
C328
SCD1U
12
R379
20KR2
R379
20KR2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A
A
5130_INV2
5130_FB2
5130_INV1
5130_FB1
TPS5130_5V_EN#
PM_SLP_S4#
5130_SS_STBY1
5130_FB3
5130_INV3
5130_OUT1D
5130_LH1
5130_OUT1U
5130_TRIP3
5130_TRIP1
5130_OUT3D
5130_LL3
5130_FB3
5130_OUT3U
5130_LH3
5130_LL2
5130_TRIP2
5130_REGIN
5130_PG_DELAY
5130_INV3
5130_OUT2U
5130_LH2
5130_OUT2D
5130_INV1
5130_INV2
5130_FB2
5130_FB1
5130_SS_STBY1
STBY_REF
5130_PWMSEL
5130_CT
5130_STBY_LDO
5130_SS_STBY3
5130_LL1
5130_SS_STBY2
5130_TRIP3
5130_TRIP2
5130_TRIP1
5130_CT
5130_REF
5130_REF
5130_FLT
5130_FLT
TPS5130_1D8V_EN#
5130_STBY_LDO 5130_SS_STBY2
PM_SLP_S3#
PM_SLP_S4#
5130_SS_STBY3
PM_SLP_S4#
5130_LL1 43
5130_OUT1U 43
5130_OUT1D 43
5130_OUT2D 43
5130_LL2 43
5130_OUT2U 43
5130_OUT3U 43
5130_OUT3D 43
5130_LL3 43
VCCP_PWRGD25,44,45 CPU_SHDN# 41
PM_SLP_S4#22,26,36
BL3#43
PM_SLP_S3#22,26,33,36,44,45,46
S5PWR_ENABLE 25
TPS5130_1D8V_EN#31
3D3V_PWR
1D8V_PWR
5V_AUX
5V_PWR
DCBATOUT
5130_5V_LDO
5V_S3
5130_3D3V_LDO
DCBATOUT
5130_5V_LDO
5130_3D3V_LDO
DCBATOUT
DCBATOUT
DCBATOUT
DCBATOUT
DCBATOUT
5V_AUX
5130_5V_LDO 5V_AUX
3D3V_S0
3D3V_S0
5130_5V_LDO
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
TPS5130 (3D3V/5V/1D8V)
A3
42 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
TPS5130 (3D3V/5V/1D8V)
A3
42 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
TPS5130 (3D3V/5V/1D8V)
A3
42 47Thursday, July 07, 2005
<Core Design>
close to IC
close to IC
For 3.3V
SETTING=3.349V
For 1.8V
SETTING=1.82V
T(soft)=1.736ms
OCP
8.88A=>R207=15K
Vo=(R1*0.85)/R2+0.85
close to IC
For 5V
SETTING=5.0915V
TI TPS5130 for 1D8V, 3D3V, 5V
(1D8V=>CH1 , 3D3V=>CH2 , 5V =>CH3)
TPS5130
close to IC
5V_OCP
close to IC
1D8V_OCP
close to IC
3D3V_OCP
close to IC
OCP
8.2A=>R186=13K
OCP
5.82A=>R182=10K
PWM_SEL
*
Condition Voltage
H : Auto PWM/SKIP 2.2V(Min)~
L : PWM fixed (300KHz) ~0.3V(Max)
HW Thermal Throttling
SB
SB
SC
SB
SC
SC
SC
SC
SC
0703 -1
12
C533SC4D7U10V5ZY
78.47593.411 C533SC4D7U10V5ZY
78.47593.411
1 2
G60
GAP-CLOSE
ZZ.CON2C.XX1
G60
GAP-CLOSE
ZZ.CON2C.XX1
1 2
R188 10KR2F-U
R188 10KR2F-U
1 2
R6630R2-0 R6630R2-0
12
R189
2K7R2J
R189
2K7R2J
12
C542
SC1000P25V
C542
SC1000P25V
1 2
R576 680R3F
R576 680R3F
12
G67 GAP-CLOSE-PWRG67 GAP-CLOSE-PWR
1
2
34
5
6
U71
2N7002DW
84.27002.03F
U71
2N7002DW
84.27002.03F
1 2
C207
SCD1U25V2ZY-U
C207
SCD1U25V2ZY-U
1 2
R183
10KR3F
R183
10KR3F
1
23
147
U44A
TSLCX08-U
U44A
TSLCX08-U
12
C535
SC47P50V2JN
78.47034.1F1
C535
SC47P50V2JN
78.47034.1F1
1 2
R210 330R2F
R210 330R2F
12
C529
SC4700P50V2KX
C529
SC4700P50V2KX
1 2
R207
15KR3F
R207
15KR3F
12
C211
SC3300P50V2KX
C211
SC3300P50V2KX
1 2
R187 150R2F
R187 150R2F
12
R587
3K24R2F
R587
3K24R2F
12
C228
SC4700P50V2KX
C228
SC4700P50V2KX
1 2
R191 100KR2
R191 100KR2
1 2
R184 100KR2
R184 100KR2
1 2
R6620R2-0
DY
R6620R2-0
DY
1 2
C223
SCD1U16V2KX-2
C223
SCD1U16V2KX-2
12
C528
SC8200P25V2KX
C528
SC8200P25V2KX
1 2
R186
13KR3F
R186
13KR3F
12
R209
1K8R2
R209
1K8R2
1 2
C208
SCD1U16V2KX-2
C208
SCD1U16V2KX-2
1 2
C527
SCD1U16V2KX-2
C527
SCD1U16V2KX-2
1 2
C530
SC1000P50V2KX
C530
SC1000P50V2KX
12
R597
0R2-0
R597
0R2-0
12
R523
10KR2
R523
10KR2
1 2
R211 1KR2F
R211 1KR2F
1
23
D11
BAW56-1
D11
BAW56-1
1 2
C212
SC5600P25V2KX
C212
SC5600P25V2KX
1 2
C520
SCD1U16V2KX-2
C520
SCD1U16V2KX-2
1
2
3
D34
BAT54-1
83.00054.L03
D34
BAT54-1
83.00054.L03
1 2
C210
SC4700P50V2KX
C210
SC4700P50V2KX
12
R185
150KR2J
R185
150KR2J
12
C536
SCD1U16V2KX-2
C536
SCD1U16V2KX-2
2 1
D36
CH521S-30
D36
CH521S-30
1 2
R190 29K4R2F
R190 29K4R2F
21
3
IN
OUT
R1
R2
GND
Q42
DTC115EE-U
IN
OUT
R1
R2
GND
Q42
DTC115EE-U
1 2
R208 4K99R2F
R208 4K99R2F
1 2
R574 10KR2F-U
R574 10KR2F-U
12
C526
SCD1U25V2ZY-U
C526
SCD1U25V2ZY-U
1 2
C522
SC6800P25V2KX-N2
C522
SC6800P25V2KX-N2
1 2
C541 SCD1U16V2KX-2C541 SCD1U16V2KX-2
1 2
R598 100KR2
R598 100KR2
12
C521
SCD01U16V2KX
C521
SCD01U16V2KX
12
G59
GAP-CLOSE-PWR
G59
GAP-CLOSE-PWR
1 2
R575 11K5R2FR575 11K5R2F
FB1
1
FB2
4
FB3
14 INV1 48
INV2
3
INV3
15
LDO_CUR 28
LDO_GATE 27
LDO_OUT 26
LDO_IN 29
LH1 46
LH2 34
LH3
20
LL1 44
LL2 36
LL3
22
OUT1_D 43
OUT2_D 37
OUT3_D
23
OUT1_U 45
OUT2_U 35
OUT3_U
21
OUTGND1 42
OUTGND2 38
OUTGND3
24
SS_STBY1
2
SS_STBY2
5
SS_STBY3
13
TRIP1 41
TRIP2 39
TRIP3
18
VIN 33
VIN_SENSE12 40
VIN_SENSE3
19
VREF5 31
VREF3.3 32
PGOUT
16
PG_DELAY
17
PWM_SEL
6
REF
9
REG5V_IN 30
CT
7
FLT 47
GND
8
INV_LDO 25
STBY_LDO
12 STBY_VREF3.3
11 STBY_VREF5
10
U73
TPS5130PT-U
U73
TPS5130PT-U
12
C534
SC4700P50V2KX
78.47224.2F1
C534
SC4700P50V2KX
78.47224.2F1
1
2
3 4
5
6
U74
2N7002DW
84.27002.03F
U74
2N7002DW
84.27002.03F
1 2
C209
SCD1U16V2KX-2
C209
SCD1U16V2KX-2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A
A
5130_OUT3U
5130_OUT1D
5130_LL1
5130_OUT1U
5130_LL3
5130_LL2
5130_OUT3D
5130_OUT2U
5130_OUT2D
APL5331_0D9V_VREF
HTH
HTH
5130_OUT1U42 5130_LL142
5130_OUT1D42
5130_OUT3U42 5130_LL342
5130_OUT3D42
5130_OUT2U42 5130_LL242
5130_OUT2D42
RSMRST# 21,25,36
BL3#42
3D3V_AUX3D3V_PWR
5V_PWR 5V_S3
1D8V_PWR 1D8V_S3
DCBATOUT
3D3V_PWR
1D8V_PWR
DCBATOUT
DCBATOUT
5V_PWR
1D8V_S3
5V_S0
DDR_VREF0D9V_LDO
1D8V_S3
1D5V_S5
DCBATOUT
5V_AUX
3D3V_S5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
TPS5130 (3D3V/5V/1D8V/0D9V)
A3
43 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
TPS5130 (3D3V/5V/1D8V/0D9V)
A3
43 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
TPS5130 (3D3V/5V/1D8V/0D9V)
A3
43 47Monday, July 11, 2005
<Core Design>
Imax=9.3A
Rdson=19.6~24mohm
Imax=9.3A
Rdson=19.6~24mohm
KEMET, NTD:8.0 (Q1)
ESR=25mohm
Iripple=1.65A
7.3*4.3*2.8
KEMET, NTD:7.6 (Q1)
ESR=25mohm
Iripple=2.2A
7.3*4.3*1.9
TI TPS5130 for 1D2V, 5V, 3D3V
(1D2V=>CH1 , 5V=>CH2 , 3D3V =>CH3)
3D3V
Iomax=4A
OCP>8A
1D8V
Iomax=5A
OCP>10A
5V
Iomax=5.4A
OCP>10A
Imax=9.3A
Rdson=19.6~24mohm
Imax=9.3A
Rdson=19.6~24mohm
Imax=9.3A
Rdson=19.6~24mohm
Imax=A
DCR=mOhm
Imax=4.5A
DCR=60mOhm
7*7*3.0
Imax=9.3A
Rdson=19.6~24mohm
NEC, NTD:8.75 (Q1)
ESR=55mohm
Iripple=1.65A
7.3*4.3*2.8
Imax=4.5A
DCR=60mOhm
7*7*3.0
KEMET
100uF / 4V / B2 Size / NTD:5.615
Iripple=1.1A / ESR=70mohm
Vo(cal.)=0.90V
0D9V_S0
Iomax=2A
SO-8-P
Trace Length=1cm (500mils)
Trace Width=8mils
Trace Resistance>25mohm
Imax=300mA
1.5V_S5 (For ICH6)
L3# at 8.13V
L3# circuit
SB
SC
12
R212
174KR2F
R212
174KR2F
12
G57
GAP-CLOSE-PWR
G57
GAP-CLOSE-PWR
12
C229
SCD1U25V2ZY-U
C229
SCD1U25V2ZY-U
12
G64
GAP-CLOSE-PWR
G64
GAP-CLOSE-PWR
12
R226
6K04R2F
R226
6K04R2F
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U26
AO4422
S
S
S
GD
D
D
D
U26
AO4422
12
R610
1KR2F
R610
1KR2F
12
C206
SCD1U25V2ZY-U
C206
SCD1U25V2ZY-U
12
G66
GAP-CLOSE-PWR
G66
GAP-CLOSE-PWR
12
TC24
ST220U6D3VDM-6
TC24
ST220U6D3VDM-6
1 2
L41
IND-4D7UH-66-GP
L41
IND-4D7UH-66-GP
1 2
L39
IND-4D7UH-66-GP
L39
IND-4D7UH-66-GP
12
C238
SC10U35V0ZY-U
C238
SC10U35V0ZY-U
12
C246
SC10U10V5ZY-L
C246
SC10U10V5ZY-L
12
G61
GAP-CLOSE-PWR
G61
GAP-CLOSE-PWR
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U30
AO4422
S
S
S
GD
D
D
D
U30
AO4422
12
C245
SC10U10V5ZY
78.10693.411
DY
C245
SC10U10V5ZY
78.10693.411
DY
12
C224
SCD1U10V2MX-1
C224
SCD1U10V2MX-1
12
C226
SC10U35V0ZY-U
C226
SC10U35V0ZY-U
12
G62
GAP-CLOSE-PWR
G62
GAP-CLOSE-PWR
12
R614
1KR2F
R614
1KR2F
12
C262
SC2D2U10V3ZY
C262
SC2D2U10V3ZY
12
C540
SC10U35V0ZY-U
C540
SC10U35V0ZY-U
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U32
AO4422
S
S
S
GD
D
D
D
U32
AO4422
VIN
1VOUT 4
VREF
3
VCNTL
6NC 8
NC 7
NC 5
GND
2
GND
9
U38
APL5331KAC-TR
U38
APL5331KAC-TR
12
G63
GAP-CLOSE-PWR
G63
GAP-CLOSE-PWR
12
C563
SC22U10V6ZY-U
DY
C563
SC22U10V6ZY-U
DY
1 2
L40
IND-6D8UH-31-GP
L40
IND-6D8UH-31-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U33
AO4422
S
S
S
GD
D
D
D
U33
AO4422
12
G25
GAP-CLOSE-PWR
G25
GAP-CLOSE-PWR
12
R227
1MR2F
R227
1MR2F
12
C247
SCD1U
C247
SCD1U
12
G56
GAP-CLOSE-PWR
G56
GAP-CLOSE-PWR
12
C564
SCD1U16V2KX-2
C564
SCD1U16V2KX-2
12
G24
GAP-CLOSE-PWR
G24
GAP-CLOSE-PWR
HTH
1
GND
2
LTH
3RESET#/RESET 4
VCC 5
U29
G680LT1
U29
G680LT1
12
TC13
ST100U4VBM-1
TC13
ST100U4VBM-1
12
TC23
SE220U2VDM-7
TC23
SE220U2VDM-7
12
G58
GAP-CLOSE-PWR
G58
GAP-CLOSE-PWR
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U28
AO4422
S
S
S
GD
D
D
D
U28
AO4422
12
C227
SCD1U25V2ZY-U
C227
SCD1U25V2ZY-U
GND 1
VOUT 2
VIN
3
U39
G9131-15T73UF-GP
U39
G9131-15T73UF-GP
12
G65
GAP-CLOSE-PWR
G65
GAP-CLOSE-PWR
1
2
3
D12
BAT54-1
DY
D12
BAT54-1
DY
12
TC25
ST220U6D3VDM-12
TC25
ST220U6D3VDM-12
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U31
AO4422
S
S
S
GD
D
D
D
U31
AO4422
MAX8743_BST2R
MAX8743_BST2
MAX8743_BST1R
MAX8743_BST1
MAX8743_DL1
MAX8743_LX1
MAX8743_FB1
1D5V_PWR
MAX8743_DH1 MAX8743_DH2
MAX8743_LX2
MAX8743_DL2
MAX8743_FB2
MAX8743_ON#
1D8V_VRAM_PWR
MAX8743_ON#
VCCP_PWRGD 25,42,45 PM_SLP_S3# 22,26,33,36,42,45,46
MAX8743_ON# 44,45
VRAM_VDDQ
5V_S3
1D5V_S0
MAX8743_VREF
MAX8743_VREF
DCBATOUT
5V_S3
5V_S3
3D3V_S0 5V_AUX
3D3V_S5
MAX8743_VREF
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MAX8743 (1D8V_S0/1D5V_S0)
A3
44 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MAX8743 (1D8V_S0/1D5V_S0)
A3
44 47Monday, July 11, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MAX8743 (1D8V_S0/1D5V_S0)
A3
44 47Monday, July 11, 2005
<Core Design>
1D8V / 5.5A
Iocp=4.3 * 1.7 = 7.3A
Rds,on=20*1.375=27.5m ohm
Vcs2=Iocp*Rds,on=201mV
VILIM2=Vcs2/0.1=2.01V
Close to pin21 Close to pin4
1D05V ON/OFF control
1D5V / 4D3A
Rds-on,max = 20m ohm
7A@70 degree C
Iocp=7.8 * 1.7 = 13.3A
Rds,on=5.5*1.375=7.563m ohm
Vcs1=Iocp*Rds,on=100mV
VILIM=Vcs1/0.1=1V
Rds-on,max = 5.5m ohm
10A@70 degree C
Ton Setting
VCC
Float
VREF
AGND
Side 1
Frequency(kHz)
235
345
485
620
Side 2
Frequency(kHz)
170
255
355
460
SB
SC
SC
SC
0703 -1
0703 -1
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U66
AO4422
S
S
S
GD
D
D
D
U66
AO4422
1 2
R161 0R3-U
R161 0R3-U
1 2
R661
100KR2F
R661
100KR2F
1 2
G17
GAP-CLOSE-PWR
G17
GAP-CLOSE-PWR
1 2
R573
10R3
R573
10R3
12
R178
5K1R2F
R178
5K1R2F
12
G22
GAP-CLOSE-PWR
G22
GAP-CLOSE-PWR
12
C516
SC1U10V3KX
C516
SC1U10V3KX
12
C515
SC1U10V3KX
C515
SC1U10V3KX
1 2
R565 DUMMY-R2R565 DUMMY-R2
1
2
3
46
7
8
5
S
GD
D
D
D
S
S
U70
IRF7807Z
S
GD
D
D
D
S
S
U70
IRF7807Z
12
R170 0R2-0
R170 0R2-0
1 2
R172 100KR2R172 100KR2
12
C514
SCD01U50V3KX
C514
SCD01U50V3KX
12
R171 0R2-0
DY
R171 0R2-0
DY
12
R162
10KR2F-U
R162
10KR2F-U
12
R164
8K06R2F
R164
8K06R2F
1 2
R656 10KR2
DY
R656 10KR2
DY
1 2
G18
GAP-CLOSE-PWR
G18
GAP-CLOSE-PWR
12
C513
SC1U10V3KX
C513
SC1U10V3KX
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U67
AO4422
S
S
S
GD
D
D
D
U67
AO4422
12
C181
SCD1U25V3KX
C181
SCD1U25V3KX
12
C506
SC10U25VMX-2-U
C506
SC10U25VMX-2-U
12
R564
DUMMY-R2
R564
DUMMY-R2
1
2
3 4
5
6
U82
2N7002DW
DY
U82
2N7002DW
DY
12
C197
SCD1U25V3KX
C197
SCD1U25V3KX
12
C507
SCD01U50V3KX
C507
SCD01U50V3KX
12
R179
10KR2F-U
R179
10KR2F-U
12
TC11
SE220U2VDM-7
TC11
SE220U2VDM-7
1 2
R667 0R2-0R667 0R2-0
12
R563
DUMMY-R2
R563
DUMMY-R2
1
23
D10
BAW56-1
D10
BAW56-1
12
R169
100KR2F
R169
100KR2F
12
R607
30K1R2F
R607
30K1R2F
1 2
L15
IND-4D7UH-16-GP
L15
IND-4D7UH-16-GP
1 2
R167
0R3-U
R167
0R3-U
12
R572
100KR2F
R572
100KR2F
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U68
AO4422
S
S
S
GD
D
D
D
U68
AO4422
12
C618
SCD1U10V2MX-1
DY
C618
SCD1U10V2MX-1
DY
1 2
G16
GAP-CLOSE-PWR
G16
GAP-CLOSE-PWR
1 2
R657
100KR2
DY
R657
100KR2
DY
12
C505
SCD1U25V3KX
C505
SCD1U25V3KX
12
C512
SCD1U25V3KX
C512
SCD1U25V3KX
12
C508
SC1U25V5ZY
C508
SC1U25V5ZY
12
TC8
SE220U2VDM-6
TC8
SE220U2VDM-6
12
R571
402KR2F
R571
402KR2F
1 2
L16
IND-6D8UH-31-GP
L16
IND-6D8UH-31-GP
12
R163
86K6R2F
R163
86K6R2F
12
G21
GAP-CLOSE-PWR
G21
GAP-CLOSE-PWR
12
C491
SC10U25VMX-2-U
C491
SC10U25VMX-2-U
1 2
R658
100KR2
DY
R658
100KR2
DY
OUT1
1
FB1
2
ILIM1
3
V+ 4
TON
5
SKIP#
6
PGOOD 7
OVP 8
UVP
9
REF
10
ON1
11 ON2 12
ILIM2 13
FB2 14
CS1
28
LX1
27 DH1
26
BST1
25
DL1
24
GND
23
VCC 22
VDD 21
DL2 20
BST2 19
DH2 18
LX2 17
CS2 16
OUT2 15
U69
MAX8743EEI
U69
MAX8743EEI
12
G20
GAP-CLOSE-PWR
G20
GAP-CLOSE-PWR
MAX8743A_BST2R
MAX8743A_BST2
MAX8743A_BST1R
MAX8743A_BST1
MAX8743A_DL1
MAX8743A_LX11D2V_PWR
MAX8743A_FB1
1D05V_PWR
MAX8743A_DH1 MAX8743A_DH2
MAX8743A_LX2
MAX8743A_DL2
MAX8743A_FB2
1D2V_PWR
MAX8743_ON#
VCCP_PWRGD 25,42,44
VGA_PWRCNTL 13
MAX8743_ON# 44
5V_S3
DCBATOUT
1D2V_VGA_S0
5V_S3
1D05V_S0
MAX8743A_VREF
3D3V_S0
5V_S3
MAX8743A_VREF
MAX8743A_VREF
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MAX8743 (1D2V_VGA_S0/1D05V)
A3
45 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MAX8743 (1D2V_VGA_S0/1D05V)
A3
45 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MAX8743 (1D2V_VGA_S0/1D05V)
A3
45 47Thursday, July 07, 2005
<Core Design>
1D2V / 13A
Iocp=4.3 * 1.7 = 7.3A
Rds,on=20*1.375=27.5m ohm
Vcs2=Iocp*Rds,on=201mV
VILIM2=Vcs2/0.1=2.01V
Close to pin21 Close to pin4
1D2V ON/OFF control
1D05V / 6.8A
Rds-on,max = 20m ohm
7A@70 degree C
Iocp=7.8 * 1.7 = 13.3A
Rds,on=5.5*1.375=7.563m ohm
Vcs1=Iocp*Rds,on=100mV
VILIM=Vcs1/0.1=1V
Rds-on,max = 5.5m ohm
10A@70 degree C
M24/M26 POWER PLAY (VGA_PWRCNTL)
high (3.3V) = set lower core voltage (VDDC = 1.0V)
low (0V) = set higher core voltage (VDDC = 1.2V)
High(3.3V)=>Vo=1.0V
Low(0V)=>Vo=1.2V
Vo=Vref*(1+R1/R2)
=1.0V*(1+2K/10K)
=1.2V
Vo=1.0V*(1+0/10K)
=1*1=1.0V Ton Setting
VCC
Float
VREF
AGND
Side 1
Frequency(kHz)
235
345
485
620
Side 2
Frequency(kHz)
170
255
355
460
SB
SB
SB
0706 -1
SC SC
1 2
L23
IND-D82UH-3-GP
L23
IND-D82UH-3-GP
12
G52
GAP-CLOSE-PWR
G52
GAP-CLOSE-PWR
1 2
R49 0R3-U
R49 0R3-U
12
R487
30K1R2F
R487
30K1R2F
12
C60
SCD01U50V3KX
C60
SCD01U50V3KX
1 2
L24
IND-3D3UH-44-GP
L24
IND-3D3UH-44-GP
12
C58
SCD1U25V3KX
C58
SCD1U25V3KX
1
2
3
46
7
8
5
S
GD
D
D
D
S
S
U56
IRF7807Z
S
GD
D
D
D
S
S
U56
IRF7807Z
12
G42
GAP-CLOSE-PWR
G42
GAP-CLOSE-PWR
1 2
R102
10R3
R102
10R3
12
G51
GAP-CLOSE-PWR
G51
GAP-CLOSE-PWR
1
2
3
46
7
8
5
S
GD
D
D
D
S
S
U10
IRF7807Z
S
GD
D
D
D
S
S
U10
IRF7807Z
12
R91
220KR2F
R91
220KR2F
12
TC20
SE220U2VDM-6
TC20
SE220U2VDM-6
12
R63
510R2F
R63
510R2F
12
R655
3K3R2
R655
3K3R2
12
R88
100KR2F
R88
100KR2F
12
C91
SC1U25V5ZY
C91
SC1U25V5ZY
12
G43
GAP-CLOSE-PWR
G43
GAP-CLOSE-PWR
12
C46
SC10U25VMX-2-U
C46
SC10U25VMX-2-U
12
G50
GAP-CLOSE-PWR
G50
GAP-CLOSE-PWR
12
R89
243KR2F
R89
243KR2F
1
2
3
46
7
8
5
S
GD
D
D
D
S
S
U8
IRF7807Z
S
GD
D
D
D
S
S
U8
IRF7807Z
12
C48
SC10U25VMX-2-U
C48
SC10U25VMX-2-U
1
23
D4
BAW56-1
D4
BAW56-1
12
G41
GAP-CLOSE-PWR
G41
GAP-CLOSE-PWR
12
R652 0R2-0
R652 0R2-0
12
C49
SC10U25VMX-2-U
C49
SC10U25VMX-2-U
1 2
R450
0R2-0
R450
0R2-0
12
TC5
SE220U2VDM-6
TC5
SE220U2VDM-6
12
C47
SCD1U25V3KX
C47
SCD1U25V3KX
1
2 3
G
S
D
Q39
2N7002
G
S
D
Q39
2N7002
1 2
R90 100KR2R90 100KR2
OUT1
1
FB1
2
ILIM1
3
V+ 4
TON
5
SKIP#
6
PGOOD 7
OVP 8
UVP
9
REF
10
ON1
11 ON2 12
ILIM2 13
FB2 14
CS1
28
LX1
27 DH1
26
BST1
25
DL1
24
GND
23
VCC 22
VDD 21
DL2 20
BST2 19
DH2 18
LX2 17
CS2 16
OUT2 15
U17
MAX8743EEI
U17
MAX8743EEI
12
G48
GAP-CLOSE-PWR
G48
GAP-CLOSE-PWR
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U9
AO4422
S
S
S
GD
D
D
D
U9
AO4422
12
R92
100KR2F
R92
100KR2F
12
C45
SCD1U25V3KX
C45
SCD1U25V3KX
12
TC18
SE220U2VDM-7
TC18
SE220U2VDM-7
12
C59
SC1U10V3KX
C59
SC1U10V3KX
12
C92
SCD01U50V3KX
C92
SCD01U50V3KX
12
C71
SC1000P25V
DY
C71
SC1000P25V
DY
12
G47
GAP-CLOSE-PWR
G47
GAP-CLOSE-PWR
12
R485
DUMMY-R2
R485
DUMMY-R2
12
R93
10KR2F-U
R93
10KR2F-U
12
C337
SC10U25VMX-2-U
C337
SC10U25VMX-2-U
12
R61
10KR2F-U
R61
10KR2F-U
12
R452 0R2-0
R452 0R2-0
1 2
R486
DUMMY-R2
R486
DUMMY-R2
12
C72
SCD1U25V3KX
C72
SCD1U25V3KX
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U11
AO4422
S
S
S
GD
D
D
D
U11
AO4422
12
G49
GAP-CLOSE-PWR
G49
GAP-CLOSE-PWR
12
R62
49K9R2F
R62
49K9R2F
12
C93
SC1U10V3KX
C93
SC1U10V3KX
12
C70
SCD1U25V3KX
C70
SCD1U25V3KX
12
C61
SC1U10V3KX
C61
SC1U10V3KX
1 2
R64
0R3-U
R64
0R3-U
1 2
R489
100KR2F
R489
100KR2F
12
R451
10KR2
R451
10KR2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PWR_S0_CTL
APL533_VREF2
S5PWR_ENABLE
PM_SLP_S3#
2
2,26,33,36,42,44,45
S5PWR_ENABLE25
DCBATOUT
3D3V_S0 3D3V_AUX
5V_S0 5V_S3
DDR_VREF_S3
1D8V_S3
5V_S3
5V_S33D3V_S3
CORE_GMCH_S0 1D05V_S0 VCCP_GMCH_S0 1D05V_S0
5V_S0
1D2V_VDDR_S0
1D5V_S0
1D5V_S0 3D3V_AUX
3D3V_S5
1D8V_S3VRAM_VDDQ
5V_AUX
5V_S5
5V_S55V_S3
3D3V_S53D3V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
PWRPLANE&RESETLOGIC
A3
46 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
PWRPLANE&RESETLOGIC
A3
46 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
PWRPLANE&RESETLOGIC
A3
46 47Thursday, July 07, 2005
<Core Design>
Suspend Power
Run Power
FOR GMCH Power
VREFOUT = 0.9V
FOR DDR2 Power
DDR_VREF_S3 need 10 mil and
must neat NB and DIMM
1D2V_VDDR_S0 / 3A
1V:R159=470R
1.2V:R159=250R
0703 -1
0703 -1
12
C180
SC1U6D3V2KX
DY
C180
SC1U6D3V2KX
DY
1 2
R223 10KR2
R223 10KR2
1 2
R225 330KR2
R225 330KR2
OUT 1
GND
2
NC
3
ON/OFF#
4
IN 5
U35
AAT4250-U
U35
AAT4250-U
12
R224
1KR2
R224
1KR2
1 2
R204 0R3-U
R204 0R3-U
12
C221
SCD1U16V
C221
SCD1U16V
2
3
1
6
54
G
S
D
Q40
SI3456DV-U1
DY
G
S
D
Q40
SI3456DV-U1
DY
1 2
G46
GAP-CLOSE-PWR
G46
GAP-CLOSE-PWR
12
R160
0R5J-1
R160
0R5J-1
1 2
G45
GAP-CLOSE-PWR
G45
GAP-CLOSE-PWR
IN+
1
VSS
2
IN-
3OUT 4
VDD 5
U25
G1214
DY
U25
G1214
DY
12
C248
SCD1U16V
C248
SCD1U16V
1
32
G
S
D
Q14
TP0610K-U
G
S
D
Q14
TP0610K-U
1 2
G44
GAP-CLOSE-PWR
G44
GAP-CLOSE-PWR
1 2
C222
SCD1U16V
C222
SCD1U16V
12
C249
SCD1U16V
C249
SCD1U16V
12
C196
SCD1U16V3KX
C196
SCD1U16V3KX
12
R321 0R3-U
R321 0R3-U
12
C187
SC10U10V5ZY-L
C187
SC10U10V5ZY-L
12
TC10
ST220U4VDM-1
TC10
ST220U4VDM-1
12
C195
SCD1U16V3KX
C195
SCD1U16V3KX
12
C183
SCD1U16V
C183
SCD1U16V
1 2
G38
GAP-CLOSE-PWR
G38
GAP-CLOSE-PWR
12
R159
249R2F
R159
249R2F
12
R177
220R3F
R177
220R3F
12
R158
1KR2F
R158
1KR2F
12
C182
SCD1U16V
C182
SCD1U16V
1 2
G40
GAP-CLOSE-PWR
G40
GAP-CLOSE-PWR
12
R182
220R3F
R182
220R3F
12
C194
SCD1U10V2MX-1
C194
SCD1U10V2MX-1
12
C179
SC1U6D3V2KX
C179
SC1U6D3V2KX
12
R241 0R3-U
R241 0R3-U
12
C570
SCD1U16V
DY
C570
SCD1U16V
DY
1 2
G39
GAP-CLOSE-PWR
G39
GAP-CLOSE-PWR
1 2
R203
100KR2
R203
100KR2
12
C546
SCD22U50V5KX
C546
SCD22U50V5KX
1
2 3
GS
D
Q13
2N7002
GS
D
Q13
2N7002
OUT 1
GND
2
NC
3
ON/OFF#
4
IN 5
U22
AAT4250-U
DY
U22
AAT4250-U
DY
VIN 1
VOUT
4
VREF 3
VCNTL 6
NC
8
NC
7
NC
5GND 2
GND 9
U23
APL5331KAC-TR
U23
APL5331KAC-TR
21
D14
MMGZ5242B
D14
MMGZ5242B
12
C237
SCD1U16V
DY
C237
SCD1U16V
DY
1
2 3
GS
D
QB1
2N7002
GS
D
QB1
2N7002
12
RB1
100R2
RB1
100R2
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U76
AO4422
S
S
S
GD
D
D
D
U76
AO4422
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
U36
AO4422
S
S
S
GD
D
D
D
U36
AO4422
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
AD+
DCBATOUT
3D3V_S0
3D3V_LAN_S5
VCCP_GMCH_S0
1D8V_S3
3D3V_S03D3V_S0
3D3V_S0
5V_S3
5V_S3
5V_S3
5V_S0 5V_S0 5V_S0
1D5V_S0
AUD_AGND
CORE_GMCH_S0
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
5V_S3
5V_S0 5V_AUDIO_S0
AUD_AGND AUD_AGND
DCBATOUT
BT+
DCBATOUT
5V_S0
3D3V_S0
AUD_AGNDAUD_AGND
1D05V_S0 1D05V_S01D05V_S0 1D05V_S0 1D2V_VGA_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MISC & EMI
A3
47 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MISC & EMI
A3
47 47Thursday, July 07, 2005
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Leopard2
-1
MISC & EMI
A3
47 47Thursday, July 07, 2005
<Core Design>
SC
SC
SC
12
EC84
SCD1U16V
EC84
SCD1U16V
12
EC10
SCD1U25V3KX
EC10
SCD1U25V3KX
12
EC139
SCD1U16V
DY
EC139
SCD1U16V
DY
12
EC44
SCD1U16V
DY
EC44
SCD1U16V
DY
12
EC52
SCD1U16V
DY
EC52
SCD1U16V
DY
1
K3
GNDPAD
K3
GNDPAD
12
EC163
SCD1U16V
EC163
SCD1U16V
1
H23
34.40E37.001
H23
34.40E37.001
12
EC174
SCD1U16V
EC174
SCD1U16V
1
H12
34.40E37.001
H12
34.40E37.001
12
EC164
SCD1U25V3KX
EC164
SCD1U25V3KX
12
EC152
SCD1U16V
EC152
SCD1U16V
12
EC18
SCD1U25V3KX
EC18
SCD1U25V3KX
12
EC31
SCD1U16V
EC31
SCD1U16V
12
EC156
SCD1U16V
EC156
SCD1U16V
12
EC148
SCD1U16V
DY
EC148
SCD1U16V
DY
12
EC55
SCD1U16V
DY
EC55
SCD1U16V
DY
1
H13
HOLE
H13
HOLE
1
H21
HOLE
H21
HOLE
1
H15
HOLE
H15
HOLE
12
EC175
SCD1U16V
EC175
SCD1U16V
12
EC149
SCD1U16V
EC149
SCD1U16V
1
K4
GNDPAD
K4
GNDPAD
12
EC3
SCD1U16V
EC3
SCD1U16V
12
EC177
SCD1U16V
EC177
SCD1U16V
1
SPR4
SPRING-18-U
SPR4
SPRING-18-U
12
EC74
SCD1U16V
DY
EC74
SCD1U16V
DY
12
EC58
SCD1U16V
DY
EC58
SCD1U16V
DY
1
H18
HOLE
H18
HOLE
1
H20
HOLE
H20
HOLE
12
EC21
SCD1U16V
EC21
SCD1U16V
12
EC64
SCD1U25V3KX
EC64
SCD1U25V3KX
12
EC60
SCD1U16V
EC60
SCD1U16V
12
EC126
SCD1U16V
EC126
SCD1U16V
12
EC173
SCD1U16V
EC173
SCD1U16V
12
EC154
SCD1U16V
DY
EC154
SCD1U16V
DY
12
EC80
SCD1U16V
DY
EC80
SCD1U16V
DY
12
EC32
SC1000P50V
EC32
SC1000P50V
12
EC56
SCD1U16V
EC56
SCD1U16V
12
EC77
SCD1U16V
DY
EC77
SCD1U16V
DY
1
H8
HOLE
H8
HOLE
1
H25
HOLE
H25
HOLE
12
EC127
SCD1U16V
EC127
SCD1U16V
1
K7
GNDPAD
K7
GNDPAD
12
EC132
SCD1U16V
DY
EC132
SCD1U16V
DY
12
EC133
SCD1U16V
DY
EC133
SCD1U16V
DY
1
SPR7
SPRING-18-U
SPR7
SPRING-18-U
12
EC57
SCD1U16V
DY
EC57
SCD1U16V
DY
1
H4
HOLE
H4
HOLE
1
SPR9
SPRING-18-U
SPR9
SPRING-18-U
1
H27
HOLE
H27
HOLE
1
H22
34.40E37.001
H22
34.40E37.001
12
EC88
SCD1U25V3KX
EC88
SCD1U25V3KX
12
EC50
SCD1U16V
EC50
SCD1U16V
12
EC108
SCD1U16V
EC108
SCD1U16V
12
EC122
SCD1U16V
EC122
SCD1U16V
12
EC102
SCD1U25V3KX
EC102
SCD1U25V3KX
12
EC33
SCD1U25V3KX
EC33
SCD1U25V3KX
12
EC153
SCD1U16V
DY
EC153
SCD1U16V
DY
12
EC25
SCD1U16V
DY
EC25
SCD1U16V
DY
12
EC45
SCD1U16V
DY
EC45
SCD1U16V
DY
12
EC165
SCD1U25V3KX
EC165
SCD1U25V3KX
1
H5
HOLE
H5
HOLE
12
EC78
SCD1U16V
EC78
SCD1U16V
1
SPR5
SPRING-18-U
SPR5
SPRING-18-U
12
EC151
SCD1U16V
EC151
SCD1U16V
12
EC34
SCD1U16V
EC34
SCD1U16V
12
EC35
SCD1U16V
EC35
SCD1U16V
1
SPR3
SPRING-9
SPR3
SPRING-9
12
EC70
SCD1U16V
DY
EC70
SCD1U16V
DY
12
EC4
SCD1U25V3KX
EC4
SCD1U25V3KX
12
EC73
SCD1U16V
DY
EC73
SCD1U16V
DY
12
EC24
SCD1U16V
EC24
SCD1U16V
1
H16
HOLE
H16
HOLE
12
EC83
SCD1U16V
EC83
SCD1U16V
12
EC38
SCD1U16V
EC38
SCD1U16V
12
EC140
SCD1U16V
DY
EC140
SCD1U16V
DY
12
EC72
SCD1U16V
DY
EC72
SCD1U16V
DY
12
EC91
SCD1U16V
EC91
SCD1U16V
1
K2
GNDPAD
K2
GNDPAD
12
EC46
SCD1U16V
DY
EC46
SCD1U16V
DY
1
H10
HOLE
H10
HOLE
12
EC37
SCD1U16V
EC37
SCD1U16V
1
SPR11
SPRING-4
SPR11
SPRING-4
1
K6
GNDPAD
K6
GNDPAD
12
EC48
SCD1U16V
EC48
SCD1U16V
12
EC42
SCD1U16V
DY
EC42
SCD1U16V
DY
12
EC145
SCD1U16V
DY
EC145
SCD1U16V
DY
12
EC135
SCD1U16V
EC135
SCD1U16V
12
EC71
SCD1U16V
DY
EC71
SCD1U16V
DY
12
EC68
SCD1U25V3KX
EC68
SCD1U25V3KX
12
EC89
SCD1U25V3KX
EC89
SCD1U25V3KX
12
EC75
SCD1U16V
DY
EC75
SCD1U16V
DY
1
H11
HOLE
H11
HOLE
12
EC22
SCD1U25V3KX
EC22
SCD1U25V3KX
12
EC23
SCD1U16V
EC23
SCD1U16V
12
EC93
SCD1U16V
EC93
SCD1U16V
12
EC36
SCD1U16V
EC36
SCD1U16V
12
EC6
SCD1U25V3KX
EC6
SCD1U25V3KX
12
EC162
SCD1U16V
DY
EC162
SCD1U16V
DY
1
SPR10
SPRING-18-U
SPR10
SPRING-18-U
12
EC76
SCD1U16V
DY
EC76
SCD1U16V
DY
12
EC172
SCD1U16V
EC172
SCD1U16V
12
EC63
SCD1U16V
DY
EC63
SCD1U16V
DY
12
EC15
SCD1U16V
EC15
SCD1U16V
1
H26
HOLE
H26
HOLE
12
EC112
SCD1U16V
EC112
SCD1U16V
12
EC129
SCD1U16V
EC129
SCD1U16V
1
SPR13
SPRING-4
SPR13
SPRING-4
12
EC124
SCD1U16V
EC124
SCD1U16V
12
EC115
SCD1U16V
DY
EC115
SCD1U16V
DY
12
EC69
SCD1U16V
DY
EC69
SCD1U16V
DY
1
H1
HOLE
H1
HOLE
12
EC16
SCD1U25V3KX
EC16
SCD1U25V3KX
1
H19
HOLE
H19
HOLE
12
EC8
SCD1U16V
EC8
SCD1U16V
12
EC26
SCD1U16V
EC26
SCD1U16V
12
EC138
SCD1U16V
EC138
SCD1U16V
1
SPR12
SPRING-4
SPR12
SPRING-4
12
EC43
SCD1U16V
EC43
SCD1U16V
12
EC92
SCD1U25V3KX
EC92
SCD1U25V3KX
12
EC67
SCD1U16V
DY
EC67
SCD1U16V
DY
1
SPR6
SPRING-18-U
SPR6
SPRING-18-U
12
EC65
SCD1U16V
DY
EC65
SCD1U16V
DY
1
H17
HOLE
H17
HOLE
12
EC144
SCD1U16V
DY
EC144
SCD1U16V
DY
1
H9
34.40E37.001
H9
34.40E37.001
12
EC130
SCD1U25V3KX
EC130
SCD1U25V3KX
12
EC125
SCD1U16V
EC125
SCD1U16V
12
EC178
SCD1U16V
EC178
SCD1U16V
12
13 11
147
U49D
TSAHCT86
U49D
TSAHCT86
1
SPR14
SPRING-4
SPR14
SPRING-4
12
EC176
SCD1U16V
EC176
SCD1U16V
12
EC85
SCD1U25V3KX
EC85
SCD1U25V3KX
12
EC137
SCD1U16V
DY
EC137
SCD1U16V
DY
12
EC82
SCD1U16V
DY
EC82
SCD1U16V
DY
12
EC79
SCD1U16V
DY
EC79
SCD1U16V
DY
1
H6
HOLE
H6
HOLE
12
EC81
SCD1U16V
DY
EC81
SCD1U16V
DY
1
H2
HOLE
H2
HOLE
12
EC13
SCD1U25V3KX
EC13
SCD1U25V3KX
12
EC121
SCD1U16V
EC121
SCD1U16V
12
EC90
SCD1U25V3KX
EC90
SCD1U25V3KX
12
EC113
SCD1U16V
EC113
SCD1U16V
12
EC11
SCD1U25V3KX
EC11
SCD1U25V3KX
12
EC147
SCD1U16V
DY
EC147
SCD1U16V
DY
12
EC146
SCD1U16V
DY
EC146
SCD1U16V
DY
1
H7
HOLE
H7
HOLE
12
EC41
SCD1U16V
DY
EC41
SCD1U16V
DY
12
EC40
SCD1U16V
EC40
SCD1U16V
1
H3
HOLE
H3
HOLE
12
EC61
SCD1U16V
DY
EC61
SCD1U16V
DY
12
EC120
SCD1U16V
EC120
SCD1U16V
12
EC86
SCD1U25V3KX
EC86
SCD1U25V3KX
12
EC157
SCD1U16V
DY
EC157
SCD1U16V
DY
12
EC51
SCD1U16V
EC51
SCD1U16V
1
SPR16
SPRING-4
SPR16
SPRING-4
1
K5
GNDPAD
K5
GNDPAD
1
SPR1
SPRING-18-U
SPR1
SPRING-18-U
12
EC62
SCD1U16V
DY
EC62
SCD1U16V
DY
12
EC53
SCD1U16V
DY
EC53
SCD1U16V
DY
1
K1
GNDPAD
K1
GNDPAD
12
EC136
SCD1U16V
EC136
SCD1U16V
12
EC5
SCD1U25V3KX
EC5
SCD1U25V3KX
12
EC9
SCD1U16V
EC9
SCD1U16V
1
SPR15
SPRING-4
SPR15
SPRING-4
12
EC49
SCD1U16V
DY
EC49
SCD1U16V
DY
12
EC150
SCD1U16V
DY
EC150
SCD1U16V
DY
12
EC66
SCD1U16V
DY
EC66
SCD1U16V
DY
12
EC17
SCD1U16V
EC17
SCD1U16V
1
SPR2
SPRING-18-U
SPR2
SPRING-18-U
12
13 11
147
U78D
TSAHCT32
U78D
TSAHCT32
12
EC141
SCD1U16V
EC141
SCD1U16V
12
EC134
SCD1U25V3KX
EC134
SCD1U25V3KX
12
EC142
SCD1U16V
EC142
SCD1U16V
12
EC123
SCD1U16V
EC123
SCD1U16V
12
EC39
SCD1U16V
EC39
SCD1U16V
12
EC12
SCD1U25V3KX
EC12
SCD1U25V3KX
12
EC143
SCD1U16V
DY
EC143
SCD1U16V
DY
12
EC7
SCD1U25V3KX
EC7
SCD1U25V3KX
12
EC87
SCD1U16V
EC87
SCD1U16V
12
EC59
SCD1U16V
DY
EC59
SCD1U16V
DY
1
H14
HOLE
H14
HOLE
12
EC54
SCD1U16V
DY
EC54
SCD1U16V
DY
1
SPR8
SPRING-18-U
SPR8
SPRING-18-U
1
H24
HOLE
H24
HOLE
12
EC114
SCD1U25V3KX
EC114
SCD1U25V3KX
12
EC128
SCD1U16V
EC128
SCD1U16V
12
EC47
SCD1U25V3KX
EC47
SCD1U25V3KX
12
EC107
SCD1U16V
EC107
SCD1U16V
www.s-manuals.com

Navigation menu