Freescale Semiconductor QFM-2202 802.11 b/g/n Wi-Fi module User Manual
Freescale Semiconductor, Inc. 802.11 b/g/n Wi-Fi module
User Manual
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| Document ID | 2595185 |
| Application ID | pwyfoiOkCZH7ZtvcVgiu6w== |
| Document Description | User Manual |
| Short Term Confidential | No |
| Permanent Confidential | No |
| Supercede | Yes |
| Document Type | User Manual |
| Display Format | Adobe Acrobat PDF - pdf |
| Filesize | 139.56kB (1744541 bits) |
| Date Submitted | 2015-04-21 00:00:00 |
| Date Available | 2015-04-21 00:00:00 |
| Creation Date | 2015-03-24 15:10:28 |
| Producing Software | Acrobat Distiller 6.0 (Windows) |
| Document Lastmod | 2015-04-22 17:49:13 |
| Document Title | untitled |
802.11 b/g/n Wi-Fi module User manual Rev0 QFM-2202 Revision history 12/20/2014 1. 2. 3. 4. 5. 6. Initial version Overview Features Hardware specification 3.1 System block diagram 3.2 Module signal description 3.3 Module GPIO pin functions 3.4 Electrical characteristics 3.5 Power up sequence 3.6 Power consumption 3.7 RF characteristics Layout guide Mechanical interface specification Ordering Information 1. Overview In translation 2. Features Operating voltage : 3.3V Operating temperature : 0 - 85 °C CPU Cortex-M4 @ 120MHz o Flash 512KB 128KB o Memory Wi-Fi system o IEEE 802.11b/g/n o Single stream 1x1 o Single-band 2.4GHz o Green Tx power saving mode o Low power listen mode o Data rates up to 150Mbps o Data rates up to 1-52Mbps for 802.11 b/g, data rates up to 150Mbps for 802.11n (MCS0-7). o Networking protocol support : IPv4/IPv6, TCP/UDP, ARP/NDP, DHCPv4, ICMPv6 o Full security support : WPS, WPA, WPA2, WAPI, WEP, TKIP o Each Tx power calibrated Software and stack o Real Time OS : MQX o Architecture of internet software : Alljoyn o iOS homekit frame and MFi supported o Bootloader encrypted with RSA2048/SHA-256 o Update firmware via WiFi or UART o Drivers of interfaces of MCU Suitable integrated development environment o IAR EWARM V7.10 or above o GCC ARM V4.8.4 or above 3. Hardware Specification 3.1 System block diagram VDD_MCU VDD33 24MHz XTAL 40MHz XTAL 4Mb SPI Flash 2 x UART 1 x USB 1 x I2S 2.4G Antenna SPI_BUS 2 x ADC 1 x DAC MK22FN512VMP12 SPI_INT_Wifi PIN 2, 3, 4, 5, 36 Reserved for factory use QCA4002 1 x SPI CHIP_PWD_L_MCU 1 x JTAG nRESET GPIO 1 x JTAG 1 x UART EZP_nCS 1 x I2C1 1 x I2C0 MFi OPTIONAL QFM - 2202 Figure-1 QFM-2202 system block diagram 3.2 Module signal description Figure-2 QFM-2202 top view Figure-3 QFM-2202 pinout top view Signal name GND VDD_MCU VDD33 RSV USB_MCU_DM USB_MCU_DP ADC0_DP0 ADC0_DP3 DAC0_OUT nRESET EZP_nCS ¹ SPI1_EXT_CS0 SPI1_EXT_SIN SPI1_EXT_SOUT SPI1_EXT_CLK JTAG_MCU_TCLK JTAG_MCU_TDI JTAG_MCU_TDO JTAG_MCU_nTRST JTAG_MCU_TMS I2C1_DAT I2C1_CLK I2C0_DAT I2C0_CLK MCU_UART0_RXD MCU_UART0_RTS MCU_UART0_CTS MCU_UART0_TXD MCU_UART1_RXD MCU_UART1_TXD MCU_UART1_CTS MCU_UART1_RTS I2S0_TXD0 I2S0_TX_BCLK I2S0_TX_FS I2S0_RXD0 I2S0_RX_BCLK I2S0_MCLK Table-1 QFM-2202 pin assignment and description Pin Type Description 1, 19, 29, 47 Power Ground 27 Power 3.3V power supply for K22 35 Power 3.3V power supply for QCA4002 2, 3, 4, 5, 36 N/A Reserved for factory use, NC 14 USB FS/LS OTG controller with onchip transceiver. 15 16 AI 16-bit SAR ADCs converting at 1.2 MS/s in 12bit mode. 17 AI 18 AO 12-bit DAC. 28 DI K22 POR reset, active LOW. 23 DI ² EzPort Chip Select DIO ² Peripheral Chip Select DI ² Serial Data In DO ² Serial Data Out DIO ² Serial Clock 10 DI ² JTAG Test Clock / Serial Wire Clock 11 DI ² JTAG Test Data Input 21 DO ² JTAG Test Data Output 22 DI ² JTAG Reset 32 DIO ² JTAG Test Mode Selection / Serial Wire Data 12 DIO ² Bidirectional serial data line of the I2C system 13 DIO ² Bidirectional serial clock line of the I2C system 25 DIO ² Bidirectional serial data line of the I2C system 26 DIO ² Bidirectional serial clock line of the I2C system 20 DI ² Receive data 30 DO ² Request to send 31 DI ² Clear to send 34 DO ² Transmit data 38 DI ² Receive data 40 DO ² Transmit data 41 DI ² Clear to send 42 DO ² Request to send 24 DO ² Transmit Data. The transmit data is generated synchronously by the bit clock and is tristated whenever not transmitting a word. 33 DIO ² Transmit Bit Clock. The bit clock is an input when externally generated and an output when internally generated. 39 DIO ² Transmit Frame Sync. The frame sync is an input sampled synchronously by the bit clock when externally generated and an output generated synchronously by the bit clock when internally generated. 43 DI ² Receive Data. The receive data is sampled synchronously by the bit clock. 44 DIO ² Receive Bit Clock. The bit clock is an input when externally generated and an output when internally generated. 45 DIO ² Audio Master Clock. The master clock is an input when externally generated and an output when I2S0_RX_FS 46 DIO ² MCU_GPIO5 37 DIO ² internally generated. Receive Frame Sync. The frame sync is an input sampled synchronously by the bit clock when externally generated and an output generated synchronously by the bit clock when internally generated. ¹ Minimum 2 bus clock cycles of EZP_nCS=0 after reset will force K22 enter into EZP mode. ² All IOs are with multiplexed functions. See table-2 for details. 3.3 Module GPIO pin functions Signal Pin Default ALT0 EZP_nCS 23 SPI1_EXT_CS0 NMI_b/ EZP_CS_b DISABLED SPI1_EXT_SIN SPI1_EXT_SOUT DISABLED ADC0_SE7b SPI1_EXT_CLK JTAG_MCU_TCLK 10 ADC0_ SE6b JTAG_MCU_TDI 11 JTAG_MCU_TDO 21 JTAG_MCU_nTRST JTAG_MCU_TMS 22 32 I2C1_DAT 12 ADC0_ SE6b JTAG_ TCLK/ SWD_CLK/ EZP_CLK JTAG_TDI/ EZP_DI JTAG_ TDO/ TRACE_SWO/ EZP_DO DISABLED JTAG_ TMS/ SWD_DIO ADC1_ SE4a I2C1_CLK 13 ADC1_ SE5a ADC1_ SE5a I2C0_DAT 25 I2C0_CLK 26 ADC0_SE9/ ADC1_SE9 ADC0_SE8/ ADC1_SE8 MCU_UART0_RXD MCU_UART0_RTS MCU_UART0_CTS MCU_UART0_TXD MCU_UART1_RXD 20 30 31 34 38 ADC0_SE9/ ADC1_SE9 ADC0_SE8/ ADC1_SE8 DISABLED ADC0_ SE12 ADC0_ SE13 DISABLED CMP1_IN1 MCU_UART1_TXD 40 DISABLED MCU_UART1_CTS 41 MCU_UART1_RTS 42 ADC0_SE4b/ CMP1_IN0 ADC0_ SE15 I2S0_TXD0 I2S0_BCLK I2S0_TX_FS I2S0_RXD0 24 33 39 43 DISABLED DISABLED DISABLED DISABLED I2S0_RX_BCLK 44 CMP0_IN0 CMP0_IN0 I2S0_MCLK 45 I2S0_RX_FS MCU_GPIO5 46 37 ADC1_ SE4b/ CMP0_IN2 CMP0_IN1 ADC0_ SE14 ADC1_SE4b/ CMP0_IN2 CMP0_IN1 ADC0_ SE14 ADC0_SE7b ADC1_ SE4a ADC0_ SE12 ADC0_ SE13 CMP1_IN1 ADC0_SE4b/ CMP1_IN0 ADC0_ SE15 Table-2 QFM-2202 GPIO pin functions ALT1 PTA4/ LLWU_P3 PTD4/ LLWU_P14 PTD7 PTD6/ LLWU_P15 PTD5 PTA0 ALT2 ALT3 ALT4 ALT5 ALT6 FTM0_CH1 ALT7 EzPort NMI_b EZP_CS_b SPI0_PCS1 UART0_RTS_b FTM0_CH4 FB_AD2 EWM_IN SPI1_PCS0 SPI0_PCS3 UART0_TX UART0_RX FTM0_CH7 FTM0_CH6 FB_AD0 FTM0_FLT1 FTM0_FLT0 SPI1_SIN SPI1_SOUT SPI0_PCS2 UART0_CTS_b UART0_CTS_b FTM0_CH5 FTM0_CH5 FB_AD1 EWM_OUT_b SPI1_SCK JTAG_TCLK/ SWD_CLK EZP_CLK PTA1 UART0_RX FTM0_CH6 JTAG_TDI EZP_DI PTA2 UART0_TX FTM0_CH7 JTAG_ TDO/ TRACE_SWO EZP_DO PTA5 PTA3 USB_ CLKIN UART0_RTS_b FTM0_CH2 FTM0_CH0 I2S0_TX_BCLK PTE0/ CLKOUT32K PTE1/ LLWU_P0 PTB1 SPI1_PCS1 UART1_TX I2C1_SDA JTAG_TRST_b JTAG_ TMS/ SWD_DIO RTC_CLKOUT SPI1_ SOUT UART1_RX I2C1_SCL SPI1_SIN I2C0_SDA FTM1_CH1 FTM1_QD_PHB PTB0/ LLWU_P5 PTB16 PTB2 PTB3 PTB17 PTC3/ LLWU_P7 PTC4/ LLWU_P8 PTC2 I2C0_SCL FTM1_CH0 FTM1_QD_PHA SPI1_ SOUT I2C0_SCL I2C0_SDA SPI1_SIN SPI0_PCS1 UART0_RX UART0_RTS_b UART0_CTS_b UART0_TX UART1_RX FTM_CLKIN0 FB_AD17 FTM_CLKIN1 FTM0_CH2 SPI0_PCS0 UART1_TX SPI0_PCS2 PTC1/ LLWU_P6 PTA12 PTB18 PTB19 PTC5/ LLWU_P9 PTC6/ LLWU_P10 PTC8 SPI0_PCS3 PTC7 PTC0 SPI0_SIN SPI0_PCS4 FB_AD16 CLKOUT EWM_IN FTM0_ FLT3 FTM0_ FLT0 EWM_OUT_b I2S0_TX_BCLK LPUART0_ RX FTM0_CH3 FB_AD11 CMP1_OUT LPUART0_ TX UART1_CTS_b FTM0_CH1 FB_AD12 I2S0_TX_ FS LPUART0_CTS_b UART1_RTS_b FTM0_CH0 FB_AD13 I2S0_TXD0 LPUART0_RTS_b I2S0_TX_BCLK I2S0_TX_ FS I2S0_RXD0 FB_AD15 FB_OE_b FB_AD10 I2S0_TXD0 FTM2_QD_PHA FTM2_QD_PHB CMP0_OUT FTM1_QD_ PHA SPI0_SCK FTM1_CH0 FTM2_CH0 FTM2_CH1 LPTMR0_ALT2 SPI0_ SOUT PDB0_ EXTRG I2S0_RX_BCLK FB_AD9 I2S0_MCLK FTM3_CH4 I2S0_MCLK FB_AD7 USB_SOF_OUT PDB0_ EXTRG I2S0_RX_ FS USB_SOF_OUT FB_AD8 FB_AD14 3.4 Electrical characteristics 3.4.1 Absolute maximum ratings Table-3 QFM-2202 absolute maximum ratings Symbol Description Min. VDD_MCU MCU Supply Voltage -0.3 VDD33 QCA4002 Supply Voltage -0.3 VDIO Digital Input Voltage -0.3 VAIO Analog ¹ -0.3 ID Maximum current single pin limit (applies to all -25 digital pins) VUSB_DP USB_DP Input Voltage -0.3 VUSB_DM USB_DM Input Voltage -0.3 FTM0_CH2 Max. 3.8 4.0 VDD_MCU + 0.3 VDD_MCU + 0.3 25 Unit mA 3.63 3.63 ¹ Analog pins are defined as pins that do not have an associated general purpose I/O port function. 3.4.2 Recommended operating conditions Table-4 QFM-2202 recommended operating conditions Symbol Description Min. VDD_MCU MCU Supply Voltage 2.7 Max. 3.6 Unit VDD33 TSTG TA QCA4002 Supply Voltage Storage temperature Operating Temperature 3.14 - 40 3.4.3 DC electrical characteristics Table-5 QFM-2202 DC electrical characteristics Symbol Description Min. VIH Input High Voltage 0.7 x VDD_MCU VIL Input Low Voltage — VOH Output high voltage 3.46 135 85 °C °C Max. — 0.35 x VDD_MCU Unit Normal drive pad (IOH = -5mA) VDD_MCU - 0.5 — VDD_MCU - 0.5 — High drive pad (IOH = -20mA) VOL Output low voltage — 0.5 Normal drive pad (IOH = 5mA) — 0.5 High drive pad (IOH = 20mA) IOHT Output high current total for all ports — 100 mA IOLT Output low current total for all ports — 100 mA IIN Input leakage current (per pin) for full temperature range All pins other than high drive port pins — 0.5 uA High drive port pins — 0.5 IIN Input leakage current (total all pins) for full — 1.0 uA temperature range RPU Internal pullup resistors 20 50 kΩ RPD Internal pulldown resistors 20 50 kΩ VHYS Input Hysteresis 0.06 x VDD_MCU — IICIO Analog and I/O pin DC injection current - single pin VIN < VSS - 0.3V (Negative current injection) -3 — mA — +3 VIN > VDD_MCU + 0.3V (Positive current injection) IICcont ¹ Contiguous pin DC injection current —regional limit, includes sum of negative injection currents or sum mA of positive injection currents of 16 contiguous pins -25 — Negative current injection +25 — Positive current injection VODPU Open drain pullup voltage level VDD_MCU VDD_MCU VRAM VDD_mcu voltage required to retain RAM 1.2 — VPOR ² Falling VDD_mcu POR detect voltage 0.8 1.5 ¹ All analog and I/O pins are internally clamped to VSS and VDD_mcu through ESD protection diodes. If VIN is less than VIO_MIN or greater than VIO_MAX, a current limiting resistor is required. The negative DC injection current limiting resistor is calculated as R=(VIO_MIN-VIN)/|IICIO|. The positive injection current limiting resistor is calculated as R=(VINVIO_ MAX)/|IICIO|. Select the larger of these two calculated resistances if the pin is exposed to positive and negative injection currents. ² Typical value is 1.1V. 3.5 Power up sequence Figure-4 QFM-2202 power up sequence 3.6 Power consumption 3.6.1 Operating power consumption Table-6 QFM-2202 operating power consumption Mode Standard Rate Typ Tx 11b 247.6 11 241.2 11g 246.1 54 210.6 11n HT20 MCS0 263.0 MCS7 217.3 11n HT40 MCS0 221.5 MCS7 195.5 Rx All rates 66.7 Unit mA mA 3.6.2 Standby power consumption Table-7 QFM-2202 standby power consumption Mode State Typical current consumption for SPI/UART at 3.3V Standby CHIP_PWD 5uA HOST_OFF 50uA SLEEP 130uA Power Save Mode DTIM period Current Cons. (uA) T1 (ms) T2 (ms) Tbeacon (ms) (2.4G) DTIM 1 1090 2.01 0.36 0.99 (Low Power Listen DTIM 3 473 1.99 0.32 1.06 disabled) ¹ DTIM 5 335 1.99 0.30 1.01 DTIM 10 258 1.97 0.43 0.97 ¹ Numbers are for switch mode. T3 (ms) 0.39 0.41 0.41 0.47 3.7 RF characteristics RF 3.7.1 Wireless LAN radio configuration and general specifications Table-8 Wireless LAN radio configuration and general specifications Item Specification Country/Domain Code ¹ Reserved Center Frequency 11b 2.412-2.472 11g 2.412-2.472 11n HT20 2.412-2.472 11n HT40 2.422-2.452 Rate 11b 1, 2, 5.5, 11 11g 6, 9, 12, 18, 24, 36, 48, 54 11n 1stream MCS0, 1, 2, 3, 4, 5, 6, 7 Modulation type 11b DSSS (CCK, DQPSK, DBPSK) 11g/n OFDM (64QAM, 16QAM, QPSK, BPSK) Unit — GHz GHz GHz GHz Mbps Mbps Mbps — — ¹ This code will be written during calibration. 3.7.2 radio Tx characteristics Symbol Ftx Pout Parameter Tx output frequency range Output power ¹ 11b Table-9 radio Tx characteristics Conditions Min 2.412 — Typ — Max 2.484 Unit GHz 1 Mbps 19 dBm — — 11 Mbps 19 dBm — — 11g 6 Mbps 19 dBm — — 54 Mbps 18 dBm — — 11n HT20 MCS0 20 dBm — — MCS7 17 dBm — — 11n HT40 MCS0 17 dBm — — MCS7 14 dBm — — ¹ Performance calculated at the balun. Loss from balun to antenna connector in the test board is 1.2 dB (2.4GHz). 3.7.3 radio Rx characteristics Symbol Frx Srf Parameter Rx input frequency range Sensitivity ¹ CCK OFDM HT20 Table-10 radio Rx characteristics Conditions Min 2.412 — 1 Mbps 2 Mbps 5.5 Mbps 11 Mbps 6 Mbps 9 Mbps 12 Mbps 18 Mbps 24 Mbps 36 Mbps 48 Mbps 54 Mbps MCS0 MCS1 Typ — Max 2.484 Unit GHz HT40 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7 MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7 ¹ Performance measured at the balun. Loss from balun to antenna connector in the test board is 1.2 dB (2.4GHz). 4. Layout guide 1）The antenna area should be towards outside of base board. The distance from pin1 or pin47 to edge of board should be smaller than 2mm. 2）Red rectangle is the clearance area: on the base board, top and internal layers of the red rectangle should have no shapes or clines; the bottom layer of the red rectangle should have a whole ground shape. Figure-5 QFM-2202 clearance area for base board 5. Mechanical interface specification 5.1 QFM-2202 module dimensions Figure-6 QFM-2202 module dimensions top view Figure-7 QFM-2202 module dimensions bottom view Figure-8 QFM-2202 module dimensions side view (unit: mm) 6. Ordering Information Part number Temperature QFM-2202 0 to 85 °C QFM-2202-A 0 to 85 °C Package MFi & HomeKit Not Available Available This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digi tal device, pursuant to part 15 of the FCC rules. These limits are designed to provide r easonable protection against harmful interference in a residential installation. This equ ipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio co mmunications. However, there is no guarantee that interference will not occur in a par ticular installation. If this equipment does cause harmful interference to radio or televi sion reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measu res: Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the recei ver is connected. Consult the dealer or an experienced radio/TV technician for help. You are cautioned that changes or modifications not expressly approved by the party r esponsible for compliance could void your authority to operate the equipment. FCC RF Radiation Exposure Statement: 1. This Transmitter must not be co located or operating in conjunction with any other antenna or transmitter. 2. This equipment complies with FCC RF radiation exposure limits set forth for an unco ntrolled environment. This equipment should be installed and operated with a minimu m distance of 20 centimeters between the radiator and your body. Information to OEM integrator The OEM integrator has to be aware not to provide information to the end user regard ing how to install or remove this RF module in the user manual of the end product. Th e user manual which is provided by OEM integrators for end users must include the fo llowing information in a prominent location. 1. To comply with FCC RF exposure compliance requirements, the antenna used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co- located or operating in conjunction with any other antenna or transmitter, except in accordance with FCC multitransmitter product transmitter product procedures. 2. Only those antennas with same type and lesser gain filed under this FCC ID number c an be used with this device. 3. The regulatory label on the final system must include the statement: “Contains FCC I D: RUN-QFM2202“. 4. The final system integrator must ensure there is no instruction provided in the user manual or customer documentation indicating how to install or remove the transmitter module except such device has implemented two ways authentication between module and the host system.
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