Fujitsu AD81 00001 14E IC Package A810000114e

User Manual: Fujitsu IC Package Packaging ation - Fujitsu United States

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IC Package

FUJITSU SEMICONDUCTOR LIMITED

Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,
Kohoku-ku Yokohama Kanagawa 222-0033, Japan
Tel: +81-45-415-5858
http://jp.fujitsu.com/fsl/en/
For further information please contact:
North and South America
FUJITSU SEMICONDUCTOR AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://us.fujitsu.com/micro/

Asia Pacific
FUJITSU SEMICONDUCTOR ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/

Europe
FUJITSU SEMICONDUCTOR EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/semiconductor/

FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD.
Rm. 3102, Bund Center, No.222 Yan An Road (E),
Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fss/

Korea
FUJITSU SEMICONDUCTOR KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/

FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fsp/

Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
se
of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does
es
not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
ng
the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
se
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU SEMICONDUCTOR or any
ny
third party or does FUJITSU SEMICONDUCTOR warrant non-infringement of any third-party's intellectual property right or other right
ht
by using such information. FUJITSU SEMICONDUCTOR assumes no liability for any infringement of the intellectual property rights or
other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
ut
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
ed
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
ct
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages
es
arising in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures
es
by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of
overcurrent levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations
ns
of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
© 2002-2011 FUJITSU SEMICONDUCTOR LIMITED Printed in Japan
AD81-00001-14E January, 2011
Edited: Sales Promotion Department

2011.1

FUJITSU SEMICONDUCTOR
S

Providing New Technologies forr the Near Future
Trends in Package Development

Pa
Package
Solutions

Electronic products have been in growing demand, such as personal computers, mobile phones
ology is
and PDAs, and its technology innovation has constantly come along. The IC technology
supporting customers to meet market demands today and in the future.
ogy. The
Packaging solutions enable to reduce size and space requirements as a key technology.
d Array)
packages such as CSP (Chip Size Package or Chip Scale Package) and BGA (Ball Grid
have supported high-density wiring technology and widely used in the market.
eve the
Miniaturization forced the use of new approaches in die packaging in order to achieve
hed the
smallest possible solutions. Leading the van of CSP, Fujitsu Semiconductor has launched
mass-production packages of SON which was impressed as the world's smallest level.
Fujitsu Semiconductor has a mass-production lineup of super compact packages such ass FBGA
ckages,
(Fine Pitch BGA) and WL-CSP (Wafer Level CSP) and beyond. The high pin count packages,
PBGA (Plastic BGA) and TEBGA (Thermal Enhanced BGA) have been mass-produced in order
to fulfill the size and weight limitations, for example portable equipment.

Fujitsu Semiconductor offers a wide range of packages
opt
to optimize
applications in a way most suited for
custom
customers'
requirements.

Digital AV
- High density, high function, high performance -

Package on Package
Module Package
(Passive in PKG)

Mobile
Supe compact, light, thin - Super
TEBGA
3D-Chip stack
P
System in Package

TEQFP

WL-CSP

QFN
Q

1980s

1990s

2000s

2010s

CSP

KGD

Module

Miniaturization

Ultra thin technology

DIP
FBGA
SOJ

Fine-pitch technology

FD-FBGA

WL-CSP

Key technologies

Bare Die
EWLP

TSOP SSOP

Cutting-edge technologies
Lower cost by integrated design
Environmental considerations

Bump technology

SiP
CSOP SON

Fine wiring

Key technologies

CoC technology

BCC
e
Embedded Die
Stacked-FBGA

QFP

SQFP

LQFP
PoP

Enhanced BGA

PGA

BGA

COC

3D CHIP Stacked
ked
gy)
(TSV Technology)

High-speed
BGA/FBGA

FDH-BGA

High Performance

FC-BGA
TAB-BGA

H-SiP

TEBGA
FC-BGA

EBGA

2

Design technology

3D Package
e

High-speed

High-end
hig speed, high efficiency heat dissipation - Ultra high

QFP

Automotive
- High reliability, high heat resistance -

3

IC Package

Package Line-up
Package

Surface mount

Flat type

Multi-pin
QFP,PBGA,TEBGA,FC-BGA
Thin and compact
TSSOP,LQFP,TEQFP,SON,QFN,
FBGA,WL-CSP
High efficiency heat dissipation and
large chip support
HQFP,TEQFP,PBGA,TEBGA,
FC-BGA

Leadless chip
carrier

Dual lead

SOP
TSSOP

Quad lead

QFP
LQFP
TEQFP
HQFP

Dual lead
Quad lead

SON
QFN

SOP (Small Outline L-Leaded Package)
TSSOP (Thin Shrink Small Outline Package)
■ Features
● Superior cost performance with a mature technology.
● High reliability in mounting the package on printed circuit boards.
● Thin and compact.

■ SOP and TSSOP Package external view

FBGA
PBGA
TEBGA
FC-BGA
WL-CSP

Matrix type

High speed
FC-BGA

SOP

Package Overview

■ SOP and TSSOP Package cross section
Pin count

I/O
frequency
(GHz)

Heat
resistance
ja(ºC /W)
(0m/s)

FC-CBGA

450~2116

~5

7~

FC-PBGA
(AlSiC-LID)

450~2116

~2.5

7~

450~1156

~2.5

9~

Package
type

Package structure

TSSOP

Mold Resin

Application

LSI Chip

Wire
Solder Plating

Lead

High-end FC-PBGA
(Cu-LID)
TEBGA

PBGA

FBGA

Consumer
appliances

4

256~1156

256~1156

66~906

~1.6

~1.6

~1

13~

Routers, Servers,
Workstations,
Backbone transmission devices
Adhesive

Stage

■ SOP and TSSOP Package line-up
Routers,
Personal computers,
Graphics, Digital TVs,
Set top boxes,
Printers

Package size (mm)
Package type

SOP

15~

17~60

Personal computers,
Mobile phones,
Digital video cameras,
Digital still cameras, PDAs

SON
QFN

6~68

~1.5

20~40

Mobile phones,
Digital video cameras,
Digital still cameras, PDAs

WL-CSP

42~309

~2.5

25~60

Mobile phones,
Digital video cameras,
Digital still cameras, PDAs

QFP
LQFP

48~304

~2.5

15~100

Personal computers,
Digital TV, Set top boxes,
Printers

TEQFP

48~256

~2.5

15~35

Personal computers,
Digital TV, Set top boxes

TSSOP

Pin count
Mounting height (mm)

Pin pitch
1.27mm

Pin pitch
0.65mm

Pin pitch
0.50mm

X

Y

5.3

5.24

2.10 Max.

8

－

－

7.5

12.7

2.65 Max.

20

－

－

4.4

3.1

－

8

－

4.4

4.96

－

14/16

－

4.4

6.5

－

20

24

4.4

7.8

－

24

30

4.4

9.7

－

28

－

1.20 Max.

Please contact us for information on other packages.

5

IC Package

QFP (Quad Flat Package)
LQFP (Low Profile Quad Flat Package)
TEQFP (Thermally Enhanced QFP)
HQFP (QFP with Heat Sink)

SON
QFN

(Small Outline Non-leaded Package)
(Quad Flat Non-Leaded Package)

■ Features

■ Features
● Equipped with outer leads at the four corners of the package.
● Superior cost performance with a mature technology.
● High reliability in mounting the package on printed circuit boards.
● TEQFP and HQFP can be mounted with a chip with high heat emission because of their high efficiency in

● Thin and compact.
● Better cost performance compared to BGA.

■ Package external view

heat dissipation.

■ QFP Package external view

SON

LQFP

Mold Resin

LSI Chip

■ TEQFP Package cross section
Mold Resin

Wire

Lead

■ Package cross section

TEQFP

■ QFP and LQFP Package cross section

LSI Chip

LSI Chip

Mold Resin

Solder Plating
No Plating

Adhesive

Stage

Stage

■ QFP Packages line-up
Package size (mm)

QFP

LQFP
TEQFP

X

Y

14.0

20.0

28.0

28.0

Pin count
Pin pitch
0.50mm

Pin pitch
0.40mm

－

－
－
256

3.35 Max.

Pin pitch
0.65mm
100

3.95 Max.

－

208

－

－

4.03 Max.

No Plating

X

Y

1.80

2.85

2.0

2.0

3.0

3.0

Mounting height (mm)

0.80 Max.

Pin count
Pin pitch 0.65mm

Pin pitch 0.50mm

Pin pitch 0.40mm

6

－

－

－

8

－

－

10

－

■ QFN Package line-up

32.0

32.0

－

240

7.0

7.0

－

48

－
64

X

Y

Pin pitch 0.65mm

Pin pitch 0.50mm

Pin pitch 0.40mm

10.0

10.0

52

64

－

2.5

3.5

12.0

64

80

－

24

12.0

－

－

14.0

14.0

3.0

－

16

20

－

100

3.0

－

16.0

16.0

－

120

144

4.0

4.0

16

16/20/24

28

20.0

20.0

－

144

－

5.0

5.0

－

28/32

40

24.0

24.0

－

176

216

6.0

6.0

－

40

48

7.0

7.0

－

48

56

－

8.0

8.0

－

－

68

256

9.0

－

64

－

－

－
240

9.0

－

304

－

28.0

HQFP

Mounting height (mm)

Adhesive

Stage

■ SON Package line-up

Adhesive

Package size (mm)

Package type

Wire

Wire

Lead

Solder Plating

QFN

1.70 Max.

28.0

28.0

28.0

32.0

32.0

40.0

40.0

－

3.95 Max.
4.03 Max.
4.10 Max.

－
－

208
208

256

296

Package size (mm)

Mounting height (mm)

0.80 Max.

Pin count

Please contact us for information on other packages.

Please contact us for information on other packages.

6

7

IC Package

■ FBGA Package line-up

FBGA

Pin pitch : 0.50mm (500pin or more)

(Fine pitch Ball Grid Array)

Pin count
Package code

■ Features
Low profile and multi-pin support, suitable for portable devices such as mobile phones and DSCs.
● Fine pitch (pin pitch from 0.4mm) and thin.
● Superior electrical characteristics and reliability.
● Plentiful line-up and customization support.

■ FBGA Package external view

Package size (mm)

Total

number of TBs*
included

X

Y

Pin arrangement

BGA-506P-Mxx

506

81

14.0

14.0

3 + (1) + 2 rows

BGA-562P-M03

562

81

14.0

14.0

3 + (1) + 3 rows

BGA-586P-Mxx

586

121

15.0

15.0

3 + (1) + 2 rows

BGA-586P-M04

586

49

15.0

15.0

4 + (1) + 2 rows

BGA-610P-M01

610

121

16.0

16.0

3 + (2) + 2 rows

BGA-650P-M03

650

169

15.0

15.0

5 rows

BGA-753P-Mxx

753

169

18.0

18.0

3 + (1) + 2 rows

BGA-770P-M01

770

121

16.0

16.0

4 + (1) + 3 rows

BGA-842P-Mxx

842

169

18.0

18.0

3 + (1) + 2 rows

BGA-906P-Mxx

906

169

18.0

18.0

3 + (1) + 2 + (1) + 2 rows

*TB : Thermal Ball
Pin pitch : 0.65mm
Pin count
Package code

■ FBGA Package cross section
Mold Resin

LSI Chip

Wire

Package size (mm)
Pin arrangement

Total

number of TBs*
included

X

Y

BGA-176P-M05

176

0

11.0

11.0

4 rows

BGA-204P-M01

204

0

11.0

11.0

3 + (1) + 2 rows

BGA-240P-M07

240

0

13.0

13.0

4 rows

BGA-252P-M01

252

0

13.0

13.0

5 rows (With nonexistent pins)

BGA-280P-M03

280

0

13.0

13.0

5 rows

BGA-360P-M05

441

81

16.0

16.0

5 rows

BGA-385P-M04

385

25

16.0

16.0

5 rows

*TB : Thermal Ball
Pin pitch : 0.80mm
PCB

Adhesive

Pin count

Solder Ball

Package code

■ FBGA Package line-up

Pin pitch : 0.50mm (Less than 500pin)
Package code
BGA-66P-M01
BGA-82P-M01
BGA-96P-M04
BGA-100P-M03
BGA-112P-M05
BGA-130P-M02
BGA-144P-M09
BGA-168P-M03
BGA-208P-M01
BGA-232P-M01
BGA-240P-M02
BGA-240P-M03
BGA-289P-M01
BGA-304P-M05
BGA-304P-M07
BGA-337P-M02
BGA-345P-Mxx
BGA-385P-M01
BGA-385P-M02
BGA-385P-M03
BGA-400P-M04

Total
66
82
96
100
112
130
144
168
208
232
289
240
289
304
304
428
345
434
385
385
481

Pin count
number of TBs*
included
9
9
0
0
0
9
0
25
0
0
49
0
25
0
0
81
25
49
81
81
81

Package size (mm)
X

Y

5.0
6.0
6.0
7.0
7.0
7.0
7.0
9.0
9.0
12.0
10.0
10.0
10.0
13.0
12.0
13.0
12.0
13.0
13.0
12.0
15.0

5.0
6.0
6.0
7.0
7.0
7.0
7.0
9.0
9.0
12.0
10.0
10.0
10.0
13.0
12.0
13.0
12.0
13.0
13.0
12.0
15.0

Pin arrangement
2 rows
2 rows
3 rows
2 + (1) + 1 rows
3 rows (With nonexistent pins)
3 rows
4 rows
3 rows (With nonexistent pins)
4 rows
2 + (1) + 2 rows
4 rows
4 rows
3 + (1) + 2 rows
2 + (1) + 2 rows
4 rows
4 rows
2 + (1) + 2 + (1) + 1 rows
3 + (1) + 2 rows
2 + (2) + 2 rows
4 rows
4 rows

Package size (mm)
Pin arrangement

Total

number of TBs*
included

X

Y

BGA-112P-M04

112

0

10.0

10.0

BGA-144P-M06

144

0

12.0

12.0

4 rows

BGA-144P-M07

144

0

12.0

12.0

4 rows (With nonexistent pins)

BGA-176P-M04

176

0

12.0

12.0

5 rows (With nonexistent pins)

BGA-188P-M01

188

0

15.0

15.0

4 rows (With nonexistent pins)

BGA-192P-M06

192

－

12.0

12.0

Full Matrix (With nonexistent pins)

BGA-224P-M06

224

0

16.0

16.0

4 rows

BGA-224P-M08

260

36

16.0

16.0

4 rows

BGA-224P-M09

288

64

16.0

16.0

4 rows

BGA-240P-M06

240

0

15.0

15.0

5 rows

BGA-256P-M17

256

49

18.0

18.0

2 + (1) + 2 rows

BGA-272P-M06

321

49

18.0

18.0

4 rows

BGA-272P-M08

272

0

18.0

18.0

4 rows

BGA-320P-M05

369

49

18.0

18.0

5 rows

BGA-441P-M01

441

－

18.0

18.0

Full Matrix

Please contact us for information on other pin arrangements.

4 rows

*TB : Thermal Ball

*TB : Thermal Ball

8

9

IC Package

■ CSP Road map
2009

2010

2011

Miniaturization (WL-CSP)
0.3mmt / 0.3mm
Pitch

0.35mmt / 0.4mm
Pitch

Much thinner
package
and finer pitch
WL-CSP

Finer pitch and thinner package
Much thinner
package

1.0mmt

0.8mmt / 0.4mm
Pitch

Package stack
(Thin PoP/FC)

FBGA

On-chip passive
components mixture On-chip passive
(WLP)
components (FC)

2014

Modularization
(Embedded
technology)

Next development
in modules

PBGA
(Plastic Ball Grid Array)
■ Features
● Sealed with plastic resin to achieve high cost performance.
● Superior support for multi-pin.
● Package sizes at 27mmSQ, 31mmSQ, and 35mmSQ are available.

■ PBGA Package external view

Chip embedded
board
(Passive/Active
components)

Chip embedded
board PoP
(Passive/Active
components)

Modularization
On-chip passive
components (Wire)

2013

3D chip stack
(TSV technology)

■ PBGA Package cross section
3D Chip Stack
(Logic/Memory)

Mold Resin

Higher density/Higher function
Package stack (PoP)

Chip stack

FBGA with low
thermal resistance

Package stack
(PoP/WB)

Chip on Chip
(Micro-bump)

FCB

Modularization

Passive components (L,C)
embedded
EMI measure (shield case)

MCP

2011
Modularization

Passive components (L,C)
embedded
EMI measure (Mold shield)

10

2012
Embedding in board

Passive components (L,C)
embedded in board
EMI measure (Mold shield)

Modularization

Modularization

Embedding in board

Passive components (L,C)
embedded

Passive components (L,C)
embedded
EMI measure (Mold shield)

Passive components (L,C)
embedded in board
EMI measure (Mold shield)

COC+Modularization

COC+Embedding in board

Passive components (L,C)
embedded
EMI measure (Mold shield)

PCB

Chip on Chip
(TSV technology)

■ Module package road map
2010

Wire

3D Chip Stack
(Memory)

Fujitsu Semiconductor will provide the most suitable SiP to the customer's requirements with our extensive implementation technologies.
Please contact us for any requests.

2009

LSI Chip

Passive components (L,C)
embedded in board
EMI measure (Mold shield)

Adhesive

Solder Ball

■ PBGA Package line-up
Pin count

Package size (mm)
Pin arrangement

Pin pitch
(mm)

17.0

Full Matrix

1.00

27.0

4 rows

1.27

27.0

27.0

4 rows

1.27

－

19.0

19.0

Full Matrix (With nonexistent pins)

1.00

353

49

31.0

31.0

4 rows

1.27

BGA-416P-M05

416

64

27.0

27.0

4 rows

1.00

BGA-416P-M09

416

64

35.0

35.0

4 rows

1.27

BGA-480P-M14

480

64

27.0

27.0

5 rows

1.00

BGA-484P-M07

484

64

27.0

27.0

5 rows

1.00

BGA-484P-M11

484

64

35.0

35.0

5 rows

1.27
1.00

Package code

Total

number of
TBs* included

X

Y

BGA-256P-M24

256

－

17.0

BGA-256P-M27

256

0

27.0

BGA-320P-M06

320

64

BGA-321P-M02

321

BGA-353P-M02

BGA-493P-M01

493

64

27.0

27.0

3 + (2) + 3 rows
(With nonexistent pins)

BGA-496P-M02

496

144

27.0

27.0

4 rows

1.00

BGA-544P-M04

544

64

27.0

27.0

6 rows

1.00

BGA-564P-M01

564

64

31.0

31.0

5 rows

1.00

BGA-676P-M06

676

－

27.0

27.0

Full Matrix

1.00

BGA-676P-M14

676

100

35.0

35.0

5 rows

1.00

BGA-868P-M03

868

196

35.0

35.0

6 rows

1.00

BGA-900P-M14

900

－

31.0

31.0

Full Matrix

1.00

Please contact us for information on other pin arrangements.

*TB : Thermal Ball

11

IC Package

TEBGA

FC-BGA

(Thermally Enhanced Ball Grid Array)

(Flip Chip Ball Grid Array)

■ Features

■ Features
Superior electrical and thermal performance thanks to the flip chip bonding technology.
Wide support from consumer to high-end applications including servers.

● Superior thermal characteristics.
● Superior support for multi-pin.
● Package sizes at 27mmSQ and 35mmSQ are available.

● Support for ultra multi-pin by arranging the chip electrode over an area.
● Good dissipation of heat produced from the high electric consumption chip by deployment of a heat spreader.
● Capable of reduction of waveform distortion and high speed transmission (GHz level) for high frequencies.
● Fully customizable according to the customer's requirements.

■ TEBGA Package external view

■ FC-BGA Package external view

■ TEBGA Package cross section
Mold Resin

LSI Chip

Heat Spreader

Wire

■ FC-PBGA Package cross section

PCB

Area Bump

Solder Ball

Adhesive

Adhesive Paste

TIM

LSI Chip

Capacitor

■ FC-CBGA Package cross section

Capacitor

Cu-LID

Area Bump

TIM

LSI Chip

AlSiC-LID
Adhesive

Adhesive

■ TEBGA Package line-up
Pin count
Package code

Package size (mm)

Pin pitch
(mm)

27.0

4 rows

1.27

27.0

4 rows

1.00

35.0

35.0

4 rows

1.27

Total

X

Y

BGA-320P-Mxx

320

64

27.0

BGA-416P-Mxx

416

64

27.0

BGA-416P-M06

416

64

Build-up PCB

Solder Ball

Encapsulation

Glass Ceramic

Encapsulation

Solder Ball

■ FC-BGA Package line-up
FC-PBGA

BGA-480P-Mxx

480

64

27.0

27.0

5 rows

1.00

BGA-484P-M09

484

64

27.0

27.0

5 rows

1.00

BGA-484P-M08

484

64

35.0

35.0

5 rows

1.27

BGA-520P-Mxx

520

100

35.0

35.0

5 rows

1.27

BGA-543P-M01

543

64

27.0

27.0

6 rows

1.00

BGA592

BGA-544P-M02

544

64

27.0

27.0

6 rows

1.00

BGA-676P-M10

676

－

27.0

27.0

Full Matrix

1.00

BGA-676P-M12

676

100

35.0

35.0

5 rows

1.00

BGA-770P-Mxx

772

100

35.0

35.0

6 rows

1.00

BGA-808P-M01

808

144

35.0

35.0

5+2 rows
(With nonexistent pins)

BGA-868P-M01

868

196

35.0

35.0

6 rows

Ball matrix

Pin pitch (mm)

23.0

Full Matrix

22 × 22

1.00

21.0

21.0

Full Matrix
(With nonexistent pins)

25 × 25

0.80

BGA625

17.0

17.0

Full Matrix

25 × 25

0.65

BGA625

27.0

27.0

Full Matrix

25 × 25

1.00

BGA729

29.0

29.0

Full Matrix

27 × 27

1.00

BGA900

31.0

31.0

Full Matrix

30 × 30

1.00

1.00

BGA1020

33.0

33.0

Full Matrix

32 × 32

1.00

1.00

BGA1156

35.0

35.0

Full Matrix

34 × 34

1.00

36 × 36

1.00

BGA-900P-M08

900

144

35.0

35.0

7 rows

1.00

1156

－

35.0

35.0

Full Matrix

1.00

*TB : Thermal Ball

Pin count

Package size (mm)

Pin arrangement

BGA-1156P-M11

Please contact us for information on other pin arrangements.

12

Pin arrangement

number of
TBs* included

BGA484

X

Y

23.0

BGA1206

37.5

37.5

Full Matrix
(With nonexistent pins)

BGA1396

37.5

37.5

Full Matrix

37 × 37

1.00

BGA1681

42.5

42.5

Full Matrix

41 × 41

1.00

13

IC Package

FC-CBGA
Package size (mm)

Pin count

Pin arrangement

Ball matrix

Pin pitch (mm)

27.0

Full Matrix

25 × 25

1.00

33.0

33.0

Full Matrix

25 × 25

1.27

35.0

35.0

Full Matrix

27 × 27

1.27

BGA900

31.0

31.0

Full Matrix

30 × 30

1.00

BGA900

40.0

40.0

Full Matrix

30 × 30

1.27

BGA1089

42.5

42.5

Full Matrix

33 × 33

1.27

BGA1156

35.0

35.0

Full Matrix

34 × 34

1.00

BGA1225

45.0

45.0

Full Matrix

35 × 35

1.27

BGA1369

37.5

37.5

Full Matrix

37 × 37

1.00

BGA1681

42.5

42.5

Full Matrix

41 × 41

1.00

BGA2116

47.5

47.5

Full Matrix

46 × 46

1.00

X

Y

BGA625

27.0

BGA625
BGA729

Please contact us for information on other pin arrangements.

WL-CSP
(Wafer Level CSP)
■ Features
Ultra compact, ultra thin, multi-pin, and superior humidity and reflow resistance by wafer consistent
assembly.
Also called as "Super CSP."
● Ultra compact, ultra thin, and light weight suitable for mobile devices and digital electric household appliances.
● JEDEC Moisture Sensitivity Level 1 clear.
● Support for pin pitch at less than or equal to 0.5mm contributing towards multi-pin.
● High speed transmission by reducing the wire length.
● Compliant with JEITA standards and fully customizable according to customer needs.

■ WL-CSP External view

■ Middle to High-end package road map

High-end package
6W
FC-PBGA

■ WL-CSP Processes
Ext. HS

5W

WL-CSP(Wafer Level CSP) Process
RDL Forming/
Encapsulation

TEBGA

4W

Wafer Process

Middle-range package

PBGA

Dicing

■ WL-CSP Package cross section

POP (FC) w/ HS

TEQFP

Wafer Level Packaging

Al-pad

Polyimide

COC

Chip

POP (FC)

3W

Encapsulant
Metal Post Cu

Stack
LQFP

Side by Side

2008

2009

2010

2011

2012

Solder Ball

Redistribution Line Cu

2013

Fujitsu Semiconductor will provide the most suitable SiP to the customer's requirements with our extensive implementation technologies.
Please contact us for any requests.

14

15

IC Package

■ Mass-production actual performance
WL-CSP

WLP112

WLP309

WLP15

WLP42

WLP70-02

WLP143

Wafer Size

200 mm

200 mm

200 mm

300 mm

300 mm

300 mm

Package Size

6.46 × 6.46 mm

7.56 × 7.56 mm

1.77 × 1.77 mm

3.30 × 2.95 mm

3.408 × 4.486 mm

7.81 × 6.10 mm

Package Height

0.6 mm Max

0.8 mm Max

0.64 mm Max

0.50 mm Max

0.35 mm Max

0.55 mm Max

Chip Thickness

390μm TYP

520μm TYP

390μm TYP

300μm TYP

220μm TYP

350μm TYP

Encapsulant
Thickness

50μm TYP

50μm TYP

50μm TYP

50μm TYP

50μm TYP

50μm TYP

Ball Pitch

0.5 mm

0.4 mm

0.4 mm

0.4 mm

0.4 mm

0.5 mm

Ball Height

110μm TYP

150μm TYP

150μm TYP

100μm TYP

100μm TYP

100μm TYP

■ Technology road map

WL-CSP Structure

RDL Technology

Others

2010

2011

Height（Min）

0.25 mm

←

←

Ball/Land pitch（Min）

0.3 mm

←

0.25 mm

Ball/Land dia.（Min）

0.15 mm

←

0.13 mm

Line/Space

20μm / 15μm

←

15μm / 15μm

Via/Land Pitch（Inline）

50μm

←

40 μm

Wafer size

6 / 8 / 12 inch

←

←

90μm

←

←

90μm（≦ 0.35-t）

←

←

100μm（＞ 0.35-t）

←

←

Solder

Pb Free

←

←

Mold resin

Halogen free

←

←

Scribe Width
（Min）
6/8in
12in

2012

Bump on Pad
■ Features
Wafer process and bumping in consolidated assembly.
● Technology supporting wide range of products from low-end applications such as mobile devices and digital

electric household appliances to high-end applications such as servers.

● Promote multi-pin with min. 50μm AL pad pitch.
● Able to form wiring layer under a bump on demand.

■ Bump External view

■ Manufacturing process
(1) UBM Sputtering
Polyimide

UBM

(5) Resist removing

(2) Resist Patterning

(3) UBM Plating

Resist

UBM (Plating)

(6) UBM etching

(4) Bump Plating
SnAg(Plating)

(7) Bump shaping

■ Bump Cross section

SnAg (Lead Free)

Polyimide

Passivation

Si
Al Pad
UBM (under barrier metal)

16

17

IC Package

■ Typical specification

■ Main package (Full scale: Size comparison)

(a)

Bump pitch

176μm

(b)

Bump height

85μm

(c)

UBM size

80μm (typical)

(d)

Passivation opening size

50μm (typical)

(e)

Bump material

SnAg (or PbSn)

(f)

Chip thickness
(the thinnest case)

200μm

(e) Solder Bump

(b)

[Notation example]
625 㧦Pin count
(17˜17) 㧦Package size (unit:mm)

(a)

FC-BGA 450pin ~ 2116pin
(d)
(c)

(f)

࡮0.65mm Pitch

࡮1.00mm Pitch

■ Micro bump chip specification (example)
50μm

(a)

Bump pitch

(b)

Bump height

18μm

(c)

UBM size

32μm (typical)

(d)

Passivation opening size

17μm (typical)

(e)

Bump material

SnAg

(f)

Chip thickness
(the thinnest case)

150μm

(a)

(e) Solder Bump
625
(17˜17)

(b)
(d)
(c)

(f)

1156
(35˜35)

1681
(42.5˜42.5)

PBGA 256pin ~ 1156pin
࡮1.00mm Pitch

■ Mass-production actual performance
Wafer bumping

A

B

C

Purpose

High-end video

1seg tuner

Image processing

Wafer size

300 mm

300 mm

300 mm

Chip size

9.52 × 14.44 mm

2.90 × 2.90 mm

5.10 × 4.50 mm

UBM size

0.080 mm

0.080 mm

0.200 mm

Bump height

0.085 mm

0.085 mm

0.100 mm

Bump pitch

0.176 mm

0.250 mm

0.400 mm

Chip thickness

0.550 mm

0.185 mm

0.450 mm

Bump material

SnAg

SnAg

SnAg

484
(27˜27)

676
(27˜27)

564
(31˜31)

1156
(35˜35)

FBGA 66pin ~ 906pin

࡮1.27mm Pitch

࡮0.50mm Pitch

■ Technology road map
2009

2010

Standard bump

Pitch 150µm(Min)
UBM 85µm(Max)
Height 80µm(Max)

Micro bump

Pitch 50µm(Min)
UBM 30µm(Min)
Height 18µm(Max)

320
(27˜27)

2012

Pitch 130µm
UBM 85µm
Height 80µm

Pitch 100µm
UBM 70µm
Height 70µm

484
(35˜35)

L&S 20/20µm(Min)
UBM 200µm(Max)
Height 100µm(Max)

࡮0.40mm Pitch

࡮0.65mm Pitch

176
(11˜11)
256
(28˜28)

385
(16˜16)

࡮0.80mm Pitch

100
(14˜20)
L&S 10/15µm
UBM 200µm
Height 100µm

112
(10˜10)

LQFP/TEQFP 48pin ~ 256pin
࡮0.50mm Pitch

240
(15˜15)

48
(7˜7)

320
(18˜18)

QFN 16pin ~ 64pin
࡮0.40mm Pitch

18

753
(18˜18)

࡮0.65mm Pitch

Pitch 40/30µm
UBM 20µm
Height 18µm

L&S 15/20µm
UBM 200µm
Height 100µm

385
(12˜12)

QFP 100pin ~ 256pin

UBM 200µm(Max)
Height 100µm(Max)

Bump package

Re-distribution
layer bump

2011

96
(6˜6)

100
(14˜14)

144
(20˜20)

࡮0.50mm Pitch

208
(28˜28)
20
(3˜3)

56
(7˜7)

32
(5˜5)

64
(9˜9)

19



---

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