HARRIS TR-0017-E Sitepro Base Station User Manual

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Maintenance ManualLBI-38641FVHF RECEIVER SYNTHESIZER MODULE19D902781G1 & G2DESCRIPTIONThe Receiver Synthesizer Module provides the localoscillator signal (LO) to the Receiver Front End Moduleof the MASTR III base station. The module also providesthe reference oscillator signal to the transmitter synthe-sizer. Receiver Synthesizer Module 19D902781G1(Group 1) generates an output injection signal in the 157to 172 MHz range, and 19D902781G2 (Group 2) gener-ates a signal in the 129 to 152 MHz Range.The Receiver Synthesizer Module is a phase-lockedloop (PLL) design, as shown in the block diagram (Figure1). Its output is generated directly by the VCO Q1 andbuffered by Monolithic Microwave Integrated Circuits(MMIC) U1 and U3.The logic signals from controller (U10, 12, and 13)determine the synthesizer frequency. Frequency stabilityis maintained by either using the internal reference oscil-lator Y1 or by applying a high precision reference signalto the EXT Reference Oscillator Port J4. The internalreference oscillator is a temperature controlled crystaloscillator (TCXO) operating at 12.8 MHz. The oscillatorhas a stability of ±1.5 ppm over the temperature range of-30°C to +75°C. See the table containing General Speci-fications for the minimum external oscillator specifica-tions.The buffered VCO output is sampled by the resistivesplitter and conditioned by buffer amplifier U2. It is thenfed to the divide by 64/65 dual modulus prescaler U5. Thedivided output from the prescaler is connected to the Fininput of the PLL U6. Within the PLL the divided VCOinput signal Fin is divided again. The PLL also dividesdown the 12.8 MHz reference signal. Three inputs fromthe controller; ENABLE, CLOCK, and serial DATA pro-gram the PLL divider circuits.TABLE OF CONTENTSPageDESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Front CoverGENERAL SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1CIRCUIT ANALYSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2VOLTAGE CONTROLLED OSCILLATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2BUFFER AMPLIFIERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2REFERENCE OSCILLATOR AND BUFFER . . . . . . . . . . . . . . . . . . . . . . . . . . . 2PRESCALER AND SYNTHESIZER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2LOOP FILTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2DIGITAL CONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2VOLTAGE REGULATORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3TEST AND ALIGNMENT PROCEDURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3TROUBLESHOOTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3ASSEMBLY DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4OUTLINE DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5SCHEMATIC DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6PARTS LIST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12PRODUCTION CHANGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13IC DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13M/A-COM Wireless Systems3315 Old Forest RoadLynchburg, Virginia 24501(Outside USA, 434-385-2400) Toll Free 800-528-7711www.macom-wireless.com Printed in U.S.A.
The divided reference signal and the divided VCO signalare compared in the PLL phase detector. When the referenceand VCO signals are identical the PLL phase detector generatesa constant DC output voltage. This voltage is buffered by U8and filtered by the loop filter circuit. It is then applied to Q1setting the VCO on frequency.If the compared frequencies (phases) differ, an error voltageis generated which adjusts the VCO frequency. During thisout-of-lock condition, the PLL also sends a Lock Detect signal(LD) to the controller and lights the FAULT LED on the frontpanel of the module.CIRCUIT ANALYSISThe Receiver Synthesizer Module consists of the follow-ing circuits:•Voltage Controlled Oscillator•Buffer Amplifiers•Reference Oscillator and Buffer•Prescaler and Synthesizer•Loop Filter•Digital Control•Voltage RegulatorsVOLTAGE CONTROLLED OSCILLATORThe free running Voltage Controlled Oscillator (VCO) iscomposed of a grounded-gate JFET (Q1) and associatedcircuitry. Inductor L10 and associated capacitors form theresonant tank circuit. The circuit’s use of high-Q componentsminimizes phase noise.Frequency tuning of the VCO is done by changing theDC output voltage level from the loop filter U14. The LoopFilter Out signal from U14 is routed through L4 and R3 andapplied to the two varicap diodes D4 and D5. The voltagelevel applied determines the diodes’ capacitance and sets theresonant frequency of the oscillator. If the VCO drifts or thefrequency is changed, the DC voltage level changes causingthe VCO’s resonant frequency to change. The output of theoscillator is then applied to a buffer amplifier. Course adjust-ment of frequency is done by adjusting trimmer capacitorC52 while applying a calibration voltage to the V_TUNEline connected to U14.4-11.BUFFER AMPLIFIERSThe MMIC Buffer Amplifier stage is composed of threeMMICs (U1, U2, and U3) and a resistive splitter. The ampli-fiers serve two purposes; amplifying the local oscillatorsignal (LO OUTPUT) for injection into the Receiver FrontEnd assembly and providing a feedback signal to the synthe-sizer Phase-Locked Loop (PLL).Copyright© 1992-2002, M/A-COM Private Radio Systems, Inc. All rights reserved.TABLE 1 - GENERAL SPECIFICATIONSITEM SPECIFICATIONFREQUENCY TUNINGOutput Injection Signal INJECTION FREQ. FREQ. BAND157.4 MHz - 172.2 MHz (G1) 136 MHz - 150.8 MHz129.4 MHz - 152.6 MHz (G2) 150.8 MHz - 174 MHzElectricalFull SpecificationsDegraded SpecificationsChannel Spacing2 MHz3 MHz5 kHzFREQUENCY STABILITY ±1.5 ppmLO POWER OUTPUT 1.5 dBm ±1.5 dBmLO NOMINAL IMPEDANCE 50 OhmsPHASE NOISE@ 25 kHz Offset@ 30 kHz Offset -142 dBc/Hz-147 dBc/HzHUM AND NOISECompanion Receiver -60 dBHARMONICS @ LO PORT <-30 dBcSWITCHING SPEED < 50 msCURRENT DRAIN+13.8V+12V<200 mA<50 mAREFERENCE OSCILLATORFrequency OutputPower OutputImpedance12.8 MHz ±1.5 ppm0 dBm ±1.5 dBm50 ohmsEXT. REFERENCE OSCILLATORFrequency OutputPower OutputImpedance5.00 MHz to 17.925 MHz (must be divisible by thechannel spacing)10 dBm ±3 dBm into 50 ohms50 ohmsFigure 1 - Receiver Synthesizer Block DiagramLBI-38641F1
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Document ID311104
Application ID075vpy9BfOZpg8rQ7aTVIQ==
Document DescriptionRX Synth
Short Term ConfidentialNo
Permanent ConfidentialNo
SupercedeNo
Document TypeUser Manual
Display FormatAdobe Acrobat PDF - pdf
Filesize37.85kB (473126 bits)
Date Submitted2003-03-18 00:00:00
Date Available2003-03-07 00:00:00
Creation Date2002-03-06 13:39:31
Producing SoftwareAcrobat Distiller 4.05 for Windows
Document Lastmod2003-03-03 18:11:02
Document TitleLBI-38641F, VHF RECEIVER SYNTHESIZER MODULE, 19D902781G1 & G2
Document Author: M/A-COM Private Radio Systems, Inc.
FCC ID Filing: OWDTR-0017-E

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