Ingenu NODE103 Wireless Network Module User Manual DRAFT NODE103 Integration SpecificationJune24
On-Ramp Wireless Wireless Network Module DRAFT NODE103 Integration SpecificationJune24
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| Date Submitted | 2016-06-30 00:00:00 |
| Date Available | 2016-06-30 00:00:00 |
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| Document Title | DRAFT_NODE103_Integration_SpecificationJune24 |
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nanoNode!Integration! Specification! Preliminary& Ingenu&Confidential&and&Proprietary.&This!document!is!not!to!be!used,!disclosed,!or!distributed!to!anyone!without! express!written!consent!from!Ingenu.!The!recipient!of!this!document!shall!respect!the!security!of!this!document! and! maintain! the! confidentiality! of! the! information! it! contains.! The! master! copy! of! this! document! is! stored! in! electronic! format,! therefore! any! hard! or! soft! copy! used! for! distribution! purposes! must! be! considered! as! uncontrolled.!Reference!should!be!made!to!Ingenu.!to!obtain!the!latest!revision.& ! Ingenu! 10301!Meanley!Drive! San!Diego,!CA!92131! U.S.A.! Copyright!©!2016!OnLRamp!Wireless,!Inc.! All!Rights!Reserved.! The!information!disclosed!in!this!document!is!proprietary!to!OnLRamp!Wireless,!Inc.!(owned!by!Ingenu)!and!is!not! to! be! used! or! disclosed! to! unauthorized! persons! without! the! written! consent! of! Ingenu! The! recipient! of! this! document! shall! respect! the! security! of! this! document! and! maintain! the! confidentiality! of! the! information! it! contains.!The!master!copy!of!this!document!is!stored!in!electronic!format,!therefore!any!hard!or!soft!copy!used!for! distribution!purposes!must!be!considered!as!uncontrolled.!!Reference!should!be!made!to!Ingenu!to!obtain!the!latest! version.!By!accepting!this!material!the!recipient!agrees!that!this!material!and!the!information!contained!therein!is! to!be!held!in!confidence!and!in!trust!and!will!not!be!used,!copied,!reproduced!in!whole!or!in!part,!nor!its!contents! revealed!in!any!manner!to!others!without!the!express!written!permission!of!Ingenu.! Ingenu!reserves!the!right!to!make!changes!to!the!product(s)!or!information!contained!herein!without!notice.!No! liability! is! assumed! for! any! damages! arising! directly! or! indirectly! by! their! use! or! application.! The! information! provided!in!this!document!is!provided!on!an!“as!is”!basis.!! This!document!contains!OnLRamp!Wireless,!Inc.!and!Ingenu!proprietary!information!and!must!be!shredded!when! discarded.! This!documentation!and!the!software!described!in!it!are!copyrighted!with!all!rights!reserved.!This!documentation! and!the!software!may!not!be!copied,!except!as!otherwise!provided!in!your!software!license!or!as!expressly!permitted! in!writing!by!Ingenu.! Any! sample! code! herein! is! provided! for! your! convenience! and! has! not! been! tested! or! designed! to! work! on! any! particular!system!configuration.!It!is!provided!“AS!IS”!and!your!use!of!this!sample!code,!whether!as!provided!or!with! any!modification,!is!at!your!own!risk.!OnLRamp!Wireless,!Inc.!and!Ingenu!undertake!no!liability!or!responsibility!with! respect!to!the!sample!code,!and!disclaim!all!warranties,!express!and!implied,!including!without!limitation!warranties! on!merchantability,!fitness!for!a!specified!purpose,!and!infringement.!Ingenu!reserves!all!rights!in!the!sample!code,! and!permits!use!of!this!sample!code!only!for!educational!and!reference!purposes.! This!technology!and!technical!data!may!be!subject!to!U.S.!and!international!export,!reLexport!or!transfer!(“export”)! laws.!Diversion!contrary!to!U.S.!and!international!law!is!strictly!prohibited.! RPMA®!(Random!Phase!Multiple!Access)!is!a!registered!trademark!of!OnLRamp!Wireless,!Inc.!(owned!by!Ingenu).! Other!product!and!brand!names!may!be!trademarks!or!registered!trademarks!of!their!respective!owners.! nanoNode!Integration!Specification!L!Preliminary! 014L0065L00!Rev.!X3! June!24,!2016!! ! Contents! 1&Overview&....................................................................................................................&1! 1.1!RPMA™!Network!...........................................................................................................!1! 1.2!nanoNode!......................................................................................................................!1! 1.3!References/Tools!............................................................................................................!3! 2&DC&and&AC&Characteristics&...........................................................................................&4! 2.1!Absolute!Maximum!Ratings!...........................................................................................!4! 2.2!Recommended!Operating!Conditions!...........................................................................!4! 2.3!Effects!of!Temperature!and!Voltage!...............................................................................!7! 3&Electrical&Interface&.....................................................................................................&9! 3.1!Signal!Descriptions!.......................................................................................................!11! 3.1.1!GND!....................................................................................................................!11! 3.1.2!VBATT!.................................................................................................................!11! 3.1.3!3V3!......................................................................................................................!11! 3.1.4!ON_OFF!..............................................................................................................!12! 3.1.5!MRQ!....................................................................................................................!12! 3.1.6!SRDY!...................................................................................................................!12! 3.1.7!SRQ!.....................................................................................................................!12! 3.1.8!SPI!System!..........................................................................................................!12! 3.1.9!TOUT!..................................................................................................................!13! 3.1.10!RF_TXENA!.........................................................................................................!13! 3.1.11!RF_SHDN!...........................................................................................................!13! 3.1.12!RF1!and!RF2!.......................................................................................................!13! 3.1.13!TIME_QUAL!.......................................................................................................!13! 3.2!Environmental!..............................................................................................................!13! 3.2.1!ESD!.....................................................................................................................!13! 3.2.2!Harsh!Environments!............................................................................................!14! 4&Applications&.............................................................................................................&15! 4.1!Powered!Operating!Mode!............................................................................................!15! 4.2!Battery!Operated!Mode!...............................................................................................!15! 4.2.1!Sleep!Mode!Assumptions!....................................................................................!16! 4.2.2!Active!Mode!........................................................................................................!16! 5&SPI&Interface&and&Sequences&......................................................................................&18! 5.1!SPI!System!Interface!Overview!.....................................................................................!18! 5.2!SPI!Mode!and!Timing!...................................................................................................!19! iii! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Contents! 5.3!Host!Initialization!.........................................................................................................!19! 5.4!Startup!(Power!On)!Sequence!......................................................................................!19! 5.5!Wake!Sequence!............................................................................................................!21! 5.5.1!Wake!Sequence!(Synchronous)!...........................................................................!21! 5.5.2!Wake!Sequence!(Asynchronous)!........................................................................!22! 5.6!HostLDriven!Reset!Sequence!........................................................................................!23! 5.7!Host!MRQ!Release/nanoNode!Allowed!to!Sleep!Sequence!..........................................!24! 6&Power&States&............................................................................................................&25! 6.1!Operating!States!..........................................................................................................!25! 6.1.1!Power!Off!State!...................................................................................................!25! 6.1.2!Deep!Sleep!State!................................................................................................!26! 6.1.3!Oscillator!Calibration!State!.................................................................................!26! 6.1.4!Idle!State!.............................................................................................................!27! 6.1.5!RX!State!..............................................................................................................!27! 6.1.6!TX!State!..............................................................................................................!27! 6.2!System!.........................................................................................................................!27! 7&SPI&Messaging&Protocol&.............................................................................................&29! 7.1!Arbitration!...................................................................................................................!29! 7.2!Message!Protocol!........................................................................................................!29! 7.3!Host!Interface!SPI!Bus!State!Machine!...........................................................................!32! 7.4!SPI!Bus!Timing!Example!...............................................................................................!33! 7.5!Host!Message!SPI!Example!...........................................................................................!34! 7.6!Host!Message!“Connect”!SPI!Example!..........................................................................!36! 8&nanoNode&Provisioning&.............................................................................................&39! 9&Antenna&Diversity&.....................................................................................................&40! 9.1!Antenna!Design!Considerations!..................................................................................!40! 9.2!Diversity!Considerations!..............................................................................................!41! 10&Regulatory&Considerations&.......................................................................................&42! 10.1!Block!Diagram!...........................................................................................................!42! 10.2!Antennas!....................................................................................................................!43! 10.2.1!Host!Antenna!Trace!Design!..............................................................................!44! 10.2.2!Controlled!Impedance!Trace!Design!.................................................................!44! 10.3!Certifications!.............................................................................................................!46! 10.4!FCC!Warnings!.............................................................................................................!47! 10.5!ISED!Warnings!...........................................................................................................!48! 10.6!ETSI!Warnings!...........................................................................................................!49! 10.7!Usage!........................................................................................................................!49! iv! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Contents! 10.7.1!Product!Labels!..................................................................................................!49! 10.7.2!RF!Exposure!Statement!.....................................................................................!50! 10.8!WEEE!Directive!..........................................................................................................!50! 10.9!REACH!Directive!........................................................................................................!50! 10.10!RoHS!Directive!.........................................................................................................!50! 10.11!Export!Compliance!....................................................................................................!50! 11&Manufacturing&Considerations&.................................................................................&51! 11.1!Mechanical!Outline!.....................................................................................................!51! 11.2!Host!PCB!Constraints!..................................................................................................!51! 11.3!Handling!Procedures!for!nanoNode!............................................................................!51! 12&Errata&.....................................................................................................................&52! Appendix&A&Abbreviations&and&Terms&...........................................................................&53! Appendix&B&PCB&Land&Pattern&and&Keepouts&.................................................................&56! Appendix&C&nanoNode/microNode&Pin&Comparison&.......................................................&58! Appendix&D&REACH&and&RoHS&Compliance&....................................................................&62! Appendix&E&RMA&Process&.............................................................................................&63! Appendix&F&Application&Diagrams/Schematics&...............................................................&64! Appendix&G&nanoNode&Mechanical&Drawing&..................................................................&66! Figures! Figure!1.!RPMA™!Network!...........................................................................................!1! Figure!2.!nanoNode!(Top!and!Bottom!Views)!................................................................!2! Figure!3.!Typical!Application!Diagram!...........................................................................!2! Figure!4.!Sleep!Current!(μA)!vs!Temperature!(°C)!at!3.3V!Input!......................................!7! Figure!5.!Idle!Current!(mA)!vs!Temperature!(°C)!at!3.3V!Input!.......................................!8! Figure!6.!Max!Rx!Gain!Current!(mA)!vs!Temperature!(°C)!at!3.3V!Input!.........................!8! Figure!7.!Max!Tx!(23.3!dBm)!Current!(mA)!vs!Temperature!(°C)!at!3.3V!Input!................!8! Figure!8.!SPI!Timing,!CPOL!=!0,!CPHA!=!0!...................................................................!19! Figure!9.!nanoNode!PowerLup!Timing!Sequence!........................................................!20! Figure!10.!HostLInitiated!nanoNode!Wake!Sequence!–!SRDY!Low!(Synchronous)!........!21! Figure!11.!HostLInitiated!nanoNode!Wake!Sequence!–!SRDY!High!(Asynchronous)!.....!22! v! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Contents! Figure!12.!HostLDriven!Reset!Sequence!.......................................................................!23! Figure!13.!Host!MRQ!Release/nanoNode!Allowed!to!Sleep!Sequence!.........................!24! Figure!14.!nanoNode!Oscillator!Calibration:!Current!(Amps)!vs!Time!(Seconds)!..........!26! Figure!15.!Representative!Current!Consumption!During!Deep!Sleep,!Idle,!RX,!and!TX;! x16!Spreading!Factor!............................................................................................!28! Figure!16.!SPI!Master!and!Slave!Message!Sequences!...................................................!31! Figure!17.!Host!Interface!SPI!Bus!State!Machine!..........................................................!32! Figure!18.!SPI!Timing!Example!.....................................................................................!33! Figure!19.!Host!Message!on!SPI!–!MMsg!Pair!..............................................................!34! Figure!20.!Host!Message!on!SPI!–!MHdr!Pair!................................................................!35! Figure!21.!Antenna!Diversity!with!Ethertronics!...........................................................!40! Figure!22.!Controlled!Impedance!RF!Trace!Design!......................................................!45! Figure!23.!nanoNode!Block!Diagram!...........................................................................!43! Figure!24.!Product!Label!–!Tyler?!................................................................................!49! Figure!25.!nanoNode!PCB!Land!Pattern!......................................................................!56! Figure!26.!nanoNode!PCB!Land!Pattern!Keepouts!.......................................................!57! Figure!27.!Powered!Example!.......................................................................................!64! Figure!28.!Lithium!Battery!Example!............................................................................!65! Figure!29.!nanoNode!Mechanical!Dimensions!.............................................................!66! Tables! Table!1.!nanoNode!Specifications!.................................................................................!2! Table!2.!Absolute!Maximum!Ratings!.............................................................................!4! Table!3.!Operating!Conditions!.......................................................................................!4! Table!4.!Operating!Characteristics!................................................................................!4! Table!5.!nanoNode!Pin!Descriptions!..............................................................................!9! Table!6.!ESD!Information!.............................................................................................!13! Table!7.!nanoNode:!EMC!Certified!Antennas!...............................................................!43! Table!8.!nanoNode!Certifications!................................................................................!46! Table!9.!nanoNode!Minimum/Maximum!Channel!Frequencies!for!Annex!C.1! Applications!..........................................................................................................!47! Table!10.!ECCN!and!CCATS!Information!.....................................................................!50! Table!11.!nanoNode/microNode!Pin!Comparison!........................................................!58! vi! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Contents! vii! 014L0065L00!Rev.!X3! ! Revision!History! Revision! Release!Date! Change!Description! X1$ May$11,$2016$$ Initial$release.$ X2$ June$3,$2016$ !$ X3$ June$6,$2016$ !$ Updated:$ "$ Address$ "$ WAKE$definition$ "$ Block$diagram$ "$ Antenna$design$ Clarified$various$other$areas$of$the$document.$ !$ IC$to$ISED$and$other$minor$regulatory$changes.$ viii! 014L0065L00!Rev.!X3! ! 1$Overview! This!document!provides!a!brief!overview!of!the!RPMA™!Network!as!well!as!guidelines!allowing! an!integrator!to!design!a!Host!product!that!utilizes!the!nanoNode!and!ensures!that!the!system! meets!all!of!its!technical!objectives!and!requirements.! 1.1$RPMA™!Network! Ingenu!has!developed!RPMA,!a!wireless!technology!providing!the!world’s!best!coverage,! capacity,!long!life,!and!interoperability!for!IOT!devices.!The!RPMA!Network!is!comprised!of! Nodes!(end!points!with!RF!Modems)!and!Access!Points!(APs).!The!nanoNode!is!one!variant!of! the!Nodes!offered!by!Ingenu.!The!nanoNode!is!designed!to!easily!integrate,!with!the!addition! of!an!applications!processor,!with!any!sensor,!enabling!robust!wireless!communication!with!any! AP.!An!AP!typically!provides!coverage!to!up!to!64K!nodes!with!a!footprint!!of!50L300!sqmi!(75L 450!sqkm).!!Ingenu!is!aggressively!deploying!the!Machine!Network!™,!providing!nationwide! coverage!in!the!US.!A!number!of!operators!have!licensed!RPMA!for!global!deployments!(over! 50!countries!at!the!time!of!this!writing).!A!nanoNode!comes!from!the!factory!enabled!to!join! any!available!network,!worldwide.! Gateway.AP Protocol Back% Office% Software Gateway.AP Protocol WAN Access%Point Airlink Gateway Node SPI%Interface%to%Master Node (SPI% Slave) Power%Management%and%Other%Software Sensor% Device (SPI.Master) MAC/PHY Custom%Hardware%(Baseband%&%RF) 7.wire%SPI% Interface Figure&1.&RPMA™&Network& 1.2$nanoNode! The!nanoNode!is!a!small!form!factor!wireless!network!module!that!easily!integrates!with!a! microcontroller!or!applications!processor!using!a!Serial!Peripheral!Interface!(SPI).!!The!top!side! of!the!printed!circuit!board!(PCB)!is!enclosed!with!a!radio!frequency!(RF)!shield.!The!nanoNode! 1! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Overview! is!an!LGALstyle!module!designed!to!be!soldered!directly!onto!a!host!board!via!SMT!processes.! For!details,!see!Appendix!B:!PCB!Land!Pattern!and!Keepouts.! Table&1.&nanoNode&Specifications& nanoNode&(PN&550Z0083Z00)& Dimensions!(per!unit)! 33.02!mm!!x!!22.86!mm! 1.3!inches!x!0.9!inches! Weight!(per!unit)! 5.36!grams!(0!.190!ounces)! Transmit!Power! +23.3!dBm!(maximum)! RX!Sensitivity! L133!dBm!(nominal)! For!more!mechanical!details!about!the!nanoNode,!refer!to!the!mechanical!drawing!in!Appendix! G:!nanoNode!Mechanical!Drawing.!!To!order,!use!the!part!numbers!provided!above.! Figure&2.&nanoNode&(Top&and&Bottom&Views)& The!following!figure!shows!how!a!nanoNode!interfaces!with!a!Host!application,!running!on!an! applications!processor.! Host Node Sensor,or,Meter,Reading,or, Location,Tracking,Application Host,Interface Host,Interface,Protocol, Application MAC RF PHY SPI,Slave,Driver SPI,Master,Driver Figure&3.&Typical&Application&Diagram& 2! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Overview! 1.3$References/Tools! The!following!documents!are!referenced!and!provide!more!detail.! !$ EMC&Compliance&Guide&(010Z0037Z00)& Provides!information!for!“driving”!the!Node!through!various!modes!in!order!to!perform! regulatory!tests!for!FCC!and!ETSI.!! NOTE:! The!nanoNode!is!FCC!modular!certified.!Many!device!partners!have!only!been!able! to!do!a!paper!filing,!rather!than!full!compliance!testing.! !$ ATE&Transmit&Test&Mode&Guide&(010Z0089Z00)& This!guide!provides!commands!for!integrators!to!factory!test!the!device’s!transmitter!and! antenna!ports.! !$ Provisioning&Guide&(010Z0074Z00)!! Describes!the!function!and!use!of!the!software!packages!used!to!configure!a!node!for!a!! target!network.!!Note:!in!the!near!future!the!provisioning!step!will!not!be!required!for!global! and!US!public!networks.! !$ rACM&Developer&Guide&(010Z0105Z00)! Describes!the!necessary!steps!to!build,!download,!and!test!the!reference!Application! Communication!Module!(rACM)!software.!It!is!used!by!external!partners!in!the! development!of!a!sensor!application!on!the!reference!host!platform!using!RPMA™! technology.!!The!rACM!software!serves!as!a!design!template!and!is!optimized!for!very!low! power!usage!applications!and!batteryLpowered!systems.!! !$ Host&Common&Software&Integration&Application&Note&(010Z0024Z00)& Describes!the!software!interfaces!and!implementation!considerations!regarding!the!Host! Common!software!component!–!a!library!of!portable!C!code!which!facilitates!all! interactions!between!a!host!applications!and!an!RPMA™!Network!Node.!!Device!partners!! compile!in!the!Host!Common!library!on!their!apps!processor.!It!abstracts!and!handles!all! HostLtoLNode!communications.! !$ rACM! The!rACM!is!Ingenu’s!evaluation!platform!for!the!following!types!of!Nodes:! "$ rACM2!(550L0095L00)!for!nanoNode! "$ !rACM1!(550L0038L00)!for!microNode! "$ !rCAM1!(550L0038L00)!for!dNode! The!rACM!platforms!provide!documentation,!software,!and!ready:made!binaries!for!the! Node!family!of!modems.!! !$ Application&Note:&Ethertronics&1001013&Antenna&(010Z0139Z00)& Provides!guidelines!for!design!and!layout!for!the!Ethertronics!1001013!FR4Lbased!surface! mount!antenna.& 3! 014L0065L00!Rev.!X3! ! 2$DC!and!AC!Characteristics! 2.1$Absolute!Maximum!Ratings! Operating!outside!of!these!ranges!may!damage!the!unit.! The!nanoNode!is!MSL!3Lrated!and!should!be!handled!as!an!MSL!3!device!per!IPC/JEDEC!JLSTDL 033!(latest!revision).!See!section!11.3!for!further!information.! Table&2.&Absolute&Maximum&Ratings& Parameter& Min& Max& Unit& Storage!Temperature! L40! 85! ⁰C! Operating!Temperature! L40! 85! ⁰C! Vbatt!Input!Voltage! 2.2! 6.0! V! 3.3V!Supply! 3.1! 3.5! V! Digital!Interface!Signals,!3.3V!nominal! 3.0! 3.6! V! 2.2$Recommended!Operating!Conditions! Table&3.&Operating&Conditions& Parameter& Min& Max& Unit& Input!voltage,!VBATT! 2.2! 5.5! V! 3.3V!Input! 3.2! 3.4! V! Ambient!Temperature,!Ta! L40! 85! ⁰C! The!following!characteristics!apply!across!the!L40°C!to!+85°C!temperature!range!unless! otherwise!noted.! Table&4.&Operating&Characteristics& Description& Min& Typ& Max& Units& Voltage!–!Vbatt! 2.2! 3.3! 5.5! Volt! Off!Current!–!Note!1! 0.05! 0.1! 2.0! µA! Deep!Sleep!Current!L!Note!1! 10! 15! 30! µA! Idle!Current!–!Note!1! 10! 15! 22! mA! Receive!Current!–!Note!1! 75! 85! 90! mA! nanoNode:!Transmit!Current!–!Note!2! 200! 245! 300! mA! DC&Characteristics! 4! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Description& DC!and!AC!Characteristics! Min& Typ& Max& Units& VOL!–!Voltage!Output,!Low!(4mA!sink)! 0! 0.4! V! VOH!–!Voltage!Output!High!(4mA!source)!! 2.4! 3.3! V! SPI!Clock!–!Note!11! 0.1! 8.6! MHz! Operating!Temperature! L40! +85! °C! Storage!Temp! L40! +85! °C! Humidity!–!nonLcondensing! 5! 95! %! Ramp!Temperature!(maximum!rate!at!which!operating! temperature!should!change)! 30! °C/Hr.! MTBF!(nanoNode)!! 6.4! MHrs! Receiver!Sensitivity!–!Note!3! L130! L133! L135! dBm! Receiver!Image!Reject! 38! 45! 50! dB! Noise!Figure!! 3.5! 4.8! 5.5! dB! Input!IP3!(high!LNA!gain!mode)! L11! dBm! Maximum!RF!input!level!for!specification!compliance! L20! dBm! Frequency!Range!–!Note!4! 2402! ~2482! MHz! Channel!Spacing!! N/A! 1.99! N/A! MHz! Maximum!RF!Conducted!Power!–Note!5! FCC/IC!markets:! ETSI!markets:! 8.5! 23.3! 9.5! 10.0! dBm! dBm! Carrier!Rejection! L35! L40! L50! dBc! Signal!Modulation!! DSSSL! DBPSK! Signal!Bandwidth! 1.0! MHz! BT!Factor! 0.3! Peak!to!Average!Ratio! 2.3! dB! Spectral!bandwidth!at!maximum!RF!power:! L6dB!BW! L20dB!BW! 0.96! 1.75! MHz! MHz! ACPR!–!Note!6! L30! dBc! Harmonics!–!Note!7! L43! dBm! Transmit!Power!Level!Accuracy!–!Note!8! ±1.5! dB! Digital! Environmental! Receiver! General&RF&Characteristics! Transmitter! 5! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! DC!and!AC!Characteristics! Description& Min& Typ& Max& Units& Transmitter!Spurious!Outputs!–!Note!9! !!!!30MHz!to!2400MHz:! !!!!2482MHz!to!8000MHz:! 1000V)! MM! Class!A!(>100V)! RF!pins!have!inherent!ESD!robustness!due!to!the!RF!antenna!cross!switch!and!survive!the!1!kV! HBM!test.!!With!a!shunt!27!nH!inductor!at!the!RF!pin,!the!pin!can!survive!direct!8!kV!ESD!strikes.! If!the!application!is!intended!for!harsh!ESD!or!lightning!strike!scenarios!it!is!recommended!that! the!Integrator!take!extra!precautions!to!guard!against!accidental!resets!or!ESD!damage.! 13! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Electrical!Interface! 3.2.2$Harsh!Environments! The!nanoNode!employs!miniature!surfaceLmounted!components!in!its!assembly.!If!the!target! design!is!intended!for!high!humidity!or!salt!environments!and!intended!to!have!a!long!service! life,!it!is!recommended!that!the!designer!take!necessary!precautions!to!guard!against! prolonged!exposure!to!moisture!and!other!contaminants.!A!sealed!enclosure!(IP67!or!IP68)!or! potting!may!be!required!in!extreme!environments.!!!!! 14! 014L0065L00!Rev.!X3! ! 4$Applications! This!chapter!describes!two!major!methods!of!implementing!the!nanoNode:!Powered!and! battery!operated!modes.! 1.! Powered&Operating&Mode& “Powered”!refers!to!the!Host!board!and!its!power!supply.!Specifically,!it!refers!to!a!good! solid,!consistent!power!supply!–!such!as!an!AC!powered!source.!In!this!type!of!usage!case,! the!Host!can!potentially!supply!a!good!clean!3.3!V!rail!(pin!4)!without!regard!to!extreme! detail!of!optimizing!power!consumption.! 2.! Battery&Operated&Mode& This!mode!refers!to!a!battery!operated!device!in!which!extreme!care!and!attention!is! applied!to!reducing!overall!power!consumption.!All!details!and!all!modes!of!power! consumption!are!considered!and!optimized.! 4.1$Powered!Operating!Mode! In!this!scenario,!the!Host!and!Node’s!power!consumption!is!not!really!a!consideration.!In!this! case,!the!Host!can!take!an!input!Voltage!and!convert!to!a!100%!duty!!3.3!V!supply.!This!would! be!applied!to:! !$ Host!CPU! VBATT!of!nanoNode! !$ 3V3!of!nanoNode! !$ In!this!case,!the!node!will!internally!turn!the!3.3!V!rail!ON/OFF!as!it!is!required.!The!Node! attempts!!to!gate!this!internal!supply!OFF!to!conserve!power,!when!it!can.!The!HW!status!of!the! 3.3V!supply!is!the!WAKE!signal!(3.3V!=!“ON”!if!WAKE!is!High).!When!the!3.3V!is!internally!gated! off,!the!Node!consumes!virtually!no!power!on!that!supply.! However,!the!Host!CPU!is!always!powered!by!3.3!V!–!the!operating!level!of!the!HostLnanoNode! SPI!interface.!The!nanoNode!requires!a!full!3.3!V!during!SPI!transfers.!For!a!wired!example!of! the!Powered!circuitry,!refer!to!Figure!27.!Powered!Example.! 4.2$Battery!Operated!Mode! Battery!operating!mode!offers!a!much!more!challenging!design!constraint.!The!goal!is!to! reduce!current!consumption!where!possible.!To!this!conservation!goal,!see!Figure!28.!Lithium! Battery!Example.! The!assumption!in!this!design!goal!is!to!use!a!long!life!battery!such!as!Lithium!battery/cell.! These!primary!cells!offer:! !$ !$ Extreme!low!selfLdischarge! Long!life! 15! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! !$ Applications! Wide!operating!temperatures! "$ High!capacity! "$ 2.2!V!–!3.6!V!direct!voltage!over!the!operating!temperature!and!discharge! characteristics!of!the!cell! In!this!case,!assume!that:! !$ The!VBATT!pin!of!the!Node!is!connected!directly!to!the!cell!(2.2!V!–!3.6!V).! !$ The!3V3!signal!of!the!Node!is!connected!directly!to!the!3.3!V!regulator.!The!regulator!is! turned!ON/OFF!depending!on!the!state!of!the!WAKE!pin!of!the!Node.! !$ The!CPU!uses!an!indirect!path!through!a!dual!Schottky!diode!to!permit!seamless! switching/transition!from!battery!voltage!to!3.3!V.! !$ Most!modern!CPUs!used!for!this!type!of!application!have!the!following!characteristics:! "$ Operate!at!1.8!V!–!3.6!V!! "$ Low!sleep!current!(1!–!2!μA!with!full!SRAM!retention!for!fast!wakeup)! "$ Pins!that!use!interrupts!to!wake!the!processor!from!deep!sleep! The!following!sections!describe!the!major!operating!states!and!power!supply!modes.! 4.2.1$Sleep!Mode!Assumptions! 1.$ The!Node!is!powered!“on”!(ON_OFF!=!high).! 2.$ The!Node!is!in!sleep!mode!when!in!the!WAKE!state!(WAKE!=!low).!! 3.$ The!Node!is!consuming!minimal!current!through!its!VBATT!pin.!! 4.$ 3V3!is!off!and!is!not!required!by!the!Host!or!Node.! 5.$ The!Host!CPU!can!run!off!the!“natural!voltage”!of!the!cell!only!drawing!microAmps!!of! current.! 4.2.2$Active!Mode! When!the!Node!awakens!(WAKE!=!high)!and!the!3.3!V!power!supply!is!turned!“on”:! !$ !$ !$ The!Node!uses!the!supplied!3.3!V!as!required.! The!voltage!of!the!CPU!ramps!to!the!higher!of!the!following:!!cell!voltage!!or!3.3!V!supply.! The!3.3!V!on!the!Host!and!the!Node!permits!the!Node!to!fully!function!on!the!RPMA! network!and!also!allows!HostLNode!SPI!communications.! A!Texas!Instruments!TPS63000!3.3!V!buck/boost!regulator!(or!equivalent)!is!recommended!for! nanoNode!applications.!This!has!some!unique!benefits:! !$ When!in!high!efficiency!mode!(PS/SYNC!=!low),!the!regulator!outputs!a!loose!3.3!V!with!! +/L100!mV!ripple.!In!this!mode,!its!quiescent!current!is!only!50!μA.! !$ When!in!low!efficiency!(but!“clean”!output)!mode!(PS/SYNC!=!high),!the!regulator!is!within! +/L20!mV!ripple!but!consumes!a!0.6!mA!quiescent!current.! These!operating!modes!align!well!with!the!Node’s!operating!modes!as!defined!by!the! RF_SHDN!pin:! 16! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! !$ !$ Applications! When!tight!regulation!(low!ripple)!is!required!by!the!RF!of!the!Node:! "$ RF_SHDN!=!high! "$ PS/SYNC!=!high! When!the!Node!does!not!need!tight!regulation!and!is!in!a!moderately!low!power!mode,! RF_SHDN!is!low!(and!PS/SYNC!is!low).! Other!design!considerations!for!optimal!low!power!are!as!follows:! 1.$ Reduce!capacitance!in!the!3.3V!domain.!Extra!capacitors!require!charging!each!time!the!3.3! V!is!on.! 2.$ Ensure!all!software!and!CPU!configurations!set!CPU!pins!to!low!power!states.! 3.$ Use!high!value!resistors!such!as!1!M!or!greater!for!pullLups/pullLdowns!where!possible.!!! 17! 014L0065L00!Rev.!X3! ! 5$SPI!Interface!and!Sequences! 5.1$SPI!System!Interface!Overview! The!SPI!slave!interface!is!currently!the!only!supported!interface!for!HostLtoLNode! communication.!The!SPI!System!interface!is!controlled/handled!by!the!Host!Common!Library,! compiled!onto!the!user’s!apps!processor.!The!following!section!(all!of!section!5)!is!informational! only.! NOTE:! The!nanoNode!must!be!the!only!SPI!slave!on!the!bus.!! The!SPI!slave!interface!provides!communication!with!an!external!Host!through!a!7Lwire!interface.! The!Host!is!the!SPI!master!and!the!nanoNode!is!the!SPI!slave.!In!addition!to!the!four!standard!SPI! signals,!three!additional!signals!are!used!to!complement!the!SPI!bus:!MRQ,!SRQ,!and!SRDY.!The! additional!signals!are!included!to!support!nanoNode!state!transitions!and!biLdirectional!message! traffic.! The!SPI!signals!include!four!that!are!controlled!by!the!master!and!three!that!are!controlled!by!the! slave.! MasterZcontrolled&Signals&(Host)& SlaveZcontrolled&Signals&(nanoNode)& !$ MOSI! !$ MISO! !$ SCLK! !$ SRQ! !$ CS! !$ SRDY! !$ MRQ! When!MRQ!and!SRQ!are!low,!the!remaining!Master!controlled!signals!(MOSI,!SCLK,!and!CS)! must!be!held!low!or!triLstated.!This!is!to!prevent!these!signals!from!backLdriving!the!nanoNode! (Slave)!that!may!be!in!deep!sleep.!When!either!MRQ!or!SRQ!assert!high,!the!Master!should!set! each!of!the!three!signals!appropriately!according!to!their!standard!usage.!No!pullLup!resistors! should!ever!be!applied!to!any!signals!on!the!nanoNode$since!it!often!needs!to!fall!into!a!Deep! Sleep!mode!(all!internal!regulators!turned!off).! Node RF1 Radio RF2 Analog1 Front1End ARM71+1 Digital1 Processing RTC MISO MOSI SCLK CS MRQ SRDY SRQ SPI Interface Ingenuspecific1 SPI ON_OFF T_OUT 3V3/VBATT GND 18! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Interface!and!Sequences! 5.2$SPI!Mode!and!Timing! SPCK*Cycle* (for*reference) SPCK (CPOL*=*0) MOSI (from*master) MISO (from*slave) MSB MSB LSB LSB NSS (to*slave) Figure&8.&SPI&Timing,&CPOL&=&0,&CPHA&=&0& 5.3$Host!Initialization! What!is!described!here!is!the!initialization!of!the!Host,!its!operating!software,!and!the!control! sequences!used!to!drive!the!nanoNode.!! Due!to!specific!clock!and!memory!requirements,!the!nanoNode!must!go!through!specific! Initialization!and!Wake!sequences.!! NOTE:& Some!CPUs!have!internal!pullLup!resistors!that!are!active!after!Power!On!Reset.!Through! CMOS!leakage,!the!Host!CPU!can!supply!voltages!to!the!nanoNode!I/O!bus!prior!to!the! Host!CPU!fully!initializing!and!disabling!the!pullLup!resistors.!It!must!be!noted!that!during! the!brief!initialization!period,!the!POWER_ON!signal!must!be!“low.”!Activating!the! POWER_ON!signal!with!other!nanoNode!signals!being!pulled!“high”!can!cause!CMOS! latchup!within!the!nanoNode.!! 5.4$Startup!(Power!On)!Sequence! During,!and!immediately!after!Power!On!Reset!(POR),!the!Host!has!no!control!of!its!I/O!power! states.!For!instance,!some!CPUs!have!GPIO!that!triLstate!or!act!as!inputs!during!power!up.!Other! CPU!brands!have!programmable!pullLups!on!its!I/O!and!need!the!Host!CPU!to!disable!those!pullL ups!for!the!Host’s!GPIO!to!work!correctly!with!the!nanoNode.!This!setup!and!configuration!of! GPIO!takes!a!finite!time!during!the!Host!boot!process.!This!is!detailed!in!the!following!figure.! Whereas!the!powerLup!sequence!is!described!here,!it!is!recommended!the!Integrator!not!attempt! this!entire!startup!sequence!without!assistance.!Ingenu!offers!a!formal!and!controlled!library!to! help!with!this!startup!and!communication!interface.!For!more!information,!refer!to!the!rACM% Developer%Guide%(01030105300)!and!the!Host%Common%Software%Integration%Application%Note%(0103 0024300).!These!documents!are!described!in!section!1.3:!References/Tools.! 19! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Interface!and!Sequences! The!initial!sequencing!of!the!3.3V!and!Vbatt!rails!are:! •$ Both!3.3V!and!Vbatt!van!be!applied!simultaneously,!or! •$ The!Vbatt!can!rise!first!if!3.3V!follows!within!1mS,!but! •$ !the!3.3V!should!never!rise!prior!to!Vbatt.! 3.3V/VBATT Host)Init (not)a)signal) Power)On Int)Node) Reset/Init (not)a)signal) MRQ HiLZ SPI) System SRDY 100)ms t0 t1 3000)ms t2 10)ms t3 4)ms t4 t5 t6 t6)–)t4)<)300)ms)or)error Figure&9.&nanoNode&PowerZup&Timing&Sequence& The!timing!sequence!shown!in!Figure!9!above!is!described!below.!NOTE:!The!timing!shown!in!the! figure!is!not!to!scale.! !$ t0###t1& This!phase!is!where!the!Host’s!System!power!has!been!applied!and!the!Host! Software!must!power!up!and!initialize!the!GPIO!interfaces!for!the!nanoNode!to! the!required!states!defined!at!time!t1.!The!t1!state!becomes!“TRUE”!indicating! the!Host!sets!all!the!GPIO!to!a!known!and!controlled!state!(Low).!! !$ t2& At!t2!state,!all!the!output!signals!to!the!nanoNode!are!set!low!and!the!Power!On! Signal!is!set!high.!This!turns!on!the!internal!LDO!regulators!of!the!nanoNode!to! initiate!a!power!up!sequence.!The!time!between!t1Lt2!is!approximately!100!ms,!or! longer.!Assert!ON_OFF!“high”!starts!an!internal!clock!(32!K)!and!releases!an! internal!reset!pin!which!may!take!up!to!3!seconds!to!stabilize.! !$ t3& t3!is!when!the!Host!releases!the!nanoNode!from!its!Reset!state.!This!time!allows! the!32!kHz!of!the!nanoNode!to!turn!on!and!stabilize.!The!time!between!t2Lt3!is!1! second,!or!longer.! !$ t4& t4!signals!the!start!of!the!Host!wanting!to!initiate!communications!(arbitration)! with!the!nanoNode.!The!Host!raises!MRQ!to!turn!on!various!circuitries.!The!time! between!t3Lt4!is!10!ms,!or!longer.! 20! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Interface!and!Sequences! !$ t5& After!the!assertion!of!t4,!the!nanoNode!begins!its!“wake!sequence.”!The! nanoNode!must!boot,!initialize!its!operating!system!and!hardware!and!when!it!is! ready!for!communications!it!raises!its!SRDY!signal!back!to!the!Host.!At!this!point,! communications!(Arbitration)!can!begin.! !$ t6& At!this!point!the!nanoNode!signals!its!readiness!by!asserting!the!SRDY!pin.!The! Host!can!now!begin!communications!with!the!nanoNode.! 5.5$Wake!Sequence! The!nanoNode!will!often!go!into!sleep!mode!even!though!ON_OFF!is!“high”!(active).!To!begin! NodeLHost!communications,!the!host!must!ensure!the!nanoNode!is!awake.!The!nanoNode!can!be! awakened!in!two!manners:!! !$ MRQ!assertion!from!the!Host.!The!Host!desires!communications!with!the!nanoNode!and! awakens!the!nanoNode!by!asserting!the!MRQ!line.!This!is!a!Synchronous!Wake!Sequence.! !$ The!nanoNode!can!“selfLawaken”!due!to!network!events.!In!this!case,!a!timer!internal!to!the! nanoNode!“pops”!and!triggers!the!nanoNode!to!“wake.”!When!the!nanoNode!is!awake!it! asserts!its!SRDY!as!a!matter!of!course!to!indicate!to!the!Host!(if!it!needs!to)!that!it!can!start! communicating!with!the!nanoNode!while!it!is!awake.!This!is!an!Asynchronous!Wake! Sequence.! 5.5.1$Wake!Sequence!(Synchronous)! The!following!sequence!demonstrates!the!timing!required!of!the!Host!to!awaken!the!nanoNode! from!a!sleep!state.! Assumptions:& !$ The!nanoNode!has!been!previously!Powered!On!and!Arbitrated.! !$ The!power!(VBATT)!has!remained!stable!and!the!nanoNode!has!not!been!Reset!(Reset!is!set! to!triLstate/float).! MRQ SPI, System Hi5Z (Driven,as,appropriate) SRDY 3,ms t0 4,ms t1 t2 t3 Figure&10.&HostZInitiated&nanoNode&Wake&Sequence&–&SRDY&Low&(Synchronous)& 21! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Interface!and!Sequences! The!timing!sequence!shown!in!Figure!10!above!is!described!below.!NOTE:!The!timing!shown!in! the!figure!is!not!to!scale.! !$ t0& !$ t0###t1& After!MRQ!has!gone!High,!the!Host’s!SPI!system!and!other!I/O!can!be!enabled.! The!Host!desires!to!wake!the!nanoNode!and!asserts!MRQ!high.! Asserting!the!MRQ!has!enabled!the!internal!I/O!power!supply!of!the!nanoNode! and!the!Host’s!SPI!can!be!enabled!4!ms!after!the!rise!of!MRQ.! !$ t1###t2& After!the!initial!assertion!of!MRQ,!the!nanoNode!has!to!internally!power!up!and! initialize!its!systems.!When!it!is!ready!to!communicate!it!will!assert!its!SRDY!line! to!signal!it!is!now!ready!for!SPI!interaction.!From!MRQ!assertion!until!the! nanoNode!is!ready,!takes!about!80!ms.! !$ t3& The!nanoNode!is!now!ready!to!fully!communicate!with!the!Host.! 5.5.2$Wake!Sequence!(Asynchronous)! In!this!scenario,!the!nanoNode!is!already!awake!due!to!a!networking!event!(SRDY!is!already!High)! and!the!Host!wants!to!communicate!with!the!nanoNode!while!it!is!awake.!The!Host!asserts!MRQ! to!ensure!that!the!nanoNode!stays!awake!during!its!communication!cycle.! NOTE:!The!timing!shown!in!the!figure!is!not!to!scale.! MRQ SPI, System Hi5Z (Driven,as,appropriate) SRDY <,250,μs t0 t1 t2 t3 Figure&11.&HostZInitiated&nanoNode&Wake&Sequence&–&SRDY&High&(Asynchronous)& 22! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Interface!and!Sequences! 5.6$HostLDriven!Reset!Sequence! If!the!nanoNode!fails!to!communicate!(or!similar),!it!may!be!necessary!to!“Reset”!the!nanoNode.! The!following!figure!shows!the!proper!sequence!to!reset!the!device.!! NOTE&1:! Resetting!the!device!causes!it!to!go!through!an!RPMA!Cold!Acquisition!process!to! reacquire!the!network.! NOTE&2:! The!timing!shown!in!the!figure!is!not!to!scale.! VBATT ON_OFF MRQ Hi@Z SPISystem (Driven-as-appropriate) SRDY 15-ms t0 t1 3000-ms t2 10-ms t3 4-ms t4 t5 t6 Figure&12.&HostZDriven&Reset&Sequence& 23! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Interface!and!Sequences! 5.7$Host!MRQ!Release/nanoNode!Allowed!to!Sleep!Sequence! If!the!Host!determines!there!are!no!more!messages!or!SPI!transactions!required,!it!nominally!deL asserts!the!MRQ!to!allow!the!nanoNode!to!fall!back!to!Deep!Sleep!(lowest!power!mode).!The! figure!below!shows!how!this!is!sequenced!by!the!Host/nanoNode.!A!small!delay!in!deLasserting! SRDY!is!enforced!to!prevent!quick!toggling!(waking)!of!the!nanoNode.! NOTE:!The!timing!shown!in!the!figure!is!not!to!scale.! MRQ SPI+ System Hi4Z SRDY 3+ms t0 10+ms t1 t2 Figure&13.&Host&MRQ&Release/nanoNode&Allowed&to&Sleep&Sequence& 24! 014L0065L00!Rev.!X3! ! 6$Power!States! Ingenu!can!provide!partners!with!tools!to!accurately!predict!battery!life!for!their!particular! application.!We!recommend!that!partners!use!these!tools.!This!section!is!provided!for!reference! only.! The!nanoNode!has!a!number!of!states!it!runs!through!during!its!various!operating!modes.!! General!comments:! !$ The!nanoNode!accepts!a!wide!input!voltage!range!(2.2!V!–!5.5!V!on!VBATT).!!! !$ The!nanoNode!has!low!drop!out!(LDO)!regulators!that!will!operate!100%!of!the!time!the! nanoNode!is!powered!(ON_OFF!signal!set!to!high).!! !$ The!nanoNode!requires!either!a!fixed!or!switched!3.3!V!supply!on!its!3V3!pin.!! The!nanoNode!always!tries!to!minimize!its!power!consumption!but!is!largely!driven!by!network! operating!states!and!modes!of!operation.!This!document!does!not!describe!all!of!the!modes!in! detail!but,!in!general,!there!are!two!main!operating!modes!for!the!nanoNode:! 1.$ Continuous&Mode!! In!this!mode,!the!nanoNode!is!ON!(awake)!at!least!50%!of!the!time!(100%!of!its!RX!cycle).! The!nanoNode!starts!up,!searches!for!the!network,!locks!on,!and!Joins.!In!this!mode,!the! nanoNode!is!nominally!in!RX!or!TX!mode!(radio!is!ON!and!in!a!high!power!consumption! state),!or!in!an!Idle!state!where!the!clocks!and!CPU!are!ON!but!the!radio!is!OFF!(moderately! low!power!mode).!The!continuous!mode!is!usually!for!applications!where!the!Host!and! nanoNode!are!ACLpowered!and!system!current!consumption!is!not!an!issue.! 2.$ Slotted&Mode!! This!mode!has!the!nanoNode!falling!into!a!Deep!Sleep!state—the!lowest!power!state!of!the! nanoNode.!In!this!mode,!the!nanoNode!is!mostly!powered!down!except!for!a!couple!of!low! power!LDO!Regulators.$The!nanoNode!can!sleep!for!hours!at!a!time!if!the!network!is! configured!to!allow!this.! The!power!states!are!described!in!the!following!sections.! 6.1$Operating!States! This!section!describes!the!various!operating!states!within!the!operational!modes.! 6.1.1$Power!Off!State! When!the!nanoNode!is!totally!nonLfunctional,!the!Host!can!set!the!POWER_ON!signal!Low!to! deactivate!the!circuitry!of!the!nanoNode.!This!should!NOT!be!confused!with!Deep!Sleep!states! where!the!nanoNode!mostly!sleeps!yet!maintains!key!network!timers!to!wake!up! synchronously!with!network!activity.!If!awakened!from!the!Power!Off!state,!the!nanoNode! must!go!through!a!very!powerLhungry!search/acquisition!algorithm!to!reLacquire!the!RPMA! Network.! 25! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Power!States! 6.1.2$Deep!Sleep!State! The!nanoNode!shuts!off!all!its!power!regulators!except!a!couple!low!quiescent!LDO!regulators.! These!regulators!keep!a!minimal!amount!of!circuitry!alive!for!tracking!network!timers,!enable!a! 32!kHz!clock,!and!some!minor!interface!circuitry.! 6.1.3$Oscillator!Calibration!State! When!the!nanoNode!is!in!Deep!Sleep!state,!it!attempts!to!maintain!accuracy!of!its!low!power!32! kHz!clock!to!enable!faster!network!synchronizing!when!it!wakes!up.!The!CPU!of!the!nanoNode! is!not!activated!during!this!calibration!state.!The!nanoNode!will!periodically!(and!briefly)!wake! up!in!a!very!low!power!mode!to!calibrate!its!32!kHz!clock!to!its!very!accurate!26!MHz!clock.!This! is!especially!important!when!the!temperature!varies!substantially!causing!the!32!kHz!oscillator! to!drift.!This!is!illustrated!in!the!following!figure.! This!plot!is!an!example!of!the!nanoNode!performing!a!selfLcalibration!of!its!32!kHz!oscillator.! The!pulses!represent!the!TCXO!being!turned!on!periodically!to!perform!the!calibration.!The! nanoNode!wakes!itself!from!Deep!Sleep,!Calibrates,!and!then!falls!back!to!sleep.!Minimal! power!is!consumed!during!this!selfLcalibration!process.!As!can!be!seen,!the!nanoNode!does!this! approximately!every!900!seconds.! Vbatt!Power!Draw!(Watts) Calibrate Sleep Time!(Seconds) Figure&14.&nanoNode&Oscillator&Calibration:&Current&(Amps)&vs&Time&(Seconds)& 26! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Power!States! 6.1.4$Idle!State! Idle!state!has!various!subLstates!but!generally!refers!to!a!state!where!the!nanoNode!is!“awake”! and!its!system!clock!is!on,!the!CPU!is!awake,!but!the!RF!is!OFF.! 6.1.5$RX!State! The!nanoNode!turns!on!all!its!clocks,!the!main!CPU!and!the!RF!in!an!RXLonly!state.!The!RF! transceiver,!in!RX!state,!consumes!a!moderate!amount!of!power.! 6.1.6$TX!State! When!the!nanoNode!transmits,!it!uses!a!variable!transmit!power!that!is!correlated!to!its! received!RSSI.!In!this!state,!the!nanoNode!is!likely!at!its!highest!power!states,!but!this!is! somewhat!dependent!on!RSSI.!The!worst!case!state!(maximum!power)!is!shown!in!Figure!15.! This!is!at!approximately!23.3!dBm!output!power.!This!is!the!highest!power!state!for!the! nanoNode.! 6.2$System! As!noted,!the!nanoNode!can!go!through!various!states!of!Deep!Sleep,!Idle,!RX,!and!TX.!The!plot! shown!in!the!following!figure!provides!a!representative!nanoNode!waking!up!and!going! through!these!states!and!transitions.! All!systems!are!different!and!current!consumption!is!affected!by!many!factors.! !$ Network!coverage.!How!much!TX!power!does!a!nanoNode!need!to!transmit!its!data?! Temperature!range! !$ Operating!Voltage! !$ Continuous!mode!vs!Slotted!mode:!What!is!the!Uplink!Interval?! !$ Amount!of!data!in!the!data!model! Quality!of!Service!(QoS)!for!data!delivery! !$ !$ All!of!the!factors!indicated!above!must!be!examined!carefully!and!plotted!to!understand!the! end!result!in!current!profiles!and!expected!battery!life!projections.! 27! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Power!States! Figure&15.&Representative&Current&Consumption&During&Deep&Sleep,&Idle,&RX,&and&TX;&x16& Spreading&Factor&& The!plot!shown!in!the!figure!above!represents!the!nominal!transitions!for!the!nanoNode!from! Deep!Sleep,!Idle,!Receive,!and!Transmit!states.!In!this!case,!a!TX!spreading!factor!of!16!is!used.! It!is!important!that!the!Host!designer!understand!the!System!operating!profile,!operating! voltages,!different!operating!modes!of!the!nanoNode!and!the!ultimate!effect!on!System!power! consumption.!Of!course,!this!is!especially!true!if!a!battery!powered!device!is!being!considered.! 28! 014L0065L00!Rev.!X3! ! 7$SPI!Messaging!Protocol! The!SPI!Messaging!between!the!Host!processor!and!the!node!is!controlled/handled!by!the!Host! Common!Library,!compiled!onto!the!user’s!apps!processor.!The!following!section!(all!of! Chapter!7)!is!informational!only.! The!details!of!Host/Node!messaging!are!typically!not!necessary!for!integrators!to!implement.! The!rACM!application!code!(supplied!by!Ingenu)!is!a!working!example!of!a!Host!Common! integration!on!an!NXP!(formerly!Freescale)!K20.!! 7.1$Arbitration! Arbitration!is!the!process!a!Host!uses!to!signal!to!the!Node!that!it!supports!the!biLdirectional! messaging!protocol.!The!arbitration!sequence!is!designed!to!reduce!the!probability!that!an! arbitrary!nonLHost!transfer!sequence!can!mirror!a!valid!arbitration!sequence.! Arbitration!consists!of!both!Host!and!Node!transmitting!an!arbitration!request/reply!pair.!After! a!defined!turnLaround!delay,!both!transmit!a!validation!request/reply.!The!turnLaround!delay! avoids!race!conditions!between!Host!and!Node!and!provides!enough!time!to!allow!ISR! execution!to!complete!before!the!next!SPI!transfer.! If!the!Node!does!not!reply!to!the!Host!request,!the!Host!needs!to!wait!for!a!turnLaround!delay! and!retry!the!arbitration!request.! The!Host!must!perform!the!arbitration!sequence!before!any!other!SPI!Bus!communication!can! take!place!between!the!Host!and!the!Node.! The!Host!must!initiate!this!arbitration!sequence!on!boot!up.!Additionally,!the!Host!must! perform!the!arbitration!sequence!when!the!Node!sends!to!the!Host!an!arbitration!message.! This!can!occur!due!to!the!Node!going!into!Deep!Sleep!and!then!waking!up.!Since!the!Node! requires!the!arbitration!sequence!after!waking!from!Deep!Sleep!and!since!the!Host!is!not!aware! of!when!the!Node!goes!to!Deep!Sleep,!the!Host!must!be!able!to!detect!that!the!Node!is! requesting!arbitration!and!the!Host!must!then!reset!its!Host!interface!state!machine!and! perform!arbitration.!For!more!information!on!the!Host!interface!SPI!bus!state!machine,!refer!to! section!7.3:!Host!Interface!SPI!Bus!State!Machine.! 7.2$Message!Protocol! HostLtoLNode!transfers!use!master!message!command!pairs!and!NodeLtoLHost!transfers!use! slave!message!command!pairs.!Both!transfers!use!identical!command!sequences!with!only!the! encoding!of!the!commands!differing.!The!command!sequence!for!a!message!transfer!consists! of!a!request/acknowledgement!pair!followed!by!a!defined!turnLaround!delay!and!then!a! message!composed!of!a!header!pair!and!a!payload.! Variable!length!payloads!are!supported!by!encoding!the!payload!size!in!the!second!half!of!the! message!request.!The!second!half!of!the!message!reply!contains!the!available!receive!buffer! size.!If!the!message!payload!size!exceeds!the!receive!buffer!size,!then!a!new!request!must!be! made!after!a!turnLaround!delay!with!a!payload!size!that!does!not!exceed!the!receive!buffer!size.! 29! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Messaging!Protocol! After!a!successful!message!request!transfer,!the!Host!waits!a!turnLaround!delay!and!then! initiates!the!transfer!with!a!message!header!command.!The!payload!immediately!follows!the! header!and,!if!necessary,!is!zero!padded!to!match!the!payload!size!indicated!in!the!message! request.!After!the!payload,!the!Host!waits!a!turnLaround!delay!before!proceeding!with!any! other!further!messages.! The!Host!interface!SPI!bus!is!a!standard!SPI!bus!(with!MISO,!MOSI,!CS,!and!SCLK)!with!the! addition!of!three!lines!(MRQ,!SRQ,!and!SRDY).!These!three!additional!lines!are!used!to!provide! the!Host!with!the!ability!to!wake!up!the!Node!over!the!SPI!Bus!as!well!as!providing!the!Node! with!the!ability!to!prompt!the!Host!to!begin!a!SPI!Bus!transaction.$The!Node!is!also!exceptional! in!that!it!must!be!the!only!slave!present!on!the!SPI!Bus,!since!MOSI,!CS,!and!SCLK!must!be! undriven!(triLstated)!any!time!that!MRQ!is!low.! Before!any!message!is!communicated!over!the!SPI!Bus,!the!MRQ!and!SRDY!lines!must!be!high.! The!Host!guarantees!this!by!pulling!the!MRQ!line!high!and!waiting!for!the!Node!to!pull!the! SRDY!line!high.!The!Host!cannot!proceed!with!SPI!Bus!communication!until!both!of!these!lines! are!high.!Once!MRQ!and!SRDY!are!high,!the!Host,!being!SPI!Bus!master,!can!continue!with!a! normal!SPI!Bus!transaction.! When!the!Node!wishes!to!communicate!with!the!Host,!it!pulls!the!SRQ!line!high.!The!Host!must! have!the!ability!to!detect!this!and!start!a!SPI!Bus!transaction!(by!first!pulling!the!MRQ!high!and! waiting!for!SRDY!to!go!high).!A!standard!SPI!Bus!transaction!is!described!and!illustrated!in! Figure!18.! Message!exchanges!between!Host!and!Node!are!shown!below!in!Figure!16.!! 30! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Node SPI!Messaging!Protocol! Host MRQ=1 Arbitration Slave5Ready SRDY=1 Arbitration5 Acknowledge ArbREQ ArbACK Validation5 Acknowledge ValREQ ValACK Slave Request wait Arbitration5 Request wait Validation Request MRQ=1 SRDY=1 wait HostMtoM Node Message Transfer MMsgREQ+Size MMsgACK+Size Master5Message Acknowledge Master5Message Request wait Master5Header Acknowledge MHdrREQ MHdrACK Payload Receive PAYLOAD Master5Header Request Payload Transmit wait Repeat555steps5above if55needed Slave Request SRQ=1 MRQ=1 SRDY=1 wait NodeMtoM Host Message Transfer SMsgREQ+ Size SMsgACK+ Size Slave5Message Request Slave5Message Acknowledge wait Slave5Header Request SHdrREQ SHdrACK Payload Transmit PAYLOAD Slave5Header Acknowledge Payload Receive wait Repeat565steps5above5 wait =5 TurnMaround5Delay Figure&16.&SPI&Master&and&Slave&Message&Sequences& In!each!of!the!request/acknowledge!command!pairs!shown,!the!top!command!is!transmitted!by! the!Host!(master)!and!the!bottom!command!is!transmitted!by!the!Node!(slave).!The!wait! 31! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Messaging!Protocol! bubbles!indicate!a!predefined!turnLaround!delay!which!provides!ISR!processing!time!and!avoids! race!conditions!between!Host!and!Node.! 7.3$Host!Interface!SPI!Bus!State!Machine! This!section!illustrates!the!sequence!of!messages!that!can!take!place!on!the!Host!interface!SPI! bus.!The!design!and!implementation!of!the!actual!state!machine!on!the!Host!software!is!up!to! the!Host!software!designer.!This!diagram!is!provided!to!demonstrate!the!message!sequence! over!the!SPI!Bus.!Note!the!usage!of!the!turnLaround!delay,!which!is!required!in!between!each! step!of!message!exchange.!This!delay!is!required!by!the!Node!and!is!currently!defined!as!having! a!time!of!200!µs.! NIL Turn6around: Delay IDLE BOOT Turn6around: Delay Host:(Master):Has: Message:to:Send Non6Arbitration: Response Unexpected: SMSG_RSP MMSG_REQ ARBITRATION Exchange:of:Arbitration: Message Exchange:of:MMSG: Message Turn6around: Delay Turn6around: Delay VALIDATION SRQ:Asserted:by: Slave:(Node) Any Other:SPI:Bus: Traffic Any Other:SPI:Bus: Traffic MMSG_PAYLOAD Exchange:of: Validation:Message Any Non6Validation SMSG_REQ Exchange:of:SMSG: Message Turn6around: Delay SMSG_PAYLOAD Exchange:of:MHDR:Message Exchange:of:SHDR:Message Figure&17.&Host&Interface&SPI&Bus&State&Machine& 32! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Messaging!Protocol! 7.4$SPI!Bus!Timing!Example! This!section!provides!an!example!illustration!of!an!exchange!of!messages!first!from!master! (Host)!to!slave!(Node)!and!then!from!slave!(Node)!to!master!(Host).!Each!step!in!the!timing! sequence!is!described!below:! SRQ MRQ SRDY 10 11 CS SCLK MISO MOSI Figure&18.&SPI&Timing&Example& Note!that!MRQ!state!transitions!must!respect!the!timing!requirements!shown!in!Chapter!5.! The!following!items!pertain!to!the!numbered!bubbles!above:! 1.$ Host!has!a!message!that!it!desires!to!send!to!Node.!The!first!thing!that!it!does!is!drive!MRQ! and!CS!high.! 2.$ The!Host!then!waits!for!the!Node!to!drive!SRDY!high.!No!SPI!bus!transaction!with!the!Node! can!occur!before!this.! 3.$ After!SRDY!is!high,!the!Host!can!start!with!the!SPI!data!transaction.!This!is!accomplished!by! driving!the!Node!CS!line!low!and!then!having!the!Host!toggle!the!SCLK,!and!MOSI!lines!and! having!the!Node!toggle!the!MISO!line!according!to!the!data!to!be!transferred.!The!SPI!Host! interface!specifies!that!first!a!MMsg!pair!is!exchanged.! 4.$ A!MHdr!pair!is!exchanged.!Note!that!the!payload!of!the!message!is!appended!to!the!MHdr.! 5.$ The!Host!detects!that!the!transaction!is!complete!and!that!it!does!not!wish!to!send!more! messages!to!the!Node!at!this!time.!It!drives!the!MRQ!line!low.!Since!MRQ!is!low,!CS,!SCLK! and!MOSI!are!triLstated.! 6.$ At!some!time!in!the!future,!the!Node!desires!to!send!a!message!to!the!Host.!It!indicates!this! to!the!Host!by!driving!SRQ!high.!Since!SRQ!is!high,!the!Host!drives!MRQ!and!then!CS!high.! It!then!waits!for!SRDY!to!go!high,!which!it!already!is.! 33! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Messaging!Protocol! 7.$ The!Host!starts!the!SPI!data!transaction.!This!is!accomplished!by!driving!the!Node!CS!line! low!and!then!having!the!Host!toggle!the!SCLK,!and!MOSI!lines!and!having!the!Node!toggle! the!MISO!line!according!to!the!data!to!be!transferred.!The!SPI!Host!interface!specifies!that! first!a!SMsg!pair!is!exchanged.! 8.$ A!SHdr!pair!is!exchanged.!Note!that!the!payload!of!the!message!is!appended!to!the!SHdr.! 9.$ The!Node!detects!that!the!transaction!is!complete!and!that!it!does!not!wish!to!send!more! messages!to!the!Host!at!this!time.!It!drives!the!SRQ!line!low.! 10.$ The!Host!detects!that!SRQ!has!gone!low!and!that!it!does!not!have!any!messages!to!send!to! the!Node.!It!drives!the!MRQ!line!low.!Since!MRQ!is!low,!CS,!SCLK!and!MOSI!are!triLstated.! 11.$ The!Node!drives!the!SRDY!line!low!after!MRQ!goes!low.! 7.5$Host!Message!SPI!Example! This!section!provides!an!example!Host!message!exchange!from!master!(Host)!to!slave!(Node).! In!this!example,!the!Host!is!sending!a!version!request!message.! This!example!is!a!zoomedLin!view!of!the!example!provided!previously!in!Figure!18.!This!section! covers!what!happens!in!step!3,!which!includes!the!two!SPI!exchanges!initiated!by!the!Host.! With!any!SPI!Host!interface!message,!first!an!MMsg!or!SMsg!pair!must!be!exchanged.!This!pair! contains!information!on!how!big!the!message!is!(from!the!message!originator)!and!how!much! message!queue!space!is!available!(on!the!message!destination).! The!following!diagram!shows!such!an!example:! SCLK MISO(( 0( 1( 1( 0( 1( 0( 0( 1( 1( 1( 1( 1( 1( 1( 1( 1( MOSI 1( 0( 1( 0( 1( 0( 0( 1( 0( 0( 0( 0( 0( 1( 0( 0( Figure&19.&Host&Message&on&SPI&–&MMsg&Pair& The!SPI!clock!edging!is!configurable!with!a!polarity!and!phase.!In!order!to!communicate!with! the!Node,!the!SPI!clock!polarity!must!be!set!to!“the!inactive!state!value!of!SPI!clock!is!logic!level! zero”!and!the!SPI!clock!phase!must!be!set!to!“data!is!captured!on!the!leading!edge!of!SPI!clock! and!changed!on!the!following!edge!of!SPI!clock.”!This!means!that!the!data!lines!(both!MISO! and!MOSI)!are!read!on!the!SCLK!rising!edge!and!are!set!or!cleared!on!the!SCLK!falling!edge,! and!is!commonly!referred!to!as!CPOL=0,!CPHA=0.! This!illustration!shows!that!the!bit!streams!for!MISO!and!MOSI!are:! !$ MISO:!0110100111111111! !$ MOSI:!1010100100000100! 34! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Messaging!Protocol! These!bits!indicate:! MISO:! from!slave!to!master!(01)! length!of!message=2!(10)! opcode=MMsgACK!(1001)! buffer!size=255!(11111111)! MOSI:! from!master!to!slave!(10)! length!of!message=2!(10)! opcode!=MMsgREQ!(1001)! payload!size=4!(00000100)! An!MMsg!pair!or!SMsg!pair!is!immediately!followed!by!the!corresponding!MHdr!pair!or!SHdr! pair.!This!is!illustrated!below:! .!!.!!.! SCLK! .!!.!!.! MISO! 0! 1! 1! 0! 1! 0! 1! 0! 0! 0! 0! 0! 0! 0! 0! 1! 0! 1! .!!.!!.! MOSI! 1! 0! 1! 0! 1! 0! 1! 0! 0! 0! Figure&20.&Host&Message&on&SPI&–&MHdr&Pair& For!purpose!of!brevity,!this!timing!diagram!shows!only!a!portion!of!the!data!exchange.!The! complete!bit!streams!for!MISO!and!MOSI!are!as!follows:! !$ MISO:!01101010000000010000000000000000000000000000000000000000000000000000 000000000000! !$ MOSI:!1010101000000001000010000000000000010101010000001111000011110000101001 0110100101! These!bits!indicate:! MISO:! from!slave!to!master!(01)! length!of!message=2!(10)! opcode=MHdrACK!(1010)! Hard!coded!byte=1!(00000001)! Unused!Extra!Data!(0000…...0)! MOSI:! from!master!to!slave!(10)! length!of!message=2!(10)! opcode!=MhdrREQ!(1010)! Hard!coded!byte=1!(00000001)! Payload:! 35! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! !$ !$ !$ :! SPI!Messaging!Protocol! length=8!(0000100000000000)! message!type=VERSION!(0001010101000000)! trailing!sequence!(11110000111100001010010110100101)! The!payload!is!Little!Endian.!The!least!significant!byte!is!transmitted!over!SPI!first.! All!MHdr!and!SHdr!payloads!are!terminated!by!the!fixed!trailing!sequence! 11110000111100001010010110100101.! The!example!above!shows!a!message!going!from!master!to!slave,!thereby!having!a! payload!in!the!master!to!slave!direction!appended!at!the!end!of!the!MhdrREQ!and!no! payload!appended!at!the!end!of!the!MhdrACK.! 7.6$Host!Message!“Connect”!SPI!Example! This!section!provides!an!example!Host!message!exchange!of!the!CONNECT!message!from! master/Host!to!slave/Node!and!subsequent!response!from!the!slave!to!the!master.! The!timing!is!similar!to!the!timing!illustrated!in!the!previous!section,!but!the!data!and!length!of! data!is!different.! The!steps!involved!in!this!exchange!are!as!follows:! The!Host!desires!to!send!the!CONNECT!message!to!the!Node.!As!described!in!the!previous! section,!this!starts!with!an!MmsgREQ/MmsgACK!exchange!over!the!SPI!bus.! !$ MISO:!0110100111111111! !$ MOSI:!1010100100000110! These!bits!indicate:! MISO:! from!slave!to!master!(01)! length!of!message=2!(10)! opcode=MMsgACK!(1001)! buffer!size=255!(11111111)! MOSI:! from!master!to!slave!(10)! length!of!message=2!(10)! opcode!=MmsgREQ!(1001)! payload!size=6!(00000110)! The!MMsg!exchange!is!followed!by!the!MHdr!exchange,!which!includes!the!payload!of!the! CONNECT!message.! !$ MISO:!01101010000000010000000000000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000! !$ MOSI:!101010100000000100001100000000000011001001000000000000010000000000000 0000000000011110000111100001010010110100101! These!bits!indicate:! MISO:! from!slave!to!master!(01)! 36! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! length!of!message=2!(10)! opcode=MHdrACK!(1010)! Hard!coded!byte=1!(00000001)! Unused!Extra!Data!(0000…...0)! SPI!Messaging!Protocol! MOSI:! from!master!to!slave!(10)! length!of!message=2!(10)! opcode!=MhdrREQ!(1010)! Hard!coded!byte=1!(00000001)! Payload:! length=12!(0000110000000000)! message!type=CONNECT!(0011001001000000)! host!interface=True!(00000001000000000000000000000000)! trailing!sequence!(11110000111100001010010110100101)! The!payload!of!the!message!includes!first!the!length,!which!is!the!number!of!bytes!in!the! payload!including!the!length!and!the!trailing!sequence.! It!is!followed!by!the!message!type,!which!in!this!case!is!0x4032,!and!corresponds!with! CONNECT.! The!CONNECT!message!has!a!4Lbyte!field!that!is!a!Boolean!flag!specifying!whether!or!not!the! Node!should!send!asynchronous!SPI!messages!to!the!Host.!To!specify!that!the!Node!should! send!messages!to!the!Host,!the!value!of!0x00000001!is!used.! It!is!then!followed!by!the!standard!fixed!trailing!sequence.! This!message!exchange!is!followed!by!a!NodeLinitiated!message!exchange!for!the!purpose!of! sending!an!ACK!of!the!CONNECT!message!to!the!Host.!This!starts!with!a!SmsgREQ/SMsgACK! exchange!over!the!SPI!bus.! !$ MISO:!0110101100000100! !$ MOSI:!1010101111111111! These!bits!indicate:! MISO:! from!slave!to!master!(01)! length!of!message=2!(10)! opcode=SMsgACK!(1011)! buffer!size=255!(11111111)! payload!size=4!(00000100)! MOSI:! from!master!to!slave!(10)! length!of!message=2!(10)! opcode!=SmsgREQ!(1011)! buffer!size=255!(11111111)! 37! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! SPI!Messaging!Protocol! The!SMsg!exchange!is!followed!by!the!SHdr!exchange,!which!includes!the!payload!of!the!ACK! message.! !$ MISO:!0110110000000001000010000000000000110000000000001111000011110000101001 0110100101! !$ MOSI:!10101100000000010000000000000000000000000000000000000000000000000000 000000000000! These!bits!indicate:! MISO:! from!slave!to!master!(01)! length!of!message=2!(10)! opcode=SHdrACK!(1100)! Hard!coded!byte=1!(00000001)! Payload:! length=8!(0000100000000000)! message!type=ACK!(0011000000000000)! trailing!sequence!(11110000111100001010010110100101)! MOSI:!from!master!to!slave!(10)! length!of!message=2!(10)! opcode!=ShdrREQ!(1100)! Hard!coded!byte=1!(00000001)! Unused!Extra!Data!(0000…...0)!!!! 38! 014L0065L00!Rev.!X3! ! 8$nanoNode!Provisioning! Provisioning!a!node!consists!of!updating!(if!necessary)!node!firmware!version,!applying!a! configuration!to!the!node,!and!providing!security!keys!to!the!node.!The!node!configuration!and! security!keys!must!match!the!target!network!where!the!node!will!be!deployed!and,!after! provisioning,!the!nodeLspecific!key!must!be!provided!to!the!network!operator.!The!provisioning! software!package!is!used!to!perform!these!steps.!For!further!information,!please!see!the! Provisioning%Guide%(001030074300).!! In!the!near!future,!the!provisioning!step!will!not!be!required!for!Global!and!U.S.!public! networks.!PreLProvisioned!Nodes!will!be!the!default!of!what!ships!from!the!factory.! 39! 014L0065L00!Rev.!X3! ! 9$Antenna!Diversity! The!nanoNode!supports!Antenna!Diversity!for!optimal!System!performance.!In!many!cases,!the! nanoNode!and!Host!system!are!mounted!in!fixed!locations!that!often!experience!nulls!in!the!RF! coverage.!Antenna!Diversity!can!help!with!optimization!of!the!RX!and!TX!paths.!In!marginal! coverage!areas,!an!RF!null!could!easily!disadvantage!the!nanoNode!to!force!it!to!transmit!at!a! higher!TX!Power!(more!battery!energy)!or!cause!network!loss!and!frequent!rescanning!to! reacquire!the!network!(again,!more!energy).!! Figure&21.&Antenna&Diversity&with&Ethertronics& 9.1$Antenna!Design!Considerations! !$ Good!antenna!design!is!also!crucial!to!success.!It!is!important!to!consider!some!pertinent! issues.!Ingenu!and!our!partners!provide!a!service!to!review!your!PCB!layout!to!ensure!good! RF!design!practices!have!been!followed.!Ingenu!and!our!partners!provide!a!service!to!field! test!!the!antenna!performance!of!your!device,!vs.!a!perfect!reference.!Over!time!we!have! found!that!good!RF!performance!is!possible,!even!in!tight!enclosures,!if!we!work! cooperatively.! 40! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Antenna!Diversity! !$ Ceramic!antennas!can!work!well!but!may!sometimes!have!issues.!Careful!testing!must!be! done!to!ensure!desired!gains!and!radiation!patterns.!! !$ The!product!must!be!researched!in!conjunction!to!the!Access!Point,!its!deployment,!and!its! antenna!radiation!pattern.!Nominally!the!Access!Point!will!be!mounted!on!a!tower!or! mountain!with!a!downward!tilt.!The!nanoNode!and!System!may!be!mounted!vertically!or! horizontally—forcing!requirements!on!the!optimal!radiation!pattern!of!the!nanoNode.! !$ The!antenna!must!be!well!matched!and!with!low!loss!between!nanoNode!and!antenna.!It!is! important!to!follow!the!manufacturer’s!recommendations.!The!use!of!low!tolerance! ceramic!capacitors!and!low!tolerance!thin!film!inductors!are!recommended.!Examples! include!the!Murata!GJM!series!of!capacitors!and!LQP!series!of!inductors.!If!using!stripline!RF! port!feeds,!care!must!be!employed!to!ensure!low!loss!and!proper!impedance.!The!antenna! match!may!change!when!fully!integrated!into!a!product.!Is!advised!to!recheck!the!match! after!full!integration.!During!tuning!this!may!require!the!use!of!so!called!“RF!pigtails”!in!an! ad!hoc!fashion.!If!the!Bill!of!Materials!(BOM)!cost!will!allow,!a!special!connector!can!be! implemented!to!support!this!verification/optimization.! !$ Metallic!objects!nearby!to!the!antenna!can!affect!radiation!gains,!patterns,!and!power! match.!Typically!anything!within!about!4L5!inches!can!affect!the!match!significantly! particularly!if!the!nearby!metal!is!resonant!at!2.4!GHz.!A!little!pattern!distortion!usually!is! not!of!too!much!concern!unless!deep!wide!angular!nulls!in!the!antenna!pattern!results.! Other!types!of!pattern!distortion!can!be!caused!by!absorptive!losses!due!to!lossy!dielectrics! nearby!the!antenna,!which!represents!real!power!loss!dissipated!as!heat!in!the!loss!object.! This!represents!power!that!is!completely!lost!and!not!radiated!in!a!useful!direction.! !$ Noisy!System!clocks!with!harmonics!can!fall!into!the!operating!band!of!the!nanoNode!and! can!be!picked!up!by!the!antennas—degrading!sensitivity,!or!causing!Electromagnetic! Compatibility!(EMC)!regulatory!issues.! 9.2$Diversity!Considerations! The!operating!frequency!of!the!nanoNode!is!the!ISM!2.4!GHz!band.!This!has!a!wavelength!of! 12.3!cm!in!air.!For!optimal!null/peak!diversity!detection,!the!antennas!must!be!separated!by!at! least!2.5”!(5!cm).!It!is!a!good!idea!on!the!diversity!antenna!to!orient!it!90!degrees!from!the!main! antenna!in!order!to!improve!the!polarization!diversity!and!increase!spatial!deLcorrelation.! Practical!ground!planeLindependent!antennas!are!preferable!to!those!that!require!the!printed! circuit!board!(PCB)!copper!for!the!antenna!counterpoise.!Examples!of!these!are!dipole!antennas! and!some!chip!patch!antennas.!However!these!can!be!cost!adders!in!certain!cases.!It!should!be! noted!however!that!some!chip!antennas!that!use!the!PCB!for!ground!return!have!been!shown! to!produce!reasonable!performance.!!!!!! 41! 014L0065L00!Rev.!X3! ! 10$Regulatory!Considerations! The!nanoNode!uses!LGA!pads!for!its!RF!ports.!This!lowers!the!unit!cost!and!provides!greater! host!configuration!flexibility!in!the!final!application.!Modular!certifications!(FCC,!ISED,!ETSI,! Japan!and!others)!have!been!obtained!for!the!nanoNode.!The!existence!of!the!modular! certification!minimizes!cost!and!time!to!market!for!customers.!The!certification!documents!and! the!results!of!the!certification!tests!are!available!to!system!integrators!upon!request.! The!modular!certification!of!the!nanoNode!can!be!reLused!by!customers!that!utilize!an! equivalent!layout!and!stackLup!as!our!reference!design!platform.!Additional!testing!for! verification!purposes!may!still!be!required!per!FCC!or!other!regulatory!body!guidelines!and! requirements!but!will!vary!on!a!caseLbyLcase!basis.!Customers!are!advised!to!consult!with!the! regulatory!compliance!test!house!of!their!choice!for!the!best!way!to!proceed.! Additionally,!Ingenu!has!prepared!certification!guidelines!on!how!to!use!the!software!and! system!tools!required!for!certification.!Some!markets!(such!as!FCC/ISED)!are!fairly!straight! forward!for!certification!and!are!largely!TX!SpectrumLbased.!Other!markets!may!require!a! much!more!sophisticated!FER!process!involving!an!Access!Point!and!Quick!Start!System.!These! procedures!are!defined!in!the!document!entitled!EMC%Compliance%Guide%(01030037300).!This! document!also!includes!hints!and!recommendations!to!help!make!the!process!as!easy!as! possible.!For!more!information!about!this!document,!see!section!1.3:!References/Tools.! 10.1$Block!Diagram! Some!regulatory!domains!require!a!block!diagram!of!the!module!for!their!documentation! similar!to!that!shown!in!the!following!figure.! 42! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Regulatory!Considerations! Vbatt#2.2#V#–#5.5#V 3V3 1.8#V XO102 U500 32#kHz OSC JTAG U501 1.8#V# REG to# Oscillators microAsic U502 1.2#vback# REG to# microAsic# State# Machine ARM7#Subsystem U503 1.2#V# REG FET# Switch to# 3.3#V#to# microAsic# Radio,#CPU#I/Os Core 3.3#V (32Tbit#micoprocessor/CPU) U102 8#Mbit Flash 1.8#V XO101 26#MHz TXCO AFE 78 MHz U405 PHY 2.45#GHz Balun/BPF# Combo Rx#Path MAX2832 Radio ANT1&2'Ports 2402'/'2475.63'MHz U402 U400 Tx Path 3.3#V#Filtered PA XF400#LPF U401 DPDT RF#SW 2.45#GHz U403 Balun/BPF# Combo Figure&22.&nanoNode&Block&Diagram& 10.2$Antennas! This!nanoNode!has!two!antenna!ports!that!have!been!certified!to!operate!with!the!antennas! listed!below.!To!adhere!to!these!certifications!requires!the!antennas!to!be!of!the!types!specified! below!and!of!lower!gain.!In!all!instances,!the!combinations!of!nanoNode!maximum!transmit! power!and!antenna!gain!must!not!exceed!the!regulatory!Effective!Isotropic!Radiated!Power! (EIRP).!Antennas!that!are!not!of!the!specified!type!or!are!of!greater!gain!are!strictly!prohibited! for!use!with!the!nanoNode,!per!EMC!certifications.!The!required!antenna!impedance!is!50! ohms.! Table&7.&nanoNode:&EMC&Certified&Antennas& Application& Manufacturer& Part& Number& Gain& Type& Connector& Comment& FCC/ISED! All! Laird! 0600L 00012! 9!dBi! Monopol e! MMCX! ETSI,! Generic! Ethertronics!! 1001013! 2.1!dBi! Monopol e! Internal!PCB! chip!antenna! 10!dBm!EIRP! 43! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Regulatory!Considerations! Application& Manufacturer& Part& Number& Gain& Type& Connector& Comment& ETSI,!C.1! Laird! 0600L 00012! 5!dBi! Monopol e! MMCX! 27!dBm!EIRP! (per!EN!300!440!L 1!Annex!C.1)! must!not!be! exceeded! 10.2.1$Host!Antenna!Trace!Design! To!connect!RF!signal!from!the!module’s!RF!pins!to!the!antenna,!RF!connector,!or!matching! network,!50!ohmLcontrolled!impedance!traces!should!be!used.!Vias!may!be!used!to!transition! the!RF!from!one!signal!layer!to!another!signal!layer.! The!following!controlled!impedance!RF!traces!(i.e.,!microstrip!types)!are!allowed:! !$ Surface!microstrip! !$ Surface!coplanar!waveguide!(CPWG)! !$ Surface!groundLbacked!CPWG! !$ Embedded!microstrip! !$ Embedded!CPWG! !$ Embedded!groundLbacked!CPWG! !$ Stripline! !$ Asymmetrical!stripline! 10.2.2$Controlled!Impedance!Trace!Design! 10.2.2.1$Dimensions! The!controlled!impedance!trace!should!have!dimensions!that!correspond!to!50!ohm!±!10%!no! matter!what!the!specific!microstrip!type!is.!The!specific!design!depends!on!trace!width,! thickness,!dielectric!constant,!and!distance!to!grounds.!These!dimensional!factors!are! controlled!by!the!PCB!fabrication!shop.!From!a!design!perspective,!on!the!PCB!fabrication! drawing,!clearly!mark!that!the!microstrip!trace!requires!controlled!impedance!of!50!ohm!±!10%.!! Also!specify!that!the!PCB!shop!must!test!to!confirm!that!the!impedance!is!within!10%!of! 50!ohms.! 10.2.2.2$Ground!Planes!! All!microstrip!types!except!surface!CPWG!and!embedded!CPWG!requires!ground!planes!either! above!the!RF!trace,!below!the!RF!trace,!or!both!above!and!below!the!RF!trace.!!In!these!cases! with!ground!planes,!the!RF!trace!must!not!cross!any!splits!in!the!ground!plane.!!The!ground! plane!directly!above!and!below!the!RF!trace!must!be!continuous.! 44! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Regulatory!Considerations! 10.2.2.3$Matching!Network!!! A!matching!network!may!be!used!at!the!module’s!RF!pin!to!ensure!good!50!ohm!transition! between!the!host!board!and!the!module.!!Another!matching!network!may!be!used!on!the! antenna!side!of!the!controlled!impedance!trace!to!match!the!antenna!to!50!ohms.! 10.2.2.4$Stitching!Vias!! Ample!ground!stitching!vias!should!be!used!around!the!connectors,!trace,!and!module.!!It!is! recommended!that!a!via!stitching!pattern!be!used!with!no!more!than!0.25”!separation!between! adjacent!vias.! 10.2.2.5$Isolation!! Since!the!RF!signal!coming!from!the!module!has!already!been!filtered,!there!is!no!isolation! requirement.! 10.2.2.6$Example!RF!Trace!Design! The!following!figure!shows!surfaceLground!backed!CPWG!design!with!22!mil!trace!width,!15!mil! gapLtoLsurface!ground!plane,!2!mil!thick!top!layer!(1/2!oz!copper!+!plating),!14!mil!dielectric! thickness!to!solid!ground!plane!underneath,!and!a!FRL4!dielectric!constant!of!4.4.!!This! configuration!achieves!the!desired!50!ohm!±!10%!for!the!controlled!impedance.!Note!that!in! this!design,!a!piLmatching!network!exists!to!match!the!antenna.!This!is!recommended!but!not! necessary!if!the!antenna!is!already!matched!with!VSWR!of!1.5:1!or!better.!Note!that!antennas! should!not!have!gain!at!the!harmonic!frequencies!and!only!dipoleLtype!antennas!should!be! used.!Antennas!with!gain!at!the!fundamental!frequency!of!more!than!9!dBi!should!not!be!used.! Figure&23.&Controlled&Impedance&RF&Trace&Design& 45! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Regulatory!Considerations! Other!controlled!impedance!RF!trace!configurations!are!acceptable!as!long!as!the!characteristic! impedance!stays!within!the!boundary!limit!of!50!ohm!±!10%.!!Most!PCB!fabrication!shops!can! adjust!the!trace!width!of!the!controlled!impedance!traces!such!that!50!ohms!is!maintained.!!The! PCB!shop!must!guarantee!the!impedance!of!the!traces!to!within!the!50!ohm!±!10%!boundary! limit!by!impedance!testing!the!PCBs.! 10.3$Certifications! The!nanoNode!is!designed!to!meet!regulations!for!worldLwide!use.!It!is!certified!in!the!United! States,!Canada,!and!Europe!as!a!Limited!Single!Module.!!The!certifications!currently!achieved! are!listed!in!the!following!table.! Table&8.&nanoNode&Certifications& Country& Certifying&Agency& Certification(s)& United!States! Federal! Communications! Commission!(FCC)! !$ 15.247!for!RF!TX!bandwidth,!power,!conducted! and!radiated!emissions.! Canada! !Innovation,!Science! and!Economic! Development!Canada! (Formerly!Industry! Canada)! !$ RSS247,!includes!FCC!tests!and!ISEDLspecific! tests!(RX!radiated!emissions).! Europe! European! Telecommunications! Standards!Institute! (ETSI)! !$ 300!440L1!and!440L2,!ETSI!Emissions.! 301!489L1,!ETSI!Immunity.! !$ Additional!details!can!be!found!in!the!document!entitled!EMC%Compliance%Guide%(01030037300)! referenced!in!Chapter!1:!Overview.! The!integrator!of!the!final!product!is!often!required!to!do!additional!compliance!tests.!!The! integration!application!and!market!will!determine!specifics.!The!integrator!is!advised!to!consult! with!local!experts!in!compliance!certifications!for!complete!information.! !$ FCC/ISED! The!nanoNode!is!SingleLModular!Certified,!therefore!the!final!product!may!only!need!Class! B!unintentional!radiator!and!powerline!conducted!emissions!tests.!This!should!be!done!with! the!actual!production!antenna!and!power!supply.!Please!refer!to!appendix!B!for!PCB!design! considerations.! Customers!are!free!to!follow!one!of!three!paths!in!their!final!product!evaluations:! !$ Class!I!permissive!change:!Customers!can!use!one!of!Ingenu!approved!antenna!types!shown! above!that!are!of!equal!and!lesser!gain!along!with!the!antenna!PCB!reference!designs.!This! path!allows!customers!to!use!OnLRamp!Wireless’!certifications!(owned!by!Ingenu).!While! ideal!from!the!perspective!of!program!cost!and!schedule,!the!ability!to!reuse!this!antenna!is! highly!dependent!on!the!application.! 46! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Regulatory!Considerations! !$ Class!II!Permissive!change:!If!there!are!minor!changes!when!integrating!the!module!and! application!with!the!FCC!or!ISED!the!OnLRamp!Wireless!certifications!can!still!be!used.! These!changes!could!be!a!higher!antenna!gain,!different!PCB!characteristics,!or!collocated! transmitters!as!an!example.!!In!the!case!of!FCC/IC!EMC!certifications,!if!a!different!antenna! type!or!higher!gain!antenna!is!used,!it!is!required!that!the!final!product!be!recertified!with! the!nanoNode.! !$ New!FCC!ID:!Customers!can!obtain!a!new!FCC!ID!for!their!product!with!the!Ingenu! approved!modules.!In!this!case!it!is!up!to!the!manufacturer!of!the!host!equipment!to! arrange!certification.!Any!support!documentation!is!available!from!OnLRamp!Wireless.! NOTE:! For!customers!opting!to!re:certify!on!their!own!with!different!layout,!stack:ups,!and! antennas,!etc.,!it!is!important!that!the!nanoNode!is!presented!with!a!50Ω!load.!To! that!end,!it!is!recommended!that!the!RF!trace!from!the!nanoNode!to!the!antenna!be! outfitted!with!a!Pi!network,!near!the!antenna,!for!matching!during!the!development! phase!of!a!host!board.!! !$ ETSI! Europe’s!system!is!a!selfLdeclaration!system.!There!are!no!documents!to!submit!or! certification!grants!to!obtain.!One!must!have!the!passing!test!results!available!for!all! applicable!requirements!at!any!time!if!challenged.!The!nanoNode!has!been!verified!and! qualified!for!two!operational!scenarios!under!EN!300!440L1:!! "$ Generic!with!a!maximum!of!10!dBm!EIRP!(2402!–!2475.63!MHz)! "$ Annex!C.1!with!a!maximum!of!27!dBm!EIRP!(2447!–!2452.94!MHz)! The!actual!minimum/maximum!channel!frequencies!are!shown!below.! Table&9.&nanoNode&Minimum/Maximum&Channel&Frequencies&for&Annex&C.1& Applications& Node&Type& Minimum/Maximum&Channel&Frequencies& nanoNode! 2447!–!2452.94!MHz! !$ Other!countries!will!vary.! 10.4$FCC!Warnings! This!device!complies!with!part!15!of!the!Federal!Communications!Commission!(FCC)!Rules.! Operation!is!subject!to!the!following!two!conditions:!! 1.$ This!device!may!not!cause!harmful!interference.! 2.$ This!device!must!accept!any!interference!received,!including!interference!that!may!cause! undesired!operation.! Changes!or!modifications!not!expressly!approved!by!the!manufacturer!could!void!the!user’s! authority!to!operate!the!equipment.! 47! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! NOTE:& WARNING:& Regulatory!Considerations! This!equipment!has!been!tested!and!found!to!comply!with!the!limits!for!a!Class!B! digital!device,!pursuant!to!Part!15!of!the!FCC!Rules.!These!limits!are!designed!to! provide!reasonable!protection!against!harmful!interference!in!a!residential! installation.!! This!equipment!generates,!uses,!and!can!radiate!radio!frequency!energy.!If!not! installed!and!used!in!accordance!with!the!instructions,!this!equipment!may!cause! harmful!interference!to!radio!communications.!However,!there!is!no!guarantee! that!interference!will!not!occur!in!a!particular!installation.!If!this!equipment!does! cause!harmful!interference!to!radio!or!television!reception,!which!can!be! determined!by!turning!the!equipment!off!and!on,!the!user!is!encouraged!to!try!to! correct!the!interference!by!one!or!more!of!the!following!measures:! !$ Re:orient!or!relocate!the!receiving!antenna.! !$ Increase!the!separation!between!the!equipment!and!receiver.! !$ Connect!the!equipment!into!an!outlet!on!a!circuit!different!from!that!to!which! the!receiver!is!connected.! !$ Consult!the!dealer!or!an!experienced!radio/TV!technician!for!help.! 10.5$ISED!Warnings! CAN ICES-3 (B)/NMB-3(B) Canadian!Two!Part!Warning!Statement:!! The!installer!of!this!radio!equipment!must!ensure!that!the!antenna!is!located!or!pointed!so!that! it!does!not!emit!RF!field!in!excess!of!Health!Canada!limits!for!the!general!population.!Consult! Safety!Code!6!which!is!obtainable!from!Health!Canada’s!website!http://www.hcLsc.gc.ca/indexL eng.php.! This!device!complies!with!Innovation,!Science!and!Economic!Development!(ISED)!licenceL exempt!RSS!standard(s).!Operation!is!subject!to!the!following!two!conditions:!! (1)!this!device!may!not!cause!interference,!and!! (2)!this!device!must!accept!any!interference,!including!interference!that!may!cause!undesired! operation!of!the!device.! To!reduce!potential!radio!interference!to!other!users,!select!the!antenna!type!and!its!gain!so! that!the!equivalent!isotropically!radiated!power!(EIRP)!is!not!more!than!that!permitted!for! successful!communication.! L'installateur!de!cet!équipement!de!radio!doit!veiller!à!ce!que!l'antenne!est!située!ou!est!pointée! de!façon!à!ne!pas!dégager!de!champ!RF!dépassant!les!limites!de!Santé!Canada!pour!la! population!générale.!Consulter!le!Code!de!sécurité!6!qui!peut!être!obtenu!sur!le!site!Web!de! Santé!Canada!http://www.hcLsc.gc.ca/indexLeng.php! 48! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Regulatory!Considerations! Cet!appareil!se!conforme!aux!Cahiers!des!charges!sur!les!Normes!Radioélectriques!(CNR)! d'Industrie!Canada!applicables!aux!appareils!de!radio!exempté!de!licence.!!!Son!fonctionnement! se!soumis!aux!deux!conditions!suivantes!:!! (1)!l'appareil!ne!doit!pas!produire!d’!interférences,!et!! (2)!l'utilisateur!de!l'appareil!doit!accepter!tout!interférences!radioélectrique!subi,!même!si!les! interférences!sont!susceptible!d'en!compromettre!le!fonctionnement.!! Pour!réduire!les!interférences!radioélectrique!pour!les!autres!utilisateurs,!sélectionnez!le!type! d'antenne!et!son!gain!de!sorte!que!la!puissance!isotrope!rayonnée!équivalente!(PIRE)!ne!soit! pas!supérieure!à!celle!permise!pour!réussir!une!communication.! 10.6$ETSI!Warnings! None!known.! 10.7$Usage! This!device!is!only!authorized!for!use!in!fixed!and!mobile!applications.&!This!device!cannot!be! collocated!with!other!wireless!transmitters!without!performing!simultaneous!transmission! evaluation.!! nanoNode!RF!Certification!IDs:! !$ FCC!ID:!!XTELNODE103! !$ IC:!!8655ALNODE103! 10.7.1$Product!Labels! If!the!nanoNode!is!visible!in!a!product,!the!label!showing!the!FCC!ID!and!ISED!designators! (listed!above)!must!be!visible!from!the!exterior!of!the!product.!A!representative!nanoNode!label! is!shown!below.! Figure&24.&Product&Label&& If!the!nanoNode!is!contained!within!a!product!and!is!not!visible,!a!label!showing!the!FCC!ID!and! ISED!designators!(listed!above)!must!be!affixed!to!the!exterior!of!the!device!containing!the! nanoNode.!The!exterior!label!must!state!the!following:!! Contains(FCC(ID:(XTE0NODE103,(ISED:(8655A0(NODE103( 49! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Regulatory!Considerations! 10.7.2$RF!Exposure!Statement!! The!air!interface!supports!operation!on!channels!in!the!2402!MHz!–2475.63!MHz!range!for! FCC/ISED!and!ETSI!regulatory!domains.!!Before!the!nanoNode!becomes!operational,!it!must! undergo!a!Provisioning!procedure,!during!which!critical!information!required!for!operation!is! entered!into!the!device!and!stored!in!nonLvolatile!storage.!It!is!during!the!initial!commissioning! procedure!that!the!regulatory!domain,!under!which!the!device!will!operate,!is!set.!Subsequent! configuration!of!the!device!during!operation!is!checked!against!the!commissioned!regulatory! domain!and!nonLpermitted!channels!or!transmit!power!levels!are!rejected!and!the!device!will!not! transmit!until!a!permissible!configuration!per!the!commissioned!regulatory!domain!is!set.! 10.8$WEEE!Directive! The!WEEE!directives!do!not!apply!to!nanoNodes!as!they!are!not!considered!“end!products”!that! would!put!them!under!the!WEEE!initiatives!in!the!EU.!! 10.9$REACH!Directive! The!nanoNodes!are!REACH!compliant!under!1907/2006/EC.!This!certification!is!located!in! Appendix!D.! 10.10$RoHS!Directive! The!nanoNodes!comply!with!RoHS!directive!2002/95/EC.!Ingenu!has!received!Certificates!of! Conformance!(CoC)!for!all!components,!printed!circuit!boards,!and!contract!manufacturers!for! the!nanoNodes.!The!RoHS!Certification!of!Conformance!is!provided!in!Appendix!D.! 10.11$Export!Compliance! The!nanoNode!complies!with!the!export!requirements!of!the!Bureau!of!Industry!and!Security! and!relevant!information!is!provided!below.!For!details!relating!to!export!compliance!for!the! nanoNode,!refer!to!the!CCATS!numbers!provided!in!the!following!table.!!! Table&10.&ECCN&and&CCATS&Information& ECCN& CCATS& ECCN!5A002a.1! G164372! 50! 014L0065L00!Rev.!X3! ! 11$Manufacturing!Considerations! This!section!deals!with!manufacturing!details!such!as:! !$ Design!of!Host!PCB!for!mounting!the!nanoNode! !$ The!manufacturing!process!and!soldering!profile! !$ The!validation!and!configuration!of!the!nanoNode!after!the!assembly!process! 11.1$Mechanical!Outline! The!nanoNode!is!a!bottom!termination!component!(BTC)!that!is!designed!to!be!directly! surfaceLmounted!onto!a!Host!PCB.!All!signals!(including!power,!grounds,!RF,!and!digital! interface)!are!brought!through!the!30!bottom!terminations!of!the!module.!The!mechanical! outline!of!the!PCB!is!detailed!in!Appendix!G:!nanoNode!Mechanical!Drawing.! 11.2$Host!PCB!Constraints! For!Host!layout,!please!refer!to!Appendix!B:!PCB!Land!Pattern.!It!is!important!to!use!the! recommended!land!pattern!as!well!as!consider!coplanarity!of!the!Host!in!order!to!get!optimal! yield!in!manufacturing.!Coplanarity!is!defined!as!the!bow!and!twist!of!the!nanoNode!and!Host! PCBs.!Careful!measurements!of!the!nanoNode!have!been!made!such!that!it!meets!flatness! specifications.!! 11.3$Handling!Procedures!for!nanoNode! The!nanoNodes!are!packaged!in!trays!that!are!then!sealed!in!moistureLbarrier!bags.!The! nanoNode!printed!circuit!assemblies!are!moisture!sensitive!to!MSL!Class!III!per!IPC/JEDEC!JL STDL033.! The!nanoNode!is!manufactured!using!lead!free,!no!clean!processes.!It!is!recommended!that!the! module!not!be!washed!due!to!the!difficulty!of!ensuring!cleanliness!after!processing.! All!processes!used!to!manufacture!the!nanoNode!are!RoHS!compliant.!The!following!is! recommended:! !$ Solder!Type:!!SAC305!ROLO/No!Clean!per!IPC!JLSTDL004! !$ Solder!Wire!Type:!!SAC305!ROLO/No!Clean!per!IPCLJLSTDL006! !$ SMT!Reflow!Profile:!!Per!IPCL7530! !$ Workmanship:!!Per!IPCLAL610! !$ Cleaning!and!Cleanliness!Testing:!Per!JLSTDL001!(Requirements!for!Soldered!Electrical! Electronic!Assemblies)! 51! 014L0065L00!Rev.!X3! ! 12$Errata! Degraded&RF&Channels& Ingenu!and!our!partners!are!deploying!networks!globally.!We!carefully!manage!the!frequency! allocations!of!these!networks!to!avoid!using!the!3!(out!of!38!possible)!RF!channels!described! below.!Ingenu!networks!can!deploy!overlapping!coverage!(ie.!all!Access!Points)!on!a!single! 1MHz!RF!channel.!The!other!channels!are!held!in!reserve!for!future!use!or!special!cases.!Three! lower!performing!channels!are!listed!below,!for!reference.! The!nanoNode!uses!a!Channel!scheme!such!as!the!following:! !$ !$ !$ !$ Channel!1!=!2402!MHz!and!each!successive!channel!is!1.99!MHz!offset!to!that!Channel!1.! Channel!2!=!2403.99!MHz! Channel!3!=!2405.98!MHz! Etc.! The!nanoNode!uses!a!26!MHz!reference!clock!for!processing!and!for!the!direct!conversion! radio.!It!has!been!found!that!26!MHz!harmonics!can!create!strong!tones!that!cause!some!RF! sensitivity!degradation!on!these!harmonic!channels.! !$ !$ !$ 93*26!MHz!=!2418!MHz.!This!affects!channel!9.! 94*26!MHz!=!2444!MHz.!This!affects!channel!22.! 95*26!MHz!=!2470!MHz.!This!affects!channel!35.! System!integrators!should!NOT!use!these!3!channels!as!nanoNode!RX!sensitivity!can!be! degraded!by!a!nominal!3L10!dB.! 52! 014L0065L00!Rev.!X3! ! Appendix!A$Abbreviations!and!Terms! Abbreviation/Term& Definition& ACPR! Adjacent!Channel!Power!Ratio! AGC! Automatic!Gain!Control! ALC! Automatic!Level!Control! AP! Access!Point! API! Application!Programming!Interface! ASIC! ApplicationLSpecific!Integrated!Circuit! ATE! Automated!Test!Equipment! BOM! Bill!of!Materials! BW! Bandwidth! CCATS! Commodity!Classification!Automated!Tracking!System.!An! alphanumeric!code!assigned!by!the!Bureau!of!Industry!and!Security! (BIS)!to!products!that!it!has!classified!against!the!Export! Administration!Regulations!(EAR).! CMOS! Complementary!MetalLOxideLSemiconductor! CPOL! Clock!Polarity!(for!SPI)! CPU! Central!Processing!Unit! DBPSK! Differential!Binary!Phase!Shift!Keying! DFS! Dynamic!Frequency!Selection! DPLL! Digital!PhaseLLocked!Loop! DSSS! Direct!Sequence!Spread!Spectrum! EIRP! Effective!Isotropic!Radiated!Power! EMC! Electromagnetic!Compatibility! ESD! Electrostatic!Discharge! ESR! Equivalent!Series!Resistance! ETSI! European!Telecommunications!Standards!Institute! EVM! Error!Vector!Magnitude! FCC! Federal!Communications!Commission! FER! Frame!Error!Rate! GND! Ground! GPIO! General!Purpose!Input/Output! HBM! Human!Body!Model! ISED!!(IC)! Innovation,!Science!and!Economic!Development!Canada!(Formerly! Industry!Canada! IIP3! Input!ThirdLOrder!Intercept!Point! 53! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Abbreviations!and!Terms! Abbreviation/Term& Definition& LDO! Low!Drop!Out! LNA! Low!Noise!Amplifier! LO! Local!Oscillator! MISO! Master!Input,!Slave!Output! MM! Machine!Model! MOSI! Master!Output,!Slave!Input! MRQ! Master!Request! MSL! Moisture!Sensitivity!Level! nanoNode! A!small!form!factor,!wireless!network!module!developed!by!Ingenu! that!works!in!combination!with!various!devices!and!sensors!and! communicates!data!to!an!Access!Point.! Node! The!generic!term!used!interchangeably!with!nanoNode.! OTA! OverLtheLAir! Po! “Power!Output”!for!the!RF!Transmitter! PA!! Power!Amplifier! PAPR! PeakLtoLAverage!Power!Ratio! PCB! Printed!Circuit!Board! POR! Power!On!Reset! QoS! Quality!of!Service! RF! Radio!Frequency! RFIC! Radio!Frequency!Integrated!Circuit! RMA! Return!Merchandise!Authorization! RoHS! Restriction!of!Hazardous!Substances! RPMA! Random!Phase!Multiple!Access.!The!Ingenu!proprietary!wireless! communication!technology!and!network.! RPLSMA! !Reverse!Polarity!Subminiature!version!A!connector! RSSI! Receive!Signal!Strength!Indicator! RT! Remote!Terminal! RTC! Real!Time!Clock! RX! Receive/Receiver! SCLK! Serial!Clock! SMT! Surface!Mount!Technology! SNR! SignalLtoLNoise!Ratio! SPI! Synchronous!Peripheral!Interface! SRAM! Static!Random!Access!Memory! SRDY! Slave!Ready! SRQ! Slave!Request! 54! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! Abbreviations!and!Terms! Abbreviation/Term& Definition& TCXO! Temperature!Compensated!Crystal!Oscillator! TX! Transmit/Transmitter! UART! Universal!Asynchronous!Receiver/Transmitter! VCO! Voltage!Controlled!Oscillator! VSWR! Voltage!Standing!Wave!Ratio! XO! Crystal!Oscillator! 55! 014L0065L00!Rev.!X3! ! Appendix!B$PCB!Land!Pattern!and!Keepouts! Figure&25.&nanoNode&PCB&Land&Pattern& 56! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! PCB!Land!Pattern!and!Keepouts! Figure&26.&nanoNode&PCB&Land&Pattern&Keepouts&&& 57! 014L0065L00!Rev.!X3! ! Appendix!C$nanoNode/microNode!Pin!Comparison! The!following!table!provides!a!pin!comparison!between!the!nanoNode!and!the!microNode.! Table&11.&nanoNode/microNode&Pin&Comparison& microNode& Pin&#& Name& nanoNode& Pin&#& Signal&Direction& Relative&to& nanoNode& Signal& Type& Comment& microNode&to& nanoNode& Comparison& L! 1! WAKE! CMOS_O! Output!of! nanoNode!to! indicate!Awake! (RX/TX!=!High)!or! Sleep!mode! (WAKE!=!Low)! nanoNode!uses!this! to!control!external! 3.3V!power! supplies,!but!is!not! applicable!for! microNode! 1,!2,!3,!4,!7,! 10,!11,14,! 17,!20,!21,! 26,!30,!31,! 34,!35,!37,! 38,!40! Ground! 2,!5,!8,!11,! 14,!17,!20,! 23,!24,!26,! 28,!29,!30! Power! Power! Ground!return.! Should!be!low!RF! impedance!to!a! solid!ground!plane! of!the!Host! Same! 5,!6! VBATT! Power! Power! Input!power,!2.2L 5.5V.! Same! L! L! 4! Power! Power! POWER! 3.3!Volts,!unique!to! nanoNode! 8! SRQ! 18! Output! CMOS_O! Slave!Request! Same! 9! SRDY! 19! Output! CMOS_O! Slave!Ready! Same! 12! SCLK! 6! Input! CMOS_I! SPI!Clock! Same! 13! MISO! 7! Output! CMOS_O! SPI!Master!Input! Slave!Output! Same! 15! CS! 9! Input! CMOS_I! SPI!Chip!Select! Same! 58! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! nanoNode/microNode!Pin!Comparison! microNode& Pin&#& Name& nanoNode& Pin&#& Signal&Direction& Relative&to& nanoNode& Signal& Type& Comment& microNode&to& nanoNode& Comparison& 16! MOSI! 10! Input! CMOS_I! SPI!Master!Output! Slave!Input! Same! 18! MRQ! 12! Input! CMOS_I! Master!Request! Same! 19! 3V3! 4! Power:! !$ microNode:! output! !$ nanoNode:! Input! Power! Power! 22! RESET_N! N/A! !$ OC_1! RESET!input! Different:! !$ The!microNode! supplies!a! nominal!3.3V!!T/R! switch.! !$ The!nanoNode! requires!this!as!an! input.! Different:! !$ microNode!has! this!pin! !$ nanoNode!does! not!have!this!pin! Different:! !$ microNode!has! this!pin! !$ nanoNode!does! not!have!this!pin! !$ MicroNode:! Input! nanoNode:! N/A! 23! USTATUS! N/A! I/O! CMOS_O,! CMOS_I! USTATUS.!To!be! used!by!the! nanoNode!as!a! GPIO.!Undefined! at!this!time.!Float! for!now.! 24! POWER_ON! 21! Input! CMOS_A! This!is!used!to!turn! ON/OFF!the! Internal!Power! supplies!of!the! nanoNode.! Same! 25! ANT_SEL! N/A! Output! CMOS_O! This!is!used!by!the! nanoNode!to! control!its! antennas!for! diversity.!! Different:! !$ microNode!has! this!pin! !$ nanoNode!does! not!have!this!pin! 27! UART_SIN! N/A! Input! CMOS_I! UART!Serial!input.! Not!supported!at! this!time.! 28! UART_SOUT! N/A! Output! CMOS_O! UART!Serial! output.!Not! supported!at!this! time.! Different:! !$ microNode!has! this!pin! !$ nanoNode!does! not!have!this!pin! Different:! !$ microNode!has! this!pin! !$ nanoNode!does! not!have!this!pin! 59! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! nanoNode/microNode!Pin!Comparison! microNode& Pin&#& Name& nanoNode& Pin&#& Signal&Direction& Relative&to& nanoNode& Signal& Type& Comment& microNode&to& nanoNode& Comparison& 29! TOUT! 13! Output! CMOS_O! TOUT!is!a! normally!low! signal!that!pulses! high!in!response!to! specific!Network! Timing!Events! Same! 32! RF_PAEN_EX T! N/A! Input! CMOS_I! This!is!used!to! force!the!PA!off.!It! is!internally!pulled! low.!Do!not! connect!at!this! time.! Different:! !$ microNode!has! this!pin! !$ nanoNode!does! not!have!this!pin! 33! RF_TXENA! 22! Output! CMOS_O! This!signal!is!used! to!indicate!status! of!the!Power! Amplifier!for!the! nanoNode:!! Low!=!OFF! High!=!Enabled! (Transmitting)! Same! 36! RF1! 25!(RF1),! 27!(RF2)! RF!RX/TX! 50!Ohm! This!is!the!RF! input/output!for! the!nanoNode.!It!is! a!50!Ohm! castellated!“pin.”! !$ microNode!has! 39! RF_SHDN! RF!Shutdown! CMOS_O! This!pin!indicates! the!status!of!the! RF!Transceiver!for! the!nanoNode:!! Low!=!Shutdown! High!=!Active! N/A! TIME_QUAL! 15! Output! CMOS_O! This!pin!is!used!by! the!Extender!for! NodeLbased! timing!derivation.! this!pin! !$ nanoNode!has! two!ports:!RF1! (primary)!and! ANT2!(secondary! Same! !$ microNode!does! not!have!this!pin! !$ nanoNode!has! this!pin.!Do!Not! Connect.! 1.$ OC_1! 2.$ CMOS_A! a.$ The!CMOS_A!pin!is!used!to!control!two!Analog!Regulators!and!their!Enable!pins.!! b.$ The!pin!has!hysteresis.! !$ Going!High!(Active):!!V!input!High!is!1.2V!! 60! 014L0065L00!Rev.!X3! nanoNode!Integration!Specification!L!Preliminary! nanoNode/microNode!Pin!Comparison! Going!Low!(OFF):!!V!input!Low!is!0.4V! !$ c.$ When!the!nanoNode!is!ON,!this!pin!consumes!a!nominal!0.2!µA!but!as!maximum!of!2!µA!over!the! entire!temperature!range.! 3.$ CMOS_I! The!Node!input!voltages!are!3.3V!CMOS!levels.!VIH!=!2.0V!(minimum)!and!VIL!=!0.8V!(maximum).! 4.$ CMOS_O! The!Node!output!voltages!are!3.3V!CMOS!levels!(4mA).!VOH!=!2.4V!(minimum)!and!VOL!=!0.4V! (maximum).! 5.$ SPI!inputs!to!the!node!(SCLK,!MOSI,!CS)!must!be!triLstated!or!driven!low!when!the!node!may!be! sleeping!(MRQ!and!SRQ!are!both!low).!See!section!5:!SPI!Interface!and!Sequences!for!more!details.! 61! 014L0065L00!Rev.!X3! ! Appendix!D$REACH!and!RoHS!Compliance! !!! 62! 014L0065L00!Rev.!X3! ! Appendix!E$RMA!Process! For!full!details!about!the!Return!Material!Authorization!(RMA)!process,!refer!to!the!document!entitled! Return%Material%Authorization%Procedure%(00830013300).To!obtain!an!RMA%Request%Form,!contact!your! Ingenu!representative!and!request!document!number!00730003300.% 63! 014L0065L00!Rev.!X3! Appendix!F!Application!Diagrams/Schematics! The!diagrams/schematics!in!this!appendix!are!provided!as!examples.! Figure'27.'Powered'Example''' Figure'28.'Lithium'Battery'Example' Appendix!G!nanoNode!Mechanical!Drawing! The!mechanical!drawing!provides!the!dimensions!of!the!nanoNode!only!and!does!not!reflect!the!current!labeling!of!the!product.! Figure'29.'nanoNode'Mechanical'Dimensions'
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