Jorjin Technologies WG7833B0 Wireless Module User Manual WG7833BEM2B DTS D02 20150731

Jorjin Technologies Inc. Wireless Module WG7833BEM2B DTS D02 20150731

Contents

User Manual III

Copyright © JORJIN TECHNOLOGIES INC. 2014
http://WWW.JORJIN.COM.TW
CONFIDENTIAL
a module solution provider
WG7833BEM2B
M.2 Type2226 Module
TI WL1833 IEEE 802.11a/b/g/n solution
BT/BLE Solution
Datasheet
Draft 0.2
Doc No: WG7833BEM2B-DTS-D02
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http://WWW.JORJIN.COM.TW
CONFIDENTIAL
Page 1
Index
1. OVERVIEW ................................................................................................................................... 3
1.1. G
ENERAL
F
EATURES
................................................................................................................. 3
2. FUNCTIONAL FEATURES ............................................................................................................ 4
2.1. M
ODULE
B
LOCK
D
IAGRAM
..................................................................................................... 4
2.2. B
LOCK
F
UNCTIONAL
F
EATURE
.................................................................................................. 5
2.2.1. WLAN Features .......................................................................................................... 5
2.2.2. Bluetooth Features.................................................................................................... 5
2.2.3. BLE Features ................................................................................................................ 6
2.2.4. ANT Features .............................................................................................................. 6
3. MODULE OUTLINE ....................................................................................................................... 7
3.1. S
IGNAL
L
AYOUT
(T
OP
V
IEW
).................................................................................................... 7
3.2. P
IN
D
ESCRIPTION
..................................................................................................................... 8
4. MODULE SPECIFICATION ....................................................................................................... 11
4.1. G
ENERAL
M
ODULE
R
EQUIREMENTS AND
O
PERATION
............................................................ 11
4.1.1. Absolute Maximum Ratings
(1)
............................................................................. 11
4.1.2. Recommended Operating Conditions ............................................................ 12
4.1.3. External Slow Clock Input (SLOW_CLK) ............................................................ 13
4.2. WLAN
RF
P
ERFORMANCE
.................................................................................................... 14
4.2.1. WLAN 2.4-GHz Receiver Characteristics .......................................................... 14
4.2.2. WLAN 2.4-GHz Transmitter Power ....................................................................... 15
4.2.4. WLAN 5-GHz Transmitter Power .......................................................................... 17
4.3. B
LUETOOTH
RF
P
ERFORMANCE
............................................................................................. 18
4.3.1. BT Receiver Characteristics, In-Band Signals .................................................. 18
4.3.2. BT Receiver Characteristics – General Blocking ............................................ 19
4.3.3. BT Receiver Characteristics –BR, EDR Blocking Per Band ............................ 19
4.3.5. BT Transmitter, EDR .................................................................................................. 20
4.3.6. BT Modulation, BR ................................................................................................... 20
4.3.7. BT Modulation, EDR ................................................................................................ 21
4.3.8. BT BR, EDR Transceiver - Emissions ...................................................................... 21
4.3.9. BT BR Transceiver - Spurs........................................................................................ 22
4.3.10. BT EDR Transceiver - Spurs ..................................................................................... 22
4.4. BT
LE
RF
P
ERFORMANCE
........................................................................................................... 23
4.4.1. BT LE Receiver Characteristics, In-Band Signals ....................................................... 23
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4.4.3. BT LE Transmitter Characteristics .............................................................................. 23
4.4.4. BT LE Modulation Characteristics ....................................................................... 24
4.4.6. BT LE Transceiver - Spurs ........................................................................................ 24
4.5. ANT
P
ERFORMANCE
............................................................................................................. 25
4.5.1. ANT Receiver Characteristics, In-Band Signals ............................................... 25
4.5.2. ANT Transmitter Characteristics .......................................................................... 25
4.6. POWER
CONSUMPTION ....................................................................................................... 26
5. HOST INTERFACE TIMING CHARACTERISTICS .................................................................... 29
5.1. WLAN
SDIO
T
RANSPORT
L
AYER
................................................................................................. 29
5.2. SDIO
T
IMING
S
PECIFICATIONS
..................................................................................................... 30
5.3. HCI
UART
S
HARED
T
RANSPORT
L
AYERS FOR
A
LL
F
UNCTIONAL
B
LOCKS
(E
XCEPT
WLAN) ....................... 32
5.4. UART
T
IMING
S
PECIFICATIONS
.................................................................................................... 33
5.5. B
LUETOOTH
C
ODEC
-PCM(A
UDIO
)
T
IMING
S
PECIFICATIONS
.............................................................. 34
6. CLOCK AND POWER MANAGEMENT .................................................................................. 36
6.1. R
ESET
-P
OWER
-U
P
S
YSTEM
......................................................................................................... 36
6.2. WLAN
P
OWER
-U
P
S
EQUENCE
.................................................................................................... 36
6.3. B
LUETOOTH
/BLE/ANT
P
OWER
-U
P
S
EQUENCE
.............................................................................. 37
7. REFERENCE SCHEMATIC ......................................................................................................... 38
7.1. M
ODULE
R
EFERENCE
D
ESIGN
................................................................................................ 38
8. DESIGN RECOMMENDATIONS .............................................................................................. 39
8.1. D
ESIGN
N
OTE ON
D
EBUG
P
ORT
............................................................................................ 39
8.2. M
ODULE
L
AYOUT
R
ECOMMENDATIONS
................................................................................. 39
9. PACKAGE INFORMATION ...................................................................................................... 41
9.1. NGFF
T
YPE
2226
S
PECIFICATION FROM
PCI-
E
M.2_R
EV
1.0 ............................................... 41
9.2. WG7833BEM2A
M
ODULE
D
RAWING
................................................................................ 43
9.3. RF
C
ONNECTOR
................................................................................................................... 43
10. SMT AND BAKING RECOMMENDATION ......................................................................... 44
10.1. B
AKING
R
ECOMMENDATION
............................................................................................. 44
10.2. SMT
R
ECOMMENDATION
.................................................................................................. 44
11. HISTORY CHANGE ............................................................................................................... 45
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1. OVERVIEW
WG7833BEM2B, a WiFi, BT, BLE combo module, is the most demanded design for mobile devices,
Audio, Computer, PDA and embedded system applications with Wilink8 solution from TI.
1.1.
General Features
WLAN, Bluetooth, BLE, ANT with Integrated RF Front-End Module (FEM), Power Amplifier (PA),
and Power Management on a Single Module
M.2 Type2226 LGA package
Dimension 26mm(L) x 22.0mm(W) x 2.6mm(H)
Provides efficient direct connection to battery by employing several integrated switched mode
power supplies (DC2DC).
Seamless Integration with TI Sitara™ and Other Application Processors
WLAN and BT/BLE/ANT cores are software and hardware compatible with prior WL127x and
WL128x offerings, for smooth migration to device.
Shared HCI transport for BT/BLE/ANT over UART and SDIO for WLAN.
Temperature detection and compensation mechanism ensures minimal variation in RF
performance over the entire temperature range.
BT 4.0, BLE, ANT and all audio processing features work in parallel and include full coexistence
with WLAN
Operating temperature: –40°C to 85°C
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2. FUNCTIONAL FEATURES
2.1.
Module Block Diagram
Figure 2-1. WG7833BEM2B Block Diagram
WLAN
BT
WiLink8
SW
WG7833-B0
SW
WLAN 2.4G
WL 5G TX
WL 5G RX
BPF
BT
Power
Management
SLOW CLK
VBAT_IN
1V8 LDO
BPF
WG7833BEM2B M.2 Type2226
ANT2
ANT1
SDIO (WLAN)
PCM (
BT
)
GPIO / DBG
UART (BT)
26MHz
TCXO
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2.2.
Block Functional Feature
2.2.1. WLAN Features
Integrated 2.4 & 5G GHz Power Amplifier (PA) for WLAN solution
WLAN Baseband Processor and RF transceiver Supporting IEEE Std 802.11b/g/n
WLAN 2.4GHz SISO (20/40 MHz channels)
Baseband Processor
IEEE Std 802.11a/b/g/n data rates and IEEE Std 802.11n data rates with 20 or 40
MHz SISO.
Fully calibrated system. Production calibration not required.
Medium Access Controller (MAC)
Embedded ARM™ Central Processing Unit (CPU)
Hardware-Based Encryption/Decryption using 64-, 128-, and 256-Bit WEP, TKIP
or AES Keys,
Supports requirements for Wi-Fi Protected Access (WPA and WPA2.0) and IEEE
Std 802.11i [includes hardware-accelerated Advanced Encryption Standard
(AES)]
Designed to work with IEEE Std 802.1x
IEEE Std 802.11d,e,h,i,k,r PICS compliant.
New advanced co-existence scheme with BT/BLE/ANT.
2.4 GHz Radio
Internal LNA and PA
Supports: IEEE Std 802.11a, 802.11b, 802.11g and 802.11n
Supports 4 bit SDIO host interface, including high speed (HS) and V3 modes.
2.2.2. Bluetooth Features
Supports Bluetooth 4.0 as well as CSA2
Includes concurrent operation and built -in coexisting and prioritization handling of
Bluetooth, BLE, ANT, audio processing and WLAN
Dedicated Audio processor supporting on chip SBC encoding + A2DP:
Assisted A2DP (A3DP) support - SBC encoding implemented internally
Assisted WB-Speech (AWBS) support - modified SBC codec implemented internally
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2.2.3. BLE Features
Fully compliant with BT4.0 BLE dual mode standard
Support for all roles and role-combinations, mandatory as well as optional
Supports up to 10 BLE connections
Independent buffering for LE allows having large number of multiple connections without
affecting BR/EDR performance
2.2.4. ANT Features
Fully compliant with all ANT Protocols:
ANT solution optimized for the fitness and health use-cases
Simple to complex network topologies
Supports high-resolution proximity pairing
The ANT protocol has been designed to very power-efficient, yet is flexible enough to support
various network topologies (point-to-point, star, 1-to-N, N-to-1) and data transfer modes
(broadcast, broadcast with acknowledge, mass data transfer). Each logical ANT channel can be
independently configured for 1-way or 2-way operation
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3. MODULE OUTLINE
3.1.
Signal Layout (Top View)
Figure 3-1 Device pins
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3.2.
Pin Description
Table 3-1. Pin Description
Pin No.
Signal Name Type
Shut
Down
state
After
Power
Up
(1)
Voltage
Level
Description
1 3.3V POW VBAT Power supply input, 2.9 to 4.8 V.
2 3.3V POW VBAT Power supply input, 2.9 to 4.8 V.
3 GND GND Ground.
4 RESERVED - No connection.
5 ALERT# - No connection.
6 I2C_CLK - No connection.
7 I2C_DATA - No connection.
8 COEX1 - No connection.
9 COEX2 - No connection.
10 COEX3 - No connection.
11 RESERVED I/O PD PD 1.8V WL_RS232_RX. Reserved for debug only.
12 RESERVED I/O PD PD 1.8V WL_RS232_TX. Reserved for debug only.
13 RESERVED - No connection.
14 GND GND Ground.
15 RESERVED - No connection.
16 RESERVED - No connection.
17 GND GND Ground.
18 RESERVED - No connection.
19 RESERVED - No connection.
20 GND GND Ground.
21 RESERVED - No connection.
22 RESERVED - No connection.
23 GND GND Ground.
24 SLOWCLK_32kHz ANA 3.3V Input Sleep clock: 32.768 KHz
25 W_DISABLE1# - No connection.
26 PEWAKE# - No connection.
27 CLKREQ# - No connection.
28 PERST# - No connection.
29 GND GND Ground.
30 REFCLKn0 - No connection.
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31 REFCLKp0 - No connection.
32 GND GND Ground.
33 PETn0 - No connection.
34 PETp0 - No connection.
35 GND GND Ground.
36 PERn0 - No connection.
37 PERp0 - No connection.
38 GND GND Ground.
39 VENDOR DEFINED - No connection.
40 VENDOR DEFINED - No connection.
41 VENDOR DEFINED - No connection.
42 SDIO RESET# IN PD PD 1.8V WL_EN, Mode setting: High = enable
43 SDIO WAKE# OUT PD 0 1.8V
SDIO available, interrupt out. Active high. (For
WL_RS232_TX/RX pull up at power up)
44 SDIO DATA3 IO HiZ PU 1.8V
WLAN SDIO Data bit 3. Changes state to PU at
WL_EN or BT_EN assertion for card detects. Later
disabled by software during initialization.
(2)
45 SDIO DATA2 IO HiZ HiZ 1.8V WLAN SDIO Data bit 2
(2)
46 SDIO DATA1 IO HiZ HiZ 1.8V WLAN SDIO Data bit 1
(2)
47 SDIO DATA0 IO HiZ HiZ 1.8V WLAN SDIO Data bit 0
2)
48 SDIO CMD I/O HiZ HiZ 1.8V WLAN SDIO Command
(2)
49 SDIO CLK IN HiZ HiZ 1.8V WLAN SDIO Clock. Must be driven by the host.
50 UART WAKE# OUT PD PD 3.3V
Bluetooth Host Wake. Open Drain, Active Low.
Require pull up on the host side. (recommended
15K to 100K )
51 UART CTS IN PU PU 1.8V UART CTS from Host.
52 UART TX OUT PU PU 1.8V UART TX to Host.
53 UART RX IN PU PU 1.8V UART RX from Host.
54 UART RTS OUT PU PU 1.8V UART RTS to Host.
55 PCMFR1 OUT PD PD 1.8V Bluetooth PCM/I2S Bus. Frame sync.
56 PCMIN IN PD PD 1.8V Bluetooth PCM/I2S Bus. Data in.
57 PCMOUT OUT PD PD 1.8V Bluetooth PCM/I2S Bus. Data out.
58 PCMCLK OUT PD PD 1.8V Bluetooth PCM/I2S Bus. Clock.
59 GND GND Ground.
60 W_DISABLE2# IN PD PD 3.3V BT_EN, Mode setting: High = enable
61 LED2# - No connection.
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62 LED1# - No connection.
63 RESERVED - No connection.
64 GND GND Ground.
65 USB_D- - No connection.
66 USB_D+ - No connection.
67 GND GND Ground.
68 3.3V POW VBAT Power supply input, 2.9 to 4.8 V.
69 3.3V POW VBAT Power supply input, 2.9 to 4.8 V.
70 GND GND Ground.
71 GND GND Ground.
72 GND GND Ground.
73 GND GND Ground.
74 GND GND Ground.
75 GND GND Ground.
76 GND GND Ground.
77 GND GND Ground.
78 GND GND Ground.
79 GND GND Ground.
80 GND GND Ground.
81 GND GND Ground.
82 GND GND Ground.
83 GND GND Ground.
84 GND GND Ground.
85 GND GND Ground.
86 GND GND Ground.
87 GND GND Ground.
88 GND GND Ground.
89 GND GND Ground.
90 UIM_POWER_SRC/GPIO1
- No connection.
91 UIM_POWER_SNK - No connection.
92 UIM_SWP - No connection.
G1~G35
GND GND Ground.
(1) PU=pull up; PD=pull down.
(2) Host must provide PU for all non-CLK SDIO signals
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4. MODULE SPECIFICATION
4.1.
General Module Requirements and Operation
4.1.1. Absolute Maximum Ratings
(1)
1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated
under “operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
2) 5.5V up to 10s cumulative in 7 years, 5V cumulative to 250s, 4.8V cumulative to 2.33 years - all includes charging
dips and peaks.
3) Operating free-air temperature range. The device can be reliably operated for 7 years at ambient of 85°C, assuming
25% active mode and 75% sleep mode (15,400 cumulative active power-on hours).
4) Electrostatic discharge (ESD) to measure device sensitivity/immunity to damage caused by electrostatic discharges
into device.
5) Level listed is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500V HBM allows
safe manufacturing with a standard ESD control process, and manufacturing with less than 500V HBM is possible if
necessary precautions are taken. Pins listed as 1000V may actually have higher performance.
6) Level listed is the passing level per EIA-JEDEC JESD22-C101E. JEDEC document JEP157 states that 250 V CDM allows
safe manufacturing with a standard ESD control process, and manufacturing with less than 250V CDM is possible if
necessary precautions are taken. Pins listed as 250 V may actually have higher performance
Parameter Value Units
VBAT -0.5 to 5.5
(2)
V
Input voltage to Analog pins -0.5 to 2.1 V
Input voltage limits (CLK_IN) -0.5 to 4.6 V
Input voltage to all other pins -0.5 to 2.3 V
Operating ambient temperature range -40 to +85
(3)
°C
Storage temperature range -55 to +125 °C
ESD Stress Voltage
(4)
Human Body Model
(5)
>1000
ESD Stress Voltage
(4)
Charged Device Model
(6)
>250 V
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4.1.2. Recommended Operating Conditions
Parameter Condition Sym Min Max Units
VBAT
(1)
DC supply range
for all modes
2.9 4.8 V
IO high-level input voltage VIH 1.17 1.8
IO low-level input voltage VIL 0 0.63
Enable inputs high-level input
voltage
VIH_EN
1.365 1.8
Enable inputs low-level input
voltage
VIL_EN
0 0.4
High-level output voltage @ 4 mA VOH 1.35 1.8
@ 1 mA 1.688 1.8
@ 0.3 mA 1.767 1.8
Low-level output voltage @ 4 mA VOL 0 0.45
@ 1 mA 0 0.112
@ 0.09 mA 0 0.01
Input transitions time Tr/Tf from
10% to 90% (Digital IO)
(2)
Tr/Tf 1 10 ns
Output rise time from 10% to 90%
(Digital pins)
(2)
CL < 25 pF Tr 5.3 ns
Output fall time from 10% to 90%
(Digital pins)
(2)
CL < 25 pF Tf 4.9
Ambient operating temperature -40 85 ºC
Maximum power dissipation WLAN operation
2.8 W
BT operation 0.2
(1) 4.8V is applicable only for 2.3 years (30% of the time). Otherwise, the maximum VBAT should not exceed 4.3V.
(2) Applies to all Digital lines except SDIO, UART, I2C, PCM and slow clock lines
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4.1.3. External Slow Clock Input (SLOW_CLK)
The supported digital slow clock is 32.768 kHz digital (square wave).
Parameter Condition Sym Min. Typ. Max. Units
Input slow clock Frequency 32.768 KHz
Input slow clock accuracy
(Initial + temp + aging)
WLAN, BT +/-250
ppm
ANT +/- 50
Input Transition time Tr/Tf
- 10% to 90%
Tr/Tf 100 ns
Frequency input duty Cycle 15 50 85 %
Input Voltage Limits Square Wave,
DC-coupled
Vih 2 VBAT
Vpeak
Vil 0 0.8
Input Impedance 1
Input Capacitance 5 pF
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4.2.
WLAN RF Performance
4.2.1. WLAN 2.4-GHz Receiver Characteristics
Parameter Condition Min Typ Max Units
Operation frequency range 2412 2484 MHz
Sensitivity
20MHz Bandwidth
At < 10% PER limit
1 Mbps DSSS -95.8 -92.9 dBm
2 Mbps DSSS -92.7 -90
5.5 Mbps CCK -90.1 -87.4
11 Mbps CCK -87.4 -85.2
6 Mbps OFDM -91.5 -88.7
9 Mbps OFDM -89.9 -87.2
12 Mbps OFDM -89 -86.3
18 Mbps OFDM -86.7 -84
24 Mbps OFDM -83.6 -80.9
36 Mbps OFDM -80.2 -77.5
48 Mbps OFDM -76 -73.3
54 Mbps OFDM -74.4 -71.9
MCS0 MM 4K -89.9 -86.9
MCS1 MM 4K -87.1 -84.4
MCS2 MM 4K -85.4 -82.7
MCS3 MM 4K -82.3 -79.6
MCS4 MM 4K -78.9 -76.2
MCS5 MM 4K -74.7 -72
MCS6 MM 4K -73 -70.3
MCS7 MM 4K -71.9 -69.2
MCS0 MM 4K 40MHz -86.9 -82.2
MCS7 MM 4K 40MHz -68.5 -65
Max Input Level
At < 10% PER limit
OFDM(11g/n) -19 -9
dBm
CCK -4 -0
Adjacent channel rejection
Sensitivity level +3dB for OFDM, Sensitivity
level +6dB for 11b
2Mbps DSSS 42.7
dBm
11Mbps CCK 37.9
54Mbps OFDM 2.0
LO Leakage -80 dBm
PER Floor 1.0 2.0 %
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4.2.2. WLAN 2.4-GHz Transmitter Power
Parameter
Condition
Min Typ Max
Output Power
- Maximum RMS output power
measured at 1dB from IEEE
spectral mask or EVM
1 Mbps DSSS 14.5 16.5 dBm
2 Mbps DSSS 14.5 16.5
5.5 Mbps CCK 14.5 16.5
11 Mbps CCK 14.5 16.5
6 Mbps OFDM 14.5 16.5
9 Mbps OFDM 14.5 16.5
12 Mbps OFDM 14.5 16.5
18 Mbps OFDM 14.5 16.5
24 Mbps OFDM 13.5 15.7
36 Mbps OFDM 12.6 14.8
48 Mbps OFDM 11.9 14.1
54 Mbps OFDM 11.3 13.3
MCS0 MM 13.4 15.6
MCS1 MM 13.4 15.6
MCS2 MM 13.4 15.6
MCS3 MM 13.4 15.6
MCS4 MM 12.8 14.8
MCS5 MM 11.9 14.1
MCS6 MM 11.3 13.3
MCS7 MM 10.1 12.1
MCS0 MM 40MHz 11.8 14.3
MCS7 MM 40MHz 9.7 11.7
Output power accuracy -1.5 +1.5 dB
Output power resolution 0.125 dB
Operation frequency range 2412 2484 MHz
Return loss -10 dB
Reference input impedance 50
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4.2.3. WLAN 5-GHz Receiver Characteristics
Parameter Condition Min Typ Max Units
Operation frequency range 4910 5825 MHz
Sensitivity
- 20MHz bandwidth.
- At < 10% PER limit
6 Mbps OFDM -92.2 -88.3
dBm
9 Mbps OFDM -90.4 -86.4
12 Mbps OFDM -89.6 -85.6
18 Mbps OFDM -87.1 -83.1
24 Mbps OFDM -84 -80
36 Mbps OFDM -80.6 -76.6
48 Mbps OFDM -76.3 -72.3
54 Mbps OFDM -74.7 -71.2
MCS0 MM 4K -90.5 -86.1
MCS1 MM 4K -87.7 -83.7
MCS2 MM 4K -85.9 -81.9
MCS3 MM 4K -82.8 -78.8
MCS4 MM 4K -79.4 -75.4
MCS5 MM 4K -75.1 -71.1
MCS6 MM 4K -73.5 -69.5
MCS7 MM 4K -72.2 -68.6
MCS0 MM 4K 40MHz -87.7 -82.5
MCS7 MM 4K 40MHz -69 -65.1
Max Input Level, At < 10% PER limit OFDM(11a/n) -27
dBm
Adjacent channel rejection
Sensitivity level +3dB for OFDM
54Mbps OFDM 2
dBm
LO Leakage -53 dBm
PER Floor 1.0 2.0 %
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4.2.4. WLAN 5-GHz Transmitter Power
Parameter
Condition
Min Typ Max
Output Power
- Maximum RMS output power
measured at 1dB from IEEE
spectral mask or EVM
6 Mbps OFDM 15.4 17.5 dBm
9 Mbps OFDM 15.4 17.5
12 Mbps OFDM 15.4 17.5
18 Mbps OFDM 15.4 17.5
24 Mbps OFDM 14.8 16.4
36 Mbps OFDM 14.1 15.7
48 Mbps OFDM 13.3 14.9
54 Mbps OFDM 12.3 14.1
MCS0 MM 15.1 17.1
MCS1 MM 15.1 17.1
MCS2 MM 15.1 17.1
MCS3 MM 15.1 17.1
MCS4 MM 13.9 15.7
MCS5 MM 13.3 14.9
MCS6 MM 12.3 14.1
MCS7 MM 11.4 13.1
MCS0 MM 40MHz 13.7 16.6
MCS7 MM 40MHz 10.4 12.3
Output power accuracy -1.5 +1.5 dB
Output power resolution 0.125 dB
Operation frequency range 4910 5825 MHz
Return loss -10 dB
Reference input impedance 50
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4.3.
Bluetooth RF Performance
4.3.1. BT Receiver Characteristics, In-Band Signals
Parameter Condition Min
Typ Max
BT
Spec
Units
BT BR, EDR operation
frequency range
2402
2480
MHz
BT BR, EDR channel spacing
1 MHz
BT BR, EDR input
impedance
50
BT BR, EDR sensitivity
(1)
Dirty TX on
BR, BER = 0.1%
-91.7
-70 dBm
EDR2, BER = 0.01%
-91.2
-70
EDR3, BER = 0.01%
-84.2
-70
BT EDR BER floor at
sensitivity + 10 dB, dirty TX
off (for 1,600,000 bits)
EDR2 1e-6
1e-5
EDR3 1e-6
1e-5
BT BR, EDR maximum
useable input power
BR, BER = 0.1% -5.0
-20 dBm
EDR2, BER = 0.1% -10.0
-20
EDR3, BER = 0.1% -10.0
-20
BT BR intermodulation Level of interferers For n = 3, 4, and 5
-36.0
-30.0
-39 dBm
BT BR, EDR C/I performance
Numbers show
wanted-signal to
interfering-signal ratio.
Smaller numbers indicate
better C/I performances
(Image frequency = -1MHz)
BR, Co-channel 8.0
11 dB
EDR, Co-channel EDR2 9.5
13
EDR3 16.5
21
BR, adjacent ±1 MHz -10.0
0
EDR, adjacent ±1 MHz,
(image)
EDR2 -10.0
0
EDR3 -5.0
5
BR, adjacent +2 MHz -38.0
-30
EDR, adjacent +2 MHz,
EDR2 -38.0
-30
EDR3 -38.0
-25
BR, adjacent -2 MHz -28.0
-20
EDR, adjacent
-2 MHz
EDR2 -28.0
-20
EDR3 -22.0
-13
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BR, adjacent ≥Ι±3Ι MHz -45.0
-40
EDR, adjacent ≥Ι±3Ι
MHz
EDR2 -45.0
-40
EDR3 -44.0
-33
BT BR, EDR RF return loss -10.0
dB
(1) Sensitivity degradation up to -3dB may occur due to fast clock harmonics with dirty TX on.
4.3.2. BT Receiver Characteristics – General Blocking
Parameter Condition Min Typ BT spec
Units
Blocking performance over full range,
according to BT specification
(1)
30-2000 MHz -6 -10 dBm
2000-2399 MHz -6 -27
2484-3000 MHz -6 -27
3-12.75 GHz -6 -10
1) Exceptions taken out of the total 24 allowed in the BT spec.
4.3.3. BT Receiver Characteristics –BR, EDR Blocking Per Band
Parameter Band Min Typ Units
Blocking performance for various cellular
bands
Hopping on.
Wanted signal: -3dB from sensitivity, with
modulated continuous blocking signal.
BER = 0.1% for BT BR, 0.01% for BT EDR.
PER = 1%
776-794 MHz (CDMA) -12
dBm
824-849 MHz (GMSK)
(1)
-3
824-849 MHz (EDGE)
(1)
-11
824-849 MHz (CDMA, QPSK)
(1)
-12
880-915 MHz (GMSK) -14
880-915 MHz (EDGE) -15
1710-1785 MHz (GMSK) -4
1710-1785 MHz (EDGE) -18
1850-1910 MHz (GMSK) -18
1850-1910 MHz (EDGE) -20
1850-1910 MHz (CDMA, QPSK) -20
1850-1910 MHz (WCDMA, QPSK) -16
1920-1980 MHz (WCDMA, QPSK) -17
1) Except for frequencies where [3 * F_BLOCKER] falls within the BT band (2400-2483.5 MHz)
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4.3.4. BT Transmitter, BR
Parameter Min Typ Max BT Spec
Units
BR RF output power
(1)
VBAT >= 3V
12.2
dBm
VBAT < 3V 6.7
BR Gain Control Range 30 dB
BR Power Control Step 2 5 8 2 to 8
BR Adjacent Channel Power |M-N| = 2
(2)
-43.0
≤ -20 dBm
BR Adjacent Channel Power |M-N| > 2
(2)
-48.0
≤ -40
1) Values reflect maximum power. Reduced power is available using a vendor-specific (VS) command.
2) Assumes 3dB insertion loss on external filter and traces
4.3.5. BT Transmitter, EDR
Parameter Min Typ Max BT Spec
Units
EDR output power
(1)
VBAT >= 3V 6.7 dBm
VBAT < 3V 4.7
EDR relative power -2 1 -4 to +1 dB
EDR Gain Control Range 30 dB
EDR Power Control Step 2 5
8
2 to 8 dB
EDR Adjacent Channel Power |M-N| = 1
(2)
-36
≤ -26 dBc
EDR Adjacent Channel Power |M-N| = 2
(2)
-30
≤ -20 dBm
EDR Adjacent Channel Power |M-N| > 2
(2)
-42
≤ -40
1) Values reflect maximum power. Reduced power is available using a vendor-specific (VS) command.
2) Assumes 3dB insertion loss on external filter and traces.
4.3.6. BT Modulation, BR
Parameter Condition
(1)
Performances BT
spec
Units
Min
Typ
Max
BR -20dB Bandwidth 925
995
≤1000
kHz
BR modulation
characteristics
∆f1avg
Mod data = 4-ones,
4-zeros: 111100001111...
160
140 to
175
kHz
∆f2max ≥ limit for
at least 99.9% of all
Δf2max
Mod data = 1010101...
130
> 115
kHz
∆f2avg / ∆f1avg
88
> 80 %
BR carrier frequency One slot packet -25
+25
< ±25
kHz
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drift Three and five slot packet -35
35
< ±40
kHz
BR drift rate lfk+5 – fkl , k = 0 …. max
15
< 20 kHz/
50μs
BR initial carrier
frequency tolerance
(2)
f0 – fTX -25
25 < ±75
kHz
1) Performance figures at maximum power
2) This number is added on top of the reference clock frequency accuracy
4.3.7. BT Modulation, EDR
Parameter
(1)
Condition Min
Typ.
Max
BT spec
Units
EDR Carrier frequency stability -5
5
≤10 kHz
EDR Initial Carrier Frequency Tolerance
(2)
-25
25
±75 kHz
EDR RMS DEVM EDR2 4
20 %
EDR3 4
13 %
EDR 99% DEVM EDR2 30
30 %
EDR3 20
20 %
EDR Peak DEVM EDR2 9
35 %
EDR3 9
25 %
1) Performance figures at maximum power
2) This number is added on top of the reference clock frequency accuracy
4.3.8. BT BR, EDR Transceiver - Emissions
Parameter
(1)
Condition
(2)
Performances Units
Min Typ Max
BT out-of-band
emission
746-768 MHz (CDMA) BR, EDR -151
dBm/Hz
869-894 MHz (WCDMA, GSM) -149
dBm/Hz
925-960 MHz (E-GSM) -148
dBm/Hz
1570-1580 MHz (GPS) -145
dBm/Hz
1598-1607 MHz (GLONASS) (3) -145
dBm/Hz
1805-1880 MHz (DCS, WCDMA)
-141
dBm/Hz
1930-1990 MHz (PCS) -139
dBm/Hz
2110-2170 MHz (WCDMA) BR -134
dBm/Hz
EDR -129
dBm/Hz
BT harmonics 2nd harmonic 1.5
dBm
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3rd harmonic -4
dBm
4th harmonic -10
dBm
1) Meets FCC and ETSI requirements with suitable external filter
2) Performance figures at maximum power
3) Except for frequencies that corresponds to 2*RF_FREQ/3
4.3.9. BT BR Transceiver - Spurs
Parameter
(1)
Condition
(2)
Performances Units
Min Typ Max
BT out-of-band spurs 76-108 MHz (FM) BR -77
dBm
746-768 MHz (WCDMA) -79
dBm
869-894 MHz (WCDMA, GSM) -77
dBm
925-960 MHz (E-GSM) -77
dBm
1570-1580 MHz (GPS) -72
dBm
1598-1607 MHz (GLONASS) (3) -74
dBm
1805-1880 MHz (DCS, WCDMA) -72
dBm
1930-1990 MHz (PCS) -70
dBm
2110-2170 MHz (WCDMA) -59
dBm
1) Meets FCC and ETSI requirements with suitable external filter
2) Performance figures at maximum power
3) Except for frequencies that corresponds to 2*RF_FREQ/3
4.3.10. BT EDR Transceiver - Spurs
Parameter Condition
(
1
)
Performances Units
Min Typ Max
BT out-of-band spurs 76-108 MHz (FM) EDR -82
dBm
746-768 MHz (WCDMA) -87
dBm
869-894 MHz (WCDMA, GSM)
-85
dBm
925-960 MHz (E-GSM) -84
dBm
1570-1580 MHz (GPS) -79
dBm
1598-1607 MHz (GLONASS)
(2)
-78
dBm
1805-1880 MHz (DCS, WCDMA)
-76
dBm
1930-1990 MHz (PCS) -74
dBm
2110-2170 MHz (WCDMA) -63
dBm
1) Performance figures at maximum power
2) Except for frequencies that corresponds to 2*RF_FREQ/3
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4.4.
BT LE RF Performance
4.4.1. BT LE Receiver Characteristics, In-Band Signals
Parameter Condition
(2)
Min
Typ
Max
BLE spec
Units
BT LE Operation frequency range 2402
2480
MHz
BT LE Channel spacing 2 MHz
BT LE Input impedance 50
BT LE Sensitivity
(1)
, Dirty Tx on
-92.8
≤ -70 dBm
BT LE Maximum useable input power
-5 ≥ -10 dBm
BT LE Intermodulation characteristics
Level of interferers. For
n = 3, 4, 5
-36
-30
≥ -50 dBm
BT LE C/I performance Note:
Numbers show wanted
signal-to-interfering signal ratio.
Smaller numbers indicate better C/I
performance. Image = -1MHz
LE, co-channel 8
12
≤ 21 dB
LE, adjacent ±1MHz -5
0
≤ 15
LE, adjacent +2MHz -45
-38
≤ -17
LE, adjacent –2MHz -22
-15
≤ -15
LE, adjacent ≥ |±3|MHz
-47
-40
≤ -27
1) Sensitivity degradation up to -3dB may occur due to fast clock harmonics.
2) BER of 0.1% corresponds to PER of 30.8% for a minimum of 1500 transmitted packets, according to BT LE test spec
4.4.2. BT LE Receiver Characteristics – General Blocking
Parameter Condition Min Typ Max BLE
spec
Unit
BT LE Blocking performance over
full range, according to LE
specification
(1)
30–2000MHz -15
≥ –30 dBm
2000–2399MHz -15
≥ –35
2484–3000MHz -15
≥ –35
3–12.75GHz -15
≥ –30
1) Exceptions taken out of the total 10 allowed for fbf_1, according to the BT LE Spec
4.4.3. BT LE Transmitter Characteristics
Parameter Min Typ Max BT LE
Spec
Unit
BT LE RF output power
(1)
Vbat >= 3V
12.2
≤10 dBm
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Vbat < 3V
6.7
≤10 dBm
BT LE Adjacent Channel Power |M-N| = 2
(2)
-51.0
≤ –20 dBm
BT LE Adjacent Channel Power |M-N| > 2
(2)
-54.0
≤ –30
1) To reduce the maximum BLE power, use a VS command. The optional extra margin is offered to compensate for
design losses, such as trace and filter losses, and to achieve the maximum allowed output power at system level.
2) Assumes 3dB insertion loss on external filter and traces
4.4.4. BT LE Modulation Characteristics
Parameter Condition
(1)
Performances BT
Spec
Units
Min
Typ
Max
BT LE modulation
characteristics
∆f1avg
Mod data =
4-ones, 4-zeros:
111100001111...
250
225 to
275
kHz
∆f2max ≥ limit for at
least 99.9% of all Δf2max
Mod data =
1010101...
215
≥185
kHz
∆f2avg / ∆f1avg
90
≥80 %
BT LE carrier frequency
drift
lf0 – fnl , n = 2,3 …. K -25 25 ≤±50
kHz
BT LE drift rate lf1 – f0l and lfn – fn-5l ,n = 6,7…. K 15 ≤20
kHz/
50μs
LE initial carrier
frequency tolerance
(2)
fn – fTX -25 25 ≤±100
kHz
1) Performance figures at maximum power
2) This number is added on top of the reference clock frequency accuracy
4.4.5. BT LE Transceiver – Emissions
See Section 4.3.8, BT BR, EDR Transceiver – Emissions.
4.4.6. BT LE Transceiver - Spurs
See Section 4.3.9, BT BR Transceiver – Spurs.
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4.5.
ANT Performance
4.5.1. ANT Receiver Characteristics, In-Band Signals
Parameter Condition Min Typ Max
Units
ANT Operation frequency range 2402
2480
MHz
ANT Channel spacing 1 MHz
ANT Sensitivity 12.72% PER
(1)
-84.7 dBm
1) Translation from BER=0.1%, assuming packet is 136 bits ( not including preamble )
4.5.2. ANT Transmitter Characteristics
Same as Bluetooth BR Transmitter Characteristics
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4.6.
POWER CONSUMPTION
4.6.1. Shutdown and Sleep Currents
Parameter Power Supply Current Typ Unit
Shutdown mode (All functions shut down)
VBAT 10
uA
WLAN sleep mode VBAT 154
BT sleep mode VBAT 110
4.6.2. WLAN Power Currents
Parameter
Conditions Typ (avg) - 25C
Units
LPM 2.4GHz RX LPM 48 mA
Receiver
2.4GHz RX search SISO20 53 mA
2.4GHz RX search SISO40 58 mA
5GHz RX search SISO20 59 mA
5GHz RX search SISO40 63 mA
2.4GHz RX 20M SISO 11CCK 55 mA
2.4GHz RX 20M SISO 6OFDM 60 mA
2.4GHz RX 20M SISO MCS7 64 mA
2.4GHz RX 40MHz MCS7 76 mA
5GHz RX 20MHz 6OFDM 67 mA
5GHz RX 20MHz MCS7 72 mA
5GHz RX 40MHz MCS7 84 mA
Transmitter
2.4GHz TX 20M SISO 6OFDM 16.4dBm 290 mA
2.4GHz TX 20M SISO 11CCK 16.5dBm 278 mA
2.4GHz TX 20M SISO 54OFDM 13.1dBm 252 mA
2.4GHz TX 20M SISO MCS7 12.2dBm 243 mA
2.4GHz TX 40M SISO MCS7 11.8dBm 248 mA
5GHz TX 20M SISO 6OFDM 16.8dBm 371 mA
5GHz TX 20M SISO 54OFDM 13.4dBm 334 mA
5GHz TX 20M SISO MCS7 12.7dBm 329 mA
5GHz TX 40M SISO MCS7 11.9dBm 337 mA
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4.6.3. Bluetooth Currents
Current measurements are done at the following output power: BR at 12.5dBm, EDR at 7dBm.
Use Case
(1)
Typ Units
BR Voice HV3 + sniff 11.6 mA
EDR Voice 2-EV3 no retrans. + sniff 5.9 mA
Sniff 1 attempt 1.28s 178 uA
EDR A2DP EDR2 (master). SBC high quality – 345Kbs 10.4 mA
EDR A2DP EDR2 (master). MP3 high quality – 192Kbs 7.5 mA
Full throughput ACL RX: RX-2DH5
(2) (3)
18 mA
Full throughput BR ACL TX: TX-DH5
(3)
50 mA
Full throughput EDR ACL TX: TX-2DH5
(3)
33 mA
Page or inquiry 1.28s/11.25ms 253 uA
P&I Scan (P=1.28/I=2.56) 332 uA
1) BT role in all scenarios is Slave, except for A2DP
2) ACL RX has same current in all modulations
3) Full throughput assumed data transfer in one direction
4.6.4. Bluetooth LE Currents
All current measurements are done at output power of 8dBm
Use Case Typ Units
Advertising, non-connectable
(1)
131 uA
Advertising, discoverable
(1)
143 uA
Scanning
(2)
266 uA
Connected, master role, 1.28sec conn. Interval
(3)
124 uA
Connected, slave role, 1.28sec conn. Interval
(3)
132 uA
1) Advertising in all 3 channels, 1.28sec advertising interval, 15 Bytes advertise data.
2) Listening to a single frequency per window, 1.28sec scan interval, 11.25msec scan window.
3) Zero Slave connection latency Empty Tx/Rx LL packets.
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4.6.5. ANT Currents
Use Case Conditions Typ Units
ANT Rx message mode 250ms interval 360 uA
ANT Rx message mode 500ms interval 220 uA
ANT Rx message mode 1000ms interval 150 uA
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5. HOST INTERFACE TIMING CHARACTERISTICS
The following table summarizes the Host Controller interface options. All interfaces operate
independently.
WLAN Shared HCI for all functional
blocks except WLAN
BT Voice/Audio
WLAN HS SDIO Over UART BT PCM
The device incorporates UART module dedicated to the BT shared-transport Host Controller
Interface (HCI) transport layer. The HCI interface is used to transport commands, events and ACL
between the Bluetooth device and its host using HCI data packets. This acts as a shared transport for
all functional blocks except WLAN.
5.1.
WLAN SDIO Transport Layer
The SDIO is the host interface for WLAN. The interface between the host and the WG7835-T0 uses
an SDIO interface and supports a maximum clock rate of 50MHz.
The Device SDIO also supports the following features of the SDIO V3 specification:
4 bit data bus
Synchronous and Asynchronous In-Band-Interrupt
Default and High-Speed (50MHz) timing
Sleep/wake commands
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5.2.
SDIO Timing Specifications
5.2.1. SDIO Switching Characteristics – Default Rate
Figure 5-1. SDIO default input timing
Figure 5-2. SDIO default output timing
Table 5-1. SDIO Default Timing Characteristics
(1)
PARAMETER
(2)
MIN MAX UNIT
Fclock Clock frequency, CLK 0 26 MHz
DC Low/high duty cycle 40 60 %
tTLH Rise time, CLK 10 ns
tTHL Fall time, CLK 10 ns
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tISU Setup Ɵme, input valid before CLK↑ 3 ns
tIH Hold Ɵme, input valid aŌer CLK↑ 2 ns
tODLY Delay Ɵme, CLK↓ to output valid 2.5 14.8 ns
CI Capacitive load on outputs 15 pF
(1) To change the data out clock edge from the falling edge (default) to the rising edge, set the configuration bit.
(2) Parameter values reflect maximum clock frequency.
5.2.2. SDIO Switching Characteristics – High Rate
Figure 5-3. SDIO HS input timing
Figure 5-4. SDIO HS output timing
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Table 5-2. SDIO HS Timing Characteristics
PARAMETER MIN MAX UNIT
Fclock Clock frequency, CLK 0 50 MHz
DC Low/high duty cycle 40 60 %
tTLH Rise time, CLK 3 ns
tTHL Fall time, CLK 3 ns
tISU Setup Ɵme, input valid before CLK↑ 3 ns
tIH Hold Ɵme, input valid aŌer CLK↑ 2 ns
tODLY Delay Ɵme, CLK↓ to output valid 2.5 14 ns
CI Capacitive load on outputs 10 pF
5.3.
HCI UART Shared Transport Layers for All Functional Blocks (Except WLAN)
The HCI UART supports most baud rates (including all PC rates) for all fast clock frequencies - up
to a maximum of 4 Mbps. After power up the baud rate is set for 115.2 kbps, regardless of fast
clock frequency. The baud rate can then be changed by using a VS command. The Device
responds with a Command Complete Event (still at 115.2 kbps), after which the baud rate change
occurs.
HCI hardware includes the following features:
Receiver detection of break, idle, framing, FIFO overflow and parity error conditions.
Receiver Transmitter underflow detection.
CTS/RTS hardware flow control.
4 wires (H4)
The below table lists the UART default settings
Table 5-3. UART Default Setting
Parameter Value
Bit Rate 115.2 kbps
Data Length 8 bits
Stop Bit 1
Parity None
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5.3.1. UART 4-Wires Interface – H4
The interface includes four signals: TXD, RXD, CTS and RTS. Flow control between the host and
the Device is byte-wise by hardware. ( See Figure 5-5 )
Figure 5-5. HCI UART Connection
When the UART RX buffer of the device passes the flow-control threshold, the buffer sets the
UART_RTS signal high to stop transmission from the host. When the UART_CTS signal is set high,
the device stops transmitting on the interface. If HCI_CTS is set high in the middle of transmitting
a byte, the device finishes transmitting the byte and stops the transmission.
5.4.
UART Timing Specifications
Figure 5-6. UART Timing Diagram
Table 5-4. UART Timing Characteristics
Characteristic Condition Symbol Min Typ Max Unit
Baud rate 37.5 4364 Kbps
Baud rate accuracy per byte
RX/TX -2.5 +1.5 %
Baud rate accuracy per bit RX/TX -12.5 +12.5 %
CTS low to TX_DATA on t3 0 2 us
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CTS low to TX_DATA off Hardware flow control t4 1 Byte
CTS High Pulse Width t6 1 bit
RTS low to RX_DATA on t1 0 2 us
RTS high to RX_DATA off Interrupt set to 1/4 FIFO
t2 16 Bytes
STR-Start bit; D0..Dn - Data bits (LSB first); PAR - Parity bit (if used); STP - Stop bit
Figure 5-7. UART Data Frame
5.5.
Bluetooth Codec-PCM(Audio) Timing Specifications
Figure 5-8 shows the Bluetooth codec-PCM (audio) timing diagram.
Table 5-5 lists the Bluetooth codec-PCM master timing characteristics.
Table 5-6 lists the Bluetooth codec-PCM slave timing characteristics.
Figure 5-8. PCM Interface Timing
Table 5-5. Bluetooth Codec-PCM Master Timing Characteristics
Parameter Symbol Min Max Unit
Cycle time Tclk 166.67 (6.144MHz)
15625 (64 kHz)
ns
High or low pulse width Tw 35% of Tclk min
AUD_IN setup time tis 10.6
AUD_IN hold time tih 0
AUD_OUT propagation time top 0 15
AUD_FSYNC_OUT propagation time top 0 15
Capacitive loading on outputs Cl 40 pF
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Table 5-6. Bluetooth Codec-PCM Slave Timing Characteristics
Parameter Symbol Min Max Unit
Cycle time Tclk 81 (12.288MHz) ns
High or low pulse width Tw 35% of Tclk min
AUD_IN setup time tis 5
AUD_IN hold time tih 0
AUD_OUT propagation time top 5
AUD_FSYNC_OUT propagation time top 0 19
Capacitive loading on outputs Cl 40 pF
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6. CLOCK AND POWER MANAGEMENT
The slow clock is a free-running, 32.768 kHz clock supplied from an external clock source. The
clock is connected to the RTC_CLK pin and is a digital square-wave signal in the range of 0 to 1.8V
nominal
6.1.
Reset-Power-Up System
After VBAT and VIO are fed to the device and while BT_EN and WL_EN are deasserted (low), the
device is in SHUTDOWN state, during which functional blocks, internal DC-DCs, and LDOs are
disabled. The power supplied to the functional blocks is cut off. When one of the signals (BT_EN
or WL_EN) are asserted (high), a power-on reset (POR) is performed. Stable slow clock, VIO, and
VBAT are prerequisites for a successful POR.
6.2.
WLAN Power-Up Sequence
Figure 6-1 shows the WLAN power-up sequence.
Figure 6-1. WLAN Power-Up Sequence
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6.3.
Bluetooth/BLE/ANT Power-Up Sequence
Figure 6-2 shows the Bluetooth/BLE/ANT power-up sequence.
Figure 6-2 Bluetooth/BLE/ANT power-up sequence
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7. REFERENCE SCHEMATIC
7.1. Module Reference Design
Figure 7-1 Module Reference Schematic
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8. DESIGN RECOMMENDATIONS
8.1. Design Note on Debug Port
Pin# 11, 12 serve as WLAN and BT debug port, respectively. So test points for these two
signals should be reserved for debugging purpose.
Pin# 14 (SDIO WAKE#) needs to be pulled high via 10Kohm and use Pin# 11, 12 as hardware
interface to communicate with system platform and TI RTTT test utility for WLAN RF
performance test, debug and manufacturing application.
8.2. Module Layout Recommendations
Follow these module layout recommendations:
Digital Signals Layout
SDIO signals traces (CMD, D0, D1, D2 and D3) should be routed in parallel to each other and
as short as possible. (Less than 12cm) Besides, every trace length must be the same as the
others.
Enough space above 1.5 time trace width or ground shielding between trace and trace will
be benefit to make sure signal quality, especially for SDIO_CLK trace. Remember to keep
them away from the other digital or analog signal traces. Adding ground shielding around
these bus is recommended.
Route trace of SDIO_CLK at Top layer without vias.
SDIO Clock, Audio Clock (PCM_AUD_CLK), these digital clock signals are a source of noise.
Keep the traces of these signals as short as possible. Whenever possible, maintain a
clearance around them.
BT_AUD signals should be rounted in the same group and its better to rout them at the
same layer or confirm them referring to the same reference plane.
Power Trace
Power trace for VBAT should be 20mil wide. 1.8V trace should be 15mil wide, at least.
Isolate different power traces with Ground plane
Ground
Having a complete Ground and more GND vias under module in layer1 for system stable
and thermal dissipation.
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Have a complete Ground pour in layer 2 for thermal dissipation.
Increase the GND pour in the 1st layer, move all the traces from the 1st layer to the inner
layers if possible.
Move GND vias close to the pad.
Clocks
To avoid adding noise to the clock signal, keep the primary clock away from fast digital
switching lines and power traces.
It is preferable to keep all clocks between the ground/power layers.
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9. PACKAGE INFORMATION
9.1. NGFF Type 2226 Specification from PCI-e M.2_Rev1.0
Only Ant1 and Ant2 on this module.
Figure 9-1. M.2 Type 2226-S3 Mechanical Outline Drawing
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Figure 9-2. Recommended Land Pattern for Module Type 2226
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9.2. WG7833BEM2B Module Drawing
Figure 9-3. Module drawing
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10. SMT AND BAKING RECOMMENDATION
10.1. Baking Recommendation
Baking condition
- Follow MSL Level 4 to do baking process.
- After bag is opened, devices that will be subjected to reflow solder or other high
temperature process must be
a) Mounted within 72 hours of factory conditions <30°C/60% RH, or
b) Stored at <10% RH.
- Devices require bake, before mounting, if Humidity Indicator Card reads >10%
If baking is required, Devices may be baked for 8 hrs. at 125 °C.
10.2. SMT Recommendation
Recommended Reflow profile
No. Item Temperature Heating Time
1 Pre-heat D1 = 140 °C T1: 80 ~ 120 sec
2 Soldering D2 = 220 °C T2: 60 +/- 10 sec
3 Peak-Temp. D3 = 250 °C max
H
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Note: (1) Reflow soldering is recommended two times maximum.
(2) Add Nitrogen while Reflow process SMT solder ability will be better.
Stencil thickness
0.1~ 0.13 mm (Recommended)
Soldering paste (without Pb)
Recommended SENJU N705-GRN3360-K2-V can get better
soldering effects.
11. HISTORY CHANGE
Revision Date Description
D 0.1 2015 / 01 / 10 New Released
D 0.2 2015 / 07 / 30 Add FCC/NCC WARING STATEMENT
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FCC WARING STATEMENT
This equipment has been tested and found to comply with the limits for a Class B digital device,
pursuant to part 15 of the FCC rules. These limits are designed to provide reasonable protection
against harmful interference in a residential installation. This equipment generates, uses and can
radiate radio frequency energy and, if not installed and used in accordance with the instructions,
may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful
interference to radio or television reception, which can be determined by turning the equipment off
and on, the user is encouraged to try to correct the interference by one or more of the following
measures:
-Reorient or relocate the receiving antenna.
-Increase the separation between the equipment and receiver.
-Connect the equipment into an outlet on a circuit different from that to which the receiver is
connected.
-Consult the dealer or an experienced radio/TV technician for help.
You are cautioned that changes or modifications not expressly approved by the party responsible for
compliance could void your authority to operate the equipment.
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two
conditions: (1) this device may not cause harmful interference and (2) this device must accept any
interference received, including interference that may cause undesired operation.
FCC RF Radiation Exposure Statement:
1. This Transmitter must not be co-located or operating in conjunction with any other antenna or
transmitter.
2. This equipment complies with FCC RF radiation exposure limits set forth for an uncontrolled
environment. This equipment should be installed and operated with a minimum distance of 20
centimeters between the radiator and your body.
According to FCC 15.407(e), the device is intended to operate in the frequency band of 5.15GHz to
5.25GHz under all conditions of normal operation. Normal operation of this device is restricted to
indoor used only to reduce any potential for harmful interference to co-channel MSS operations.
Information to OEM integrator
The OEM integrator has to be aware not to provide information to the end user regarding how to
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install or remove this RF module in the user manual of the end product. The user manual which is
provided by OEM integrators for end users must include the following information in a prominent
location.
1. To comply with FCC RF exposure compliance requirements, the antenna used for this transmitter
must be installed to provide a separation distance of at least 20 cm from all persons and must not
be co- located or operating in conjunction with any other antenna or transmitter, except in
accordance with FCC multi-transmitter product transmitter product procedures.
2. Only those antennas with same type and lesser gain filed under this FCC ID number can be used
with this device.
3. The regulatory label on the final system must include the statement: “Contains FCC ID:
WS2-WG7833B0 .
4. The final system integrator must ensure there is no instruction provided in the user manual or
customer documentation indicating how to install or remove the transmitter module except such
device has implemented two-ways authentication between module and the host system.
5. If the end product integrating this module is going to be operated in 5.15 ~5.25GHz frequency
range, the warning statement in the user manual of the end product should include the restriction
of operating this device in indoor could void the users authority to operate the equipment.
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NCC WARING STATEMENT
Article 12
Without permission, any company, firm or user
shall not alter the frequency, increase the
power, or change the characteristics and
functions of the original design of the
certified lower power frequency electric
machinery.
Article 14
The application of low power frequency electric
machineries shall not affect the navigation
safety nor interfere a legal communication, if
an interference is found, the service will be
suspended until improvement is made and the
interference no longer exists.

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