Kenwood Marine Radio At 440 Users Manual
VS-1 to the manual de0bc308-38ec-4bf5-bcd5-59f1494994f7
KENWOOD--TS-440S-Service-Manual KENWOOD--TS-440S-Service-Manual
2015-01-23
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KEN WOO
D
T
S-440SPS-430SP-4a
0
SPECIFICATIONS
2
HF TRANSCEIVE
R
CONTENT
S
CIRCUIT DESCRIPTION
4
SEMICONDUCTORS
27
PARTS LIST
3
5
PC BOARD SCHEMATIC DIAGRA
M
SWITCH UNIT
6
9
FILTER UNIT
70, 7
1
PLL UNIT
72, 7
3
RF UNIT
74, 7
5
CONTROL UNIT
76, 7
7
DISPLAY UNIT
76, 7
7
FINAL UNIT
78
IF UNIT
78, 7
9
AT UNIT
80
DISASSEMBLY
81
PACKING
8 8
ADJUSTMENT
8
9
LEVEL DIAGRAM
10
1
BLOCK DIAGRAM
10
3
OPTIO
N
PS-50
104
PS-430
109
VS-1
1 1
1
SP-430
11
4
MB-430
11
4
AT-440
11
4
YK-88S /S N
11
4
YK-88C/CN
11
4
SCHEMATIC DIAGRAM
113
TS-440
S
(GENERAL
)
Transmitter frequency range
:
Receive frequency range
:
Mode
:
Antenna impedance
:
Power requirement
:
Power consumption
:
RX no signal input
:
TX
:
Frequency configuration
:
RX unit
:
TX unit
: (A1,A3J,A3,FSK
)
(F3
)
Semiconductors
:
SPECIFICATION
S
160m BAND
1
.8 —
2
.0MH
z
80m BAND
3
.5 —
4
.0MH
z
40m BAND
7
.0 —
7
.3MH
z
30m BAND
10
.1
—
10
.15MH
z
20m BAND
14
.0
--
14
.35MH
z
17m BAND
18
.068 — 18
.168MH
z
15m BAND
21
.0 — 21.45MH
z
12m BAND
24
.89 — 24
.99MH
z
10m BAND
28
.0 — 29
.7MHz
100kHz — 30MH
z
Al (CW), A3J(SSB), A3(AM), F1 (FSK), F3(FM
)
50 Ohm (TX
: 20— 150 Ohm with AT
)
12
.0--
16
.0V D
C
Approx
. 1
.9
A
Approx
. 20
A
1st IF 45
.05MHz, 2nd IF 8.83MHz, 3rd IF 455kH
z
1st IF 455kHz, 2nd IF 8
.83MHz, 3rd IF 45
.05MH
z
1st IF 36
.22MHz, 2nd IF 45
.05MH
z
CW, SSB, AM, FSK, FM
: Triple conversion superheterodyn
e
FM
: Double conversion superheterodyne
TS-440S
TS-440S (with AT
)
Tr's
1 57
1 7
4
FET's
22
2 2
IC's
49
5 8
Diod's
257
27
7
(
TS-440S TS-440S
with AT
)
W(mm)
270 (279)
270 (279
)
H(mm)
96 (108)
96 (108
)
D(mm)
313 (335)
313 (335
)
Weight(kg)
6
.3
7
.
3
Dimensions
:
(
The numbers in the parenthesis include protections
.
(TRANSMITTER
)
Ratead final power input
:
Carrier supression
:
Unwanted sidebande supression
:
Harmonic content
:
Transmit frequency character
:
Maximum frequency diviation (FM)
:
Microphone impedance
:
More than 40d
B
More than 50d
B
Less than
-40d
B
400--2600Hz (—6dB
)
±5k H
z
50052 - 50k
g
2
TS-440
S
SPECIFICATION
S
(RECEIVER
)
Sensitivity
:
Freq
.
Mode
100 -- 150kHz
150
500kHz
0
.5 --
1
.6MHz
1
.6 -- 30MH
z
SSB,CW,FS
K
(SIN10dB)
Less tha
n
2
.5µV
(8dBA1
Less tha
n
1µV (OdB
A
)
Less tha
n
4µV (12dBA)
Less tha
n
0
.25µV (— 12dB
A
)
AM (SIN 10dB)
Less tha
n
25µV
(28dBp)
Less tha
n
13µV (22dB
A
)
Less tha
n
40/,cV
(32dBA)
Less tha
n
2
.5µV
(8dBA
)
FM (12dB SINAD)
Less tha
n
0
.7µV (—3 dBµ
)
Squelch
sensitivity
: (Threshold
)
Mode
•
•
150 -- 500kHz
0
.5 —
1
.6MHz
1
.6 - - 30MH
z
SSB,CW,AM,FSK
Less tha
n
20AV (26dBA1
Less tha
n
10
A
V (20dBp)
Less tha
n
20µV
(26dBA)
Less tha
n
2µV (6dBA
)
FM
Less tha
n
0 32
A
V (— 10d B
A
)
Image ratio
:
IF rejection
:
Selectivity
:
IF SHIFT variable range
:
RIT/XIT variable range
:
Audio output power
:
Audio output impedanc
e
(FREQUENCY STABILITY
)
Frequency accuracy
: (RIT/XIT OFF
)
Frequency stability
:
(RIT/XIT OFF
: at receive
)
Reference oscillator frequency
:
50dB or more (1 00kHz -- 1 6MHz
)
70dB or more (1
.6 — 30MHz
)
50dB or more (FM 3rd image ratio
)
50dB or more (100kHz --- 1 6MHz
)
70dB or more (1
.6MHz -- 30MHz
)
Fre
d
Mode
— 6dB — 60d
B
SB,CW,FSK
More than 2kHz Less than 4
.4kH
z
AM
More than 4kHz
Less than 18kHz (— 50dB
)
FM
More than 1 2kHz Less than 25kHz (— 50dB)
±0
.9kHz or mor
e
± 1 kHz or mor
e
1
.5W or more (with 8S2 load, 10% distortion
)
4 — 1652 (Speaker and headphone
)
More than
±10
x 1
0
-
6
More than
±10
x 10
-6
(— 10°C to 50°C
)
36MH
z
Note
:
Circuit and ratings subject to change without notice due to developments in technology
.
3
TS-440S
CIRCUIT DESCRIPTIO
N
1
. Overview
•
The TS-440 is a triple conversion type transceiver, incor-
porating a general coverage receiver, which uses 45
.0
5
MHz as the first IF, 8
.83 MHz as the second IF, and 45
5
kHz as the third IF
.
•
The TS-440 is compact, but allows for installation of a
n
optional internal automatic antenna tuner operating in th
e
amateur band from 3
.5 MHz to 28 MHz and enables
a
wide range of antennas to be used
.
•
The TS-440 also contains a microprocessor-controlled dig-
ital PLL circuit which controls frequency in 10 Hz step
s
using a single crystal oscillator to implement high accura
-
cy and stable frequency control
.
•
The TS-440 has the following major features
:
(1)
Selectable VFOs
; VFO-A and VFO-
B
(2)
Direct frequency input using a numeric keypa
d
(3)
100-channel memory containing frequency band
,
and mode information (channel 90 to 99 for split fre
-
quency memory
)
(4)
Memory scan in 10 channel groups and two type
s
of program sca
n
(5)
RTTY (AFSK) mode availabl
e
(6)
Squelch circuit operational in all mode
s
(7)
Dual filters available to improve selectivity and SI
N
ratio (optional filter required
)
(8)
IF shift, audio notch, IF filter switching, and RF AT
T
functions for convenient interference reductio
n
(9)
Large heat sink and cooling fan (100 W) enabling u
p
to one-hour continious transmit operatio
n
(101 Full and semi break-in circuits for C
W
(1 1) External-computer controllable (optional interface re
-
quired
)
(12) Many easy-to-read meter functions such as th
e
received signal strength (s-meter), transmitter power
,
SWR, and ALC level
.
2
. Frequency Element
s
The TS-440 utilizes a triple conversion transmitter an
d
receiver
.
V
30K
f IN
RX MIX
1
30MHz ,
RX
TX
45
.05MHz RX MIX2
8
.83MHz
RX MIX3
455KHz
DE
T
DISCR I
RX OUTPU
T
TX MIX3
TX MIX
I
8
.83MH
z
TX MIX
2
SSB,CWT, AM,
FM, FSK
(FM MOD
)
:45
.O8^-75
.05MH
z
-CW R
:45
.0792-- 75
.0492 MHz
SS B
C
W
FS
K
'
AMR,FM
R
AMT,FMT
: 455KH
z
USB,
CW
:
456
.5
KH
z
-LSB,FSK
453
.5KH
z
FSK
AFS INPU
T
B
.M
.
SS
B
AM
MIC INPU
T
F
M
Fig
. 1
Frequency configuratio
n
The overall frequency configuration of the TS-440 is show
n
in Figure 1
. The incoming received signal (f,
N
l
is applied t
o
the ANT terminal
. This signal is mixed with the local oscilla-
tor signal (fvco) in RX MIX 1 to obtain the first IF frequen-
cy
. This signal is then mixed with the HET Oscillator signa
l
(fHET) in RX MIX 2, to obtain the 2nd IF frequency
. Th
e
resulting signal is then mixed with the second local oscilla
-
tor frequency (f
L
o) to obtain the 3rd IF frequency
. The sig-
nal is then combined with the CAR signal for detection
. f
i
N
is expressed mathematically as follows
:
fiN = fvco
fHEr – fLo
fcAlt
1
4
TS-440
S
CIRCUIT DESCRIPTIO
N
ANT
Fig
. 2 PLL frequency configuratio
n
30
K
30MHz
1st MIX
MIX
3rd MI
X
2nd
D
AF OU
T
DE
T
/
\
I
5 KHZ
I
6
.22MHZ
P
D
120KHZI
1= 1800 1=450
1
J=72441=1811
1
FM
MOD
I
/
1
I
HI
IPLL 5
1
I I F
M
MIX 5
4
.55MH
AMR,FM
R
AMT, FMT
: 455 KH
z
USB, CW
: 456
.
5
LSB,
FSK
: 453
.
5
CA
R
1/1
0
IX 4
9
.9—10 4MH
1/2
0
1/
5
IPLL
31
I/1
0
MKR —
(=13720_
.20719)
1 1
RIT, XI
T
Y
I/L
11/180
0
L=19800
`_
MN614
7
20799
4
P
.D
99=104MH
z
(98_6 =103
.6MHZ
)
—
5KHZ
—
I
M=323
9
299 4
STEP 5
)Cw
R
1
/P
o
r
I
/P-
I
F
P
I/1
---
-
7006 J
58
.25-
u
53
.25MHz
BP
F
r
1
I
p,D
I/
M
}
20KH
Z
1/450
AM,FM
: 91 MH
z
USB,CW
: 91
.3 MH
z
LSB,FSK
: 90
.7MH
z
IPLL4I
I
AM,FM
: K=1820
0
USB,
CW
K=1826
0
LSB,FSK
K=1814
0
IPLL
11
D
I/N,I/A--L
1
8
SOOKHZ
INT=13-
.73
T _ MN614
7
NT=PN-A
L—
—
I
91 MH
z
/'
—
1
I
.98^-2
.08MH
z
64
.78
=
59
.88MHz
P
.D
5KH
z
I/K
1/180
0
—
As shown in figure 2, all received frequencies excluding th
e
local oscillator frequency fLo are generated in the PLL circuit
.
The frequencies generated in these loops are expressed a
s
follows
:
-
fsT
D
VC04
:
f
K04
4
800 •
. fvco4 = 7200 fSTD
...
3
.fsTD
L
VCO3
: fvLos =
4
800
fvcos = 7200 fSTD
....
4
fvcoz + fvco3 + fvco4
1
'fsT
D
50
20
4
M
45 0
M
fsTD
fvco
_ s
fvco4
5
fvcoz = 1800
50
2
0
VC01
:
N
1
8
:
.
fvcos = 72 fSTD + fLo +
f
STD
f
1
002
. .
6
Based on these formulas, the frequencies fvcor fHET, and
fCA
R
are expressed as follows
:
/
N
M
L
fvco
= fvcor =
(
72
1800 + 3600000
K
+ 1440000 + 1) fsTD + fLo
7
J
f
HET = fVCO5 = 41
fSTD
8
Formula 1 may now be rewritten as follows
:
N _
M
L
J
fIN 1
72
180000 + 3600000
41 +
1
)
.
fsT
D
1
0
Note that f
L
o
is
not included in formula 10
. That is,
a
received frequency is determined by the reference frequen-
cy fs
TD
and frequency division data
Ito
N
. Further analysi
s
of formula
10 shows the following
:
i)
Basically, frequency division data I to N contain no er-
ror because they are controlled by the microproces-
sor according to the operating frequency
.
ii)
The accuracy of the operating frequency is equal t
o
that of the reference frequency, because all frequen-
cies other than fs
TD
in formula 10 are determine
d
by the microprocessor
.
iii)
The operating frequency does not change even if k o
r
fLo changes
.
When f
IN
= 14 MHz (USB mode) in formula 10 , f
IN
an
d
f
STD have the following relationship
:
VCO5
:
fvcos
4 fsTD
fvcos =
J
I
4
1
fSTD
2
VCO2
:
fvcos — f
L
o — fSTD + fvcoz
1
f
10
4
sTD
fvco4
K
fcAR
200
1440000
fSTD
9
5
TS-440S
CIRCUIT DESCRIPTIO
N
I=1800, J=7244, K=19800, L=3239, M=4
1
fin = 0
.388 fsTD
1 1
When fIN = 30 MHz (USB mode) in formula 10 , f
IN
an
d
fSTD have the following relationship
:
I = 1800, J = 7244, K = 19800, L = 3239, M = 7
3
.'
. fIN = 0
.833
f
STD
1
2
Since the precision of the reference crystal oscillator use
d
in the TS-440 is 10 ppm (—10 to 50°C) and the receive
r
system has the characteristics shown in items i) and ii), th
e
total accuracy is stable at any point from 30 kHz to 30 MHz
.
The maximum amount of frequency shift is only +/— 30
0
Hz (see formula 12 )
. The characteristic shown in ite
m
iii) enables variable band functions such as IF shift to be im
-
plemented, using the microprocessor. The microprocesso
r
also is used to set carrier points by adjusting fcAR, and to se
t
and adjust the amount of IF shift
.
So far received frequencies in the SSB mode have been dis
-
cussed
. For receive modes other than SSB, and in transmi
t
mode, operating frequency is determined by the referenc
e
frequency and frequency division data
.
In CW receive mode,
fvco
is shifted down 800 Hz and use
d
as
fvco3
.
In AM or FM receive mode, fCAR generation i
s
stopped
. In FM receive mode, f
HET
is modulated by addin
g
audio signals to VCO5 from the microphone
. FSK (RTTY) i
s
transmitted in LSB mode and uses AFSK by adding audio sig
-
nals externally
.
The type of frequency displayed differs, depending on th
e
mode, as shown in Table 1
.
Mode
Displayed frequenc
y
USB, LSB, FS
K
C
W
AM, FM
Carrier point frequenc
y
Transmission carrier frequenc
y
IF filter center frequency
Table 1 Displayed frequencie
s
3
.
Receiver Circuit Descriptio
n
IC
2
C335
7
f
I F AMP
.
DE
T
Noise
S
O
CF
3
CFW455
Fig
. 3 Receiver circuit configuratio
n
CF I
Q7,
8
3SK73GRx2
IC
7
µPC2002V
S P
SSB
C
.F
AF P
A
CF
2
C
.
F
6
TS-440
S
CIRCUIT DESCRIPTIO
N
t
Signals from the ANT pin are fed into the RAT pin of the R
F
unit via the transmit/receive switching relay
. The signals the
n
go to the 10 BPFs through the approx
. 20 dB attenuator cir
-
cuit, the first stage of the first IF trap circuit, and the lo
w
pass filters (which pass only 500 kHz or less)
. The signal the
n
goes through the second stage of the first IF trap circuit, an
d
is mixed with the VCO signal and converted into the first I
F
signal of 45
.05 MHz in the first mixer, consisting of Q3 an
d
Q4 (2SK125-5)
. The VCO circuit consists of Q21 to Q2
4
(2SC2668Y) and oscillates in four bands from 45
.05 MH
z
to 75
.05 MHz
. Oscillator frequencies are controlled by D
C
signals from the PLL unit
.
The first IF signal of 45
.05 MHz is passed through the MC
F
(F1), which is used in both receive and transmit, and is am
-
plified by the first IF amplifier Q5 (3SK74L)
. In the secon
d
mixer, consisting of Q6 and Q7 (2SK1 25), the first IF signa
l
is mixed with the heterodyne oscillator signal (36
.22 MHz
)
from the PLL circuit, amplified by Q12 (2SC2668Y) to ob-
tain the second IF signal (8
.83 MHz)
. The second IF signa
l
of 8
.83 MHz goes through the gate of the noise blanker
. I
n
modes other than FM , the signal then goes through the MC
F
(F2) and is fed into the IF unit through buffer amplifiers Q
8
and Q9 (2SC2668Y)
.
1) Selectivity circui
t
Figure 4 is a selectivity circuit diagram
. In auto mode, th
e
appropriate bandwidth filter is automatically selected accord
-
ing to mode
. When an optional filter is used, two filters ar
e
available
. Tables 2 and 3 shows the various combinations
When the optional 8
.83 MHz filter is connected, the secon
d
IF signal is then fed from the IF unit into the optional filter
.
In the third mixer, consisting of Q1 and Q2 (3SK73GR), th
e
second IF signal is mixed with 8
.375 MHz signal generate
d
by IF unit's heterodyne oscillator circuit, consisting of Q5
3
and Q54 (2SC2458Y), and converted into the third IF signa
l
(455 kHz)
. The third IF signal is then amplified by Q
5
(3SK73GR)
. A diode switch is used to route the signal t
o
either the FM or SSB circuits
.
In SSB mode, the third IF signal goes through the SSB cer-
amic filter (XF3)
. In AM mode, the third IF signal goes throug
h
the AM ceramic filter (XF4)
. In either mode, the third IF sig-
nal is then amplified by Q7 and Q8 (3SK73GR) and detected
.
In FM mode, the third IF signal goes through the FM cerami
c
filter (XF5)
. The signal is then sent to the FM IF, IC2 (M
C
3357) for amplification and detection
. IC2 also contains a
n
FM noise squelch circuit
.
The detected SSB/AM signal is passed through the notch cir
-
cuit, consisting of hybrid IC IC1 (BX6124) and squelch gat
e
Q12 (2SC2459BL)
. The signal then goes through the A
F
volume control and is amplified to the appropriate level b
y
AF amplifier IC7 (UPC2002V)
.
of bandwidth available when optional filters are used
. In F
M
mode, the selectivity switch does not operate and a singl
e
dedicated FM filter is used
. Optional filters operate only i
n
receive and are separate from the filters used in transmit
.
AUTO SELECTIVITY CONTROL
I
—
X59—1070—00
1
D6
01
I
558
21
,
i
l
a
< ss
R
455 3t_
.
14
/a
D
I
+
R
+
z
'
.
,$W
I
AI
AL
T
D5
02
L a
J
r
p1
<
I
cw
R
R4~~
fro
m
04
IC 1
0
D4
RY
R
D
2
~•
14
i
D3
0 3
Bew
sj
r
l
a
—
i
L_
.
j
J
<A M
R
45A
6L
RX
B
45A
I
DI I
la
Bow
I
o
D
9
M 2
I4
N
-
88
5
455
0
D
5
45S
(
-
a
D8
6
SELEC-
TIVIT
Y
BBC
AUTO
n
AU
T
454
GNDI
F/14
—
J
Fig
.
4
Selectivity control circuit
MANUAL SELECTIVITY CONTROL
7
TS-440S
CIRCUIT DESCRIPTIO
N
Filter selectiv
e
AUTO MODE
WITHOUT OPTION
OPTION INSTALLE
D
MODE
8
.83MHz
455kHz
8
.83MHz
455kH
z
SSB
Through CFI
XF1
CF
1
CW
Through
CF1
XF2
CF
1
AM
Through
CF2
Through
CF
2
FSK
Through
CFI
XF2
CF
I
FM
Through
—
Through
—
XF1:
YK-88S or YK-88S
N
XF2:
YK-88C or YK-88C
N
Table
2
Item
Ratin
g
Center frequency fo
45
.05 MH
z
Center frequency deviation
fo±
1 kHz at 3 d
B
Pass bandwidth
±9
.6
kHz or more at 3 d
B
Attenuation bandwidth
±28
kHz or less at 10 d
B
Ripple
0
.7 dB or les
s
Insertion loss
2
.0 dB or les
s
Guaranteed attenuation
30 dB or more with
±1
MH
z
(Except spurious
)
Final impedance
2 kS1±10 %IL characteristi
c
Table 4 MCF (L71-0259-05) (RF UNIT
Fl
)
Item
Ratin
g
Center frequency fo
8830
kHz±0
.5
kH
z
Pass bandwidth
±3
kHz or more at 3 d
B
Attenuation bandwidth
±12
kHz or less at 18 d
B
Guaranteed attenuation
30 dB or more within
fo±
1
MH
z
Ripple
0
.5 dB or les
s
Insertion loss
1
.0 dB or les
s
Final impedance
2
.5 kfll3 pF
Table 6 MCF (L72-0260-05) (RF unit F2
)
Item
Ratin
g
Center frequency fo
455
kHz±0
.2
kHz at 6 d
B
6 dB bandwidth (total)
± 1
.1
-1
.3
kH
z
60 dB bandwidth
4
.5 kHz or les
s
Guaranteed attenuation
60 dB or mor
e
(at 0
.1
-1
MI-Iz
)
Spurious (600—700 kHz)
40 dB or mor
e
Ripple with bandwidth
2 dB or less at 60 d
B
Insertion loss
2 dB or les
s
Temperature
— 10°C—
+50°
C
Input and output impedance
2
a
l
Table 8 Ceramic filter (L72-0356-05) (IF UNIT CF1)
MANUAL MODE
WITHOUT OPTION
OPTION INSTALLE
D
SELECT
8
.83MHz
455kHz
8
.83MHz
455kH
z
N
NO
RX
XF2
CF
1
XF1
CF
1
M
1
M2
Through
CFI
Through
CF
1
W
Through
CF2
Through
CF2
XF1:
YK-88S or YK-88S
N
XF2:
YK-88C or YK-88C
N
Table
3
Item
Ratin
g
Center frequency fo
455 kH
z
6 dB bandwidth
±2
kHz or mor
e
40 dB bandwidth
7
.5 kHz or les
s
Insertion loss
6 dB or les
s
Guaranteed attenuatio
n
(within 455kHz ±
100kHz)
35 dB or mor
e
Input and output impedance
2
.0
a
l
Table 5 Ceramic filter (L72-0355-05) (IF UNIT CF2
)
Item
Ratin
g
Center frequency fo
455
kHz±1
'kH
z
6 dB bandwidth
±6
kHz or mor
e
50 dB bandwidth
±12
.5
kHz or les
s
Rippl
e
(within 455 kHz±4 kHz)
3 dB or les
s
Insertion loss
6 dB or les
s
Guaranteed attenuatio
n
(within 455 kHz± 100kHz)
35 dB or mor
e
Input and output impedance
2
.0 kS
l
Table 7 Ceramic filter (L72-0315-05) (IF unit CF3
)
Item
Ratin
g
Center frequency fo
8 830 MH
z
Attenuation bandwidth
±50
kHz or more at 3 d
B
Guaranteed attenuation
35 dB or more at 9 285 MH
z
45 dB or more at 9
.74 MH
z
Insertion loss
6 dB or les
s
Ripple
1
.0 dB or les
s
Input and output impedance
330 S
l
Max
voltage (DC)
50 V (Min
l
Table 9 Ceramic filter (L72-0351-05) (IF unit CF4
)
8
TS-440
S
CIRCUIT DESCRIPTIO
N
2)
AF notch circuit
R OH
M
BX7I91— 851
8
123
10
BX719
I
R7 IOK
R9 22
K
OUT!
-
S
C
5
1
0
+
0 iI t
i
U
W
U
D27
D2
6
Fig
. 5 NOTCH circui
t
The hybrid ICI in the IF unit is an audio notch circuit
.
Figure 5 shows its equivalent circuit
. This circuit forms state-
variable band pass filter, also known as a bi-quad filter
. Th
e
notch frequency can be changed using the notch control vari
-
able resistor
. Since the circuit consists of the hybrid IC, sta
-
ble attenuation characteristics can be obtained electrically an
d
thermally
. The range of variable notch frequencies is 400 H
z
to 2600 Hz
.
The notch frequency is determined by the following tw
o
formulas
.
1)
f
N
,,R6/27r (R1 +Notch VR)•R8•R10•C1
.
C65
1
2)
R6
.
1R12+R13)=R10•R11
2
If a variable resistor is used for resistor NOTCH VR, the notc
h
frequency can be controlled according to formula 1)
.
The notch frequency range is from 400 to 2600 Hz, and at-
tenuation is from 25 to 50 dB
.
9
TS-440S
CIRCUIT DESCRIPTIO
N
3
.
Transmitter Circuit Descriptio
n
IC
4
MIC
pPCI
I58HZ
SS
B
D
<M1C AMP
GAI
N
PRO
C
FSK
IN
45
.05^
-
75
.05MH
z
Q4
6
3SK73
Q10,1
I
3SK122 x2
Q13,1
4
3SKI22x
2
F
I
MC
F
Q4
4
2SC2459
IC
5
AN612
CFI
IC
6
AN612
CF
4
IST
MIX
9
.83MH
z
DB
M
ssB
Q1
6
2SC253
8
LP
F
Q
I
2SC2075
02,3
Q4,
5
2SC2509x2 2SC2879x 2
LPF/
-
0
A
.T
R
X
Fig
. 6 Transmitter circuit
configuratio
n
In SSB, CW, AM, or FSK mode, the transmitter system use
s
triple conversion . In FM mode, the transmitter system use
s
double conversion using PLL modulation
.
Audio signals from the microphone are applied to the MI
C
pin (connector (21)) of the IF unit and are separated into SS
B
modulation and VOX signals
. The SSB signal is amplified ap-
prox
. 8 dB by IC4 (µ
.PC 1 1 58HZ)
. AFSK audio signals fro
m
the AFSK IN pin (back panel) are also applied to IC4
.
IC4 functions as a SPEECH processor
. Output from IC4 i
s
distributed to the MIC GAIN control (front panel) and FM cir-
cuit (RF unit)
. In SSB mode, the signal applied to the MI
C
GAIN control is sent back to the IF unit (connector (23) MV2)
,
amplified by Q44 (2SC2459), and supplied to the balance
d
modulator IC5 (AN612)
. In FM or CW mode, Q44 does no
t
operate because a cut-off voltage is supplied to its emitte
r
via diodes D82 and D46 . The signal converted to 455 kH
z
10
TS-440
$
CIRCUIT DESCRIPTIO
N
DSB by IC4 goes through the SSB transmit switching diode
s
D17 and D18, filter switching diodes D14 and D12, and SS
B
ceramic filter CF1, to obtain the SSB signal
. The SSB signa
l
then goes through the transmit switching diode D36 and i
s
fed into the transmit first mixer, IC6, where the SSB signa
l
is mixed with the output from the 8
.375 MHz oscillator i
n
the IF unit, and converted to 8
.83 MHz
. In CW or FM mode
,
the carrier signal from the PLL unit does not go through IC
5
BM or the 455 kHz filter
. These carrier signals are applie
d
to IC6 via switching diodes D53 and D54
. The output signa
l
from IC6 goes through the MCF to remove spurious compo
-
nents, and is amplified by the IF amplifier Q46 (3SK73) an
d
sent to the RF unit
. Q46 provides ALC control and C
W
keying
.
In the transmitter second mixer, consisting of Q1 1 and Q12
,
(3SK122), the 8
.83 MHz transmit IF signal input to the R
F
unit is mixed with HET oscillator signal (36
.22 MHz) fro
m
the PLL unit and converted to 45
.05 MHz signals
. The 45
.0
5
MHz signal goes through D23 and the MCF to remove an
y
spurious components
. The 45
.05 MHz signal then goe
s
through D27 and is supplied to the transmit third mixer con
-
sisting of Q13 and Q14 (3SK1 22)
. In the third mixer the sig
-
nal is mixed with VCO signal (Q21 to Q24) amplified by Q1
2
(2SC2668) and converted to the required transmit frequen
-
cy (1
.8 to 29
.7 MHz)
. The signal from the third mixer goe
s
through the low pass filters C156, C158, C159, and L89
,
and is amplified by the wide band amplifier Q15 (2SC2570)
.
The signal then goes through the wide band transformer Ti
9
and low pass filters C164, C165, and L90, and is further am
-
plified by wide band amplifier Q16 (2SC2538)
. The signa
l
from the Q16 goes through the output transformer T20 an
d
is used as the drive output
.
In FM mode, the PLL VCO is directly modulated
. The audi
o
signal from IF unit IC4 (UPC1 1 58HZ) is fed into the RF uni
t
via the FM1 pin
. In the RF unit, the audio signal is amplifie
d
by Q36 (2SC2459) and Q37 (2SC2603), and goes throug
h
the limiter circuit consisting of Q38 (UPC4558C) and lo
w
pass filter circuit, and is sent to the PLL unit via the FM
D
pin
. In the PLL unit, the 36
.22 MHz VCO is modulated
. Q3
9
(2SC2603) is a switching circuit to prevent the modulate
d
signals from being emitted from the PLL unit in a mode othe
r
than FM
.
For
"S"
model radios the output from the RF unit i
s
amplified to a 100 W power level by Q1 (2SC2075), Q
2
and Q3 (2SC2509), and Q4 and Q5 (2SC2879) in th
e
final unit
. The 100 W output goes through the LPFs whic
h
differ by bands, and is sent as output to the antenna via th
e
AT unit and transmit/receive switching relay
. SWR an
d
ALC detection is performed at the output of the LPFs
.
1) Antenna tune
r
The antenna tuner operates when the AUTO/THRU switc
h
is in the AUTO position and the AT TUNE switch is ON
. Th
e
antenna tuner is driven in the CW mode and power is reduce
d
to 50 W by the microcomputer regardless of the mode select
-
ed before the AT TUNE switch was turned ON
. The rang
e
of operating frequencies is determined by a microcompute
r
program, and is from 3
.5 MHz to 30 MHz
.
• AT unit operatio
n
Power transmitted by the final unit passes through the cur
-
rent and voltage detecting transformers L1 and L2 usin
g
toroidal cores
. Current and voltage components detecte
d
by the transformers are supplied to pins 9 and 13 of IC
2
for wave shaping and their phases are compared by IC
3
HD10131
. The output from pin 3 of IC3 depends upo
n
the phase of the voltage and current waveforms applie
d
to IC3
. The signal from IC3 pin 3 is sent to pins 10 an
d
15 of buffer IC IC3 HD10125
. Output from pins 12 an
d
13 of IC3 goes through level shift Zener diodes D5 an
d
D6 to control the input circuit of motor drive IC IC
5
BA6109U2
. The output signal is used to drive motor M
1
to adjust the variable capacitor VC1 so that the phas
e
difference between voltage and current components i
s
reduced
.
The current and voltage components output from the cur
-
rent and voltage detecting transformers is also supplie
d
to the voltage comparator IC1 NJM2903D
. The compa-
rator output is used by motor drive IC IC6 BA6109U2 t
o
drive motor M2 to adjust variable capacitor VC2 so tha
t
the amplitude difference is reduced
. That is, the phase con
-
trol variable capacitor VC1 is controlled so that the cur
-
rent is in phase with the voltage and the voltage contro
l
variable capacitor VC2 is controlled so that the amoun
t
of amplitude difference between the current and voltag
e
is reduced (SWR1, an SWR of 1 to 1, is obtained whe
n
the current and voltage are in phase and the amount o
f
amplitude difference is 0)
. VC1 and VC2 are designed t
o
operate independently of each other, but since phas
e
difference affects the amount of amplitude difference an
d
vice versa, VC 1 and VC2 will normally rotate together
.
Forward and reflected waves detected by the filter unit ar
e
converted to SWR control signals in the SWR arithmetic cir-
cuit in the control unit and are sent to the ISW pin of th
e
AT unit
. Since the SWR control signals are current wave
-
forms, the signals are converted from Ito V waveforms b
y
IC8 (b/4) in the AT unit and to obtain the corresponding vol
-
tage mode SWR signals are generated
. The SWR signals ar
e
then fed into the SWR comparator IC8 (C/4)
. The referenc
e
voltage pin 9 of the IC8 (C/4) is supplied with a voltage cor
-
responding to an SWR of 1
.25 to 1 via a potentiometer
.
Therefore, when the actual SWR value exceeds 1
.25, pin
8
of SWR comparator IC8 (C/4) is H, so the motor drive vol-
tage control transistor Q5 turns on and the collector of Q
4
is supplied with voltage from pin 14S
. The voltage is als
o
used to turn the tuning LED on. The inverted input pin of IC
8
(d/4) is supplied with triangular waves generated by IC7, an
d
its non-inverted input pin is supplied with the above SWR vol
-
tage signals
. As a result, as SWR lowers, IC8 (d/4) outputs
11
TS-440S
CIRCUIT DESCRIPTIO
N
waves changing from continuous waves to relatively low dut
y
pulses
. Q1 is driven by this voltage waveform to control Q2
,
which is connected to the collector of Q4 in series and mo-
tor drive voltage is generated
.
If the motor turns too fast, the SWR value will be smalle
r
than the motor stop value because of the inertia of the mo-
tor
. As a result, the motor will continue to operate even if
the motor stop signal is sent and the SWR value will con-
tinue to be greater than the motor stop value, causing th
e
motor stop signal to turn off. That is, the motor will not sto
p
and it will be difficult to obtain a match
. If the motor spee
d
is too slow, it will take a long time to satisfy a matching con
-
dition
. The TS-440 therefore controls the motor speed ac
-
cording to changes in SWR
.
TUNE STO
P
ADJ
IC8
c/4
Q
5
Triangular
wov
e
generator
Fig
. 7 Antenna
tuner circui
t
The antenna coupler is a T type. Six relays RL100 to RL10
5
are used to change taps within the range 3.5 MHz to 30 MHz
.
2) Cooling fan circui
t
The final unit contains the temperature-sensitive thermisto
r
TH1 thermally coupled with final transistor Q4
. When tem-
perature on the surface of Q4 reaches approx
. 50°C, the fa
n
start comparator Q9B operates (H level), causing Q8 to tur
n
on to operate the fan
. During operation of the fan, tempera
-
ture protection comparator Q9A is at a L level, so the tem-
perature protection circuit does not operate
.
When temperature on the surface of Q4 goes down to 45°C
,
the cooling fan turns off
.
•
Final temperature protection
circui
t
When the temperature of the final transistor Q4 rises u
p
to approx
. 80°C, the temperature protection comparato
r
Q9A turns on (H level), Q1 in the filter unit also turns on
,
and a minus DC voltage is supplied to the ALC line, reduc
-
ing the transmitter output to zero
. (The TS-440 does no
t
return to a receive state
.) When the temperature of th
e
final transistor Q4 falls to approx
. 70°C, the protectio
n
circuits turns off allowing the transmitter to operate again
.
•
SWR protection circui
t
When antenna VSWR is bad, or the reflected wave is to
o
large, because the auto antenna is tuning for example, L4
2
and L43 detect the state and its output is rectified
. Th
e
rectified signal is then amplified by Q2 to control the AL
C
voltage so that drive power is reduced. As a result, loa
d
on the final unit is reduced
.
•
SWR automatic arithmetic circui
t
The TS-440 uses the automatic arithmetic circuit in th
e
AT-250
. The forward wave voltage
VSF
and reflecte
d
wave voltage
VSR
from the filter unit are fed into the ana
-
log arithmetic circuit of the switch unit, and used to se
t
the voltage level of IC8 pin 2 (5 V
+VsR/VSF)
.
Output vol-
tage from the pin 2 is shifted by IC5 to move the needl
e
in the SWR meter
.
IC5 contains a level shift/meter amplifier and an auto tune
r
V-I convertor
. IC7 contains a square wave generator an
d
a voltage comparator
. IC8 contains an integration circuit
.
Q3 and Q4 are used to switch forward and reflected wav
e
input signals alternately
.
Comparato
r
output
Q9
B
/45°
/50°
0° Bo°
Temperature °
C
FAN
OFF FAN
ON
Thermal
Therma
l
protection OFF protection O
N
Fig
. 8 temperature protection operatio
n
V
12
TS-440
S
CIRCUIT DESCRIPTIO
N
Vs
F
is compared with voltage from IC8 pin 6 (5
.5 V)
.
When SWR increases,
VSF
lowers and the voltage leve
l
of IC8 pin 8 rises
. At IC7 pin 3, a triangular wave is moni
-
tored
. The triangular wave is compared with the wav
e
from IC8 pin 8 and output
. The triangular wave is con-
verted to a square wave by IC10 and sent to switch Q
3
and Q4
. This voltage is used as the SWR control voltage
.
Output voltage from IC8 pin 2 consists of the voltage com
-
pared with VsR/Vs
F
and + 5 DC voltage
. It is distribute
d
to IC4 the level shift/meter amplifier to move the needl
e
in the SWR meter and IC5 the V-I convertor to control th
e
AT440
.
VR14 is used to adjust the SWR meter ZERO point
.
VR 13 is for SWR meter adjustmen
t
3) FULL/SEMI BREAK-IN and VOX circuits
RL TXB RX
B
MICROPROCESSOR
STAND-B
Y
CIRCUIT
CONTROL
POWER SUPPL
Y
CONTRO
L
CIRCUIT
KEYIN
G
CIRCUI
T
VO
X
CIRCUIT
Fig
. 9-1 FULL/SEMI BREAK-IN block diagra
m
When the standby switch, the key, or the VOX switchin
g
transistor are activated, a ground is applied to the input pi
n
of the control circuit, which causes a standby signal to b
e
fed to the microprocessor to determine if a valid transmit con
-
dition has been met
. When that condition has been met, th
e
KEYIN
G
STAND-B
Y
VOX
standby circuit in the IF unit will be turned on
.
A keying signal is generated by the control circuit, wheneve
r
the key is depressed, to control the keying circuits in the I
F
unit
. This keying signal is also used as the transmit/receiv
e
signal during break-in operations
.
o KEYING (FULL
)
o CONTROL( FULL
)
o KEYING(SEMI
)
0
CONTROL(SEMI
)
Fig
. 9-2 FULL/SEMI BREAK-IN timing chart
13
TS-440S
CIRCUIT DESCRIPTIO
N
FULL BREAK-I
N
H
A
L
B
L
1
KEYING I
N
C
L
H
D
E
F
G
KEYING OU
T
L
H
L
L
L
H
H
L
CONTROL OU
T
SEMI BREAK-IN, VO
X
A
L
H
L
KEYIN
G
VOX
I
N
CONTROL OU
T
F
L
H
J
KEYING OU
T
VO
X
Fig
. 9-3 FULL/SEMI BREAK-IN
timing char
t
The above timing charts show the timing for standby an
d
keying signals
.
When an input from the CW key is supplied to point A a
s
shown in the above figure during full break-in operation
,
the one-shot multi-vibrator and gate circuits generate con
-
trol (full) and delayed keying (full) signals
. After the fun-
damental timing signal, RL (12V) for reception an
d
transmission rises, the keying wave also rises, and whe
n
the key is off, RL falls according to the preset tim
e
constant
.
Semi-break-in operation is synchronized to VOX
. When
a
signal is supplied to point A, the VOX delay time multi
-
vibrator determines the VOX time constant
. The input sig-
nal is converted to a keying (semi) signal by the gat
e
circuit
.
These keying semi/full and control semi/full signals ar
e
converted to appropriate break-in VOX mode signals us
-
ing the slide switch
. The control signal is checked by th
e
microcomputer to see whether transmission is to be per
-
formed
. The control signal is then used to switch CRL i
n
the IF assembly unit and generate RL (12 V)
. TXB (trans-
mit
B+)
(8
.8 V) is generated, synchronized to RL
. Th
e
receive control signal RXB (receive
B+)
(8
.8 V) turn
s
on/off, synchronized to the inverted TXB signal, that is, RL
.
RL
12
V
TXB
8
.8
v
RXB
8
.e
v
Fig
. 10 STANDBY keying timing char
t
14
TS-440
S
CIRCUIT DESCRIPTIO
N
4) Speech
processo
r
IC4 in the IF unit functions as the first stage microphone am
-
plifier or audio speech processor
. When the processor switc
h
is off, IC4 functions as a 20 dB microphone amplifier
. Whe
n
the processor switch is on, IC4 functions as an up to 40 d
B
PROCESSOR OF
F
ON
Fig
. 1
1
MIC
gain amplifier with ALC. When the processor switch is on
,
8 VDC is supplied to the base of the gain adjustment switch
-
ing transistor, Q41, driving the feedback amplifier
.
GAIN 2Od
B
MAX GAIN 4Od
8
4
.
PLL Circuit
s
Theory
of
PLL
circuit
operation
s
The TS-440 PLL circuit uses a reference frequency of 36 MH
z
and consists of five PLL loops covering the range of frequen
-
cies from 30 kHz to 30 MHz in 10 Hz steps
. The PLL circui
t
has an IF shift function which is implemented by insertin
g
carrier frequencies between PLL loops
. The PLL loops includ
e
a carrier circuit PLL loop and an HET circuit PLL loop whic
h
generates a constant frequency of 36
.22 MHz
. Frequenc
y
division for these PLL loops is controlled by the microproces
-
sor
. In all PLL loops phase comparison is made using the refer
-
ence frequency fSTO (frequency control using a single crysta
l
oscillator)
.
Figure 12 is the PLL circuit block diagram
.
The reference frequency (fsro) is generated by a 36 MH
z
crystal oscillator and Q21 (2SC2787)
. Reference frequenc
y
signals are fed into the main loop's IC1 1 (SN16913P) via
a
buffer consisting Q22 and Q23 (2SC2668)
. The signal is als
o
fed into IC13 (SN74S112) via a buffer consisting of Q2
4
(2SC2668)
. In IC13, the signals are frequency divided t
o
generate a 9 MHz signal
. The 9 MHz signal is used as th
e
reference frequency signals for the PLL loops
.
•
PLL
5
PLL5 consists of IC 18 (MN6147) and its associated loo
p
components
. VCO5,Q36 (2SK192A), is locked at a fre-
quency of 36
.22 MHz
. The 9 MHz reference frequenc
y
signal is supplied to pin 3 of IC 18, where the signal is divid
-
ed by 1800 (450 in FM mode) to generate
a
5 kHz (2
0
kHz in FM mode) signal used for comparison
. VCO5's out
-
put signal is supplied to IC 18 pin 16 via Q37 (2SC2668)
,
where the signals are frequency divided by 7244 (181
1
in FM mode)
. The phase of the signal is then compare
d
with that of the 5 kHz (20 kHz in FM mode) signal by th
e
phase comparator and the VCO5 oscillation frequency i
s
locked
. Frequency division data is supplied by digital uni
t
(DAO to DA3 and CK4)
.
As described above, the dividing ratio used varies depend
-
ing on which mode the TS-440 is in, FM mode or SSB
.
This is because the apparent time constant is increase
d
without changing the active LPF constant so that the PL
L
signals can be modulated easily and reducing distortio
n
during FM transmission
. In modes other than FM, th
e
amount of frequency shift due to mechanical vibration
s
is reduced because the apparent time constant is reduced
.
The output from PLL5 goes through buffer Q38 (2SC2668
)
and LPFs, and is used as the HET signal in the RF unit
.
15
TS-440S
CIRCUIT DESCRIPTIO
N
VCO I A 45
.08
.
. 52
.55 MH
z
8 52
.55
. .
. 59
.55 MH
z
C 59
.55
.
. 67
.05MH
z
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Q3
6
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fLO
J
---
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2502459
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034,3
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IC
1
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Di
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6
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250278
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BUF
F
2SC266
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BPF
O
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D
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UFF
I
I
36
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037
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3
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2
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z
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7244 9MH
z
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LO
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8
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H
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BUF
F
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0
AM,F
M
91MHZ /91
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. USB
4
O
w
2SC2668 90
.7MHZ
: LSH
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A
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o
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}
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z
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. C
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1017
9MH
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II
6
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.5MH
Q2
6
2SC2668
IC1
2
2SC245
8
BUFF
L
DIV
SN74SII2N
IC1
6
1/30,1/2
SN74SION
IC1
5
4
030
029
Q27,2
8
\
2SC2668
HET
CA
R
SFT
CA
R
05
2SC2668
2502458
250195
9
2SC266
8
15K Hz
(
P
D
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019
5
SN16913
P
2SC2668
459
L
SN16913P 2502458
PL L
4
01,
2
25031132
2
IC1
0
54460
L
58
.25-53
.25MHz
Q1
8
016,17
I
PLL
3
2502668 2SC266
8
I20KHZI
IC9
015
01
3
2502668
®
9MHz K 1820
0
I/ 18260
: USB , C
w
\18140 LS8,FS
K
IF SHIFT I-40--40
1
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I-16-
. 15
)
B
.A
P
A
LPF
h-1
P
.
D
I
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. C
.
2503113 x 2
S 1 R
MN6147 2802668
99
.
-IO
4
Q12
250266
6
IC
5
64
.78-59
.88MHz 1
.98-2
.08M4z
IC
6
/
5
01
4
BUF
F
LPF
DI
V
I/1
0
B P F
MN6147
C I
SN74LS90N M54460L
2SC266
8
M 9MHz
010,11
(5K
H
3239
.
. 2994 (STEP 51
A
. LPF
P D
_ IC
4
HA C
MN 614
7
2503113
. 2
L 9MHz
RITZ-120- ,120
1
19800- 2079
9
Fig
. 12
PLL circuit block diagra
m
•
PLL
4
PLL4 consists of IC1 (MN6147) and its associated loo
p
circuit
. VC04, Q3 (2SC2668), is locked at a frequenc
y
of aproximately 91 MHz, which differs depending on th
e
operational mode
. The 9 MHz reference frequency is ap-
plied to pin 3 of ICI, where the signal is divided by 180
0
to generated the 5 kHz signal for frequency comparison
.
The output of VC04 is supplied to IC1 pin 16 via buffe
r
amplifier Q4 (2SC2668)
. In ICI, the output is divided b
y
an appropriate division ratio (18200 or so) which differ
s
depending on the mode
. The phase of the signal is com-
pared with that of the 5 kHz reference signal by the phas
e
comparator and the VC04 oscillation frequency is locked
.
Frequency division data is sent from the digital unit (DA
O
to DA3 and CK3)
.
The output from PLL4 goes through buffer amplifier Q
5
(2SC2668) and is divided by 20 in IC2 (M54459L(
. Th
e
signal is further divided by ten in the carrier circuit of IC
3
(SN74LS90N) and then fed into the IF unit as the carrie
r
signal via the LPF, and buffer Q7 (2SC2458) and Q
8
(2SC 1959)
. In AM or FM receive mode, switching circui
t
Q6 (2SC2458) operates when an SFT signal is sent, an
d
as a result, IC3, Q7, and Q8 are stopped to cut carrie
r
signals
.
The PLL4 output signal also goes through the LPF an
d
buffer amplifier Q9 (2SC2458) and is fed into the mixe
r
in the main loop, where the signal is used to form the dig
-
ital VFO signal
. As a result, the operating frequency doe
s
not change even if the carrier frequency is changed, whic
h
enables USB and LSB mode switching IF shift and fine car
-
rier point adjustment
. In SSB, CW, or FSK reception mode
,
the may be shifted +/– 1 kHz or more and the carrie
r
point can be adjusted in the range from – 400 Hz to + 35
0
Hz
.
•
PLL
3
PLL3 consists of IC4 (MN6147) and its associated loo
p
components
. VCO3, Q12 (2SC2668), is locked in th
e
range of 99 MHz to 103.995 MHz
. The 9 MHz referenc
e
frequency signal is supplied to pin 3 of IC4, where the sig
-
nal is divided by 1800 to generate the 5 kHz signal fo
r
frequency comparison
. The output of VCO3 goes throug
h
buffer amplifier Q13 (2SC2668) and is applied to IC4 pi
n
16
. In IC4, the output is divided by L and the phase o
f
the signal is compared with that of the 5 kHz referenc
e
signal by the frequency comparator, and VCO3 oscillatio
n
frequency is locked (in 5 kHz steps)
. The division ratio
,
L, is supplied by the microprocessor, in the digital unit
,
(DAO to DA3 and CK2)
. L is in 1000 steps (19800 t
o
20799) corresponding to 0
.00 kHz to 9
.99 kHz
. In C
W
receive, in order to obtain 800 Hz beat signals in the oper
-
ation frequency display, the L is shifted
-80
(19720 t
o
20719) and when RIT/XIT operates, the Lis changed s
o
that fvco is shifted +1– 1
.2 kHz or more
. In AM or F
M
mode, the L is shifted by 10 steps to change
fvco
by 10
0
Hz steps
.
Output from PLL 3 goes through buffer amplifier Q1
4
(2SC2668) and it is divided by ten in IC5 (M54460L) an
d
then by five in IC6 (SN74LS90N)
. The signal is then fe
d
16
TS-440
S
(
CIRCUIT DESCRIPTIO
N
into pin 2 of MIX5 IC7 (SN1 691 3P) via the LPF
. In MIX5
,
the signal is mixed with the signal generated by PLL4 an
d
goes through the BPF to generate a signal in the range o
f
6
.53 MHz to 6
.6301 MHz (in 100 Hz steps)
. The gener-
ated signal is supplied to pin 5
.
•
PLL
2
PLL2 consists of IC9 (MN6147) and its loop circuitry
.
VCO2, Q18 (2SC2668(, is locked in the range of 58
.2
5
MHz to 53
.2501 MHz
. The 9 MHz reference frequenc
y
signal is supplied to pin 3 of IC9, where the signal is divide
d
by 450 to generate a 20 kHz signal for frequency com-
parison
. VCO2's output goes through buffer amplifier Q1
9
(2SC2668(, and is fed into MIX4 pin 2 and mixed wit
h
the 6
.35 MHz to 6
.63 MHz signals applied to pin 5
. Th
e
mixed signal then goes through the BPF to obtain 64
.7
8
MHz to 59
.88 MHz signal (in 100 kHz steps)
. Th
e
64
.78 MHz to 59.88 MHz signal is fed into IC9_ pin 16 vi
a
buffer amplifier Q15 (2SC2668)
. In IC9, the signal is divide
d
by M, and the phase of signal is compared with that of th
e
20 kHz reference signal by the phase comparator, and thu
s
MIX4 output is locked (in 100 kHz step)
. The division ratio
M
is supplied from the digital unit (DA0 to DA3 and CK1), and i
s
in 50 steps from 3239 to 2994 corresponding t
o
0
.00 MHz to 0
.49 MHz
.
The output from PLL2 goes through buffer amplifier Q2
0
(2SC2668) and is divided by ten in IC 10 (M54460L)
. Vi
a
the LPF, the signal is fed into pin 2 of MIX3 IC1
1
(SN 16913P)
. The frequency of the signals depends on th
e
values of L and M, and is in the range of 5
.825 MHz t
o
5
.32501 MHz (10 Hz step)
.
VR1 in MIX4 circuit is used to suppress spurious output
s
from the mixer
. It is necessary to prevent PLL2 from be
-
coming unlocked
.
Signals generated by PLL2 and the 9 MHz reference fre-
quency are mixed in MIX3
. The mixed signal goes throug
h
the BPF, and is further mixed with
fLo
in MIX2 IC1
2
(SN16913P) on the IF unit
. The output from MIX2 goe
s
through the BPF to obtain 38
.55 MHz to 39.04999 MHz
.
The signals are then mixed with the output from the fina
l
VCO oscillator in MIX1
.
•
PLL
1
The last PLL loop, PLL1, consists of IC1 7 (MB87006) an
d
its loop components
. In IC 17, frequency division for refer
-
ence and comarison frequencies is set by serial data (SO
,
SCK, and LEI
. When an external prescaler is used, IC1
7
has a modulus control function for configuring the puls
e
swallow counter
.
The VCO oscillator output from the RF unit goes throug
h
Q26 (2SC2668) in the PLL unit and is fed into MIX 1
. Th
e
mixed signals go through the BPF, and they are then am
-
plified by buffer amplifiers Q27 thru Q30 (2SC2668)
,
shaped by IC 15 (SN74S 10N 1 /3), and fed into IC 1
6
(WN74S 1 12N) 1/3, or 1 /2 prescaler
. Basically, IC 16 is
a
two-level FF circuit and functions as a 1 /4 divider. But
,
when IC17 of the PLL unit sends control signals, to IC 1 6
,
IC 16 functions as a 1 /3 or 1 /2 frequency divider in con
-
junction with IC 1 5 (2/3)
. That is, the IC 1 5, IC 16, and IC1
7
form a pulse swallow frequency divider
.
The 9 MHz reference frequency signal is supplied to pi
n
1 of IC17, where the signals are divided by 18 to gener-
ate a 500 kHz signal for frequency comparison
. Signal
s
fed into IC17 pin 8 via MIX1 and the buffer amplifier ar
e
divided by N, and the phase is compared with that of th
e
500 kHz reference signals by the phase comparator
. Th
e
signal then goes through the active LPFs Q31 to Q3
3
(2SC2459) and is fed into the RF unit as VCO voltage sig
-
nals to control the variable capacitor of the final VCO
. Th
e
frequency divider N covers the full range of operating fre
-
quencies from 30 kHz to 30 MHz (500 kHz step), and i
t
has 61 steps of frequency division data supplied by th
e
microprocessor in the digital unit
.
The last VCO signal in PLL1 therefore depends on th
e
values of L, M, and N, and it is in the range from 45
.0
8
MHz to 75
.05 MHz (10 Hz step)
. N is expressed a
s
follows
:
N=PNo -
A
(No>A
)
P
:
Prescaler module valu
e
No
: Programmable counter valu
e
A
: Swallow counter valu
e
PLL IC contains No and A
.
The last VCO unit is contained in the RF unit and consist
s
of four VCOs, each handling one portion of frequencie
s
from 30 kHz to 30 MHz
. The appropriate VCO is selecte
d
by the microprocessor according to band information fro
m
the digital unit
.
•
Unloc
k
If a PLL loop enters a unlock state, the output on the U
L
pin becomes L
. This L signal is sent to the digital unit t
o
stop the microprocessor
.
•
500
kHz marker signa
l
The 500 kHz reference signal for frequency compariso
n
is supplied from IC17 pin 13, and it is used as the marke
r
reference signal
.
5
. Digital control circui
t
The TS-440 digital control circuit uses an 8-bit CPU (7800
)
which does not contain ROM, and has a 16K ROM (27128
)
and a 2K RAM 18418) outside the CPU
. A common bus use
d
for data exchange between the CPU and RAM, and betwee
n
the CPU and ROM and is also connected in parallel to th
e
two 8255's for extended I/O and an 8251 for interface t
o
a personal computer (option)
. To transfer
data
to
or
from a
n
appropriate IC, the CPU uses the WR or RD signal
,
and the chip select signal from the 74LS138
.
The display is dynamically controlled by software, and con-
sists of 13 digits and nine segments
. The 13 digit and seve
n
segment signal is driven by the high voltage resistive buffe
r
(6300), and the other two segment signals are driven by
a
transistor
. The 7800 transfers data serially
. The clock signa
l
is frequency divided by two in the 4013 and sent to the 6300
.
Using the 4011 and 4030, the encoder generates count
17
TS-440S
CIRCUIT DESCRIPTIO
N
pulses and U/D signals from two clock signals which are 90
°
out of phase with each other, and sends the pulses and sig-
nals to the 7800
. A clock pulse interrupts the 7800 and
a
U/D signal causes the 7800 to perform a count up or dow
n
operation for each step
. If fast rotation occurs, the 780
0
processes several steps of PLL data at one time
.
Voltages from the RIT and IF shift VRs are converted fro
m
analog to digital by the A/D convertor IC (4052) and fed int
o
the 7800
. The voltages are used to drive the display and ar
e
reflected in the PLL data
.
The digital control circuit contains two 8255's for extende
d
I/O
. The 8255 in control unit A is an outputonly element an
d
the 8255 in control unit B is an inputonly element for ke
y
scan and static data
. The output 8255 emits VS-1 signals,
PLL data for the 6147, clock signals, and 1 MHz LED data
.
The input 8255 receives key scan data such as panel switc
h
data and DIP switch data for CAR compensation
. It als
o
receives static data which cannot be entered as a portion ke
y
scan data
.
The 7800 outputs four bits of band and mode informatio
n
(11 bands in the frequency range from 30 kHz to 30 MHz)
.
Each time the 8251, used as the interface to a personal com
-
puter, receives one byte of data, the 7800 is interrupted an
d
reads the data from the 8251
. The 7800 analyzes any com-
mand in the data
. In response to the command, the 780
0
controls setting or writes data to the 8251 as required
. Th
e
8251 serially sends one byte of data including a start bit, syn
-
chronizing to a 4800 Hz clock signal
.
RIT IF-SNIF
T
En<mer
count pufs
e
Enc
.
.
u/C s
.9no
l
n ock s,gno
l
A/O converter data
Made lnfnrmaY
Y
O,
:A LEO)
e
/0 control
,E
,
_SB,US0,CW,AM,FM,FSH1
)CIOAk,por',select
t
Tx
e'•al
0,1
Seeial o
t
,O
)
Outdo
.
;clock dot)-
,
Band ,nformofion
(PLC
.195)58,FIP
. 630
0
Enable 2
;
Power down IPO
I
(PLL
:145158,Fi P
.6300
1
Peounwa
l
1825`IAI,l8)
e
825)
)
PIP
C
L
_ J
Rs-232
C
85-I
converter C
S
(Address s rt)
Ton
e
AF Mole (MY)
conirallTON
)
LE
D
PP
Mule 1590)
(M SCR, IMU
,
PLL do
Lock
)
.
.
.too,
dota
l
OPTION
Vs
-
Ines,
I
Lack S
W
AT S
W
MIC UP/DOWN S
W
PTT S
W
vs-I
dos,
.
Key sca
n
0 ke
y
V, SCAN, CLEA
R
.
.,N
. EN
T
tT
,
Et,
T,T-FSE
TA/
B
SPRIT, A=
9
VOICE U
DOW
N
\CAN SW
i
pra NOn
/
'
Fig
. 13 Control
circuit block diagra
m
18
TS-440
S
CIRCUIT DESCRIPTIO
N
1
. Encode
r
The TS-440S uses an optical encorder
. Two different cloc
k
signals from the encoder are
90°,
out of phase with eac
h
other
. This phase difference is not adjustable but depend
s
on the precision of the module
. The two clock signals are
converted into clock pulses (250 pulses/rotation x 4) and U/
D
signals indicating the direction of rotation by the 4011 an
d
4030 and fed into the 7800
. Figure 1 5 is a timing chart fo
r
clock pulse and the U/D signal transmitted to the 7800
.
,uPD7800G
Fig
. 14 Encoder circui
t
4I
I
B
6
8
8
8
4
8
3
81
1
C
4
A
4
CI
O
A1
0
C
2
012
84 BI
I
BIO 8
3
BIO 81
1
B4 - B
3
COUNT PULS
E
BIG
I
—
U/D SIGNA
L
Fig
. 15 Encoder waveform timing chart
19
TS-440S
CIRCUIT DESCRIPTIO
N
2
. Digital displa
y
FIP digit and segment signals are driven by the 6300 bu
t
decimal point and red character signals are driven by a tran
-
sistor
. 8 V is used to increase the brightness of red charac
-
ters
. The 7800 sends display data serially at 1 MHz, but th
e
clock signals are divided by two (500 kHz) in the 4080 an
d
fed into the 6300
. Figure 16 shows how the frequency divi
-
sion is accomplished
. The 7800 sends data from its SO pi
n
Switch uni
t
+5v
(pin 28) and a clock signal from its SCK pin (pin 26) at ap-
prox
. 1 ms intervals
. After the 7800 has sent 8 bits of dat
a
five times, the 7800 sends a negative enable pulse from por
t
B5 (pin 46)
. When a decimal digit goes on, the 7800 set
s
port C4 to L and when a red character goes on the 780
0
sets port C3 to H
.
-------------------
-
+g
~
L
1~)
N_
O Q,
O
I()
e
M N
-
0 0 O 9 0 0 0 O U O
OO
0
02 03 04 05 06
On 08
09 010 011 012 01
3
1
0
0
0
0 0 0 0 0 0
0 0
0
1
00
01 01 9
O
n0
1
014 01
5
o
c
20 bit Display buffer resisto
r
IC3 TC40I3BP A/2
i
f'
p P
D
7800G
46
O
28
5
C
K
D
0
CL P
R
10
8
9
13
S
I
c
LH
contro
l
circuit
20bit Serial shift resisto
r
1 1 1-
---
fl
-
>
J
IC
I
pPD6300C
s
o
s
IC
3
TC40I3BP B/
2
D
26
SCK
3
2
CL PR
Fig
. 16 Digital circui
t
3. Key scan inpu
t
The key scan input block sends key scan signals (negativ
e
pulses) from its 8255 (IC53) port C in the order of CO to C
7
(C6 and C7 are output only once when the POWER switc
h
is turned on)
. When a matrix crossing point switch is on, its
corresponding bit in the 8255 port A is L to enable the switc
h
to be identified
. Figure 13 shows the matrix
. Key scan S
6
and S7 are provided for the extended function using diodes
.
Key
scan
matrix
S
1 2
34
5
6
1 1
LSB
2
USB
3
CW
4
AM
5
F
M
2 6
789
0
FS
K
3
V/M
MV
SCAN
M
.IN
CLEAR
EN
T
4
RIT
ZIT
T-FSET
1MHz
DOW
N
K
5
A/B
SPRIT
A=B
25L
1
U
.
P
6
VOICE
.
T SET ON
CLOCK 1
100L
3
50L
2
100U
8
7
T
.SET OFF
200L
4
25U
6
200U
9
8
TIMER
SET
CLOCK 2
400L
5
501
7
400U
10
Table 10
. Key scan matri
x
20
TS-440
S
CIRCUIT DESCRIPTIO
N
4
. Static input
7800 (ICI
)
C
O
C
2
07
Encoder U/D signa
l
Unlock signa
l
4052 (IC
: Display)
"H"
when U
P
"L"
when unloc
k
A/D convertor dat
a
8255 (IC53
)
B
O
B
2
B
3
B
4
B
5
B7
Lock switc
h
AT switc
h
MIC UP switc
h
MIC DOWN switc
h
PTT switc
h
VS-1 busy signal
"L"
when switch o
n
"L"
when switch o
n
"L"
when switch o
n
"L"
when switch o
n
"L"
when switch o
n
"H"
when VS-1 busy
6
.
AT
control
L
A/D
converter Inpu
t
Fig
.
17
A/D convertor circui
t
2
9
--%---
1
A
K
D
O
I
Table 1 1
.
5
. A/D convertor inpu
t
Voltages controlled by the RIT and IF shift VRs are applie
d
to the 4052 (IC2
: Display)
. The 4052 has four analog inputs
:
AO (IC2 pin 4) is connected to the IF shift VR, and
Al
(pi
n
5) is connected to the RIT VR, the other two inputs are no
t
used
. When reading IF shift data, the 7800 sets port C5 t
o
0 and selects 4052 AO
. As a result, the 3255 sends a posi
-
tive pulse from port BO to reset the 4052, and the 780
0
sends nine positive pulses from port C6, and port C7 receive
s
data
. When reading RIT data, the 7800 sets CO from th
e
4052 to H and thereafter performs the same operations a
s
when reading IF shift data
.
When the AT switch is turned on with the AUTO/THR
U
switch in the AUTO position, 8255 (IC53) ports B2 and B
5
go on
. When the 7800 knows that the AT switch is on vi
a
port B2, it will enter the CW-mode, and sets port A2 to
H
and A0,
Al,
and A3 to A6, and B4 to L, and transfer a pow-
er down signal
. The 7800 then knows that the PTT switc
h
is on via 8255 port B5, and sets port A6 (transmission con-
trol signal) to H, enabling transmission
. However, if the select
-
ed frequency does not allow the 7800 to prepare fo
r
transmission, 7800 port A6 remains L and the 7800 will no
t
enable transmission
. When the selected frequency is 1.9 MH
z
or less, the 7800 will not enter CW mode nor send a powe
r
down signal
.
7.
LED outpu
t
Depending on the mode, the 7800 makes the 8255 (IC2
)
send M, SCR, 1 MHz, and lock LED signals from ports B4
,
B5, and B6
. When the LED goes on, these ports are L
.
When the mode LED is on, 7800 ports AO to AS are H
. A
O
to A5 correspond to LSB, USB, CW AM, FM, and FSK respec
-
tively. Mode LED output is used as mode control signals i
n
the IF unit
.
8.
VS-1 (option
)
When the voice switch is turned on, an address correspond-
ing to the instruction (numerical data) entered is sent fro
m
8255 (IC2) ports AO to A4 and a positive start pulse signa
l
is sent from port A5
. The VS-1 sends busy signals (H) t
o
8255 (IC53) port B7 while the voice switch is on
. After th
e
voice switch goes off, an address corresponding to the nex
t
instruction and a start signal are sent
.
9.
µPD 7800 reset circui
t
The 7800 reset circuit is used to initialize the 7800 whe
n
the POWER switch is turned on
. This circuit supplies a rese
t
pulse to the 7800 after the clock is supplied to the 7800 sys
-
tem clock input, X1 (pin 31)
. Since IC3 remains on unti
l
PST520D (IC3) pin 1 reaches 4.3 V, C10 is not charged, ena
-
bling a reset signal to be supplied
. When pin 1 exceeds 4
.
3
V, IC3 goes off, causing C10 to charge via R2 and R3 an
d
the reset signal is removed
.
I)
RIT
2) IF SHIF
T
MB 4052
2
1
TS-440S
CIRCUIT DESCRIPTIO
N
10
. PLL output bloc
k
The PLL output block controls five PLL loops
. The 500 kH
z
step PLL loop uses an MB87006 and the other PLL loops us
e
PES
MN6147s
.
,uPD7800
The M387006 has two dividers
: one for the PLL referenc
e
frequency and the other for a swallow type counter
. Frequen
-
cy division data for the reference frequency is sent only on
e
when the TS-440 power is switched on
.
Fig
. 18 Reset circuit
The MN6147 uses the PLL data format shown figure 19
.
8255(
IC
)
Por
t
B4n,B
7
BO
r
B3
Address
Fig
. 19 MN6147 PLL dat
a
Since the MN6147 has latches as shown in Figure 20, onl
y
data following a change is output
. GO data can be any dat
a
since it is used to transfer G2 and G7 data to the G8 latch
.
11.
Other output
s
RL output (7800 port A6
)
This output signal controls transmission. When transmitting
,
this signal is "H"
.
BZ (Buzzer) output (7800 port A7
)
This output signal makes the BZ circuit active
. When this sig
-
nal is "H", the oscillator circuit operates
.
RESET output (7800 port B7
)
This output signal resets the two 8255s and 8251 (option)
.
SBK output (8255 (IC2) port A6
)
This output signal switches the RF unit to prevent noise du
e
to PLL siwtching
.
MT output (8255 (IC2) port A7
)
This output signal controls the AF output to prevent nois
e
due to PLL siwtching
.
SCH output (8255 (IC2) port CO
)
This signal controls the sub audible tone encoder
. The sub
-
tone is activated whenever a transmit frequency in M-C
H
90-99 has been selected, in the FM mode
. A logic H acti-
vates the encoder
.
12.
CAR compensation DIP switc
h
This switch is used to compensate the absolute frequenc
y
characteristic of the 455 kHz filter
. The characteristic ca
n
be compensated within the range of — 400 Hz to + 375 Hz
.
LSB and USB can be compensated separately
. When LSB i
s
compensated, FSK is also compensated
.
coo x
+
100
xi0
xi
xi
-
le©©II~11
IINI
m®®m®mlllImm
AE
I
111111111111111111111
1
MIm
G
B
G3
G4
GS
G
G
.__
.-~i
2 3
MN 614
7
Fig
. 20 Data input terminal and programmable counte
r
SW No
.
H
z
1
2 5
2
5 0
3
100
LS
B
4
20
0
5
40
0
6
2 5
7
5
0
8
100
US
B
920 0
10
400
Table 1
2
When all bits are off,
-400
Hz is supplied for compensa-
tion
. When no compensation is required, bits 5 and 10 mus
t
be on
.
CP
L
DA
3
DA
2
DA
I
DA
0
22
I
I
-
022
(
I
59
.55
...
67
.0
5
/J\
1114
.5
.22
1
Q
Q23 (
52
.55
5
1
1
(7
.5-14
.5
1
020
Q24 (
45
.05 52
.5
5
(0 ^ 7
.5
1
O
•
Q1
8
0
Q17
Q21
67
.05
75
.0
5
122
.
. 301
TS-440
S
I
CIRCUIT DESCRIPTIO
N
13
.
Band information generation circuit (in the R
F
unit
)
Band information from the control unit is sent to connecto
r
15 of the RF unit
. Band information signals BO to B3 for
m
a BCD code in which BO corresponds to LSB
. Q4
D
(M74LS145P) is used to convert data from BCD to DEC, an
d
it generates control signals for ten of the 11 bands
. Contro
l
signals for the remaining band (25
.5 MHz to 30 MHz) ar
e
generated in the AND circuit consisting of D57, D58, an
d
Q46
. These contorl signals go through the current buffer con
-
sisting of Q41 to Q45 (M54561P and 2SA562Y), and ar
e
OR'ed by diodes, as required, and sent to AT unit, filter unit
,
CO, and ANT BPF, as shown in Figure 21
.
Band information 7800 PBo —
3,
B3B2B1B
o
30kHz -
0
.5MHz
0 0
0 0
0
.5MHz -
1
.6MHz 0 0
0
1
1
.6MHz -
2
.5MHz
0 0
1
0
2
.5MHz -
4MHz
0 0
1
1
4MHz -
6MHz
0 1
0 0
6MHz -
7
.5MHz
01
0
1
7
.5MHz -
10
.5MHz
01
1
0
10
.5MHz -
14
.5MHz
0 1
1
1
14
.5MHz -
22MHz
1 0 0 0
22MHz -
25
.5MHz
1
00
1
25
.5MHz -
30MHz
1 0 1
0
Table 1
3
I4
V
Q40 M74LS145P
BCD
—
DEC
V
v
0
Q41 M54561P Buff
\/
x
0
0
0
0
042 Q43 Q44
l
D6
0
~~6
1
D6
5
D64
0I
D63
N
1
28F
122
,
-, 30
)
21F
(14
.5-- 22
)
141
17
.5-- 14
.5
1
71'
(47-7
.5
1
4F
(2
.5^
,
4
,
2F
11
.6-- 2
.5)
To Filter
u
D62
28T
(25
.5
.
30
1
24T
122
25
.5
1
IT
114
.5-
221
To AT
u
I4T
110
.5--
14
.5
1
1OT
17
.5 '
10
.5
1
7T
(6
~
..
7
.51
0
1
0
0
0
VCO SW VC
O
To RFU BP
F
Fig
. 21 Band information generation circuit
2 3
TS-440S
CIRCUIT DESCRIPTIO
N
14
.
Mode control signal
s
Transmit/receive mode signals are generated by ICI 0 in the
to 10, the voltages of control pins 16 and 17 change
. Dur
-
IF unit
. IC 10 is a hybrid IC containing five pairs of PNP tran-
ing reception, these signals change to SSR, CWR, RYR, AMR
,
sistors and diodes
.
and FMR
. During transmission, these signals change to SST
,
Figure 22 shows its equivalent circuit
. When the mode sig-
CWT, RYT, AMT, and FMT
.
nals SSB, CWB, RYB, AMB, and FMB are applied to pins
6
~ t
t
LL LL
4
F
Q Q
2
H
33
C>
V
BX6124
Fig
. 22 Mode control circuit
L
15
.
Expand functio
n
Control unit (X53-1450- 11
D No
.
Shipped
Diode cu
t
65
Mode beep tone
Morse
Single ton
e
66
10Hz display
OFF
O
N
67
Memory protect
OFF
O
N
73
CW shift
800Hz
400H
z
78
W 24
TX
No
Ye
s
79
W 18
TX
No
Yes
Table 14 Expand function
I
24
TS-440
S
CIRCUIT DESCRIPTIO
N
t
16
. Semi-self test functio
n
Semi-self test is started by turning the POWER switch o
n
with the 4 (AM) and T-F SET switches pressed
.
This test provides a method of testing the TS-440 digita
l
system in a shorter time during production or servicing
. Th
e
test enables the following
:
1.
Circuits which are difficult to test during program execu-
tion to be tested easily
. For example, dynamic data ca
n
be ouput as static data
.
2.
Items on which information is held only by the CPU an
d
is not available to the user to be tested
.
a.
Approximately threshold level inpu
t
b.
Incorrect input due to input pin faul
t
Operation procedur
e
1
.
POWER SW OF
F
2
. The power switch on while pushing switch 4 (AM) an
d
switch T-F SE
T
3.
The test number has starts from
"0"
to
"56"
and EN
D
when turn the VFO knob clockwise
.
Operation chart shows as follow
.
4.
To reset SEMI-SELF TEST function, Power switch OFF
.
TEST NO
. LIST
TES
T
NO
Condition
TES
T
NO
Conditio
n
0
Start All Fip's light's
31
RES = "H
"
All Fip's light's (Segment)
32
2
All Fip's light's
33
CO = "H" (AID
)
3
All Fip's OFF (digit)
34
„
=
"L"
I "'
)
q
Each digit lights G1
35
AX = "H" ( "
1
5
G2
36
="'L"
( )
6
"
G3
37
8255 Port A all = "H" (IC2
)
7
G4
38
"
"
all = "L"
(–
1
8
G5
39
8255 Port B all = "H"
(•
,
1
9
G6
40
„
"'
all
="L"
(„
)
10
„
G7
41
8255 Port C
CO-C3="H”
1,,
)
11
C4–C7
="L
”
"
"
G8
42
CO–C3="L”
(••
1
2
G9
43
C4–C7="H
"
8255 Port C all=
"H"
(IC53
)
13
G10
44
all=
"L"
(••
)
14
G11
45
LOCK,PTT,MIC,U/D,AT,VS-1(BUSY)chec
k
15
G12
46
[SIMPLEX] VS-1(BUSY)chec
k
16
"
G13
47
Key scan inport chec
k
17
BZ
ON
48
1
(LSB), [6
,V/M,VOICE (check
)
8
BZ
OFF
49
2
(USB),
,M/V,RIT,A/B (check
)
19
Mode LED all ON
50
3
(CWI, ] ,SCAN,XIT,SPRIT (check
)
20
all OFF
51
] (AM),
9 ,MIN,T-FSET,A=B,100L 200L 400L (••
)
21
RL
="H"
52
I5
(FM),
0 ,(FSK),CLEAR,IMHz,25L 50L 25U 50
U
22
53
ENT,DOWN,UP, 100U 200U 400
U
23
BAND all = "H"
54
–
24
all =
"
L
"
55
—
25
PD
="H'•
56
EN
D
2
6
27
ENF
= •'H
"
28
= "L" (immediatly
)
29
EN
P
30
25
TS-440S
CIRCUIT DESCRIPTIO
N
SW Monitor
Display changes by TEST numbe
r
Displa
y
TES
T
NO
I
/
I
I
II
I
I / I
LOCK
AT
MI
C
UP
MI
S
DOWN
PT
T
or Al
VS-
1
BUS
Y
43
1
1
LSB
VirU
VOIC
E
tl
►
\'
RIT
A/
B
USB
®
SCAN
SIT
SPRI
T
C
W
D
i
AM
09
rUIN
T-FSET
A=B
100
L
(_)
200
L
1?
400
L
L
CLEAR
1MHz
25L
SOL
35U
SO
U
FM
(Ii)
0
ENT
DOWN
UP
100
U
Lg
. ,
200
U
5
400
U
,g
If the display changes from "
; " to " /
7
;
; " by operate the key in chart then function working properly
.
26
TS-440
S
SEMICONDUCTO
R
SN74LS138H (Control unit
IC51)
Dat
a
output
s
TRUTH TABL
E
Input Outpu
t
Enable
Selec
t
G,
G
2
C
B
A
Yo Y,
Y
2
Y
3
Y,
Y
5
Y
6
Y
7
x
H
x x
x
HHH
H
HHHH
L
xxxx
HHH
H H
HHH
H
L
LLL
L
H H
H
HHHH
H
L
LL
H H
L
H
H
HHHH
H
L
L
H
L
H
H
L
H
HHH
H
H
L
L
H
H H
H
H
L
HHH
H
H
L
H
L
L
H
HH
H
L
H H
H
H
L
H
L
H H
H
HHH
L
HH
H
L
H H
L
H
H
HHH
H
L
H
H
L
HHHH
H
HHH
H
H
L
Note
: 1
. G
2
=G
2
A+G
2
B
2
. H
: High leve
l
L
: Low leve
l
X
:
"H"
or
"L"
2
7
TS-4405
SEMICONDUCTO
R
TC4013
(Display unit
IC3
)
CL
C
L
TC4040BP (Control unit IC55)
QI
Q2
03
Q4
05
0
6
O © ® ®
0
LD
D
D
CLOCK 10
C'
>
O
OD--CP _
CP _
CP _ ~-CP -
-CP
-
CP
-
R
O
R
O
RO
R
0
R0
R
0
RESET
DO
RESE
T
SE
T
DAT
A
CLOCK
C
L
CL
6
8
5
-
3 -
S
D
Q
CL
0
R
2
9
-
I I -
S
D
0
CL
0
R
10
- 1
3
-1
2
R
CP
D
R
CP
R
CP
D
R
CP
D
R
CP
D
R
CP
D
012
Q5)0I
I
(14)Q10
(12)09
(13)08
(4)0
7
TC4069B
P
(Control unit IC4
)
(TOP VIEW)
I
1
28
TS-440
S
SEMICONDUCTO
R
e
MB4052
PC
5
Co CI
7~J7
Comparato
r
Resisto
r
IF-SHIFT
-
R
Comparato
r
®
D
R IT -
AI
O
Lam,
~
,
Multi
_
D
I
ple
780
0
PC
7
12
ADC CLK
PC
6
le
8255(IC2
)
RS
+5
v
r
Ag
o
Not us
e
L
A
3
EX
.
2
EX
.!
8
bi
t
DA
C
v
CC
I
Regulato
r
2
.5
K
6
S
O
VccI
Vcc2
A
.G
D
.
G
MB4052 Pin Descriptio
n
I/O Signal
Pin Function
s
Pin No
.
Pin Name
Symbol
Functio
n
2
3
Range expande
r
inpu
t
Range expande
r
output
Ex
.
2
Ex
.
1
Analog input pin for expanding the range
.
Analog output pin for expanding the range
. Connect to any pin from AO to A3
.
By using Ex
. 1, Ex
. 2, the range is expanded to the x4 range
.
4—7
Analog entrance
Ao—A
3
4-ch analog input pin
. Channel 1 is selected by channel select input CO to
Cl
.
9
10
Channel select input
C
o
C,
The input pin to designate the analog input channel for A/D converter
. This signal is latche
d
at the trailing edge of CS
.
11
Chip select input
CS
This is the chip select input pin
. When CS is inverted from
"1"
to "0", A/D convertin
g
starts and data output is enabled
. After A/D converting is over or when an interrupt is re
-
quired, set the CS back to "1"
.
12
A/D convertio
n
clock
AD
C
CLK
This is the clock input pin for A/D convertion input to the comparator register sequentially
.
Convertion speed is determined by the clock speed
. In the case of 8-bit, approx
. 10 clock
s
will be needed
. However, it is not necessary that the clock period be fixed
.
13
Data output
DAT
A
OUT
This is the open collector to output the result of A/D convertion
. The data is output in th
e
order of the start bit, most significant bit, 2nd significant bit,
. .
., least significant bit, an
d
the stop bit, synchronized with ADCCLK
.
14
Range select input
RS
This is the input pin for selecting the voltage range of analog input
. The VFS=Vcc,/8 rang
e
is selected at "0", and the range of FVS=Vcc,i2 is selected at "1"
. During convertion
,
hold this pin to
"0"
or "1"
.
1
8
Analog groun
d
Digital ground
A
.
G
D
.G
Ground termina
l
1
5
16
Power supply pin
2
Power supply pin 1
Vcc
2
Vcc
1
When driving with 3
.5 to 6
.0 V of power, connect Vcc, and Vcc
2
to each other, and appl
y
the power voltage to them
.
When driving 8 to 18 V of power, apply the power voltage to Vcc
2
. At this time, the 5
V
stabilized voltage is output to Vcc,, and approx
. 10 mA current can be supplied externall
y
to the IC
.
When either 3
.5--6
.0 V or 8— 18V power is used, Vcc, is the reference voltage for A/
D
convertion
.
•
Channel Select
•
Range select
• Wiring example when expanding the rang
e
RS
'Convertion
vol
-
tage rang
e
Vcc
,
0
0—'
8
Vcc
,
1
0--'
2
C
,
0
C
o
0
Selected Ch
.
A
o
1
A
,
0
1
0
1
1
A
2
A
3
MB4052
2
9
TS-440S
SEMICONDUCTO
R
MB8418-LP20-GRA (Control unit 1050
)
,uPD7800
Memoria
l
Alle
y
128 x16
x
8
0E0
A4
n
a
A3
0
.~
S
}CA
B
Addres s
buffe
r
--
I
T
Inpu
t
buffe
I/O gat
e
column decode
r
I
/0
buffe
r
WR
WE
Lo
w
decode
r
Addres
s
buffer
L
CAB
Symbol
Pin nam
e
Ao—A
10
Address inpu
t
I(1
— II
Ix
Data in/ou
t
CS
Chip select
1
CS
2
Chip select
2
WE
Write enabl
e
Vcc
Power (1
.5 V
)
GND
GN
D
NC
.
No connection
mo
o
GN
D
AI
O
OE1
0
TL
B
(IC4)
Q5
0
D
e,
cs
e
Inpu
t
buffer
CS
B
cs
,
Y1
7
I
SN74LS138
T
+5
V
BAT
T
MBM27128 (Control unit IC52)
---~
—~
O
lO
x
—
I/O
Dolt)
—
Data outpu
t
00
0 7
'
~~
—
+15 V
Vc
c
RD
GN
D
VP
P
pPD7800
17
Pin nam
e
+15 V
--
.
-
v
Y0
0
Yt
O
15
1
4
SN74LSI38
O
E
C
E
PG
M
o
A
O
Aa
Output enabl
e
Chip enabl
e
Prog, roglc
Y decode
r
X decoder
Output Buffe
r
Y selectio
n
131072
bi
t
(512
x 256
)
Memoria
l
all
y
}BP
D
780
0
Ao—A
13
Address inpu
t
Oo
—
O7
Data outpu
t
CE
Chip enable inpu
t
OE
Output enable inpu
t
PGM
Program inpu
t
Vcc
Power supply
Vpp
Program power suppl
y
GND
GN
D
30
TS-440
S
SEMICONDUCTO
R
MC3347 (IF unit IC2)
2
5K
10K
10K
30K $ 20K
50
K
.0K
1
2
15K
14 15
K
50K
17
16
20
22K
220K
470
$50
K
15
25
K
26
1
3
0
1
5
8
~52
53 54
V
506
48
490
5
1
44
46
4
7
.
58
j
i
6
MC3357 (IF
unit
IC2
)
27
100K
32
OK
10K
I0K
10K • 10
K
6
.2K
33K 33K
33
K
2 8
29
3
0
31
5
60
59
0
9
R
F
Inpu
t
GN
D
Audi
o
Mut
e
Sca
n
Contro
l
Squelc
h
Inpu
t
Filte
r
Outpu
t
Filte
r
Inpu
t
Demodulato
r
Output
31
TS-440S
SEMICONDUCTO
R
pPC1158H2
R
7
Amp
.
AL
C
w u
W
u u u
W
Input
N
.F
.B
. Output
GND
ALC
ALC
Vc
c
Output
Input
nput
l
Pin connectio
n
Pin
Function
Pin
Functio
n
1
Input
5
ALC outpu
t
2
_
N
.
F
. B
.
6
ALC Inpu
t
3
Output
7
Vc
c
4
GND
µPC2002V
(IF
unit
IC7)
1
:Inpu
t
2:
NF
B
3:
GN
D
4
: Outpu
t
5
: Power supply + Vc
c
1
2 3
4
5
0
(
N
0
•1
•2
1
32
TS-440
S
SEMICONDUCTO
R
t
PD8251AC (Control unit IC54
)
Data bus
SN7404
5
s
5 6
•
D7o
.DI4
TX
D
Dat
a
bu
s
buffer 8_
w9
7404 2
.4576MHz
0
ra
n
m
i
buffe
r
(P
—
SI
TX
D
RX
D
P B
7
yl PD7800
E
8
R
D
W
R
SN74L5138
Ye
L
CTS
5
RTS 6 O
4
041
3
® SN7404
~
•
~
® C/D
~
RD •
•
m
~
:4~
•
C
S
l0
RESET
•p
•
CTS
:
•
DS
R
DTR
MODE
M
contro
l
R/
R
contro
l
I
ogic
R
X
RD
Y
Receiv
e
contro I
RX
C
SYNDET/B
D
Inne
r
data bus
Not us
e
Not us
e
05
(404010
pin ( Bo
rate
:
4800
)
5PD7800 INTI 12 pi
n
Not us
e
tPD8255AC-5 (Control unit IC2, 53)
I/O Port
A
I/O Port
C
I/O Port
B
Group
A
Port
A
(8 bit
)
Group
B
Port
C
(Lower 4 bit
)
R/
W
control
Group
B
Port
B
(8 bit
)
Group
A
contro
l
Dat
a
bu
s
buffer
Group
B
contro
l
74 LS 13
8
i1 At
IC2
:
Y3
I
2
ill
At IC53 Y2 I3
Basic functio
n
A
t
A
D
CS
RD
WR
Functio
n
0000
1
Data bus °-- Port
A
0
1
0 0
1
Data bus
Port
B
1
0 0
0
1
Data bus
Port
C
000
1
0
Port A — Data bu
s
0
1
0
1
0
Port B
Data bus
1
0 0
1
0
Port C — Data bu
s
1 1
0
1
0
Control register
t—
Data bu
s
x
x
1
x x
Data bus is in high impedanc
e
statu
s
1 1
0
0
1
Combination is inhibited
"0"
shows low level (L
)
"1"
shows high level (H)
3 3
TS-440S
SEMICONDUCTO
R
APD63000 (Display unit IC1
)
Pin description
Pin No
.
Symbol
Pin name
I/O
Descriptio
n
1
01
3
014
FI
P
015
Segmen
t
driver
0
High dielectric-strength (40V) output in the Pch open
.
017
(
0
13'
019)
Corresponds to the output of
Q13
—
Q1
9
01
8
7
01
9
8
SO
Serial data output pin
0
Output serial data the trailing edge of SCK
. When the n-numbe
r
of
pPD63000s
are connected in series, this can be connected t
o
the SI of the following stage
.
9
BI
Blanking pin
This input can turn off all indicator or displays, and can dim the
m
by applying a random duty pulse from outside
. Active low
.
10
LH
Latch pin
I
Transmits the connects of the serial shift register to the buffe
r
register at low level, to latch the connects at the rising time
.
Active rising (leading) edge
.
11 SI
Serial data input pin
I
This is the data input pin
. Inputs data to the shift register at th
e
rising edge of SCK
.
Reads out the SI data to the shift register at the rising edge o
f
12
SCK
Serial clock input pin
I
SCK
.
Outputs data from SO at the trailing edge of SCK
.
13
CS Chip select pin
When CS is high, this inhibits SCK and LH, and when CS is low
,
activates SCK and LH
.
14
Vss
GND
Connect to the GND terminal of the system
.
15
0
0
16
0
1
Pch open-drain system, high dielectric-strength output
.
17
0
2
18
0
3
FIP
Corresponds to th
e
0
4
output of 0o to
012
V0
0
0
5
Segmen
t
Qg
driver
Pc
h
07
r
1
p
0
8
O
9
(00
—
012)
0
26
Ot
o
0
11
Vss
Oo
Ot
s
27
01
2
28
V00
Power supply pin
—
5 V ± 10%
)
)
34
TS-440
S
PARTS LIS
T
r
•
Capacitor value
1
0 3 = 0
.01µ
F
CAPACITORS
CC 45 TH 1H 220
J
1 2
3 4
5
6
1 = Type
ceramic, electrolyic, etc
.
4 = Voltage ratin
g
2 = Shape
round, square, etc
.
5 = Valu
e
3 = Temp
. coefficient
6 = Toleranc
e
•
Temperature Coefficient
0 1 0
=
1p
F
1 0 0 = 10p
F
1 0 1 =100p
F
1 0 2 = 1000pF = 0
.001µF
220
= 22p
F
1st number
1
Multiplie
r
2nd numbe
r
1st Word
C
L
P
R
S
T
U
Color" Black
Red
Orange
Yellow
Green
Blue
Viole t
pp
m
/
C
0
-80
-150
-220 -330
-470
-75
0
•
Tolerance
2nd Wor
d
ppm/°C
G
30
H
- 60
J
± 120
K
± 250
L
50
0
Example CC45TH = -470±60 ppm/°
C
Code
C
D
G
J
K
MX
Z
P
No code
Code
B
C
D
F
G
)
'-0
.25
t0
.5
±2 ±5
±10
.20
+40
+80
+100
MO
e
10µF-10^'+50
(pF)
±0
.1
±0,25
±0
.5
±1
±
2
-20
-20
-0
iha
4
.7µF-10-+7
5
Less than 10 p
F
•
Rating voltage
\2n
d
or
d
1 s
t
word
A
B
C D
E
F
G
H
J
KV
0
1
.0
1
.25
1
.6
2
.0
2
.5
3
.1 5
4
.0
5
.0
1
6
.3
8
.0
-
1
10
12
.5
16
20 25
31
.5
40 50 63 80
3 5
2
100
125
160
200
250 315 400 500 630 800
-
3
1000 1250
1600
2000
2500 3150 4000 5000 6300
8000
-
1 = Type
ceramic, electrolytic, etc
.
2 = Shape
round, square, etc
.
3 = Dimensio
n
4 = Temp
. coefficien
t
5 = Voltage ratin
g
6 = Valu
e
7 = Tolerance
.
•
Chip capacitor
s
C C
73
F
T
S L I H O O G
J
(EX),-1
:
7
-
,
J L7_
3
rot
/j
L=7 ->- Refer to the above table
.
`
T
1 2
3 4 5
6 7
/
(Chip)
(CH,RH,UJ,SL
)
CF
7 3 F
F 1 H 0 0 0
0
(EX)
L
~o
E
1 2 3 4 5
6 7
(Chip) (B,F
)
•
Chip resistor (Carbon
)
(EX)~
D 7 3 F
a
2 8 0 0 0
J
1 2 3 4 5 6
7
(Chip)
(B,F
)
•
Carbon resistor (Normal type
)
R D
1 7
a
B X 0 0 0
J
77
:
7
7
L
-
7
:
7
7,
E
-
1
1 2 3 4 5
6 7
Dimensio
n
Dimension code
L
W
T
Empty
5
.6'_ 0
.5
5
.0 ± 0
.5
Less than 2
.
0
E
3
.2 ± 02
1
.6 ± 0
.2 Less than 1 .2
5
F
2
.0 ± 0
.3
1
.25 ± 0
.2 Less than 1 .2
5
Dimensio
n
Dimension code
L
W
T
Wattag
e
E
3
.2±0
.2
1
.6+-0
.2
0
.57
2
B
F
2
.0+0
.3
1
.25±0
.2
0
.45
2
A
Rating wattage
Cord
Wattage
Cord
Wattage
Cord
Wattag
e
2A
1
10W
2E
1 4W
3A
1
W
2B
1
8W
2H
1 2W
3D
2
W
2C
1
6
W
Dimension
3
5
TS-440
S
SEMICONDUCTOR
PARTS LIST
)
N
: New Part
s
*
: Please note that parts are sometimes not in stock, and it takes much time t
o
deliver
.
R
e
marks
Nam
e
Diode
1S155
5
1S13
3
1S258
8
15158
7
1S100
7
1SV53
A
N
1SV15
3
1SS10
1
1SS9
9
1N6
0
1N444
8
S31
C
BA28
2
N
MA85
8
N
US109
0
N
DAN40
1
MC93
1
M I204
MC92
1
Vari-cap
ITT310T
E
Varistor
MV 1
3
MV-5
T
MV20
3
Zener diode
N
SVO3Y
S
MTZ 3
.0J
B
N
N
N
MTZ 4
.3J
C
MTZ 6
.2J
A
MTZ 7
.5J
A
MTZ 9
.1J
B
MTZ 9
.1J
C
UZ 3
.0
B
UZ 6
.2B
L
UZ 9
.1B
L
V06
B
Thermistor
SDT100
0
N
5T41
L
112-502-
2
32D2
7
Surge absober
N
DSP-301 N
Item
Re
Nam
e
mark
s
Digital Tr
N
DTC 1 14E
S
TR
DTC143T
S
DTC124E
S
DTC 144W
S
DTA114E
S
2SA562 (Y
)
N
2SA562 T
M
2SA950 (Y
)
2SC1959 (Y
)
2SC1815 (Y
)
2SC205
3
2SC207
5
2SC2458 (Y
)
2SC2459 (BL
)
2SC250
9
2SC253
8
2SC2570
A
2SC2668 (Y
)
2SC2603 )E
)
N
2SC287
9
2SC3113 (B
)
2SC2787 (L
)
FET
2SK30 (GR
)
2SK30 (0
)
2SK192 (GR
)
2SK192A (GR
)
2SK192A (GR)*
J
2SK 125-
5
3SK73 (GR
)
3SK74 (L
)
3SK122 (L
)
IC
AN61
2
AN655
1
AN780
5
AN780
8
BA71
8
BA6109U
2
BX612
4
6X719
1
HD1011
6
HD
1013
1
HD1012
5
Item
Re
-
Nam
e
mark
s
N
LM2931Z-5
.
0
N
M 54460
L
M54459
L
M54561
P
N
M 74LS00
P
N
M74LS123
P
M74LS145
P
MB361
4
MB405
2
N
MB8700
6
N
MBM27128-25JA
1
MBM8418-2OLP
-
GR
A
MC10125
L
MC10131
L
MC10116
L
MC3357
P
MN614
7
MN6147
C
NE555
P
NJM2903
D
NJM2903
S
NJM2904
M
NJ M 2094
S
PST520
D
SN74LS90
N
SN74LS10
N
SN74LS112
N
N
SN7404
N
N
SN74LS123
N
SN74LSOO
N
SN74LS138
N
SN74LS145
N
SN16913
P
N
TC4001B
F
TC4011B
P
TC4013B
P
N
TC4030B
P
N
TC4069UB
P
TMP8255AP-
5
p
.PC1158H
2
p
.PC2002
V
APC4558
C
N
1PD6300
0
APD8255AC-
5
0PD7800
G
)
)
Destination tabl
e
K
:
for U
.S
.A
.
Ml
: GENERAL MARKE
T
M2
:
GENERAL MARKE
T
T
:
for Englan
d
W
:
for Europ
e
X
: for Australi
a
36
TS-440
S
PARTS LIS
T
x New Part
s
Parts without Parts No
. are not supplied
.
Les articles non mentlonnes clans le
Parts No
.
ne sont pas fournis
.
Telle ohne
Parts No
.
werden nlcht gellefert
.
Ref
.
No
.
Address
Ne
w
Parts
Parts No
.
Description Desti
-
nation
Re
-
mark
s
offtit
g
.
-
g
-
fs
g
l
.
114
4
TS-44
0
1
11)
:it
:
A01—0990EI12
CASE
(A)
UPPE
R
2
.
3A
AU10999-0,1
cnsE
(B)
LOWE
R
3
PANEL ASS
Y
4
21)
A40--0617-03
130
-
FTOM PLAT
E
9
IA
B04—0411-04
SF' MOUNTING HARDWAR
E
I[)
1A
BEIS-07OR-04
SP GRILL CLOT
H
1_1
IF
B30-00JI'IS
PH 01
-
LAMP
(14V,80MA
)
1
1
21H
MEIE
R
14
13A
B40-362S-414
MNDEL
. NAME PLATE
KMIM
2
14
3A
B40-3625-04
MODEL NAME PLATE
1I
4
14
3A
B40-3626-04
MODEL NAME PLATE
X
17
1A
14,12-1,M22-04
VOX NAME PLAT
E
22
:
2C
B43106304
NAME PLATE
(TRIN
TS440S)
T
21
B43-1064EO4
NAME PLATE
:
(KENWOOD TS-- 44X)
x
2 ,
B43EIO65-04
NAME PLATE
(KENWNND TS--440S) K1
. M
2
22
.
B43-1066-04
NAME PLATE (KENWOOD TS-440S)
1
4
23
1T
:
it
:
B46-0410IO
WARRANTY CARD
K
24
IS
B50-8048-00
INSTRUCTION MANUAL
KMIM
2
211
.
1S
B50-8048-00
INSTRUCTION MANUAL
W
X
24
12
B50-8049E-00
INSTRUCTINN MANUAL
T
B42-1
.72-04
LABEL(WITH ANTENNA TUNER
)
24
IS
E07-0751-05
7P DIN PLUG
(ACLESNRY
)
2,
1
IS
E070852-05
8P METAL_ PLUG
KMIM
2
28
IS
E30163005
DC POWER CORD ASS
Y
E310431-1
.5
WIRE WITH CONNE'LTNR
(SP
)
IS
F05-2034-05
FUSE
(20A
)
:31
IS
F'05E2034-05
FUSE
(20A)ACCESSNR
Y
3
:3
liE
:
602---0
:505-17'5
KNOB FIXED SPLING
(X4
)
G53
-0509-04
PACKING
(X2)
CASE1 SID
E
34
.
35
1401-4603-04
CARTON BOX
(INSIDE)
KM1M
2
34
'3S
H01E4-683-04
CARTON BOX
(INSIDE
)
34
Hill
. -4684--U4
CAR
-
MN BOX
(INSIDE)
T
34
3S
HOIE4685-04
CARTON BOX
(INSIDE)
x
3
.5
3S
H03-227R-04
CCIRTNN
BOX
(Ot
.1
-
T
SIDE
)
35
3S
H03-2278-04
CARTON BOX
(GUT SIDE
)
-
i
i3'
: .
3
H01
.3-2285-04
CARIFIN BOX
:
(OUT SIDE
)
36
, ,
. ,. .
4
H10-261502
PACTI 1 ,
15
FEXTURE(E
)
H10-261
.6-02
PACKING FIXETURE(R
)
38
IS H12-1315-04
11
:14SHIN
N
39
2(
H20-1425-03
PRNTECTIVE COVE
R
4-0
IS H25-0079-04
PRNTECTIVE BAG
(MIC)
2
1`11
.11
2
40
H25-0079-04
PRNTELTIVE BAG
(MIC)
X
.
41
IS H25-0112-04
PRNTECTIVE BAG
(DC CORD
)
413
31)
.102-0323-05
FONT
(72)
P
44
:t
:
1102--044004
ASSiCS'TANT FON
T
4
.5
14
,31
J112-0441-05
FAA)
(X4
)
46
3A
j02-0442-04
FOOT
(X2)
F
47
2A
J'21-1
.144-34
MOUNTING HARDWARE(SP
)
48
IF
421E2779E-14
MOUNTING HARDWARE(PILNT LAMP
)
4V 2E
E130-0526-04
SPACE
R
50
2E
0'131-0141-04
SPACER RING
(MIC)
3
7
TS-440S
PARTS LIS
T
Ref
.
No
.
#
FR
Addres
s
I~
Ne
w
p
arts
Parts No
.
rP
.
*
-
g
-
Descriptio
n
a$
Desti
-
natio
n
it
fA7
Re
-
mark
s
55
1E
„1
-
32--0765-04
HEX
DHSS
(Xi')
_,
.
:_
:,i`1
`
56
2f(
J32-07E32-on
HEX
BNF
i
,S
(X4 )
I
M
M
57
1F,IG
iti
:112-0792-04
HEX MSS
(XM 10M
M
58
1G
4
j32-0793-04
HEX
BOSS
(X(1)
IIM
M
59
If,
,s
J
-
i2-0794 04
HEX BNSS
(X3)
5M
M
63
313
007
. -040
EARNING HHNDI
F
64
31
:
K
:2
.1-077£3-I)
FNN
D
65
3E
1,HE
-
J8
(]N'',IDE
)
66
IS
K23-071
.2-04
K
:N011
(VNX)
X
I
67
31
I•N011
(1201
()X
I
68
3C
V29--0741-24
kNOB
(NiE 1 1
-
SMF)
X
4
69
-1
-
5-0
4
K2907
8
PL15 H
I ,
NNB
(PNWFt
;
ii)
Y
l
70
i'C
IiHNIi
(HL
L
)
71
2L
K29-3001-04
PI ISH
0111
(1(4
)
72 2L
I<
29-3002-04
PUSH FNNP
(x6
)
75
2t
N19-0601--)4
FLAT WASHE
R
76
N19-061i7-04
FEW
-
1
.40HFR
(MAfN PNNH
)
N07-30004b
IIRH7lFR
IIFCID
InPFIIF
5GREW(Xl
)
N8?--3012-46
PRA71FR HEAD
[11 1111
SEFIW(X2
)
AA
2L
.2E
N09-0256-05
GND
Si RLW
(x4
)
EDi
2KI
N07--0644--0
.
1
RIND
SI
HEW
1X7
0
C
i
(NC19--0658
-04
PfiillNl)
SLREW
(
DD
.31
4
NrI9-- 06,99-- (15
(}
:6
)
E
21_
N30-2608-4I
PAN HEAD MACHtNE SCREW
(X6
)
F
IE
.IF
N32-2606-46
5PEW
(XK3
)
FLAT Ht HD IlAfHINU
L
21
:
.2D
N32--
-
30(14 -46
I AV
HEAD
MAcli(NF
I
:0109
(x4
)
H
IE,2D
N32-006-40 RW
HEAD MAf01NF '"-TIRE)
(x8
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44
TS-440
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PARTS LIS
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Ref
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No
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New
Parts No
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Description
Desti-
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L42
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L49
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4 5
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L65
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L64
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L72
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L79
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L86
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L87
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L89
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L97
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L98
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L99
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L100
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53
TS-440S
PARTS LIS
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Ref
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V4!fftt%
Address
Ne
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Part
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: 181587
,
O1=--0
D2
: 1S1007,
D3-5
:
1S1001, D6, 8
: MTZ9
.1JC
or UZ9
.1BL, D7, 25
: MTZ7
.5JA, D9
: MTZ4
.3JC
,
D10
: MTZ3
.OJB,
D12-23
:
1N4448 or 1S1555
,
D23
: MC93
1
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s
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016
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FILTER UNIT (X51-1340-00)
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03
25C3113
8
05
86718
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5
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6
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TS-440S
PC BOARD VIE W
PLL UNIT (X50-2050-00)
Component side vie
w
ICI, 4, 9, 18
: NM6147, IC2
: M54459L, IC3, 6
: SN74LS90N, IC5, 10
: M54460L, IC7, 8, 11, 12, 14
: SN16913P, IC13
,
16
: SN 74S 1 12N, IC15
: SN74S10N, IC 17
: M887006, Q1, 2, 10, 11, 16, 17
: 2SC3113(B), Q3—5, 12—15, 18—20, 22—24
,
26—30, 37: 2SC2668(Y) Q6, 7, 9, 25: 2SC2458(Y), 08
: 2SC1959(Y), Q21
: 2SC27871L), Q31—35: 2SC2459(BL
)
72
Q36
: 2SK192A (GR)oJ
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2
112_
3
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112
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250
1959
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2SC2787
(LI
B
2SC3113
(B
)
2SC2668
)Y
)
2SC2458
)Y
)
2S02459
(Y
)
R139
84
3
C173 --- -
D
R12
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mR124
n
C159
R130
L35
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10
6
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1
LO
6
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e
2
4
6
A
C
E
TS-440
S
DISASSEMBL
Y
Parts with the exploded numbers larger than 700 are not supplied
.
45x2
17
Lx
2
Lx
2
J M3x6
(F)
Ni
N33-3006-4
1
L M3x6
(BI)
Ni
:
N35-3006-4
1
P 03x8
(Br-Tap)Ni
N87-3008-41
TS-440(A/8)
81
S2
2
8)
TS-440S
DISASSEMBL
Y
Parts with the exploded numbers larger than 700 are not supplied
.
C
(X60-1300-00
)
(X50-2050-00
)
72x
3
71x
4
64
0
GND
N09-0256-0
5
SEMS
:
N09-0699 - 0
5
G
M3x4
(F)
:
N32-3004-4
6
H
M3x4
(F)
:
N 32-3006-4
6
M
02
.6x6
(Br-Tap)
N67-2606-4
6
N
03x6
(Br-Tap)
:
N87-3006-4
6
T
M3x6
(6))
:
N35-3006-46
M x2
TS-440(B/8
)
MX4
f
1
82
00
9
,
8 8
.(X41)(E/14)
8 8
55x2
C
/
H
Fx2
(X41)(L/I4
)
t
I
\~
0
ono
co
O
(X41)(D/14
)
N
C
TS-4405
DISASSEMBL
Y
Parts with the exploded numbers larger than 700 are not supplied
.
o.
o
•
a
v
3
•
o
o
o
0
ocDC
o
o
N N
M
x
o n
o
O M
M
~
Z Z
Z
0
N
x
84
TS-440
S
DISASSEMBL
Y
Parts with the exploded numbers larger than 700 are not supplied
.
88
E M2
.6x8
Ni
N30-2608-4
1
M 02
.6x6 (Br-Tap)
:
N87-2606-4
6
N 03x6 (Br-Tap)
N87-3006-4
6
R 03x10 (Br-Tap)Ni
:
N87-3010-41
(X41-1610-00
)
88
(C/14)
TS-440(E/8)
85
TS-440S
DISASSEMBL
Y
Parts with the exploded numbers larger than 700 are not supplied
.
l
O
m
co
pp
X
Z
x x
Z
K
In
M
<
0 <000)-
N
86
TS-440
S
DISASSEMBL
Y
Parts with the exploded numbers larger than 700 are not supplied
.
87
TS-440S
PACKING
T
34,3
5
TS-44
0
3
8
1
26,27, 28,30
,
31 , 66,8
4
41
/
39
37
38
36
24
2
3
40
Part
s
88
with the
exploded
numbers larger than 700 are not
supplied
.
r0
TS-440
S
•
e
ADJUSTMEN
T
POWER
,
E
7
74
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MIC-0--
CAR
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HF TRANSCEIVER
O
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0
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0
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0
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KEN WOODITS
.
440sl
MODE
REV
FUNCTION
I--I
F
ALL
PWR SW
R
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o
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MTV
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SCAN
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CLEAR
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1
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LOCK
PROC
NOTCH
ASS
IV
T
V
0
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AUT
M
t
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.
IN
,LEN
T
O
O
DI
1
MIC
OFF
OFF
OFF
W
PREPARATIO
N
Unless otherwise specified, set the controls as follows
.
POWER
ON
SELECTIVITY
AUT
O
BAND
14
AGC FAST
SLO
W
AF
MIN
NOTCH SW
OF
F
RF
MAX PROC SW
OF
F
NOTCH
CENTER F
.LOCK SW
OF
F
SQUELCH
MIN
1MHz SW
OF
F
MIC
MIN
NB SW
OFF
CAR
MIN
ATT SW
OF
F
IF-SHIFT
CENTER SEND/REC
RE
C
FUNCTION
AUTO
OF
F
A/B
A
AT TUNE
OF
F
RIT,XIT,SPLIT
OFF
VOX SW
OF
F
s
REQUIRED TEST EQUIPMEN
T
1
. DC Voltmeter (DC V
.M
)
1)
Input resistance : More than 1 MS
2
2)
Voltage range
: 1
.5 to 1000V AC/D
C
NOTE
: A high-precision multimeter may be used
.
However, accurate reading can not be obtained for high
-
impedance circuits
.
2
. DC Ammete
r
1) Current range
: 1
.5A, 3A, 20A, High-precisio
n
ammeter may be used
.
3
. RF VTVM (RF V
.M
)
1)
Input impedance : 1 MS2 and less than 3pF, min
.
2)
Voltage range
: 10mV to 300
V
3)
Frequency range
: 10kHz to 100MHz or greate
r
4
. AF Voltmeter (AF V
.M
)
1)
Frequency range
: 50Hz to 10kH
z
2)
Input resistance
: 1 M12 or greate
r
3)
Voltage range
: 10mV to 30
V
5
. AF Generator (AG
)
1)
Frequency range
: 200Hz to 5kH
z
2)
Output
: 1 mV or less to IV, low distortio
n
6
. AF Dummy Loa
d
1)
Impedance
: 8S
0
2)
Dissipation
: 3W or greate
r
7
. Oscilloscope (SCOPE
)
Requires high sensitivity, and external synchronizatio
n
capability
.
8
. Sweep Generator (SWEEP
)
1)
Center frequency
: 50kHz to 90MH
z
2)
Frequency deviation
: Maximum±35MH
z
3)
Output voltage
: 0
.1V or greate
r
9
. Standard Signal Generator (SSG
)
1)
Frequency range
: 50kHz to 50MH
z
2)
Output
: – 20dB/0
.1µV to 120dB/ 1 V
3)
Output impedance
: 50
0
4)
AM and FM modulation can be possible
.
NOTE
: Generator must be frequency stable
.
10
. Frequency Counter If
. counter
)
1)
Minimum input voltage
: 50m
V
2)
Frequency range
: 50MHz or greate
r
11
. Noise Generato
r
Must generate ignition noise containing harmonics be-
yond 30MHz
.
12
. RF Dummy Loa
d
1)
Impedance
: 1 500 and 20
0
2)
Dissipation
: 150W or greate
r
13
. Power Mete
r
1)
Impedance
: 501
2
2)
Dissipation
: 150W cintinuous or greate
r
3)
Frequency limits
: 60MHz or greater
8 9
TS-440
S
16.
Directional Couple
r
17.
Power suppl
y
PS-43
0
18.
Microphon
e
MC-60A or MC-42S
ADJUSTMENT
<REFERENCE
>
Japanese "SG"
American "SG
"
–
6 dB
0
.25µ
V
0 dB
0
.5µ
V
6 dB
1µ
V
12 dB
2µ
V
OUTPUT
24 dB
8µ
V
30 dB
1 5
.8µ
V
1N60
T
loop
Q GND
40 dB
50µ
V
•
1
5
50 dB
8µ
V
60 dB
500µ
V
70 dB
1
.58m
V
80 dB
5m
V
90 dB
15
.8m
V
100 dB
50m
V
120 dB
0
.5
V
14. Spectrum Analyzer (SPE-ANA
)
1)
Frequency range
: 100kHz to 110MHz or greate
r
2)
Bandwidth
: 1 kHz to 3MH
z
15
. Detecto
r
1) For adjustment of PLL/VC0 BPF
•
•
0
2
.
3
.
4
.
5
.
6
.
90
TS-440
5
ADJUSTMEN
T
•
VOLTAGE CHECK, ADJUSTMEN
T
Measurement
Adjustment
Item
Condition
Tes
t
equipment
Unit
'
Terminal
Unit
Part
Method
Specification/Remark
s
1
. Voltage
1) POWER
: ON
DC V
.M
IF
19
-5
Check
13
.3-
14.3
V
RF GAIN
: MAX
19
-9
4
.5-5
.5 V
MODE
USB 19
-10
7
.2-8
.2 V
STBY
REC
9
-1
SW
"
A
"
VR-4
2
.6V
+0
.05V, -O
V
27-
4
IF
VR-5
8
.8
V
•
COMMON ADJUSTMEN
T
Measurement
Adjustment
Item
Condition
Tes
t
equipment
Unit
Terminal
Unit
Part
Method
Specification/Remark
s
1
. CAR MODE
: USB
Oscilloscope
IF
14-
2
IF
L15
0
.4V/p-p
f0
.05V/p-
p
TC2
8
.3750MHz
±50H
z
Freq
.counter
•
PLL ADJUSTMENT
Measurement
Adjustment
Item
Condition
Tes
t
equipment
Unit
Terminal
Unit
Part
Method
Specification/Remark
s
1
. Referenc
e
oscillato
r
frequency
36MHz
Freq
. counter
PLL
TP6
PLL
TC1
36
.000,000MHz
± 10H
z
(R96
)
2
. RIT
1) FREQ
14
.000OMHz
DISPLAY
SW
"
A"
VR3
14
.000,00 RIT
.0
.
0
MODE A
M
RIT Pot
: CENTE
R
RIT SW : ON
I
2) RIT Pot
.
: FULL CW (+)
14
.00120 RIT1
.2 or mor
e
RIT Pot
.
: FULL CCW
-I
13
.998
.80 RIT- 1
.2 or mor
e
3 VCO5
DC V
.M
PLL
TR11
PLL
T20
5
.OV
±0
.2 V
(R146
)
4
. VC04
1) FREQ
. 14
.0000MHz
DC V
.M
PLL
TP
1
MODE A
M
Disconnect PLL- 6 connecto
r
when PLL unlocked
.
(L2)
PLL
Ti
3
.8V
±0
.1
V
2) MODE
USB
4
.2-4
.6 V
3) MODE
LSB
3
.2-3
.6 V
4) MODE
US
B
IF SHIFT Pot
.
: CENTER
Freq, counter
PLL
3
-2
SW"A"
VR7
456
.875kHz
t
1
5) IF SHIFT Pot
.
FULL CW
457.875kHz or mor
e
61 IF SHIFT Pot
.
: FULL CCW
455
.875kHz or les
s
7) IF SHIFT Pot
.
: CENTER
456
.875kHz
456
.874--456
.876kH
z
5
. VCO3
1) FREQ
13
.9999MH
Z
MODE
: AM
DC V
.M
PLL
TP2
PLL
T2
6
.2V
±0
.
W
(L13
)
21 FREQ
14
.0000MH
z
MODE A
M
6
. PLL 6 .6MHz
1) FREQ
: 14
.0050MHz
Oscilloscope
PLL
TP3
PLL
T3-5
MAX
Ref
. 0
.2V/p-
p
BPF
MODE AM
(R60
)
9
1
TS-440S
ADJUSTMEN
T
Measurement
Adjustment
Item
Condition
Test
Specification/Remark
s
equipment
Unit
Terminal
Unit
Part
Metho
d
7
. PLL
11 MODE
AM
Tracking
PLL
IC8-1
,
TRACKIN
G
62MHz BPF
Readjust T9 (VCO2 OSC coil) to
Gen
.
11
pin)
56On
OUT
GENERATO
R
unlock
. (Core is fully bottom po-
3dB or les
s
sition)
GND
k
2) Connect 5609 resister in Tracking
Spectrum
TP4
T6,7,8
GND
Do
O
O
Gen
. output line
. Use oscillo-
analyzer
(R64)
vR
I
scopes probe to connect to spec-
Probe
TP
4
(R64
)
trum analyzer
.
Shiel
d
Case
66MH
z
00
59
.5MH
z
/
00
0
OU
T
8
. VCO2
1) Reset operation must also be
DC V
.M
PLL
TP5
PLL
T9
6
.4V
T9 has two peaking point
.
performed
.
(L21)
Adjust as shown below
.
*See a microprocessor
t 0
.1V
GOO
D
operation check
.
T8
i
N
G
1) FREQ
: 14
.0000MH
z
MODE A
M
2) FREQ
13
.999,9
MHz
2
.2-3
.O
V
MODE A
M
31 FREQ
14
.000,00 MHz
Spectrum
PLL
TP4
PLL
VR1
L23 and L21 shorte
d
MODE AM
analyzer
(R64)
to ground
. (PLL
20d
B
unlocked
)
Adjust spurious radia
-
tion level
. (58
.25MHz)
or mor
e
58
.25
66
.5MH
z
9
. PLL 30MHz
FREQ
14
.250
.00MHz
Oscilloscope
PLL
TP7
PLL
T10,11
MAX
Ref
. 0
.3V/p-
p
BPF
MODE AM
IC12-5pin
,1
2
10
. PLL
38
.5-
FREQ
14
.250
.00MHz
Oscilloscope
PLL
TP8
PLL
T13,14
MAX
Ref
. 0
.2V/p-
p
39MHz BPF
MODE AM
(R112)
,1
5
11
. PLL VC
O
(6
.5-
1) Disconnect RF unit coax
. cabl
e
(VCO)
Trackin
g
Generator
PLL
IC14-1pi
n
36MHz)
2) Connect 5609 resistor in Track-
Probe
TP9
PLL
T16,17
37
.5dB
Less than 2d
B
BPF
Spectrum
(L33)
,18,19
between peak an
d
ing Generator
line
.
output
Ripple
2d
B
Use oscilloscope's probe to
analyzer
3dB or less
point of 37
.5MHz
.
connect to spectrum analyzer
.
45dB or more
42MH
z
12
. 39MHz
FREQ
24.9500MHz
Spectrum
PLL
TP9
PLL
VR
2
Spurius
MODE AM
analyzer
(L33)
Minimu
m
radiation
42dB or mor
e
31MHz
39MH
z
13
. VCO1
1) FREQ
29
.9999MHz
T21
±0
.1
V
MODE
:
A
M
FREQ
22
.0000MHz
5
.3-6
.3 V
2) FREQ
21
.9999MHz
±0
.1
V
DC V
.M
PLL
TP10
RF
T22
2
.5 V
FREQ
14
.5000MHz
(R138)
5
.3-6
.3 V
3) FREQ
14
.9999MHz
±0
.1
V
T2
3
FREQ
7
.5000MHz
5
.3-6
.3 V
41 FREQ
7
.4999MHz
±0
.1
V
T2
4
FREQ
30
.0 (30kHz)
5
.5-6
.5V
92
s
TS-440
5
ADJUSTMEN
T
• RX
ADJUSTMENT
Measurement
Adjustment
Item
Condition
Tes
t
equipment
Unit
Terminal
Unit
Part
Method
Specification/Remark
s
1
IF AM
P
(common)
FREQ
14
.1750MH
z
MODE
US
B
RF GAIN Control
MA
X
Use the minimum SSG inpu
t
possible during alignment
.
SS
G
AF V
.
M
Oscilloscop
e
AF dummy
-
load (8S2)
Rea
r
Panel
AN
T
EXT
.SP
RF
T4,5,
3
---------
-
T7,8,1
5
9,
12
,
10,11
MA
X
Repeat 2–3 time
s
in case of T4,5,3,12
,
10,11
S/N 10 dB or more at – 6d
B
input . 1V or more/8S2 a
t
AF GAIN control MAX
.
2
. 2nd MI
X
balance
FREQ
. 14
.1750MH
z
MODE
US
B
Connect the SSG to ANT terminal
.
SS
G
AF V
.
M
Oscilloscope
RF
VR2
MAX AF Noise level
.
RF
VR1
MIN AF noise level
.
3
. 1st MI
X
balance
FREQ
100
.0 (100kHz
)
MODE
USB
RF
T
i
TC1
Internal spurius bea
t
MIN
.
Repeat
2–3
times 70dB or mor
e4
. IF TRAP
FREQ
29MHz Ban
d
SSG
45.05MH
z
OUT
80 dB!
,
5 RX DE
T
Balance
1) FREQ
14
.1750 MH
z
MODE
US
B
RF GAIN
. MI
N
IF SHIFT
: CENTE
R
RF GAIN
. MAX afte
r
adjustment
RF V
M
o
r
Oscilloscope
IF
0
9
(emitter
)
(R77)
IF
TC1
MI
N
6
. IF AM
P
(SSB)
FREQ
14
.1750MH
z
SSG
14
.1760 MH
z
OUT
0 dB
µ
MODE
USB
SS
G
AF V
.
M
Oscilloscope
Rea
r
panel
IF
L1,2,
3
4,18,5
MAX AF outpu
t
Use the minimu
m
SSG input possibl
e
during alignment
.
IF
L6
MAX AF outpu
t
7 IF AM
P
(FM)
FREQ
14
.1750MH
z
SSG
14
.1750 MH
z
MOD
'I kHz, DEV
: 3kH
z
OUTPUT
:30dB
µ
MODE
: FM
ANT
IF
VR3
Full scale
60
30dB±10d
B
/d
B
8
. S-METE
R
(FM)
FREQ
. 29
.0000MH
z
MODE
F
M
SSG
MOD OF
F
OUTPUT
:30dBµ
/
9
. S-METE
R
(SSBI
1) No signa
l
(SSG output
: OFF)
S-meter
IF
VR2
Set to starting point
.
(
.
Meter zero
)
2) FREQ
14
.1750 MH
z
MODE
US
B
SSG output
8dBµ
SS
G
S-meter
Rea
r
panel
ANT
IF
L3
S
1
Adjust counter clock
-
wise from peak
.
(turn slug out
)
3) SSG output
40dbµ VR3
S9
40dB±6d
B
10
. Squelc
h
threshold
1) MODE
C
W
SELECTIVITY
WID
E
SQL control
12 o'clock
Speaker
EXT
.
SP
IF
VR4
Adjust VR slowly an
d
stop at threshold
.
12 o'cloc
k
11
. Nois
e
Blanker
1) FREQ
14
.1750 MH
z
NB SW
O
N
SSG output
14
.175MH
z
First adjust 20dB input, the
n
use the minimum input a
s
possible
.
SS
G
DC V
.
M
Oscilloscope
Rea
r
panel
AN
T
EX
T
SP
R
F
R14
6
(10kS2)
T2
6
27
MI
N
21 Noise Gen
.
Low level
Noise Geri
.
SP
T2
6
27
MIN noise leve
l
12
. Beeper
1) AF GAIN Control
:
12 o'clock
AF V
.M
EXT
.
IF
VRIO
120mV/88
±10m
V
Depressing
I
A =Bland
AM key at
Oscilloscope
S
P
the same tim
e
2) POWER SW
O
N
3) Set to MEMORY CH17 whe
n
turning VFO
.
AF dumm
y
load
9 3
TS-440S
ADJUSTMEN
T
• TX
ADJUSTMEN
T
Measurement
Adjustmen
t
Item
Condition
Tes
t
equipment
Unit
Terminal
Unit
Part
Method
Specification/Remark
s
1
. TX AMPM
1) FREQ
: 14
.1750 MH
z
MODE
: C
W
CAR LEVEL control
: MA
X
RF unit VR 4
: CENE
R
Disconnect DRV connector from RF
Oscilloscope
RF
DRV
RF
VR
5
T13
,
16,
17
MA
X
unit
. Then, connect as shown right
.
STBY
: SEND
C
t
SCILL
O
5612
SCOP
E
2)
Reconnect this connector afte
r
adjustment
.
(1/4W
)
2
.
Base Current
1) FREQ
: 14
.1750 MH
z
MODE
: US
B
MIC LEVEI control
: MI
N
CAR LEVEL control
: MI
N
FINAL unit VR1, VR2
: MI
N
Connect Ammete
r
Q+
: EXT Power suppl
y
e
:
Power connecto
r
Adjust to minimum current with VR
1
and VR2 in the Final unit
.
STBY
: SEND
Ammeter
Final
VR1
Current drai
n
(Minimum current
)
+200 mA
First adjust VR1 and VR2 fo
r
minimum
.
Adjust VR1 for an increase o
f
200 mA when switched t
o
TX
.
Then adjust VR2 for 200 m
A
over this reading
.
VR2
Current drai
n
(Minimum current
)
+Driver curren
t
(200 mA)+200 m
A
3
.
1)
AL
C
(RF Outpu
t
power
)
2) Powe
r
meter
1) FREQ
: 14
.1750 MH
z
MODE
: C
W
CAR LEVEL control
: ALC scale MA
X
STBY
: SEND
Power meter
Rear panel
ANT
Filter
VR1
95 W
Caution
:
In no case shoul
d
the power be adjusted fo
r
greater than 110 watts
.
VR6
Set to PWR mete
r
95 W readin
g
2) METER SW
: PW
R
STBY
: SEN
D
4
. Power down
1) FREQ
: 29
.7000MH
z
MODE
: C
W
CAR LEVEL control
: ALC scale MA
X
Connect ACC socket pin (PD) t
o
50 W from NC
.
STBY
: SEND
Power meter
Filter VR3
50 W
±2
.5
W
2)
Reconnect this connector (PD
)
to NC after adjustment
.
5
.
Protection
1) FREQ
: 14
.2000MH
z
MODE
: C
W
Coax
. cable to 1 500 dummy loa
d
should be 1 m long
.
STBY
: SEND
1504 R
F
dummy loa
d
Power meter
Rear panel
AN
T
I
Filte
r
1 m
VR2
1
30
W
m
TX
Pow
.M
50
4
I I
2) ANT
: OPEN
18A or les
s
6
. ALC meter
1) FREQ
: 14
.2000 MHz
Power meter
Rear panel
ANT
Filter
VR4
Set to S meter
"0"
*If this adjustment is per
-
MODE
: USB
formed, step 2) Base curren
t
MIC LEVEL control
: MIN
must also be performed
.
CAR LEVEL control
: MI
N
METER SW
: AL
C
STBY
: SEN
D
2) Connect the AG to MIC Jack
.
AG
: 1 kHz, 5 m
V
STBY
: SEND
Power mete
r
A
G
AF VM
Filter
VR4
Set to ALC mete
r
starting point
.
3) AG
: 6 dB increase leve
l
(1 kHz, 10 mV)
VR5
Adjust for maximu
m
ALC scale reading
AL
C
7
.
Spurious
FREQ
: 21
.2000 MHz
Power meter
RF
VR4
-40
dB or less
.
MODE SW
: C
W
CAR LEVEL control
: ALC scale MA
X
STBY
: SEND
Spectru
m
analyzer
MIN
94
0
I
/
/
s
TS-440
S
ADJUSTMENT
Measurement
Adjustmen
t
Item
Condition
Tes
t
equipment
Unit
Terminal
Unit
Part
Method
Specification/Remark
s
8
.
Carrie
r
suppression
FREQ
: 14.1750 MH
z
MODES
: USB and LS
B
MIC LEVEL control
: MIN
Power mete
r
Oscilloscop
e
or Spectrum
Rear
Panel
AN
T
(Direc
-
tional
IF
VR 7,8
MIN
I
-40
dB or les
s
Directional coupler
Powe
r
Ts-44o
-
STBY
: SEND
analyzer coupler)
L~
mete
r
_
Osciilo
I
or Spectru
m
scope
analyze
r
9
. SSB mad
e
frequenc
y
response
FREQ
: 14
.1750 MH
z
MODES
: USB and LS
B
AG output
: Two tones 5 m
V
300, 2700 H
z
Set output to 50 W using MI
C
LEVEL control
.
STBY
: SEND
Oscilloscop
e
Ac
i
300HZ
OK
O
AG
2
2700H=©
Rear
panel
AN
T
(Direc
-
tiona
l
coupler)
Cont
.
S5
0
(DI
P
SW)
Adjus
t
below
.
Al
1111I
'
as
show
n
.illlIii
*If this adjustment i
s
performed, step 8 must als
o
be performed
.
I
DIP
SW
,'I
IIII
I'
O
K
5m
v
5608
eeee e
e
5
4
0
e
ee
ON
,1I
IIII
I
~
r
USa-
LSa
r
.1dIIIILdffIIIi
„
200
50
400
100
25
400
100
25
200
50
r~1IIIIII~i~''IIIII'1~
N
G
DIP SW are adjustable
from
-400
to +375
Hz
.
If two tone generator is not
available, adjust for equal
output power
at 300,
J
2700 Hz, as measured on
wattmeter
.
10
. Speec
h
processor
1) FREQ
: 14
.2000 MH
z
MODE
: US
B
AG output
: 1 kHz, 10 m
V
Set output to 50 W using MI
C
LEVEL contro
l
PROC SW
: ON and OFF
Power mete
r
A
G
AF V
. M
.
Rear panel
ANT
IF
VR6
Level should be th
e
same between O
N
and OF
F
STBY
: SEN
D
21 AG output
: 1 kHz, 1 m
V
(20 dB down
)
STBY
: SEND
25W or mor
e
11
.
FM
. DEV
.
1) FREQ
: 28
.7000 MH
z
MODE
: F
M
AG output
: 1 kHz, 30 m
V
50 mV (K)
Power mete
r
Linea
r
detecto
r
A
G
AF V. M
.
Rear panel
AN
T
(Direc
-
tiona
l
coupler)
RF
VR6
4
.6 kHz
-0
.1
kH
z
RF
VR3
3 kHz
±0
.1 kH
z
2) AG output
: 1 kHz, 3 m
V
5 mV (K
)
12
. CW Sid
e
tone
MODE
: C
W
CW BREAK IN SW
: SEM
I
AF GAIN control
: 12 o'cloc
k
VOX GAIN control
: MI
N
STBY
: RE
C
Connect KEY to KEY jack an
d
close the key contacts
.
Power mete
r
AF V
.
M
Oscilloscope
EXT
.
SP
IF
VR9
0
.63V/8f
2
13
Auto antenn
a
tune
r
If AT-440 is
1) BAND
: 28
.5000 MH
z
MODE
: C
W
CAR LEVEL control
: MAX
1509 R
F
dummy load
AT
10
TC
1
cm
Minimum SWR mete
r
reading
Repeat
2-3
times
.
installed)
AT unit VR1
: 12 o'clock
TS-4401—15oo
1
VR2
: Fully CC
W
AUTOTHRU SW
: AUT
O
ATTUNE SW
: ON
9 5
TS-440S
ADJUSTMEN
T
Measurement
Adjustmen
t
Item
Condition
Tes
t
equipment
Unit
Terminal
Unit
Part
Method
Specification/Remark
s
2) AT-TUNE SW
: OF
F
Disconnect No
.
connector fro
m
AT unit
.
STBY
: SEN
D
Set. SWR 1
.25 reading when VF
O
dial is turned
.
Set as show
n
right
.
VR2
Adjust VR2 until A
T
TUNE indicator jus
t
goes off
.
PWR
0
SWM
A
T
3) STBY
: RE
C
AT TUNE
: O
N
4) AF TUNE
: OF
F
Reconnect No
.
1
connector afte
r
adjustment
.
96
TS-440
S
ADJUSTMEN
T
•
Item
Condition Operation chec
k
1
.
Rese
t
check
1) FUNCTION SW
:
A
POWER SW : OF
F
Set the POWER SW ON
FREQ
: 14,000
.OkH
z
MODE : US
B
VFO A
: Light
s
The "Beeper" sound simul
-
taneously with POWER ON
.
while depressing the
I
A =
B
key
. Then release the IA =
B
key
.
21 FUNCTION SW
: B
FREQ
. 14,000
.OkH
z
MODE : US
B
VFO B
: Light
s
31 LVFO/M
SW
: ON
The frequency display disap
-
pears
. M .CH display light
s
and displays
00–99
order
.
Split display lights whe
n
turning VFO dial
90–99
.
M
.CH SW
: Change the chan
-
nels in 00 through 99 order
.
2
.
Band
1) [VFO/M]
SW
: OFF
FREQ
:
1
8
,
0 00
.0kH
z
The "Beeper" sounds simul
-
taneously
.
The MHz display ~
q
,
counts up
. The "Beeper
"
soudns simultaneously
.
1MHz STEP SW
: OF
F
Depress the "BAND
: UP
"
key once
.
Press repeatedly
.
2)
Hold the "BAND
: UP
"
on
FREQ
:
i
r
14, 000
.0
18, 000
.
0
10,000
.0
21,000
.
0
7,000
.0
24,500
.
0
3,500
.0
28,500
.
0
I
t
1,500 .0
29, 500
.
0
1
The "'Beeper" sounds a
t
each Key-press
.
3) Depress the "BAND
:
DOWN" key once
.
Repeat the operation
.
FRED
: J LI , LI 00
.0kH
z
Displays 1MHz lower frequ
-
ency than that previousl
y
displayed in 2)
.
The
"
Beeper" sounds
.
The frequency display step
s
down 1MHz at eac
h
key-press
.
The
"
Beeper" sounds
.
4) Hold the "BAND
:
DOWN
"
key on
.
The frequency display in 2
)
steps down . The "Beeper
"
sounds at each key-press
.
5) 1MHz STEP SW
: O
N
Hold the "UP
"
key on
.
Hold the "DOWN" key on
.
1MHz LED (green) lights
.
FREQ
: LI
q
,000
.OkH
z
The MHz display LI
q
advances 1MHz at eac
h
key-press
.
The display steps dow
n
1 MHz at each key-press
.
Item
Condition Operation chec
k
3
.
Dial
1) FREQ
: 0,000
.0kH
z
Check to see if the dis
-
play does not change b
y
turning the VFO contro
l
counterclockwise
. And adjus t
the index by turning it in th
e
same way
.
Turn the VFO contro
l
slowly clockwise
.
4
.
MOD
E
functio
n
(LSB
,
USB
,
CW, AF,
Change MODE (ex
: depres
s
CW once)
CW
"C"
morse
code-
-
EX
: LS
B
US
B
CW - -
-
A
M
FM, FSK)
–
FM --
-
FSK --
-
LED lights when depressin
g
MODE SW
.
ENT
1
1)
Depress the ENT
once
.
I
I
The frequency display dis
-
appear
s
Seven bar'
s
KEY
MODE/KEY
--
segment an
d
two decimal point displayed
.
C7a
:r
H'
II
I
I
r
; ,
r–
PG
''—
1
r—'0
S2
~
L
P
1 1
0
I i
1 I
2
1
l
21 Depress MODE/KEY
FREQ
: The "
B
1
e6
.
eper" sounds simul
-
simul
-
L
E
Y
EN
T
7
1
1
)
FR
6
EQ
: 14
.0000MHz
taneousl
y
taneousl
y
6
Memory
The frequency displays dis
-
write
MODE
: USB appears
.
100 CH
[VFO/M
SW
: ON
M CH
~--
two decima
l
memor
y
00–89
:
NORMAL
1
M
.CH display
point onl
y
ay lights and dis
-
plays 00 in order
.
91
-99
.
2) Repeat VFO/M SW
: ON
FREQ
: 14
.0000MH
z
SPLIT CH
The "Beeper" sounds simul
-
taneously
.
31
I
M
.IN
–
I
SW
: ON
The frequency display dis
-
appears
.
M
.CH display lights and dis
-
plays 00 in order
.
M
.SCR LED light
.
41
I
M
.IN
I
SW
: ON again
FREQ
: 14
.0000MH
z
(Memory is written already
)
51 VFO/M SW
: ON
FREQ 14
.0000 MH
z
M
.CH display lights and dis
-
plays 00 in order
.
9 7
TS-440S
ADJUSTMEN
T
L
5
TC
1
VR
2
VR1
0
VR
9
L1 5
TC
2
TOP VIEW
VR7 L18 VR
8
VR1 VR6 VR3 VR5
L
4
L 3
L 2
L 6
L1 2
L
1
VR1
4
VR1
3
VR4 (RF GAIN
)
VR5 (RIT
)
VR7 IF SHIFT
)
98
R96 L21
R6
0
TP6j
ITP51
TP
3
T16 VR2
T15 T14 T1
3
R11
2
ITP8I
T1
VR14 VR1
3
L
1
TP11I
ITP1
L1
3
ITP2
]
R6
4
TP4I
TS-440S
ADJUSTMEN
T
BOTTOM VIEW
VR4 SI VR2 VR
3
T16 T5 T14T13 T6 VR2T15127 T26
T1
0
VR
6
T1
1
VR
3
T1
2
T
9
T
8
T2
4
T2
3
T2
2
T2
1
100
RX SECTION
RF UNI
T
I4
.2MHz -1
-
45
.05MHz
8
.83MHz
40 dB
.
p
CI3
5
—F
RI
F
OdBp I
7171
F
1
I.
-
IF UNI
T
455KHz
94
107 dB,
u
f
:
14
.200MH
z
INPUT
:
OdB y
AF OUTPUT
:
0
.68V/811
o
—
RIF
X
.
F
7 0
45 54
16
.5
mV (AF)
25mV 4
.9m
V
44 [FM]
52 [FM
]
CF
3
Frequency
:
14
.200 MH
z
Input
:
0 dB
u
AF input
: 0
.68 V, 8 ohm
s
Note 1
: The SSG signal of 14
.200 MHz, 0 dBu is input from the AN
T
terminal and the audio output of 0
.63 V, 8 ohms is obtained b
y
adjusting the AF GAIN VR
. After then the AF GAIN VR is fixe
d
and the SSG signal levels of each section is plotted so that th
e
fixed level audio output
.
Note 2
:
In the FM mode, this is the signal level to obtain the sam
e
value as the SIN ratio at 0 dBu signal input
.
Note 3
:
The SSG output is measured through 0 .01 uF ceramic capacito
r
(barium titanate capacitor)
.
IC2
TX SECTION
IF UNIT
—
2
.3mV
I KH
z
6
.1 mV
.067 V
.014V
455 KHz
.14V
.24V
8
.83 MH
z
.058V
.I IV
.017
V
MI
C
MIC
CF
4
CAR 455KHz
CAR 8
.375MH
z
.I6 V
.042
V
HET
36
.22MH
z
.27 V
FINAL UNI
T
14
. 2 MH
z
0
DRV
.6
V
VC
0
.76V
.66V
4
.6V I
.2V
90
V
(RF
UNI
T
—I
t
45
.05MH
z
.37
V
0-
-
TIF
f
:
14
.200 MHz
5
.5mV
.019V
!KHz (FM
)
.018V
IV
.5
V
Frequency
: 14
.200 MH
z
Note 1
:
The high frequency section is measured by the RF valve voltmeter in the CW
mode, and the low frequency section is measured using the AF valve voltmeter i
n
the USB mode to obtain this value
.
Note 2
:
The value of the audio input signal is obtained by the 1 kHz single tone whic
h
measures almost full scale within the ALC zone of the meter in the USB mode o
r
standard modulation I±3 kHz, dev
.) in the FM mode
.
Note 3
:
Set the MIC VR to its maximum level position
.
-
7362668
3 2
''~
i
3=KO'=
A
M
'
IF AMP
1^
35K2
3
W /
•
N
65 83M
H
IOPTIONI
zss
s
305358
AM
P
25C2a5
6
z
D30
2502459
8
.716
1
BUF
F
AMP
BUF
F
2
.2063
25C 65S
25026
.
IN TX MI
X
APIS
,
669
n
2s,,
62A
2
.7668
32
750266
8
2nn OX MIX NB GAT
E
25
2
DIS 1
30'
3
4
.0
33
CP
T
D52,53
BUFF
,
2
.2456
SIDE TON
E
2
030
1
SSB,C
.,AM M
C
8 87M/0
IF AMP
MCP
2SC2459
1166
6 16
22
AM
P
BUF
F
23045
8
LIMITE
R
LP,
BUF
F
11I21
556c
It
124555
25L26
3
3
.TX
MI
X
3S K122
3
2
PS-50
ADJUSTMEN
T
1
. OUTPUT VOLTAG
E
1)
Connect the load and set the current to 20A
.
2)
Adjust output voltage to 13
.8 V±0
.4 V with VR1
.
2
. PROTECTION CIRCUI
T
1)
POWER SW
: OF
F
2)
Connect a 0
.1 SZ 10 W resistor
.
3)
POWER SW
: O
N
4)
Adjust VR2 so that 0
.1V DC is obtained
.
PACKIN
G
104
PS-5
0
SCHEMATIC DIAGRAMIPC BOAR
D
SCHEMATIC DIAGRAM (X43-1520-00)
240V Versio
n
Q1
2SA5621Y
)
02,3,5 2SC2458(Y
)
04
.258761(0
1
D1,6,0
.15155
5
D2,3
U05
B
D5,7
UZ-Q
.IB
L
D4
UZP-1B
B
D8
'UZ-15B
H
THi
32D2
7
TH2
5TP-41
L
DC
~3
.BV ue%~E
o
0 8"
.
3
D
6
L
1
1
T
AVR UNIT IX43-1520-00)
GN
n
Q
4
D
3
Q1,2 2N588
5
D1
S25VB1
0
D2
5LP1448
~
1
r~
s
~~~~o--
.-~~
I
~
a
G
'
VT
/
EEs i~N
G
{'
nc
I
zoo
_j
S2
°
_
100 2
o
I
~
J
L
nN
o
L—
fi
b
100V Version
220V Version
120V Versio
n
PC BOARD VIEW (X43-1520-00) AVR UNIT
Component side view
105
PS-50
PARTS LIS
T
New Part
s
Parts without Parts No
. are not supplied
.
Les articles non mentlonnes clans le Parts No
. ne sont pas fournls
.
PARTS LIST
Telle ohne
Parts No
.
werden nicht gellefert
.
Ref
.
No
.
Address
New
Parts No
.
Description
Desti-
Re
-
Parts
nation
mark
s
fii
/ #~
it
E4
7
PS-50
4
:
AOt --1000--02
LASL
(IPPER
)
4
:
A01
.--1
.001.--12
[
;ASE
(INWFR
)
_
A01-tO02
t2
LASE
(LOWER
)
-
4-
[
[(U--2561
.--U3
PANEL ASSY
kM
W
4
A20 2561
03
PANEL
-
ASSY
X
4
A20-2562 03
PANEL
. ASS
Y
--
t
A23
1491
03
REAR PANE
]
B40-3640--04
MODEL
NAME
PL
.01E
k
--
4
:
R40--3141--04
MODEL NAME
PLATE
MW
X
t
P40-3642 04
MODEL
NAME
F L 0H
T
B41-0627
14
AIIIEON
AREI
(220V)
M
W
1441
0630 04
F01_IfION LABEL
(240V)
f
X
B42--1733--14
rALJTEON LABEL
(120V/220V/240V
MT
W
842
1(
1
33
14
I
AU) 1ON
LABEL
. .
(120V/220V/240
1
)
Y
1442
1i'r'O
04
LABEL
-
(FUSE
.4A)
MT
W
-
R42
]
.770-[
.]4
LABEL
(f USE
.4A)
X
B42-2430--04
rAUIEON LABEL
(120V)
k
I346 -0411-00
WARRANTY
!AP
B
_
4
B50-0051-00
INSIRUI
flNN
MANHAE
kM
W
T
B50-8051 00
ENSTRULIfON
MANUAL_
X
4i
1350--8052---00
INSTRUCTION
MANUAL
. .
T
rt
C91--0647--O5
I
-
ERALIE
I -
0
.01LJE
P
C2
,3
1
-
71 - 0496
05
1ERAM1
1
-e
045F2Ht03P
1
-
ER0ND
O
.OIOHF
P
CO
.9
I
-
90 2034 05
LLELTRO
220000
25W
V
rtO
.tt
k45F1114r''37
ER0MEr
0
.04?0F
Z
Cl2
FV45FIHJ03Z
CERAMIC
0
.01OU
f
1E0-0351
05
500E
.
]
E20-0283-05
TERMINAL
BOAR
D
E30--1639--05
AL POWER FOR
D
E30--1643--15
AC POWER
I
ORD
k
M
E30-- 1644
1
.5
AF
POWER CORD
f
E30--1645-05
AL POWER LORD
W
-
[130--1
.647--05
AC
POWER CORD
X
_
FM
0939-03
HEAT
I
F
F05-4022 05
MT
W
FUSE
=
:
(4A
)
FUSE
(4A
)
--
F05-402?-05
X
_
F05-6021-05
10SL
(6A
)
--
F09-04EO-04
HEAD PROIELIOR
(FAN
)
G02-0549-04
LAI
SPRIN
G
HOI-4693-04
[TEN CARTON
BOX
k
:
:M
W
4
H01-4693-04
Eft M CARTON
BOX
X
--
:4
:
HO1 -4694-04
ITEM CARTON
BOX
1
-
_
1103 2201-04
CARTON BOX (OUTSIDE
)
H10--2567-02
POLYSTYRENE FOAMED FIXTURE (F
)
HIO-2560-02
POLYSTYRENE FOAMED FIXTURE_
(R
)
1112-1389-04
PArkENG FEXUJR
E
*
L120-1430 OJ
COVE
R
H25-0105-04
PROTECTION BA
G
J02 0323--05
f 013
-
r
(F)
106
PSI
O
PARTS LIS
T
Ref
.
No
.
vfflit
Address
Ne
w
Parts
Parts No
.
Descriptio
n
213
/
Desti
-
nation
Re
-
mark
s
S
g
J02--0442-0
4
302---044
.3--0
4
J13-0033
1
5
:121
4153
3
4
J21--4179--0
4
J2I
4180--0
.
J21
4101
1
4
J30 054
04
I NOT
(R
)
FOOT
(/3
.'2
)
IiOl DE
R
M&UHfING HARIMARE(MOTOR
)
MOUNIrN(i
HARDWARL (HI Fl LPN
)
tl9UNfING HARDWARE(FAN
)
110LNV
HARDWARE (P
.
i
SPAEL
R
S
i
S
2
D
I
Dl
.
01
2
J42--0403_0
5
J61-0400 0
5
,'9 07SH 0
4
1
.111--8286- 0
5
HU9 0256 O
S
N09-0658-0
4
NI
.0-2030-- 4
6
N15
1031)
1
6
N30-2604-4
6
N30 _1014 4
6
N30-4016
4
6
N33--3006--41
.
N35
3006 4
1
N35--3008-4
1
NH7-31)06
4
1
N9i' 3006 4
6
N8-3012
4 5
NO? 3014-4
6
N88 30CIO 4
6
340 1405 0
5
329--2406--0
5
142--0302--0
5
SLP144
P
325VH1C
)
c_
'
N588
3
X43
1520--00
1'9W[R
1
ORD HUSHIN
G
WIRE HAN
D
PUSH I- NN
B
POWER IRONSINRME
R
SCRE
W
SCRE
W
HEXAGNN
Nll
l
FLAT WASHE
R
PAN HEAD MACHINE
;CRE
W
PAN HEAD MAIM-TIN
E
HSINE
W
PAN HEAD
SCRE
W
NMI_ HEAD
MAINE
SCRE
W
HINDfNG HEAD HAI HFNE SCRE
W
Eli ND]
.
HEAD MACHINE
W
HRA7[ER HEAD
l
-
OPI_I
:CE SCRE
W
HRA7IEP HEAD
1APilfE
SCRE
W
BRAZIER
HEAD
'1111 1111
SCRE
W
3RA71fR
HEAD
TAF'11 11
SERC
0
FLAT HEAD
1APIfIE
SCRE
W
PU5H SWUM
(PNWLR
)
ROTARY SWITC
H
DI
MOTOR ASS
Y
LE
D
DIOD
E
TRANSISTO
R
PNWfR SUPPLY
PI
11 ASEA'
MLW
X
X43-1520-0
0
El
.
2
C
3
E
4
L
i
U
:
)
I
I
MI
I
ME
4
Fl
Ek45E211472
P
Lk 45F 1 0103
Z
il<45FI11473
Z
LfF)4141C
:3311
1
EE04WIA4701
I
CL45f 111103
7
I
k49FIH473
Z
L70 0014 0
5
E
2
3 0462 0
5
E40 0273 0
5
L40-0273 -0
5
L40-0473 0
5
F05-203S-1
5
J42 0428-05
ERAMLI
4MOPF
P
IERAM
lr
1]
. 01001
7
ITRAMC
0
.04?UF
7
FLEEFRO
3JOUf
16W
I
)
FIFI 1RN
4MF
IOW
V
CERAM('
0
.010UF
Z
EERAMIT
0
.047UF
7
FLEI_
f
fRN
4MOI)f
25W
V
TERMINA
L
PIN f9NNE1_19
R
P f N ENNNEITO
R
F')N
LNNNEC[N
R
FUSE
(20A
)
POWER CORD PUSHING
New Part
s
Parts without Parts No
. are not supplied
.
Les articles non mentlonnes Pans le
Parts No
.
ne sont pas fournls
.
Telle ohne Parts No
. werden nlcht gellefert
.
10
7
PS-50
PARTS LIS
T
New Part
s
Parts without Parts No
. are not supplied
.
Les articles non mentlonnes dens le Parts No
. ne sort pas fournis
.
Tells ohne Parts No
. werden nicht geliefert
.
Ref
.
No
.
Address
New
Parts No
.
Description
Desti-
Re
-
Parts
nation
mark
s
R2
.3
RS14Gf33A4R?J
FL---PROOF RS
4
.7
J
1
W
R4
RD1
.4DE32H121
.J
.
;MALL
.--RD
120
J
1/2
W
R8
.9
RS14GB3A01DJ
Fl
PROOF RS
01
J
1
W
RI1
.12
f `-31
.4G03A331
.3
FL--PROOF
RS
130
J
1
W
R21
RS14GI33A1
.31J
FL--PROOF RS
150
J
1
W
VR1
.
R12-I429-05
TRIMMING POT
.
(500
)
VR2
R' 12--74083–05
TRIMMING POT
.
(500k
)
DI
151
.555
DIOD
E
D2
.3
U05B
D
:[OD
E
D4
I
.JZF'1OD
ZENER DIOD
E
D5
U79
. 1IIL
.
ZENER DIOD
E
DO
151555
DIOD
E
D7
0Z9
. l
.IIL
ZENER DIOD
E
DO
UZ15DI-1
ZENER DIOD
E
D9
151
.55`5
DIOD
E
01
25A562(Y)
TRANS
.[STO
P
.3
2SC24 583 (Y)
TRANS I STO
R
04
250761 ((I I)
TRANS
. [ S1 O
P
175
25I
-
2458 (Y)
TRANS 1 STOP
:
TI-11
32D27
THERM
:[ STO
R
'1I1r'
5TE'41L_ THERM
:f
.STOP
108
I
®
PS-43
0
SCHEMATIC DIAGRAMIPC BOAR
D
ADJUSTMEN
T
1.
Connect the load and set the curren
t
to 15A
.
2.
Adjust output voltage to 13
.8V
±0
.4
V
with VR1
.
01,2 2N588
5
01
02
RE
D
AVR UNIT(43-1440-00
)
0
1
Ac
°
1
D
1
C
02
0
Mt
IF--
•
,TEMM
1,
92
20
A
R2 2
.
2
AA
,
2W
W
23
.5
V
16
.5
V
D7
-
1
.
Q1
2SB512(P)
07
2SA562(Y)
D3,6 1S1555
D5
: XZ090
D7
: M
T
-
LQ2
i
,56_2SC1815(Y)_D1,2 _U05B
D4 _RD91EB2 _TH1 321)27
_
ci
16JA
.
m
I
D
0S 13 8
V
VAX '0
A
0
0
rat
STDI0001F
)
FUSE 6A
T
120V ---
:USE A
I
1
22 0
V
120
V
D1
: S25VBIO
POWER
Ac
120V_
J L ---
POWER
Ac 220X
L__
_ POWER
A'_ 2
0
0
220V VERSION
240V VERSION
10
9
PC BOARD VIEW
120V VERSIO
N
AVR UNIT (X43-1440-00) Component side view
2SC181
5
2SB51
2
2N588
5
SLP-144B
E
PS-430
SPECIFICATIONSIPARTS LIS
T
SPECIFICATION
S
PARTS LIS
T
SEMICONDUCTO
R
Item
arks
Name
Item
n
ark
s
Nam
e
Diode
151555
Thermistor
32D2
7
S25VB1
0
U05B
TR
2N588
5
Zenerdiode
RD9
.1EB2
2SB512(P
)
LED
SLP144B
2SC1815(Y)
Part No
.
ark
s
Description
Ref
. No
.
PS-430 GENERA
L
A01-0937-02
N
Case (upper
)
A01-0938-12
N
Case (lower
)
A20-2461-03
N
Panel
K,M,W,
X
A20-2462-03
N
Panel
T
B39-0407-04
Spacer x
2
B40-2634-04
N
Name plat
e
B41-0626-14
N
Voltage sheet
120V
K
B41-0627-14
N
Voltage sheet
220V
M,
W
B41-0630-04
N
Voltage sheet
240V
T,
X
B42-1733-04
Voltage shee
t
B42-1770-04
N
Current indication sheet
M,T,W,
X
B46-0404-00
Warranty card
K
B50-4014-00
N
Instruction manual
K,M,W,
X
B50-4015-00
N
Instruction manual
T
CE04W1 E4R7M
E
4
.7
25V
C1
0
CK45E2H103P
C
0
.01
500V x 4
C4—
7
CK45F1H473Z
C
0
.047 x 2
C9,1
1
C90-0865-05
N
E
4700
25V
C
8
C91-0079-05
C
0
.01
C
l
C91-0496-05
C
470P x 2
C2,
3
518-0351-05 3P Inle
t
E20-0282-05
2P terminal plat
e
E22-0472-05
Lug plat
e
E23-0015-04
GND lu
g
E23-0425-05
Lug termina
l
E30-1643-15
AC cord
K,
M
E30-1644-15
AC cord
T
Part No
.
arks
Description
Ref . No
.
E30-1645-05
AC cord
W
E30-1647-05
AC cord
X
E31-0500-05
Cable with plu
g
F01-0786-03
N
Heat sink plat
e
F01-0787-13
N
Heat sin
k
F05-4022-05
Fuse 4A
K
F05-4022-05
Fuse 4A x 2
M,T,W,
X
F05-6021-05 Fuse 6A x 2
K
F05-6021-05
Fuse 6A
M,T,W,
X
F07-0817-04
N
Fan cove
r
F09-0405-24
Fa
n
H01-4451-04
N
Packing carton (inside)
K,M,W,
X
H01-4452-04
N
Packing carton (inside)
T
H10-2567-02
N
Packing fixture (F
)
H10-2568-02
N
Packing fixture (R
)
H12-1319-04
N
Cushio
n
H20-0276-03
Protective cove
r
H25-0105-04
Protective ba
g
J02-0323-05
Foot x
2
.102-0427-04
N
Assistant foo
t
J13-0033-15
Fuse holde
r
J42-0403-05
Cord bushin
g
J42-0434-05
N
Rubber bushing x
3
K29-0758-04
Push kno
b
L01-8166-05
N
Power transf
.
S29-2406-05
Voltage selector switch
S
2
S40-1404-05
N
Power switch
S
i
S59-1407-15
Thermostat
TM
1
T42-0005-15
Fan moto
r
X43-1400-00
N
AVR unit
Part No
.
arks
Description
Ref. No
.
Qt
y
AVR UNIT (X43-1440-00
)
CE04W1C470M
E
47
16V
C9
1
CK45F1H103Z
C
0
.01
C1,2,5
3
CK45F1H473Z
C
0
.047
C7,8
2
C90-0814-05
E
4700
25V
C3,4,6
3
E23-0022-04
Terminal
6
E23-0046-04
Square terminal
2
F40-0273-05
Mini connector
2P
2
E40-0473-05
Mini connector
4P
1
J31-0502-04
PC board collar
4
J42-0428-05
PC board bushing
4
R12-0427-05
Trim
. pot
.
50052(B)
VR1
1
RS14AB3A181J
MF
18011
1W
R9
1
RS14GB3D4R7J
MF 4
.711
2W
R2
1
R92-0663-05
N
Cement
0
.02511
3W
R7,8
2
Input voltage
:
Output voltage
:
Output current
:
Continuous load current
:
Output voltage fluctuation
:
Ripple voltage
.
Power consumption
:
Dimensions
:
Weight
:
120/220/240V AC±10%, 50/60H
z
13
.8V DC (standard voltage
)
20 A (25% duty cycle) 15A (50% duty cycle
)
10 A max
. (including external output terminal
)
Within ±0.7 V at AC 120V, 220V, 240V±10
%
(Load current
: 15A
)
Within 0
.7 V between 2—15 A load
.
(No-load output voltage
: Less than 16V a
t
120V/220/240V
. AC
)
Less than 20 mV (rms) at 13
.8V, outpu
t
current 15A
.
Approx
. 480 W (at 120/220/240
V
AC. 13
.8V DC, 20A
)
173 (6-13/16) W x 95 (3-3/4)H x 245 (9-5/8
)
D mm (inch
)
Approx
. 7 kg (15
.4 lbs
.)
N
: New part
s
110
VS-
1
I
SPECIFICATIONIPARTS LIST/PC BOARD VIE
W
p
.
SPECIFICATION
S
Dimensions
:
W 70m
m
H 15m
m
D 35m
m
Weight
:
20
g
OUTSIDE VIE
W
PARTS LIST
Part No
.
m
ar
ks
Description
Ref
. No
.
B50-4035-00
N
Instruction manua
l
CC45SL1 H121J
C
120P x 2
C2,
3
CE04W1A470M
E
47
10V
C1,14,1
5
CE04W1C100M
E
10
16V
C1
1
CE04W1HR22M
E
0.22
50V
C1
2
CK45B1 H221 K
C
220P x 2
C7,1
0
CQ92M1 H332K
ML 0
.0033 x 3
C6,8,
9
CS15E1EO10M
T
1
25V
C
4
CS15E1VOR1M
T
0
.1
35V
C
5
C91-0131-05
C
0
.01 (SP)
C1
3
E40-0273-05
A
Mini connector 2P
M
E40-0373-05
A
Mini connector 3P
M
E40-0373-05
A
Mini connector x 2 3P
T
E40-0873-05
A
Mini connector 8
P
H01-4481-03
No
Packing carton (inside)
M
H01-4501-03
NA
Packing carton (inside)
T
H25-0029-04 Protective bag x
2
L78-0006-05
N
Ceramic OSC
X
1
N89-3006-46
Tapping screw x
4
R12-4408-05
Trim
. pot
.
50k11
VR
1
S31-1411-05
N
Slide switch
S
i
AN6562
NIC IC
2
MN6401TRA
N
IC IC
I
TC40107BP
N
IC
IC3
TALK SPEED SELECTIO
N
Speed is factory set at
"
standard
"
talk speed
. Thre
e
different speeds can be selected
.
Note
: When placing the jumper, solder carefully
.
Spee
d
Jumper place
Std
. speed
30% mor
e
than Std
.
60% mor
e
than Std
.
1
X X
0
2
X
X
0
3
X
0
X
Symbol 0 , denotes the place in which a jumper wire i
s
placed
.
The place which a jumper wire to be placed
.
PC BOARD VIEW
0
.1
(
Q
L
Component side vie
w
~1?
(
Ix
ED
OS
d
ISd
O
ZSd
p
ESd
O
PSd
c
.
)
aS
[
V
AS v
-
-
.1
)
-
^
-
0
t
x
-
-
_ cc
9
010
-0
c
r
0 -
ai a
6
8
i
c
c
-
+
±
Q1
t
i
—
+
c
F
Z1D ~U
n
ai
r
m
a
LL
g
5
Ix
•
i
U
E
I
1
+
In
_
LIel
U
(o4
B
O
-
O
VS-1
SCHEMATIC DIAGRA
M
LANGUAG
E
SELECT
0 0 0 0 0 0 0 0
CI 47 IOV
IC 1
MN64O1TR
A
IC 2 AN656
2
IC 3 TC4O1O7B
P
J0
2
28 27 26 25 24 23 22 21 20 19 18 17 16 1
5
n
a
o
a a
d
a a
LL
m N
>
g o
D
o
o
N
o
w
m
2 3
4 5 6 7
8
9
0
11
12
13 1
4
6
.4
V
5
I
V
•
444
RI I
M
XI
800KH
,
--o--
o\30V,os
TP
1
,,,o—
Tno
0—
p
~I
1
V
_
R5 100
k
-N4
07 2200
3
a-
i
2
1
-0
B 7 6
5
I
lJ
IC
3
I
2
3 4
IC 1
R14 22
0
c
R3
R
4
IOOk
33k
2
144
•
444
-
_
4 5V
1
uo
^
3
4 5V
45
V
ENGLISH
0
S
I
JAPANESE
VS - 1
MB-430/SP-43
0
MB-430 OUTSIDE VIEW
SPECIFICATIONSIPARTS LIS
T
MB-430 PARTS LIST
N
: New part
s
SP-430 SPECIFICATION
S
SPEAKER SIZE
3
"
RATED INPUT
1
.0 watt
s
IMPEDANCE
8 ohm
s
FREQUENCY RESPONSE
300 Hz to 5 kH
z
DIMENSIONS
4-7/8" wide
x
3-3/4" high
x
9-1/3
"
dee
p
(excluding feet
)
WEIGHT
3
.1 lbs
.
SP-430 PARTS LIST
N New part
s
Part No
.
,
R
ark
s
a
Description
Ref
. No
.
A01-0942-03
N
Case (B
)
A01-0944-03
N
Case (A
)
A20-2468-03
N
Panel
K,V
I
A20-2469-03
N
Panel
T
A23-1431-04
Rear pane
l
B04-0406-04
N
SP gril
l
B07-0613-14
SP rin
g
B39-0407-04
Spacer x
2
B46-0404-00
Warranty card
K
B50-4026-00
N
Instruction manual
K,
M
B50-4027-00
N
Instruction manual
T
Part No
.
mks
Description
Ref
. No
.
A13-0635-03
N
Angl
e
B50-4016-00
N
Instruction manua
l
H01-4454-03
Packing control (inside
)
H25-0077-04
Protective ba
g
H25-0098-04
Protective bag 150 x 48
0
J30-0521-04
N
Spacer x
2
N09-0007-05
Wing bolt x
5
N09-0008-04
Hex . screw x
6
N14-0009-04
Nut x
6
N15-1060-46
Flat washer x
6
N 16-0060-46 Spring washer x
6
N32-3006-46
Flat screw x
4
N99-0309-04
N
Hex
. head screw x
6
W01-0401-04
Hex
. wrench
Part No
.
4%,
Description
Ref
. No
.
E20-0208-04
Terminal plat
e
E30-1629-05
SP cor
d
G53-0507-04
Packing x
4
H01-4468-04
N
Packing carton
K,
M
H01-4469-04
N
Packing carton
T
H10-2513-02
Packing fixture (F
)
H10-2514-12
Packing fixture (R
)
H12-0445-04
Cushio
n
H20-1407-03
Protective cove
r
H25-0077-03
Protective bag Accessor
y
J02-0323-05
Foot x
4
J02-0409-04
Assistant foo
t
J21-1144-14
SP mounting hardware x
2
J21-2573-04
Foot mounting hardware x
2
J61-0019-05
Vinyle ti
e
N15-1030-46
Washer x
8
N30-3008-46
Round screw x
4
N35-3006-41
Bind screw x 12
Cas
e
N87-3006-46
Self tapping screw x
6
N87-3008-46 Self tapping screw x
4
T07-0224-05
N
Speake
r
114
YK-88S/SN,YK-88C/C
N
FILTE
R
YK-88S
Item
Ratin
g
Nominal center frequency
8830 kH
z
Center frequency deviation
Within +150 Hz at 6 d
B
Pass bandwidth
+1
.2 kHz or more at 6 d
B
Attenuation bandwidth
+1
.5 kHz or more at 6 d
B
+2
.2 kHz or less at 60 d
B
+3
.0 kHz or less at 80 d
B
Ripple
20 dB or les
s
Insertion loss
6-dB or les
s
Guaranteed attenuation
80 dB or more withi
n
+3 kHz or 1 MH
z
Input and output impedance
600 12/!15 pF
Table 1 SSB crystal filter YK-88
S
(L71-0208-05) Optio
n
YK-88SN
Item
Ratin
g
Center frequency fo
8830 MH
z
Center frequency deviation
8830 kHz +150 Hz at 6 d
B
6 dB bandwidth
+900 Hz or mor
e
60 dB bandwidth
+ 1800 Hz or les
s
Guaranteed attenuation
80 dB or more withi
n
fo+2
.5 kHz to +1 MH
z
Ripple
2 dB or les
s
Insertion loss
3 dB+2 d
B
Input and output impedance
600 Sl
y
15 pF
Table 2 SSB crystal filter YK-88S
N
(L71-0220-05F) Option
YK-88C
Item
Ratin
g
Center frequency fo
8830
.7 kH
z
Center frequency deviation
fo+150 Hz at 6 d
B
6 dB bandwidth
+250 Hz or mor
e
60 dB bandwidth
±900 Hz or les
s
Ripple
2 dB or les
s
Insertion loss
6 dB+2 d
B
Guaranteed attenuation
80 dB or more withi
n
fo+2 kHz to +1 MH
z
Input and output impedance
600 52/15 p
Table 3 CW crystal filter YK-88
C
(L71-0211-05) Optio
n
YK-88CN
Item
Ratin
g
Center frequency fo
8830
.7 kH
z
Center frequency deviation
fo+50 Hz at 6 d
B
6 dB bandwidth
+125 Hz or mor
e
60 dB bandwidth
+600 Hz or les
s
Ripple
2 dB or les
s
Insertion loss
8 dB+2 d
B
Guaranteed attenuation
80 dB or more withi
n
fo +2 kHz to +` MH
z
Input and output impedance
600 S2%15 p
F
Table 4 CW crystal filter YK-88C
N
(L71-0221-05) Optio
n
AT-440
PARTS LIS
T
New Parts
Parts without
Parts
No
. are not supplied
.
Les articles non mentlonnes Cans le Parts
No
.
ne sent pas fournis
.
Tel le ohne Parts No
. warden nicht gellefert
.
Ref
.
No
.
Address
Ne
w
Parts
Parts No
.
Description
Desti
-
nation
Re
-
mark
s
AT-44
0
B4E--0411-00
WARRANTY CAR
D
-
B50--[1054--00
I
:NSTRU[
-
[11ON MANUA
L
I-101--469 5-[]4
TEM CARTON E4A
X
.
HO
-
3-2283-04
CARTON BNX
( NUTS I DE
)
H12--1
.390-03
PACK[ NG FIXTUR
E
(-112--1397
.--04
PACKING FIXTURE
:
H25--0029-04
PROTECT I AN BA
G
H2`
. - 0705-- 04
PRATE[T I
: AN 13A
G
N87--
:3006--46
BRAZIER HEAD TAF'TTTE SCRE
W
X`) ~'-- 1 150--0O
Al UNIT T ASSY
KENWOOD CORPORATIO
N
Shionogi Shibuya Building
. 17-5, 2-chome Shibuya
. Shibuya-ku
. Tokyo 150
. Japa
n
KENWOOD U
.S
.A
. CORPORATIO
N
COMMUNICATIONS & TEST EQUIPMENT GROU
P
P
.O BOX 22745, 2201 East Dominguez St
. Long Beach, CA 90801-5745 U S
A
KENWOOD ELECTRONICS DEUTSCHLAND GMB
H
Rembri cker Str
. 15
. 6056 Heusenstamm West German
y
KENWOOD ELECTRONICS BENELUX N
.V
.
Mechelsesteenweg 418 B-1930 Zavenlem Belgiu
m
TRIO-KENWOOD FRANCE S
.A
.
13
. Boulevard Ney 75018 Parr
. Franc
e
KENWOOD LINEAR S
.P
.A
.
20125, Milano-via Arse, 50 Ital
y
KENWOOD ELECTRONICS AUSTRALIA PTY
. LTD
.
(INCORPORATED IN N
.S V
V
4E
. Woodcock Place
. Lane Cove N S W 2066 Australi
a
KENWOOD & LEE ELECTRONICS, LTD
.
Wang Kee Building. 51h Floor 24-37_ Connaught Road
. Central
. Bond
Kolii
u
KENWOOD ELECTRONICS CANADA INC
.
P O BOX 1075 959 Gana Court Mississauga
. Ontario_ Canada L 4T 4C
2
© 1986-2/1986-9/1986-12/1987-2/1987-7/1987-10/1988-5/1988-9/1989-2/1990-5 PRINTED IN JAPAN B51-1919-00 IT) 120
0