Sf8_pcr_mb_0629_1600 HUAWEI U8850 SF8 Main Board Schematic
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5 4 3 1 Revision History and Current Revision : FIH CONFIDENTIAL D 2 Revision MODEL NAME : SF4H8 Board Number : FILE NAME : Main Board Description Of Changes Date (M-D-Y) Phase PR1 A10 BOM cost estimate 08-04-2010 A11 Schematic Update 11-19-2010 PR1 A12 BOM LOCK DOWN 11-25-2010 PR1 A20 BOM LOCK DOWN 12-03-2010 PR1.5 B10 Schematic Update 02-11-2011 PR2 B11 BOM LOCK DOWN 03-17-2011 PR2 B20 Schematic Update 03-17-2011 PR2.5 D Page Description C B 01 Index & History 02 System Block 03 Power Block 04 CPU MSM8255-1_Memory & SDIO 05 CPU MSM8255-1_RF & WCA & Ctr 06 CPU MSM8255-1_PERIPHERAL 07 CPU MSM8255-1_POWER1 08 CPU MSM8255-1_POWER2 09 CPU MSM8255-1_GND 10 eMMC 11 Sensor & USIM 12 USB & JTAG & CLK & BID 13 B2B A01 Audio_Internal_Portion A02 Audio_External_Portion A03 Audio_CODEC C01_Flash Driver L01_Display_4.08"_LCM P01_SMPS/LDO P02_Charger P03_Control/MPP/GPIO W01_PRIMARY_ASM(SKY) W03_TX_CHAIN_BC1(Skyworks) W04_TX_CHAIN_BC11(Mitsubishi) W06_GSM_TX_QUAD_BAND_PA W07_RX_MATCHING / GPS W08_QTR8601 W09_QTR8601_PWR W10_QTR8601_WCA W11_WLAN/BT/FM_USI(WM-BN-BM-02) W12_Antenna Page Z01_Changed list C B A A Title Size C Date: 5 4 3 2 Index & History Document Number Thursday, June 16, 2011 Rev SF4H8 Sheet 1 PR3 1 of 32 5 4 3 2 1 D D C C B B A A Title Size B Date: 5 4 3 2 System Block Document Number Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 2 of 32 5 4 3 2 1 D D C C B B A A Title Size B Date: 5 4 3 2 Power Block Document Number Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 3 of 32 5 4 3 2 1 D D MSM-8255-1-904PNSP-TR-01 U401A EBI0 AJ26 R401 240/+-1% EBI2 VREG_L8_V1P8 VREG_S3_V1P8 R402 2.2K/+-5% R404 2.2K/+-5% C U5 U2 C3 Y2 U1 [13] ALPS_INT_N W1 AB6 Y5 AA3 VDD_P2, 1.8V W W NAND_CS0_N AB3 AE2 AD2 AD1 AE3 AC5 AC3 GPIO38/ SDC1_CLK GPIO39/ SDC1_CMD GPIO40/ SDC1_DATA3 GPIO41/ SDC1_DATA2 GPIO42/ SDC1_DATA1 GPIO43/ SDC1_DATA0 VDD_P2, 1.8V W EBI2_CLK EBI2_BUSY0_N EBI2_ASYNC_WAIT_N/ GPIO180 EBI2_ADV_N EBI2_WAIT_N EBI2_WE_N EBI2_OE_N EBI2_UB_N/ EBI2_NAND_CLE EBI2_LB_N/ EBI2_NAND_ALE AE29 EBI1_CAL SDC2 GPIO64/ SDC2_CLK GPIO65/ SDC2_CMD W GPIO112/ SDC2_DATA7 W GPIO113/ SDC2_DATA6 W GPIO114/ SDC2_DATA5 GPIO115/ EBI2_BUSY1_A_N/SDC2_DATA4 W GPIO66/ SDC2_DATA3 GPIO67/ SDC2_DATA2 W GPIO68/ SDC2_DATA1 GPIO69/ SDC2_DATA0 R403 240/+-1%_NM 靠靠cpu pin 20mm之之 VDD_P2, 1.8V SDC1 EBI2_AD_15 EBI2_AD_14 EBI2_AD_13 EBI2_AD_12 EBI2_AD_11 EBI2_AD_10 EBI2_AD_9 EBI2_AD_8 EBI2_AD_7 EBI2_AD_6 EBI2_AD_5 EBI2_AD_4 EBI2_AD_3 EBI2_AD_2 EBI2_AD_1 EBI2_AD_0 1 1 TP401 EBI1_CAL EBI0_CAL 靠靠cpu pin 20mm之之 AA5 W3 AB5 W5 T2 T3 T5 R6 W2 V3 Y3 V5 W6 U6 R5 P5 EBI1 AJ7 AJ8 AM4 AH8 AJ6 AL4 TP_INT_N AL8 AH10 AN4 AL6 AM6 AL5 AJ9 AN6 AM7 AJ10 eMMC_SDC2_CLK eMMC_SDC2_CMD eMMC_SDC2_DAT7 eMMC_SDC2_DAT6 eMMC_SDC2_DAT5 eMMC_SDC2_DAT4 eMMC_SDC2_DAT3 eMMC_SDC2_DAT2 eMMC_SDC2_DAT1 eMMC_SDC2_DAT0 [13] [10] [10] [10] [10] [10] [10] [10] [10] [10] [10] C W VDD_P2, 1.8V SDC3 W W GPIO110/ SDC3_CLK W GPIO111/ SDC3_CMD GPIO116/EBI2_BUSY1_B_N/ SDC3_DATA3 GPIO117/ SDC3_DATA2 W GPIO118/ SDC3_DATA1 GPIO119/ SDC3_DATA0 EBI2_CS0_N EBI2_CS1_N/ GPIO86 EBI2_CS2_N/ SPI_CS2_N/ UART2DM_TXD_B/ GPIO87 EBI2_CS3_N/ GPIO88 EBI2_CS5_N/ SPI_CS3_N/ GPIO89 EBI2_CS6_N EBI2_CS7_N/ UART2DM_RXD_B/ GPIO85 VDD_SD, 2.85V W W C8 C10 A8 A9 C9 B8 WLAN_SDIO_CLK_R ER401 0/+-5% WLAN_SDIO_CLK [30] WLAN_SDIO_CMD [30] WLAN_SDIO_DATA3 [30] WLAN_SDIO_DATA2 [30] WLAN_SDIO_DATA1 [30] WLAN_SDIO_DATA0 [30] SDC4 GPIO58/ SDC4_CLK GPIO59/ SDC4_CMD GPIO60/ SDC4_DATA3 GPIO61/ SDC4_DATA2 GPIO62/ SDC4_DATA1 GPIO63/ SDC4_DATA0 AL2 AK3 AJ3 AL1 AK1 AL3 uSD_SDC4_CLK [13] uSD_SDC4_CMD [13] uSD_SDC4_DAT3 [13] uSD_SDC4_DAT2 [13] uSD_SDC4_DAT1 [13] uSD_SDC4_DAT0 [13] B B A A Title Size A2 5 4 3 2 Date: CPU MSM8255-1_Memory & SDIO Document Number Rev Thursday, June 16, 2011 1 SF4H8 Sheet PR3 4 of 32 5 4 3 2 MSM-8255-1-904PNSP-TR-01 TP501 1 PON_RST_N 1 [10] RST_OUT_V1P8 1 TP502 U401E Resets & Modes VDD_P2, 1.8V [21] D 1 MODE1 C11 AD5 RESIN_N RESOUT_1P8_N E27 E28 A28 B28 MODE3 MODE2 MODE1 MODE0 1 VDD_P2, 1.8V JTAG TDO TDI TMS TCK RTCK TRST_N SRST_N AL11 AN9 AM9 AN10 AF6 AE5 AF5 JTDO JTDI JTMS JTCK JRTCK JTRST_N SRST_N [12] [12] [12] [12] [12] [12] [12] D VREG_S3_V1P8 PAD501 Clock & Control MODE0 LPA_XTAL_IN LPA_XTAL_OUT X501 4 GND 1 1 [21] PM_IRQ_MDM_N R502_NM [21] PM_IRQ_APC_N 1M/+-5%[21] PM_IRQ_SROT_N 2 GND PS_HOLD_RAH15 10K/+-5% R501 [12,21] PS_HOLD 3 3 AH18 AJ18 A13 AN26 AN27 [6,20] XO_OUT_D1 [20] TCXO_EN SLEEP_CLK0_BUFF_P 24.576M VDD_P2, 1.8V VDD_P2, 1.8V PS_HOLD/ GPIO29 B15 F14 D3 PM_IRQ_MDM_N/ GPIO28 W PM_IRQ_APC_N/ GPIO27 W PM_IRQ_SROT_N/ GPIO179 W J32 H32 J33 H33 K31 I_IP_CH0 I_IM_CH0 Q_IP_CH0 Q_IM_CH0 PRX_CLK P2 K32 L32 L33 K33 M31 N31 R31 P31 P33 D1 Y32 W32 W31 I_IP_CH1 I_IM_CH1 Q_IP_CH1 Q_IM_CH1 GNSS_BB_I1 GNSS_BB_I2 GNSS_BB_Q1 GNSS_BB_Q2 GNSS_DRX_CLK P2 GNSS_PPS_IN/ GNSS_PPS_OUT/ GPIO181 GNSS_CLK_IN/ GNSS_CLK_OUT/ GPIO148 GNSS_BBI/ GPIO149 P2 GNSS_BBQ/ GPIO150 P2 SSBI GPIO143/ SSBI_4_MODEM GPIO133/ SSBI_3_MODEM GPIO158/ SSBI_1_MODEM GPIO159/ SSBI_0_MODEM AE31 AE1 Y29 AD31 MSM_QTR_SSBI2 [27] MSM_QTR_SSBI1 [27] GPIO31/ SSBI_SEL/ SSBI_MPROC MPM_GPIO2/ SSBI_PMIC AD3 AL19 SSBI_PMIC W33 V33 T33 U33 V32 MSM_QTR_TXBBIP [27] MSM_QTR_TXBBIM [27] MSM_QTR_TXBBQP [27] MSM_QTR_TXBBQM [27] MSM_QTR_DAC_IREF [27] TCXO TCXO_EN/ MPM_GPIO1 SLEEP_CLK LPA_XTAL_IN LPA_XTAL_OUT [21] C502 C501 18pF 18pF RX [27] [27] [27] [27] C 24.576Mhz Crystal [27] [27] [27] [27] MSM_QTR_PRXBBIP MSM_QTR_PRXBBIM MSM_QTR_PRXBBQP MSM_QTR_PRXBBQM MSM_QTR_GPSBBI MSM_QTR_GPSBBI2 MSM_QTR_GPSBBQ MSM_QTR_GPSBBQ2 GRFC VREG_S3_V1P8 [22] [22] ANT_SEL0 ANT_SEL1 [22] [22] ANT_SEL2 ANT_SEL3 B [13] EXT_GPS_LNA_SEL VREG_S3_V1P8 U501 [20] SLEEP_CLK0_BUFF NC VCC 2 A 3 GND NC 5 Y 4 [30] BT_IRQ VDD_P2, 1.8V AK32 AF29 AG28 WC_RESET_N WC_I2C_SCL WC_I2C_SDA AF28 AH29 AK33 WCT_PENIRQ_N WCT_EOC WCT_SSBI AM30 AC31 C7 GPIO83/ TRK_LO_ADJ AH7 Y31 AA31 Y33 MSM_PA_R1 MSM_PA_R0 GPIO152/ SSBI_4_MODEM_OE/ GSM_TX_CLK GPIO153/ SSBI_3_MODEM_OE/ GSM_TX_LB_CLK GPIO154/ SSBI_MPROC_OE/ GSM_PH_D2 GPIO155/ SSBI_1_MODEM_OE/ GSM_PH_D1 GPIO156/ SSBI_0_MODEM_OE/ GSM_PH_D0 AB31 AD33 AD32 AD29 AC32 QTR_GP_CLK [27] QTR_GPRSYNC [27] QTR_GPDATA2 [27] QTR_GPDATA1 [27] QTR_GPDATA0 [27] GPIO151/ JAM_DET_IRQ AB29 [23,24,25,27] [23,24,25,27] B JAM_DET [27] I2S WCA_RX_I2S_CLK WCA_RX_I2S_DATA WCA_RX_I2S_WS AH28 AH31 AJ31 AUD_RX_I2S_SCK [16] AUD_RX_I2S_SD [16] AUD_RX_I2S_W S [16] WCA_TX_I2S_CLK WCA_TX_I2S_DATA WCA_TX_I2S_WS AG31 AL32 AK31 AUD_TX_I2S_SCK [16] AUD_TX_I2S_SD [16] AUD_TX_I2S_W S [16] WCA_MCLK1 WCA_MCLK2 AL33 AG29 AUD_MCLK1 AUD_MCLK2 A7 C6 C5 B5 VREG_CAM_V2P8_EN [21] [16] [16] mI2S GPIO120/ WCA_MCLK_A GPIO121/ WCA_DATA_SD0_A GPIO122/ WCA_DATA_SD1_A GPIO123/ WCA_DATA_SD2_A 0/+-5%_NM MSM_QTR_RF_ON [27] GPIO32/ PA_ON0 PA_RANGE1 PA_RANGE0 VDD_P2, 1.8V W T32 U32 TX_ON GPIO84/ TX_AGC_ADJ VDD_P2, 1.8V WCF_I2S_WS/ GPIO144 WCF_I2S_CLK/ GPIO145 W WCF_I2S_DATA/ GPIO146 FM_IRQ/ GPIO147 VDD_P2, 1.8V VDD_SD, 2.85V GRFC14/ RX_ON/ GPIO157 GRFC9/ ANT_SEL0/ GSM_PA_BAND_SEL/ GPIO72 GRFC8/ ANT_SEL1/ GPIO73 GRFC7/ ANT_SEL2/ PA_RANGE0/ GPIO74 GRFC6/ ANT_SEL3/ PA_RANGE1/ GPIO75 GRFC5/ DRX_MODE_SEL0/ GPIO76 GRFC4/ DRX_MODE_SEL1/ GPIO77 GRFC3/ DRX_MODE_SEL2/ GPIO78 GRFC2/ GPIO79 GRFC1/ GSM_PA_EN/ GPIO80 GRFC0/ GPIO81 AJ29 AN30 AJ27 SLEEP_CLK0_BUFF_P NC7SP04L6X R503 P2 P2 6 [30] BT_RST_N [30] W LAN_IRQ [30] W LAN_RST_N C Control PA_DAC_OUT PA_DAC_REF WCA VDD_P2, 1.8V [29] QTR_SYS_RST_N [29] W CA_I2C_SCL [29] W CA_I2C_SDA 1 I_OUT_P I_OUT_N Q_OUT_P Q_OUT_N TX_DAC_REF AC29 C22 C23 A24 A25 C24 B26 C25 C27 B27 C26 R504 R505 2.2K/+-5%2.2K/+-5% TX RF CONTROL IF VREG_S3_V1P8 A A U502 1 NC VCC 2 A 3 GND 6 NC 5 Y 4 SLEEP_CLK [30] NC7SP04L6X R506 5 Title Size A3 0/+-5%_NM 4 3 2 Date: CPU MSM8255-1_RF & WCA & Ctr Document Number Rev SF4H8 Sheet W ednesday, June 29, 2011 1 PR3 5 of 32 5 4 3 2 MSM-8255-1-904PNSP-TR-01 AM20 AM21 AN20 AN21 AL20 AL21 U401D VDD_MDDI, 1.8V MDDI 1 VDD_MDDI, 1.8V MDDI_P_DATA0_P MDDI_P_DATA0_N MDDI_P_DATA1_P MDDI_P_DATA1_N MDDI_P_STB_P MDDI_P_STB_N MIPI MDDI_HC_DATA0_P/ MIPI_CSI_CLKP MDDI_HC_DATA0_N/ MIPI_CSI_CLKN MDDI_HC_DATA1_P/ MIPI_CSI_DP1 MDDI_HC_DATA1_N/ MIPI_CSI_DN1 MDDI_HC_STB_P/ MIPI_CSI_DP0 MDDI_HC_STB_N/ MIPI_CSI_DN0 AM22 AM23 AN22 AN23 AL22 AL23 D D [18] LCM_PW M LCDC_GRN_5 LCDC_GRN_4 LCDC_GRN_3 LCDC_GRN_2 LCDC_GRN_1 LCDC_GRN_0 AJ17 AJ15 AL14 AH13 AJ13 AN11 AL15 AM14 LCDC_GRN_7/ GPIO99 LCDC_GRN_6/ GPIO98 LCDC_GRN_5/ GRFC11/ GPIO97 LCDC_GRN_4/ GRFC12/ GPIO96 LCDC_GRN_3/ GRFC13/ GPIO95 LCDC_GRN_2/ EBI2_CS4_N/ GPIO94 LCDC_GRN_1/ GPIO19 LCDC_GRN_0/ GPIO18 W LCDC_BLU_7/ WCA_DATA_SD0_B/ GPIO104 LCDC_BLU_6/ WCA_MCLK_B/ GPIO103 LCDC_BLU_5/ GPIO102 LCDC_BLU_4/ GPIO101 LCDC_BLU_3/ GPIO100 LCDC_BLU_2/ GPIO22 LCDC_BLU_1/ GPIO21 LCDC_BLU_0/ GPIO20 W C LCDC_EN/ GPIO91 LCDC_PCLK/ GPIO90 LCDC_VSYNC/ GPIO92 LCDC_HSYNC/ GPIO93 [18] [18] [18] [18] [18] [18] LCDC_BLU_5 LCDC_BLU_4 LCDC_BLU_3 LCDC_BLU_2 LCDC_BLU_1 LCDC_BLU_0 E18 E24 E25 E22 E20 AN15 AM15 AH16 [18] [18] [18] [18] LCDC_ENABLE LCDC_PCLK LCDC_VSYNC LCDC_HSYNC AM10 E19 AJ14 F20 [18] LCM_ID [17] CAM_TORCH_EN [13] SD_POW ER_EN [13] CAM_VGA_PW DN [13] CAM_RST_N [13] MODULE_ID [30] BT_W AKEUP [30] W LAN_W AKEUP [30] W LAN_BT_REG_ON VREG_S3_V1P8 E5 C4 F5 F3 E3 G3 G5 G2 DTV_DATA_23/ EBI2_ADR0/ GPIO178 DTV_DATA_22/ EBI2_ADR1/ GPIO177 DTV_DATA_21/ EBI2_ADR2/ GPIO176 DTV_DATA_20/ EBI2_ADR3/ GPIO175 DTV_DATA_19/ EBI2_ADR4/ GPIO174 DTV_DATA_18/ EBI2_ADR5/ GPIO173 DTV_DATA_17/ EBI2_ADR6/ GPIO172 DTV_DATA_16/ EBI2_ADR7/ GPIO171 H5 H3 G1 J5 J2 J3 J1 K5 DTV_DATA_15/ EBI2_ADR8/ GPIO170 DTV_DATA_14/ EBI2_ADR9/ GPIO169 DTV_DATA_13/ EBI2_ADR10/ GPIO168 DTV_DATA_12/ EBI2_ADR11/ GPIO167 DTV_DATA_11/ EBI2_ADR12/ GPIO166 DTV_DATA_10/ EBI2_ADR13/ GPIO165 DTV_DATA_9/ EBI2_ADR14/ GPIO164 DTV_DATA_8/ EBI2_ADR15/ GPIO163 B When switch is linked. Default 1. R607 SROT_SELECT Disable 2. R606 WDOG_DISABLE Enable 3. R608 BOOT_SCUR Disable 4. R609 PBUS_ARCH_SEL Layers R607 R606 10K/+-5%_NM 10K/+-5%_NM R608 R609 10K/+-5%_NM 10K/+-5%_NM K3 L5 L3 M5 N3 M3 M2 M1 DTV_DATA_7/ GPIO162 DTV_DATA_6/ SROT_SELECT/ GPIO161 DTV_DATA_5/ WDOG_DISABLE/ GPIO160 DTV_DATA_4/ BOOT_FROM_NOR/ GPIO132 DTV_DATA_3/ BOOT_SCUR/ GPIO131 DTV_DATA_2/ PBUS_ARCH_SEL/ GPIO130 DTV_DATA_1/ GPIO129 DTV_DATA_0/ GPIO128 P1 N5 P2 P3 DTV_EN/ GPIO125 DTV_PCLK/ GPIO124 DTV_VSYNC/ GPIO126 DTV_HSYNC/ GPIO127 [18] LCM_RST_N [14] AL16 AM16 AL17 AL18 SPK_EN A17 A15 C20 C16 C19 B16 C13 B17 E15 E16 A14 C14 CAM_DATA11 [13] CAM_DATA10 [13] CAM_DATA9 [13] CAM_DATA8 [13] CAM_DATA7 [13] CAM_DATA6 [13] CAM_DATA5 [13] CAM_DATA4 [13] CAM_FLASH_EN [17] CAM_5M_PW DN [13] VDD_P2, 1.8V [13] [13] [13] [13] USB_VBUS_CONN VREG_L6_V3P3 1 4 G USB_VBUS_MSM F29 F32 D33 E33 F33USBPHY_REXT R601 E32 4.02K/+-1% USB_VBUS_MSM AO5404EL USBH_ID [12] XO_OUT_D1 [5,20] USBH_DP [12] USBH_DM [12] VDD_P2, 1.8V C QTR_BT_PCM_BCLK [30] QTR_BT_PCM_SYNC [30] QTR_BT_PCM_DOUT [30] QTR_BT_PCM_DIN [30] VREG_S3_V1P8 SPI GPIO45/ SPI_CLK GPIO47/ SPI_MOSI_DATA GPIO48/ SPI_MISO_DATA W GPIO44/ SPI_CS1_N W GPIO46/ SPI_CS0_N VDD_P2, 1.8V A30 B29 B30 A29 AL9 AH12 AJ12 AJ11 AL10 SPI_CLK [18] SPI_MOSI_DATA [18] SPI_CS_N [18] PTT_DET [13] R602 2.2K/+-5% R603 2.2K/+-5% QUP/ I2C GPIO16/ CAM_FLASH/ QUP_B[0] GPIO17/ CAM_SHTR/ QUP_B[1] VDD_SD, 2.85V CAM_I2C_SCL [13] CAM_I2C_SDA [13] C17 E14 VREG_L8_V1P8 I2C B GPIO70/ I2C_SCL GPIO71/ I2C_SDA VDD_P2, 1.8V W W W VDD_P2, 1.8V TSIF_EN/ GPIO35 TSIF_CLK/ GPIO34 TSIF_SYNC/ GPIO37 TSIF_DATA/ GPIO36 W AH2 AL7 AJ1 UIM2_M_CLK [21] UIM2_M_RST [21] UIM2_M_DATA [21] I2C_SCL I2C_SDA 3 [11,13,20] [11,13,20] AE33 AF31 AH27 AE32 QTR_BT_UART_RXD QTR_BT_UART_TXD QTR_BT_UART_RTS QTR_BT_UART_CTS [30] [30] [30] [30] UART2 GPIO51/ UART2_RXD GPIO52/ UART2_TXD GPIO49/ UART2_RFR_N GPIO50/ UART2_CTS_N VDD_P2, 1.8V R605 2.2K/+-5% UART1DM GPIO136/ UART1DM_RXD GPIO137/ UART1DM_TXD GPIO134/ UART1DM_RFR_N GPIO135/ UART1DM_CTS_N VDD_P2, 1.8V R604 2.2K/+-5% UIM2 GPIO57/ UIM2_CLK GPIO53/ UIM2_RESET GPIO54/ UIM2_DATA VDD_P2, 1.8V AJ5 AH6 AH1 AG2 AG5 AG3 UART2_RXD UART2_TXD [12] [12] GPIO HEADSET_DET_N/GPIO26 AG6 MDP_VSYNC_1/ GPIO30 AL12 GPIO33 AA29 UART3_CTS_N/ GPIO55 AH3 UICC_DM/ GPIO56 AH5 GPIO82 C28 W GPIO_142 AG33 A HS_DETECT_N [13] PA_HEADSET_EN [15] TP_RST_N [13] ECOM_RST_N [11] GS_INT [11] Title Size A3 5 Q601 AUX PCM / I2S GPIO141/ I2S_CLK/ AUX_PCM_CLK GPIO140/ I2S_WS/ AUX_PCM_SYNC GPIO139/ I2S_MCLK/ AUX_PCM_DIN GPIO138/ I2S_DATA/ AUX_PCM_DOUT SVIDEO1_OUT SVIDEO2_OUT SVIDEO_RBIAS TSIF A GPIO11/ CAM_DATA11 GPIO10/ CAM_DATA10 GPIO9/ CAM_DATA9 GPIO8/ CAM_DATA8 GPIO7/ CAM_DATA7 GPIO6/ CAM_DATA6 GPIO5/ CAM_DATA5 GPIO4/ CAM_DATA4 GPIO3/ CAM_DATA3 GPIO2/ CAM_DATA2 GPIO1/ QUP_A[1]/ CAM_DATA1 GPIO0/ QUP_A[0]/ CAM_DATA0 USBPHY_VBUS USBPHY_ID USBPHY_SYSCLK USBPHY_DP USBPHY_DN USBPHY_REXT TV_OUT M28 R28 N28 CAM_MCLK CAM_PCLK CAM_VSYNC CAM_HSYNC USBPHY, 1.8V HS-USB VDD_P2, 1.8V HDMI C18 C15 A16 E17 3 [18] [18] [18] [18] [18] [18] GPIO15/ CAM_MCLK GPIO12/ CAM_PCLK GPIO14/ CAM_VSYNC GPIO13/ CAM_HSYNC D LCDC_RED_7/ WCA_DATA_SD2_B/ GPIO109 LCDC_RED_6/ WCA_DATA_SD1_B/ GPIO108 LCDC_RED_5/ GPIO107 LCDC_RED_4/ GPIO106 LCDC_RED_3/ GPIO105 LCDC_RED_2/ GPIO25 LCDC_RED_1/ GPIO24 LCDC_RED_0/ GPIO23 S E26 F26 F25 E23 E21 AJ16 AL13 AH17 CAM 2 LCDC_RED_5 LCDC_RED_4 LCDC_RED_3 LCDC_RED_2 LCDC_RED_1 LCDC_RED_0 [18] [18] [18] [18] [18] [18] VDD_P2, 1.8V VDD_P2, 1.8V LCDC 2 Date: CPU MSM8255-1_PERIPHERAL Document Number Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 6 of 32 5 4 MSM-8255-1-904PNSP-TR-01 VREG_S0_V1P2 C701 22uF D C702 0.47uF C705 0.47uF C703 0.47uF C706 0.47uF C707 0.47uF C704 0.47uF C708 0.47uF C C742 0.47uF C743 0.47uF B C744 0.47uF 3 U401F VDD_C1_0 VDD_C1_1 VDD_C1_2 VDD_C1_3 VDD_C1_4 VDD_C1_5 VDD_C1_6 VDD_C1_7 VDD_C1_8 VDD_C1_9 VDD_C1_10 VDD_C1_11 VDD_C1_12 VDD_C1_13 VDD_C1_14 VDD_C1_15 VDD_C1_16 VDD_C1_17 VDD_C1_18 VDD_C1_19 VDD_C1_20 VDD_C1_21 VDD_C1_22 VDD_C1_23 VDD_C1_24 VDD_C1_25 VDD_C1_26 VDD_C1_27 VDD_C1_28 VDD_C1_29 VDD_C1_30 VDD_C1_31 VDD_C1_32 VDD_C1_33 VDD_C1_34 VDD_C1_35 VDD_C1_36 VDD_C1_37 VDD_C1_38 VDD_C1_39 VDD_C1_40 VDD_C1_41 VDD_C1_42 VDD_C1_43 VDD_C1_44 VDD_C1_45 VDD_C1_46 VDD_C1_47 VDD_C1_48 VDD_C1_49 VDD_C1_50 VDD_C1_51 VDD_C1_52 VDD_C1_53 VDD_C1_54 VDD_C1_55 VDD_C1_56 VDD_C1_57 VDD_C1_58 VDD_C1_59 VDD_C1_60 VDD_C1_61 VDD_C1_62 VDD_C1_63 VDD_C1_64 VDD_C1_65 VDD_C1_66 VDD_C1_67 VDD_C1_68 VDD_C1_69 VDD_C1_70 VDD_C1_71 VDD_C1_72 VDD_C1_73 VDD_C1_74 VDD_C1_75 VDD_C1_76 VDD_C1_77 VDD_C1_78 VDD_C1_79 AM8 VDD_SNS_C1 VDD_C1_80 VDD_C1_81 VDD_C1_82 VDD_C1_83 VDD_C1_84 VDD_C1_85 VDD_C1_86 VDD_C1_87 VDD_C1_88 VDD_C1_89 VDD_C1_90 VDD_C1_91 VDD_C1_92 VDD_C1_93 VDD_C1_94 VDD_C1_95 VDD_C1_96 VDD_C1_97 VDD_C1_98 VDD_C1_99 VDD_C1_100 VDD_C1_101 VDD_C1_102 VDD_C1_103 VDD_C1_104 VDD_C1_105 VDD_C1_106 VDD_C1_107 VDD_C1_108 VDD_C1_109 VDD_C1_110 VDD_C1_111 VDD_C1_112 VDD_C1_113 VDD_C1_114 VDD_C1_115 VDD_C1_116 VDD_C1_117 VDD_C1_118 VDD_C1_119 VDD_C1_120 VDD_C1_121 VDD_C1_122 VDD_C1_123 VDD_C1_124 VDD_C1_125 VDD_C1_126 VDD_C1_127 VDD_C1_128 VDD_C1_129 VDD_C1_130 VDD_C1_131 VDD_C1_132 VDD_C1_133 VDD_C1_134 VDD_C1_135 VDD_C1_136 VDD_C1_137 VDD_C1_138 VDD_C1_139 VDD_C1_140 VDD_C1_141 VDD_C1_142 VDD_C1_143 VDD_C1_144 VDD_C1_145 VDD_C1_146 VDD_C1_147 VDD_C1_148 VDD_C1_149 VDD_C1_150 VDD_C1_151 VDD_C1_152 VDD_C1_153 VDD_C1_154 VDD_C1_155 VDD_C1_156 VDD_C1_157 VDD_C1_158 1.1V T11 T14 T15 T18 T19 T22 T23 U9 U10 U13 U14 U18 U21 U22 V8 V9 V10 V13 V14 V17 V18 V21 V22 V25 V26 W8 W10 W11 W14 W15 W18 W19 W20 Y10 Y11 Y14 Y15 Y18 Y19 Y20 AA9 AA10 AA13 AA14 AA26 AB8 AB9 AB10 AB13 AB14 AB26 AC8 AC10 AC11 AC14 AC15 AC20 AC26 AD10 AD11 AD14 AD15 AD20 AD26 AE9 AE10 AE13 AE14 AF9 AF10 AF13 AF14 AF17 AF18 AF21 AF22 AH22 N10 U17 1 MSM-8255-1-904PNSP-TR-01 VREG_S0_V1P2 VREG_S1_V1P2 VDD_C1 H10 H11 H14 J22 H15 H18 H19 H22 H23 H25 H26 J9 J10 J13 J14 J17 J18 J21 J25 J26 K8 K9 K10 K13 K14 K17 K18 K21 K22 L8 L10 L11 L14 L15 L18 L19 L22 L23 L25 L26 M10 M11 M14 M15 M18 M19 M22 M23 M25 M26 N9 N13 N14 N17 N18 N21 N22 P8 P9 P10 P13 P14 P17 P18 P21 P22 P25 P26 R8 R10 R11 R14 R15 R18 R19 R22 R23 R25 R26 T10 2 U401B VDD_C2 C709 22uF W23 W24 Y23 Y24 AA21 AA22 AA23 AA24 AB21 AB22 AB23 AB24 AC23 AC24 C710 22uF VREG_S1_V1P2 1.1V VDD_C2_0 VDD_C2_1 VDD_C2_2 VDD_C2_3 VDD_C2_4 VDD_C2_5 VDD_C2_6 VDD_C2_7 VDD_C2_8 VDD_C2_9 VDD_C2_10 VDD_C2_11 VDD_C2_12 VDD_C2_13 VDD_C2_14 VDD_C2_15 VDD_C2_16 VDD_C2_17 VDD_C2_18 VDD_C2_19 VDD_C2_20 VDD_C2_21 VDD_C2_22 VDD_C2_23 VDD_C2_24 VDD_C2_25 VDD_C2_26 AD23 AD24 AE21 AE22 AE23 AE24 AF23 AF24 AH24 AJ24 AL24 AM24 AN24 C722 4.7uF C727 0.47uF C723 4.7uF C728 0.47uF C724 4.7uF C729 0.47uF C725 4.7uF C726 D 4.7uF C745 C746 0.47uF 0.47uF VREG_L17_V1P8 V28 VDD_SNS_C2 T28 VDD_QFUSE_PRG 1.8V VDD_QFUSE C711 0.47uF_NM VREG_L5_V2P85 VREG_S2_V1P3 1.3V VDD_A1 VDD_SD 2.85V C712 0.47uF C713 0.47uF_NM AH11 VREG_L7_V1P8 C714 0.47uF AJ23 C715 0.47uF C716 1uF C717 0.47uF C718 0.47uF_NM E31 M29 C730 0.47uF VREG_L9_V2P05 2.05V VDD_A2 VDD_A2_0 VDD_A2_1 VDD_A2_2 VDD_A2_3 VDD_SD VREG_S3_V1P8 VDD_MDDI VDD_A1 1.8V H29 J29 U31 V31 C731 0.47uF C732 0.47uF C733 C734 0.47uF_NM 0.47uF_NM VREG_L9_V2P05 VDD_MDDI C 2.05V VDDA_SVIDEO VDDA_SVIDEO_0 VDDA_SVIDEO_1 USBPHY 1.8V L28 P28 C735 C736 0.47uF_NM 0.47uF_NM VDD_USBPHY_1P8 VREG_L21_V1P1 VREG_L6_V3P3 USBPHY 3.3V E29 C719 0.47uF C720 0.47uF_NM VREG_S3_V1P8 AB19 1.1V VDD_MPLL_0 VDD_MPLL_1 VDD_MPLL_2 VDD_MPLL_3 VDD_MPLL_4 VDD_MPLL_5 VDD_MPLL_6 VDD_USBPHY_3P3 VDD_PLL_GP VDD_MPLL 1.8V VDD_PLL_GP AA17 AB17 AD17 AD18 AE17 AE18 AL27 C737 0.47uF C738 0.47uF C740 C741 C739 0.47uF_NM 0.47uF_NM 0.47uF C721 0.47uF B A A Title Size A3 Date: 5 4 3 2 CPU MSM8255-1_POWER1 Document Number Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 7 of 32 5 4 3 2 1 D D MSM-8255-1-904PNSP-TR-01 VREG_S3_V1P8 C801 22uF C802 4.7uF_NM C803 0.47uF_NM C804 0.47uF_NM A22 A23 A31 M32 AJ19 AM28 AN12 B3 C32 N32 AM13 AM19 AM29 VDD_DDR_0 VDD_DDR_1 VDD_DDR_2 VDD_DDR_3 VDD_DDR_4 VDD_DDR_5 VDD_DDR_6 VDD_DDR_7 VDD_DDR_8 VDD_DDR_9 VDD_DDR_10 VDD_DDR_11 VDD_DDR_12 A5 A11 A19 A27 B9 B14 B23 D32 G31 M33 VDDQ_DDR_0 VDDQ_DDR_1 VDDQ_DDR_2 VDDQ_DDR_3 VDDQ_DDR_4 VDDQ_DDR_5 VDDQ_DDR_6 VDDQ_DDR_7 VDDQ_DDR_8 VDDQ_DDR_9 VREG_S3_V1P8 C805 0.47uF_NM C C806 0.47uF_NM VDD_DDR VDDQ_DDR VDD_VCCF C1 N2 AB2 AJ2 AC2 AM3 U401G 1.8V 1.8V / 1.2V VDD_P0_0 VDD_P0_1 VDD_P0_2 VDD_P0_3 VDD_P0_4 VDD_P0_5 VDD_P0_6 VDD_P0_7 1.8V 1.8V / 1.2V 1.8V VDD_VCCF VDD_VCCF VDD_VCCF VDD_VCCF VDD_VCCF VDD_VCCF C807 0.47uF_NM C809 10uF C808 0.47uF M6 P6 T6 AA6 AA28 AC6 AC28 AE6 C VREG_S3_V1P8 VDD_P2 VDD_P2_0 VDD_P2_1 VDD_P2_2 VDD_P2_3 VDD_P2_4 VDD_P2_5 VDD_P2_6 VDD_P2_7 VDD_P2_8 VDD_P2_9 VDD_P2_10 VDD_P2_11 VDD_P2_12 VDD_P2_13 VDD_P2_14 VDD_P2_15 VDD_P2_16 VDD_P2_17 VDD_P2_18 VDD_P2_19 VDD_P2_20 VDD_P2_21 B F11 F13 F15 F19 F21 F23 AH23 AH26 VDD_P1 VDD_P1_0 VDD_P1_1 VDD_P1_2 VDD_P1_3 VDD_P1_4 VDD_P1_5 VDD_P1_6 VDD_P1_7 1.8V VREG_S3_V1P8 VDD_P0 F7 F9 F16 F18 F24 H6 L6 P29 U28 U29 V6 Y6 Y28 AE28 AH9 AH14 AH19 AH21 H2 L1 T1 U3 C810 0.47uF C812 0.47uF C811 0.47uF B A A Title Size A3 Date: 5 4 3 2 CPU MSM8255-1_POWER2 Document Number Thursday, June 16, 2011 Rev SF4H8 Sheet 1 PR3 8 of 32 5 4 MSM-8255-1-904PNSP-TR-01 3 MSM-8255-1-904PNSP-TR-01 U401C 2 1 U401H D D U16 U19 U20 U23 U24 U25 U26 V1 V11 V12 V15 V16 V19 V20 V23 V24 W9 W12 W13 W16 W17 W21 W22 W25 W26 W28 Y1 Y8 Y9 Y12 Y13 Y16 Y17 Y21 Y22 Y25 Y26 AA1 AA8 AA11 AA12 AA15 AA16 AA18 AA19 AA20 AA25 AA33 AB11 AB12 AB15 AB16 AB18 AB20 AB25 AC1 AC9 AC12 C B F31 H31 J31 K29 DGND GND127 GND128 GND129 GND130 GND131 GND132 GND133 GND134 GND135 GND136 GND137 GND138 GND139 GND140 GND141 GND142 GND143 GND144 GND145 GND146 GND147 GND148 GND149 GND150 GND151 GND152 GND153 GND154 GND155 GND156 GND157 GND158 GND159 GND160 GND161 GND162 GND163 GND164 GND165 GND166 GND167 GND168 GND169 GND170 GND171 GND172 GND173 GND174 GND175 GND176 GND177 GND178 GND179 GND180 GND181 GND182 GND183 GND184 GND185 GND186 GND187 GND188 GND189 GND190 GND191 GND192 GND193 GND194 GND195 GND196 GND197 GND198 GND199 GND200 GND201 GND202 GND203 GND204 GND205 GND206 GND207 GND208 GND209 GND210 GND211 GND212 GND213 GND214 GND215 GND216 GND217 GND218 GND219 GND220 GND221 GND222 GND223 GND224 GND225 GND226 GND227 GND228 GND229 GND230 GND231 GND232 GND233 GND234 GND235 GND236 GND237 GND238 GND239 GND240 GND241 GND242 AC13 AC16 AC17 AC18 AC19 AC21 AC22 AC25 AD8 AD9 AD12 AD13 AD16 AD19 AD21 AD22 AD25 AE8 AE11 AE12 AE15 AE16 AE19 AE20 AE25 AE26 AF1 AF8 AF11 AF12 AF15 AF16 AF19 AF20 AF25 AF26 AF33 AH25 AJ22 AJ25 AL25 AM1 AM2 AM25 AM27 AM32 AM33 AN1 AN2 AN3 AN8 AN13 AN17 AN19 AN25 AN29 AN32 AN33 AGND GNDA0 GNDA1 GNDA2 GNDA3 GNDA4 GNDA5 GNDA6 GNDA7 N29 R29 T29 T31 A1 A2 A3 A6 A12 A18 A21 A26 A32 A33 B1 B2 B20 B32 B33 C33 E1 F1 F6 F8 F10 F12 F17 F27 F28 G6 G28 G32 G33 H1 H9 H12 H13 H16 H17 H20 H21 H24 H28 J6 J8 J11 J12 J15 J16 J19 J20 J23 J24 J28 K1 K6 K11 K12 K15 K16 K19 K20 K23 K24 K25 K26 K28 L2 MSM-8255-1-904PNSP-TR-01 DGND GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND34 GND35 GND36 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND54 GND55 GND56 GND57 GND58 GND59 GND60 GND61 GND62 GND63 GND64 GND65 GND66 GND67 GND68 GND69 GND70 GND71 GND72 GND73 GND74 GND75 GND76 GND77 GND78 GND79 GND80 GND81 GND82 GND83 GND84 GND85 GND86 GND87 GND88 GND89 GND90 GND91 GND92 GND93 GND94 GND95 GND96 GND97 GND98 GND99 GND100 GND101 GND102 GND103 GND104 GND105 GND106 GND107 GND108 GND109 GND110 GND111 GND112 GND113 GND114 GND115 GND116 GND117 GND118 GND119 GND120 GND121 GND122 GND123 GND124 GND125 GND126 L9 L12 L13 L16 L17 L20 L21 L24 M8 M9 M12 M13 M16 M17 M20 M21 M24 N1 N8 N11 N12 N15 N16 N19 N20 N23 N24 N25 N26 N33 P11 P12 P15 P16 P19 P20 P23 P24 R1 R9 R12 R13 R16 R17 R20 R21 R24 R33 T8 T9 T12 T13 T16 T17 T20 T21 T24 T25 T26 U8 U11 U12 U15 D2 RSVD0 AB28 RSVD1 AJ20 RSVD2 AJ21 RSVD3 A10 DNC0 V29 DNC1 W29 DNC2 AH33 DNC3 AA32 DNC4 A4 B4 B6 B7 B10 B11 B12 B13 B18 B19 B21 B22 B24 B25 B31 C2 C12 C21 C29 C30 C31 E2 E6 E7 E8 E9 E10 E11 E13 G29 AN7 AB1 L29 L31 P32 R3 NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34 NC35 RSVD DNC U401I RSVD4 AM11 RSVD5 AM12 RSVD6 N6 RSVD7 AD6 DNC5 AN16 DNC6 AL26 DNC7 AM18 DNC8 D31 DNC9 AF32 NC NC36 NC37 NC38 NC39 NC40 NC41 NC42 NC43 NC44 NC45 NC46 NC47 NC48 NC49 NC50 NC51 NC52 NC53 NC54 NC55 NC56 NC57 NC58 NC59 NC60 NC61 NC62 NC63 NC64 NC65 NC66 NC67 NC68 NC69 NC70 NC71 AB33 AJ33 AB32 AD28 AF2 AF3 AG32 AH32 AJ28 AJ32 AK2 AL28 AL29 AL30 AL31 AM5 AM17 AM26 AM31 AN28 AN31 A20 E12 F22 AN18 AH20 AN14 F2 K2 R2 R32 V2 AA2 AC33 AG1 AN5 C B A A Title Size A3 Date: 5 4 3 2 CPU MSM8255-1_GND Document Number Thursday, June 16, 2011 Rev SF4H8 Sheet 1 PR3 9 of 32 5 4 3 2 1 Sandisk eMMC 2GB VREG_S3_V1P8 [4] eMMC_SDC2_CMD [4] eMMC_SDC2_CLK ER1001 ER1002 10K/+-5% 10K/+-5% 10K/+-5% R1007 R1008 R1009 eMMC_SDC2_CMD_R eMMC_SDC2_CLK_R 0/+-5% 0/+-5% B6 B5 B4 B3 B2 A5 A4 A3 DAT7 DAT6 DAT5 DAT4 DAT3 DAT2 DAT1 DAT0 M5 M6 CMD CLK C6 M4 N4 P3 P5 Vccq1 Vccq2 Vccq3 Vccq4 Vccq5 E6 F5 K9 J10 Vcc1 Vcc2 Vcc3 Vcc4 C2 VDDi E7 G5 H10 C4 K8 N2 N5 P4 P6 Vss1 Vss2 Vss3 Vssq1 Vss4 Vssq2 Vssq3 Vssq4 Vssq5 K5 RESET NC31 NC32 NC33 NC34 NC35 NC36 NC37 NC38 NC39 NC40 NC41 NC42 NC NC43 NC44 NC45 NC46 NC47 NC48 NC49 NC50 NC51 NC52 NC53 NC54 NC55 NC56 NC57 NC58 NC59 NC60 NC61 NC62 NC63 NC64 NC65 NC66 NC67 NC68 NC69 NC70 NC71 NC72 NC73 NC74 NC75 NC76 NC77 NC78 NC79 NC80 EC1001 33pF_NM VREG_S3_V1P8 C VREG_L5_V2P85 C1004 2.2uF D NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 10K/+-5% 10K/+-5% R1005 R1006 10K/+-5% 10K/+-5% R1003 R1004 10K/+-5% 10K/+-5% eMMC_SDC2_DAT7 eMMC_SDC2_DAT6 eMMC_SDC2_DAT5 eMMC_SDC2_DAT4 eMMC_SDC2_DAT3 eMMC_SDC2_DAT2 eMMC_SDC2_DAT1 eMMC_SDC2_DAT0 R1001 [4] [4] [4] [4] [4] [4] [4] [4] R1002 U1001 A1 A2 A6 A7 A8 A9 A10 A11 A12 A13 A14 B1 B7 B8 B9 B10 B11 B12 B13 B14 C1 C3 C5 C7 C8 C9 C10 C11 C12 C13 D C1005 0.1uF C1001 2.2uF C1002 0.1uF eMMC_Vddi Close to IC C1003 0.1uF [5] RST_OUT_V1P8 SDIN5D2-2G-T C NC86 NC85 NC84 NC83 NC82 NC81 B L2 L1 K14 K13 K12 K10 P14 P13 P12 P11 P10 P9 P8 P7 P2 P1 N14 N13 N12 N11 N10 N9 N8 N7 N6 N3 N1 M14 M13 M12 M11 M10 M9 M8 M7 M3 M2 M1 L14 L13 L12 L3 NC123 NC122 NC121 NC120 NC119 NC118 NC117 NC116 NC115 NC114 NC113 NC112 NC111 NC110 NC109 NC108 NC107 NC106 NC105 NC104 NC103 NC102 NC101 NC100 NC99 NC98 NC97 NC96 NC95 NC94 NC93 NC92 NC91 NC90 NC89 NC88 B C14 D1 D2 D3 D4 D12 D13 D14 E1 E2 E3 E5 E8 E9 E10 E12 E13 E14 F1 F2 F3 F10 F12 F13 F14 G1 G2 G3 G10 G12 G13 G14 H1 H2 H3 H5 H12 H13 H14 J1 J2 J3 J5 J12 J13 J14 K1 K2 K3 K6 K7 A A Title Size A3 Date: 5 4 3 2 eMMC Document Number Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 10 of 32 5 4 3 2 G-Sensor 1 E-Compass (YAMAHA) VREG_L8_V1P8 [6] VDDIO 10 reserved 3 VDD 2 reserved 1 GS_INT Short_Pad_0201 [6] VREG_L12_V3 C1104 0.1uF 10 GS_INT_ST_B PAD1101 9 8 7 6 VREG_L12_V3 [6,13,20] I2C_SCL [6,13,20] I2C_SDA C1101 22nF 11 C1102 0.1uF 4 GND SDI 9 5 INT D IOVDD SCL SDA VDD YAS-529 C1103 0.1uF RSTN 8 CSB Short_Pad_0201 AIY SDO PAD1102 U1102 GPO VSS AIZ AIX 1 2 3 4 5 SCK 7 ECOM_RST_N_ST_B ECOM_RST_N U1101 BMA023 12 VREG_L8_V1P8 [6,13,20] I2C_SDA 6 reserved [6,13,20] I2C_SCL reserved D I2C Address: 0101110b (2Eh) If RSTN no use, connect it to IOVDD C C I2C Address: 0111000b (38h) SIM Slot VREG_L3_V1P8 R1101 15K/+-5% C1105 33pF C1106 2.2uF CN1101 ER1103 [21] UIM2_P_RST [21] UIM2_P_CLK B [21] UIM2_P_DATA ER1102 ER1101 UIM2_P_RST_1 UIM2_P_CLK_1 0/+-5% 0/+-5% UIM2_P_DATA_1 0/+-5% EC1102 33pF_NM EC1101 33pF_NM EC1104 33pF_NM EC1103 33pF_NM 1 2 3 6 7 1 2 3 6 7 5 5 B 5190006-0FN-R Cover Detect Switch VREG_S3_V1P8 R1102 100K/+-5% A A SW 1101 1 2 [21] 1 MPU-101-173 COVER_DET 2 EC1105 TVM0G5R5M330R_NM Title Size A3 Date: 5 4 3 2 Sensor & USIM Document Number Friday, June 17, 2011 Rev SF4H8 Sheet 1 PR3 11 of 32 5 4 3 2 1 USB_VBUS_CONN HS Micro-USB B Type EU1201 3 USBH_DP_C 2 2 ESD11N5.0ST5G_NM VBUS 2 D- 3 D+ 4 ID 5 GND SHIELD GND5 GND4 GND3 GND2 GND1 VPH_PW R XTAL_32K_IN C1201 4.7uF R1203 20K/+-1% [5] JRTCK VREG_L18_V2P2 VREG_L18_V2P2 VREG_L18_V2P2 JTAG R1204 47K/+-1% 2 4 6 8 10 12 NTP1211 NTP1210 NTP1209 NTP1208 CN1202 1 3 5 7 9 11 NTP1207 NTP1206 C1204 0.1uF NTP1205 NTP1204 NTP1203 NTP1202 JTDI JTDO JTCK X1201 32.768K Board ID NTP1201 [5] [5] [5] D [20] XTAL_32K_OUT [20] 根根JTAG Board Update. C 32.768K Sleep CLK 11 10 9 8 7 6 1 1 EC1204 USBH_ID 1 EC1201 [6] 2 ESD11N5.0ST5G_NM 1 1 EC1203 0/+-5% USBH_DM_R 0/+-5% USBH_DP_R R1201 R1202 USBH_DM USBH_DP 2 LCP0G050M0R2R_NM [6] [6] 1 EC1202 D USBH_DM_C 8195-7505-BK71 1 4 1 2 90Ω 2 LCP0G050M0R2R_NM 2pF_NM 2 CN1201 C1205 [21] RF_BAND_ID JTRST_N JTMS SRST_N UART2_TXD UART2_RXD PS_HOLD R1206 100K/+-1% [21] HW _REV_ID C [21] PROJECT_ID R1207 18K/+-1% R1205 82K/+-1% [5] [5] [5] [6] [6] [5,21] R1208 20K/+-1% R1209 54.9K/+-1% 2841-G12N-01E_NM Shielding Frame PTH SF1202 B CN1204 CN1203 PAD1201 PAD_HOLE_PTH_ID_2_NM 1 B PAD1202 PAD_HOLE_PTH_ID_2_NM 1 1 440SF80020A ICSRC3910SFR 1 1 ICSRC3910SFR 1 1 SF1203 1 1 1 440SF80120A PAD1204 Hole_C87D67_NM SF1201 1 1 440SF80420A ANT_R 1 [31] SF1205 1 440SF80220A A A SF1204 1 440SF80320A Title Size A3 Date: 5 4 3 2 USB & JTAG & CLK & BID Document Number Friday, June 17, 2011 Rev SF4H8 Sheet 1 PR3 12 of 32 5 4 3 2 1 EMC 20101103 update EMC 20110221 update LINK FPC SD_Board B2B ECN1301 SQ-31G VPH_PWR 1 1 NTP1303 C1303 100nF C1305 2.2uF [6] VREG_L12_V3 PTT_DET [17] FLOUT [4] ALPS_INT_N NTP1301 [6,11,20] I2C_SDA C1307 VREG_CAM_V2P8 [6,11,20] I2C_SCL 100nF [21] KEY_PWR_ON_N [6] HS_DETECT_N [6] CAM_MCLK NTP1302 [6] CAM_HSYNC [6] CAM_VSYNC [6] CAM_I2C_SCL [6] CAM_I2C_SDA C1301 100nF VREG_L16_V1P8 C1302 100nF [6] [6] [6] [6] VREG_S3_V1P8 CAM_DATA4 CAM_DATA5 CAM_DATA6 CAM_DATA7 [21] KEY_VOL_UP [21] KEY_VOL_DOWN 71 73 71 73 72 74 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 EC1301 33pF_NM 15 FM_ANT [30] VREG_L14_V2P85 EXT_GPS_LNA_SEL [5] HSED_BIAS1_ST_A_1 EMIC_1 [15] EMIC_GND [15] EARON EAROP CAM_PCLK [14,16] [14,16] ER1301 [4] uSD_SDC4_CLK AC128 33pF 17 AC129 33pF AC130 33pF VREG_SD_V2P85 CN1302 15 16 1 3 5 7 9 11 13 2 4 6 8 10 12 14 17 18 [15] HPO_R [15] [6] EU1301 [4] uSD_SDC4_DAT0 [6] [6] [6] [6] VO1+ [14] VO1- [14] 16 D 2 4 6 8 10 12 14 uSD_SDC4_DAT0_CN uSD_SDC4_DAT1_CN uSD_SDC4_DAT2_CN uSD_SDC4_DAT3_CN ER1302 C1310 0.1uF uSD_SDC4_CMD 0/+-5% [4] 18 502426-1410 HPO_L CAM_5M_PWDN [6] CAM_RST_N [6] CAM_VGA_PWDN [6] CAM_DATA11 CAM_DATA10 CAM_DATA9 CAM_DATA8 1 3 5 7 9 11 13 0/+-5% [15] AC131 33pF 1 [4] uSD_SDC4_DAT1 2 [4] uSD_SDC4_DAT2 3 [4] uSD_SDC4_DAT3 4 IN1 NI2 IN3 IN4 5 OUT1 uSD_SDC4_DAT0_CN 6 OUT2 OUT3 OUT4 uSD_SDC4_DAT1_CN 7 uSD_SDC4_DAT2_CN 8 uSD_SDC4_DAT3_CN KNA16150C33MA7TB ATMEL Touch controller : mXT165 KNA16150C33MA5TS Touch Panel ZIF CONN 72 74 VREG_L12_V3 NTP1304 NTP1305 EC1302 33pF_NM 9 D MODULE_ID 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 GND1 [6] 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 10 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 [21] VIB_DRV_N GND2 CN1301 Flash_5V VREG_TOUCH_V3 VREG_S3_V1P8 AXE570124 ER1303 2 1 HW RESET C C R1301 100K/+-5% BLM15AG121SN1 VREG_S3_V1P8 VREG_TOUCH_V3 VREG_S3_V1P8 3 VCC A n.c. GND U1302 5 A1 B1 C1 RESIN_KEY_N 4 Y OE VCC A GND Y AYF330735 A2 C2 74AUP1G32GF TP_RST_N 0/+-5% SN74LVC1G126YZPR LED ZIF CONN I2C_SDA I2C_SCL PAD1302 PAD1301 0/+-5% RESIN_N [21] R1306 R1305 [6] C1314 C1315 [6,11,20] [6,11,20] C1316 DUMMY_C_0201 2 6 C1313 100nF [4] DUMMY_C_0201 [21] KEY_PWR_ON_N B TP_INT_N 1 2 3I2C_SDA_TP 4I2C_SCL_TP 5 6 7 DUMMY_C_0201 1 1 2 3 4 5 6 7 C1309 100nF R1304 100K/+-5% C1308 100nF U1301 [21] KEY_VOL_UP C1312 100nF CN1303 VREG_S3_V1P8 Reserve for desense VREG_L5_V2P85 Q1301 1 2 [6] SD_POWER_EN 3 B R1302 1M/+-5% S1 D1 G1 G2 D2 S2 6 VPH_PWR R1303 100K/+-5% 5 4 ER1305 VREG_SD_V2P85 0/+-5% C1311 18pF NTJD4105CT1G CN1304 Modify for desense [21] KYPD_DRV_N ER1304 0/+-5% 1 2 3 4 5 6 B 1 2 3 4 GND GND FH19C-4S-0.5SH(05) C1317 18pF Modify for desense A A B2B Title Size A2 5 4 3 2 Date: Document Number Rev SF4H8 Sheet Wednesday, June 29, 2011 1 PR3 13 of 32 5 4 3 2 1 Internal Audio SCH QTR8200 Differential Signal 2 35pF EAC101 PESD5V0S1BL 2 D A1 AR102 68K/+-1% SPKIN- C1 B1 B2 B3 Close to NCP2823 INP VOUTN INN VOUTP AVDD PVDD PGND AGND EN A3 VO1_P C3 VO1_N AC112 33pF AL102 2 A2 2 AC113 33pF C2 AC115 33pF BLM15AG121SN1 1 1 AL103 NCP2823AFCT2G VO1+ [13] VO1- [13] AC114 33pF BLM15AG121SN1 D 1 SPKIN+ 1 68K/+-1% 1 AC111 [16] LINE_OUT_LP AU101 AR101 1 5.6nF LINE_P 5.6nF LINE_N EAC102 PESD5V0S1BL 2 AC110 [16] LINE_OUT_RN 35pF ATP103 2 V_BAT SPK_EN Close to NCP2823 ATP101 AC109 22uF_NM AC107 4.7uF [6] Close to Connector AC108 4.7uF Close to NCP2823 C C ATP104 [13,16] EARON EARON [13,16] AC118 33pF_NM AC116 33pF Differential Signal [13,16] EAROP EAROP [13,16] AC119 33pF_NM AC117 33pF ATP105 Close to QTR8200 Close to Connector B B PM8058_1.8V Close to PM8058 HSED_BIAS0 APAD101 AC102 0.1uF CCOMP [16] Close to QTR8200 AC124 10uF QTR8200 0.1uF QTR8615 4.7uF Differential Signal MIC1P+ [16] MIC1P AC120 0.1uF AC121 0.1uF MIC1N- [16] MIC1N AC122 33pF ACN101 1 3 5 7 9 11 13 AC123 33pF 2 4 6 8 10 12 14 501591-1011 A A Title Size C 5 4 3 2 Date: A01_Audio_Internal_Portion Document Number Rev SF4H8 Thursday, June 16, 2011 1 Sheet PR3 14 of 32 5 4 3 2 1 PTT_DET QTR8200 State ATP204 AC203 [16] MIC2P EMIC_1 [13] Have push L No push PM8058_1.8V HSED_BIAS1 0.1uF AC201 33pF H APAD202 HSED_BIAS1_ST_A_1 D [13] D AC204 [16] MIC2N EMIC_GND AC207 10uF [13] GND shielding 0.1uF AC202 33pF Close to QTR8200 [16] HPH_RN HPH_RN [16] [16] HPH_LP HPH_LP [16] Close to PM8058 AC206 33pF AC205 33pF C C Headset (All Close to AU201) VREG_L20_V2P85 AL203 HP_VDD 2 1 BLM15AG121SN1 AC212 33pF AC214 2.2uF AC213 33pF_NM B B VP B3 A2 100K/+-5% B2 [6] PA_HEADSET_EN AC217 [16] HPH_RN HPI_R 470nF INL CPP CPM B1 AR205 AU201 HPI_L PGND PVM SPVM SD INR AGND AC218 33pF 470nF A1 AC216 [16] HPH_LP C1 C3 AC220 1uF OUTL C2 C4 B4 ATP202 AC215 A4 A3 OUTR NCP2811BFCT1G 1uF AR206 10/+-5% AR207 10/+-5% HPO_L HPO_R [13] [13] ATP203 AC219 33pF A A Title Size C 5 4 3 2 Date: A02_Audio_External_Portion Document Number Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 15 of 32 5 4 3 2 1 D D WQU801C Touch AC4 AD1 AD2 Y14 W10 VREG_L10_V2P2 W14 AL301 VDD_WCA_CDC 2 1 W11 W13 AC306 0.1uF BLM15AG121SN1 AC307 33pF AC303 2.2uF AC305 0.1uF [30] FM_AUDIO_L AL306 2 FM_AUD_L AC313 470nF BLM15AG121SN1 1 FM_AUD_L_GND AC304 470nF C AE11 AF14 AG14 [30] FM_AUDIO_R TSADC_EOC SSBI_TS TS_WIPER TS_XP_UL TS_XN_LL VDD_WCA_TS AA10 TS_YP_UR TS_YN_LR Audio BLM15AG121SN1 1 AF11 AL303 2 TSADC_PENIRQ_N AL309 2 BLM15AG121SN1 1 FM_AUD_R AL304 2 BLM15AG121SN1 1 FM_AUD_R_GND AC312 470nF AG13 AH14 AC311 AUX_IP AUX_OUT AUX_IN CCOMP LINE_IN_LP LINE_OUT_LP LINE_IN_LN LINE_OUT_RN LINE_IN_RP EAROP LINE_IN_RN EARON 470nF [14] MIC1P AD13 [14] MIC1N AE13 MIC1P HPH_LP MIC1N HPH_RN [15] [15] AE14 MIC2P AF13 MIC2N MIC2P AUD_MCLK1 MIC2N AUD_MCLK2 AJ10 AG9 AJ9 AE10 VDD_WCA_NEG AUD_TX_I2S_WS VDD_WCA_CDC AUD_TX_I2S_SD VDD_WCA_CDC AUD_TX_I2S_SCK AG11 AH13 CCOMP LINE_OUT_LP AK12 LINE_OUT_RN AUD_RX_I2S_SD AUD_RX_I2S_SCK [14] C [14] AJ11 EAROP [13,14] AK11 EARON [13,14] AK9 HPH_LP [15] AK10 HPH_RN [15] AB2 ADO_MCLK1 EAR303 0/+-5% AUD_MCLK1 [5] AB4 ADO_MCLK2 EAR304 0/+-5% AUD_MCLK2 [5] ADO_TX_WS AF2 ADO_TX_SD AF1 ADO_TX_SCK AG1 VDD_WCA_CDC AUD_RX_I2S_WS [14] AJ12 ADO_RX_WS AH1 AH2 AJ3 APAD310 AUD_TX_I2S_WS [5] AUD_TX_I2S_SD [5] APAD308 APAD307 AUD_TX_I2S_SCK [5] AUD_RX_I2S_WS [5] APAD311 ADO_RX_SD APAD309 ADO_RX_SCK APAD312 AUD_RX_I2S_SD AUD_RX_I2S_SCK [5] [5] QTR-8601-0-308NSP-TR-01 PM8058 VREG_NCP_V1P8 B B AL302 2 1 VDD_WCA_NEG BLM15AG121SN1 AC309 2.2uF AC310 33pF A A Title Size C 5 4 3 2 Date: A03_Audio_CODEC Document Number Thursday, June 16, 2011 Rev SF4H8 1 Sheet PR3 16 of 32 5 4 3 2 1 FLASH DRIVER D D Flash_5V 11 VOUT 10 2 C1 PGND 9 1uF 3 C2 SGND 8 [6] CAM_TORCH_EN 4 FLASH FB 7 [6] CAM_FLASH_EN 5 EN RSET 6 CC112 C 1uF 11 CC110 VPH_PWR CU101 1 VIN EMC 20100930 ECR103 0/+-5% ECC103 33pF_NM CC113 1uF FLOUT CR101 64.9K/+-1% FP6773WDGTR C [13] CR102 1R/+-1% B B A A Title Size A Date: 5 4 3 Document Number Flash Driver Friday, June 17, 2011 2 SF4H8 Sheet Rev PR3 17 of 1 32 5 4 3 2 1 1. LED_PWM 2. LED3. LED+ 4. NC 5. VDD 6. GND 7. MTP_2 8. DOTCLK 9. HSYNC 10.GND 11.VSYNC 12.ENABLE 13.ID0 14.GND 15.RESETB/ID1 16.AVDD 17.R5 18.R4 19.R3 20.R2 21.R1 22.R0 23.G5 24.G4 25.G3 26.G2 27.G1 28.G0 29.B5 30.B4 31.B3 32.B2 33.B1 34.B0 35.SPI_DI 36.NC 37.SPI_CS 38.GND 39.MTP_1 40.SPI_CLK VREG_LCM_VDDIO_V1P8 LED_A VPH_PWR D LD1 LL1 22uH LED_A_F1 ELR1201 2 LC4 LC5 33pF4.7uF LC9 33pF LC8 33pF 5 4 SW 6 VIN CTRL LCDC_PCLK_F LU4 TPS61160DRVR VREG_LCM_VDD_V2P8 LCDC_ENABLE_F GND LC10 33pF 3 FB COMP Thermal Pad 1 LED_C LC6 220nF LR2 10R/+-1% 2.2uF LCN1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 LED_C 7 C LC11 1uF 0/+-1% LCM_PWM 2 [6] LC7 1PS79SB10 1uF LC3 LED_A 1LED_A_F2 LCDC_RED_4_F LC2LCDC_RED_2_F LCDC_RED_0_F 2.2uF LCDC_GRN_4_F LCDC_GRN_2_F LCDC_GRN_0_F LCDC_BLU_4_F LCDC_BLU_2_F LCDC_BLU_0_F [6] SPI_CLK 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 LCDC_HSYNC_F LCDC_VSYNC_F [6] LCM_ID LCM_RST_N [6] LCDC_RED_5_F LCDC_RED_3_F LCDC_RED_1_F LCDC_GRN_5_F LCDC_GRN_3_F LCDC_GRN_1_F LCDC_BLU_5_F LCDC_BLU_3_F LCDC_BLU_1_F SPI_MOSI_DATA [6] [6] SPI_CS_N Add this net for LCM ID detect 41 42 43 44 41 42 43 44 Rset=0.2/I_LED I_LED=20mA, RSET=10 ohm 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 BM10NB(0.8)-40DS-0.4V(75) [6] LCDC_BLU_3 3 IN3 [6] LCDC_BLU_1 4 IN4 LCDC_GRN_1_F [6] LCDC_RED_3 1 OUT2 6 LCDC_BLU_5_F [6] LCDC_RED_1 2 OUT3 7 LCDC_BLU_3_F [6] LCDC_GRN_5 3 IN3 OUT4 8 LCDC_BLU_1_F [6] LCDC_GRN_3 4 IN4 IN1 NI2 GND1 9 5 GND2 NI2 ELU1203 OUT1 10 2 GND1 [6] LCDC_BLU_5 IN1 10 B 1 GND2 ELU1201 [6] LCDC_GRN_1 9 B/L_Boost_Driver IC_For 7 LED KNA16150C33MA7TB OUT1 5 LCDC_RED_3_F OUT2 6 LCDC_RED_1_F OUT3 7 LCDC_GRN_5_F OUT4 8 LCDC_GRN_3_F ELR1204 D C B LCDC_ENABLE_F [6] LCDC_ENABLE 0/+-5% ELC1202 33pF_NM KNA16150C33MA7TB 9 [6] LCDC_HSYNC 2 NI2 LCDC_RED_0_F [6] LCDC_VSYNC 3 IN3 OUT4 8 LCDC_GRN_4_F [6] LCDC_RED_5 4 IN4 OUT2 6 LCDC_HSYNC_F OUT3 7 LCDC_VSYNC_F OUT4 8 LCDC_RED_5_F KNA16150C33MA7TB ELC1201 33pF SONY_3.69"_LCM_Connector KNA16150C33MA7TB ELU1205 [6] LCDC_GRN_2 1 [6] LCDC_GRN_0 2 NI2 [6] LCDC_BLU_4 3 IN3 [6] LCDC_BLU_2 4 IN1 IN4 OUT1 5 LCDC_GRN_2_F LCDC_GRN_0_F OUT2 6 OUT3 7 LCDC_BLU_4_F OUT4 8 LCDC_BLU_2_F 10 A 9 IN4 LCDC_RED_2_F 7 0/+-5% GND1 4 6 OUT3 OUT1 GND2 [6] LCDC_GRN_4 OUT2 LCDC_PCLK_F LCDC_BLU_0_F GND1 IN3 IN1 [6] LCDC_PCLK 5 GND2 NI2 3 1 10 2 [6] LCDC_RED_0 [6] LCDC_BLU_0 OUT1 10 [6] LCDC_RED_2 LCDC_RED_4_F GND1 IN1 ELU1204 5 GND2 1 9 ELR1203 ELU1202 [6] LCDC_RED_4 5 4 3 KNA16150C33MA7TB 2 A Title Size B Date: L01_Display_3.69"_LCM Document Number Rev SF4H8 Thursday, June 16, 2011 Sheet 1 PR3 18 of 32 5 4 SMPS/ Linear regulator 3 2 1 PU101F VPH_PW R SMPS K16 VDD_S0 PC102 10uF M16 GND_S0 T13 VDD_S1 VREG_S0_V1P2 PL101 VSW_S0 PC103 0.1uF 2.2uH S0/ Buck 800mA VREG_S0 PC104 22uF PC107 22uF N15 VREG_S1_V1P2 PL102 D PC108 10uF T15 GND_S1 A13 VDD_S2 PC109 10uF A15 GND_S2 VSW_S1 VREG_S1 D PC105 0.1uF PC106 22uF PC157 22uF R13 VREG_S2_V1P3 PL103 VREG_S3_V1P8 PU101A B11 LVS VDD_L0_L1_LVS 100mA VOUT_LVS0 VOUT_LVS1 B9 VREG_LCM_VDDIO_V1P8 B10 B12 VDD_L21 LDO 300mA PC114 0.1uF P16 C PC121 0.1uF VPH_PW R VREG_L8 L1 VREG_L9 N1 VREG_L10 T2 VREG_L13 C16 VREG_L15 K1 R2 VDD_L6_L7 VREG_L16 A16 M1 VDD_L8 VREG_L22 A9 T3 VDD_L10 VREG_L23 T16 F1 VDD_L2_L11_L12 VREG_L0 A10 A5 K15 B8 VDD_L3_L4_L5 LDO 150mA G10 T6 VREG_L12 G1 VREG_L17 A6 VREG_L18 A4 VREG_L19 L15 VREG_L20 M15 VREG_L21 A12 VREG_L24 N16 VREG_L25 R16 VREG_L4 C2 VREG_L6 R3 VREG_L7 P2 VREG_NCP T8 NCP_FB NCP_CTC1 R6 T7 NCP_CTC2 T5 VDD_L19_L20 VDD_L22 VDD_L9 LDO 50mA REF_BYP Reference Voltage PC125 0.1uF D1 VDD_L17_L18 PC124 0.1uF D13 C1 VDD_L13_L16 VREG P1 VREG_L3 VREG_L11 VDD_L14_L15 VREG_S4_V2P2 G16 ON VREG_L2_2P6 VREG_L5_V2P85 ON NO Use PC116 10uF J16 NCP 200mA PC101 22uF PC110 22uF B13 VREG_S3_V1P8 VSW_S3 2.2uH S3/ Buck 800mA GND_S3 VREG_S3 G15 VSW_S4 E16 VREG_S4 D15 PC112 0.1uF PC113 22uF PC156 22uF VREG_S4_V2P2 PL105 VREG_L8_V1P8 F16 VREG_L9_V2P05 VREG_L10_V2P2 PC119 10uF D16 VREG_L13_V2P9 VREG_L14_V2P85 VDD_S4 S4/ Buck 800mA GND_S4 PC118 22uF PC120 22uF C VREG_S0~VREGS4: Short, Close to PMIC Note: Buck SMPS 1.5 A rating assumes the output voltage is less than or equal to 1.8 V.For outputs above 1.8 V, the rating is reduced due to duty cycle limitations. For 1.8 V < Vout < 2.4 V, the rating is reduced to 650 mA. VREG_LCM_VDD_V2P8 VREG_L16_V1P8 VREG_L22_V1P2 PC117 0.1uF 2.2uH PM-8058-0-191NSP-TR-00 ON H16 VSW _S3 NO Use ON NO Use ON VREG_L3_V1P8 VREG_L11_V1P8 VREG_L12_V3 VREG_L17_V1P8 VREG_L18_V2P2 VREG_L19_V1P8 VREG_L20_V2P85 VREG_L21_V1P1 B ON VREG_L24_V1P2 VREG_L25_V1P2 VREG_L4_2P85 NO Use VREG_L6_V3P3 ON ON VREG_L7_V1P8 VREG_NCP_V1P8 PC126 2.2uF REF_GND GND_NCP PM-8058-0-191NSP-TR-00 PC115 0.1uF 2.2uH VREG_S2 VDD_S3 VREG_L0_V1P2 PC122 10uF A B1 VREG_L14 J1 Dedicated GND VREG_L5 VDD_NCP B16 REF_BYP VREG_L2 E1 T4 A1 PC123 0.1uF A11 H1 VREG B VREG_L1_V1P2 VREG_L1 VDD_L23_L24_L25 S2/ Buck 800mA A14 VSW _S2 PL104 PC111 0.1uF VREG VSW_S2 ON T14 VSW _S1 2.2uH S1/ Buck 800mA ON L16 VSW _S0 PC129 4.7uF PC130 4.7uF PC131 4.7uF PC132 4.7uF PC133 4.7uF PC134 4.7uF PC135 4.7uF PC136 4.7uF PC137 4.7uF PC138 4.7uF PC139 4.7uF PC141 4.7uF PC142 4.7uF PC143 4.7uF PC144 4.7uF PC145 4.7uF PC146 4.7uF PC147 4.7uF PC148 4.7uF pVDD = Pin must be connected to the Battery through VPH_PWR net. These pins power required logic blocks within the PMIC. VDD_L19_L20 is pVDD BUCK input power PC150 PC149 4.7uF 4.7uF PC151 1uF PC152 4.7uF PC153 4.7uF PC154 4.7uF PC155 4.7uF A GND for PC122 and PC155 should be in the same layer. Title Size A3 Date: P01_PMIC_SMPS/LDO Document Number Rev SF4H8 Thursday, June 16, 2011 Sheet PR3 19 of 32 4 Gas-Gauge USB_VBUS_CONN NPTP202 2 V_BAT VMAX=(Program 5.5V~6V) VREG_L5_V2P85 PC201 0.1uF Gauge_Vcc_V2P5 PR211 100K/+-5% VCHG VCHG VCHG OVP/ Charger VPH_PWR VPH_PWR 4 A3 SDA VSS D1 B3 SCL BAT_LOW C1 C3 BI/TOUT SRN B1 D3 TS SRP A1 1.8M/+-5% BAT_FET_N 8 7 6 5 BAT_LOW PC205 7 3 PR204 4 3 2 1 PC216 0.1uF PB201 R8 PC210 22uF VREF_THERM M12 1K/+-1% PC209 22uF 1 1 PC219 22uF PC211 22uF 10m/+-1% Gauge external power PTP205 PM-8058-0-191NSP-TR-00 V_BAT Gauge_Vcc_V2P5 PC218 0.1uF PC217 PU203 1 OUT 2 N/C 3 GND1 IN 7 General Housekeeping B PR207 PACK- 0.25W PC210 Close to PMIC C PPAD203 PPAD204 V_BAT 600R VREF_THERM PR206 100/+-5% BAT_FET_N AON4421 VBAT 0.1uF PC215 0.1uF PR205 100/+-5% PC213 0.1uF G D D D S D D D [21] PC205,PC215,PC216,PR205,PR206 Close to PU201 BQ27500YZGR-V130 THERM PC208 22uF D PR214 100K/+-5%_NM 2 GND GND GND GND GND GND GND GND GND GND A2 PAD G9 H8 H9 H10 J7 J8 J9 J10 K8 K9 B2 NC [21] VREG_L5_V2P85 PAD C BAT_GD [6,11,13] I2C_SCL VPH_PW R R12 T12 R7 BAT VCC PR202 18.2K/+-1% OVP_CLAMP PQ201 BAT_FET_N C2 D2 [6,11,13] I2C_SDA PC212 33nF VCHG PR203 20K/+-5% PC206 470nF GND3 GND GND PR201 VOUT OVP_CTL PC207 4.7uF K7 K10 2 OVP_CLAMP PC204 3.3nF R10 T10 Gauge_Vcc_V2P5 5 OVP_CTL M13 PU202 NIS1050MNTBG BAT_GD_N PU201 1 N12 VCOIN PC202 22pF VIN VIN OVP_CLAMP D D N13 G 1 OVP_SNS GND R5 S PU101B PMIC_COIN 8 6 PC203 4.7uF_NM D 1 I2C address: 1010101 1 OVP/ Charger 3 2 5 6 GND2 5 EN 4 0.1uF TPS78225DRVR B PU101E Gen_HSKPG 19.2MHz Battery Connector XO_OUT_A0_EN XO_OUT_A0 B7 D8 XO_OUT_A0 [27] XO_OUT_D0_EN XO_OUT_D0 B3 D5 XO_OUT_D0 [29] V_BAT NPTP204 XO_OUT_D1_EN XO_OUT_D1 B2 E4 XO_OUT_A1_EN XO_OUT_A1 D6 D7 PCON201 XO_OUT_D1_R TCXO_EN 2 XTAL_19M_IN EPR1 [5] XO_OUT_D1 PC214 33pF [5,6] A8 XTAL_32K_IN SLEEP_CLK0 GPIO_38 C15 J5 XOADC_REF G2 2 3 3 4 EPC201 18pF 4 5 SLEEP_CLK0_BUFF [5] VREG_L18_V2P2 Modify for desense 5 97-13-01-08-R THERM 1 XTAL_19M_OUT 1 2 EPC202 TVM0G5R5M330R_NM NPTP203 2 [12] XTAL_32K_IN A3 1 1 0/+-5% [27] XTAL_19.2M_OUT EPC203 PESD5V0S1BL_NM 2 A2 1 [27] XTAL_19.2M_IN PACK- A A 32.768KHz [12] XTAL_32K_OUT A7 XTAL_32K_OUT PM-8058-0-191NSP-TR-00 GND_XOADC GND_XO GND_XOBUF H7 G7 G8 Title Size A3 Date: P02_PMIC_Charger Document Number Rev SF4H8 W ednesday, June 29, 2011 Sheet PR3 20 of 32 5 4 3 2 1 MPP/GPIO PU101D [27] XO_THERM [13] KEY_VOL_UP [11] COVER_DET PR318 [20] BAT_LOW 0/+-5% [6] UIM2_M_RST [6] UIM2_M_CLK C [13] VIB_DRV_N [13] KYPD_DRV_N MPP_01 MPP_03 MPP_05 MPP_07 MPP_09 MPP_02 MPP_04 MPP_06 MPP_08 MPP_10 F13 G13 H13 J13 L13 B5 E2 F2 H2 L2 K2 M2 N8 N7 M10 B4 E6 E8 E9 F5 G4 E10 H5 L12 J4 GPIO_01 GPIO_03 GPIO_05 GPIO_07 GPIO_09 GPIO_11 GPIO_13 GPIO_15 GPIO_17 GPIO_19 GPIO_21 GPIO_23 GPIO_25 GPIO_27 GPIO_29 GPIO_31 GPIO_33 GPIO_35 GPIO_37 GPIO_39 GPIO_02 GPIO_04 GPIO_06 GPIO_08 GPIO_10 GPIO_12 GPIO_14 GPIO_16 GPIO_18 GPIO_20 GPIO_22 GPIO_24 GPIO_26 GPIO_28 GPIO_30 GPIO_32 GPIO_34 GPIO_36 B6 J2 K5 K4 R4 M6 M7 M9 M11 N2 D2 E7 D9 E5 F4 G5 H4 K12 GPIO_40 M8 VIB/KPD LED T1 R1 B15 VIB_DRV_N KYPD_DRV_N NFC_EXT_EN LED_ATC LED_DRV0_N LED_DRV1_N LED_DRV2_N GPIO UIM2_P_DATA [11] PROJECT_ID HW _REV_ID RF_BAND_ID [12] [12] [12] KEY_VOL_DOW N D [13] PR317 BAT_GD_N [20] UIM2_P_RST UIM2_P_CLK [11] [11] 0/+-5% Control R11 T11 T9 R9 C VREG_S3_V1P8 HSED_BIAS0 HSED_BIAS1 HSED_BIAS2 PM-8058-0-191NSP-TR-00 Headset N11 N9 N10 F15 MSM_PM_VIO Control R14 J15 H15 OPT_1 OPT_2 OPT_3 Power-on Circuit PC302 470nF VPH_PW R Power Key D10 B14 [13] KEY_PW R_ON_N [13] PTP302 PU101C HSED_BIAS0 HSED_BIAS1 1 D MPP F12 G12 H12 J12 K13 1 [6] UIM2_M_DATA KYPD_PWR_N RESIN_N PON_RESET_N E15 PON_RST_N [5] PS_HOLD D12 PS_HOLD [5,12] MPP_11(CBLPWR0_N) MPP_12(CBLPWR1_N) R15 P15 RESIN_N Interrupt Manager [5] PM_IRQ_MDM_N [5] PM_IRQ_SROT_N [5] PM_IRQ_APC_N E13 E11 E12 PM_INT_MDM_N PM_INT_SEC_N PM_INT_USR_N D11 SSBI PA Controller G_PA_ON0 G_PA_ON1 U_PA_ON0 U_PA_ON1 U_PA_ON2 U_PA_ON3 N6 L5 N5 N4 M5 M4 VOUT_PA_CTL L4 Camera Power [5] B SSBI_PMIC PTP305 VPH_PW R 1 G_PA_ON0 G_PA_ON1 U_PA_ON0 U_PA_ON1 [25] [25] [23] [23] U_PA_ON3 [24] VOUT_PA B 1 PM-8058-0-191NSP-TR-00 PC303 1uF VREG_CAM_V2P8 PU301 PC301 2.2uF 1 VIN 2 GND 3 EN VOUT 5 NC 4 PC304 1uF G9091-280TA1U [5] VREG_CAM_V2P8_EN PR301 1M/+-5% A A Title Size A3 Date: Control/MPP/GPIO Document Number Rev SF4H8 Thursday, June 16, 2011 Sheet PR3 21 of 32 5 4 3 2 1 Vctrl Active Path V1 D GPIO_077 [5] V4 H H L L GSM HB Tx H L L L GSM_RX1(900) L L H L GSM_RX2(1800) L H H L GSM_RX3(1900) L H L L TRX1 H L H L TRX2(U2100) H H H L TRX3 H L H H H H H H H L L H TRX5 ANT_SEL3 V3 GSM LB Tx TRX4(U1500/U1700) C V2 D C WQC106 22pF GPIO_076 [5] ANT_SEL2 WQC105 22pF GPIO_073 [5] ANT_SEL1 WQC104 22pF VREG_L14_V2P85 GPIO_072 [5] Antenna Switch ANT_SEL0 WQR101 WQC103 22pF WQC102 22pF WQC101 0.1uF WQC107 1 WQSW101_ANT.2 WQL101 4 GND IN 33pF MM8030-2600RK0 DUMMY_C_0201 GND5 GSM_TX_HB GND6 GND7 GSM_TX_LB OUT GND1 TRX3 TRX4 TRX5 GND2 GND3 ANT GND4 GND11 GND12 GND10 TRX2 TRX1 GSM_RX1 GSM_RX2 GND9 GSM_RX3 GND8 21 20 19 18 17 16 15 14 TRX_U2100 B [23] RX_G_900 [26] RX_G_1800 [26] WQL104 DUMMY_C_0201 9 10 11 12 13 3 2 [31] Ant_GU2100 GND WQCN101 V1 V2 V3 V4 VDD WQSW101 1 2 3 4 5 6 7 8 27 28 0/+-5% Murata antenna switch needs DC block in the Tx/Rx/TRX maths. 26 25 24 23 22 B SKY13362-389LF RX_G_1900 [26] improve G1900_G1800 isolation [25] TX_G_HB 3 [25] TX_G_LB GND WQCN102 A 2 OUT IN 1 GND [31] Ant_U1500_1700 WQC108 A WQL102 TRX_U1500_1700 [24] 33pF Title 4 MM8030-2600RK0 DUMMY_C_0201 Size B Date: 5 4 3 2 W01_PRIMARY_ASM Document Number Rev SF4H8 Wednesday, June 29, 2011 PR3 Sheet 1 22 of 32 5 4 3 2 1 WCDMA TX CHAIN (BC1) Duplexer Matching WQC219 V_BAT LNA Matching WQC224 PRX_U_2100_M [27] WQD201_RX_M.2 WQD201_RX_M.1 22pF 22pF D D Difference duplexer(B3921) WQD201 WQC213 22pF WQC218 0.1uF 3nH WQL214 WQPA201_OUT.2 3 Rx Tx Rx C WQC226 WQPA201_IN.1 WQPA201_IN.2 4.7nH WQL210 7.5nH 1 2 3 4 5 VCC1 RF_IN VMODE_1 VMODE_0 VEN Rev.H 11 8 9 5 2 4 7 WQC229 WQC220 PRX_U_2100_P [27] WQD201_RX_P.2 WQD201_RX_P.1 22pF 22pF VCC2 RF_OUT CPL_IN GND CPL_OUT SKY77701 WQC227 2.2pF WQL207 4.3nH SAYFP1G95CA0B00R05 10 9 8 7 6 CP_BC1 [24] WQC216 WQPA201_CPLout.1 6.8pF WQPA201 WQPA201_IN.4 WQL208 4.7nH IN Ant DUMMY_C_0201 GROUND PAD 2.7pF 1 WQFL201 SAFEB1G95KA0F00R14 Ground Ground Ground Ground Ground WQC217 1pF 6 GND GND 2 1.5nHWQC225 GND TX_U_2100 WQPA201_IN.2.1 5 [27] WQPA201_IN.3 OUT WQC228 4 WQL213 + _ 3 WQC215 WQL206 12nH 1 C WQD201_ANT.1 TRX_U2100 [22] 22pF WQL205 3nH notch filter for GPS need closed to QTR datasheet =>shunt 2.9nH MSM WQR408 PDET_IN [5,24,25,27] MSM_PA_R0 WQR409 43R/+-5% 130R/+-5% [5,24,25,27] MSM_PA_R1 [27] WQR404 130R/+-5% Note: AVAGO CPL have no DC block internally PMIC B B [21] U_PA_ON0 WQC223 22pF Rout PA_R0 and PA_R1 as sensitive RF paths POWER MODE PA_R1 PA_R0 HIGH POWER L L MEDIUM POWER L H LOW POWER H H A A Title W03_TX_CHAIN_BC1(Skyworks) Size Custom Document Number Date: 5 4 3 2 Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 23 of 32 5 4 Need change for BC9 3 2 1 BC11/BC9 Co-Layout PMIC WQR406 WCDMA TX CHAIN (BC11) [21] U_PA_ON1 D Need change for BC11 D DUMMY_C_0201 PMIC WQR407 BC11/BC9 Co-Layout [21] U_PA_ON2 0/+-5% LNA Matching WQC423 22pF WQL414 V_BAT MSM PRX_U_1700_M [27] [5,23,25,27] MSM_PA_R0 DUMMY_C_0201 Duplexer Matching WQC422 WQC414 22pF C WQD401_RX_P.1 WQC416 22pF WQC421 100nF WQL407 PRX_U_1500_P [27] C WQD401_RX_P.2 6.8nH 100pF [5,23,25,27] MSM_PA_R1 WQPA401 5 4 3 WQC415 22pF Rout PA_R0 and PA_R1 as sensitive RF paths BC11/BC9 Co-Layout 2 Venable Vmode0 Vmode1 RFIN VCC2 VCC1 RFOUT CPLIN CPLOUT WQC425 WQPA401_IN.1 [27] GND GND TX_U_1700 DUMMY_C_0201 WQC427 3pF 10 1 9 8 6 WQD401 WQC417 3 4.3nH WQPA401_CPLin.1 Rx Tx Rx 8 Ground Ground Ground Ground Ground 2 4 5 7 9 WQC424 DUMMY_C_0201 7 11 WQC420 6 0.5pF BA012D3-01 Ant WQL412 22nH DUMMY_C_0201 WQC428 3pF WQC426 WQD401.RX_M.1 WQL408 PRX_U_1500_M [27] WQD401_RX_M.2 6.8nH SAYFP1G43CA0F00R05 B WQL401 WQFL401_IN.2 TX_U_1500 WQC418 WQFL401 WQC402 [27] WQFL401_IN.1 6.2nH 2.7pF WQL402 9.1nH 1 Unbalance Port Unbalance Port Ground Ground Ground 4 100pF WQPA401_IN.2 2 3 5 27pF Need to check PA RF_IN have DC block or not WQL415 CP_BC1 [23] WQD401_ANT.1 TRX_U1500_1700 [22] DUMMY_C_0201 SAFEA1G43KA0F00R12 WQL413 10nH 33pF WQL409 6.2nH PA_R1 PA_R0 HIGH POWER L L MEDIUM POWER L H H BC11/BC9 Co-Layout Note: AVAGO CPL have no DC block internally WQPA401_CPLin.2 POWER MODE LOW POWER A WQR410 49.9R/+-1% H Title W04_TX_CHAIN_BC11(Mitsubishi) Size B Document Number Date: 5 4 B PRX_U_1700_P [27] WQC419 WQR405 100pF A WQC429 1 3 2 Rev SF4H8 Thursday, June 16, 2011 PR3 Sheet 1 24 of 32 5 4 WQC605 [27] 3 WQL601 2.7nH 2.7pF 1 GSM_QUAD_BAND WQC614 WQPA601_RFIN_HB.3 DA_G_HB 2 22pF V_BAT D D WQC607 10nF PMIC WQC612 15pF WQC608 56pF WQC617 WQL605 WQPA601_RFOUT_HB.1 [21] WQPA601_RFOUT_HB.2 TX_G_HB 2.0nH G_PA_ON0 [22] 100pF WQPA601 WQC601 22pF MSM 1 2 3 4 5 6 7 8 [5,23,24,27] MSM_PA_R0 WQC604 22pF [5,23,24,27] MSM_PA_R1 PMIC [21] WQC603 22pF WQL603 RF_IN_DCS Vbatt 12 HB_EN Vmode0 RF_OUT_DCS Vmode1 LB_EN VCC GND RF_IN_GSM RF_OUT_GSM WQC611 0.5pF DUMMY_C_0402 12 V_BAT 11 need close Vcc pin 10 9 WQC619 56pF TQM7M5013 WQC610 10nF WQC620 15pF C WQL604 WQC602 22pF WQPA601_RFOUT_LB.1 WQL602 WQC615 4.7nH TX_G_LB [22] 100pF WQC616 0.5pF DUMMY_C_0402 WQPA601_RFIN_LB.3 DA_G_LB C WQC618 WQPA601_RFOUT_LB.2 6.2nH WQC613 [27] WQC609 22uF G_PA_ON1 100pF WQC606 7pF B B MODE PA_ON_G_LB PA_ON_G_HB PA_R0 PA_R1 Low band – High-power mode H L L L Low band – Medium Power mode H L L H Low band – Low-power mode H L H L Low band – Ultra-Low-power mode H L H H High band – High-power mode L H L L High band – Low-power mode L H H L High band – Ultra-Low-power mode L H H H A A Title W06_GSM_TX_QUAD_BAND_PA Size B Document Number Date: 5 4 3 2 Rev SF4H8 Thursday, June 16, 2011 PR3 Sheet 1 25 of 32 5 4 3 2 1 GPS RX CHAIN (Close to GPS antenna) D GND WQFL701_IN.1 WQFL701_IN.2 1 DUMMY_C_0402 GND 2 C WQFL701_OUT.2 4 9.1nH GPS_M [27] GPS_P [27] 22pF WQC719 1.2pF Unbalance Port 100pF WQC725 WQL720 WQFL701_OUT.1 WQC717 Balance Port 1 SIG. LNA Matching WQC718 WQFL701_OUT1.1 WQL719 WQFL701_OUT1.2 WQFL701_OUT1.2 9.1nH 22pF C 3 GND GND WQC711 2 4 GND 3 WQCN701 W.FL2-R-SMT-1(60) SAW Filiter Matching WQFL701 SAFEA1G58FB0F00R14 Balance Port 5 D B B GSM 900 Rx GSM 1800/1900 Rx RX_G_850_900_M [27] 2.2nH 1.5nH WQL704 WQL703 12nH WQL708 [22] DUMMY_C_0201 2 3 4 RX_G_1900 Unbalance Port (1842.5MHz) GND GND Unbalance Port (1960MHz) 1.5nH WQL706 WQC724 WQFL703_OUT2_P.1 2.2nH RX_G_850_900_P [27] WQC726 WQC704 Balance Port 9 GND 8 RX_G_1800_1900_P [27] WQL701 22pF DUMMY_C_0201 GND 7 Balance Port 6 WQL702 3nH WQC703 Rev G=>2.9nH RX_G_1800_1900_M [27] GND 3 OUT GND IN 5 2.4nH 1 RX_G_1800 22pF 5 RX_G_900 GND [22] 1 OUT WQL707 [22] WQFL703_OUT1_M.1 4 2 WQL709 WQL705 WQFL703 SAFEA942MFL0F00R14 WQFL704 SAWEN1G84BH0F00R12 GND DUMMY_C_0201 10 WQC727 DUMMY_C_0201 A A DUMMY_C_0201 Title W07_RX_MATCHING / GPS Size B Document Number Date: 5 4 3 2 Rev SF4H8 Thursday, June 16, 2011 PR3 Sheet 1 26 of 32 5 4 3 2 N1 V8 V7 [5] MSM_QTR_RF_ON [5,23,24,25] MSM_PA_R1 [5,23,24,25] MSM_PA_R0 GPIO_159 GPIO_158 [23] SSBI1 SSBI2 U10 PDET_IN WQC809 PDET_IN WQC808 N5 DUMMY_C_0201 XO_QTR DUMMY_C_0201 M14 D RSVD A7 WQC801 [20] XO_QTR.1 XO_OUT_A0 PRX_LB1_INP A8 PRX_LB1_INM B9 1nF PRX_LB2_INP B8 [24] PRX_U_1500_P A11 [24] PRX_U_1500_M A12 [24] PRX_U_1700_P B12 [24] PRX_U_1700_M B11 [23] PRX_U_2100_P A9 [23] PRX_U_2100_M A10 [26] RX_G_850_900_P J13 [26] RX_G_850_900_M H13 [26] RX_G_1800_1900_P F14 [26] RX_G_1800_1900_M G14 C [26] GPS_P A4 [26] GPS_M A5 PRX_LB2_INM PRX_MB1_INP PRX_MB1_INM PRX_MB2_INP PRX_MB2_INM PRX_HB_INP T1 [5] MSM_QTR_TXBBQP R1 [5] MSM_QTR_TXBBIM R2 [5] MSM_QTR_PRXBBIP G2 [5] MSM_QTR_PRXBBIM F2 [5] MSM_QTR_PRXBBQP F1 [5] MSM_QTR_PRXBBQM E1 WQC816 WQC815 WQC813 WQC812 WQC811 WQC810 C2 [5] MSM_QTR_GPSBBQ2 D1 [5] MSM_QTR_GPSBBQ D2 [5] MSM_QTR_DAC_IREF P1 TX_MB3 GP_CLK GPRS_SYNC WXO801 4 3 GND OUT 1 2 IN GND WQC820 X2B019200BZ1H-CHZ XTAL_19.2M_OUT WQR817 100K/+-5% [20] XO_THERM WQC821 WQC818 0.1uF [21] WQR818 100K WQC819 1nF DUMMY_C_0201 DUMMY_C_0201 Thermister should be put close to 19.2MHz GND via to main GND A A1 A2 A3 A6 B1 B3 B4 D5 E4 E6 G4 [28] [28] VDD_Q_E11G8 VDD_Q_G5 VDD_Q_F11G11 VDD_Q_H5 VDD_Q_H7 VDD_Q_K4 VDD_Q_L14 VDD_Q_M5 VDD_Q_M8 VDD_Q_M10 VDD_Q_P10 VDD_Q_P11 VDD_Q_P13 VDD_Q_R5 VDD_Q_R11 VDD_Q_R13 VDD_Q_T10 VDD_Q_U5 [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] [28] E8 E9 K7 K10 L13 T5 V10 H4 M4 VDD_Q_E8 VDD_Q_E9 VDD_Q_K7 VDD_Q_K10 VDD_Q_L13 VDD_Q_T5 VDD_Q_V10 VDD_Q_H4 VDD_Q_M4 [28] [28] [28] [28] [28] [28] [28] [28] [28] P5 VDD_Q_P5 [28] U13 V13 V14 U14 DA_G_LB [25] T14 DA_G_HB [25] R14 TX_U_1500 P14 3 [24] TX_U_1700 N14 [24] TX_U_2100 [23] MSM V2 QTR_GP_CLK GPIO_152 [5] WQR816 QTR_GPRSYNC.1 [5] GPIO_153 QTR_GPDATA0 [5] GPIO_156 W5 QTR_GPDATA1 [5] GPIO_155 V5 QTR_GPDATA2 [5] GPIO_154 V4 QTR_GPRSYNC PRX_BB_IM GP_DATA0 PRX_BB_QP GP_DATA1 PRX_BB_QM GP_DATA2 W4 75R PRX_ADC_CLK DNC/DRX_BB_QP GND_RF DNC/DRX_BB_IP GND_RF_01 GND_RF_02 GND_RF_03 GND_RF_04 GND_RF_05 GND_RF_06 GND_RF_07 GND_RF_08 GND_RF_09 GND_RF_10 GND_RF_11 GND_RF_12 GND_RF_13 GND_RF_14 GND_RF_15 GND_RF_16 GND_RF_17 GND_RF_18 GND_RF_19 DNC/DRX_BB_QM DNC/DRX_BB_IM GNSS_BB_I2 GNSS_BB_I1 GNSS_BB_Q2 GNSS_BB_Q1 DAC_IREF GND_RF GND_RF GND_RF RF_RBIAS GND_RF_01 GND_RF02 GND_RF_03 GND_RF_04 GND_RF_05 GND_RF_06 GND_RF_07 GND_RF_08 GND_RF_09 GND_RF_10 GND_RF_11 GND_RF_12 GND_RF_13 GND_RF_14 GND_RF_15 GND_RF_16 GND_RF_17 GND_RF_18 GND_RF_19 GND_RF_20 GND_RF_21 GND_RF_22 GND_RF_23 GND_RF_24 GND_RF_25 GND_RF_26 GND_RF_27 GND_RF_01 GND_RF_02 GND_RF_03 GND_RF_04 GND_RF_05 GND_RF_06 GND_RF_07 GND_RF_08 GND_RF_09 GND_RF10 N2 K5 L4 L5 L7 L8 M7 R4 R7 R8 T4 T7 T8 U1 U4 U7 U8 J4 J5 J7 B N4 P4 U11 T13 T11 R10 N13 N11 N10 M13 M11 L11 WQC822 VTUNE_SHDR DNC_02 DNC_03 DNC_04 DNC_05 DNC_06 DRX_HB_INP DRX_HB_INM DRX_LB1_INP DRX_LB1_INM DRX_MB2_INP DRX_MB2_INM JAM_DET DNC_14 DNC_15 DNC_16 DNC_17 DNC_18 DNC_19 DNC_20 DNC_21 DNC_22 DNC_23 DNC_24 DNC_25 DNC_26 DNC_27 DNC_28 GND_RF_01 GND_RF_02 GND_RF_03 GND_RF_04 GND_RF_05 GND_RF_06 GND_RF_07 GND_RF_08 GND_RF_09 GND_RF_10 GND_RF_11 E5 K8 E2 G1 K1 K2 D14 E14 H14 J14 F13 E13 L1 P2 U2 W8 AC2 AC10 AC11 AD4 AD10 AD11 N7 P7 P8 N8 L10 D4 5.6nF reserve for CDMA WQR819 JAM_DET 2 [5] A DUMMY_C_0201 Title W08_QTR8601 Size C Document Number Date: 4 [28] D QTR-8601-0-308NSP-TR-01 5 [28] [28] PRX_BB_IP C14 XTAL_19.2M_IN [20] VDD_Q_E7 TX_BB_IP V11 VREG_L18_V2P2 TX_MB4 TX_BB_IM WQR812 QTR8200_RBIAS.1 4.7K/+-1% [28] VDD_Q_D8D9 TX_BB_QM TX_BB_QP B B13 A13 A14 B7 B10 B14 C13 D7 D10 D11 D13 E10 F4 F5 F10 G7 G10 G13 H8 H10 H11 J8 J10 J11 K11 K13 K14 VDD_Q_B6B5 [28] C H2 [5] MSM_QTR_GPSBBI TX_MB1 TX_MB2 H1 [5] MSM_QTR_GPSBBI2 VDD_Q_D6 GPS_DRX_CLK MSM B2 X_LB4 GPSM/GNSS_INM J1 DUMMY_C_0201 DUMMY_C_0201 DUMMY_C_0201 DUMMY_C_0201 TX_LB2 GPSP/GNSS_INP J2 DUMMY_C_0201 DUMMY_C_0201 DUMMY_C_0201 DUMMY_C_0201 DRX_LB2_INP DRX_MB1_INM L2 WQC814 TX_LB1 TX_LB3 T2 [5] MSM_QTR_TXBBIP VDD_RF3_03/VDD_RF_XO PRX_HB_INM B5 B6 D6 D8 D9 E7 E11 F11 G5 G8 G11 H5 H7 K4 L14 M5 M8 M10 P10 P11 P13 R5 R11 R13 T10 U5 DRX_MB1_INP MSM [5] MSM_QTR_TXBBQM VDD_RF2_01 VDD_RF2_02 VDD_RF2_03 VDD_RF2_04 VDD_RF2_05 VDD_RF2_06 VDD_RF2_07 VDD_RF3_01/VDD_RF_DIG_01 VDD_RF3_02/VDD_RF_DIG_02 DRX_LB2_INM C1 WQC817 VDD_RF1_01 VDD_RF1_02 VDD_RF1_03 VDD_RF1_04 VDD_RF1_05 VDD_RF1_06 VDD_RF1_07 VDD_RF1_08 VDD_RF1_09 VDD_RF1_10 VDD_RF1_11 VDD_RF1_12 VDD_RF1_13 VDD_RF1_14 VDD_RF1_15 VDD_RF1_16 VDD_RF1_17 VDD_RF1_18 VDD_RF1_19 VDD_RF1_20 VDD_RF1_21 VDD_RF1_22 VDD_RF1_23 VDD_RF1_24 VDD_RF1_25 VDD_RF1_26 RF_ON PA_R1 PA_R0 M2 M1 [5] MSM_QTR_SSBI1 [5] MSM_QTR_SSBI2 1 WQU801A Rev E=>connect to GND MSM Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 27 of 32 5 4 3 VDD_RF1 VDD_RF2 VREG_S2_V1P3 VREG_S4_V2P2 2 WQR904 VREG_S2_V1P3 WQR918 TX Oscillator remember to group all bypass capacitors connected to the same GND WQR903 0/+-5% [27] VREG_BTFM_V1P3.1_A 0/+-5% WQC926 1uF [27] VDD_Q_K7 [27] VDD_Q_V10 [27] VDD_Q_E8 [27] WQC927 1uF [27] D WQR906 QTR GPS circuit VDD_Q_B6B5 [27] TX Oscillator VDD_Q_U5 0/+-5% WQC902 4.7uF WQL901 47nH WQC908 220pF [27] 0/+-5% [29] VDD_AF6 [29] VDD_AJ6 [29] VDD_AJ8 [29] D WQC937 100nF TX LO low band VDD_Q_P10 VDD_AG4 WQC936 100nF WQR921 WQC906 180pF 0/+-5% WQR902 [29] 0/+-5% RX Oscillator WQC901 4.7uF VDD_Q_F11G11 WQR910 VDD_Q_T5 0/+-5% VDD_Q_D8D9 1 VDD_BT_FM VDD_Q_K10 [27] VDD_Q_L13 [27] VDD_Q_E9 [27] VDD_AK6 [29] [27] VDD_AK4 [29] [27] TX LO high band VDD_Q_M10 WQR909 16V VDD_Q_E11G8 WQC903 4.7uF [27] PRX LO [27] 0/+-5% VREG_L7_V1P8 DRX LO VDD_Q_H7 WQR911 GPS/SHDR Oscillator & LO VDD_Q_D6 VDD_Q_P5 [27] XO 1.8 needs good isolation, remember to let all bypass capacitors connected to the same GND VDD_Q_M8 [27] VREG_S3_V1P8 WQC912 180pF 0/+-5% WQL903 TX PLL VDD_Q_R5 WQC913 220nF 10nH WQR914 WQC914 220pF TCXO supply 0/+-5% RX Oscillator C WQR920 [27] WQC911 16V 180pF 0/+-5% WQR912 0/+-5% WQR915 [27] WQC935 100nF C Place WQC938 close to star connection WQR925 RX PLL VDD_Q_K4 [27] VDD_RF3 0/+-5% VDD_Q_M4 [27] VDD_Q_H4 [27] WQC938 100nF GPS/SHDR PLL VDD_Q_G5 [27] VDD_Q_E7 [27] 0/+-5% WQR907 Pre Driver Amplifier VDD_Q_R11 WQC916 4.7uF VDD_Q_T10 [27] WQC925 4.7uF RX/TX/SBI Digital VDD_Q_M5 0/+-5% [27] VDD_Q_P11 [27] B Driver Amplifier SDHR/Digital GPS VDD_Q_H5 VDD_Q_L14 WQC923 180pF [27] B WQR945 [27] Pre Driver Amplifier 0/+-5% VDD_Q_P13 =>Indicates star connections [27] [27] WQC904 4.7uF WQC920 180pF Driver Amplifier VDD_Q_R13 [27] A A 5 4 3 2 Title W09_QTR8601_PWR Size Custom Document Number Date: Rev SF4H8 Thursday, June 16, 2011 PR3 Sheet 1 28 of 32 5 4 3 FM Y8 [28] VREG_BTFM_V1P3.1_A VDD_WCA_FM_02 AA13 VDD_WCA_FM_03 AC13 AD14 AB14 VDD_AF6 [28] VDD_WCA_BT_02 AG4 VDD_AG4 [28] VDD_WCA_BT_03 AJ6 VDD_AJ6 [28] VDD_WCA_BT_04 AJ8 VDD_AJ8 [28] VDD_WCA_BT_05 AK4 VDD_AK4 [28] VDD_WCA_BT_06 AK6 VDD_AK6 [28] VDD_WCA_DIG AB5 VDD_WCA_DIG AB8 VDD_WCA_DIG AC8 VDD_WCA_FM_05 FM_LNA_RX_P FM_LNA_RXTX VDD_WCA_IO FM_RDS_INT AG2 FM_I2S_WS AE2 FM_I2S_SD AK3 FM_I2S_SCK AC1 I2C_SCL [5] WCA_I2C_SDA AB1 I2C_SDA [5] QTR_SYS_RST_N AE4 SYS_RST_N AF5 WCA_RBIAS AD5 XO_WCA MSM [5] WCA_I2C_SCL VDD_WCA_BT_01 AF6 VDD_WCA_FM_04 AE1 BT_HOST_WAKE BT_EXT_WAKE WQC1005 XO_WCA.1 B AF8 AK2 AK1 AJ2 AJ1 AK5 Y5 Y10 Y13 AA5 AA8 AA11 AA14 AB10 AB11 AC5 AC14 AD8 AF4 AF7 AF9 AF10 AG5 AG6 AG7 AG8 QTR8200_WCA_RBIAS.1 22pF *Need confirm from QCT 19.2MHz is required WQR1002 10K/+-1% pay attention to the AF5 and AC5 pin DNC_01 DNC_02 DNC_03 DNC_04 DNC_05 DNC_06 GND_WCA_01 GND_WCA_02 GND_WCA_03 GND_WCA_04 GND_WCA_05 GND_WCA_06 GND_WCA_07 GND_WCA_08 GND_WCA_09 GND_WCA_10 GND_WCA_11 GND_WCA_12 GND_WCA_13 GND_WCA_14 GND_WCA_15 GND_WCA_16 GND_WCA_17 GND_WCA_18 GND_WCA_19 GND_WCA_20 Y7 VREG_L24_V1P2 WQL1007 WQC1014 D VREG_L24_V1P2.1 4.7nH 100nF WQC1015 PMIC VREG_S3_V1P8 100nF V1 W7 SLEEP_CLK BT_CLK_PWR_REQ AA7 AE5 BT_RF_IOP AK7 BT_RF_IOM AK8 UART_RTS UART_CTS UART_TXD UART_RXD W1 W2 Y1 Y2 PCM_SYNC PCM_CLK PCM_IN PCM_OUT AA4 Y4 AA1 AA2 BT_ACTIVE BT_PRIORITY WLAN_ACTIVE AB7 AC7 AD7 GND_WCA_21 GND_WCA_22 GND_WCA_23 GND_WCA_24 GND_WCA_25 GND_WCA_26 GND_WCA_27 GND_WCA_28 AG10 AJ4 AJ5 AJ7 AJ13 AJ14 AK13 AK14 C XO_OUT_D0 C Refer to QCT: Please find the required configuration if you would like to disable the BT/FM functions on QTR (TS not disable): - QTR-BT BT_ACTIVE connect GND. BT_PRIORITY connect GND. WLAN_ACTIVE connect GND. SLEEP_CLK connect GND. BT_CLK_PWR_REQ connect GND. BT_RF_IOP leave this pin to open. BT_RF_IOM leave this pin to open. unused BT digital I/O (UART,PCM) connect GND. - QTR-FM VDD_WCA_FM connect GND. FM_LNA_RX_P leave this pin to open. FM_LNA_RXTX leave this pin to open. FM digital I/O connect GND. FM_RDS_INT connect GND. FM_I2S_SCK connect GND. FM_I2S_SD connect GND. FM_I2S_WS connect GND. B QTR-8601-0-308NSP-TR-01 1.Place WQC1010 and WQC1009 next to BALUN for common mode rejection 2. Pin AJ13 need through "VIA" connect to main ground independently and the trace width=10 mil A 1 PMIC BT VDD_WCA_FM_01 Y11 AB13 D [20] 2 WQU801B =>Indicates star connections Need two group :one group(Y8) +one group (Y11, AA13, AB13, AC13) A Title W10_QTR8601_WCA Size B Document Number Date: 5 4 3 2 Rev SF4H8 Thursday, June 16, 2011 PR3 Sheet 1 29 of 32 5 4 3 2 1 D D Antanna match 2 WCN1101 W.FL2-R-SMT-1(60) GND WWR1101 1nH SIG. GND 33pF 4 3 WWL1105 3.9nH WWL1101 0.5pF 1 WWU1101_RF_ANT.3 WWU1101_RF_ANT.2 WWU1101_RF_ANT.1 GND WWC1110 WWL1106 DUMMY_C_0402 MSM MSM WWU1101 [4] WLAN_SDIO_DATA0 26 [4] WLAN_SDIO_DATA1 22 [4] WLAN_SDIO_DATA2 24 [4] WLAN_SDIO_DATA3 21 [4] WLAN_SDIO_CMD 23 25 [4] WLAN_SDIO_CLK SDIO_D0 WiFi I/O SDIO_D1 WiFi&BT ANT RF_ANT SDIO_D2 FM_TXP FM ANT SDIO_D3 SDIO_CMD FM_RXP SDIO_CLK FM_RXN WTP1101 *Reverse for production line Cellular Band Blocking Filter close to Antenna WM-BN-BM-02 WM-BN-BM-02 (11b/g/n+BT 2.1 EDR+FM T/RX) 14 TP_D35P50 Balun close to module WWL1104 WWU1101_FM_RXP.1 WWC1118 47pF 53 51 WWC1125 WWU1101_FM_RXP.2 FM_ANT 47nH 68pF WWL1103 100nH WWC1105 22pF WWC1102 47pF *Values depend on antenna impendance WWU1101_FM_RXN.1 52 B2B [13] C C WWC1122 18pF filter the noise GPIO146[5] GPIO169 [6] GPIO145 WLAN_RST_N 19 WLAN_WAKEUP 18 WL_GPIO0 WLAN_WAKE 20 WL_GPIO1 HOST_WAKE [5] WLAN_IRQ WL_RST_N FM_ADIO_OUT_R FM_ADIO_OUT_L MSM 7 [6] QTR_BT_UART_RTS 8 [6] QTR_BT_UART_TXD 5 6 [6] QTR_BT_UART_RXD BT_UART_RTS_N FM_TX_ADIO_L 2 [6] QTR_BT_PCM_DOUT 4 [6] QTR_BT_PCM_SYNC 3 [6] QTR_BT_PCM_BCLK 1 GPIO144 [5] BT_RST_N GPIO170 [6] GPIO147 MSM clock buffer [5] 10 BT_WAKEUP [5] 9 BT_IRQ *32.768K level must below 1.8V avoid additional current consumption and degradation in FM SNR SLEEP_CLK [16] FM_AUDIO_L [16] 46 45 WWL1102 VIN_1P2LDO_L BT_UART_RXD VIN_1P2LDO BT_UART_TXD Internal regulator VDD_FM_OUT VDD_FM_IN BT_PCM_IN 42 30 31 single ground WWU1101_VIN_1P2LDO.1 VDD_CORE_OUT VDD_CORE_IN BT_PCM_SYNC VDD_RADIO_PLL_OUT VDD_RADIO_PLL_IN BT_PCM_CLK VDD_PA_OUT VDD_PA_IN BT_RST_N SR_AVDD2P5 BT_GPIO0 BT_WAKE 11 BT_GPIO1 HOST_WAKE 16 WRF_EXTREFIN 32.768K CLK 33 32 35 34 37 36 WWU1102_OUT.2 1.8/3.3V VDDIO 27 28 3.3V 2.5V WWR1104 100K/+-0.5% WWR1105 4.7K/+-1% VREG_L11_V1P8 *Max 150mA for VDD_RADIO_PLL_OUT PMIC *Max 50mA for SR_AVDD2P5 *Max 10mA for VDDIO and VDDIO_SD WWC1108 100nF VREG_L11_V1P8 WWC1120 100nF 39 40 B GND *Max 400mA (WLAN+BT+FM) GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 PMIC WWC1111 10uF 13 15 17 47 50 54 55 GND10 GND11 SPI/SDIO 56 [6] WLAN_BT_REG_ON XTAL_PU 57 WWU1101_SPI.1 MSM *Max 200mA for VDD_CORE_OUT *Max 400mA for VDD_PA_OUT WWC1117 1uF VPH_PWR GND12 63 *Max 250mA for VDD_FM/CORE/RADIO_PLL WL_BT_REG_ON 58 29 WWC1103 4.7uF WWC1101 4.7uF WWC1112 4.7uF *Max 50mA for VDD_FM_OUT WWC1106 1uF WWU1101_SR_AVDD2P5.1 WWU1101_XTAL_PU.1 37.4MHz GPIO168 2.8~5V VBAT1 VBAT2 Clock&Control GND13 4 WWC1119 33pF X1 37.4M CLK X2 59 GND 12 GND14 GND OUT 49 48 60 2 IN 0R/+-1% 61 WWC1114 27pF WWR1103 3 1.2V 1.2V WWU1101_VDD_RADIO_PLL_OUT.1 38 1.8/2.6/3.3V VDDIO_SD Power 1.2V WWU1101_VDD_FM_OUT.1 WWU1101_VDD_CORE_OUT.1 WWU1101_VDD_PA_OUT.1 BT_PCM_OUT 62 1 WWC1113 4.7uF 41*Max 300mA output WWU1102_IN.1 WWU1102_OUT.1 WWU1102 B AUDIO 1.45V WWU1101_VIN_1P2LDO_L.1 3.3uH BT_UART_CTS_N Bluetooth I/O [6] QTR_BT_PCM_DIN FM_AUDIO_R 43 FM I/O FM_TX_ADIO_R [6] QTR_BT_UART_CTS 44 *SPI/SDIO option: VDDIO -> SPI GND -> SDIO A A 5 4 3 2 Title W11_WLAN/BT/FM_USI(WM-BN-BM-02) Size C Document Number Date: Rev SF4H8 Wednesday, June 29, 2011 1 Sheet PR3 30 of 32 5 4 3 2 1 Phone Antenna D D 1 WAPP1 CU-120220-0210 1 WQR933 [12] WQR934 WQR935 Ant_PHONE.1 ANT_R Ant_GU2100 [22] 6.2nH WAPGP1 0/+-5% 1 8.2pF C WQC635 DUMMY_C_0201 DUMMY_C_0201 C 1 Antenna short pad_001 WQC634 WAPP2 CU-120220-0210 1 2 PAD WQC633 0.5pF U1500_1700 Antenna B B 1 WAPP5 CU-120220-0210 WQR930 1 Ant_U1500_1700 [22] 0/+-5% 1 WAPGP2 WQC631 PAD WQC630 3.3pF 2 DUMMY_C_0201 Antenna short pad_001 A A Title W12_Antenna Page Size B Document Number Date: 5 4 3 2 Rev SF4H8 Thursday, June 16, 2011 PR3 Sheet 1 31 of 32 5 Date 4 Sheet 2011/02/21 3 Contents 04 Add R404 pull high to VREG_S3_V1P8 ; Remove GPIO40: GS_INT 13 Change R1301.2 pull up to VREG_S3_V1P8、 、 CN1303.3 connect to VREG_S3_V1P8 2 1 Remark Add CN1301.5: MODULE_ID 換 換 , SC-34G change to SQ-31G. ECN1301換 EU1301換 換 換 , NFA18SL307V1A45L change to KNA16150C33MA5TS. C01 12 06 Change CR101 to 62K Ohm R1207 change to 18K ohm ; Remove C1202、 、 C1203 ; X1201換 換 換 為 P/N:Q13FC1350000200 Add GPIO_142: GS_INT ; GPIO172:Module_ID ; GPIO173:CAM_RST_N ; GPIO174:CAM_VGA_PWDN Remove GPIO0: CAM_VGA_PWDN、 、 GPIO1: CAM_RST_N Change NET:CAM_I2C_SCL、 、 CAM_I2C_SDA pull up to VREG_S3_V1P8 L01 change the manufacturer of ELU1021~1205 from murata to kyocera P02 Change PR208 to PB101 ; change PC210 from 4.7uF to 22uF ; Add PC219 2011/02/23 10 5 Change eMMC to P/N: SDIN5D2-2G-T ; Add net: RST_OUT_V1P8 Add NET:RST_OUT_V1P8 2011/02/24 10 W03 Change R1001~R1009 to 10K ohm Add WQFL201. W04 Change WQC418 to 27pF, WQL413 to 10nH, WQC417 to 4.3nH, WQC420 to 0.5pF W05 5 Remove WQR601, WQR602, WQR603, WQR604, WQR605, WQR606. C501、 、 C502 change to 18pF W12 D 2011/02/27 D 12 Change WQC633 to 1.3pF, WQR933 to 0 ohm, WQR934 to 2.4pF, WQR935 to 5.6nH, WQC630 to 3.3pF Remove CN1204 2011/03/01 P02 Change PU203 to P/N:TPS78225DRVR 2011/03/02 12 A01 Change CN1201 to P/N:8195-7505-AK81 Change AC107 to Ni ; Modify value of AC108 to 4.7uF. 2011/03/03 06 12 Change NET:SPI_CS_N from GPIO46 to GPIO48 Change CN1201 to P/N:8195-7505-BK71 2011/03/04 P02 W11 Change PB101 to PB201 ; Change PC207 on board change WWL1101 to 0.5pF ; WWC1110 to 1nH ; WWL1105 to 3.9nH ; WWR1101 to 33pF 2011/05/16 A01 Change AC107 and AC108 to 4.7uF Remove AL101 and net SPK_VDD L01 2011/05/17 ELC1201 改 為 改 改 W03 Change WQC226 to 4.7nH, WQL210 to 7.5nH W12 Change WQC633 to 0.5pF, WQR934 to 6.2nH, WQC635 to NI, WQR935 to 8.2pF C C B B A A Title Size Custom 5 4 3 2 Date: Changed List Document Number Rev SF4H8 Sheet Thursday, June 16, 2011 1 PR3 32 of 32
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.5 Linearized : No Page Count : 32 XMP Toolkit : XMP toolkit 2.9.1-13, framework 1.6 About : uuid:2c8a5bb4-eb17-4ee3-8d4e-08ae72f37ffe Producer : GPL Ghostscript 8.54 Keywords : Modify Date : 2012:07:25 15:19:48+08:00 Create Date : 2011:07:06 16:26:18+08:00 Creator Tool : PDFCreator Version 0.9.3 Metadata Date : 2012:07:25 15:19:48+08:00 Document ID : 24cace0f-aa05-11e0-0000-12673494e888 Format : application/pdf Title : sf8_pcr_mb_0629_1600 Creator : PaulCWLin Description : Author : PaulCWLin Subject :EXIF Metadata provided by EXIF.tools