Panasonic G50 Schematics

User Manual: Manual Panasonic - Schematics & Service Manuals PDF

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Page Count: 11

– 11–1 –
VTCXO
VAPC
TRSW_DT [1]
BS [8]
DCSRX[8]
GSMRX[8]
TRSW_GT [1]
DCSTX [8]
GSMTX [8]
PCSRX[8]
VBAT
TRSW_PR [1]
VTX[ 8]
VSYN[8]
VRF[8]
CPL
VAPC
CPL
PA_EN [1]
RAMP[2]
RF_TXEN[1]
+
-
Mode Vc1 Vc2 Vc3
G_TX 1 0 0
D/P_TX 0 1 0
G/D_RX 0 0 0
P_RX 0 0 1
modify0512
modify0512
modify0512
modify0529
E3D
E3D
E3D
E3D E3D
E3B
R1196
JP
R1101
220
J1161
MM8430-2600
IN
1OUT 2
GND 4
GND 5
GND 3
GND 6
C1175
1u/0603
C1116
33p
C1176
1u/0603
L1102
4.7nH
R1198
1k
L1161
15nH
R1131
51
B1100
BEAD
C1141
39p
C1106
NM
R1197
JP
U1141
SHS-L090TL
GND
1ANT 2
GND
3
VC3 4
GND
5
VC1 11
D_RX
10
P_RX
9
GND
8
D/P_TX 7
GND
6
GND
12
G_TX 13
VC2 14
GND
15
G_RX
16
C1107
100p
U1101
CX77314
GSM OUT 9
GND
10
VCC
11
GND
12
DCS/PCS OUT
13
DCS/PCS IN 5
BS 4
Vcmos 3
VAPC 2
GSM IN
1
GND
14
GND
15
VCC
16
GND 8
GND 7
VCC 6
C1173
10p
C1102
33p
C1113
33p R1102
2 1
4
3
R1193
51k
R1142
1k
L1142
0.5p
R1195
JP
C1114
JP
C1103
10n
C1111
6.8p
R1190
51.1
C1171
33p
4.7K
4.7K
U1172
PEMB3
4
5
26
3
1
C1145
12p
C1105
NM
R1103
21
4
3
C1112
10n
C1177
10n/X7R
AN1161
C1174
1u/0603
C1178
10u/0805
C1157
NM
C1155
33p
C1172
10p
R1199
1k2
L1152
NM
C1154
22p
C1143
33p
C1184
33p
U1173
MAS9122
OUTA
1
ENA
4
ENBC
3
OUTB 8
OUTC
2
VREF 5
VCC 7
GND 6
C1101
220uF
4.7K
4.7K
U1171
PEMB3
4
5
26
3
1
C1108
10n
C1156
12p
C1182
150p
C1144
3n9
C1185
NM
R1192
51.1
C1181
68p
L1141
NM
C1180
15P
C1131
NM
L1162
15nH
U1103 AD8315
RFIN
1
ENBL
2
VSET
3
FLTR
4G5
NC 6
VAPC 7
VCC 8
L1101
JP
C1110
NM
C1115
NM
C1161
JP
U1131
LDC15D19
G/O
1
G
2
D/O
3
ISO
8
D/I 5
G6
G/I 7
CPL 4
R1191
910
11. CIRCUIT DIAGRAM
11.1. Circuit Diagram of RF Band-1
– 11–2 –
11.2. Circuit Diagram of RF Band-2
VTCXO
DCSTX
GSMTX
VRF
DCSRX
TXIN
TXIP
RXQN
LE
13MHz_BB
GSMRX
SXEN
PCSRX
VTX
VSYN
AFC
RXIP
RXEN1
RXQP
VRF
TXQP
TXQN
VRF
CLK
VRF RXIN
BS DATA
RF_TXEN
VTX
modify0522
modify0522
del C1222
E3D
modify 0529
modify 0529
E3B
E3B
E3B
E3C E3C
R1293
BEAD
R1226
2k TP7
1
TP5
1
C1224
100n
R1221
39k/1%
C1248
33p
C1228
8n2/PC
R1224
10
U1271
B7744
IN
1
G
2OUT 3
G4
TP4
1
U1261
SAFSE942
IN
1
G
2OUT 3
G4
C1271
0p5
B1241
BEAD
R1203
220/1%
C1245
22p
R1202
510/1%
C1262
15p
R1296
NM
C1214
470p
TP8
1
C1266
JP
C1204
39p/NPO U1201
CX74063
RXENA
1
TXENA
2
PCO
3
VCXO_EN
4
PDETVCC
5
VCC1
6
TXCPO
7
TXINP
8
LNA900IN
9
GNDLNA900
10
LNA1800IN
11
PDET
12
LNA1900IN
13
NC
14
NC
15
PAVAPC
16
BBVAPC
17
TXIP
18
TXIN
19
TXQP
20
TXQN
21
TXIFP
22
TXIFN
23
VCC2
24
CAPIP
25
CAPIN
26
CAPQP
27
CAPQN
28
LPFADJ 29
XTALBUF 30
GNDD 31
VCCD 32
VCCF 33
XTAL 34
GNDFN 35
UHFCPO 36
VCCFN_CP 37
SXENA 38
XTALTUNE 39
DATA 40
CLK 41
LE 42
VDDBB 43
UHFBYP 44
UHFTUNE 45
VCCUHF 46
VCC3 47
RXQN 48
RXQP 49
RXIN 50
RXIP 51
VCC4 52
VCCTXVCO 53
TX900 54
TX1800/TX1900 55
TXVCOTUNE 56
R1225
5k6
C1252
180R
C1243
22p
C1249
33n
R1294
JP
C1272
0p5
C1216
100n
C1225
1n
TP1
1
R1231
NM
C1291
NM
R1206
51
R1292
100nF
R4
100n
C1253
33p C1250
2p7
C1212
NM
B1222
BEAD
C1223
22p
L1271
3n9
C1229
220p
C1254
18p
R1222
10
C1242
10u
R1204
390
TP9
1
C1230
100n
C1203
2.2n/X7R
C1215
470p
C1202
39p/NPO
C1211
22p
C1221
22p
L1241
27n
TP10
1
C1247
10p
C1213
NM
R1223
10
C1241
0.1u
R1205
510
TP2
1
C1227
680p
L1272
3n9
C1244
100n
C1265
15p L1261
8n2
C1246
100n
C1205
100p
C1267
12p
L1201
180n/0603
R1291
NM
TP6
1
R1207
10
U1272
B7740
IN
1
G
2OUT 3
G4
C1226
10p
TP3
1
R1295
JP
R1297 JP
1
2
3
L1211
82n
B1221
BEAD
U1291
VTCXO
Vcc 4
Vc 1
GND
2
o/p
3
R1232
10k
– 11–3 –
D[0..15]
ADD[1..22] ADD1
ADD10
ADD15
ADD4
ADD20
D1
D3
D14
D15
ADD6
D13
ADD3 D2
D8
D11
ADD2
ADD13
ADD5
ADD11
USC3
D10
ADD17
ADD16
ADD7
ADD21
ADD9
USC2
ADD12
ADD14
ADD19
USC5
D0
D4
D7
ADD8
USC4
D5
D6
ADD18
D9
D12
ADD22
TMS
TDI
TDO
TCK
USC6
USC0
USC1
BSOFS
D[0..15]
SIM_IO
VRTCVMEM VMEM
VCORE VMEM
VMEM
VMEM
VCORE SI MVCC
LCD_NRST
YMU_AVCC _ON
BL_LCD
VIB_ON
YMU_IRQ
PJ_ACC_IN
CHG_DET
CHG_EN
NRESET
SYS_PWR_ON
KEYROW_0
KEYROW_2
KEYROW_3
KEYROW_4
KEYROW_1
KEYCOL_0
KEYCOL_1
KEYCOL_2
KEYCOL_3
KEYCOL_4
BBCLK
RD
HWR
LWR
WE
ROMCS
RAMCS
TRSW_PR
TRSW_DT
LE
TRSW_GT
RF_TXEN
PA_EN
SXEN
DATA
BSDI
BSIFS
ASDI
CLKOUT_GATE
BSDO
VSDO
ASDO
ASFS
ARSM
ATSM
CLK_OUT
VBC_RESET
VSFS
VSDI
ADD[1..22]
POWER_ON
CHG_GAT E_IN
CLKON CLK
EOC
SIM_ON
SIM_CLK
SIM_RESET
RXEN1
TXEN
RXEN
YMU_CS
LCD_ CS
SIM_PROG
BL_KEY
MIC_ON
USC1
USC2
LCD_CTL
GPIO10
LCD_ID
PJ_FUNC_SEL
TP107
TP_GPIO17
1
C103
0.1U/0402C
C102
0.1U/0402C
TP130
TX
1
C101
0.1U/0402C
C107
0.1U/0402C
C108
0.1U/0402C
C113
TBD
C109
0.1U/0402C
C110
0.1U/0402C
TP129
RX
1
C105
0.1U/0402C
X101
MC-146
+
BAT101
SEIKO XH414H
C111
0.1U/0402C
R107
TBD
1 2
3 4
R103
TBD
1 2
3 4
TP124
RXEN
1
TP102
TP_GPIO14
1
TP128
GPCS1
1
TP109
TMS
1
TP125
TP_GPIO11
1
U101
AD6525
ADD0
H4
ADD1
J3
ADD2
J2
ADD3
J4
ADD4
K3
ADD5
K2
ADD6
K4
ADD7
L4
ADD8
L1
ADD9
L3
ADD10
L5
ADD11
M1
ADD12
M2
ADD13
N1
ADD14
P1
ADD15
N2
ADD16
P2
ADD17
N3
ADD18
M3
ADD19
P4
ADD20
N4
ADD21
M4
ADD22(nDISPLAYCS)
P5
KEYPADROW0
A6
KEYPADROW1
F4
KEYPADROW2
D4
KEYPADROW3
B5
KEYPADROW4
A5
KEYPADCOL0
C4
KEYPADCOL1
E4
KEYPADCOL2
B4
KEYPADCOL3
A4
KEYPADCOL4
C3
CLKIN
L12
CLKON
G14
OSCOUT
B3
OSCIN
A3
PWRON
B2
RESET
N14
USC0 C14
USC1 D12
USC2 A14
USC3 A13
USC4 E11
USC5 C12
USC6 B13
GPIO_0
D11
GPIO_1
D10
GPIO_2
B12
GPIO_3
C11
GPIO_4
D9
GPIO_5
B11
GPIO_6
A11
GPIO_7
C10
GPIO_8
D8
GPIO_9
A10
GPIO_10
C9
GPIO_11
C7
GPIO_12
B9
GPIO_13
A9
GPIO_14
B8
GPIO_15
A8
GPIO_16
D6
GPIO_17
B7
GPIO_18
H14
GPIO_19
H13
GPIO_20
J12
GPIO_21
J11
JTAGEN K11
DATA0 N6
DATA1 P6
DATA2 M6
DATA3 N7
DATA4 M7
DATA5 L7
DATA6 P8
DATA7 N8
DATA8 M8
DATA9 P9
DATA10 M9
DATA11 P10
DATA12 N10
DATA13 M10
DATA14 P11
DATA15 N11
RD M11
HWR N12
LWR P13
WE P14
ROMCS M13
RAMCS M14
GPCS0
M12 GPCS1
L13
TXPA (GPO_2) G13
PA_NEGBIAS (GPO_4) H12
TXPHASE (GPO_7) F14
DCS_SW_SYNC (GPO_8) F13
DCS_SW_DRV (GPO_9) H11
SM_SW_SYNC (GPO_10)
F12
GSM_SW_DRV (GPO_11)
E14
TX_GSM (GPO_16) E13
ADD23(TX_DCS)GPO_17 G11
(OTH_EN)GPO_18 E12
(OTH_VLO_EN)GPO_19 D14
(OTH_DATA)GPO_20 D13
(OTH_CLK)GPO_21 F11
(RXON)GPO_0 B1
(TXON)GPO_1 C2
GPO_3 G12
CLKOUT D1
CLKOUT_GATE D2
(VBCRESET)GPO_24 E1
(ARSM)GPO_5 A1
(ATSM)GPO_6 C1
ASDI E2
ASDO F1
ASFS F2
BSDO F3
BSOFS G4
BSDI G2
BSIFS G1
VSDI G3
VSDO H3
VSFS H2
nDISPLAYCS(LCDCTL)
M5 SIMDATAOP J13
SIMCLK K12
SIMRESET (GPIO_23) L10
SIMSUPPLY (GPIO_24) K13
SIMVPROG (GPIO_22) J14
BACKLIGHT0 (GPO_22)
A7 BACKLIGHT1 (GPO_23)
C5
GPIO_32(WAIT)
L14
GND1
J1
GND2
K1
GND3
P3
GND4
L6
GND5
L8
GND6
P12
GND7
L11
GND8
C13
GND9
A12
GND10
D7
GND11
B6
VSSRTC
D3
VCC1 H1
VCC2 P7
VCC3 K14
VCC4 C8
VSIM L9
VMEM1 L2
VMEM2 N5
VMEM3 N9
VMEM4 N13
VEXT1 B14
VEXT2 B10
VEXT3 C6
VEXT4 D5
VPEG1 E3
VDDRTC A2
R101
0R/0402R
TP106
TP_USC0
1
TP115
TP_USC2
1
TP101
TP_CLKOUT
1
TP126
TP_GPIO5
1
TP113
TP_USC1
1
TP110
TDI
1
TP116
TP_USC5
1
TP112
TP_USC3
1
TP114
TP_USC4
1
TP118
TP_USC6
1
R102
10M/0603R
TP111
TDO
1
C106
0.1U/0402C
TP108
TCK
1
C104
0.1U/0402C
C112
0.1U/0402C
TP123
TP_GPIO32
1
TP105
TP_GPIO16
1
TP122
TP_JTAGEN
1
TP104
TP_GPIO9
1
C114
TBD
R105
100K/0402R
R106
100K/0402R
11.3. Circuit Diagram of GSM Processor
– 11–4 –
ADC6
ADC5
PCB_Temp
Charging T emp
VANA VCOREVMEM VCORE
VANA
VANA
VANA
VANA
VMEM
TXIP
TXIN
TXQN
TXQP
RXIP
RXQP
RXQN
VOUTNORP
VOUTNORN
VOUTAUXP
VOUTAUXN
VSDI
ASDI
VSFS
ASDO
ASFS
VSDO
BSDO
ATSM
ARSM
CLK_OUT
VBC_RESET
CLKOUT_GATE
AFC
RAMP
VINNORP
VINAUXP
VINAUX N
VINNORN
BATTEMP
BSDI
BSIFS
BSOFS
BUZZ ER
TXEN
RXEN
BAT_VOLTAGE
RXIN
C214
10nF/0402C
R201
100K/4P2R
1 2
3 4
R210
100K/0402R /1%
TP205
BSDI
1
R207
100K/4P2R
1 2
3 4
C217
0.1U/0402C
TP208
BSOFS
1
C201
2.2U/0603C
TP206
BSDO
1
C202
0.1U/0402C
R206
100K/0402R
R211
200K/0402R /1%
NTC
R209
100K/N TC/0402R
C207
0.1U/0402C
C216
0.1U/0402C
NTC
R212
100K/N TC/0402R
U201
AD6521
ITXP F9
ITXN E9
QTXN C9
QTXP D9
IRXP E10
IRXN D10
QRXP C10
QRXN B10
AFCDAC A10
RAMPDAC H9
REFOUT A7
REFCAP A8
AUXADC1 A6
AUXADC2 A5
AUXADC3 B5
AUXADC4 A4
VINAUXP H10
VINAUXN G10
VINNORP J10
VINNORN K10
BUZZER J6
VOUTNORP K8
VOUTNORN K7
VOUTAUXP K9
VOUTAUXN K6
ASDI
H1
ASFS
H2
ASDO
J1
VSFS
D2
VSDO
D1
VSDI
E1
BSOFS
E2
BSDO
F1
BSIFS
F2
BSDI
G2
RESET
K1
MCLKEN
K2
MCLK
J2
ATSM
K3
ARSM
J3
TXON
K4
RXON
J4
IDACOUT
B4
IDACREF
A3
TDI
B2
TDO
B1
TMS
C2
TCK
C1
AVDD1 F10
AVDD2 A9
AVDD3 J8
DVDD1 A1
DVDD2 G1
DVDD3 K5
AGND1
G9 AGND2
B8 AGND3
J7 AGND4
B3
DGND1
A2
DGND3
J5
NC(MICCAP)
J9
NC(REFCAP2)
B9
AUXADC5 B6
AUXADC6 B7
C213
0.1U/0402C
C212
0.1U/0402C
C204
0.1U/0402C
C203
0.1U/0402C
R213
100K/0402R
R208
200K/0402R /1%
TP201
TP_VBCRST
1
C218
2.2U/0603C
C205
0.1U/0402C
C206
0.1U/0402C
TP203
ADC5
1
TP202
TP_BUZZER
1
TP204
ADC6
1
C215
0.1U/0402C
TP207
BSIFS
1
11.4. Circuit Diagram of Voiceband, Baseband and Codec
– 11–5 –
POWERON_ IN VANA
SIMVCC
VANA
VCORE
VRTC VCORE
VRTC VMEM SIMVCC
VTCXO
VTCXO
VBAT
VBAT
VMEM
VBAT
VBAT
VTCXO
BBCLK
POWER_KEY
POWER_ON
CHG_EN
BATTEMP
KEYROW_4
SYS_PWR_ON
EOC
CHG_GAT E_IN
CLKON
BAT_VOLTAGE
SIM_ON
CHG_DET
SIM_PROG
CLKON
13MHz_BB
NRESET
22K 22 K
TP303
POWERON_KEY
1
C301
4.7U/0805C
C311
0.1U/0402C
R307
1M/0402R
C304
4.7U/0805C C305
4.7U/0805C
C306
4.7U/0805C
R301
100K/0402R
R314
TBD
C307
2.2U/0805
C317
10N/0402C
U312
CRS03
1 2
C325
39pF
U311
CRS03
1 2
C324
18pF
TP307
CHR_ DET
1
R303
0.3/0805R
C318
68pF
TP306
CHG_EN
1
U306
BLM55C9V1
1 2
TP302
TP_GND
1
C308
1U/0603C
F302
FULSE/0603
C312
10N/0402C
TP301
TP_VBAT
1
R311
TBD
C310
2.2U/25V/0805C
U301
ADP3522XCP-3.0
PWRONIN
29
PWRONKEY
30
ROWX
31
SIMEN
1
VRTCIN
2VRTC 3
BATSNS
4
MVBAT 5
CHRDET 6
CHRIN
7
GATEIN
10
GATEDR
9
ISENSE
12
EOC 13
CHGEN
14
RESCAP 15
RESET 16
VSIM 18
VBAT2
19
VMEM 20
VCORE 21
VBAT
22
VAN 23
VTCXO 25
REFOUT 26
AGND
27
TCXOEN
28
DGND
11 NC 17
NC 24
NC 32
SIMVSEL
8
CON301
BAT_CON
VBAT
1
BAT_TEMP
2
GND
3
CON302
P_JACK
11
22
C321
0.1U
TP304
EOC
1
T301
1 2
C309
10N/0402
R3
TBD
R309
10K
U302 DAN222
3
1
2
TP305
CHG_GAT E_IN
1
R302
100K/0402R
C319
0.01U/040 2C
U305 NC7SZU04P5X
D
1
A
2
GND
3Y4
VCC 5
R313
0R
C322
0.1U
U307
FDC640P
3
4 1
2
5
6
C323
0.1U
C303
0.1U/0402C
R310
10K
C302
0.1U/0402C
U309
SI3443DV
3
4 1
2
5
6
U308
EMD2
34
5
61
2
L301
2.2uH/060 3R
11.5. Circuit Diagram of Power Management System
– 11–6 –
D8
D6
D5
D2
D1
D12
D9
D7
D0
D4
D3
D11
D10
D14
D13
D15
ADD19
ADD3
ADD21
ADD10
ADD1
ADD18
ADD4
ADD14
ADD2
ADD16
ADD12
ADD20
ADD13
ADD11
ADD5
ADD15
ADD9
ADD6
ADD7
ADD17
ADD8
D[0..15]
ADD[1..22]
CE2s
WP -ACC
CI Os
CI Of ADD22
D[0..15]
SIM_IO
VMEM
VMEM
SIMVCC
VMEM
ADD[1..22]
RD
HWR
LWR
WE
ROMCS
RAMCS
NRESET SIM_CLK
SIM_RESET
GPIO10
C404
33pF
C401
0.1U/0402C
U401
AMD (64+16PS)
NC0 F9
A15 D9
A14 F8
A13 E8
A12 D8
A11 C8
A10 F7
A9 E7
A8 C7
A7 C3
A6 D3
A5 E3
A4 F3
A3 D2
A2 E2
A1 F2
A0 G2
WE
C6
CE2s
D6
CEf
H2
UB
D4
DQ0
J3
DQ8
K3
DQ1
G4
CE1s
J2
LB
C4
DQ2
K4
RESET
D5
DQ3
H5
A19 D7
DQ9
H4
A18 E4
A17 F4
WP/ACC
C5
OE
H3
A16 G9
DQ4
H6
RY/BY
E5
DQ10
J4
DQ5
K7
CIOs
K6
SA
G8
CIOf
H9 A20 E6
DQ6
G7
VCCf J5
DQ7
J8
VCCs J6
DQ11
K5
VSS
G3
DQ12
J7
DQ13
H7
DQ14
K8
DQ15/A-1
H8
VSS
J9
A21 E9
R406
TBD C405
22pF
TP405
GND
1
R407
0R/0402R
R404
150R/1%/0402
R401
0R/8P4R
1
2
3
4 5
6
7
8
R403
10K/0402
R405
100K/0402
TP404
TP_SIMIO
1
TP401
TP_SIMVCC
1
TP403
TP_SIMCLK
1
TP402
TP_SIMRST
1
J401
SIM SOCKET
GND 6
VPP 4
I/O 2
CLK
1
RST
3
VCC
5
C403
0.1U/0402C
C402
TBD
11.6. Circuit Diagram of Memory & SIM
– 11–7 –
11.7. Circuit Diagram of Audio 1
D[0..15]
D0
D1
D2
D3
D4
D5
D7
D6
ADD2
ADD[1..22] D[0..15]
VBAT
YMU_AVCC
VMEM
YMU_AVCC
VOUTNORN
VOUTNORP
YMU_AVCC _ON
WE
RD
YMU_CS
CLK_OUT
YMU_IRQ
NRESET HPOUT
VOUTAUXN
YMU_VIB
ADD[1 ..22]
SPK1
SPK2
BUZZ ER
SPK1 SPK2
VREF R514
10K/0402R
U507 ESDA
I/O 1
1
GND1
2
I/O 3
3I/O 4 4
GND2 5
I/O 6 6
C529
TBD
R522
0R/0402
LS501
SPEAKER
C527
TBD/0402
C528
0.01U
C516
33P/0402C
C531
33P/0402C
C519
0.1U
R521
100K
C522
TBD/0402C
LS502
RECEIVE R - B
T503 - B(TBD)
1 2
T504 - B(TBD)
1 2
T501(TBD)
1 2
C530
0.1U/0402C
R508
20K/0402R
C515
33P/0402C
TP501
TP_SPK-P
1
T502(TBD)
1 2
R504
0R/0402R
R509
47K/0402R
R503
0R/0402R
C520
TBD/0402
C525
2.2U/0603
U506
YMU762(MA3L2)
EXT1
2
VSS
8
VREF 9
EQ1 12
EQ2 13
EQ3 14
SPVDD 15
SPVSS
16 SPOUT1 17
SPOUT2 18
EXT2
19
D1
26 D0
27
/WR
28
SDIN(/CS)
29
SYNC(A0)
30
SCLK(/RD)
31
SDOUT(IOVDD)
32
IFSEL(NC)
5
PLLC
6
VDD
7
D2
25
D3
24
D4
23
D5
22
D6
21
D7
20
HPOUT-L/MONO 10
HPOUT-R 11
/IRQ
3
/RST
4
CLKI
1
C521
0.1U/0402C
C526
4.7U/0805
C523
33P/0402C
U505
SC1563ISK-3.0
N
1
I
2
C
3G4
O5
C524
33P/0402C
C532
33P/0402C
C517
10N/0402C
R510
TBD
C513
0.1U/0402C
TP503
HPOUT_R
1
C518
200P/0402C
C512
0.1U
C511
TBD/0402C
TP502
TP_SPK-N
1
– 11–8 –
11.8. Circuit Diagram of Audio 2
MIC_PWR
EXT_MIC
GND
ACC_ IN
SPK
TX
MIC/RX
MIC_PWR
VBAT MIC_PWR
MIC_PWR
VMEM
VMEM
YMU_AVCC
MIC_ON
VINAUXP
VINAUXN
VINNORP
VINNORN
VOUTAUXP
PJ_ACC_IN
USC1
USC6
USC2
PJ_FUNC_SEL
HPOUT
TX GNDMIC/ RX SPK
R603
0/0402R
R602
4.7K/0402R
R628
TBD/0402R
C605
TBD/0402C
C620
0.1U
0
1
U603
NC7SB3157
B1
1
VCC 5
B0
3A4
GND
2
S6
MIC601
MICROPH ONE - B
1
2
R629
TBD/0402R
T605 - B(TBD)
1 2
R609
1M
C622
0.1U/0402C
C612
TBD/0402C
U605 ESDA
I/O 1
1
GND1
2
I/O 3
3I/O 4 4
GND2 5
I/O 6 6
T602(TBD)
1 2
T604 - B(TBD)
1 2
T603(TBD)
1 2
R621
0R
C614
0.1uF
R639
1MR
R641
8.2K
C615
33P/0402C
C626
10U/0805C
TP601
TP_MIC
1
C623
100P/0402
R623
0R
R611
0R
R624
0R
R625
0R
C628
10uF/0805
R615
47K
C603
0.1U/0402C
R637
100K/0402R
R626
2.4K/0402R
C624
100P/0402
T601 - B(TBD)
1 2
C616
10uF/0805
C630
2.2uF/0603
R630
0R
R632
TBD
R640
100K
C629
2.2U/0603C
R620
0R
C621
0.1U
C606
TBD/0402C
C627
0.1U/0402C
J601
PHONEJACK-B
2
3
6
5
4
1
C602
10U/0805C
R642
TBd
C601
10N/0402C
U601
LP2985AIMX5-2.5
N
1
I
2
C
3G4
O5
R606
1.2K/1%
R643
0R
C631
0.1U
C611
33P/0402C
T607 - B(TBD)
1 2
C610
33P/0402C
R633
100K/0402R
C608
33P/0402C
T606 - B
1 2
C607
33P/0402C
R610
1M
U604 - B ESDA
I/O 1
1
GND1
2
I/O 3
3I/O 4 4
GND2 5
I/O 6 6
– 11–9 –
11.9. Circuit Diagram of User Interface
D15
D12
D11
D10
ADD2
D9
D8
D14
D13
ADD[1..22]
D[0..15]
D[0..15]
LCD_PWR LCD_PWR
VBAT
VBAT
V_LED
VBAT
LCD_PWR
V_LED VBAT
VMEM
KEYCOL_2
KEYCOL_0
KEYCOL_3
KEYCOL_1
KEYCOL_4
KEYROW_1
KEYROW_2
KEYROW_3
KEYROW_0
POWER_KEY
BL_LCD
VIB_ON
YMU_VIB
BL_KEY
LCD_ID
WE
LCD_ CS
LCD_CTL
ADD[1 ..22]
LCD_NRST
C742
0.1uF - B
C750
33pF
R707
10K - B
D704
LED - B
D707
LED - B
C740
1U/0603C
TP20
D9
1
R711
TBD
C701
2.2U/0603 -B
TP17
D12
1
C745
TBD - B
TP701
LCD_ ID
1
D701
LED - B
TP28
LCD_ PWR
1
C7
33P/0402C
C744
TBD - B
C753
18pF
D713
1SS355
C736
2.2U/0603C
TP18
D11
1
TP12
Vibrator SIG
1
R716
TBD
D710
LED - B
R712
TBD
D702
LED - B
C739
1U/0603C
TP19
D10
1
R713
100R/1%/0402R - B
TP22
LCD_ CS
1
D709
LED - B
C741
TBD - B
U702
FFB2222A - B
E1
1
B1
2
C2 3
E2 4
B2 5
C1
6
C733
0.1U/0402 -B
C748
18pF
C751
33pF
R715
0R
TP21
D8
1
U705
DAN222 - B
31
2
TP23
ADD2
1
C754
10U/0805C
R702
TBD - B
1
2
3
4 5
6
7
8
C737
10U/0805C
TP14
D15
1
TP27
GND
1
C749
18pF
C743
TBD - B
A
-
+
M701
LG COIN M OTOR
21
D703
LED - B
R706
100R/0402R - B
R709 100K
TP25
WE
1
U704
SC600BIMLTR, 5V_ 60MA
CD4
4
EN
6
VOUT 1
CF2+ 10
VIN
3
CX8
5CF1+ 2
CF1- 9
CF2- 7
GND
8
C755
TBD
TP24
LCD_NRST
1
TP15
D14
1
C735
10N/0402C
U701
Wintek DX1209K-6C LWa - B
VEE
1
VEE
2
VDD
3
VDD
4
SEL68
5
VSS
6
RD(E)
7
D7
8
D6
9
D5
10
D4
11
D3
12
D2
13
D1
14
D0
15
CS
16
RS
17
RESB
18
WR
19
VSS
20
VSS
21
CA_LED
22
CA_LED
23
AN_LED
24
AN_LED
25
N/C(VOUT)
26
D705
LED - B
R705
1K/0402R - B
R710
100K
TP13
LCD_CTL
1
R714
200R/8P4R - B
1
2
3
4 5
6
7
8
TP16
D13
1
R708
TBD - B
C752
33pF
D708
LED - B
U706
KEYPAD_HOT BAR - B
N/C
12
KEYROW_3
1
KEYCOL_4
2
KEYROW_0
3
KEYCOL_3
4
KEYROW_1
5
KEYCOL_2
6
KEYROW_2
7
KEYCOL_1
8
KEYCOL_0
9
POWER_KEY
10
GND
11
N/C
13
JP702
1
1
2
2
3
3
D706
LED - B
U703
LP2985AIMX5-3.0
N
1
I
2
C
3G4
O5
C746
18pF
R704
8.2R/0805R - B
R701
100R/1%/0402 R - B
C738
1U/0603C
TP30
V_LED
1
C747
18pF
TP29
VIB_PW R
1
– 11–10 –
11.10. Circuit Diagram of Keypad
KEYCOL_1
KEYCOL_2
KEYCOL_3
KEYCOL_4
KEYCOL_0
KEYROW_0
KEYROW_1
KEYROW_2
KEYROW_3
POWER_KEY
SW709
KEY [2]
1 2
SW717
KEY [SEND]
1 2
SW718
POWERKEY & END
1 2
SW712
KEY [9]
1 2
SW715
SOFTKEY_LEFT
1 2
SW707
KEY [8]
1 2
SW702
KEY [7]
1 2
SW710
KEY_[DOWN]
1 2
SW704
KEY [1]
1 2
SW716
SOFTKEY_RIGHT
1 2
SW713
KEY [6]
1 2
SW711
KEY [#]
1 2
SW708
KEY [5]
1 2
SW706
KEY [0]
1 2
SW705
KEY_[UP]
1 2
SW701
KEY [*]
1 2
SW714
KEY [3]
1 2
SW703
KEY [4]
1 2
– 12–1 –
12. LAYOUT DIAGRAMS
12.1. Main PCB
Z1
Z3
Z3
26
9122
L00A
227
6330
LUNA
600B
800Z
Y762C
84VD23381FJ-80
AD6525ACA
ADP3522
43
R300
640
N
S3KV
D2
S3KV
H
Z1
0
Z1

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