Meet MS-WMBM1 External Wireless Dongle User Manual

Meet International Ltd. External Wireless Dongle

User manual

Features CSR μEnergy® CSR1010™ QFN■128KB memory: 64KB RAM and 64KB ROM■Bluetooth® v4.0 specification■■-92.5dBm Bluetooth low energy receivesensitivity■Support for Bluetooth v4.0 specification hoststack including ATT, GATT, SMP, L2CAP, GAP■RSSI monitoring for proximity applications■<600nA current consumption in dormant mode■32kHz and 16MHz crystal or system clock■Switch-mode power supply■Programmable general purpose PIO controller■10-bit ADC■12 digital PIOs■3 analogue AIOs■UART■I²C / SPI for EEPROM / flash memory ICs andperipherals■Debug SPI■4 PWM modules■Wake-up interrupt and watchdog timer■QFN 32-lead, 5 x 5 x 0.6mm, 0.5mm pitch Bluetooth low energy Single-mode IC Production Information CSR1010A05 Issue 3General DescriptionCSR1010 QFN is a CSR µEnergy platform device.CSR µEnergy are CSR's single-mode Bluetooth lowenergy products for the Bluetooth Smart market.CSR1010 QFN increases application code and dataspace for greater application development flexibility.CSR μEnergy enables ultra low-power connectivityand basic data transfer for applications previouslylimited by the power consumption, size constraints andcomplexity of other wireless standards. The CSRμEnergy platform provides everything required tocreate a Bluetooth low energy product with RF,baseband, MCU, qualified Bluetooth v4.0 stack andcustomer application running on a single IC. Clock Generation I2C / SPIBluetooth LE Radio and ModemMCUI/OLED PWMPIOAIOUARTDebugRAMROM16MHz32kHzApplications■Building an ecosystem using Bluetooth lowenergyCSR is the industry leader for Bluetooth low energy,also known as Bluetooth Smart. Bluetooth Smartenables connectivity and data transfer to leadingsmartphone, tablet and personal computing devicesincluding Apple iPhone, iPad, iPod and Mac productsand leading Android devices.Bluetooth low energy takes less time to make aconnection than conventional Bluetooth wirelesstechnology and can consume approximately 1/20th ofthe power of Bluetooth Basic Rate. CSR1010 QFNsupports profiles for health and fitness sensors,watches, keyboards, mice and remote controls.Typical Bluetooth Smart applications:■HID: keyboards, mice, touchpads, remotecontrols■Sports and fitness sensors: heart rate, runnerspeed and cadence, cycle speed and cadence■Health sensors: blood pressure, thermometer andglucose meters■Mobile accessories: watches, proximity tags, alerttags and camera controls■Smart home: heating control and lighting controlProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 1 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Ordering InformationDevicePackageOrder NumberType Size ShipmentMethodCSR1010 QFN QFN‑32-lead(Pb free)5 x 5 x 0.6mm0.5mm pitch Tape and reel CSR1010A05-IQQM-RNote:The minimum order quantity is 2kpcs taped and reeled.Supply chain: CSR's manufacturing policy is to multisource volume products. For further details, contact yourlocal sales account manager or representative.CSR1010 QFN Development Kit Ordering InformationDescription Order NumberCSR1010 QFN Development Kit example design DK-CSR1010-10138-1AContactsGeneral informationInformation on this productCustomer support for this productDetails of compliance and standardsHelp with this documentwww.csr.comSales@csr.comwww.csrsupport.comProduct.compliance@csr.comComments@csr.comProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 2 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Device DetailsBluetooth Radio■On-chip balun (50Ω impedance in TX and RXmodes)■No external trimming is required in production■Bluetooth v4.0 specification compliantBluetooth Transmitter■No external power amplifier or TX/RX switchrequiredBluetooth Receiver■-92.5dBm sensitivity■Integrated channel filters■Digital demodulator for improved sensitivity and co-channel rejection■Fast AGC for enhanced dynamic rangeBluetooth StackCSR's protocol stack runs on the integrated MCU:■Support for Bluetooth v4.0 specification features:■Master and slave operation■Including encryption■Software stack in firmware includes:■GAP■L2CAP■Security manager■Attribute protocol■Attribute profile■Bluetooth low energy profile supportSynthesiser■Fully integrated synthesiser requires no externalVCO varactor diode, resonator or loop filterBaseband and Software■Hardware MAC for all packet types enables packethandling without the need to involve the MCUPhysical Interfaces■SPI master interface■SPI programming and debug interface■I²C■Digital PIOs■Analogue AIOs■UARTAuxiliary Features■Battery monitor■Power management features include softwareshutdown and hardware wake-up■CSR1010 QFN can run in low power modes from anexternal 32.768kHz clock signal■Integrated switch-mode power supply■Linear regulator (internal use only)■Power-on-reset cell detects low supply voltagePackage■32-lead 5 x 5 x 0.6mm, 0.5mm pitch QFNProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 3 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Functional Block DiagramG-TW-0005362.7.2I2C EEPROMRFUARTAUX / CLK / PSU ControlPIO and LED PWMI/OClock GenerationSMPULDOBlutetooth LE Modemand LCBluetooth RadioRAM 64KBRAM ArbiterMemory ProtectionMCUInterruptDebugTimerAES-CCS and AES EncryptionI2C / SPI Serial FlashDMAI2C / SPI Serial FlashControl State MachineROMDataCodeDebugWake-upXTAL_16M XTAL_32KPIOVDD_PADSVDDREG_IN VDD_BATSPI Serial FlashProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 4 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Document HistoryRevision Date Change Reason121 SEP 12 Original publication of this document.223 OCT 12 Updated to Production Information.320 NOV 12 Update to CSR µEnergy® branding.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 5 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Status InformationThe status of this Data Sheet is Production Information.CSR Product Data Sheets progress according to the following format:Advance InformationInformation for designers concerning CSR product in development. All values specified are the target values of thedesign. Minimum and maximum values specified are only given as guidance to the final specification limits and mustnot be considered as the final values.All detailed specifications including pinouts and electrical specifications may be changed by CSR without notice.Pre-production InformationPinout and mechanical dimension specifications finalised. All values specified are the target values of the design.Minimum and maximum values specified are only given as guidance to the final specification limits and must not beconsidered as the final values.All electrical specifications may be changed by CSR without notice.Production InformationFinal Data Sheet including the guaranteed minimum and maximum limits for the electrical specifications.Production Data Sheets supersede all previous document versions.Life Support Policy and Use in Safety-critical ApplicationsCSR's products are not authorised for use in life-support or safety-critical applications. Use in such applications isdone at the sole discretion of the customer. CSR will not warrant the use of its devices in such applications.CSR Green Semiconductor Products and RoHS ComplianceCSR1010 QFN devices meet the requirements of Directive 2002/95/EC of the European Parliament and of theCouncil on the Restriction of Hazardous Substance (RoHS).CSR1010 QFN devices are also free from halogenated or antimony trioxide-based flame retardants and otherhazardous chemicals. For more information, see CSR's Environmental Compliance Statement for CSR GreenSemiconductor Products.Trademarks, Patents and LicencesUnless otherwise stated, words and logos marked with ™ or ® are trademarks registered or owned by CSR plc or itsaffiliates. Bluetooth ® and the Bluetooth ® logos are trademarks owned by Bluetooth ® SIG, Inc. and licensed toCSR. Other products, services and names used in this document may have been trademarked by their respectiveowners.The publication of this information does not imply that any license is granted under any patent or other rights ownedby CSR plc and/or its affiliates.CSR reserves the right to make technical changes to its products as part of its development programme.While every care has been taken to ensure the accuracy of the contents of this document, CSR cannot acceptresponsibility for any errors.Refer to www.csrsupport.com for compliance and conformance to standards information.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 6 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
ContentsOrdering Information ....................................................................................................................................... 2CSR1010 QFN Development Kit Ordering Information ......................................................................... 2Contacts ................................................................................................................................................. 2Device Details ................................................................................................................................................. 3Functional Block Diagram .............................................................................................................................. 41 Package Information ..................................................................................................................................... 101.1 Pinout Diagram .................................................................................................................................... 101.2 Device Terminal Functions .................................................................................................................. 111.3 Package Dimensions ........................................................................................................................... 141.4 PCB Design and Assembly Considerations ......................................................................................... 151.5 Typical Solder Reflow Profile ............................................................................................................... 152 Bluetooth Modem .......................................................................................................................................... 162.1 RF Ports ............................................................................................................................................... 162.2 RF Receiver ......................................................................................................................................... 162.2.1 Low Noise Amplifier ............................................................................................................... 162.2.2 RSSI Analogue to Digital Converter ....................................................................................... 162.3 RF Transmitter ..................................................................................................................................... 162.3.1 IQ Modulator .......................................................................................................................... 162.3.2 Power Amplifier ...................................................................................................................... 162.4 Bluetooth Radio Synthesiser ............................................................................................................... 162.5 Baseband ............................................................................................................................................. 162.5.1 Physical Layer Hardware Engine ........................................................................................... 163 Clock Generation .......................................................................................................................................... 173.1 Clock Architecture ................................................................................................................................ 173.2 Crystal Oscillator: XTAL_16M_IN and XTAL_16M_OUT ..................................................................... 173.2.1 Crystal Specification ............................................................................................................... 183.2.2 Frequency Trim ...................................................................................................................... 183.3 Sleep Clock .......................................................................................................................................... 193.3.1 Crystal Specification ............................................................................................................... 194 Microcontroller, Memory and Baseband Logic ............................................................................................. 204.1 System RAM ........................................................................................................................................ 204.2 Internal ROM ...................................................................................................................................... 204.3 Microcontroller ..................................................................................................................................... 204.4 Programmable I/O Ports, PIO and AIO ................................................................................................ 204.5 LED Flasher / PWM Module ................................................................................................................ 215 Serial Interfaces ............................................................................................................................................ 225.1 Application Interface ............................................................................................................................ 225.1.1 UART Interface ...................................................................................................................... 225.2 I²C Interface ......................................................................................................................................... 225.3 SPI Master Interface ............................................................................................................................ 235.4 Programming and Debug Interface ...................................................................................................... 245.4.1 Instruction Cycle ..................................................................................................................... 245.4.2 Multi-slave Operation ............................................................................................................. 256 Power Control and Regulation ...................................................................................................................... 26Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 7 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
6.1 Switch-mode Regulator ....................................................................................................................... 266.2 Low-voltage VDD_DIG Linear Regulator ............................................................................................. 266.3 Reset ................................................................................................................................................... 266.3.1 Digital Pin States on Reset .................................................................................................... 276.3.2 Power-on Reset ..................................................................................................................... 277 Example Application Schematic ................................................................................................................... 288 Electrical Characteristics .............................................................................................................................. 298.1 Absolute Maximum Ratings ................................................................................................................. 298.2 Recommended Operating Conditions .................................................................................................. 298.3 Input/Output Terminal Characteristics ................................................................................................. 308.3.1 Switch-mode Regulator .......................................................................................................... 308.3.2 Low-voltage Linear Regulator ................................................................................................ 318.3.3 Digital Terminals .................................................................................................................... 318.3.4 AIO ......................................................................................................................................... 328.4 ESD Protection .................................................................................................................................... 329 Current Consumption .................................................................................................................................... 3310 CSR Green Semiconductor Products and RoHS Compliance ..................................................................... 3411 CSR1010 QFN Software Stack .................................................................................................................... 3512 Tape and Reel Information ........................................................................................................................... 3612.1 Tape Orientation .................................................................................................................................. 3612.2 Tape Dimensions ................................................................................................................................. 3712.3 Reel Information .................................................................................................................................. 3812.4 Moisture Sensitivity Level .................................................................................................................... 3813 Document References .................................................................................................................................. 39Terms and Definitions ............................................................................................................................................ 40List of FiguresFigure 1.1 Pinout Diagram ............................................................................................................................... 10Figure 3.1 Clock Architecture ........................................................................................................................... 17Figure 3.2 Crystal Driver Circuit ....................................................................................................................... 17Figure 3.3 Sleep Clock Crystal Driver Circuit ................................................................................................... 19Figure 4.1 Baseband Digits Block Diagram ...................................................................................................... 20Figure 5.1 Example of an I²C Interface EEPROM Connection ......................................................................... 23Figure 5.2 Memory Boot-up Sequence ............................................................................................................ 24Figure 6.1 Voltage Regulator Configuration ..................................................................................................... 26Figure 11.1 Software Architecture ...................................................................................................................... 35Figure 12.1 Tape Orientation ............................................................................................................................. 36Figure 12.2 Tape Dimensions ............................................................................................................................ 37Figure 12.3 Reel Dimensions ............................................................................................................................. 38List of TablesTable 3.1 Crystal Specification ......................................................................................................................... 18Table 3.2 Sleep Clock Specification ................................................................................................................. 19Table 4.1 Wake Options for Sleep Modes ........................................................................................................ 21Table 5.1 Possible UART Settings ................................................................................................................... 22Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 8 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Table 5.2 SPI Master Serial Flash Memory Interface ....................................................................................... 23Table 5.3 Instruction Cycle for a SPI Transaction ............................................................................................ 25Table 6.1 Pin States on Reset .......................................................................................................................... 27Table 6.2 Power-on Reset ................................................................................................................................ 27Table 8.1 ESD Handling Ratings ...................................................................................................................... 32Table 9.1 Current Consumption ....................................................................................................................... 33Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 9 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
1 Package Information1.1 Pinout DiagramG-TW-0005350.5.2Orientation from Top of Device13123456789 101112 14151617181920212223242526272829303132Figure 1.1: Pinout DiagramProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 10 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
1.2 Device Terminal FunctionsRadio Lead Pad Type Supply Domain DescriptionRF 7RF VDD_RADIO(a) Bluetooth transmitter / receiver.(a)The VDD_RADIO domain is generated from VDD_REG_IN, see Figure 6.1.Synthesiser andOscillator Lead Pad Type Supply Domain DescriptionXTAL_32K_OUT 2Analogue VDD_BAT Drive for sleep clock crystal.XTAL_32K_IN 3Analogue VDD_BAT 32.768kHz sleep clock input.XTAL_16M_OUT 9Analogue VDD_ANA(b) Drive for crystal.XTAL_16M_IN 10 Analogue VDD_ANA Reference clock input.(b)The VDD_ANA domain is generated from VDD_REG_IN, see Figure 6.1.I²C Interface Lead Pad Type Supply Domain DescriptionI2C_SDA 29Bidirectional, tristate,with weak internalpull-upVDD_PADSI²C data input / output or SPI serialflash data output (SF_DOUT). Ifconnecting to SPI serial flash,connect this pin to SO on the serialflash. See Section 5.3.I2C_SCL 28 Input with weakinternal pull-up VDD_PADS I²C clock or SPI serial flash clockoutput (SF_CLK), see Section 5.3.PIO Port Lead Pad Type Supply Domain DescriptionPIO[11] 25 Bidirectional withprogrammablestrength internal pull-up/downVDD_PADS Programmable I/O line.PIO[10] 24PIO[9] 23Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 11 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
PIO Port Lead Pad Type Supply Domain DescriptionPIO[8] /DEBUG_MISO 22Bidirectional withprogrammablestrength internal pull-up/downVDD_PADSProgrammable I/O line or debug SPIMISO selected by SPI_PIO#.PIO[7] /DEBUG_MOSI 20 Programmable I/O line or debug SPIMOSI selected by SPI_PIO#.PIO[6] /DEBUG_CS# 19Programmable I/O line or debug SPIchip select (CS#) selected bySPI_PIO#.PIO[5] /DEBUG_CLK 18 Programmable I/O line or debug SPICLK selected by SPI_PIO#.PIO[4] /SF_CS# 17Bidirectional withprogrammablestrength internal pull-up/downVDD_PADSProgrammable I/O line or SPI serialflash chip select (SF_CS#), seeSection 5.3.PIO[3] /SF_DIN 16Programmable I/O line or SPI serialflash data (SF_DIN) input. Ifconnecting to SPI serial flash, thispin connects to SI on the serial flash.See Section 5.3.PIO[2] 27Bidirectional withprogrammablestrength internal pull-up/downVDD_PADS Programmable I/O line or I²C power.PIO[1] /UART_RX 15 Bidirectional withprogrammablestrength internal pull-up/downVDD_PADSProgrammable I/O line or UART RX.PIO[0] /UART_TX 14 Programmable I/O line or UART TX.AIO[2] 11Bidirectionalanalogue VDD_AUX(c) Analogue programmable I/O line.AIO[1] 12AIO[0] 13(c)The VDD_AUX domain is generated from VDD_REG_IN, see Figure 6.1.Test and Debug Lead Pad Type Supply Domain DescriptionSPI_PIO# 26 Input with stronginternal pull-down VDD_PADS Selects SPI debug on PIO[8:5].Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 12 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Wake-up Lead Pad Type Supply Domain DescriptionWAKE 4Input has no internalpull-up or pull-down,use external pull-down.VDD_BAT Input to wake CSR1010 QFN fromhibernate or dormant.Power Supplies andControl Lead DescriptionVDD_BAT 1Battery input and regulator enable (active high).VDD_BAT_SMPS 32 Input to high-voltage switch-mode regulator.SMPS_LX 31 High-voltage switch-mode regulator output.VDD_CORE 5, 30 Positive supply for digital domain.VDD_PADS 21 Positive supply for all digital I/O ports PIO[11:0].VDD_REG_IN 6Positive supply for Bluetooth radio and digital linearregulator.VDD_XTAL 8Decouple with 470nF capacitor to ground.VSS Exposed pad Ground connections.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 13 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
1.3 Package DimensionsG-TW-0005351.4.3KgACBgACB32X L17162425 32JPIN 1 ID18Exposed DieAttach Pad932X bdACBMBottom ViewView M-Mee / 2PIN 1 CornerTop Vie w321DBEAcChC//CSeating PlaneMMPSSRRAA1A2A3Dimension Min Typ Max Dimension Min Typ MaxA0.50 0.55 0.60 e - 0.5 -A1 00.035 0.05 g - 0.1 -A2 -0.4 0.425 h - 0.1 -A3 -0.152 - J 3.1 3.2 3.3b0.20 0.25 0.30 K3.1 3.2 3.3c - 0.08 - L 0.35 0.40 0.45D4.9 5.0 5.1 P0.3 - -d - 0.10 - R - 0.093 -E4.9 5.0 5.1 S - 0.3 -Notes1.Coplanarity applies to leads, corner leads and die attach pad. Description 32-lead Quad-flat No-lead PackageSize 5 x 5 x 0.6mm JEDEC MO-220Pitch 0.5 Units mmProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 14 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
1.4 PCB Design and Assembly ConsiderationsThis section lists recommendations to achieve maximum board-level reliability of the 5 x 5 x 0.6mm QFN 32-leadpackage:■NSMD lands (lands smaller than the solder mask aperture) are preferred, because of the greater accuracyof the metal definition process compared to the solder mask process. With solder mask defined pads, theoverlap of the solder mask on the land creates a step in the solder at the land interface, which can causestress concentration and act as a point for crack initiation.■CSR recommends that the PCB land pattern is in accordance with IPC standard IPC-7351.■Solder paste must be used during the assembly process.1.5 Typical Solder Reflow ProfileSee Typical Solder Reflow Profile for Lead-free Devices for information.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 15 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
2 Bluetooth Modem2.1 RF PortsCSR1010 QFN contains an integrated balun which provides a single-ended RF TX / RX port pin. No matchingcomponents are needed as the receive mode impedance is 50Ω and the transmitter has been optimised to deliverpower in to a 50Ω load.2.2 RF ReceiverThe receiver features a near-zero IF architecture that allows the channel filters to be integrated onto the die. Sufficientout-of-band blocking specification at the LNA input allows the receiver to be used in close proximity to GSM andW‑CDMA cellular phone transmitters without being significantly desensitised.An ADC digitises the IF received signal.2.2.1 Low Noise AmplifierThe LNA operates in differential mode and takes its input from the balanced port of the integrated balun.2.2.2 RSSI Analogue to Digital ConverterThe ADC samples the RSSI voltage on a packet-by-packet basis and implements a fast AGC. The front-end LNAgain is changed according to the measured RSSI value, keeping the first mixer input signal within a limited range.This improves the dynamic range of the receiver, improving performance in interference-limited environments.2.3 RF Transmitter2.3.1 IQ ModulatorThe transmitter features a direct IQ modulator to minimise frequency drift during a transmit packet, which results ina controlled modulation index. Digital baseband transmit circuitry provides the required spectral shaping.2.4 Bluetooth Radio SynthesiserThe Bluetooth radio synthesiser is fully integrated onto the die with no requirement for an external VCO screeningcan, varactor tuning diodes, LC resonators or loop filter. The synthesiser is guaranteed to lock in sufficient timeacross the guaranteed temperature range to meet the Bluetooth v4.0 specification.2.5 Baseband2.5.1 Physical Layer Hardware EngineDedicated logic performs:■Cyclic redundancy check■Encryption■Data whitening■Access code correlationThe hardware supports all optional and mandatory features of Bluetooth v4.0 specification.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 16 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
3Clock GenerationThe Bluetooth reference clock for the system is generated from an external 16MHz clock source, see Figure 3.1. Allthe CSR1010 QFN internal digital clocks are generated using a phase locked loop, which is locked to the frequencyof either the external reference clock source or a sleep clock frequency of 32.768kHz, see Figure 3.1.3.1 Clock ArchitectureG-TW-0005266.2.2Fast XTAL Clockfor SystemSlow XTAL Clockfor SleepBluetooth PLL16MHz32kHzCore Digits(16MHz)Embedded Digits(32kHz)Bluetooth LO (~4.8GHz)Figure 3.1: Clock Architecture3.2 Crystal Oscillator: XTAL_16M_IN and XTAL_16M_OUTCSR1010 QFN contains crystal driver circuits. This operates with an external crystal and capacitors to form a Pierceoscillator. Figure 3.2 shows the external crystal is connected to pins XTAL_16M_IN and XTAL_16M_OUT.G-TW-0005348.1.1- CLOAD1CLOAD2XTAL_16M_INXTAL_16M_OUTCTRIMFigure 3.2: Crystal Driver CircuitProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 17 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Note:CTRIM is the internal trimmable capacitance in Table 3.1.CLOAD1 and CLOAD2 in combination with CTRIM and any parasitic capacitance provide the load capacitancerequired by the crystal.3.2.1 Crystal SpecificationTable 3.1 shows the specification for an external crystal.Parameter Min Typ Max UnitFrequency -16 -MHzFrequency tolerance (without trimming)(a)- - ±25 ppmFrequency trim range(b)-±50 -ppmDrive level - - 100 µWEquivalent series resistance - - 60 ΩLoad capacitance - 9 - pFPullability 10 - - ppm/pFTable 3.1: Crystal Specification(a)Use integrated load capacitors to trim initial frequency tolerance in production or to trim frequency over temperature, increasing the allowablefrequency tolerance.(b)Frequency trim range is dependent on crystal load capacitor values and crystal pullability.3.2.2 Frequency TrimCSR1010 QFN contains variable integrated capacitors to allow for fine-tuning of the crystal resonant frequency. Thisfirmware-programmable feature allows accurate trimming of crystals on a per-device basis on the production line.The resulting trim value is stored in non-volatile memory.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 18 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
3.3 Sleep ClockThe sleep clock is an externally provided 32.768kHz clock that is used during deep sleep and in other low-powermodes. Figure 3.3 shows the sleep clock crystal driver circuit.G-TW-0005349.2.2- CLOAD1CLOAD2XTAL_32K_INXTAL_32K_OUTFigure 3.3: Sleep Clock Crystal Driver CircuitNote:CLOAD1 and CLOAD2 in combination with any parasitic capacitance provide the load capacitance required by thecrystal.3.3.1 Crystal SpecificationTable 3.2 shows the requirements for the sleep clock.Sleep Clock Min Typ Max UnitsFrequency 30 32.768 35 kHzFrequency tolerance(a) (b)- - 250 ±ppmDuty cycle 30:70 50:50 70:30 %Table 3.2: Sleep Clock Specification(a)The frequency of the slow clock is periodically calibrated against the system clock. As a result the rate of change of the frequency is moreimportant than the maximum deviation. To meet the accuracy requirements the frequency should not drift due to temperature or other effectsby more than 80ppm in any 5 minute period.(b)CSR1010 QFN can correct for ±1% by using the fast clock to calibrate the slow clock.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 19 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
4 Microcontroller, Memory and Baseband LogicG-TW-0005354.3.2I2C / Serial FlashBluetooth low energy Modemand LCRAM ArbiterRAM MCUI2C / Serial FlashI/OUARTPIO andLED PWMAES-CCS and AES EncryptionAUX / CLK / PSU ControlInterruptDMAADCs DACsI/OControl LogicMemory ProtectionWake-upsRAM Interface (Buffers, LUTs, Tables and State)Bluetooth andAuxiliary AnalogueControlPIOsDebugI2C EEPROMDebug TimerCode DataSerial FlashFigure 4.1: Baseband Digits Block Diagram4.1 System RAM64KB of integrated RAM supports the RISC MCU and is shared between the ring buffers used to hold data for eachactive connection and the general-purpose memory required by the Bluetooth stack.4.2 Internal ROMCSR1010 QFN has 64KB of internal ROM. This memory is provided for system firmware implementation. If theinternal ROM holds valid program code, on boot-up, this is copied into the program RAM.4.3 MicrocontrollerThe MCU, interrupt controller and event timer run the Bluetooth software stack and control the Bluetooth radio andexternal interfaces. A 16-bit RISC microcontroller is used for low power consumption and efficient use of memory.4.4 Programmable I/O Ports, PIO and AIO12 lines of programmable bidirectional I/O are provided. They are all powered from VDD_PADS.PIO lines are software-configurable as weak pull-up, weak pull-down, strong pull-up or strong pull-down.Note:At reset all PIO lines are inputs with weak pull-downs.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 20 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Any of the PIO lines can be configured as interrupt request lines or to wake the IC from deep sleep mode. Table4.1 lists the options for waking the IC from the sleep modes.Sleep Mode Wake-up OptionsDormant Can only be woken by the WAKE pin.Hibernate Can be woken by the WAKE pin or by the watchdog timer.Deep Sleep Can be woken by any PIO configured to wake the IC.Table 4.1: Wake Options for Sleep ModesThe CSR1010 QFN supports alternative functions on the PIO lines:■SPI interface, see Section 1.2 and Section 5.4■UART, see Section 1.2 and Section 5.1.1■LED flasher / PWM module, see Section 4.5Note:CSR cannot guarantee that the PIO assignments remain as described. Implementation of the PIO lines isfirmware build-specific, for more information see the relevant software release note.CSR1010 QFN has 3 general-purpose analogue interface pins, AIO[2:0].4.5 LED Flasher / PWM ModuleCSR1010 QFN contains a LED flasher / PWM module that works in sleep modes.These functions are controlled by the on-chip firmware.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 21 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
5 Serial Interfaces5.1 Application Interface5.1.1 UART InterfaceThe CSR1010 QFN UART interface provides a simple mechanism for communicating with other serial devices usingthe RS232 protocol.2 signals implement the UART function, UART_TX and UART_RX. When CSR1010 QFN is connected to anotherdigital device, UART_RX and UART_TX transfer data between the 2 devices.UART configuration parameters, e.g. baud rate and data format, are set using CSR1010 QFN firmware.When selected in firmware PIO[0] is assigned to a UART_TX output and PIO[1] is assigned to a UART_RX input,see Section 1.2.The UART CTS and RTS signals can be assigned to any PIO pin by the on-chip firmware.Note:To communicate with the UART at its maximum data rate using a standard PC, the PC requires an acceleratedserial port adapter card.Table 5.1 shows the possible UART settings for the CSR1010 QFN.Parameter Possible ValuesBaud rate Minimum1200 baud (≤2%Error)9600 baud (≤1%Error) Maximum 2Mbaud (≤1%Error)Flow control CTS / RTSParity None, Odd or EvenNumber of stop bits 1 or 2Bits per byte 8Table 5.1: Possible UART Settings5.1.1.1 UART Configuration While in Deep SleepThe maximum baud rate is 9600 baud during deep sleep.5.2 I²C InterfaceThe I²C interface communicates to EEPROM, external peripherals or sensors. An external EEPROM connectioncan hold the program code externally to the CSR1010 QFN.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 22 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Figure 5.1 shows an example of an EEPROM connected to the I²C interface where I2C_SCL, I2C_SDA and PIO[2]are connected to the external EEPROM. The PIO[2] pin supplies the power to the EEPROM supply pin, e.g. VDD.At boot-up, if there is no valid ROM image in the CSR1010 QFN ROM area the CSR1010 QFN tries to boot fromthe I²C interface, see Figure 5.2. This involves reading the code from the external EEPROM and loading it into theinternal CSR1010 QFN RAM.G-TW-0005553.1.1VDDWPSCLSDAA0A1A2VSSI2C_SCLI2C_SDAPIO[2]1234567824AA512Figure 5.1: Example of an I²C Interface EEPROM Connection5.3 SPI Master InterfaceThe SPI master memory interface in the CSR1010 QFN is overlaid on the I²C interface and uses a further 3 PIOsfor the extra pins, see Table 5.2.SPI Flash Interface PinFlash_VDD PIO[2]SF_DIN PIO[3]SF_CS# PIO[4]SF_CLK I2C_SCLSF_DOUT I2C_SDATable 5.2: SPI Master Serial Flash Memory InterfaceNote:If an application using CSR1010 QFN is designed to boot from SPI serial flash, it is possible for the firmware tomap the I²C interface to alternative PIOs.The boot-up sequence for CSR1010 QFN is controlled by hardware and firmware. Figure 5.2 shows the sequenceof loading RAM with content from RAM, EEPROM and SPI serial flash.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 23 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
G-TW-0005552.2.2Device StartsHardware Copies Content of ROM to RAMHardware Checks I 2C Interface (Default Pins )Presence of EEPROM DeviceHardware Checks SPI Interface ( D efault Pins )Presence of SPI Serial Flash D eviceStar t M CU Executing from RAMCopy Content of SPI Ser i al Flash to RAMCopy Content of EEPROM to RAMYesNoYesNoFigure 5.2: Memory Boot-up Sequence5.4 Programming and Debug InterfaceImportant Note:The CSR1010 QFN debug SPI interface is available in SPI slave mode to enable an external MCU to programand control the CSR1010 QFN, generally via libraries or tools supplied by CSR. The protocol of this interfaceis proprietary. The 4 SPI debug lines directly support this function.The SPI programs, configures and debugs the CSR1010 QFN. It is required in production. Ensure the 4 SPIsignals are brought out to either test points or a header.Take SPI_PIO#_SEL high to enable the SPI debug feature on PIO[8:5].CSR1010 QFN uses a 16-bit data and 16-bit address programming and debug interface. Transactions occur whenthe internal processor is running or is stopped.Data is written or read one word at a time, or the auto-increment feature is available for block access.5.4.1 Instruction CycleThe CSR1010 QFN is the slave and receives commands on DEBUG_MOSI and outputs data on DEBUG_MISO.Table 5.3 shows the instruction cycle for a SPI transaction.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 24 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
1Reset the SPI interface Hold DEBUG_CS# high for 2 DEBUG_CLK cycles2Write the command word Take DEBUG_CS# low and clock in the 8-bit command3Write the address Clock in the 16-bit address word4Write or read data words Clock in or out 16-bit data word(s)5Termination Take DEBUG_CS# highTable 5.3: Instruction Cycle for a SPI TransactionWith the exception of reset, DEBUG_CS# must be held low during the transaction. Data on DEBUG_MOSI is clockedinto the CSR1010 QFN on the rising edge of the clock line DEBUG_CLK. When reading, CSR1010 QFN replies tothe master on DEBUG_MISO with the data changing on the falling edge of the DEBUG_CLK. The master providesthe clock on DEBUG_CLK. The transaction is terminated by taking DEBUG_CS# high.The auto increment operation on the CSR1010 QFN cuts down on the overhead of sending a command word andthe address of a register for each read or write, especially when large amounts of data are to be transferred. Theauto increment offers increased data transfer efficiency on the CSR1010 QFN. To invoke auto increment,DEBUG_CS# is kept low, which auto increments the address, while providing an extra 16 clock cycles for each extraword written or read.5.4.2 Multi-slave OperationDo not connect the CSR1010 QFN in a multi-slave arrangement by simple parallel connection of slave MISO lines.When CSR1010 QFN is deselected (DEBUG_CS# = 1), the DEBUG_MISO line does not float. Instead,CSR1010 QFN outputs 0 if the processor is running or 1 if it is stopped.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 25 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
6 Power Control and RegulationCSR1010 QFN contains 2 regulators:■1 switch-mode regulator, which generates the main supply rail from the battery■1 low-voltage linear regulatorFigure 6.1 shows the configuration for the power control and regulation with the CSR1010 QFN.G-TW-0005367.4.3Switch-modeRegulatorSwitchSMPS_LXVDD _BAT _SMPSLow-voltage VDD_DIGLinear RegulatorVDD_AUX 1.35 VVDD_RADIO 1.35 VVDD_ANA 1.35VDigits 0.65 /1.20 VVDD _COREVDD_REG_INFigure 6.1: Voltage Regulator Configuration6.1 Switch-mode RegulatorThe switch-mode regulator generates the main rail from the battery supply, VDD_BAT_SMPS. The main rail suppliesthe lower regulated voltage to a further digital linear regulator and also to the analogue sections of the CSR1010 QFN.The switch-mode regulator generates typically 1.35V.6.2 Low-voltage VDD_DIG Linear RegulatorThe integrated low-voltage VDD_DIG linear regulator powers the CSR1010 QFN digital circuits. The input voltagerange is 0.65V to 1.35V. It can supply programmable voltages of 0.65V to 1.20V to the digital area of theCSR1010 QFN. The maximum output current for this regulator is 30mA.Connect a minimum 470nF low ESR capacitor, e.g. MLC, to the VDD_CORE output pin. Software controls the outputvoltage.Important Note:This regulator is only for CSR internal use. Section 7 shows CSR's recommended circuit connection.6.3 ResetCSR1010 QFN is reset by:■Power-on reset■Software-configured watchdog timerProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 26 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
6.3.1 Digital Pin States on ResetTable 6.1 shows the pin states of CSR1010 QFN on reset. PU and PD default to weak values unless specifiedotherwise.Pin Name / Group On ResetI2C_SDA Strong PUI2C_SCL Strong PUPIO[11:0] Weak PDTable 6.1: Pin States on Reset6.3.2 Power-on ResetTable 6.2 shows how the power-on reset occurs.Power-on Reset Typ UnitReset release on VDD_DIG rising 1.05VReset assert on VDD_DIG falling 1.00Reset assert on VDD_DIG falling (Sleep mode) 0.60Hysteresis 50 mVTable 6.2: Power-on ResetProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 27 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
8 Electrical Characteristics8.1 Absolute Maximum RatingsRating Min Max UnitStorage temperature -40 85 °CBattery (VDD_BAT) operation(a)1.8 3.6 VI/O supply voltage -0.4 3.6 VOther terminal voltages(b)VSS - 0.4 VDD + 0.4 V(a)CSR1010 QFN is reliable and qualifiable to 4.2V, but there will be minor deviations in performance relative to published performance valuesfor 1.8V to 3.6V.(b)VDD = Terminal Supply Domain8.2 Recommended Operating ConditionsOperating Condition Min Typ Max UnitOperating temperature range -30 -85 °CBattery (VDD_BAT) operation(a)1.8 -3.6 VI/O supply voltage (VDD_PADS)(b)1.2 -3.6 V(a)CSR1010 QFN is reliable and qualifiable to 4.2V, but there will be minor deviations in performance relative to published performance valuesfor 1.8V to 3.6V.(b)Safe to 4.2V if VDD_BAT = 4.2V.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 29 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
8.3 Input/Output Terminal Characteristics8.3.1 Switch-mode RegulatorSwitch-mode Regulator Min Typ Max UnitInput voltage 1.8 -3.6 VOutput voltage 0.65 1.35 1.35 VTemperature coefficient -200 -200 ppm/°CNormal OperationOutput noise, frequency range 100Hz to 100kHz - - 0.4 mV rmsSettling time, settling to within 10% of final value - - 30 μsOutput current (Imax)- - 50 mAQuiescent current (excluding load, Iload < 1mA) - - 20 µAUltra Low-power ModeOutput current (Imax)- - 100 µAQuiescent current - - 1 µAProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 30 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
8.3.2 Low-voltage Linear RegulatorNormal Operation Min Typ Max UnitInput voltage 0.65 -1.35 VOutput voltage 0.65 -1.20 VImportant Note:This regulator is only for CSR internal use. Section 7 shows CSR's recommended circuit connection.8.3.3 Digital TerminalsInput Voltage Levels Min Typ Max UnitVIL input logic level low -0.4 -0.3 xVDD_PADS VVIH input logic level high 0.7 x VDD - VDD + 0.4 VTr/Tf- - 25 nsOutput Voltage Levels Min Typ Max UnitVOL output logic level low, lOL = 4.0mA - - 0.4 VVOH output logic level high, lOH = -4.0mA 0.75 x VDD - - VTr/Tf- - 5 nsInput and Tristate Currents Min Typ Max UnitWith strong pull-up -150 -40 -10 μAI²C with strong pull-up -250 - - μAWith strong pull-down 10 40 150 μAWith weak pull-up -5.0 -1.0 -0.33 μAWith weak pull-down 0.33 1.0 5.0 μACI input capacitance 1.0 -5.0 pFProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 31 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
8.3.4 AIOInput Voltage Levels Min Typ Max UnitInput voltage 0 - VDD_AUX V8.4 ESD ProtectionApply ESD static handling precautions during manufacturing.Table 8.1 shows the ESD handling maximum ratings.Condition Class Max RatingHuman Body Model Contact Discharge per JEDEC EIA/JESD22-A114 22000V (all pins)Machine Model Contact Discharge per JEDEC EIA/JESD22-A115 200V 200V (all pins)Charged Device Model Contact Discharge per JEDEC EIA/JESD22-C101III 500V (all pins)Table 8.1: ESD Handling RatingsProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 32 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
9 Current ConsumptionTable 9.1 shows CSR1010 QFN total typical current consumption measured at the battery.Mode Description Total Typical Current at 3VDormant All functions are shut down. To wake them up, toggle theWAKE pin. <600nAHibernate VDD_PADS = ON, REFCLK = OFF, SLEEPCLK = ON,VDD_BAT = ON <1.5µADeep sleepVDD_PADS = ON, REFCLK = OFF, SLEEPCLK = ON,VDD_BAT = ON, RAM = ON, digital circuits = ON,SMPS = ON (low-power mode), 1ms wake-up time<5μAIdleVDD_PADS = ON, REFCLK = ON, SLEEPCLK = ON,VDD_BAT = ON, RAM = ON, digital circuits = ON,MCU = IDLE, <1μs wake-up time~1mARX / TX active -~16mA @ 3V peak currentTable 9.1: Current ConsumptionProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 33 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
10 CSR Green Semiconductor Products and RoHS ComplianceCSR confirms that CSR Green semiconductor products comply with the following regulatory requirements:■Restriction on Hazardous Substances directive guidelines in the EU RoHS Directive 2002/95/EC and RoHSrecast 2011/65/EU1 from 3 Jan 2013.■EU REACH, Regulation (EC) No 1907/20061:■List of substances subject to authorisation (Annex XIV)■Restrictions on the manufacture, placing on the market and use of certain dangerous substances,preparations and articles (Annex XVII). This Annex now includes requirements that were containedwithin EU Directive, 76/769/EEC. There are many substance restrictions within this Annex, including,but not limited to, the control of use of Perfluorooctane sulfonates (PFOS).■When requested by customers, notification of substances identified on the Candidate List asSubstances of Very High Concern (SVHC)1.■POP regulation (EC) No 850/20041■EU Packaging and Packaging Waste, Directive 94/62/EC1■Montreal Protocol on substances that deplete the ozone layer.■Conflict minerals, Section 1502, Dodd-Frank Wall Street Reform and Consumer Protection act, whichaffects columbite-tantalite (coltan / tantalum), cassiterite (tin), gold, wolframite (tungsten) or theirderivatives. CSR is a fabless semiconductor company: all manufacturing is performed by key suppliers.CSR have mandated that the suppliers shall not use materials that are sourced from "conflict zone mines"but understand that this requires accurate data from the EICC programme. CSR shall provide a completeEICC / GeSI template upon request.CSR has defined the "CSR Green" standard based on current regulatory and customer requirements including freefrom bromine, chlorine and antimony trioxide.Products and shipment packaging are marked and labelled with applicable environmental marking symbols inaccordance with relevant regulatory requirements.This identifies the main environmental compliance regulatory restrictions CSR specify. For more information on thefull "CSR Green" standard, contact product.compliance@csr.com.1Including applicable amendments to EU law which are published in the EU Official Journal, or SVHCCandidate List updates published by the European Chemicals Agency (ECHA).Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 34 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
11 CSR1010 QFN Software StackCSR1010 QFN is supplied with Bluetooth v4.0 specification compliant stack firmware. Figure 11.1 shows that theCSR1010 QFN software architecture enables the Bluetooth processing and the application program to run on theinternal RISC MCU.G-TW-0005570.1.1Device ManagerGeneric Attribute Profile (GATT)ApplicationSecurity Manager (SM)Attribute Profile (ATT)L2CAPLink Layer ControlDigital Radio ControlPhysical LayerSoftware Radio ControlFigure 11.1: Software ArchitectureProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 35 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
12 Tape and Reel InformationFor tape and reel packing and labelling see IC Packing and Labelling Specification.12.1 Tape OrientationFigure 12.1 shows the CSR1010 QFN packing tape orientation.G-TW-0002812.2.2User Direction of FeedPin 1Figure 12.1: Tape OrientationProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 36 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
12.2 Tape DimensionsFigure 12.2 shows the dimensions of the tape for the CSR1010 QFN.G-TW-0005504.1.1Figure 12.2: Tape DimensionsA0B0K0Unit Notes5.25 5.25 0.80 mm1. 10 sprocket hole pitch cumulative tolerance ±0.2.2. Camber in compliance with EIA 481.3. Pocket position relative to sprocket hole measuredas true position of pocket, not pocket hole.4. A0 and B0 are calculated on a plane at a distance"R" above the bottom of the pocket.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 37 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
12.3 Reel InformationG-TW-0002797.5.2102.02.0330.02.0W1(MEASURED AT HUB)(MEASURED AT HUB)"A" ATTENTIONElectrostatic Sensitive Devices Safe Handling RequiredW220.2MIN2.0 0.513.0+0.5-0.2Detail "A"Detail "B"6 PS PS6a(rim height)88 REF"b" REFFigure 12.3: Reel DimensionsPackage TypeNominal HubWidth(Tape Width)a b W1 W2 Max Units5 x 5 x 0.6mmQFN 12 4.5 98.0 12.4(2.0/-0.0) 18.4 mm12.4 Moisture Sensitivity LevelCSR1010 QFN is qualified to moisture sensitivity level MSL3 in accordance with JEDEC J-STD-020.Production Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 38 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
13 Document ReferencesDocument Reference, DateCore Specification of the Bluetooth System.Bluetooth Specification Version 4.0, 17 December 2009CSR1010 QFN A05 Performance Specification.CS-233372-SPElectrostatic Discharge (ESD) Sensitivity TestingHuman Body Model (HBM).JESD22-A114Environmental Compliance Statement for CSR GreenSemiconductor Products.CB-001036-STIC Packing and Labelling Specification.CS-112584-SPMoisture / Reflow Sensitivity Classification forNonhermitic Solid State Surface Mount Devices.IPC / JEDEC J-STD-020Typical Solder Reflow Profile for Lead-free Devices.CS-116434-ANProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 39 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Terms and DefinitionsTerm DefinitionAC Alternating CurrentADC Analogue to Digital ConverterAGC Automatic Gain ControlAIO Analogue Input/OutputATT ATTribute protocolbalun balanced/unbalanced interface or device that changes a balanced output to an unbalancedinput or vice versaBluetooth®Set of technologies providing audio and data transfer over short-range radio connectionsCSR Cambridge Silicon RadioCTS Clear To SenddBm Decibels relative to 1 mWDC Direct Currente.g.exempli gratia, for exampleEDR Enhanced Data RateEEPROM Electrically Erasable Programmable Read Only MemoryEIA Electronic Industries AllianceESD Electrostatic DischargeESR Equivalent Series ResistanceGAP Generic Access ProfileGATT Generic ATTribute protocolGSM Global System for Mobile communicationsHID Human Interface DeviceI²C Inter-Integrated Circuit InterfaceI/O Input/OutputIC Integrated CircuitIF Intermediate FrequencyIPC See www.ipc.orgIQ In-Phase and QuadratureProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 40 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Term DefinitionJEDEC Joint Electron Device Engineering Council (now the JEDEC Solid State TechnologyAssociation)KB KilobyteL2CAP Logical Link Control and Adaptation ProtocolLC An inductor (L) and capacitor (C) networkLED Light-Emitting DiodeLNA Low Noise AmplifierMAC Medium Access ControlMCU MicroController UnitMISO Master In Slave OutMLC MultiLayer CeramicMOSI Master Out Slave InNSMD Non-Solder Mask DefinedPA Power AmplifierPC Personal ComputerPCB Printed Circuit BoardPD Pull-downPIO Parallel Input/OutputPIO Programmable Input/Output, also known as general purpose I/Oplc public limited companyppm parts per millionPU Pull-UpPWM Pulse Width ModulationQFN Quad-Flat No-leadRAM Random Access MemoryRF Radio FrequencyRISC Reduced Instruction Set ComputerRoHS Restriction of Hazardous Substances in Electrical and Electronic Equipment Directive(2002/95/EC)ROM Read Only MemoryRSSI Received Signal Strength IndicationProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 41 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
Term DefinitionRTS Request To SendRX Receive or ReceiverSIG (Bluetooth) Special Interest GroupSMP Security Manager ProtocolSPI Serial Peripheral InterfaceTCXO Temperature Compensated crystal OscillatorTX Transmit or TransmitterUART Universal Asynchronous Receiver TransmitterVCO Voltage Controlled OscillatorW-CDMA Wideband Code Division Multiple AccessProduction Information© Cambridge Silicon Radio Limited 2012This material is subject to CSR's non-disclosure agreementPage 42 of 42CS-231985-DSP3www.csr.comCSR1010 QFN Data Sheet
FCC Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:-- Reorient or relocate the receiving antenna. -- Increase the separation between the equipment and receiver. -- Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. -- Consult the dealer or an experienced radio/TV technician for help.This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:(1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.

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