Motorola Computer Hardware Mvme187 Users Manual Book.B

2015-01-23

• Notice
• Restricted Rights Legend
  • Motorola, Inc. Computer Group 2900 South Diablo Wa...
• Preface
• Safety Summary Safety Depends On You
  • Ground the Instrument.
  • Do Not Operate in an Explosive Atmosphere.
  • Keep Away From Live Circuits.
  • Do Not Service or Adjust Alone.
  • Use Caution When Exposing or Handling the CRT.
  • Do Not Substitute Parts or Modify Equipment.
  • Dangerous Procedure Warnings.
  • MVME187 RISC Single Board Computer Installation Gu...
    • Introduction to the MVME187 Installation Guide
  • This Chapter Covers
  • About this Manual
  • Terminology, Conventions, and Definitions Used in ...
    • Data and Address Parameter Numeric Formats
  • $
  • %
  • &
    • Signal Name Conventions
• Term
• * Indicates
  • level significant
  • edge significant
    • Assertion and Negation Conventions
• Term
• Indicates
  • Assertion and assert
  • Negation and negate
    • Data and Address Size Definitions
• Name
• Size
• Numbered
• Significance
• Called
  • Big-Endian Byte Ordering
  • BIT
  • BIT
  • 31     24
  • 23     16
  • 15     08
  • 07     00
  • ADR0
  • ADR1
  • ADR2
  • ADR3
    • Control and Status Bit Definitions
• Term
• Describes
  • Control bit
  • Status bit
    • True/False Bit State Definitions
• Term
• Indicates
  • True
  • False
    • Bit Value Descriptions
    • Related Documentation
      • Document Set for MVME187-0xx Board
• Motorola Publication Number
• Description
  • Additional Manuals for this Board
• Motorola Publication Number
• Description
  • Other Applicable Motorola Publications
• Motorola Publication Number
• Description
  • Non-Motorola Peripheral Controllers Publications B...
• Part Number
• Description
  • Applicable Non-Motorola Publications
• Document Title
• Source
  • Board Level Hardware Description
  • This Chapter Covers
  • General Description
    • Onboard Memory Mezzanine Module
    • SCSI Mass Storage Interface
    • Serial Ports
• Serial Port
• Function
• Synchronous/ Asynchronous
• Signals
• Bit Rates
  • 1
  • 2 and 3
  • 4
    • Parallel (Printer) Port
    • Ethernet Transceiver Interface
    • 187Bug Firmware
    • Features
    • Specifications
      • Table 21. MVME187 General Specifications
• Characteristics
• Specifications
  • Conformance to Requirements
  • Board Level Overview 
    • Figure 2-1. MVME187 General Block Diagram
    • Connectors
    • Adapters
    • Transition Modules
    • ASICs
      • VMEchip2 ASIC
        • Table 22. Bus Transfers
• Transfer type
• Can be...
  • PCCchip2 ASIC
  • MEMC040 Memory Controller ASIC
  • MCECC Memory Controller ASIC
  • Functional Description
    • Front Panel Switches and LEDs
      • Table 23. Front Panel Switches
• Switch Name
• Description
  • Table 24. Front Panel LEDs
• LED Name
• Color
• Description
  • Data Bus Structure
    • Local Bus Arbitration
      • 1. 82596CA LAN (highest)
      • 2. CD2401 serial (through the PCCchip2)
      • 3. 53C710 SCSI
      • 4. VMEbus
      • 5. MPU (lowest)
  • M88000 MPU
  • EPROM
    • Programmable EPROM Features
  • Static RAM
    • Optional SRAM Battery Backup
  • Onboard DRAM
    • Stacking Mezzanines
    • DRAM Programming Considerations
  • Battery Backed Up RAM and Clock
  • VMEbus Interface
  • I/O Interfaces
    • Serial Port Interface
      • Serial Interface Programming Considerations
    • Parallel Port Interface
• Status Pins
• Control Pins
  • Ethernet Interface
    • Buffer Overruns
  • SCSI Interface
    • SCSI Termination
  • Local Resources
    • Programmable Tick Timers
    • Watchdog Timer
    • Software-Programmable Hardware Interrupts
    • Local Bus Timeout
  • Memory Maps
    • 1. Local bus memory map
    • 2. VMEbus memory map
    • Local Bus Memory Map
      • Normal Address Range Devices
        • Table 25. Local Bus Memory Map
• Address Range
• Devices Accessed
• Port Size
• Size
• Software
• Cache
• Inhibit
• Notes
  • D32
  • DRAMSIZE
  • N
  • 1, 2
  • D32/D16
  • 3GB
  • ?
  • 3, 4
  • D32
  • 4MB
  • N
  • 1
  • --
  • 2MB
  • --
  • 5
  • D32
  • 128KB
  • N
  • --
  • D32
  • 896KB
  • N
  • --
  • D32-D8
  • 1MB
  • Y
  • 3
  • D32/D16
  • 64KB
  • ?
  • 2, 4
    • 1. Onboard EPROM appears at $00000000 - $003FFFFF ...
    • 2. This area is user-programmable. The suggested u...
    • 3. Size is approximate.
    • 4. Cache inhibit depends on devices in area mapped...
    • 5. This area is not decoded. If these locations ar...
    • Table 26. Local I/O Devices Memory Map (Continued...
• Address Range
• Devices Accessed
• Port Size
• Size
• Notes
  • --
  • 256KB
  • 4
  • D32
  • 256B
  • 1,3
  • D32-D8
  • 256B
  • 1,3
  • --
  • 3.5KB
  • 4,6
  • --
  • 4KB
  • 4
  • D32-D8
  • 4KB
  • 1
  • D8
  • 256B
  • 1
  • D8
  • 256B
  • 1
  • --
  • 3.5KB
  • 1,6
  • --
  • 4KB
  • 4
  • D16-D8
  • 512B
  • 1
  • --
  • 3KB
  • 6,8
  • --
  • 512B
  • 8
  • D32
  • 4KB
  • 1,7
  • D32/D8
  • 4KB
  • 1
  • --
  • 32KB
  • 4
  • --
  • 128KB
  • 4
  • --
  • 28KB
  • 5
  • D32
  • 4KB
  • 1
  • --
  • 28KB
  • 5
  • D32
  • 4KB
  • 1
  • --
  • 128KB
  • 5
  • --
  • 128KB
  • 4
  • D32-D8
  • 64KB
  • 1
  • --
  • 64KB
  • 4
  • D8
  • 1 byte
  • 2
  • D8
  • 1 byte
  • 2
  • D8
  • 1 byte
  • 2
  • D8
  • 1 byte
  • 2
  • D8
  • 1 byte
  • 2
  • D8
  • 1 byte
  • 2
  • D8
  • 1 byte
  • 2
  • --
  • 64KB
  • 2,6
    • 1. For a complete description of the register bits...
    • 2. Byte reads should be used to read the interrupt...
    • 3. Writes to the LCSR in the VMEchip2 must be 32 b...
    • 4. This area does not return an acknowledge signal...
    • 5. This area does return an acknowledge signal.
    • 6. Size is approximate.
    • 7. Port commands to the 82596CA must be written as...
    • 8. The CD2401 appears repeatedly from $FFF45200 to...
    • VMEbus Memory Map
      • VMEbus Accesses to the Local Bus
      • VMEbus Short I/O Memory Map
        • Hardware Preparation and Installation
        • This Chapter Covers
        • Unpacking the Equipment
        • Overview of Startup Procedure
          • Table 31. Startup Overview (Continued)
    • Stage
    • What you will need to do...
    • Refer to...
    • On page...
    • 1
      • 35
      • 37
      • 37
    • 2
      • 314
      • 315
    • 3
      • 316
      • 317
      • 320
    • 5
      • 320
      • E1
      • 57
      • B1
    • 6
      • 324
    • 7
      • 324
      • 211
      • 325
      • 325
      • 46
      • 325
      • A3
      • 224
      • D1
        • Preparing the Hardware
          • Modifying Configuration before Installation
            • Figure 31. MVME187 Switches, Headers, Connectors,...
            • Option Modification
          • Checking the 187Bug EPROMs
            • EPROM Location
            • EPROM Orientation
            • User-programmed EPROMs
          • Jumper Settings
            • Optional Jumper Settings
            • General Purpose Software Readable Header J1
              • Each MVME187 may be configured with readable jumpe...
              • Reserved/Defined Bits
                • Table 32. J1 Bit Descriptions
    • Bit
    • J1 Pins
    • Description
      • Bit #0 (GPI0)
      • 1-2
      • Bit #1 (GPI1)
      • 3-4
      • Bit #2 (GPI2)
      • 5-6
      • Bit #3 (GPI3)
      • 7-8
      • Bit #4 (GPI4)
      • 9-10
      • Bit #5 (GPI5)
      • 11-12
      • Bit #6 (GPI6)
      • 13-14
      • Bit #7 (GPI7)
      • 15-16
        • Table 33. Factory Settings for J1 General Purpose...
    • Header Number
    • Header
    • Description
    • Configuration
    • Jumpers
    • J1
      • General purpose software readable jumpers
      • GPI0 - GPI3: Reserved GPI4 - GPI7: User-definable ...
      • configuration)
        • System Controller Header J2
          • Table 34. Settings for J2 System Controller Heade...
    • Header Number
    • Header
    • Description
    • Configuration
    • Jumpers
    • J2
      • System controller header
      • System controller
      • (Factory configuration)
      • Not system controller
        • Optional SRAM Backup Power Source Select Header J6...
          • Table 35. Settings for Optional J6 SRAM Backup Po...
    • Header Number
    • Header
    • Description
    • Configuration
    • Jumpers
      • J6
      • SRAM backup power source select header
      • Primary source VMEbus +5V STBY Secondary source VM...
      • (Factory configuration)
      • Primary source optional battery Secondary source o...
      • Primary source VMEbus +5V STBY Secondary source op...
      • Primary source optional battery Secondary source V...
        • Serial Port 4 Clock Configuration Select Headers J...
          • Table 36. Settings for J7 and J8 Serial Port 4 Cl...
    • Header Number
    • Header
    • Description
    • Configuration
    • Jumpers
    • J7
      • Serial Port 4 clock configuration select headers
      • Receive TRXC4
      • (Factory configuration)
      • Drive TRXC4
    • J8
      • Receive RTXC4 (Factory configuration)
      • Drive RTXC4
        • Preparing the MVME187 for Installation
          • Table 37. MVME187 Preparation Procedure
    • Step
    • Action
    • 1
    • 2
    • 3
      • Preparing the System Chassis
        • Table 38. Chassis Preparation/Slot Selection Proc...
    • Step
    • Action
    • 1
    • 2
    • 3
    • 4
      • Installing the Hardware
        • Installing the MVME187 in the Chassis
          • Table 39. MVME187 Installation Procedure
    • Step
    • Action
    • 1
    • 2
      • Transition Modules and Adapter Boards Overview
        • Figure 32. Typical Internal SCSI and Serial Port ...
        • Equipment Connections
          • Table 310. Peripheral Connections
    • Equipment Type
    • Connect Through...
      • Installing Transition Modules and Adapter Boards
        • Table 311. Transition Module and Adapter Board In...
    • Stage
    • What you will need to do...
    • Refer to...
    • 1
    • 2
    • 3
      • Connecting Peripherals
        • Table 312. Peripheral Connection Procedures
    • Step
    • Action...
    • Refer to...
    • 1
    • 2
    • 3
    • 4
    • 5
      • Figure 33. Using MVME712A/AM and MVME712B
      • Figure 34. Typical Transition Module Peripheral P...
      • Completing the Installation
        • Table 313. Installation Completion Procedure
    • Step
    • Action...
    • 1
    • 2
      • Starting the System
        • Table 314. System Startup Overview
    • Stage
    • What you will need to do...
    • Refer to...
    • 1
    • 2
    • 3
    • 4
      • Powering Up the System
      • Initializing the Real-Time Clock
        • Table 315. RTC Initialization Procedure
    • Step
    • Action
    • Board Mode
    • System Mode
    • 1
    • 2
    • 3
      • Examining and/or Changing Environmental Parameters...
      • Programming the PCCchip2 and VMEchip2
      • System Considerations
        • Backplane Power Connections
        • Memory Address Ranges
        • DRAM Addressing
        • Global Bus Timeout
        • Multiple Module Cage Configuration
        • GCSR Location Monitor Register
        • Ethernet LAN (+12 Vdc) Fuse
        • SCSI Bus Termination
        • Storage and the Real-Time Clock
        • Debugger General Information
    • This Chapter Covers
    • Introduction to MVME187Bug
      • Overview of M88000 Firmware
      • Description of 187Bug
        • Command Facilities
        • Trap #496 Routines
        • Debugger or Diagnostic Directories
        • Keyboard Control
      • Comparison with M68000-Based Firmware
      • 187Bug Implementation
      • Memory Requirements
    • Booting and Restarting 187Bug
      • Starting Up 187Bug
        • 1. Verify that the MVME187 is properly installed a...
        • 2. Power up the system. 187Bug executes some self-...
      • Autoboot
        • Autoboot Sequence
          • 1. The autoboot routine automatically scans for co...
          • 2. If a valid bootable device is found, a boot fro...
          • 3. At powerup, Autoboot is enabled, and if the dri...
          • 4. Following this message there is a delay to allo...
          • 5. Then the actual I/O begins: the program pointed...
      • ROMboot
        • ROMboot Sequence
          • 1. ROMboot is configured/enabled and executed at p...
            • a. By the Environment (ENV) command (refer to a. A...
            • b. By the RB command assuming there is valid code ...
          • 2. If ROMboot code is installed, a user-written ro...
      • Network Boot
        • Network Boot Sequence
          • 1. The Network Auto Boot routine automatically sca...
          • 2. If a valid bootable device is found, a boot fro...
          • 3. At powerup, Network Boot is enabled, and provid...
          • 4. Then the actual I/O begins: the program pointed...
      • Restarting the System
        • Reset
          • During COLD reset:
            • 1. A total system initialization takes place, as i...
            • 2. All static variables (including disk device and...
            • 3. The breakpoint table and offset registers are c...
            • 4. The target registers are invalidated.
            • 5. Input and output character queues are cleared.
            • 6. Onboard devices (timer, serial ports, etc.) are...
            • 7. The first two serial ports are reconfigured to ...
          • During WARM reset:
            • 1. The 187Bug variables and tables are preserved, ...
        • Abort
          • Abort Sequence
            • 1. Generates a local board condition which may int...
            • 2. Displays the target registers on the screen, re...
            • 3. Removes any breakpoints installed in the user c...
            • 4. Returns control to the debugger.
        • Break
          • Break Sequence
            • 1. Removes any breakpoints in your code and keeps ...
            • 2. Takes a snapshot of the machine state if the fu...
        • SYSFAIL* Assertion/Negation
        • MPU Clock Speed Calculation
    • Disk I/O Support
      • Disk Support Facilities
        • Parameter Tables
        • Supported Controllers
      • Blocks Versus Sectors
      • Device Probe Function
      • Disk I/O via 187Bug Commands
        • IOI (Input/Output Inquiry)
        • IOP (Physical I/O to Disk)
        • IOT (I/O Teach)
        • IOC (I/O Control)
        • BO (Bootstrap Operating System)
        • BH (Bootstrap and Halt)
      • Disk I/O via 187Bug System Calls
        • Controller Command Packets
      • Default 187Bug Controller and Device Parameters
      • Disk I/O Error Codes
    • Network I/O Support
      • Intel 82596 LAN Coprocessor Ethernet Driver
      • UDP/IP Protocol Modules
      • RARP/ARP Protocol Modules
      • BOOTP Protocol Module
      • TFTP Protocol Module
      • Network Boot Control Module
      • Network I/O Error Codes
    • Multiprocessor Support
      • Multiprocessor Control Register (MPCR) Method
  • Base Address + $3000
  • *
    • MPCR Status Codes
  • 0
  • (HEX 00)
  • --
  • R
  • (HEX 52)
  • --
  • E
  • (HEX 45)
  • --
    • Multiprocessor Address Register (MPAR)
  • *
  • *
  • *
  • *
    • MPCR Powerup Sequence
      • 1. At powerup, the debug monitor self-test routine...
      • 2. The MPCR contains $00 at powerup, indicating th...
      • 3. As the initialization proceeds, the execution p...
      • 4. If the code being executed in dual-port RAM is ...
    • Global Control and Status Register (GCSR) Method
      • 1. The remote processor places the MVME187 executi...
      • 2. The remote processor then sets bit 8 (SIG0) of ...
      • 3. This causes the MVME187 to install breakpoints ...
  • GPCSR0
  • GPCSR1
    • Diagnostic Facilities
      • Table 41. Diagnostic Monitor Commands/Prefixes
      • Table 42. Diagnostic Utilities
      • 187Bug Diagnostic Test Groups
        • Table 43. Diagnostic Test Groups
• Test Set
• Description
  • RAM
  • SRAM
  • RTC
  • PCC2
  • MCECC
  • MEMC1
  • MEMC2
  • ST2401
  • CMMU
  • VME2
  • LAN
  • NCR
    • Using the 187Bug Debugger
    • This Chapter Covers
    • Entering Debugger Command Lines
      • Terminal Input/Output Control
      • Debugger Command Syntax
      • Syntactic Variables
        • Expression as a Parameter
• Base
• Identifier
• Examples
  • $
  • &
  • @
  • %
• String
• Literal
• Numeric Value
• (In Hexadecimal)
• Expression
• Result (In Hex)
• Notes
  • Address as a Parameter
  • Address Formats
  • Offset Registers
  • Port Numbers
    • 1. MVME187 EIA-232-D Debug (Terminal Port 0 or 00)...
    • 2. MVME187 EIA-232-D (Terminal Port 1 or 01) (PORT...
  • Entering and Debugging Programs
    • Creating a Program with the Assembler/Disassembler...
      • 1. Enter the program one source line at a time.
      • 2. After each source line is entered, it is assemb...
    • Downloading an S-Record Object File
    • Read the Program from Disk
  • Calling System Utilities from User Programs
  • Preserving the Debugger Operating Environment
    • 187Bug Vector Table and Workspace
    • Hardware Functions
    • Exception Vectors Used by 187Bug
    • CPU/MPU Registers
  • Floating Point Support
• Integer Data Types
• Floating Point Data Types
  • 1. The sign field is the first field and is a bina...
  • 2. The exponent field is the second field and is a...
  • 3. The mantissa field is the last field and is a h...
  • 4. The sign field, the exponent field, and at leas...
  • 5. Each field must be separated from adjacent fiel...
  • 6. All the digit positions in the sign and exponen...
  • Single Precision Real
  • Double Precision Real
  • Scientific Notation
  • The 187Bug Debugger Command Set
    • Table 51. Debugger Commands (Continued)
• Command Mnemonic
• Title
• Command Line Syntax
  • Configure and Environment Commands
  • This Appendix Covers
  • Configuring the Board Information Block
  • Setting Environment to Bug/Operating System
    • Table A1. ENV Command Parameters (Continued)
  • S
  • Y
  • B
  • Y
  • N
  • N
  • A
  • Y
  • N
  • Y
  • 00
  • 00
  • 15
  • Null
  • N
  • Y
  • N
  • 0
  • FF800000
  • FFBFFFFC
  • N
  • Y
  • 00
  • 00
  • 5
  • 00000000
  • 00000000
  • 02000000
  • 00010000
  • N
  • FFFFCE0F
  • Y
  • 00000000
  • 02000000
  • 00000000
  • 02000000 00000000
  • Y
  • 00000000
  • 01FFFFFF
  • 00000000
  • 00000000
  • 01FF
  • Y
  • FFE00000
  • FFE1FFFF
  • 00000000
  • 00000000
  • 01EF
  • Y
  • 02000000
  • EFFFFFFF
  • 0D
  • N
  • 00000000
  • 00000000
  • 00
  • N
  • 00000000
  • 00000000
  • 00
  • N
  • 00000000
  • 00000000
  • 00000000
  • 00000000
  • 00
  • Y
  • 01
  • Y
  • 02
  • 05 05
  • 01
  • 05 06 07
  • CE
  • 00
  • 01
  • 00
  • 02
    • Disk/Tape Controller Data
    • Disk/Tape Controller Modules Supported
  • $00
  • --
  • --
  • --
  • $11
  • $FFFFB000
  • $12
  • $FFFFAC00
  • $08
  • $FFFFA000
  • $09
  • $FFFFA200
  • $02
  • $FFFFA600
  • $03
  • $FFFFA700
  • $06
  • $FFFF9000
  • $07
  • $FFFF9800
  • $16
  • $FFFF4800
  • $17
  • $FFFF5800
  • $18
  • $FFFF7000
  • $19
  • $FFFF7800
  • $04
  • $FFFF5000
  • $05
  • $FFFF5100
    • Disk/Tape Controller Default Configurations
• RISC Single Board Computers -- 7 Devices
  • 0
  • $XXXXXXXX
  • 00
  • 10
  • 20
  • 30
  • 40
  • 50
  • 60
• MVME320 -- 4 Devices
  • 11
  • $FFFFB000
  • 0
  • 1
  • 2
  • 3
  • 12
  • $FFFFAC00
• MVME323 -- 4 Devices
  • 8
  • $FFFFA000
  • 0
  • 1
  • 2
  • 3
  • 9
  • $FFFFA200
  • 2
  • $FFFFA600
  • 00
  • 10
  • 20
  • 30
  • 40
  • 50
  • 60
  • 3
  • $FFFFA700
  • 80
  • 81
  • 6
  • $FFFF9000
  • 00
  • 08
  • 10
  • 18
  • 20
  • 28
  • 30
  • 7
  • $FFFF9800
  • 16
  • $FFFF4800
  • 40
  • 48
  • 50
  • 58
  • 60
  • 68
  • 70
  • 17
  • $FFFF5800
  • 18
  • $FFFF7000
  • $FFFF7800
  • 19
  • 4
  • $FFFF5000
  • 0
  • QIC-02 streaming tape drive
  • 5
  • $FFFF5100
    • IOT Command Parameters for Supported Floppy Types
  • 1
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 1
  • 1
  • 1
  • 1
  • 1
  • 1
  • 1
  • 10
  • 8
  • 9
  • 9
  • F
  • 12
  • 24
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 2
  • 50
  • 28
  • 28
  • 50
  • 50
  • 50
  • 50
  • 50
  • 28
  • 28
  • 50
  • 50
  • 50
  • 50
  • 50
  • 28
  • 28
  • 50
  • 50
  • 50
  • 50
  • 0
  • 0
  • 0
  • 0
  • 0
  • 0
  • 0
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • D
  • S
  • E
  • E
  • E
  • E
  • E
  • E
  • S
  • S
  • S
  • S
  • F
  • F
  • F
  • 0A00
  • 0280
  • 02D0
  • 05A0
  • 0960
  • 0B40
  • 1680
  • 09F8
  • 0500
  • 05A0
  • 0B40
  • 12C0
  • 1680
  • 2D00
  • 653312
  • 327680
  • 368460
  • 737280
  • 1228800
  • 1474560
  • 2949120
  • 5.25/DD
  • 5.25/DD
  • 5.25/DD
  • 3.5/DD
  • 5.25/HD
  • 3.5/HD
  • 3.5/ED
    • Network Controller Data
    • Network Controller Modules Supported
      • Table C1. Network Controller Access Data (Continu...
  • $00
  • $00
  • $02
  • $00
  • $03
  • $00
  • $04
  • $00
  • $05
  • $00
  • $06
  • $00
  • $07
  • $00
  • $10
  • $00
  • $11
  • $00
  • $12
  • $00
  • $13
  • $00
  • $14
  • $00
  • $15
  • $00
    • Troubleshooting the MVME187: Solving Startup Probl...
      • Table D1. Troubleshooting Steps (Continued)
  • YOU ARE FINISHED (DONE) WITH THIS TROUBLESHOOTING ...
    • EIA-232-D Interconnections
    • Introduction
      • Table E1. EIA-232-D Interconnections (Continued)
  • 1
  • 2
  • TxD
  • 3
  • RxD
  • 4
  • RTS
  • 5
  • CTS
  • 6
  • DSR
  • 7
  • SIG-GND
  • 8
  • DCD
  • 9-14
  • 15
  • TxC
  • 16
  • 17
  • RxC
  • 18, 19
  • 20
  • DTR
  • 21
  • 22
  • RI
  • 23
  • 24
  • TxC
  • 25
  • BSY
    • Levels of Implementation
      • Signal Adaptations
      • Sample Configurations
        • Figure E1. Middle-of-the-Road EIA-232-D Configura...
        • Figure E2. Minimum EIA-232-D Connection
      • Proper Grounding
        • Symbols
        • Numerics
        • A
        • B
        • C
        • D
        • E
        • F
        • G
        • H
        • I
        • J
        • K
        • L
        • M
        • N
        • O
        • P
        • Q
        • R
        • S
        • T
        • U
        • V
        • W
        • X