PARROT FC6100ASPEN WLAN Transceiver User Manual FC6100 ASPEN Datasheet 21fev2012
PARROT WLAN Transceiver FC6100 ASPEN Datasheet 21fev2012
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PARROT PRODUCT DATASHEET Parrot FC6100 ASPEN Version 1.1 MARCH 2012 Confidential information Ref: FC6100-Datasheet Parrot FC6100 ASPEN Full connectivity module with Android OS. Technical Features: • LCD Management-LCD RGB/LVDS • Wi-Fi module • Piconet and scatternet support • Standard single 3V3 supply • UARTs, I²C • 1*USB 2.0 High Speed • Digital and analog audio in and out • Analog Video output • Module dimensions 72 x 44.3 x 4.60mm • IPod chip management (optional) • 2nd USB 2.0 connection (optional) Applications: • Smartphone Android Apps platform • Navigation • Telephony voice recognition • Multimedia voice recognition • Terminal mode The FC6100 ASPEN platform provides a full API, to access Parrot Libraries. Description: Parrot FC6100 ASPEN is a solution for Multimedia systems. It integrates a large variety of interfaces for easy integration of most multimedia applications. DATASHEET Confidential Information 2/18 Ref: FC6100ASPENDatasheet Table of contents 1 FC6100 ASPEN Overview .................................................................................................................... 4 2 Features List ....................................................................................................................................... 5 2.1 Connectivity ................................................................................................................................. 5 3 FC6100 ASPEN technology ................................................................................................................. 6 5 Wi-Fi Use Cases .................................................................................................................................. 7 5.1 Parrot’s FC6100 ASPEN provides the internet connection to Wi-Fi users .................................. 7 7 Hardware Overview ........................................................................................................................... 8 7.1 Memory ....................................................................................................................................... 8 7.2 Power domains ............................................................................................................................ 8 7.3 Power supplies ............................................................................................................................ 8 7.4 Digital communication links ........................................................................................................ 8 7.4.1 Control signals ................................................................................................................. 8 7.4.2 I2C .................................................................................................................................... 9 7.4.3 UART ................................................................................................................................ 9 7.4.4 Digital data bus ................................................................................................................ 9 7.4.5 Audio interface .............................................................................................................. 10 7.4.6 Video interface .............................................................................................................. 10 7.5 Pin Out Table (140 pins connector) ........................................................................................... 11 8 Mechanical Dimension (preliminary) ............................................................................................... 15 9 Absolute Maximum Ratings ............................................................................................................. 16 10 Electrical Specifications .................................................................................................................... 16 10.1 Power Consumption (preliminary) ............................................................................................ 16 10.2 Power Supplies .......................................................................................................................... 16 10.3 Hardware Reset Conditions ....................................................................................................... 16 10.4 Software Reset Input ................................................................................................................. 16 10.5 Digital IO Pins ............................................................................................................................ 17 11 FCC requirements for module application ....................................................................................... 18 Confidential Information 3/18 1 FC6100 ASPEN Overview Ref: FC6100ASPENDatasheet FC6100 ASPEN is an easy to integrate module based on the Texas Instruments OMAP 3630 multimedia processor: Cortex A8 (1600 MIPS), 3D and video hardware accelerator. The FC6100 ASPEN offers the best of both worlds, the automotive-specific precision of Parrot automotive libraries along with the market acceptance of the Android platform running on the ARM Architecture. TI OMAP ARM Cortex-A8 (1600 MIPS) Display up to 10'' (1024x768 pixels) Integrated OpenGL 3D Graphics Accelerator Up to 4Gbits RAM, 8Gbits FLASH FC6100 FC6100 The ARM architecture includes a family of CPUs with FPU which are sold now in larger volumes than Intel CPUs. They power products with huge market success such as the iPhone and Android phones. The portfolio includes single, dual and quad-core CPUs. Confidential Information 4/18 Ref: FC6100ASPENDatasheet 2 Features List 2.1 • Connectivity USB Parrot FC6100 ASPEN embeds a USB 2.0 OTG high speed transceiver Compliant with USB devices supporting Mass Storage Class Supports USB hub • Wi-Fi IEEE 802.11b/g/i compliant Data rates of 1–54 Mbps for 802.11g Security support for WPS, WPA2, WPA Ad hoc, station, or Access Point mode Up to 8 devices can simultaneously be connected in Access Point mode Confidential Information 5/18 Ref: FC6100ASPENDatasheet 3 FC6100 ASPEN technology FC6100 ASPEN Wi-Fi protocol summary WLAN 802.11a - 5GHz WiFi 54Mbps 802.11b - 2.4GHz WiFi 11Mbps 802.11d - "World Mode" 802.11g - 2.4GHz WiFi 54Mbps 802.11h - 5GHz interferrence avoid 802.11i - Security 802.11j - Japan Standard 802.11n - 2.4GHz WiFi 150Mbps 802.11y - High Power WiFi Access Point support Ad-Hoc Client PAN - like Intel Cliffside multi point access WPA2 / WPA Coexistence 2.4GHz No Yes No Yes No Yes No No No on reset -frimware change Yes Yes No Yes Confidential Information Supported 6/18 Ref: FC6100ASPENDatasheet 5 Wi-Fi Use Cases 5.1 Parrot’s FC6100 ASPEN provides the internet connection to Wi-Fi users Access point NIC The Parrot module can act as a Wi-Fi micro Access Point (AP). As an access point, up to 8 devices can be connected simultaneously. With this use case, the FC6100 ASPEN acts as the gateway, using networking terminology. The internet connection is provided by a HSDPA module or by a 3G+ USB dongle. The low-level network control is handled by the FC6100 ASPEN. From the Wi-Fi user perspective, connecting to the in-car network works the same as a standard access point, A software application running in the FC6100 ASPEN is used to set the Wi-Fi networking service: enabling/disabling Wi-Fi configuring the security level (WEP, WPA, WPA2), and associated passes retrieving network information as needed (example: which users are connected) Confidential Information 7/18 Ref: FC6100ASPENDatasheet 7 Hardware Overview Here is an overview of FC6100 ASPEN Hardware design. For more details, the FC6100 ASPEN Hardware Integration Guide can be sent upon request. 7.1 Memory FC6100 ASPEN Memory configuration: Up to 8Gbits NAND Flash and 4 Gbits mDDR RAM. 7.2 Power domains FC6100 ASPEN’s processor’s digital I/O are mainly referenced to a 1.8V voltage. Historically, Parrot interface uses 3.3V interface. However, some customers might already use 1.8V signaling on their motherboard and level-shifting would then become redundant. The decision was then made to move level-shifting function on the motherboard to improve the flexibility of the design and the module size. Consequently, FC6100 ASPEN digital I/Os belong to 2 different power domains: • • 7.3 3.3V signaling 1.8V signaling Power supplies • 3V3_MAIN To operate, the module requires a unique 3.3V voltage power supply called 3V3_MAIN with a 10% precision and capable to deliver up to 1A. 3V3_MAIN is internally monitored and triggers power on and power down sequence of the module. • VDD_PERM In cases where RTC option is needed, for time-keeping, the motherboard must also supply the board permanently with another 3.3V voltage called VDD_PERM. • 1V8_IO For customers that do not have any 1.8V voltage level power supply, the module outputs a 1V8_IO power supply that can be used to power level-shifter and 1.8V external devices I/O pads. 7.4 Digital communication links FC6100 ASPEN module uses several means to interface with the system it is integrated in. 7.4.1 Control signals Some discrete signals are used by the module to interact with the rest of the system: • • • RESET_HOSTn is the module’s reset input S_RESETOUTn & H_RESETOUTn inform the motherboard of the reset state of the module BOOTS is an input which activates firmware update Confidential Information 8/18 • Ref: FC6100ASPENDatasheet IT_HOSTn is the motherboard’s interruption signal to request communication with FC6100 ASPEN when slave. 7.4.2 I2C • I2C_0 I2C 0 is a 1.8V signaling I2C link dedicated to be used on motherboard. It can operate as a master or as a slave. Note: On WB_FC6xxx development board, I2C_0 is used for Touch Panel Controller, external audio codec & audio power amplifier interface. • I2C_1 I2C 1 set as a master and is 3.3V signaling at the connector end. It is also used internally for communication with the Audio Codec. Its clock frequency is limited to 100 Khz in compliance with I2C default speed specification. Note: On WB_FC6xxx board, I2C_1 is used for iPOD authentication chip communication. 7.4.3 UART • UART_0 UART 0 is a standard UART interface with flow control signals. 7.4.4 Digital data bus 7.4.4.1 SDIO • SDIO_0 SDIO_0 is a complete SD Card bus, capable of high speed operation (up to 48Mhz). It is also used as secondary flash update interface. • SDIO_1 SDIO_1 is a complete SD Card bus, capable of full speed operation (up to 48Mhz). 7.4.4.2 USB • USB_0 USB_0 is a host or device USB interface compliant with USB2.0 High Speed Specifications. It can also be used as OTG USB device. • USB_1 USB_1 is a host or device USB interface compliant with USB2.0 High Speed Specifications. 7.4.4.3 SPI • SPI_0 SPI_0 is a 1.8V SPI Bus operating as a master for up to 2 slaves. Its maximum clock frequency is 48Mhz. • SPI_1 SPI_1 is a 1.8V SPI Bus operating as master or slave. Its maximum clock frequency is 48MHz when master & 24Mhz when slave Confidential Information 9/18 Ref: FC6100ASPENDatasheet 7.4.5 Audio interface FC6100 ASPEN module provides both digital and analog audio interface. 7.4.5.1 Analog Audio • Analog audio inputs FC6100 ASPEN provides 3 stereo analog audio inputs: • • 2 stereo Line inputs : LINEIN_1 & LINEIN_2 1 stereo Microphone input MIC* composed of 2 single-ended or differential Mic inputs Those 3 channels are internally multiplexed so only one can be used at the same time. • Analog audio output FC6100 ASPEN provides one stereo line out: LINEOUT. 7.4.5.2 Digital Audio FC6100 ASPEN module provides 2 bidirectional 1.8V I2S links. Providing a complete I2S interface (bit clock, left/right clock & master clock), FC6100 ASPEN operates as master of the bus for an external audio codec on motherboard. If needed, FC6100 ASPEN I2S interface can be set as slave if your motherboard provides the needed clock signals: • • Bit clock & Left/Right if using digital audio only Bit clock, left/right Clock & Master Clock if analog audio is also needed 7.4.6 Video interface FC6100 ASPEN features input & output video flow management. 7.4.6.1 Display interface • Digital video interface: LCD_* FC6100 ASPEN features a 1.8V signaling 24-bit wide parallel video bus targeting LCD Panel use: • • It includes Horizontal & Vertical synchronization signals and can also be used with Data Enable signal only. Max clock frequency is 74Mhz. 7.4.6.1.1 Analog video interface: TV* The interface is an analog video output capable of: • • S-video AC-coupled Composite 7.4.6.1.2 Record interface: CAM_* A parallel 1.8V signaling 8-bit wide parallel camera input bus is provided. Confidential Information 10/18 Ref: FC6100ASPENDatasheet 7.5 Pin Out Table (140 pins connector) pin signal name pin type Pwr domain function Analog Audio Differential Microphone 1 - Positive Input Differential Microphone 1 - Negative Input Differential Microphone 2 - Positive Input Differential Microphone 2 - Negative Input Microphone Bias Supply Output Stereo Line Input 1 - Right Channel Stereo Line Input 1 - Left Channel Stereo Line Input 2 - Right Channel Stereo Line Input 2 - Left Channel Stereo Line Output 1 - Right Channel Stereo Line Output 1 - Left Channel MIC1_P 3V3 Ana MIC1_N 3V3 Ana MIC2_P 3V3 Ana 12 14 MIC2_N MIC_BIAS LINEIN1_R LINEIN1_L LINEIN2_R LINEIN2_L LINEOUT1_R LINEOUT1_L 3V3 Ana 3V3 Ana 3V3 Ana 3V3 Ana 3V3 Ana 3V3 Ana 3V3 Ana 3V3 Ana 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 I2S Master Clock I2S Left/Right Clock I2S Bit Clock I2S Input 0 I2S Input 1 I2S Output 0 I2S Output 1 I2S Output 1 Digital Audio 15 I2S_MCLK 24 I2S_FSYNC 26 I2S_BCLK 18 I2S_IN0 22 I2S_IN1 20 I2S_OUT0 28 I2S_OUT1 19 I2S_OUT2 I2C 0 21 23 I2C_0_SCL I2C_0_SDA I/O 1V8 1V8 I2C 0 Serial Clock I2C 0 Serial Data I2C 1 37 39 I2C_1_SCL I2C_1_SDA I/O 3V3 3V3 I2C 1 Serial Clock I2C 1 Serial Data SDIO 0 - SD Card Inteface 82 SDIO_0_CLK 88 SDIO_0_CMD 84 SDIO_0_D0 92 SDIO_0_D1 90 SDIO_0_D2 86 SDIO_0_D3 123 SDIO_0_CDn 125 SDIO_0_WPn O/I O/I O/I O/I O/I 3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3 SD Card 0 - Clock output SD Card 0 - Command line SD Card 0 - Data 0 SD Card 0 - Data 1 SD Card 0 - Data 2 SD Card 0 - Data 3 SD Card 0 - Card Detect Input SD Card 0 - Write Protect Input SDIO 1 - SD Card Inteface 47 SDIO_1_CLK 3V3 SD Card 1 - Clock Output Confidential Information 11/18 41 43 27 29 31 33 119 121 SPI 0 104 106 102 100 Ref: FC6100ASPENDatasheet SDIO_1_CLKIN SDIO_1_CMD SDIO_1_D0 SDIO_1_D1 SDIO_1_D2 SDIO_1_D3 SDIO_1_CDn SDIO_1_WPn I/O I/O I/O I/O I/O 3V3 3V3 3V3 3V3 3V3 3V3 3V3 3V3 SD Card 1 - Clock Feedback Input SD Card 1 - Command line SD Card 1 - Data 0 SD Card 1 - Data 1 SD Card 1 - Data 2 SD Card 1 - Data 3 SD Card 1 - Card Detect Input SD Card 1 - Write Protect Input SPI_0_CLK SPI_0_MISO SPI_0_MOSI SPI_0_CS0n 1V8 1V8 1V8 1V8 SPI 0 Clock SPI 0 Master Input Slave Output SPI 0 Master Output Slave Input SPI 0 Slave 0 Select SPI 1 70 64 66 68 80 SPI_1_CLK SPI_1_MISO SPI_1_MOSI SPI_1_CS0n SPI_1_CS1n 1V8 1V8 1V8 1V8 1V8 SPI 1 Clock SPI 1 Master Input Slave Output SPI 1 Master Output Slave Input SPI 1 Slave 0 Select SPI 1 Slave 1 Select UART 0 120 110 118 112 UART_0_TX UART_0_RTS UART_0_RX UART_0_CTS 1V8 1V8 1V8 1V8 UART 0 Ouput UART 0 Request to Send UART 0 Input UART 0 Clear to Send USB 0 138 140 137 134 136 135 USB_0_DP USB_0_DM USB_0_VBUS USB_0_CPEN USB_0_ID USB_0_OCn IO IO IO USB USB USB 3V3 3V3 3V3 USB 0 Diffrential signal - + USB 0 Diffrential signal -USB 0 Vbus sense input USB 0 Vbus enable output USB 0 ID input USB 0 Vbus overcurrent flag USB 1 130 128 133 132 131 USB_1_DP USB_1_DM USB_1_VBUS USB_1_CPEN USB_1_OCn IO IO USB USB 3V3 3V3 3V3 USB 1 Diffrential signal - + USB 1 Diffrential signal -USB 1 Vbus sense input USB 1 Vbus enable output USB 1 Vbus overcurrent flag 1V8 1V8 1V8 1V8 1V8 1V8 LCD Display Reset LCD Enable LCD Pixel Clock LCD - Horizontal Synchronisation LCD - Vertical Synchronisation LCD Data 0 LCD Display interface 95 LCD_RSTn 71 LCD_EN 65 LCD_CLK 51 LCD_HS 61 LCD_VS 97 LCD_D0 Confidential Information 12/18 93 111 109 107 105 55 53 59 57 101 103 99 87 91 89 73 63 83 85 79 81 77 75 49 67 LCD_D1 LCD_D2 LCD_D3 LCD_D4 LCD_D5 LCD_D6 LCD_D7 LCD_D8 LCD_D9 LCD_D10 LCD_D11 LCD_D12 LCD_D13 LCD_D14 LCD_D15 LCD_D16 LCD_D17 LCD_D18 LCD_D19 LCD_D20 LCD_D21 LCD_D22 LCD_D23 LCD_BKL_EN LCD_BKL_PWM Camera Input 50 CAM_ENn 48 CAM_PCLK 42 CAM_MCLK 32 CAM_HS 34 CAM_VS 54 CAM_D0 52 CAM_D1 44 CAM_D2 40 CAM_D3 46 CAM_D4 30 CAM_D5 62 CAM_D6 60 CAM_D7 58 CAM_D8 56 CAM_D9 Module Control 127 RESET_HOSTn 129 BOOTS 45 S_RESETOUTn Ref: FC6100ASPENDatasheet 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 LCD Data 1 LCD Data 2 LCD Data 3 LCD Data 4 LCD Data 5 LCD Data 6 LCD Data 7 LCD Data 8 LCD Data 9 LCD Data 10 LCD Data 11 LCD Data 12 LCD Data 13 LCD Data 14 LCD Data 15 LCD Data 16 LCD Data 17 LCD Data 18 LCD Data 19 LCD Data 20 LCD Data 21 LCD Data 22 LCD Data 23 LCD Screen backlight Enable LCD Screen Backlight PWM control 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 1V8 Camera interface Enable Camera Pixel Clock Camera MasterClock Camera Horizontal Synchronization Camera Vertical Synchronization Camera Data 0 Camera Data 1 Camera Data 2 Camera Data 3 Camera Data 4 Camera Data 5 Camera Data 6 Camera Data 7 Camera Data 8 Camera Data 9 1V8 1V8 1V8 Main Software Reset Input Software Update Input Signal Software Reset state flag Confidential Information 13/18 122 H_RESETOUTn Discrete Signals 1V8 78 GPIO_0_PWM IO 1V8 72 GPIO_1_PWM IO 1V8 108 11 GPIO_2_CLK IPOD_RESETn IO 1V8 1V8 21 35 IT_HOSTn IT_TOUCHSCREENn 1V8 1V8 Ref: FC6100ASPENDatasheet Hardware Reset state flag General Purpose Input / Output capable of PWM operations General Purpose Input / Output capable of PWM operations General Purpose Input / Output capable of Clock Ouput Ipod Authenfication chip reset output Interruption for HOST communication input Interruption for Touch pad activity Input Analog TV out 96 TV_LUMA 1V8 Ana Luminance output for S-Video 98 TV_CHROMA 1V8 Ana Chrominance output for S-Video Power Supplies 115 3V3_MAIN 113 3V3_MAIN 116 3V3_MAIN 117 3V3_MAIN 36 3V3_MAIN 76 3V3_MAIN 74 3V3_MAIN 38 3V3_MAIN 13 3V3_PERM PI PI PI PI PI PI PI PI PI 126 1V8_OUT PO 124 17 1V8_OUT GND GND GND GND GND GND GND PO PO PO PO PO PO PO PO 16 10 139 94 114 69 Main Power Supply Input : 3,3V 3,3V permanent power supply for RTC 1,8V Power Supply used for Level Translation Voltage Reference for all module signals Confidential Information 14/18 8 Mechanical Dimension (preliminary) Ref: FC6100ASPENDatasheet Please find below the main dimensions for FC6100 ASPEN module. The module’s interface is made through a 140-pin 140 pin board to board connector with a 0.635mm pitch. • • Module connector reference: MOLEX / 55091-1472 55091 Motherboard connector’s reference: MOLEX / 52885-1474 52885 Confidential Information 15/18 Ref: FC6100ASPENDatasheet 9 Absolute Maximum Ratings Operating temperature range ............................................................................................ -40°C to +85°C Storage temperature range.............................................................................................. -40°C to +125°C DC input supply voltage.......................................................................................................... 3.2V to 3.6V Maximum current drawn from 3V3_MAIN ........................................................................................... 1A ESD sensitivity according to AEC Q100 : +/-2kV HBM | +/- 200V MM................................................ TBD 10 Electrical Specifications 10.1 Power Consumption (preliminary) Off mode ........................................................................................................................................TBD µA Software Reset mode ........................................................................................................................ 5 mA Hands free mode ...........................................................................................................................TBD mA Audio streaming mode ..................................................................................................................TBD mA Video rendering mode ..................................................................................................................TBD mA 10.2 Power Supplies Conditions unless otherwise-noted : over -40° / +85 ° C Parameter Conditions 3V3_MAIN Operating conditions VDD_PERM Operating conditions 1V8_OUT Current drawn on Host Board < 300mA Min. 3.2 2.5 1.72 Typ. 3.3 1.8 Max. 3.4 1.92 Unit 10.3 Hardware Reset Conditions Conditions unless otherwise-noted : over -40° / +85 ° C Parameter Conditions 3V3_MAIN considered as off 3V3_MAIN “off” delay Min. 100 Typ. Max. Unit 0.5 V ms 10.4 Software Reset Input Conditions unless otherwise noted,: over -40° / +8 5° C Parameter Conditions RESET_HOSTn – Activation delay RESET_HOSTn – ViL RESET_HOSTn – ViH Confidential Information Min. 100 1.45 Typ. Max. Unit µs 0.6 V 16/18 Ref: FC6100ASPENDatasheet 10.5 Digital IO Pins FC6100 ASPEN I/Os belong to 2 different digital power domains: 1.8V or 3.3V power supplies. 3,3V power domain Conditions unless otherwise noted : over -40° / +85 ° C Parameter Conditions ViH ViL VoH VoL Min. 2.2 -0.3 3.07 -0.1 Typ. Max. 3.5 0.4 3.6 0.4 Unit Min. 1.3 -0.3 1.15 -0.1 Typ. Max. 1.95 0.55 2.1 0.45 Unit 1,8V power domain Conditions unless otherwise noted : Tamb.=25°C; Vdd =3V3 Parameter Conditions ViH ViL VoH VoL Confidential Information 17/18 11 FCC requirements for module application Ref: FC6100ASPENDatasheet FCC ID: RKXFC6100ASPEN In accordance with FCC Part 15, the FC6100 ASPEN is listed as a Modular Transmitter device. USA – User information This intends to inform how to specify the FCC ID of our module “FC6100 ASPEN” on the product. Based on the Public Notice from FCC, the host device should have a label which indicates that it contains our module. The label should use wording such as: “Contains FCC ID: RKXFC6100ASPEN” Any similar wording that expresses the same meaning may be used. The label of the host device should also include the below FCC Statement. When it is not possible, this information should be included in the User Manual of the host device. “This device complies with part 15 of the FCC rules. Operation is subject to the following two conditions. (1) This device may not cause harmful interference (2) this device must accept any interference received, including interference that may cause undesired operation. Caution: Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Confidential Information 18/18
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