LC 3 Instructions

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LC-3 Instructions Page 1 of 16 LC-3 Instruction Summary 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ADD* 0001 DR SR1 0 0 0 SR2 ADD* 0001 DR SR1 1 imm5 AND* 0101 DR SR1 0 0 0 SR2 AND* 0101 DR SR1 1 imm5 BR 0000 n z p PCoffset9 JMP 1100 0 0 0 BaseR 0 0 0 0 0 0 JSR 0100 1 PCoffset11 JSRR 0100 0 0 0 BaseR 0 0 0 0 0 0 LD* 0010 DR PCoffset9 LDI* 1010 DR PCoffset9 LDR* 0110 DR BaseR offset6 LEA* 1110 DR PCoffset9 NOT* 1001 DR SR 1 1 1 1 1 1 RET 1100 0 0 0 1 1 1 0 0 0 0 0 0 RTI 1000 0 0 0 0 0 0 0 0 0 0 0 0 ST 0011 SR PCoffset9 STI 1011 SR PCoffset9 STR 0111 SR BaseR offset6 TRAP 1111 0 0 0 0 trapvect8 x20 = GetC x21 = Out x22 = PutS x23 = In x25 = Halt Note: * indicates instructions that modify the condition codes (CC).
LC-3 Instructions Page 2 of 16 Instruction Assembler Format Example Operation Addition ADD ADD dr, sr1, sr2 ADD dr, sr1, imm5 ADD R2, R3, R4 ADD R2, R3, #7 R2 ← R3 + R4 R2 ← R3 + 7 Logical AND AND AND dr, sr1, sr2 AND dr, sr1, imm5 AND R2, R3, R4 AND R2, R3, #7 R2 ← R3 AND R4 R2 ← R3 AND 7 Conditional Branch BR label BRn label BRz label BRp label BRnz label BRnp label BRzp label BRnzp label BRnz loop BRnzp loop Unconditional branch Branch if the CC is negative or zero. Unconditional branch Jump JMP JMP baseR JMP foo Jump to foo. PC ← baseR Jump to Subroutine JSR / JSRR JSR PCoffset11 JSRR baseR JSR Sort JSRR R2 R7 ← PC+1 Jump to Sort R7 ← PC+1 Jump to address in R2 Load Direct LD LD dr, label LD R4, count R4 ← mem[count] Load Indirect LDI LDI dr, label LDI R4, pointer R4 ← mem[mem[pointer]] Load Base + Offset LDR LDR dr, baseR, offset6 LDR R4, R2, #10 R4 ← contents of mem[R2+#10] Load Effective Address LEA LEA dr, label LEA R4, foo R4 ← address of foo Complement NOT NOT dr, sr NOT R4, R2 R4 ← NOT(R2) Return from Subroutine RET RET RET PC ← R7 Return from Interrupt RTI RTI RTI NZP, PC ← top two values popped off stack Store Direct ST ST sr, label ST R4, count mem[count] ← R4 Store Indirect STI STI SR, label STI R4, pointer mem[mem[pointer]] ← R4

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