Lab6 Manual

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1 | P a g e Ryerson University Department of Electrical and Computer Engineering COE/BME 328 – Digital Systems Lab 6 35 Marks (3 weeks) Design of a Simple General-Purpose Processor Due Date: Week 12 Objective: This objective of this laboratory experiment is to design and construct an Arithmetic and Logic Unit (ALU) in VHDL environment and implement it on an FPGA board.  Design and build all functions of the ALU.  Design, simulate and program the ALU using VHDL on an Altera FPGA board (Based on Functional Simulation in Quartus Simulator).  Download the program on the FPGA board and display the desired outputs on LEDs and 7-segment displays. Procedure: This unit consists of different parts that would come together to create a functional ALU. A processing unit is usually divided to 4 distinct components. The control unit performs the fetching of instructions and signals. The bus controls access to data values throughout the processing unit - these registers act as temporary storage units. The ALU Core performs the arithmetic and logical operations on desired inputs and produces the required outputs. This project focuses on all four components of a typical ALU. Part I: Procuring input data The ALU is to perform a set of arithmetical and logical functions on two 8-bit inputs A and B. These inputs are first utilized in simulation phase through waveform editor on Quartus II, and then will also be used when the program is downloaded on the FPGA board through DIP switches. Inputs A and B are procured using the last four digits of your lab partner’s student ID. For instance, if the student ID of your partner is 500864395, then    and  , translating to       Make sure that you ask for the last four digits of your lab partner’s student ID and utilize those values for the rest of this project as inputs A and B. Ensure to report these values at the beginning of your lab session to your TA.
2 | P a g e Figure 1. The Block Diagram of the GPU Part II: Storage Unit (Register) The storage units which are sometimes called Registers are utilized to temporary store the input values and then pass them to the following components in the system. As portrayed in Figure 1, two 8-bit register units are utilized in the ALU to store inputs A and B. The register reads the bit values on its input on the rising edge of the clock signal and passes those bit values to the output port on the next rising edge of the clock signal. Write the VHDL code using Figure 2 for a register unit and confirm its functionality with the help of a truth table. Thereafter, create a symbol of your design to be utilized in the final circuit design. Next, import the symbol to the GPU project. Import the same symbol twice as the system needs one register unit for each respective 8-bit input.

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