Sol PC ation_Rev_D ation Rev D

Dear

Sol-PCB

Customer:

The

enclosed

documentation

on

the

Sol-PCB

and

PM-5204

printed

circuit

boards

includes

the

following

information:

1)

five

Sol

schematic

diagrams

6)

I/O

port

allocation

2)

complete

revised

parts

list

7)

control

and

status

bit

definition

3)

assembly

drawings

for

Sol

&

PM

4)

S-IOO Bus

specification

5)

memory

allocation

table

8)

user

switch

option

selection

table

Many

of

the

mechanical

parts

for

the

Sol

Terminal

Computer

are

hard

to

obtain,

so

we

have

made

available

the

following

items:

Item

No.

Sol-CONKIT

Sol-PRELIM

Sol-SS

Price

$59.00

14.00

40.00

Includes

Jl

through

Jll

connectors,

personality

module

card

guides,

card

guide

brackets

and

handle

bracket.

Preliminary

Sol

manual

describing

assembly

and

checkout

procedures,

plus

much

additional

information.

Very

helpful

when

bringing

up

Sol.

IC

socket

kit

We

have

sent

the

source

listing

for

the

CONSOL

tm

Personality

module

software

to

INTERFACE

AGE

magazine.

This

article

is

currently

expected

to

be

published

in

the

December 1976

issue

but

publication

schedules

can

vary.

The

CONSOL

software

allows

the

Sol

to

be

used

as

a

stand-alone

computer

system

or

as

a

terminal.

The

following

commands

are

implemented:

BASIC

(executes

at

zero)

ENTER

(in

hexidecimal)

EXEC

(at

hex

address)

DUMP

(in

hexidecimal)

TERM

(terminal

mode)

TLOAD

(load

memory

from

cassette)

The Sol-PCB

boards

sold

for

$40

each

are

warranteed

for

thirty

days

against

defects

in

materials

and

workmanship.

The

warranty

is

void

if,

in

the

opinion

of

PTC,

the

printed

circuit

board

has

been

abused

during

assembly.

Warranty

is

limited

in

any

case

to

replacement

of

defective

printed

circuit

boards.

Processor

Technology

can

not

provide

direct

support

via

telephone

or

letter

to

Sol-PCB

purchasers.

The

documentation

provided

should

be

sufficient

to

easily

build

and

debug

a

Sol

unit.

NOTE:

please

do

not

make

parts

substitutions!

If

you

are

in

any

way

dissatisfied

with

your

unassembled

Sol-PCB

please

feel

free

to

return

it

to

us

postpaid

for

a

full

refund.

Have

fun!

PROCESSOR

TECHNOLOGY

CORPORATION

6200

HOLLIS

STREET

EMERYVILLE

CA

94608

(415)

652-8080

CABLE

ADDRESS

"PROCTEC"

"Copyright

PROCESSOR TECHNOLOGY CORPORATION

Sol-PC

SINGLE

BOARD TERMINAL COMPUTER™

Table

1.

Sol-PC

Parts

List.

INTEGRATED

CIRCUITS

~

v J

/

1"

AM0026

or

DM0026

(UI04)

~

y'"

74S04

(U92)

1)'S cc)

:U..

/>

/

1/

1

4N26

(U39)

--

/ 3/

7406

(U57,

58,87)

v'

-v

i/..r

.1

/

¥.,.-/

SECTION

I

5

8T97

(U67,68,77,

~

,81)

:I"

/

~5'/V

2

/1

74LSI0

(U4

~

6

~

v-

/2/

1458CP

or

)-

558CP

(U

~

6,

1

~

8)

;/

3/

74LS20

(U2

~

59,

83)

~

1

1489A

(U38)

7

"...---

74LS86

(U74

y

,/./

",.,-

~

2

/

TMS6011NC

(U51,

69)

~

8

74LSI09

(U

fo

3

t,-

52

ty

63,

64,

70,

1 MCM6574

or

MCM6575

(U25)

72,73,75)

G0

..-

Y

4001

(U

~

)

/

74LS136

(U

~

)

V,/

_

2/

4013

(UI0

0'

,11

3)

~

3

74LS138

(U34,35

.-

36)

J

/.

v"

/.,/

v

./

....

y

4019

(Ulll)

/ 3

74LS15?

(U12,

30,3

2')

(U

~

)

/

74L~

}-

63

V'

0r

/

-G

BLS163

/

1"

4023

(U28,

3I,

3

3-

,40)

/

1'"

4024

(U86

,

')

//l,tclL

c;I

':

, /

t/'

/ / . oJ.

74166

(U

~

)

./

~

t'

4027

(U

;

Ol

~

/'

~

2

/

74173

(U95,

96)

/

4029

(Ul,11,84)

2-

W(

74LS

a.

75

or

/ 2 5

LSl

...

7 5/ / J

(U9v'".

9)

y v v

~

rr

1

4030

(U

7

2,13,

/

26,27,42,76,90,93,

/ v

97

,106

~

)

~

2

4046

(U85,

110)

, yo v"'"

~

4049

(U

~

1(

59"

)

/a!

74LS253

(U6

3t

,66,78,79)

~/

/"

~

f1'

v.(

/

V.

r

4520

(Ul12)

/

rrP

7

74LS367

(g.

29

~

v

~7

,50,71,89,

/.'1

/7

94,107)

~

74HOO

(U91)

~/

.

~

8080,

8080A

or

9080A

(UI05)

~

3

74LSOO

(U4

r<,

48,55)

~./'

~

8836

or

8T380

(U46)

~

74LS02

or

9LS02

(U5

~

60)

~

91L02APC

or

2102LIPC

(

74LS04

(U2

~

4

5,

4

~

54)

./

(U3

-

10,

U14

-

21)

.,.....

r

93L16

(U62)

11/0

g ?

TRANSISTORS

/

/'

(Q4

&

5)

2N2222

2

'"

2N2907

(Ql

&

2)

1

2N4360

(Q3)

CRYSTAL

1

1'

14.318

MHz

.

18/

l.n

HC-

U

Case

(XTAL)

-

DIODES

/

1""9

lN4148

or

IN914

(01,03

-

10)

Y

lN5231B

Zener

Diode

(011)

4

.....

/

IN4001

(02,12,13,14)

RELAYS

2

DIP

Reed,

Sigma

191-TEIA15S

(Kl

&

2)

PROCESSOR

TECHNOLOGY

CORPORATION

Sol-PC

SINGLE

BOARD

TERMINAL

COMPUTER™

SECTION I

Table

1.

Sol-PC

Parts

List

(Continued).

RESISTORS CAPACITORS

./

2

47

ohm,

~

watt,

5%

,)

~

10

pfd,

disc

/

75

ohm,

~

watt,

5%

Y

330

pfd,

disc

"-

./

100

ohm,

~

watt,

5%

'3/

680

pfd,

monolythic

or

/ Y"'/IOO 1"'''

disc

ceramic

ohm,

~

watt,

5%

\,/

~

r

200

ohm,

~

watt,

5%

,./

6

.001

ufd,

disc

A~

30

ohm,

~

5%

2

/'"

.001

ufd,

Mylar

tubular

watt,

/'/

~

-"",

Y

330

ohm,

~

watt,

5%

~

.

.01

ufd~

Mylar

tubular

~

470

ohm,

~

watt,

5%

;37

.047

ufd,

disc

2

~

470

ohm,

~

watt,

5%

M

.1

ufd,

disc

f'

cf

680

ohm,

~

watt,

5%

~

.1

ufd,

Mylar

tubular

~

1.5K

ohm,

~

watt,

5%

.68

ufd,

monolythic

\

ceramic

/ y

3.3K

ohm,

~

watt,

5%

\ 1

ufd,

tantalum,

~

6

~

5.6K

ohm,

~

watt,

5%

dipped

10

K

ohm,

~

watt,

5%

5/

15

ufd,

tantalum,

y

15

K

ohm,

~

watt,

5%

dipped

'/

2/

39

K

ohm,

~

watt,

5%

/

l(

100

ufd,

aluminum

//

/'

electrolytic

,/

2

47

K

ohm,

~

watt,

5%

3

50

K

ohm,

Potentiometer

/ 3/

100

K ohm,

~

watt,

5%

/ 2

150

K

ohm,

~

watt,

5%

/'

2/ 1 M

ohm,

~

watt,

5%

.....

y-

2.2M

ohm,

~

watt,

5%

....:

3.3M

ohm,

~

watt,

5%

CONNECTORS

1

25-pin

Female,

AMP206584-1

(Jl)

I

25-pin

Male,

AMP206604-1

(J2

)

2

20-pin

Header,

3M3492-2002

(J3

&

4)

1

30-pin

Right

Angle

Edge

Connector,

VIKING

3KH15/75KC15

(J5)

2

Miniature

Phone

Jack

(J6

&

7)

2

Subminiature

Phone

Jack

(J8

&

9)

1

7-pin

Right

Angle

Molex

(JIO)

1

100-pin

Edge

Connector,

TI

H322150-02-6A

(Jll)

1

Molex-type

DC

Power

Cable,

Jll

mating

(prefabricated)

PROCESSOR

TECHNOLOGY

CORPORATION

Sol-PC

SINGLE

BOARD

TERMINAL

COMPUTER™

SECTION

I

Table

1.

Sol-PC

Parts

List

(Continued).

MISCELLANEOUS

1 Sol-PCB

Circuit

Board

2

8-pin

DIP

Socket

29

14-pin

DIP

Socket

74

16-pin

DIP

Socket

1

24-pin

DIP

Socket

3

40-pin

DIP

Socket

2 DIP

Switch,

6

position

(Sl&4)

2

DIP

Switch,

8

position

(S2&3)

1

Length

72-ohm

Coaxial

Cable

1

Tie

Wrap

2

Mounting

Bracket,

Sol-1040

PERSONALITY

MODULE

KIT,

PM5204

1

PM5204

PC

Board

2/ 5204

EPROM

(U1,U2)

2

Card

Guide,

SAE1250F

10 #4

Lockwasher,

internal

tooth

2 #4

Insulating

Washer,

0.05

4

4-40

x

1/4

Binder

Head Screw

6

4-40

x

7/16

Binder

Head Screw

2

4-40

x

5/8

Binder

Head Screw

10

4-40

Hex Nut

1

Length

Solder

1 Manual

1

Personality

Module

Kit

(contents

listed

below)

/ 1 74LS155 (U5)

~

10K

ohm,

1/4

watt,

5%

Film

Resistor

J

~

.047

ufd

Capacitor,

Disc

Ceramic

~

2

,

1

ufd

Capacitor,

Tantalum

Dipped

1

16-pin

DIP

Socket

1

24-pin

DIP

Socket

1

Bracket,

Sol-1045

2

2-56

Binder

~ead

Screw

COMP

SIDE

U3

ALL R'S VALUE =

10K

C3

:

0.047

U2

o o o

-I

-o~o

!

:01:10

I

o

c

C

I"'"

0-

--+

-0"'

J3

Keyboard

Connector

(between

U64

and

U65)

no.

1

2

3

4

5

6

7

8

9

10

Signal

name

ground

+5v

Kbd

Data

Ready

Break

Kbd

Data

0 A

Kbd

Data

1 E

Kbd

Data

2 C

Kbd

Data

3

1)

+5v

ground

I

12

13

14

15

16

17

18

19

20

no.

J4

Display

Expansion

Connector

(between

U28, 29)

2

3

4

5

6

7

8

9

10

no.

Signal

name

ground

N.C.

Char.

addr.

4

Character

clock

Char.

addr.

0

I-

Char.

addr.

1

Char.

addr.

2

Char.

addr.

3

N.C.

ground

J5

Personality

Module Edge

Connector

no.

Al

A2

A3

A4

AS

A6

A7

A8

A9

A10

All

A12

A13

A14

A15

Signal

name

Ground

+5VDC

Addr.

9

Addr.

8

Addr.

7

INT

Bus 0

INT

Bus 1

INT

Bus 2

INT

Bus 3

INT

Bus 4

INT

Bus 5

Program

0

Program

1

Program

2

Program

3

1

12

13

14

15

16

17

18

19

20

no.

BI

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

Sol-PC,

Rev.

10/18/76

Signal

name

ground

+5v

Restart

Local

KBd

Data

4

r:

KBd

Data

5

KBD

Data

6

KBD

Data

7

+5v

ground

Signal

name

ground

N.C.

2,E

Dot

Clock,

14.318MHz

Composite

sync.

out

TTL

Serial

Data

Out

Composite

blanking

out

Scan

advance

out

Char.

addr.

5

N.C.

ground

Signal

name

Ground

+5VDC

Addr.

0

Addr.

4

Addr.

3

Addr.

2

Addr.

1

Addr. 5

Addr.

6

C4

C0

INT

Bus 6

INT

Bus 7

-12VDC

+12VDC

J6

Audio Out forCUTS

Cassette

Interface:

Mini-phone

jack

at

rear

panel

J7

Ap~io

In

forCUTS

Cassette

Interface:

Mini-phone

jack

at

rear

panel

J8

Tape Motor

Control

1:

(See

output

port

FA,

bit

7)

Sub-mini

jack

at

rear

panel

J9

Tape Motor

Control

2:

(See

output

port

FA,

bit

6)

Sub-mini

jack

at

rear

panel

J10

DC

Power

Connector,

Sol-PC

Ground

+5VDC

-12

VDC

+12

VDC

-12

VDC

+5

VDC

Ground

NUMBER

1

2

3

4

5

6

7

8

9

10

11

12

13

to

17

18

19

20

21

22

23

24

25

26

0

SYMBOL

+8V

-16V

X;RDY

VIO

VI1

VI2

VI3

VI4

VIS

VI6

VI7

XRDY2

S-100

Bus

Definitions

NAME

FUNCTION

~olts

Unregulated

voltage

on

bus,

supplied

to

PC

boards

and

regulated

to

5V

supplied

by

Sol-20

supply

-16

Volts

Positive

unregulated

voltage

supplied

by

Sol-20

power

supply

EXTE~~AL

READY

External

ready

input

to

CPU

ready

circuitry

Vectored

Interrupt

Line

4f0

Vectored

Interrupt

Line

4f1

Vectored

Interrupt

Line

4f2

Vectored

Interrupt

Line

4f3

Vectored

Interrupt

Line

#4

Vectored

Interrupt

Line

4f5

Vectored

Interrupt

Line

4f6

Vectored

Interrupt

Line

4n

EXTERNAL

READY

4f2

not

used

by

Sol-PC

TO

BE

DEFINED

STAT

DSB

C/C

DSB

UNPROT

SS

ADD

DSB

DO

DSB

02

01

PHLDA

STATUS

DISABLE

COMMAND/CONTROL

DISABLE

UNPROTECT

SINGLE

STEP

ADDRESS

DISABLE

DATA

OUT

DISABLE

PHASE

2

CLOCK

PHASE

1

CLOCK

HOLD

ACKNOWLEDGE

-Allows

the

buffers

for

the

8

status

lines

to

be

tri-stated

-Allows

the

buffers

for

the

6

output

command/control

lines

to

be

tri-stated

-

not

used

by

Sol-PC

electronics

-

not

used

by

Sol-PC

-

Allows

the

buffers

for

the

16

address

lines

to

be

tri-stated

-Allows

the

buffers

for

the

8

data

output

lines

to

be

tri-stated

Processor

command/control

output

signal

that

appears

in

response

to

the

HOLD

signal;

indicates

that

the

data

and

address

bus

will

go

to

the

high

impedance

state

and

processor

will

enter

HOLD

state

after

completion

of

the

current

machine

cycle.

NUMBER

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

..

SYMBOL

PWAIT

PINTE

AS

A4

A3

A15

A12

A9

DIOI

DI00

AlO

DI04

DI05

DI06

DI02

DI03

DI07

SMI

SOUT

SINP

SMEMR

SHLTA

CLOCK

GND

+8V

-16V

S-IOO Bus

Definitions-continued

FUNCTION

NAME

WAIT

-Processor

command/control

signal

that

appears

in

response

to

the

HOLD

signal;

indicates

that

the

data

and

address

bus

will

go

to

the

high

impedance

state

and

processor

will

enter

HOLD

state

after

completion

of

the

current

machine

cycle

INTERRUPT

ENABLE

-Processor

command/control

output

signal;

indicates

interrupts

are

enabled,

as

determined

by

the

contents

of

the

CPU

internal

interrupt

flip-flop.

When

the

flip-flop

is

set

(Enable

Interrupt

instruction),

interrupts

are

accepted

by

the

CPU;

when

it

is

reset

(Disable

Interrupt

instruction),

interrupts

are

inhibited.

Address

Line

If5

Address

Line

If4

Addre

s s

Line

If3

Address

Line

#15

(MSB)

Address

Line

#12

Address

Line

If9

Data

In/Out

line

Data

In/Out

line

Address

Line

#10

Data

In/Out

Line

Data

In/Out

Line

Data

In/Out

Line

Data

In/Out

Line

Data

In/Out

Line

Data

In/Out

Line

MACHINE

CYCLE

1

OUTPUT

INPUT

MEMORY

READ

HALT

ACKNOlvLEDGE

CLOCK

GROUND

+8

Volts

-16

Volts

#1 same

as

94

#0 same

as

95

#4

same

as

91

#5 same

as

92

#6 same

as

93

#2 same

as

88

#3 same

as

p~n

89

#7 same

as

p1n

90

-Status

output

signal

that

indicates

that

the

processor

is

in

the

fetch

cycle

for

the

first

byte

of

an

instruction

-Status

output

signal

that

indicates

the

address

bus

contains

the

address

of

an

output

device

and

t'he

data

bus

will

cohtain

the

ouput

data

when

PWR

is

active

-Status

output

signal

that

indicates

the

address

bus

cont

-

ains

the

address

of

an

input

device

and

the

input

data

should

be

placed

on

the

data

bus

when

PDBIN

is

active

-Status

output

signal

that

indicates

the

data

bus

will

be

used

to

read

memory

data

-

Status

output

signal

that

acknowledges

a

HALT

instruction

-

Inverted

output

of

the

02

CLOCK

Unregulated

input

to

5

volt

regulators

supplied

by

Sol-20

power

supply

Negative

unregulated

voltage

by

Sol-20

power

supply

s.upplied

Pinouts:

Parallel

Data

Interface

(PDI)

as

Sept.

30,

1976

used

on

Processor

Tech.

Sol

System

MASTER

UNIT-Male

connector

J2

1

2

3

4

5

6

7

8

9

10

11

12

13

11

Signal

J2

pinll

Signal

name

nmemonic name nmemonic

CG

Chassis

Ground 14

US

Unit

Select

SG

Signal

Ground 15

OE

Output

Enable

IE

Input

Enable

16

xrm:

eXternal

I>evice Ready

rm:

Data

Reaoy 17 nL

Output

Loao

!AI{

18

OD7

Output

Data,bit

7

ID7

ID6

IDS

ID4

ID3

ID2

IDI

IDa

Input

Data,

bit

7 19

OD6

Output

Input

Data,

bit

6

20

ODS

Output

Input

Data,

bit

5 21

OD4

Output

Input

Data,

bit

4

22

OD3

Output

Input

Data,

bit

3 23

OD2

Output

Input

Data,

bit

2 24

ODI

Output

Input

Data.

bit

1

25

ODO

Output

Input

Data,

bit

a

Pinouts:

Serial

Data

Interface

(SCI)

as

used

on

Processor

Tech.

Sol

System

Data,

bit

6

Data,

bit

5

Data,

bit

4

Data.

bit

3

Data,

bit

2

Data,

bit

1

Data,

bit

a

Female

connector-DB25S

J1

pin41

Signal

Jl

pin41

Signal

name

1

2

3

4

5

6

7

Note

1:

Note

2:

nmemonic name nmemonic

CG

Chassis

Grotmd 8

CD

Carrier

Detect

TD

Transmit

Data

11

CLO

Current

Loop

Output

RD

Receive

Data

12

LR1

Loop

Receiver

1

RTS

Request

To

Send 13 I

LR2

Loop

Receiver

2

CTS

Clear

To

Send

20

DTR

Data

Terminal

Ready

DSR

Data

Set

Ready 23

LCS

Loop

Current

Source

SG

Signal

Ground

Many

pins

not

specified

here

are

used

in

EIA

RS-232C

specification.

USE

THEM

WITH CAUTION.

Terminals

output

on

pins

2,4

&

20

and

input

on

pins

3,5

& 6

for

EIA

type

hookups.

Modems

and

computer

mainframes

output

on

pins

~

5

& 6

and

input

on

pi

ns

l'

2,4

&

20.

Note

3:

Current

loop

hookups

are

the

same

for

terminals,

modems,mainframes.

STATUS

PORT

INPUT

BIT

ASSIGNMENTS

PORT

F8 (STATUS, SERIAL

COMM.

CHANNEL)

SIGNAL

NAME

FUNCTION

¢

SCD

Serial

Carrier

Detect

(EIA)

1

SDSR

Serial

Data

Set

Ready

(EIA)

2 SPE

Serial

Parity

Error

3 SFE

Serial

Framing

Error

4

SOE

Serial

Overrun

Error

5 SCTS

Serial

Clear

to

Send

(EIA)

6

SDR

UART

Serial

Data

Ready

7

STBE

UART

Serial

Transmit

Buffer

Empty

PORT

FA

(AUX. STATUS,

CASSETTE

TAPE

INTERFACE,

PARALLEL

I/O,

BIT

SIGNAL

NAME

FUNCTION

¢

KDR

1

PDR

2

PXDR

3

TFE

4

TOE

5

not

used

Keyboard

Data

Ready

Parallel

Data

Ready

Parallel

eXternal

Device

Tape

Framing

Error

Tape

Overrun

Error

Ready

6

TDR

Tape

Data

Ready

7

TTBE

Tape

Transmitter

Buffer

Empty

PORT

FE

(DISPLAY STATUS)

BIT

¢

SIGNAL

NAME

SOK

FUNCTION

Scroll

OK~

~

sec

timeout

after

scroll

CONTROL

PORT

OUTPUT

BIT

ASSIGNMENTS

PORT

F8

(CONTROL,

SERIAL

COMM.

CHANNEL)

BIT

4

PORT

FA

BIT

3

4

5

6

7

PORT

FE

BIT

¢ - 3

4 - 7

SIGNAL

NAME

FUNCTION

SRTS

Serial

Request

to

Send

(CONTROL,

PARALLEL

I/O,

CUTS

CASSETTE

I/O)

SIGNAL

NAME

PIE

PUS

TBR

TT2

TTl

FUNCTION

Parallel

Input

Enable

Parallel

Unit

Select

Tape

Baud

Rate

(300/1200)

Tape

Transport

2

Tape

Transport

1

(SCROLL

CONTROL,

DISPLAY SECTION)

SIGNAL

NAME

BDLA

FDSP

FUNCTION

Beginning

Display

Line

Absolute

address

First

Displayed

Line

Screen

Position

CONNECTOR

DESIGNATION

ACTIVE DIRECTION

1

carrier

¢

link

ok

1

error

1

error

1

error

¢

clear

1

ready

1

empty

KEYBOARD

INPUT)

ACTIVE DIRECTION

¢

ready

¢

ready

¢

ready

1

error

1

error

1

ready

1

empty

ACTIVE DIRECTION

¢

time

complete

ACTIVE DIRECTION

1

request

ACTIVE DIRECTION

1

3

J2

low

o

14

J2

low

o

1200

Baud

o

run

tape

o

run

tape

ACTIVE DIRECTION

4-bit

data

nybble

4-bit

data

nybble

Jl

Serial

data

J6

Cassette

Tape

Audio

Out

J2

Parallel

Data

J7

Cassette

Tape

Audio

In

J3

Keyboard

J8

Tape

Motor

1

J4

Display

Expansion

J9

Tape

Motor

2

J5

ROM

Personality

Module

JIO

PC

Power

Jll

S-lOO

Bus

Expansion

NUMBER

53

54

55

56

57

58

59

to

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

S-100

Bus

Definitions-continued

SYMBOL

SSWI

EXT

CLR

RTC

STSTB

DiGf

FRDY

NAME

SENSE

SWITCH

INPUT

EXTERNAL

CLEAR

REAL

TIME

CLOCK

STATUS

STROBE

DATA

INPUT

GATE

#1

FRONT

PANEL

READY

TO

BE

DEFINED

MREQ

MEMORY

REQUEST

REF

REFRESH

PHANTOM PHANTOM

DISABLE

MWRITE

MEMORY

WRITE

PS

PROJECT

STATUS

PROT

PROTECT

RUN RUN

PRDY

PROCESSOR

READY

-

PINT

INTERRUPT

REQUEST

PHOLD

PRESET

RESET

PSYNC

SYNC

PWR

WRITE

PDBIN

DATA

BUS

IN

FUNCTION

not

used

by

Sol

not

used

by

Sol-PC

electronics

not

used

by

Sol-PC

electronics

not

used

by

Sol

When

low

forces

PDBINS

low

and

forces

CPU

input

multiplexers

to

the

DIO

bus.

During

CPU

DBIN

cycle,

disables

CPU

DIO

bus

drivers

-When low

disables

MWRITE

driver

- Z

80

signal

not

used

by

Sol-PC

electronics

- Z 80

signal

not

used

by

Sol-PC

electronics

-Output

from

CPU

section

used

to

disable

RAM

or

ROM

during

power on

initialization

program

execution

-Indicates

that

the

data

present

on

the

Data

Out Bus

is

to

be

written

into

the

memory

location

currently

on

the

address

bus

-not

used

by

Sol-PC

electronics

-not

used

by

Sol-PC

electronics

-

not

used

by

Sol-PC

electronics

-Memory

and

I/O

input

to

the

CPU

Board

wait

circuitry

-The

processor

recognizes

an

interrupt

request

on

this

line

at

the

end

of

the

current

instruction

or

while

halted.

If

the

processor

is

in

the

HOLD

state

or

the

Interrupt

Enable

flip-flop

is

reset,

it

will

not

honor

the

request.

-Processor

command/control

input

signal

that

requests

the

processor

enter

the

HOLD

state;

allows

an

external

device

to

gain

control

of

address

and

data

buses

as

soon

as

the

processor

has

completed

its

use

of

these

buses

for

the

current

machine

cycle

-Processor

command/control

input;

while

activated,

the

content

of

the

program

counter

is

cleared

and

the

instruction

register

is

set

to

0

-Processor

command/control

output;

provides

a

signal

to

indicate

the

beginning

of

each

machine

cycle

-Processor

command/control

output;

used

for

memory

write

or

I/O

out-

put

control.

Data

on

the

data

bus

is

stable

while

the

PWR

is

active

-Processor

command/control

output;

indicates

to

external

circuits

that

the

data

bus

is

in

the

input

mode

NUMBER

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

SYMBOL

AO

Al

A2

A6

A7

A8

A13

A14

All

DI02

DI03

DI07

DI04

DI05

DI06

DIOI

DI00

SINTA

SWO

SSTACK

POC

GND

S-IOO Bus

Definitions-continued

NAME

Address

Line

iFO

Address

Line

ill

Address

Line

1,1:2

Addres

s

Line

iF6

Address

Line

417

Address

Line

iF8

Addres

s

Line

ill3

Address

Line

4114

Address

Line

4111

FUNCTION

(LSB)

Data

In/Out

Line

412

same

as

41

Data

In/Out

Line

413

same

as

42

Data

In/Out

Line

417

same

as

43

Data

In/Out

Line

414

same

as

38

Data

In/Out

Line

415

same

as

39

Data

In/Out

Line

416

same

as

40

Data

In/Out

Line

411

same

as

35

Data

In/Out

Line

410

same

as

p~n

36

INTERRUPT

ACKNOWLEDGE

-Status

output

signal;

acknowledges

WRITE

OUT

STACK

POWER-ON

CLEAR

GROUND

signal

for

INTERRUPT

request

-Status

output

signal;

indicates

that

the

operation

in

the

current

machine

cycle

will

be

a

WRITE

memory

or

output

function

-Status

output

signal

indicates

that

the

address

bus

holds

the

pushdown

stack

address

from

the

Stack

Pointer

SWITCH

FUNCTION

DEFINITION

Display

Ctrl---Schematic

Drawing

414

Function

Switch

No.

Mnemonic

ON

OFF

RST

Restart

to

Zero

RUN

(

Dwg.

1Fl)

Sl-l

Sl-2

Sl-3

Sl-4

Sl-5

Sl-6

not

used

BLANK

Polarity

BLINK

SOLID

Blank

Ctrl

Characters

Display

Ctrl

Char.

Blinking

cursor

Solid

cursor

*NO

cursor

if

Sl-5

and

Sl-6

are

off

at

same

time.

Both

switches

should

not

be

on

at

the

same

time.

Drawing

413

--

Sense

Switch

No.

Mnemonic

S2-1

ssw0

S2-2thruS2-7

S2-8

SSW7

Function

ON

LSB,

data

bit

etc.

MSB

data

bit

7

*Solid

or

NO

cursor

*Blinking

or

NO

cursor

OFF

0-LO

LO

HI

SERIAL

I/O

BAUD

RATE

SWITCH

--

Schematic

Drawing #3

Function

Switch

No.

S3-1

S3-2

S3-3

S3-4

S3-s

S3-6

S3-7

S3-8

Mnemonic

75

11

15

30

60

12

24/48

96

ON

OFF

75

BAUD

*

Do

not

turn

more

than

110

BAUD

one

switch

on

at

a

time

150

BAUD

300

BAUD

600

BAUD

1200

BAUD

2400

or

4800(norma11y

2400

if

not

jumpered

K

to

M)

9600

BAUD

SERIAL

Switch

I/O

CONTROL

No.

Mnemonic

Schematic

Drawing #3

ON

OFF

S4-l

S4-2

S4-3

S4-4

S4-s

S4-6

PS

WLS

1

WLS

2

SBS

PI

F/R

Parity

even

Data

word

length

1

stop

bit

Partty

Half

duplex

Parity

odd

(if

s4-s

on)

t

8bits

7bits

6bits

sbitSJ

ON

OFF OFF

ON

OFF

ON

OFF

2

ston

bits

(1.5

if

sbits/word)

No

parity

Full

duplex

MEMORY

ALLOCATION:

ON

CARD

Hexidecima1

Address

C000 -

C7FF

C800 -

CBFF

CC00

-

CFFF

Function

Personality

Module

ROM

or

PROM

(2048

words)

System

RAM

(1024

words)

Display

RAM

Memory (1024

characters)

ON

CARD

INPUT

PORT

ALLOCATION

Hexidecima1

Port

Address

F8

F9

FA

FB

FC

FD

FE

FF

OUTPUT

PORTS

Hex

Port

Address

F8

F9

FA

FB

FC

FD

FE

FF

Function

Status,

Serial

Comm.

channel

Serial

Communication

Channel

Data

Aux.

Status,

Cassette

tape

interface,

parallel

I/O,

keyboard

input

Audio

Cassette

(CUTS)

Data

Keyboard

Data

(from

J3)

Parallel

Port

Data

(from

J2)

Display

Status

Sense

Switch

(S2-1

thru

S2-8)

Function

Control,

Serial

Comm.

Channel

Data,

Serial

Comm.

Channel

Control,

Parallel

I/O,

CUTS

Cassette

I/O

Data,

CUTS

audio

cassette

Interface

Alarm

(optional)

Data,

Parallel

output

Data

channel

Scroll

control,

Display

Section

not

usedin

Sol-PC

PC

MUDIFICATION REViSION

LI-~VEL

D

Due

to

layout

errors

connections

to

pins

28,

73

and

74

have

been

"

interchanged.

These

signals

are

used

by

DMA

and

interrupt

devices.

Correction

requires

three

cuts

and

installation

of

three

jumpers.

Use

24

gauge

wire

supplied

with

the

kit

for

these

changes.

1.

Cut

trace

on

rear

side

of

board

connecting

1

of

U45

with

feedthrough

directly

below.

Install

jumper

wire

on

rear

side

of

board

connecting

1

of

U45

with

73

of

Jll.

2. Cut

trace

connecting

the

feedthTough

adjacent

to

pins

13

and

14

of

U64

with

the

feedthrough

directly

above

(on

rear

side

of

board).

Install

jumper

wire

as

shown

on

the

rear

side

of

the

board.

3.

Cut

trace

on

front

side

of

the

board

connecting

the

feedthrough

innnediately

below

and

to

the

left

of

the

"Jll"

designation

with

73

of

Jll.

Install

a

jumper

wire

from

this

feedthrough

to

28

of

Jll

on

the

rear

side

of

the

board.

-

.,

•

• , i •

front

(component)

side

,

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