June 2014 Release UVM Class Reference Manual 1.2

• UVM Class 1.2 Reference
• Contents
• Overview
  • Scope
  • Purpose
• Normative References
• Definitions, Acronyms, and Abbreviations
  • Definitions
  • Acronyms and Abbreviations
• Classes and Utilities
• Base Classes
  • Miscellaneous Structures
  • uvm_object
  • uvm_transaction
  • uvm_root
  • Port Base Classes
• Reporting Classes
  • uvm_report_message
  • uvm_report_object
  • uvm_report_handler
  • uvm_report_server
  • uvm_report_catcher
• Recording Classes
  • uvm_tr_database
  • uvm_tr_stream
• Factory Classes
  • uvm_registry
  • uvm_factory
• Phasing
  • uvm_phase
  • uvm_domain
  • uvm_bottomup_phase
  • uvm_task_phase
  • uvm_topdown_phase
  • UVM Common Phases
  • UVM Run-Time Phases
  • User-Defined Phases
• Configuration and Resource Classes
  • uvm_resource
  • uvm_resource_db
  • uvm_config_db
• Synchronization Classes
  • uvm_event
  • uvm_event_callback
  • uvm_barrier
  • uvm_objection
  • uvm_heartbeat
  • uvm_callback
• Container Classes
  • uvm_pool
  • uvm_queue
• TLM Interfaces
  • TLM1
    • Interfaces
    • Exports
    • Ports
    • Implementation Classes
    • FIFOs
    • FIFO Base
    • Channel Classes
    • Sequence Item Pull Ports
    • Sequencer Base
  • TLM2
    • Interface Masks
    • Types
    • Generic Payload & Extensions
    • Socket Base Classes
    • Sockets
    • Export Classes
    • Interface Implementations
    • Ports
    • uvm_tlm2_time
  • Analysis Ports
• Components
  • uvm_component
  • uvm_test
  • uvm_env
  • uvm_agent
  • uvm_monitor
  • uvm_scoreboard
  • uvm_driver
  • uvm_push_driver
  • uvm_random_stimulus
  • uvm_subscriber
  • Comparators
    • uvm_in_order_comparator
    • uvm_algorithmic_comparator
    • uvm_pair
    • uvm_policies
• Sequencers
  • uvm_sequencer_base
  • uvm_sequencer_param_base
  • uvm_sequencer
  • uvm_push_sequencer
• Sequences
  • uvm_sequence_item
  • uvm_sequence_base
  • uvm_sequence
  • uvm_sequence_library
• Macros and Defines
  • Report Macros
  • Component and Object
  • Sequence and Do Action
  • Callback Macros
  • TLM Macros
  • Register Defines
  • Version Defines
• Policies
  • uvm_printer
  • uvm_comparer
  • uvm_recorder
  • uvm_packer
  • Links
  • Data Access
    • Set / Get Base
    • Simple Lock
    • Get To Lock
    • Set Before Get
• Register Layer
  • Overview
  • Global Declarations
  • Register Model
    • Blocks
    • Address Maps
    • Register Files
    • Registers
    • Fields
    • Memories
    • Indirect Registers
    • FIFO Registers
    • Virtual Registers
    • Virtual Fields
    • Callbacks
    • Memory Allocation Manager
  • DUT Integration
    • Generic Register Operation Descriptors
    • Register Model Adaptor
    • Explicit Register Predictor
    • Register Sequences
    • Backdoors
    • HDL Access
  • Test Sequences
    • Run All Built-In
    • Reset
    • Register Bit Bash
    • Register Access
    • Shared Access
    • Memory Access
    • Memory Walk
    • HDL Paths Checking
• Command Line Processor
  • CLP Overview
  • uvm_cmdline_processor
• Globals
  • Types and Enumerations
  • Globals
  • Core Service
  • Traversal
• Bibliography
• Index
  • Everything
  • Classes
  • Files
  • Macros
  • Methods
  • Types
  • Variables
  • Constants
  • Ports