Quectel Wireless Solutions 201211M50 GSM/GPRS Module User Manual M10 Hardware Design

Quectel Wireless Solutions Company Limited GSM/GPRS Module M10 Hardware Design

User Manual

M50Hardware Design M50_HD_V2.0 - 1 - M50 Quectel Cellular Engine Hardware Design M50_HD_V2.0
M50Hardware Design M50_HD_V2.0 - 2 - Document Title M50 Hardware Design Revision 2.0 Date 2012-06-26 Status Released Document Control ID M50_HD_V2.0 General Notes Quectel offers this information as a service to its customers, to support application and engineering efforts that use the products designed by Quectel. The information provided is based upon requirements specifically provided for customers of Quectel. Quectel has not undertaken any independent search for additional information, relevant to any information that may be in the customer’s possession. Furthermore, system validation of this product designed by Quectel within a larger electronic system remains the responsibility of the customer or the customer’s system integrator. All specifications supplied herein are subject to change. Copyright This document contains proprietary technical information of Quectel Co., Ltd. Copying this document, distribution to others, and communication of the contents thereof, are forbidden without permission. Offenders are liable to the payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design. All specifications supplied herein are subject to change without notice at any time. Copyright © Shanghai Quectel Wireless Solutions Ltd. 2012. Quecctel Confidential
M50Hardware Design M50_HD_V2.0 - 3 - Contents Contents ................................................................................................................................................... 3 Table Index .............................................................................................................................................. 5 Figure Index ............................................................................................................................................ 6 0. Revision history .................................................................................................................................. 8 1. Introduction ....................................................................................................................................... 9 1.1. Related documents.................................................................................................................... 9 1.2. Terms and abbreviations......................................................................................................... 10 1.3. Safety cautions ........................................................................................................................ 12 2. Product concept ............................................................................................................................. 15 2.1. Key features ............................................................................................................................ 15 2.2. Functional diagram ................................................................................................................. 17 2.3. Evaluation board ..................................................................................................................... 18 3. Application interface ...................................................................................................................... 19 3.1. Pin of module .......................................................................................................................... 20 3.1.1. Pin assignment .............................................................................................................. 20 3.1.2. Pin description .............................................................................................................. 22 3.2. Operating modes ..................................................................................................................... 29 3.3. Power supply........................................................................................................................... 30 3.3.1. Power features of module ............................................................................................ 30 3.3.2. Decrease supply voltage drop ...................................................................................... 30 3.3.3. Reference design for power supply ............................................................................. 31 3.3.4. Monitor power supply .................................................................................................. 32 3.4. Power on and down scenarios ................................................................................................ 32 3.4.1. Power on ....................................................................................................................... 32 3.4.2. Power down .................................................................................................................. 34 3.4.3. Restart ........................................................................................................................... 36 3.5. Charge interface ...................................................................................................................... 38 3.6. Power saving ........................................................................................................................... 38 3.6.1. Minimum functionality mode ...................................................................................... 38 3.6.2. SLEEP mode................................................................................................................. 39 3.6.3. Wake up module from SLEEP mode .......................................................................... 39 3.7. Summary of state transition ................................................................................................... 39 3.8. RTC backup............................................................................................................................. 40 3.9. Serial interfaces ...................................................................................................................... 41 3.9.1. UART Port .................................................................................................................... 42 3.9.2. Debug Port .................................................................................................................... 46 3.9.3. Auxiliary UART Port ................................................................................................... 46 3.9.4. UART application ........................................................................................................ 47 3.10. Audio interfaces .................................................................................................................... 50 3.10.1. Decrease TDD noise and other noise ........................................................................ 51 3.10.2. Microphone interfaces design.................................................................................... 51 Quecctel Confidential
M50Hardware Design M50_HD_V2.0 - 4 - 3.10.3. Receiver and speaker interface design ...................................................................... 52 3.10.4. Earphone interface design.......................................................................................... 54 3.10.5. Loud speaker interface design ................................................................................... 54 3.10.6. Audio characteristics .................................................................................................. 55 3.11. SIM card interface ................................................................................................................ 55 3.11.1. SIM card application .................................................................................................. 55 3.11.2. 6 Pin SIM cassette ...................................................................................................... 57 3.11.3. 8 Pin SIM cassette ...................................................................................................... 58 3.12. SD card interface .................................................................................................................. 60 3.13. PCM interface ....................................................................................................................... 62 3.13.1. Configuration .............................................................................................................. 62 3.13.2. Timing ......................................................................................................................... 63 3.13.3. Reference design ........................................................................................................ 64 3.13.4. AT command .............................................................................................................. 64 3.14. ADC ....................................................................................................................................... 66 3.15. Behaviors of the RI............................................................................................................... 66 3.16. Network status indication..................................................................................................... 69 3.17. Operating status indication .................................................................................................. 69 4. Antenna interface........................................................................................................................... 71 4.1. RF reference design ................................................................................................................ 71 4.2. RF output power ..................................................................................................................... 72 4.3. RF receiving sensitivity.......................................................................................................... 72 4.4. Operating frequencies............................................................................................................. 72 4.5. RF cable soldering .................................................................................................................. 73 5. Electrical, reliability and radio characteristics ......................................................................... 74 5.1. Absolute maximum ratings .................................................................................................... 74 5.2. Operating temperature ............................................................................................................ 74 5.3. Power supply ratings .............................................................................................................. 75 5.4. Current consumption .............................................................................................................. 76 5.5. Electro-static discharge .......................................................................................................... 78 6. Mechanical dimensions ................................................................................................................ 79 6.1. Mechanical dimensions of module ........................................................................................ 79 6.2. Recommended footprint without bottom centre pads .......................................................... 81 6.4. Top view of the module ......................................................................................................... 82 6.5. Bottom view of the module.................................................................................................... 83 7. Storage and manufacturing ......................................................................................................... 84 7.1. Storage ..................................................................................................................................... 84 7.2. Soldering ................................................................................................................................. 85 7.3. Packaging ................................................................................................................................ 86 Appendix A: GPRS coding schemes ............................................................................................. 87 Appendix B: GPRS multi-slot classes............................................................................................ 88 Quecctel Confidential
M50Hardware Design M50_HD_V2.0 - 5 - Table Index TABLE 1: RELATED DOCUMENTS ..................................................................................................... 9 TABLE 2: TERMS AND ABBREVIATIONS........................................................................................ 10 TABLE 3: MODULE KEY FEATURES ................................................................................................ 15 TABLE 4: CODING SCHEMES AND MAXIMUM NET D ATA R ATE S OV E R A IR INTERFACE .. 17 TABLE 5: M50 PIN ASSIGNMENT ..................................................................................................... 21 TABLE 6: PIN DESCRIPTION ............................................................................................................. 22 TABLE 7: OVERVIEW OF OPERATING MODES.............................................................................. 29 TABLE 8: PIN DEF INITION OF THE CHARGING ............................................................................ 38 TABLE 9: SUMMARY OF STATE TRANSITION ............................................................................... 39 TABLE 10: LOGIC LEVELS OF THE UART INTERFACES.............................................................. 42 TABLE 11: PIN DEFINITION OF THE UART INTERFACES ............................................................ 42 TABLE 12: PIN DEFINITION OF AUDIO INTERFACES .................................................................. 50 TABLE 13: AOUT3 OUTPUT CHARACTERISTICS .......................................................................... 51 TABLE 14: TYP ICAL ELECTRET MICROPHONE CHARACTERISTICS ....................................... 55 TABLE 15: TYP ICAL SP EAKER CHARACTERISTICS .................................................................... 55 TABLE 16: PIN DEFINITION OF THE SIM INTERFACE ................................................................. 56 TABLE 17: PIN DESCRIPTION OF AMPHENOL SIM CARD HOLDER ......................................... 58 TABLE 18: PIN DESCRIPTION OF MOLEX SIM CARD HOLDER ................................................. 59 TABLE 19: PIN DEFINITION OF THE SD CARD INTERFACE ....................................................... 60 TABLE 20: PIN NAME OF THE SD CARD AND MICRO SD CARD ............................................... 61 TABLE 21: PIN DEFINITION OF PCM INTERFACE......................................................................... 62 TABLE 22: CONFIGURATION ............................................................................................................ 62 TABLE 23: QPCMON COMMAND DESCRIPTION .......................................................................... 65 TABLE 24: QPCMVOL COMMAND DESCRIPTION ........................................................................ 65 TABLE 25: PIN DEFINITION OF THE ADC....................................................................................... 66 TABLE 26: CHAR ACTERISTICS OF THE ADC ................................................................................ 66 TABLE 27: BEHAVIORS OF THE RI .................................................................................................. 66 TABLE 28: WOR KING STATE OF THE NETLIGHT ......................................................................... 69 TABLE 29: PIN DEFINITION OF THE STATUS................................................................................. 69 TABLE 30: PIN DEFINITION OF THE RF_ANT ................................................................................ 71 TABLE 31: THE MODULE CONDUCTED RF OUTPUT POWER .................................................... 72 TABLE 32: THE MODULE CONDUCTED RF RECEIVING SENSITIVITY .................................... 72 TABLE 33: THE MODULE OPERATING FREQUENCIES ................................................................ 72 TABLE 34: ABSOLUTE MAXIMUM RATINGS................................................................................. 74 TABLE 35: OPERATING TEMPERATURE ......................................................................................... 74 TABLE 36: THE MODULE POWER SUPPLY RATINGS ................................................................... 75 TABLE 37: THE MODULE CURRENT CONSUMPTION .................................................................. 76 TABLE 38: THE ESD ENDURANCE (TEMPERATURE:25℃,HUMIDITY:45 %)............................ 78 TABLE 39: DESCRIPTION OF DIFFERENT CODING SCHEMES .................................................. 87 TABLE 40: GPRS MULTI-SLOT CLASSES ........................................................................................ 88 Quecctel Confidential
M50Hardware Design M50_HD_V2.0 - 6 - Figure Index FIGURE 1: MODULE FUNCTIONAL DIAGRAM ............................................................................. 18 FIGURE 2: PIN ASSIGNMENT ............................................................................................................ 20 FIGURE 3: VOLTAGE RIPPLE DURING TRANSMITTING ............................................................. 30 FIGURE 4: REFERENCE CIRCUIT FOR THE VBAT INPUT ............................................................ 31 FIGURE 5: REFERENCE CIRCUIT FOR POWER SUPPLY .............................................................. 31 FIGURE 6: TURN ON THE MODULE USING DRIVING CIRCUIT................................................. 32 FIGURE 7: TURN ON THE MODULE USING KEYSTROKE ........................................................... 33 FIGURE 8: TIMING OF TURNING ON SYSTEM .............................................................................. 33 FIGURE 9: TIMING OF TURNING OFF THE MODULE................................................................... 34 FIGURE 10: REFERENCE CIRCUIT FOR EMERG_OFF BY USING DRIVING CIRCUIT ............ 36 FIGURE 11: REFERENCE CIRCUIT FOR EMERG_OFF BY USING BUTTON .............................. 36 FIGURE 12: TIMING OF RESTARTING SYSTEM ............................................................................ 37 FIGURE 13: TIMING OF RESTARTING S YSTEM AFTER EMERGENCY SHUTDOWN .............. 37 FIGURE 14: RTC SUPPLY FROM NON-CHARGEABLE BATTERY ............................................... 40 FIGURE 15: RTC SUPPLY FROM RECHARGEABLE BATTERY .................................................... 40 FIGURE 16: RTC SUPPLY FROM CAPACITOR ................................................................................ 40 FIGURE 17: SEIKO XH414H-IV01E CHARGE CHARACTER ISTICS ............................................. 41 FIGURE 18: REFERENCE DESIGN FOR FULL-FUNCTION UART ................................................ 44 FIGURE 19: REFERENCE DESIGN FOR UART PORT ..................................................................... 44 FIGURE 20: REFERENCE DESIGN FOR UART PORT WITH HARDWARE FLOW CONTROL... 45 FIGURE 21: REFERENCE DESIGN FOR FIRMWARE UPGRADE .................................................. 45 FIGURE 22: REFERENCE DESIGN FOR DEBUG PORT .................................................................. 46 FIGURE 23: REFERENCE DESIGN FOR AUXILIARY UART PORT ............................................... 47 FIGURE 24: LEVEL MATCH DESIGN FOR 3.3V SYSTEM.............................................................. 47 FIGURE 25: LEVEL MATCH DESIGN FOR 5V SYSTEM................................................................. 48 FIGURE 26: LEVEL MATCH DESIGN FOR RS-232 .......................................................................... 49 FIGURE 27: REFERENCE DESIGN FOR AIN1&AIN2...................................................................... 52 FIGURE 28: REFERENCE DESIGN FOR AOUT1 .............................................................................. 52 FIGURE 29: HANDSET INTERFACE DESIGN FOR AOUT2 ........................................................... 53 FIGURE 30: SPEAKER INTERFACE DESIGN WITH AN AMPLIF IER F OR AOUT2 ..................... 53 FIGURE 31: EARPHONE INTERFACE DESIGN ............................................................................... 54 FIGURE 32: LOUD SPEAKER INTERFACE DESIGN ....................................................................... 54 FIGURE 33: REFERENCE CIRCUIT OF THE 8 PINS SIM CARD .................................................... 56 FIGURE 34: REFERENCE CIRCUIT OF THE 6 PINS SIM CARD .................................................... 57 FIGURE 35: AMPHENOL C707 10M006 512 2 SIM CARD HOLDER .............................................. 58 FIGURE 36: MOLEX 91228 S IM CARD HOLDER ............................................................................ 59 FIGURE 37: REFERENCE CIRCUIT OF SD CARD ........................................................................... 60 FIGURE 38: LONG SYNCHRONIZATION & SIGN EXTENSION DIAGRAM ............................... 63 FIGURE 39: LONG SYNCHRONIZATION & ZERO PADDING DIAGRAM ................................... 63 FIGURE 40: SHORT SYNCHRONIZATION & SIGN EXTENSION DIAGRAM .............................. 63 FIGURE 41: SHORT SYNCHRONIZATION & ZERO PADDING DIAGRAM ................................. 64 Quecctel Confidential
M50Hardware Design M50_HD_V2.0 - 7 - FIGURE 42: REFERENCE DESIGN FOR PCM .................................................................................. 64 FIGURE 43: RI BEHAVIOR OF VOICE CALLING AS A RECEIVER .............................................. 67 FIGURE 44: RI BEHAVIOR OF DATA CALLING AS A RECEIVER ................................................ 67 FIGURE 45: RI BEHAVIOR AS A CALLER ........................................................................................ 67 FIGURE 46: RI BEHAVIOR OF URC OR SMS RECEIVED .............................................................. 68 FIGURE 47: REFERENCE DESIGN FOR NETLIGHT ....................................................................... 69 FIGURE 48: REFERENCE DESIGN FOR STATUS ............................................................................ 70 FIGURE 49: REFERENCE DESIGN FOR RF ...................................................................................... 71 FIGURE 50: RF SOLDERING SAMP LE.............................................................................................. 73 FIGURE 51: M50 TOP AND SIDE DIMENSIONS .............................................................................. 79 FIGURE 52: M50 BOTTOM DIMENSIONS ........................................................................................ 80 FIGURE 53: RECOMMENDED FOOTPRINT WITHOUT BOTTOM CENTRE PADS .................... 81 FIGURE 55: TOP VIEW OF THE MODULE ....................................................................................... 82 FIGURE 56: BOTTOM VIEW OF THE MODULE .............................................................................. 83 FIGURE 57: PASTE APPLICATION .................................................................................................... 85 FIGURE 58: RAMP-SOAK-SPIKE REFLOW PROFILE .................................................................... 86 FIGURE 59: MODULE TRAY .............................................................................................................. 86 FIGURE 60: RADIO BLOCK STRUCTURE OF CS-1, CS-2 AND CS-3 ........................................... 87 FIGURE 61: RADIO BLOCK STRUCTURE OF CS-4 ........................................................................ 87 Quecctel Confidential
M50Hardware Design M50_HD_V2.0 - 8 - 0. Revision history Revision Date Author Description of change 1.0 2011-12-20 Ray XU Initial 1.1 2012-02-03 Ray XU 1. Updated PCM interface 2. Updated SD interface 3. Updated charging interface 4. Updated timing of turning on the module 1.2 2012-07-20 Baly BAO 1. Deleted the USB interface 2. Deleted the camera interface 1.3 2012-10-22 Mountain ZHOU 1. Updated functional diagram 2. Updated reference design circuit 3. Updated audio characteristics 4. Updated VRTC DC characteristics 5. Updated SLEEP current consumption 6. Updated internet service protocols 7. Updated SIM pins’ name 8. Modified PCM function 9. Deleted FAX function 2.0 2012-06-16 Ray XU 1. Update the module size 2. Update the pin layout Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 9 - 1. Introduction This document defines the M50 module and describes the hardware interface of M50 which are connected with the customer application and the air interface. This document can help customers quickly understand module interface specifications, electrical and mechanical details. Associated with application notes and user guide, customers can use M50module to design and set up mobile applications e a sil y. 1.1. Related documents Table 1: Related documents SN Document name Remark [1] M50_ AT C AT commands set [2] ITU-T Draft new recommendation V.25ter Serial asynchronous automatic dialing and control [3] GSM 07.07 Digital cellular telecommunications (Phase 2+); AT command set for GSM Mobile Equipment (ME) [4] GSM 07.10 Support GSM 07.10 multiplexing protocol [5] GSM 07.05 Digital cellular telecommunications (Phase 2+); Use of Data Terminal Equipment – Data Circuit terminating Equipment (DTE – DCE) interface for Short Message Service (SMS) and Cell Broadcast Service (CBS) [6] GSM 11.14 Digital cellular telecommunications (Phase 2+); Specification of the SIM Application Toolkit for the Subscriber Identity module – Mobile Equipment (SIM – ME) interface [7] GSM 11.11 Digital cellular telecommunications (Phase 2+); Specification of the Subscriber Identity module – Mobile Equipment (SIM – ME) interface [8] GSM 03.38 Digital cellular telecommunications (Phase 2+); Alphabets and language-specific information [9] GSM 11.10 Digital cellular telecommunications (Phase 2); Mobile Station (MS) conformance specification; Part 1: Conformance specification [10] GSM_UART_AN UART port application note [11] GSM_FW_Upgrade_AN01 GSM Firmware upgrade application note [12] M10_EVB_UGD M10 EVB user guide Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 10 - 1.2. Terms and abbreviations Table 2: Terms and abbreviations Abbreviation Description ADC Analog-to-Digital Converter AMR Adaptive Multi-Rate ARP Antenna Reference Point ASIC Application Specific Integrated Circuit BER Bit Error Rate BOM Bill Of Material BTS Base Transceiver Station CHAP Challenge Handshake Authentication Protocol CS Coding Scheme CSD Circuit Switched Data CTS Clear To Send DAC Digital-to-Analog Converter DRX Discontinuous Reception DSP Digital Signal Processor DCE Data Communications Equipment (typically module) DTE Data Terminal Equipment (typically computer, external controller) DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate EGSM Enhanced GSM EMC Electromagnetic Compatibility ESD Electrostatic Discharge ETS European Telecommunication Standard FCC Federal Communications Commission (U.S.) FDMA Frequency Division Multiple Access FR Full Rate GMSK Gaussian Minimum Shift Keying GPRS General Packet Radio Service GSM Global System for Mobile Communications HR Half Rate I/O Input/Output IC Integrated Circuit IMEI International Mobile Equipment Identity Imax Maximum Load Current Inorm Normal Current kbps Kilo Bits Per Second LED Light Emitting Diode Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 11 - Li-Ion Lithium-Ion MO Mobile Originated MS Mobile Station (GSM engine) MT Mobile Terminated PAP Password Authentication Protocol PBCCH Packet Switched Broadcast Control Channel PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol RF Radio Frequency RMS Root Mean Square (value) RTC Real Time Clock RX Receive Direction SIM Subscriber Identification Module SMS Short Message Service TDMA Time Division Multiple Access TE Terminal Equipment TX Transmitting Direction UART Universal Asynchronous Receiver & Transmitter URC Unsolicited Result Code USSD Unstructured Supplementary Service Data VSWR Voltage Standing Wave Ratio Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value Phonebook abbreviations LD SIM Last Dialing phonebook (list of numbers most recently dialed) MC Mobile Equipment list of unanswered MT Calls (missed calls) ON SIM (or ME) Own Numbers (MSISDNs) list RC Mobile Equipment list of Received Calls SM SIM phonebook Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 12 - 1.3. Safety cautions The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating M50module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product. If not so, Quectel does not take on any liability for customer failure to comply with these precautions. When in a hospital or other health care facility, observe the restrictions about the use of mobile. Switch the cellular terminal or mobile off. Medical equipment may be sensitive to not operate normally for RF energy interference. Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it switched off. The operation of wireless appliances in an aircraft is forbidden to prevent interference with communication systems. Forget to think much of these instructions may lead to the flight safety or offend against local legal action, or both. Do not operate the cellular terminal or mobile in the presence of flammable gas or fume. Switch off the cellular terminal when you are near petrol station, fuel depot, chemical plant or where blasting operations are in progress. Operation of any electrical equipment in potentially explosive atmosphere can constitute a safety hazard. Your cellular terminal or mobile receives and transmits radio frequency energy while switched on. RF interference can occur if it is used close to TV set, radio, computer or other electric equipment. Road safety comes first! Do not use a hand-held cellular terminal or mobile while driving a vehicle, unless it is securely mounted in a holder for hands-free operation. Before making a call with a hand-held terminal or mobile, park the vehicle. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 13 - According to the R&TTE Directive 1999/95/CE, all wireless equipment and telecommunications terminals sold in EU must meet all the stipulated health, safety RF, EMC requirements that provide for CE mark. Quectel Module M50 is fully in accordance with all the directives of EU. 1.4. Directives and standards The M50 module is designed to comply with the FCC statements. FCC ID: XMR201211M50. The Host system using M50, should have label indicated contains FCC ID: XMR201211M50. 1.4.1. FCC Statement 1. This device complies with Part 15 of the FCC rules. Operation is subject to the following conditions: a) This device may not cause harmful interference. b) This device must accept any interference received, including interference that may cause undesired operation. 2. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. 1.4.2. FCC Radiation exposure statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with minimum distance 20cm between the radiator and your body as well as kept minimum 20cm from radio antenna depending on the Mobile status of this module usage. GSM cellular terminals or mobiles operate over radio frequency signal and cellular network and cannot be guaranteed to connect in all conditions, for example no mobile fee or an invalid SIM card. While you are in this condition and need emergent help, Please Remember using emergency call. In order to make or receive call, the cellular terminal or mobile must be switched on and in a service area with adequate cellular signal strength. Some networks do not allow for emergency call if certain network services or phone features are in use (e.g. lock functions, fixed dialing etc.). You may have to deactivate those features before you can make an emergency call. Also, some networks require that a valid SIM card be properly inserted in cellular terminal or mobile. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 14 - The manual of the host system, which uses M50, must include RF exposure warning statement to advice user should keep minimum 20cm from the radio antenna of M50 module depending on the Mobile status. The following list of antenna is indicating the maximum permissible antenna gain. Type Maximum Gain (850Hz/900Hz) Maximum Gain (1800Hz/1900Hz) Impedance External Antenna Monopole 0.5dBi 2dBi 50Ω Vehicular antenna 0.5dBi 2dBi 50Ω Internal Antenna Monopole 0.5dBi 2dBi 50Ω PIFA 0.5dBi 2dBi 50Ω FPC 0.5dBi 2dBi 50Ω PCB 0.5dBi 2dBi 50Ω This radio module must not be installed to co-locate and operate simultaneously with other radios in host system; additional testing and equipment authorization may be required to operating simultaneously with other radios. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 15 - 2. Product concept M50 is a Quad-band GSM/GPRS engine that works at frequencies of GSM850MHz, GSM900MHz, DCS1800MHz and PCS1900MHz. The M50 features GPRS multi-slot class 12 and supports the GPRS coding schemes CS-1, CS-2, CS-3 and CS-4. For more details about GPRS multi-slot classes and coding schemes, please refer to the Appendix A and Appendix B. With a tiny profile of 24.5mm×25.3mm ×2.6mm, the module can meet almost all the requirements for M2M applications, including Vehicles and Personal Tracking, Security System, Wireless POS, Industrial PDA, Smart Metering, and Remote Maintenance & Control etc. M50 is an SMD type module with LCC package, which can be embedded in customer’s applications. It provides abundant hardware interfaces between the module and customer’s host board. Designed with power saving technique, the current consumption of M50 is as low as 1.3 mA in SLEEP mode when DRX is 5. M50 is integrated with Internet service protocols, such as TCP, UDP, FTP and PPP. Extended AT commands have been developed for customer to use these Internet service protocols easily. The module fully complies with the RoHS directive of the European Union. 2.1. Key features Table 3: Module key features Feature Description Power supply Single supply voltage 3.3V~ 4.6V Typical supply voltage 4.0V Power saving Typical power consumption in SLEEP mode: 1.3 mA@ DRX=5 1.2 mA@ DRX=9 Frequency bands  Quad-band: GSM850, GSM900, DCS1800, PCS1900.  The module can search these frequency bands automatically  The frequency bands can be set by AT command.  Compliant with GSM Phase 2/2+ GSM class Small MS Transmitting power  Class 4 (2W) at GSM850 and GSM900  Class 1 (1W) at DCS1800 and PCS1900 GPRS connectivity  GPRS multi-slot class 12 (default)  GPRS multi-slot class 1~12 (configurable)  GPRS mobile station class B Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 16 - Temperature range  Normal operation: -35°C ~ +80°C  Restricted operation: -40°C ~ -35°C and +80°C ~ +85°C 1)  Storage temperature: -45°C ~ +90°C DATA GPRS: CSD:  GPRS data downlink transfer: max. 85.6 kbps  GPRS data uplink transfer: max. 85.6 kbps  Coding scheme: CS-1, CS-2, CS-3 and CS-4  Support the protocols PAP (Password Authentication Protocol) usually used for PPP connections  Internet service protocols TCP/UDP/FTP/PPP/HTTP/NTP/PING  Support Packet Broadcast Control Channel (PBCCH)  CSD transmission rates: 2.4, 4.8, 9.6, 14.4 kbps non-transparent  Support Unstructured Supplementary Service Data (USSD) SMS  Text and PDU mode  SMS storage: SIM card SIM interface Support SIM card: 1.8V, 3V Audio features Speech codec modes:  Half Rate (ETS 06.20)  Full Rate (ETS 06.10)  Enhanced Full Rate (ETS 06.50 / 06.60 / 06.80)  Adaptive Multi-Rate (AMR)  Echo Suppression  Echo Cancellation  Noise Reduction  Embedded one amplifier of class AB with maximum driving power up to 800mW UART interfaces UART Port:  Seven lines on UART port interface  Used for AT command, GPRS data and CSD data  Multiplexing function  Support autobauding from 4800 bps to 115200 bps Debug Port:  Two lines on debug port interface DBG_TXD and DBG_RXD  Debug Port only used for firmware debugging Auxiliary Port:  Used for AT command Phonebook management Support phonebook types: SM, ME, ON, MC, RC, DC, LD, LA SIM Application Toolkit Support SAT class 3, GSM 11.14 Release 99 Real time clock Supported Physical characteristics Size: 24.5 (±0.15) × 25.3 (±0.15) × 2.6 (±0.2) mm Weight: 3.3g Firmware upgrade Firmware upgrade via UART Port Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 17 - Antenna interface Connected to antenna pad with 50 Ohm impedance control 1）When the module works in this temperature range, the deviations from the GSM specification may occur. For example, the frequency error or the phase error will be increased. Table 4: Coding schemes and maximum net data rates over air interface Coding scheme 1 Timeslot 2 Timeslot 4 Timeslot CS-1 9.05kbps 18.1kbps 36.2kbps CS-2 13.4kbps 26.8kbps 53.6kbps CS-3 15.6kbps 31.2kbps 62.4kbps CS-4 21.4kbps 42.8kbps 85.6kbps 2.2. Functional diagram The following figure shows a block diagram of the M50 module and illustrates the major functional parts:  Power management  Baseband  Serial Flash  The radio frequency part  The peripheral interface —Charge interface —PCM interface —SD interface —SIM interface —Audio interface —Serial interface —Power supply —RF interface —ADC —Turn on/off interface (PWRKEY & EMERG_OFF) Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 18 - BB&RFRF PAMSAW FilterSerial Flash32KHz26MHzRF TransceiverAudioRTCGPIOSerial Interface Memory InterfacePCMInterfaceSIM InterfaceSD InterfaceADCRF_ANTVBATPWRKEYEMERG_OFFVRTCADCSTATUS&NETLIGHTUARTSIM Interface AudioSD InterfacePCM IntefaceResetESDPMUCharge Interface Charge Figure 1: Module functional diagram 2.3. Evaluation board In order to help customer to develop applications with M50 , Quectel supplies an evaluation board (EVB), RS-232 to USB cable, power adapter, earphone, antenna and other peripherals to control or test the module. For details, please refer to the document [12]. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 19 - 3. Application interface The module is equipped with 83-pin SMT pads and it adopts LCC package. Detailed descriptions on Sub-interfaces included in these pads are given in the following chapters:  Power supply  Power on/down  Charge interface  RTC  Serial interfaces  Audio interfaces  SIM interface  SD interface  PCM interface  ADC Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 20 - 3.1. Pin of module 3.1.1. Pin assignment 1234567891011121314151617181920 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 3738394041424344454647484950515253545556575859606162636465666768697071727374Top view757677787980818283SIM_PRESENCERESERVEDVRTCVDD_EXTGNDGNDRF_ANTGNDGNDGNDVBATVBATVBATVBATRESERVEDRESERVEDRESERVEDRESERVEDADC1ADC0RESERVEDNETLIGHTSPK2PAGNDMIC2PMIC2NMIC1PMIC1NSPK1NSPK1PLOUDSPKNLOUDSPKPSTATUSPWRKEYEMERG_OFFPCM_INPCM_CLK RESERVEDRESERVEDTXD_AUXRXD_AUXDBG_TXDDBG_RXDRESERVEDDCDRIDTRCTSRTSRXDTXDSIM1_GNDSIM1_RSTSIM1_CLKSIM1_DATASIM1_VDDVBAT GND PCMRF UARTPower SIM Reserved AudioADCOtherSDPCM_OUTPCM_SYNCRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDRESERVEDSD_CMDSD_CLKSD_DATA0GNDRESERVEDRESERVEDRESERVEDRESERVEDGNDGNDGNDGND Figure 2: Pin assignment Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 21 - Table 5: M50 pin assignment 管脚号 管脚名 输入/输出 管脚号 管脚名 输入/输出 1 ADC1 I 2 ADC0 I 3 RESERVED 4 NETLIGHT O 5 SPK2P O 6 AGND 7 MIC2P I 8 MIC2N I 9 MIC1P I 10 MIC1N I 11 SPK1N O 12 SPK1P O 13 LOUDSPKN O 14 LOUDSPKP O 15 S TAT U S O 16 PWRKEY I 17 EMERG_OFF I 18 PCM_IN I 19 PCM_CLK O 20 PCM_OUT O 21 PCM_SYNC O 22 RESERVED 23 RESERVED 24 RESERVED 25 RESERVED 26 RESERVED 27 RESERVED 28 RESERVED 29 RESERVED 30 RESERVED 31 RESERVED 32 RESERVED 33 RESERVED 34 SD_CMD O 35 SD_CLK O 36 SD_DATA0 I/O 37 GND 38 RESERVED 39 RESERVED 40 TXD_AUX O 41 RXD_AUX I 42 DBG_TXD O 43 DBG_RXD I 44 RESERVED 45 DCD O 46 RI O 47 DTR I 48 CTS O 49 RTS I 50 RXD I 51 TXD O 52 SIM_GND 53 SIM_RST O 54 SIM_CLK O 55 S I M _ D ATA I/O 56 SIM_VDD O 57 SIM_PRESENCE I 58 RESERVED 59 VRTC I/O 60 VDD_EXT O 61 GND 62 GND 63 RF_ANT I/O 64 GND 65 GND 66 GND 67 V B AT I 68 V B AT I 69 V B AT I 70 V B AT I 71 RESERVED 72 RESERVED Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 22 - 73 RESERVED 74 RESERVED 75 RESERVED 76 RESERVED 77 RESERVED 78 RESERVED 79 GND 80 GND 81 GND 82 GND 83 GND Note: Keep all reserved pins open. 3.1.2. Pin description Table 6: Pin description Power supply PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT V B AT 67, 68, 69，70 I Main power supply of module: VBAT=3.3V~4.6V Vmax= 4.6V Vmin=3.3V Vnorm=4.0V Make sure that supply sufficient current in a transmitting burst which typically rises to 1.6A. VRTC 59 I/O Power supply for RTC when V B AT is not supplied for the system. Charging for backup battery or golden capacitor when the VBAT is supplied. VImax=3.3V VImin=1.5V VInorm=2.8V VOmax=2.85V VOmin=2.6V VOnorm=2.8V Iout(max)= 1mA Iin=2.6~5 uA If unused, keep this pin open. VDD_EXT 60 O Supply 2.8V voltage for external circuit. Vmax=2.9V Vmin=2.7V Vnorm=2.8V Imax=20mA 1. If unused, keep this pin open. 2. Recommended to add a 2.2~4.7uF bypass capacitor when supplying power for external circuit. GND 37, 61, Ground Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 23 - 62, 64, 65, 66, Turn on/off PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT PWRKEY 15 I Turn on/off control. PWRKEY should be pulled down for a moment to turn on or off the system. VILmax= 0.1×V B AT VIHmin= 0.6×V B AT V I m a x = V B AT Pulled up to VBAT internally. Emergency shutdown PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT EMERG_OFF 17 I Emergency off. Pulled down for at least 20ms, which will turn off the module in case of emergency. Use it only when normal shutdown through PWRKEY or AT command cannot perform well. VILmax=0.4V VIHmin=2.2V Vopenmax=2.8V Open drain/collector driver required in cellular device application. If unused, keep this pin open. Module indicator PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT S TAT U S 16 O Indicate module operating status. High level indicates module is power-on and low level indicates power-down. VOHmin= 0.85×VDD_EXT VOLmax= 0.15×VDD_EXT If unused, keep this pin open. Audio interface PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT MIC1P MIC1N 9, 10 I Channel one for positive and negative voice-band input If unused, keep these pins open. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 24 - MIC2P MIC2N 7, 8 I Channel two for positive and negative voice-band input SPK1P SPK1N 12, 11 O Channel one for positive and negative voice-band output 1. If unused, keep these pins open. 2. Support both voice and ringtone output. SPK2P 5 O Channel two for voice-band output AGND 6 Analog ground. Constitute a pseudo differential channel with SPK2P. LOUDSPKN LOUDSPKP 13, 14 O Channel three of positive and negative voice-band output 1. If unused, keep these pins open. 2. Embedded amplifier of class AB internally. 3. Support both voice and ringtone output. Net status indicator PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT NETLIGHT 4 O Network status indication VOHmin= 0.85×VDD_EXT VOLmax= 0.15×VDD_EXT If unused, keep this pin open. UART Port PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT DTR 47 I Data terminal ready VILmin=0V VILmax= 0.25×VDD_EXT VIHmin= 0.75×VDD_EXT VIHmax= VDD_EXT+0.3 VOHmin= 0.85×VDD_EXT VOLmax= If only use TXD, RXD and GND to communicate, recommend pulling down RTS and keeping other pins open. RXD 50 I Receive data TXD 49 O Transmit data RTS 51 I Request to send CTS 48 O Clear to send RI 46 O Ring indicator DCD 45 O Data carrier detection Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 25 - 0.15×VDD_EXT Debug Port PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT DBG_TXD 42 O UART interface for debugging only. VILmin=0V VILmax= 0.25×VDD_EXT VIHmin= 0.75×VDD_EXT VIHmax= VDD_EXT+0.3 VOHmin= 0.85×VDD_EXT VOLmax= 0.15×VDD_EXT If unused, keep these pins open. DBG_RXD 43 I Auxiliary UART Port PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT TXD_AUX 40 O Transmit data VILmin=0V VILmax= 0.25×VDD_EXT VIHmin= 0.75×VDD_EXT VIHmax= VDD_EXT+0.3 VOHmin= 0.85×VDD_EXT VOLmax= 0.15×VDD_EXT If unused, keep these pins open. RXD_AUX 41 I Receive data SIM interface PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT SIM_VDD 56 O Power supply for SIM card The voltage can be selected by firmware automatically. Either 1.8V or 3V. All signals of SIM interface should be protected against ESD with a TVS diode array. Maximum cable length is 200mm from the module pad to SIM card S I M _ D ATA 54 I/O SIM data 3V： VOLmax=0.4 VOHmin= SIM_VDD-0.4 1.8V: VOLmax= Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 26 - 0.15×SIM_VDD VOHmin= SIM_VDD-0.4 holder. SIM_CLK 55 O SIM clock 3V： VOLmax=0.4 VOHmin= 0.9×SIM_VDD 1.8V: VOLmax= 0.12×SIM_VDD VOHmin= 0.9×SIM_VDD SIM_RST 53 O SIM reset 3V： VOLmax=0.36 VOHmin= 0.9×SIM_VDD 1.8V: VOLmax= 0.2×SIM_VDD VOHmin= 0.9×SIM_VDD SIM_GND 52 SIM ground SIM_PRESENCE 57 I SIM card detection VILmin=0V VILmax= 0.25×VDD_EXT VIHmin= 0.75×VDD_EXT VIHmax= VDD_EXT+0.3 If unused, keep this pin open. ADC PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT ADC0 2 I General purpose analog to digital converter. Voltage range: 0V to 2.8V Please give priority to the use of ADC0. If unused, keep these pins open. ADC1 1 I General purpose analog to digital converter. Voltage range: 0V to 2.8V PCM PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT PCM_CLK 19 O PCM clock VILmin=0V VILmax= PCM_IN 18 I PCM data input Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 27 - PCM_OUT 20 O PCM data output 0.25×VDD_EXT VIHmin= 0.75×VDD_EXT VIHmax= VDD_EXT+0.3 VOHmin= 0.85×VDD_EXT VOLmax= 0.15×VDD_EXT PCM_SYNC 21 O PCM frame synchronization SD card PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT SD_CMD 34 O SD command VILmin=0V VILmax= 0.25×VDD_EXT VIHmin= 0.75×VDD_EXT VIHmax= VDD_EXT+0.3 VOHmin= 0.85×VDD_EXT VOLmax= 0.15×VDD_EXT SD_CLK 35 O SD clock SD_DATA0 36 I/O SD data RF interface PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT RF_ANT 63 I/O RF antenna pad Impedance of 50Ω Other interface PIN NAME PIN NO. I/O DESCRIPTION DC CHARACTERISTICS COMMENT DOWNLOAD 3 I VILmin=0V VILmax= 0.25×VDD_EXT VIHmin= 0.75×VDD_EXT VIHmax= VDD_EXT+0.3 Keep this pin open. RESERVED 22~ 33， 38~ 39, 44, 58, Keep these pins open. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 28 - 71~ 75 Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 29 - 3.2. Operating modes The table below briefly summarizes the various operating modes in the following chapters. Table 7: Overview of operating modes Mode Function Normal operation GSM/GPRS SLEEP The module will automatically go into SLEEP mode if DTR is set to high level and there is no interrupt (such as GPIO interrupt or data on UART port). In this case, the current consumption of module will reduce to the minimal level. During SLEEP mode, the module can still receive paging message and SMS from the system normally. GSM IDLE Firmware is active. The module has registered to the GSM network, and the module is ready to send and receive GSM data. GSM TALK GSM connection is ongoing. In this mode, the power consumption is decided by the configuration of Power Control Level (PCL), dynamic DTX control and the working RF band. GPRS IDLE The module is not registered to GPRS network. The module is not reachable through GPRS channel. GPRS STANDBY The module is registered to GPRS network, but no GPRS PDP context is active. The SGSN knows the Routing Area where the module is located at. GPRS READY The PDP context is active, but no data transfer is ongoing. The module is ready to receive or send GPRS data. The SGSN knows the cell where the module is located at. GPRS DATA There is GPRS data in transfer. In this mode, power consumption is decided by the PCL, working RF band and GPRS multi-slot configuration. Power down Normal shutdown by sending the “AT+QPOWD=1” command, using the PWRKEY or the EMERG_OFF1) pin. The power management ASIC disconnects the power supply from the base band part of the module, and only the power supply for the RTC is remained. Software is not active. The UART interfaces are not accessible. Operating voltage (connected to VBAT) remains applied. Minimum functionality mode (without removing power supply) “AT+CFUN” command can set the module to a minimum functionality mode without removing the power supply. In this case, the RF part of the module will not work or the SIM card will not be accessible, or both RF part and SIM card will be disabled, but the UART port is still accessible. The power consumption in this case is very low. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 30 - 1) Use the EMERG_OFF pin only while failing to turn off the module by the command “AT+QPOWD=1” and the PWRKEY pin. Please refer to the Section 3.4.2.4. 3.3. Power supply 3.3.1. Power features of module The power supply is one of the key issues in the designing GSM terminals. Due to the 577us radio burst emission in GSM every 4.615ms, power supply must be able to deliver high current peaks in a burst period. During these peaks, drops on the supply voltage must not exceed minimum working voltage of module. For the M50 module, the max current consumption could reach to 1.6A during a transmit burst. It will cause a large voltage drops on the VBAT. In order to ensure stable operation of the module, it is recommended that the max voltage drop during the transmit burst does not exceed 400mV. Vdrop4.615ms577usIVBATVBATBurst:1.6A Figure 3: Voltage ripple during transmitting 3.3.2. Decrease supply voltage drop The power supply rang of the module is 3.3V to 4.6V. Make sure that the input voltage will never drop below 3.3V even in a transmitting burst. If the power voltage drops below 3.3V, the module could turn off automatically. For better power performance, it is recommended to place a 100uF tantalum capacitor with low ESR (ESR=0.7Ω) and ceramic capacitor 100nF, 33pF and 10pF near the VBAT pin. The reference circuit is illustrated in Figure 4. The V B AT r o u t e should be wide enough to ensure that there is not too much voltage drop occurring during transmit burst. The width of trace should be no less than 2mm and the principle of the VBAT route is the longer route, the wider trace. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 31 - VBATC2C1+C3 C4GND100uF 100nF 10pF060333pF0603 Figure 4: Reference circuit for the VBAT input 3.3.3. Reference design for power supply The power design for the module is very important, since the performance of power supply for the module largely depends on the power source. The power supply is capable of providing the sufficient current up to 2A at least. If the voltage drop between the input and output is not too high, it is suggested to use a LDO as module’s power supply. If there is a big voltage difference between the input source and the desired output (VBAT), a switcher power converter is prefer to use as a power supply. Figure 5 shows a reference design for +5V input power source. The designed output for the power supply is 4.16V and the maximum load current is 3A. In addition, in order to get a stable output voltage, a zener diode is placed close to the pins of VBAT. As to the zener diode, it is suggested to use a zener diode which reverse zener voltage is 5.1V and dissipation power is more than 1 Watt. DC_INC1 C2MIC29302 U1IN OUTENGNDADJ2 4135VBAT100nFC3470uFC4100nFR1D1120K51KR2470uF Figure 5: Reference circuit for power supply Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 32 - 3.3.4. Monitor power supply To monitor the supply voltage, customer can use the “AT+CBC” command which includes three parameters: charging status, remaining battery capacity and voltage value (in mV). It returns the 0~100 percent of battery capacity and actual value measured between VBAT and GND. The voltage is automatically measured in period of 5s. The displayed voltage (in mV) is averaged over the last measuring period before the “AT+CBC” command is executed. For details, please refer to the document [1]. 3.4. Power on and down scenarios 3.4.1. Power on Customer’s application can turn on the module by driving the pin PWRKEY to a low level voltage, and after STATUS pin outputs a high level, PWRKEY pin can be released. Customer may monitor the level of the STATUS pin to judge whether the module is power-on or not. An open collector driver circuit is suggested to control the PWRKEY. A simple reference circuit is illustrated as below. Turn on pulsePWRKEY4.7K47K Figure 6: Turn on the module using driving circuit Note: The module is set to autobauding mode (AT+IPR=0) in default configuration. In the autobauding mode, the URC “RDY” after powering on is not sent to host controller. When the module receives AT command, it will be powered on after a delay of 2 or 3 seconds. Host controller should firstly send an “AT” or “at” string in order that the module can detect baud rate of host controller, and it should send the second or the third “ AT” or “at” string until receiving “OK” string from the module. Then an “AT+IPR=x;&W” should be sent to set a fixed baud rate for the module and save the configuration to flash memory of the module. After these configurations, the URC “RDY” would be received from the UART Port of the module every time when the module is powered on. Refer to the section “AT+IPR” in document [1]. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 33 - The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate from finger. A reference circuit is shown in the following figure. S1PWRKEYTVS1Close to S1 Figure 7: Turn on the module using keystroke The power-on scenarios is illustrated as the following figure. EMERG_OFF(INPUT)VDD_EXT(OUTPUT)VIL<0.1*VBATVIH > 0.6*VBATVBATPWRKEY(INPUT)54msSTATUS(OUTPUT)800ms>1sOFF BOOTINGMODULE STATUSRUNNING21 Figure 8: Timing of turning on system ① Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is recommended 30ms. ② EMERG_OFF should be floated when it is unused Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 34 - 3.4.2. Power down The following procedures can be used to turn off the module:  Normal power down procedure: Turn off module using the PWRKEY pin  Normal power down procedure: Turn off module using command “AT+QPOWD”  Over-voltage or under-voltage automatic shutdown: Take effect when over-voltage o r under-voltage is detected  Emergent power down procedure: Turn off module using the EMERG_OFF pin 3.4.2.1. Power down module using the PWRKEY pin Customer’s application can turn off the module by driving the PWRKEY to a low level voltage for a certain time. The power down scenario is illustrated in Figure 9. VBATPWRKEY(INPUT)STATUS(OUTPUT)EMERG_OFF(INPUT)Logout net about 2s to 12s0.6s<Pulldown<1s>160us Figure 9: Timing of turning off the module The power down procedure causes the module to log off from the network and allows the firmware to save important data before completely disconnecting the power supply, thus it is a safe way. Before the completion of the power down procedure, the module sends out the result code shown below: NORMAL POWER DOWN Note: This result code does not appear when autobauding is active and DTE and DCE are not correctly synchronized after start-up. The module is recommended to set a fixed baud rate. After that moment, no further AT commands can be executed. Then the module enters the power down mode, only the RTC is still active. The power down mode can also be indicated by the Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 35 - STATUS pin, which is a low level voltage in this mode. 3.4.2.2. Power down module using AT command Customer’s application can turn off the module via AT command “AT+QPOWD=1”. This command will let the module to log off from the network and allow the firmware to save important data before completely disconnecting the power supply, thus it is a safe way. Before the completion of the power down procedure the module sends out the result code shown below: NORMAL POWER DOWN After that moment, no further AT commands can be executed. And then the module enters the power down mode, only the RTC is still active. The power down mode can also be indicated by STATUS pin, which is a low level voltage in this mode. Please refer to the document [1] for details about the AT command “AT+QPOWD”. 3.4.2.3. Over-voltage or under-voltage automatic shutdown The module will constantly monitor the voltage applied on the VBAT, if the voltage is ≤ 3.5V, the following URC will be presented: UNDER_VOLTAGE WARNING If the voltage is ≥ 4.5V, the following URC will be presented: OVER_VOLTAGE WARNING The normal input voltage range is from 3.3V to 4.6V. If the voltage is > 4.6V or < 3.3V, the module would automatically shutdown itself. If the voltage is < 3.3V, the following URC will be presented: UNDER_VOLTAGE POWER DOWN If the voltage is > 4.6V, the following URC will be presented: OVER_VOLTAGE POWER DOWN Note: These result codes do not appear when autobauding is active and DTE and DCE are not Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 36 - correctly synchronized after start-up. The module is recommended to set to a fixed baud rate. After that moment, no further AT commands can be executed. The module logs off from network and enters power down mode, and only RTC is still active. The power down mode can also be indicated by the pin STATUS, which is a low level voltage in this mode. 3.4.2.4. Emergency shutdown using EMERG_OFF pin The module can be shut down by driving the pin EMERG_OFF to a low level voltage over 20ms and then releasing it. The EMERG_OFF line can be driven by an open-drain/collector driver or a button. The circuit is illustrated as the following figures. Emergency shutdown pulseEMERG_OFF4.7K47K Figure 10: Reference circuit for EMERG_OFF by using driving circuit S2EMERG_OFFTVS2Close to S2 Figure 11: Reference circuit for EMERG_OFF by using button 3.4.3. Restart Customer’s application can restart the module by driving the PWRKEY to a low level voltage for a certain time, which is similar to the way of turning on module. Before restarting the module, at Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 37 - least 500ms should be delayed after detecting the low level of STATUS. The restart timing is illustrated as the following figure. PWRKEY(INPUT)STATUS(OUTPUT)Delay >0.5sTurn off RestartPull down the PWRKEY to turn on the module Figure 12: Timing of restarting system The module can also be restarted by the PWRKEY after emergency shutdown. EMERG_OFF(INPUT)STATUS(OUTPUT)Delay >2s6usPulldown >20msPWRKEY(INPUT) Figure 13: Timing of restarting system after emergency shutdown Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 38 - 3.5. Charge interface M50 provides charging function for rechargeable Li-Ion or Lithium Polymer battery. It is introduced simply in this document. If customer wants to get more information about charging, please refer to the document [13]. Table 8: Pin definition of the charging Name Pin I/O Description. GATDRV 74 O Charge driving CHGLDO 73 I Charger power supply source CHGDET 72 I Charger detection ISENSE 71 I Current sense B AT S N S 70 I VBAT voltage sense 3.6. Power saving Upon system requirement, there are several actions to drive the module to enter low current consumption status. For example, “AT+CFUN” can be used to set module into minimum functionality mode and DTR hardware interface signal can be used to lead system to SLEEP mode. 3.6.1. Minimum functionality mode Minimum functionality mode reduces the functionality of the module to a minimum level, thus minimize the current consumption when the slow clocking mode is activated at the same time. This mode is set with the “AT+CFUN” command which provides the choice of the functionality levels <fun>=0, 1, 4.  0: minimum functionality  1: full functionality (default)  4: disable both transmitting and receiving of RF part If the module is set to minimum functionality by “AT+CFUN=0”, the RF function and SIM card function would be disabled. In this case, the UART port is still accessible, but all AT commands correlative with RF function or SIM card function will be not accessible. If the module has been set by “AT+CFUN=4”, the RF function will be disabled, the UART port is still active. In this case, all AT commands correlative with RF function will be not accessible. After the module is set by “AT+CFUN=0” or “AT+CFUN=4”, it can return to full functionality by Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 39 - “AT+CFUN=1”. For detailed information about “AT+CFUN”, please refer to the document [1]. 3.6.2. SLEEP mode The SLEEP mode is disabled in default firmware configuration. Customer’s application can enable this mode by “AT+QSCLK=1”. On the other hand, the default setting is “AT+QSCLK=0” and in this mode, the module cannot enter SLEEP mode. When “AT+QSCLK=1” is sent to the module, customer’s application can control the module to enter or exit from the SLEEP mode through pin DTR. When DTR is set to high level, and there is no on-air or hardware interrupt such as GPIO interrupt or data on UART port, the module will enter SLEEP mode automatically. In this mode, the module can still receive voice, SMS or GPRS paging from network but the UART port is not accessible. 3.6.3. Wake up module from SLEEP mode When the module is in the SLEEP mode, the following methods can wake up the module.  If the DTR Pin is set low, it would wake up the module from the SLEEP mode. The UART port will be active within 20ms after DTR is changed to low level.  Receive a voice or data call from network wakes up module.  Receive an SMS from network wakes up module. Note: DTR pin should be held at low level during communication between the module and DTE. 3.7. Summary of state transition Table 9: Summary of state transition Current mode Next mode Power down Normal mode SLEEP mode Power down Use PWRKEY Normal mode AT+QPOWD, use PWRKEY pin, or use EMERG_OFF pin Use AT command “AT+QSCLK=1” and pull DTR up SLEEP mode Use PWRKEY pin, or use EMERG_OFF pin Pull DTR down or incoming call or SMS or GPRS Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 40 - 3.8. RTC backup The RTC (Real Time Clock) can be supplied by an external capacitor or battery (rechargeable or non-chargeable) through the pin VRTC. A 1.5K resistor has been integrated in the module for current limiting. A coin-cell battery or a super-cap can be used to backup power supply for RTC. The following figures show various sample circuits for RTC backup. ModuleRTC Core1.5KVRTCNon-chargeable Backup Battery Figure 14: RTC supply from non-chargeable battery VRTCRechargeable Backup BatteryModuleRTC Core1.5K Figure 15: RTC supply from rechargeable battery VRTCLarge Capacitance CapacitorModuleRTC Core1.5K Figure 16: RTC supply from capacitor Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 41 - Coin-type rechargeable capacitor such as XH414H-IV01E from Seiko can be used. Figure 17: Seiko XH414H-IV01E Charge Characteristics 3.9. Serial interfaces The module provides three serial ports: UART Port, Debug Port and Auxiliary UART Port. The module is designed as a DCE (Data Communication Equipment), following the traditional DCE-DTE (Data Terminal Equipment) connection. Autobauding function supports baud rate from 4800bps to 115200bps. The UART Port:  TXD: Send data to RXD of DTE.  RXD: Receive data from TXD of DTE.  RTS: Request to send.  CTS: Clear to send.  DTR: DTE is ready and inform DCE (this pin can wake the module up).  RI: Ring indicator (when the call, SMS, data of the module are coming, the module will output signal to inform DTE).  DCD: Data carrier detection (the validity of this pin demonstrates the communication link is set up). Note: The module disables hardware flow control by default. When hardware flow control is required, RTS and CTS should be connected to the host. AT command “AT +IFC=2,2” is used to enable hardware flow control. AT command “AT+IFC=0,0” is used to disable the hardware flow control. For more details, please refer to the document [1]. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 42 - The Debug Port  DBG_TXD: Send data to the COM port of computer.  DBG_RXD: Receive data from the COM port of computer. The Auxiliary U ART Port  TXD_AUX: Send data to the RXD of DTE.  RXD_AUX: Receive data from the TXD of DTE. The logic levels are described in the following table. Table 10: Logic levels of the UART interfaces Parameter Min Max Unit VIL 0 0.25×VDD_EXT V VIH 0.75×VDD_EXT VDD_EXT +0.3 V VOL 0.15×VDD_EXT V VOH 0.85×VDD_EXT V Table 11: Pin definition of the UART interfaces Interface Name Pin Description Debug Port DBG_RXD 43 Receive data of the debug port DBG_TXD 42 Transmit data of the debug port UART Port RI 46 Ring indicator RTS 51 Request to send CTS 48 Clear to send RXD 50 Receive data of the UART port TXD 49 Transmit data of the UART port DTR 47 Data terminal ready DCD 45 Data carrier detection Auxiliary UART Port RXD_AUX 41 Receive data of the Auxiliary UART TXD_AUX 40 Transmit data of the Auxiliary UART 3.9.1. UART Port 3.9.1.1. The features of UART Port.  Seven lines on U A RT interface  Contain data lines TXD and RXD, hardware flow control lines RTS and CTS, other control lines DTR, DCD and RI. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 43 -  Used for AT command, GPRS data, etc. Multiplexing function is supported on the UART Port. So far only the basic mode of multiplexing is available.  Support the communication baud rates as the following: 300, 600, 1200, 2400, 4800, 9600, 14400, 19200, 28800, 38400, 57600, 115200.  The default setting is autobauding mode. Support the following baud rates for Autobauding function: 4800, 9600, 19200, 38400, 57600, 115200.  The module disables hardware flow control by default. AT command “AT+IFC=2,2” is used to enable hardware flow control. After setting a fixed baud rate or autobauding, please send “AT ” string at that rate. The UART port is ready when it responds “OK”. Autobauding allows the module to detect the baud rate by receiving the string “AT ” or “at” from the host or PC automatically, which gives module flexibility without considering which baud rate is used by the host controller. Autobauding is enabled by default. To take advantage of the autobauding mode, special attention should be paid according to the following requirements: Synchronization between DTE and DCE: When DCE (the module) powers on with the autobauding enabled, it is recommended to wait 2 to 3 seconds before sending the first AT character. After receiving the “OK” response, DTE and DCE are correctly synchronized. If the host controller needs URC in the mode of autobauding, it must be synchronized firstly. Otherwise the URC will be discarded. Restrictions on autobauding operation:  The UART port has to be operated at 8 data bits, no parity and 1 stop bit (factory setting).  The “At” and “aT” commands cannot be used.  Only the strings “AT ” or “at” can be detected (neither “At” nor “aT”).  The Unsolicited Result Codes like “RDY”, “+CFUN: 1” and “+CPIN: READY” will not be indicated when the module is turned on with autobauding enabled and not be synchronized.  Any other Unsolicited Result Codes will be sent at the previous baud rate before the module detects the new baud rate by receiving the first “AT ” or “at” string. The DTE may receive unknown characters after switching to new baud rate.  It is not recommended to switch to autobauding from a fixed baud rate.  If autobauding is active it is not recommended to switch to multiplex mode. Note: To assure reliable communication and avoid any problems caused by undetermined baud rate between DCE and DTE, it is strongly recommended to configure a fixed baud rate and save it instead of using autobauding after start-up. For more details, please refer to the Section “AT+IPR” in document [1]. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 44 - 3.9.1.2. The connection of UART The connection between module and host using UART Port is very flexible. Three connection styles are illustrated as below. Reference design for Full-Function U A RT connection is shown as below when it is applied in modulation-demodulation. TXDRXDRTSCTSDTRDCDRITXDRXDRTSCTSDTRDCDRINGModule (DCE)Serial portUART portGND GNDPC (DTE) Figure 18: Reference design for Full-Function UART Three-line connection is shown as below. TXDRXDGNDUART portRTS0RTXDRXDGNDModule (DCE) Host (DTE)Controller Figure 19: Reference design for UART Port Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 45 - UART Port with hardware flow control is shown as below. This connection will enhance the reliability of the mass data communication. RTSCTSRTSCTSGNDRXDTXD TXDRXDGNDModule (DCE) Host (DTE) Controller Figure 20: Reference design for UART Port with hardware flow control 3.9.1.3. Firmware upgrade The TXD, RXD can be used to upgrade firmware. The PWRKEY pin must be pulled down before the firmware upgrade. Please refer to the following figure for Firmware upgrade. IO Connector TXDRXDGNDPWRKEY Module (DCE) UART portTXDRXDGNDPWRKEY Figure 21: Reference design for Firmware upgrade Note: The firmware of module might need to be upgraded due to certain reasons, it is recommended to reserve these pins in the host board for firmware upgrade. For detailed design, please refer to the document [11]. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 46 - 3.9.2. Debug Port Debug Port  Two lines: DBG_TXD and DBG_RXD  It outputs log information automatically.  Debug Port is only used for firmware debugging and its baud rate must be configured as 460800bps. ComputerTXDRXDGND Module (DCE) Debug portDBG_TXDDBG_RXD GND Figure 22: Reference design for Debug Port 3.9.3. Auxiliary UART Port Auxiliary UART Port  Two data lines: TXD_AUX and RXD_AUX  Auxiliary UART port is used for AT command only and does not support GPRS data, CSD FAX, Multiplexing function etc.  Auxiliary U ART port supports the communication baud rates as the following: 4800, 9600, 14400, 19200, 28800, 38400, 57600, 115200.  The default baud rate setting is 115200bps, and does not support autobauding. The baud rate can be modified by AT+QSEDCB command. For more details, please refer to the document [1]. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 47 - Module (DCE) Host (DTE) ControllerTXDRXDGNDTXD_AUXRXD_AUXGND Figure 23: Reference design for Auxiliary UART port 3.9.4. UART application The reference design of 3.3V level match is shown as below. If the host is a 3V system, please change the 5.6K resistor to 15K. MCU/ARM/TXD/RXD1KTXDRXDRTSCTSDTRRI/RTS/CTSGPIOEINTGPIO DCDModule1K1KVoltage level:3.3V5.6K5.6K5.6K1K1K1K1KGND GND Figure 24: Level match design for 3.3V system Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 48 - The reference design for 5V level match is shown as below. The connection of dotted line can be referred to the connection of solid line. Please pay attention to the direction of signal. Input dotted line of module should be referred to input solid line of the module. Output dotted line of module should be referred to output solid line of the module. As to the circuit below, VDD_EXT supplies power for the I/O of module, while VCC_MCU supplies power for the I/O of the MCU/ARM. MCU/ARM/TXD/RXDVDD_EXT4.7KVCC_MCU4.7K5.6K4.7KVDD_EXTTXDRXDRTSCTSDTRRI/RTS/CTSGNDGPIO DCDModuleGPIOEINTVCC_MCUVoltage level: 5V4.7KGND Figure 25: Level match design for 5V system Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 49 - The following circuit shows a reference design for the communication between module and PC. Since the electrical level of module is 2.8V, so a RS-232 level shifter must be used. 98765432115148911125761042622713182021161719222324312528GNDSP32383VGNDGNDT5OUT/ SHUTDOWNV+GNDV-VCCT4OUTT2OUTT3OUTT1OUTR3I NR2I NR1I N/ STATUS3V ONLINER1OUTR2OUTR3OUT/ R1OUTGND T5INT4I NT3I NT2I NT1I NC2+C2-C1-C1+MODULERXDDTRRTSRICTSTXDDCDTo PC serial port Figure 26: Level match design for RS-232 Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 50 - 3.10. Audio interfaces The module provides two analogy input channels and three analogy output channels. Table 12: Pin definition of Audio interfaces AIN1 and AIN2 can be used for input of microphone and line. An electret microphone is usually used. AIN1 and AIN2 are both differential input channels. AOUT1 is used for output of the receiver. This channel is typically used for a receiver built into a handset. AOUT1 channel is a differential channel. AOUT2 is typically used with earphone. It is a single-ended and mono channel. SPK2P and AGND can establish a pseudo differential mode. AOUT3 is used for loud speaker output as it embedded an amplifier of class AB whose maximum drive power is 800mW. All of these three audio channels support voice and ringtone output, and so on, and can be swapped by “AT+QAUDCH” command. For more details, please refer to the document [1]. Use AT command “AT+QAUDCH” to select audio channel:  0--AIN1/AOUT1, the default value is 0.  1--AIN2/AOUT2  2--AIN2/AOUT3 For each channel, customer can use AT+QMIC to adjust the input gain level of microphone. Customer can also use “AT+CLVL” to adjust the output gain level of receiver and speaker. “AT+QSIDET” is used to set the side-tone gain level. For more details, please refer to the document [1]. Interface Name Pin Description AIN1/AOUT1 MIC1P 9 Channel one for Microphone positive input MIC1N 10 Channel one for Microphone negative input SPK1P 12 Channel one for Audio positive output SPK1N 11 Channel one for Audio negative output AIN2/AOUT2 MIC2P 7 Channel two for Microphone positive input MIC2N 8 Channel two for Microphone negative input SPK2P 5 Channel two for Audio positive output AGND 6 Analog ground. AOUT3 LOUDSPKP 14 Channel three for Audio positive output LOUDSPKN 13 Channel three for Audio negative output Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 51 - Table 13: AOUT3 output characteristics Parameter Condition Min Typ Max Unit RMS power 8ohm load VBAT=4.3V THD+N=1% 800 mW 8ohm load VBAT=3.7V THD+N=1% 700 mW Gain adjustment range 0 18 dB Gain adjustment steps 3 dB 3.10.1. Decrease TDD noise and other noise The 33pF capacitor is applied for filtering out 900MHz RF interference when the module is transmitting at GSM900MHz. Without placing this capacitor, TDD noise could be heard. Moreover, the 10pF capacitor here is for filtering out 1800MHz RF interference. However, the resonant frequency point of a capacitor largely depends on the material and production technique. Therefore, customer would have to discuss with its capacitor vendor to choose the most suitable capacitor for filtering out GSM850MHz, GSM900MHz, DCS1800MHz and PCS1900MHz separately. The severity degree of the RF interference in the voice channel during GSM transmitting period largely depends on the application design. In some cases, GSM900 TDD noise is more severe; while in other cases, DCS1800 TDD noise is more obvious. Therefore, customer can have a choice based on test results. Sometimes, even no RF filtering capacitor is required. The capacitor which is used for filtering out RF noise should be close to RJ11 or other audio interfaces. Audio alignment should be as short as possible. In order to decrease radio or other signal interference, the position of RF antenna should be kept away from audio interface and audio alignment. Power alignment and audio alignment should not be parallel, and power alignment should be far away from audio alignment. The differential audio traces have to be placed according to the differential signal layout rule. 3.10.2. Microphone interfaces design AIN1 and AIN2 channels come with internal bias supply for external electret microphone. A reference circuit is shown in the following figure. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 52 - Close to MicrophoneMICxPMICxNGNDGNDDifferential layoutModuleElectret MicrophoneGNDGND GNDGNDESD ESD10pF060310pF060310pF060333pF060333pF060333pF0603 Figure 27: Reference design for AIN1&AIN2 3.10.3. Receiver and speaker interface design SPK1PSPK1NDifferential layout 10pF060310pF060333pF060333pF060333pF0603Close to SpeakerGNDGND10pF0603ESD ESD Module Figure 28: Reference design for AOUT1 Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 53 - SPK2PAGNDDifferential layout10pF060333pF0603Close to SpeakerGNDESD Module22uF Figure 29: Handset interface design for AOUT2 ModuleSPK2PAGNDDifferential layoutAmplifiercircuit10pF060310pF060333pF060333pF0603Close to SpeakerGNDGNDESD ESD C2C1 Figure 30: Speaker interface design with an amplifier for AOUT2 Texas Instrument’s TPA6205A1is recommended for a suitable differential audio amplifier. There are plenty of excellent audio amplifiers in the market. Note: The value of C1 and C2 here depends on the input impedance of audio amplifier. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 54 - 3.10.4. Earphone interface design Amphenol9001-8905-0501243SPK2PMIC2NMIC2P22uF68RGND GNDAGNDClose to SocketDifferential layoutAGNDGND GNDGNDGNDAGNDModule4.7uF33pF060310pF060333pF060310pF0603 ESD ESD Figure 31: Earphone interface design 3.10.5. Loud speaker interface design LOUDSPKPLOUDSPKNDifferential layout 10pF10pF 33pF33pFClose to SpeakerGNDGND100pFESDESD Module0R0R06030603 06030603 Figure 32: Loud speaker interface design Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 55 - 3.10.6. Audio characteristics Table 14: Typical electret microphone characteristics Parameter Min Typ Max Unit Working Voltage 1.2 1.5 2.0 V Working Current 200 500 uA External Microphone Load Resistance 2.2 kOhm Table 15: Typical speaker characteristics Parameter Min Typ Max Unit Normal Output (AOUT1) Single Ended Load Resistance 28 32 Ohm Ref level 0 2.4 Vpp Differential Load Resistance 28 32 Ohm Ref level 0 4.8 Vpp Auxiliary Output (AOUT2) Single Ended Load Resistance 16 32 Load Resistance Ref level 0 2.4 Vpp Output (AOUT3) Differential Load Resistance 8 Load Resistance Ref level 0 2×V B AT Vpp 3.11. SIM card interface 3.11.1. SIM card application The SIM interface supports the functionality of the GSM Phase 1 specification and also supports the functionality of the new GSM Phase 2+ specification for FAST 64 kbps SIM card, which is intended for use with a SIM application Tool-kit. The SIM interface is powered from an internal regulator in the module. Both 1.8V and 3.0V SIM Cards are supported. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 56 - Table 16: Pin definition of the SIM interface In Figure 33, the pin SIM_PRESENCE is used to detect whether the tray of the Molex SIM socket, which is used for holding SIM card, is present in the card socket. When the tray is inserted in the socket, SIM_PRESENCE is at low level. Regardless of whether the SIM card is in the tray or not, the change of SIM_PRESENCE level from high to low level inspires the module to reinitialize SIM card. In default configuration, SIM card detection function is disabled. Customer’s application can use “AT+QSIMDET=1,0 ” to switch on and “AT+QSIMDET=0,0 ” to switch off the SIM card detection function. For detail of this AT command, please refer to the document [1]. When “AT+QSIMDET=1,0” is set and the tray with SIM card is removed from SIM socket, the following URC will be presented. +CPIN: NOT READY When the tray with SIM card is inserted into SIM socket again and the module finishes re-initialization SIM card, the following URC will be presented. Call Ready ModuleSIM_VDDSIM_GNDSIM_RSTSIM_CLKSIM_DATASIM_PRESENCE22R22R22RVDD_EXT10K100nF SIM_HolderGNDGNDESDA6V8V633pF33pF 33pF 33pFVCCRSTCLK IOVPPGNDGND Figure 33: Reference circuit of the 8 pins SIM card Name Pin Description SIM_VDD 56 Supply power for SIM Card. Automatic detection of SIM card voltage. 3.0V±10% and 1.8V±10%. Maximum supply current is around 10mA. S I M _ D ATA 54 SIM data SIM_CLK 55 SIM clock SIM_RST 53 SIM reset SIM_PRESENCE 57 SIM card detection SIM_GND 52 SIM ground Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 57 - Note: Please do not use “AT+QSIMDET=1,1” which causes to initialize SIM card when Figure 33 circuit is adopted. If customer does not need the SIM card detection function, keep SIM_PRESENCE open. The reference circuit using a 6-pin SIM card socket is illustrated as the following figure. ModuleSIM_VDDSIM_GNDSIM_RSTSIM_CLKSIM_DATASIM_PRESENCE22R22R22R100nF SIM_HolderGNDESDA6V8V633pF33pF 33pF 33pFVCCRSTCLK IOVPPGNDGND Figure 34: Reference circuit of the 6 pins SIM card In order to enhance the reliability and availability of the SIM card in the customer’s application. Please follow the below criterion in the SIM circuit design.  Keep layout of SIM card as close as possible to the module. Assure the possibility of the length of the trace is less than 20cm.  Keep SIM card signal away from RF and VBAT alignment.  Assure the ground between module and SIM cassette short and wide. Keep the width of ground no less than 0.5mm to maintain the same electric potential. The decouple capacitor of SIM_VDD is less than 1uF and must be near to SIM cassette.  To avoid cross talk between SIM_DATA and SIM_CLK. Keep them away with each other and shield them with surrounded ground  In order to offer good ESD protection, it is recommended to add TVS such as WILL (http://www.willsemi.com) ESDA6V8AV6. The 22Ω resistors should be added in series between the module and the SIM card so as to suppress the EMI spurious transmission and enhance the ESD protection. Please to be noted that the SIM peripheral circuit should be close to the SIM card socket. 3.11.2. 6 Pin SIM cassette For 6-pin SIM card holder, it is recommended to use Amphenol C707 10M006 512 2. Please visit http://www.amphenol.com for more information. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 58 - Figure 35: Amphenol C707 10M006 512 2 SIM card holder Table 17: Pin description of Amphenol SIM card holder Name Pin Description SIM_VDD C1 SIM Card Power Supply SIM_RST C2 SIM Card Reset SIM_CLK C3 SIM Card Clock GND C5 Ground VPP C6 Not Connect S I M _ D ATA C7 SIM Card data I/O 3.11.3. 8 Pin SIM cassette For 8-pin SIM card holder, it is recommended to use Molex 91228. Please visit http://www.molex.com for more information. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 59 - Figure 36: Molex 91228 SIM card holder Table 18: Pin description of Molex SIM card holder Name Pin Description SIM_VDD C1 SIM Card Power supply SIM_RST C2 SIM Card Reset SIM_CLK C3 SIM Card Clock SIM_PRESENCE C4 SIM Card Presence Detection GND C5 Ground VPP C6 Not Connect S I M _ D ATA C7 SIM Card Data I/O SIM_DETECT C8 Pulled down GND with external circuit. When the tray is present, C4 is connected to C8. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 60 - 3.12. SD card interface The module provides SD card interface that support many types of memory, such as Memory Stick, SD/MCC card and T-Flash or Micro SD card. The following are the main features of SD card interface.  Only supports 1bit serial mode.  Does not support the SPI mode SD/MMC memory card.  Does not support hot plug.  Up to 26MHz data rate in serial mode.  Up to 32GB maximum memory card capacity. With interface features and reference circuit of SD card shown in Figure 37, the users can easily design the SD card application circuit to enhance the memory capacity of the module. The module can record and store the audio files to the SD card, and play the audio files from SD card as well. Table 19: Pin definition of the SD card interface ModuleSD_DATA0SD_CLKSD_CMDDATA2DATA1DATA0CD/DATA3CMDVDDCLKVSS47K47K 47K4.7uF 0.1nFVDD_EXT33R33R33RMicro SD Socket12345678 Figure 37: Reference circuit of SD card Name Pin Description SD_DATA0 36 SD data SD_CLK 35 SD clock SD_CMD 34 SD command Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 61 - Table 20: Pin name of the SD card and Micro SD card In SD card interface designing, in order to ensure good communication performance with SD card, the following design principles should be complied with.  Route SD card trace as short as possible. Keep total trace length < 100mm, and trace difference of DATA0, CMD, and CLK to be < 10mm. The SD_CLK and SD_DATA0 line must be shielded by GND in order to avoid interference.  In order to offer good ESD protection, it is recommended to add TVS on signals with the capacitance is less than 15pF.  Reserve external pull-up resistor for other data lines except the DATA0. Pin NO. Pin name of SD card Pin name of T-Flash(Micro SD) card 1 CD/DATA3 DATA2 2 CMD CD/DATA3 3 VSS1 CMD 4 VDD VDD 5 CLK CLK 6 VSS2 VSS 7 DATA0 DATA0 8 DATA1 DATA1 9 DATA2 Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 62 - 3.13. PCM interface M50 supports PCM interface. It is used for digital audio transmission between the module and the customer’s device. This interface is composed of PCM_CLK, PCM_SYNC, PCM_IN and PCM_OUT signal lines. Pulse-code modulation (PCM) is a converter that changes the consecutive analog audio signal to discrete digital signal. The whole procedure of Pulse-code modulation contains sampling, quantizing and encoding. Table 21: Pin definition of PCM interface Name Pin I/O Description PCM_CLK 19 O PCM clock PCM_IN 18 I PCM data input PCM_OUT 20 O PCM data output PCM_SYNC 21 O PCM frame synchronization 3.13.1. Configuration M50 supports 16 bits line code PCM format. The sample rate is 8 KHz, the clock source is 256 KHz, and the module can only act as master mode. The PCM interfaces support long and short synchronization simultaneously. It only supports MSB first. For more detailed information, please see the table below. Table 22: Configuration PCM Line interface format Linear Data length Linear: 16 bits Sampling rate 8KHz PCM clock/synchronization source PCM master mode: clock and synchronization is generated by module PCM synchronization rate 8KHz PCM clock rate PCM master mode:256 KHz PCM synchronization format Long/short synchronization PCM data ordering MSB first Zero padding Yes Sign extension Yes Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 63 - 3.13.2. Timing The sample rate of the PCM interface is 8 KHz and the clock source is 256 KHz, so every frame contains 32 bits data, since M50 supports 16 bits line code PCM format, the left 16 bits are invalid. The following diagram shows the timing of different combinations. The synchronization length in long synchronization format can be programmed by firmware from one bit to eight bits. In the Sign extension mode, the high three bits of 16 bits are sign extension, and in the Zero padding mode, the low three bits of 16 bits are zero padding. 12 11 10 9 8 7 6 5 4 3 2 1 012 11 10 9 8 7 6 5 4 3 2 1 0PCM_CLKPCM_SYNCPCM_OUTPCM_INMSBMSBSign extensionSign extension Figure 38: Long synchronization & Sign extension diagram 12 11 10 9 8 7 6 5 4 3 2 1 012 11 10 9 8 7 6 5 4 3 2 1 0PCM_CLKPCM_SYNCPCM_OUTPCM_INMSBMSBZero paddingZero padding Figure 39: Long synchronization & Zero padding diagram PCM_CLKPCM_SYNCPCM_OUTPCM_IN12 11 10 9 8 7 6 5 4 3 2 1 012 11 10 9 8 7 6 5 4 3 2 1 0MSBMSBSign extensionSign extension Figure 40: Short synchronization & Sign extension diagram Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 64 - PCM_CLKPCM_SYNCPCM_OUTPCM_IN12 11 10 9 8 7 6 5 4 3 2 1 012 11 10 9 8 7 6 5 4 3 2 1 0MSBMSBZero paddingZero padding Figure 41: Short synchronization & Zero padding diagram 3.13.3. Reference design As M50 only acts as a master, the module provides synchronization and clock source. The reference design is shown as below. PCM_SYNCPCM_CLKPCM_OUTPCM_INPCM_SYNCPCM_CLKPCM_INPCM_OUTModule(master)Codec (slave)GND GND Figure 42: Reference design for PCM 3.13.4. AT command There are two AT commands about the configuration of PCM are listed as below. “AT+QPCMON” can configure operating mode of PCM. AT+QPCMON= mode,Sync_Type,Sync_Length,SignExtension,MSBFirst Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 65 - Table 23: QPCMON command description Parameter scope Description Mode 0~2 0: Close PCM 1: Open PCM 2: Open PCM when audio talk is set up Sync_Type 0~1 0: Short synchronization 1: Long synchronization Sync_Length 1~8 Programmed from one bit to eight bit SignExtension 0~1 0: Zero padding 1: Sign extension MSBFirst 0~1 0: MSB first 1: Not supported “AT+QPCMVOL” can configure volume of input and output. AT+QPCMVOL=vol_pcm_in,vol_pcm_out Table 24: QPCMVOL command description Parameter scope Description vol_pcm_in 0~32767 Set the input volume vol_pcm_out 0~32767 Set the output volume The voice may be distorted when this value exceeds 16384. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 66 - 3.14. ADC The module provides two ADC channel to measure the value of voltage. Please give priority to the use of ADC0 channel. The command “AT+QADC” can read the voltage value applied on ADC0 pin, while AT command “AT+QEADC” can read the voltage value applied on ADC1 pin. For details of this AT command, please refer to the document [1]. In order to improve the accuracy of ADC, the layout of ADC should be surrounded by ground. Table 25: Pin definition of the ADC Name Pin Description ADC0 2 General purpose analog to digital converter ADC1 1 General purpose analog to digital converter Table 26: Characteristics of the ADC Parameter Min Typ Max Unit Voltage Range 0 2.8 V ADC Resolution 10 bit ADC Accuracy 2.7 mV 3.15. Behaviors of the RI Table 27: Behaviors of the RI State RI response Standby HIGH Voice calling Change to LOW, then: 1. Change to HIGH when call is established. 2. Use ATH to hang up the call, RI changes to HIGH. 3. Calling part hangs up, RI changes to HIGH first, and changes to LOW for 120ms indicating “NO CARRIER” as an URC, then changes to HIGH again. 4. Change to HIGH when SMS is received. Data calling Change to LOW, then： 1. Change to HIGH when data connection is established. 2. U s e AT H t o hang up the data calling, RI changes to HIGH. 3. Calling part hangs up, RI changes to HIGH first, and changes to LOW for 120ms indicating “NO CARRIER” as an URC, then changes to HIGH again. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 67 - 4. Change to HIGH when SMS is received. SMS When a new SMS comes, the RI changes to LOW and holds low level for about 120 ms, then changes to HIGH. URC Certain URCs can trigger 120ms low level on RI. For more details, please refer to the document [1] If the module is used as a caller, the RI would maintain high except the URC or SMS is received. On the other hand, when it is used as a receiver, the timing of the RI is shown below. RIIdle RingOff-hook by“ATA”On-hook by “ATH”SMS receivedHIGHLOW Figure 43: RI behavior of voice calling as a receiver RIIdle RingData calling establishSMS receivedHIGHLOW On-hook by “ATH” Figure 44: RI behavior of data calling as a receiver RIIdle Calling On-hookTalkingHIGHLOWIdle Figure 45: RI behavior as a caller Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 68 - RIIdle or Talking URC or SMS received HIGHLOW120ms Figure 46: RI behavior of URC or SMS received Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 69 - 3.16. Network status indication The NETLIGHT signal can be used to drive a network status indicator LED. The working state of this pin is listed in the following table. Table 28: Working state of the NETLIGHT State Module function Off The module is not running. 64ms On/ 800ms Off The module is not synchronized with network. 64ms On/ 2000ms Off The module is synchronized with network. 64ms On/ 600ms Off GPRS data transfer is ongoing. A reference circuit is shown as below. Module300R4.7K47KVBATNETLIGHT Figure 47: Reference design for NETLIGHT 3.17. Operating status indication The STATUS pin is set as an output pin and can be used to judge whether module is power-on. In customer’s design, this pin can be connected to a GPIO of DTE or be used to drive an LED in order to judge the module’s operation status. A reference circuit is shown in Figure 48. Table 29: Pin definition of the STATUS Name Pin Description S TAT U S 16 Indicate module operating status Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 70 - Module300R4.7K47KVBATSTATUS Figure 48: Reference design for STATUS Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 71 - 4. Antenna interface The Pin 63 is the RF antenna pad. The RF interface has an impedance of 50Ω. Table 30: Pin definition of the RF_ANT 4.1. RF reference design The reference design for RF is shown as below. ModuleRF_ANT0RNM NM Figure 49: Reference design for RF M50 provides an RF antenna pad for customer’s antenna connection. The RF trace in host PCB connected to the module RF antenna pad should be micro-strip line or other types of RF trace, whose characteristic impedance should be close to 50Ω. M50 comes with grounding pads which are next to the antenna pad in order to give a better grounding. Besides, a ∏ type match circuit is suggested to be used to adjust the RF performance. To minimize the loss on the RF trace and RF cable, take design into account carefully. It is recommended that the insertion loss should meet the following requirements: Name Pin Description GND 61 Ground GND 62 Ground RF_ANT 63 RF antenna pad GND 64 Ground GND 65 Ground GND 66 Ground Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 72 -  GSM850/EGSM900 is <1dB.  DCS1800/PCS1900 is <1.5dB. 4.2. RF output power Table 31: The module conducted RF output power Frequency Max Min GSM850 32.5dBm ±1dB 5dBm±5dB EGSM900 32.5dBm ±1dB 5dBm±5dB DCS1800 29.5dBm ±1dB 0dBm±5dB PCS1900 29.5dBm ±1dB 0dBm±5dB Note: In GSM850&EGSM900 GPRS 4 slots TX mode, the max output power is reduced by 2.5dB. This design conforms to the GSM specification as described in section 13.16 of 3GPP TS 51.010-1. 4.3. RF receiving sensitivity Table 32: The module conducted RF receiving sensitivity Frequency Receive sensitivity GSM850 < -108.5dBm EGSM900 < -108.5dBm DCS1800 < -108.5dBm PCS1900 < -108.5dBm 4.4. Operating frequencies Table 33: The module operating frequencies Frequency Receive Transmit ARFCH GSM850 869~894MHz 824~849MHz 128~251 EGSM900 925~960MHz 880~915MHz 0~124, 975~1023 DCS1800 1805~1880MHz 1710~1785MHz 512~885 PCS1900 1930~1990MHz 1850~1910MHz 512~810 Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 73 - 4.5. RF cable soldering Soldering the RF cable to RF pad of module correctly will reduce the loss on the path of RF, please refer to the following example of RF soldering. Figure 50: RF soldering sample Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 74 - 5. Electrical, reliability and radio characteristics 5.1. Absolute maximum ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table: Table 34: Absolute maximum ratings Parameter Min Max Unit V B AT -0.3 +4.73 V Peak current of power supply 0 2 A RMS current of power supply (during one TDMA- frame) 0 0.7 A Voltage at digital pins -0.3 3.3 V Voltage at analog pins -0.3 3.0 V Voltage at digital/analog pins in power down mode -0.25 0.25 V 5.2. Operating temperature The operating temperature is listed in the following table: Table 35: Operating temperature Parameter Min Typ Max Unit Normal Temperature -35 +25 +80 ℃ Restricted Operation1) -40 ~ -35 +80 ~ +85 ℃ Storage Temperature -45 +90 ℃ 1）When the module works in this temperature range, the deviation from the GSM specification may occur. For example, the frequency error or the phase error will be increased. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 75 - 5.3. Power supply ratings Table 36: The module power supply ratings Parameter Description Conditions Min Typ Max Unit VBAT Supply voltage Voltage must stay within the min/max values, including voltage drop, ripple, and spikes. 3.3 4.0 4.6 V Vdrop during transmitting burst Maximum power control level on GSM850 and GSM900. 400 mV Voltage ripple Maximum power control level on GSM850 and GSM900 @ f<200kHz @ f>200kHz 50 2 mVmV IVBAT Average supply current Power down mode SLEEP mode @ DRX=5 30 1.3 uA mA Minimum functionality mode AT+CFUN=0 IDLE mode SLEEP mode AT+CFUN=4 IDLE mode SLEEP mode 13 0.98 13 1.0 mA mA mA mA IDLE mode GSM850/EGSM 900 DCS1800/PCS1900 13 13 mA mA TALK mode GSM850/EGSM 9001) DCS1800/PCS19002) 209/208 191/202 mA mA DATA mode, GPRS (3 Rx,2Tx) GSM850/EGSM 9001) DCS1800/PCS19002) 435/400 313/337 mA mA DATA mode, GPRS(2 Rx,3Tx) GSM850/EGSM 9001) DCS1800/PCS19002) 605/558 399/460 mA mA DATA mode, GPRS (4 Rx,1Tx) GSM850/EGSM 9001) DCS1800/PCS19002) 265/240 200/212 mA mA DATA mode, GPRS (1Rx,4Tx) GSM850/EGSM 9001) 615/560 mA Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 76 - DCS1800/PCS19002) 420/470 mA Peak supply current (during transmission slot) Maximum power control level on GSM850 and GSM900. 1.6 1.8 A 1) Power control level PCL 5 2) Power control level PCL 0 5.4. Current consumption The values of current consumption are shown as below. Table 37: The module current consumption Condition Current Consumption Voice Call GSM850 @power level #5 <300mA,Typical 209mA @power level #12,Typical 96mA @power level #19,Typical 73mA GSM900 @power level #5 <300mA,Typical 208mA @power level #12,Typical 96mA @power level #19,Typical 73mA DCS1800 @power level #0 <250mA,Typical 191mA @power level #7,Typical 93mA @power level #15,Typical 70mA PCS1900 @power level #0 <250mA,Typical 202mA @power level #7,Typical 95mA @power level #15,Typical 71mA GPRS Data DATA mode, GPRS ( 1 Rx,1 Tx ) CLASS 12 GSM850 @power level #5 <350mA,Typical 199mA @power level #12,Typical 87mA @power level #19,Typical 63mA EGSM 900 @power level #5 <350mA,Typical 200mA @power level #12,Typical 96mA @power level #19,Typical 70mA DCS 1800 @power level #0 <300mA,Typical 184mA @power level #7,Typical 82mA @power level #15,Typical 66mA PCS 1900 @power level #0 <300mA,Typical 192mA @power level #7,Typical 82mA @power level #15,Typical 66mA Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 77 - DATA mode, GPRS ( 3 Rx, 2 Tx ) CLASS 12 GSM850 @power level #5 <550mA,Typical 435mA @power level #12,Typical 158mA @power level #19,Typical 99mA EGSM 900 @power level #5 <550mA,Typical 400mA @power level #12,Typical 150mA @power level #19,Typical 97mA DCS 1800 @power level #0 <450mA,Typical 313mA @power level #7,Typical 130mA @power level #15,Typical 92mA PCS 1900 @power level #0 <450mA,Typical 337mA @power level #7,Typical 140mA @power level #15,Typical 94mA DATA mode, GPRS ( 2 Rx, 3 Tx ) CLASS 12 GSM850 @power level #5 <640mA,Typical 605mA @power level #12,Typical 195mA @power level #19,Typical 107mA EGSM 900 @power level #5 <600mA,Typical 558mA @power level #12,Typical 185mA @power level #19,Typical 106mA DCS 1800 @power level #0 <490mA,Typical 399mA @power level #7,Typical 150mA @power level #15,Typical 94mA PCS 1900 @power level #0 <480mA,Typical 460mA @power level #7,Typical 166mA @power level #15,Typical 98mA DATA mode, GPRS ( 4 Rx,1 Tx ) CLASS 12 GSM850 @power level #5 <350mA,Typical 265mA @power level #12,Typical 122mA @power level #19,Typical 93mA EGSM 900 @power level #5 <350mA,Typical 240mA @power level #12,Typical 115mA @power level #19,Typical 90mA DCS 1800 @power level #0 <300mA,Typical 200mA @power level #7,Typical 107mA @power level #15,Typical 89mA PCS 1900 @power level #0 <300mA,Typical 212mA @power level #7,Typical 118mA @power level #15,Typical 90mA DATA mode, GPRS ( 1 Rx, 4 Tx ) CLASS 12 GSM850 @power level #5 <660mA,Typical 615mA @power level #12,Typical 232mA @power level #19,Typical 118mA Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 78 - EGSM 900 @power level #5 <660mA,Typical 560mA @power level #12,Typical 215mA @power level #19,Typical 114mA DCS 1800 @power level #0 <530mA,Typical 420mA @power level #7,Typical 173mA @power level #15,Typical 97mA PCS 1900 @power level #0 <530mA,Typical 470mA @power level #7,Typical 192mA @power level #15,Typical 101mA Note: GPRS Class 12 is the default setting. The module can be configured from GPRS Class 1 to Class 12 by “AT+QGPCLASS”. Setting to lower GPRS class would make it easier to design the power supply for the module. 5.5. Electro-static discharge Although the GSM engine is generally protected against Electrostatic Discharge (ESD), ESD protection precautions should still be emphasized. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any applications using the module. The measured ESD values of module are shown in the following table. Table 38: The ESD endurance (Temperature:25℃,Humidity:45 %) Tested point Contact discharge Air discharge V B AT,GND ±5KV ±10KV RF_ANT ±5KV ±10KV PWRKEY S TAT U S ±2KV ±4KV SIM_VDD, SIM_DATA SIM_CLK, SIM_RST ±2KV ±4KV TXD, RXD RTS, CTS, DTR ±2KV ±4KV Others ±0.5KV ±1KV Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 79 - 6. Mechanical dimensions This chapter describes the mechanical dimensions of the module. 6.1. Mechanical dimensions of module Figure 51: M50 top and side dimensions Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 80 - Figure 52: M50 bottom dimensions Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 81 - 6.2. Recommended footprint without bottom centre pads silkscreenframe line Figure 53: Recommended footprint without bottom centre pads Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 82 - 6.4. Top view of the module Figure 54: Top view of the module Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 83 - 6.5. Bottom view of the module Figure 55: Bottom view of the module Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 84 - 7. Storage and manufacturing 7.1. Storage M50 is distributed in vacuum-sealed bag. The restriction of storage condition is shown as below. Shelf life in sealed bag: 12 months at <40℃/90% RH After this bag is opened, devices that will be subjected to reflow solder or other high temperature process must be:  Mounted within 72 hours at factory conditions of ≤30℃/60% RH  Stored at <10% RH Devices require bake before mounting, if:  Humidity indicator card is >10% when read at 23℃±5℃  Mounted exceed 72 hours at factory conditions of ≤30 ℃/60% RH If baking is required, devices may be baked for 48 hours at 125℃±5℃ Note: As plastic container cannot be subjected to high temperature, devices must be removed prior to high temperature (125℃) bake. If shorter bake times are desired, refer to the IPC/JEDECJ-STD-033 for bake procedure. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 85 - 7.2. Soldering The squeegee should push the paste on the surface of the stencil that makes the paste fill the stencil openings and penetrate to the PCB. The force on the squeegee should be adjusted so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil at the hole of the module pads should be 0.2mm for M50 . Figure 56: Paste application Suggest peak reflow temperature is from 235℃ to 245℃ (for SnAg3.0Cu0.5 alloy). Absolute max reflow temperature is 260℃. To avoid damage to the module when it was repeatedly heated, it is suggested that the module should be mounted after the first panel has been reflowed. The following picture is the actual diagram which we have operated. Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 86 - Time(s)50 100 150 200 250 30050100150200250 160℃ 200℃217070s~120s40s~60sBetween 1~3℃/SPreheat Heating Cooling℃sLiquids Temperature Figure 57: Ramp-Soak-Spike reflow profile 7.3. Packaging M50 modules are distributed in trays of 20 pieces each. This is especially suitable for the M50 according to SMT processes requirements. The trays are stored inside a vacuum-sealed bag which is ESD protected. It should not be opened until the devices are ready to be soldered onto the application. Figure 58: Module tray Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 87 - Appendix A: GPRS coding schemes Four coding schemes are used in GPRS protocol. The differences between them are shown in Table 39. Table 39: Description of different coding schemes Scheme Code rate USF Pre-coded USF Radio Block excl.USF and BCS BCS Tail Coded bits Punctured bits Data rate Kb/s CS-1 1/2 3 3 181 40 4 456 0 9.05 CS-2 2/3 3 6 268 16 4 588 132 13.4 CS-3 3/4 3 6 312 16 4 676 220 15.6 CS-4 1 3 12 428 16 - 456 - 21.4 Radio block structure of CS-1, CS-2 and CS-3 is shown as Figure 60: Figure 59: Radio block structure of CS-1, CS-2 and CS-3 Radio block structure of CS-4 is shown as Figure 61: Figure 60: Radio block structure of CS-4 Block code No coding 456 bits USF BCS Radio Block Rate 1/2 convolutional coding Puncturing 456 bits USF BCS Radio Block Quecctel Confidential
M50 Hardware Design M50_HD_V2.0 - 88 - Appendix B: GPRS multi-slot classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependant, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots. The active slots determine the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications. The description of different multi-slot classes is shown in Table 40. Table 40: GPRS multi-slot classes Multislot class Downlink slots Uplink slots Active slots 1 1 1 2 2 2 1 3 3 2 2 3 4 3 1 4 5 2 2 4 6 3 2 4 7 3 3 4 8 4 1 5 9 3 2 5 10 4 2 5 11 4 3 5 12 4 4 5 Quecctel Confidential
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