Quectel Wireless Solutions 201606EC21A LTE Module User Manual

Quectel Wireless Solutions Company Limited LTE Module Users Manual

Users Manual

EC21 Hardware DesignLTE Module SeriesRev. EC21_Hardware_Design_V1.5Date: 2017-03-05Status: Releasedwww.quectel.com
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 1/ 105Our aim is to provide customers with timely and comprehensive service. For anyassistance, please contact our company headquarters:Quectel Wireless Solutions Co., Ltd.7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, ChinaTel: +86 21 5108 6236Email: info@quectel.comOr our local office. For more information, please visit:http://quectel.com/support/sales.htmFor technical support, or to report documentation errors, please visit:http://quectel.com/support/technical.htmOr Email to: support@quectel.comGENERAL NOTESQUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATIONPROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORTTO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOTMAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPTANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF ORRELIANCE UPON THE INFORMATION. ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TOCHANGE WITHOUT PRIOR NOTICE.COPYRIGHTTHE INFORMATION CONTAINED HERE IS PROPRIETARY TECHNICAL INFORMATION OF QUECTELWIRELESS SOLUTIONS CO., LTD. TRANSMITTING, REPRODUCTION, DISSEMINATION ANDEDITING OF THIS DOCUMENT AS WELL AS UTILIZATION OF THE CONTENT ARE FORBIDDENWITHOUT PERMISSION. OFFENDERS WILL BE HELD LIABLE FOR PAYMENT OF DAMAGES. ALLRIGHTS ARE RESERVED IN THE EVENT OF A PATENT GRANT OR REGISTRATION OF A UTILITYMODEL OR DESIGN.Copyright © Quectel Wireless Solutions Co., Ltd. 2018. All rights reserved.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 2/ 105About the DocumentHistoryRevisionDateAuthorDescription1.02016-04-15Yeoman CHENInitial1.12016-09-22Yeoman CHEN/Frank WANG/Lyndon LIU1. Updated frequency bands in Table 1.2. Updated transmitting power, supported maximumbaud rate of main UART, supported internetprotocols, supported USB drivers of USB interface,and temperature range in Table 2.3. Updated timing of turning on module in Figure 12.4. Updated timing of turning off module in Figure 13.5. Updated timing of resetting module in Figure 16.6. Updated main UART supports baud rate in Chapter3.11.7. Added notes for ADC interface in Chapter 3.13.8. Updated GNSS Performance in Table 21.9. Updated operating frequencies of module in Table23.10. Added current consumption in Chapter 6.4.11. Updated RF output power in Chapter 6.5.12. Added RF receiving sensitivity in Chapter 6.6.1.32017-01-24Lyndon LIU/Rex WANG1. Updated frequency bands in Table 1.2. Updated function diagram in Figure 1.3. Updated pin assignment (top view) in Figure 2.4. Added BT interface in Chapter 3.18.2.5. Updated reference circuit of wireless connectivityinterfaces with FC20 module in Figure 29.6. Updated GNSS performance in Table 24.7. Updated module operating frequencies in Table 26.8. Added EC21-AUV current consumption in Table 38.9. Updated EC21-A conducted RF receiving sensitivityof in Table 42.10. Added EC21-J conducted RF receiving sensitivity in
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3/ 105Table 48.1.42017-03-01Geely YANGDeleted the LTE band TDD B41 of EC21-CT1.52018-03-05Annice ZHANG/Lyndon LIU/Frank WANG1. Updated functional diagram in Figure 1.2. Updated frequency bands in Table 1.3. Updated UMTS and GSM features in Table 2.4. Updated description of pin 40/136/137/138.5. Updated PWRKEY pulled down time to 500ms inchapter 3.7.1 and reference circuit in Figure 10.6. Updated reference circuit of (U)SIM interface inFigure 17&18.7. Updated reference circuit of USB interface in Figure19.8. Updated PCM mode in Chapter 3.12.9. Updated USB_BOOT reference circuit in Chapter3.20.10. Added SD card interface in Chapter 3.13.11. Updated module operating frequencies in Table 26.12. Updated EC21 series modules current consumptionin Chapter 6.5.13. Updated EC21 series modules conducted RFreceiving sensitivity in Chapter 6.6.14. Added thermal consideration description in Chapter6.8.15. Updated dimension tolerance information inChapter 7.16. Added storage temperature range in Table 2 andChapter 6.3.17. Updated RF output power in Table 42.18. Updated antenna requirements in Table 29.19. Updated GPRS multi-slot classes in Table 55.20. Updated storage information in Chapter 8.1
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 4/ 105ContentsAbout the Document.................................................................................................................................................2Contents....................................................................................................................................................................... 4Table Index.................................................................................................................................................................. 7Figure Index.................................................................................................................................................................91Introduction...........................................................................................................................................................111.1. Safety Information......................................................................................................................................122Product Concept..................................................................................................................................................132.1. General Description...................................................................................................................................132.2. Key Features.............................................................................................................................................. 142.3. Functional Diagram....................................................................................................................................172.4. Evaluation Board........................................................................................................................................173Application Interfaces........................................................................................................................................ 183.1. General Description...................................................................................................................................18.............................................................................................................................................. 错误！未定义书签。3.2. Pin Description........................................................................................................................................... 193.3. Operating Modes........................................................................................................................................283.4. Power Saving..............................................................................................................................................293.4.1. Sleep Mode......................................................................................................................................293.4.1.1. UART Application................................................................................................................ 293.4.1.2. USB Application with USB Remote Wakeup Function................................................. 303.4.1.3. USB Application with USB Suspend/Resume and RI Function.................................. 313.4.1.4. USB Application without USB Suspend Function..........................................................313.4.2. Airplane Mode................................................................................................................................. 323.5. Power Supply..............................................................................................................................................333.5.1. Power Supply Pins......................................................................................................................... 333.5.2. Decrease Voltage Drop................................................................................................................. 333.5.3. Reference Design for Power Supply...........................................................................................343.5.4. Monitor the Power Supply.............................................................................................................353.6. Turn on and off Scenarios........................................................................................................................ 353.6.1. Turn on Module Using the PWRKEY.......................................................................................... 353.6.2. Turn off Module...............................................................................................................................373.6.2.1. Turn off Module Using the PWRKEY Pin........................................................................373.6.2.2. Turn off Module Using AT Command...............................................................................383.7. Reset the Module.......................................................................................................................................383.8. (U)SIM Interface.........................................................................................................................................403.9. USB Interface............................................................................................................................................. 423.10. UART Interfaces.......................................................................................................................................443.11. PCM and I2C Interfaces......................................................................................................................... 46
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5/ 1053.12. SD Card Interface....................................................................................................................................483.13. ADC Interfaces.........................................................................................................................................513.14. Network Status Indication...................................................................................................................... 513.15. STATUS.....................................................................................................................................................533.16. Behaviors of RI.........................................................................................................................................533.17. SGMII Interface........................................................................................................................................544GNSS Receiver.....................................................................................................................................................584.1. General Description...................................................................................................................................584.2. GNSS Performance...................................................................................................................................584.3. Layout Guidelines...................................................................................................................................... 595Antenna Interfaces.............................................................................................................................................. 605.1. Main/Rx-diversity Antenna Interfaces.....................................................................................................605.1.1. Pin Definition................................................................................................................................... 605.1.2. Operating Frequency..................................................................................................................... 605.1.3. Reference Design of RF Antenna Interface...............................................................................615.1.4. Reference Design of RF Layout...................................................................................................625.2. GNSS Antenna Interface.......................................................................................................................... 645.3. Antenna Installation...................................................................................................................................655.3.1. Antenna Requirement....................................................................................................................655.3.2. Recommended RF Connector for Antenna Installation........................................................... 666Electrical, Reliability and Radio Characteristics........................................................................................ 686.1. Absolute Maximum Ratings..................................................................................................................... 686.2. Power Supply Ratings...............................................................................................................................696.3. Operation and Storage Temperatures....................................................................................................696.4. Current Consumption................................................................................................................................ 706.5. RF Output Power....................................................................................................................................... 766.6. RF Receiving Sensitivity...........................................................................................................................776.7. Electrostatic Discharge............................................................................................................................. 816.8. Thermal Consideration..............................................................................................................................817Mechanical Dimensions.....................................................................................................................................847.1. Mechanical Dimensions of the Module.................................................................................................. 847.2. Recommended Footprint..........................................................................................................................867.3. Design Effect Drawings of the Module................................................................................................... 878Storage, Manufacturing and Packaging........................................................................................................888.1. Storage........................................................................................................................................................ 888.2. Manufacturing and Soldering...................................................................................................................898.3. Packaging....................................................................................................................................................909Appendix A References.....................................................................................................................................9110 Appendix B GPRS Coding Schemes...........................................................................................................9511 Appendix C GPRS Multi-slot Classes......................................................................................................... 96
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6/ 10512 Appendix D EDGE Modulation and Coding Schemes............................................................................98
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 7/ 105Table IndexTABLE 1: FREQUENCY BANDS OF EC21 SERIES MODULE................................................................................ 13TABLE 2: KEY FEATURES OF EC21 MODULE..........................................................................................................14TABLE 3: I/O PARAMETERS DEFINITION...................................................................................................................19TABLE 4: PIN DESCRIPTION......................................................................................................................................... 19TABLE 5: OVERVIEW OF OPERATING MODES........................................................................................................28TABLE 6: VBAT AND GND PINS.................................................................................................................................... 33TABLE 7: PIN DEFINITION OF PWRKEY.....................................................................................................................35TABLE 8: PIN DEFINITION OF RESET_N................................................................................................................... 38TABLE 9: PIN DEFINITION OF THE (U)SIM INTERFACE.........................................................................................40TABLE 10: PIN DESCRIPTION OF USB INTERFACE............................................................................................... 42TABLE 11: PIN DEFINITION OF MAIN UART INTERFACE.......................................................................................44TABLE 12: PIN DEFINITION OF DEBUG UART INTERFACE.................................................................................. 44TABLE 13: LOGIC LEVELS OF DIGITAL I/O................................................................................................................ 45TABLE 14: PIN DEFINITION OF PCM AND I2C INTERFACES................................................................................ 47TABLE 15: PIN DEFINITION OF SD CARD INTERFACE.......................................................................................... 49TABLE 16: PIN DEFINITION OF ADC INTERFACES................................................................................................. 51TABLE 17: CHARACTERISTIC OF ADC....................................................................................................................... 51TABLE 18: PIN DEFINITION OF NETWORK CONNECTION STATUS/ACTIVITY INDICATOR.......................... 52TABLE 19: WORKING STATE OF NETWORK CONNECTION STATUS/ACTIVITY INDICATOR........................52TABLE 20: PIN DEFINITION OF STATUS.....................................................................................................................53TABLE 21: BEHAVIOR OF RI......................................................................................................................................... 54TABLE 22: PIN DEFINITION OF THE SGMII INTERFACE........................................................................................ 54TABLE 23: PIN DEFINITION OF WIRELESS CONNECTIVITY INTERFACES....................... 错误！未定义书签。TABLE 24: PIN DEFINITION OF USB_BOOT INTERFACE.......................................................................................56TABLE 25: GNSS PERFORMANCE.............................................................................................................................. 58TABLE 26: PIN DEFINITION OF RF ANTENNAS........................................................................................................ 60TABLE 27: MODULE OPERATING FREQUENCIES.................................................................................................. 60TABLE 28: PIN DEFINITION OF GNSS ANTENNA INTERFACE..............................................................................64TABLE 29: GNSS FREQUENCY.................................................................................................................................... 64TABLE 30: ANTENNA REQUIREMENTS.......................................................................................................................65TABLE 31: ABSOLUTE MAXIMUM RATINGS.............................................................................................................. 68TABLE 32: POWER SUPPLY RATINGS....................................................................................................................... 69TABLE 33: OPERATION AND STORAGE TEMPERATURES................................................................................... 69TABLE 34: EC21-E CURRENT CONSUMPTION........................................................................................................ 70TABLE 35: EC21-A CURRENT CONSUMPTION........................................................................................................ 72TABLE 36: EC21-V CURRENT CONSUMPTION........................................................................................................ 73TABLE 37: EC21-AUT CURRENT CONSUMPTION................................................................................................... 73TABLE 38: EC21-AUV CURRENT CONSUMPTION...................................................................................................74TABLE 39: EC21-J CURRENT CONSUMPTION......................................................................................................... 75TABLE 40: EC21-KL CURRENT CONSUMPTION...................................................................................................... 76TABLE 41: GNSS CURRENT CONSUMPTION OF EC21 SERIES MODULE....................................................... 76
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 8/ 105TABLE 42: RF OUTPUT POWER................................................................................................................................... 77TABLE 43: EC21-E CONDUCTED RF RECEIVING SENSITIVITY........................................................................... 77TABLE 44: EC21-A CONDUCTED RF RECEIVING SENSITIVITY........................................................................... 78TABLE 45: EC21-V CONDUCTED RF RECEIVING SENSITIVITY........................................................................... 78TABLE 46: EC21-AUT CONDUCTED RF RECEIVING SENSITIVITY......................................................................78TABLE 47: EC21-KL CONDUCTED RF RECEIVING SENSITIVITY.........................................................................79TABLE 48: EC21-J CONDUCTED RF RECEIVING SENSITIVITY............................................................................79TABLE 49: EC21-AUV CONDUCTED RF RECEIVING SENSITIVITY..................................................................... 79TABLE 50: EC21-AU CONDUCTED RF RECEIVING SENSITIVITY........................................................................ 80TABLE 51: ELECTROSTATIC DISCHARGE CHARACTERISTICS.......................................................................... 81TABLE 52: RELATED DOCUMENTS............................................................................................................................. 91TABLE 53: TERMS AND ABBREVIATIONS..................................................................................................................91TABLE 54: DESCRIPTION OF DIFFERENT CODING SCHEMES.......................................................................... 95TABLE 55: GPRS MULTI-SLOT CLASSES.................................................................................................................. 96TABLE 56: EDGE MODULATION AND CODING SCHEMES................................................................................... 98
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 9/ 105Figure IndexFIGURE 1: FUNCTIONAL DIAGRAM............................................................................................................................ 17FIGURE 2: PIN ASSIGNMENT (TOP VIEW).................................................................................错误！未定义书签。FIGURE 3: SLEEP MODE APPLICATION VIA UART.................................................................................................29FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP........................................................... 30FIGURE 5: SLEEP MODE APPLICATION WITH RI....................................................................................................31FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION...................................................... 32FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION............................................................. 33FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY.....................................................................................34FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY........................................................................................35FIGURE 10: TURN ON THE MODULE BY USING DRIVING CIRCUIT.................................................................. 36FIGURE 11: TURN ON THE MODULE BY USING BUTTON.....................................................................................36FIGURE 12: TIMING OF TURNING ON MODULE...................................................................................................... 37FIGURE 13: TIMING OF TURNING OFF MODULE.................................................................................................... 38FIGURE 14: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT............................................39FIGURE 15: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON............................................................. 39FIGURE 16: TIMING OF RESETTING MODULE........................................................................................................ 40FIGURE 17: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR..................................................................................................................................................................................... 41FIGURE 18: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR.. 41FIGURE 19: REFERENCE CIRCUIT OF USB APPLICATION..................................................................................43FIGURE 20: REFERENCE CIRCUIT WITH TRANSLATOR CHIP............................................................................45FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT...................................................................... 46FIGURE 22: PRIMARY MODE TIMING.........................................................................................................................47FIGURE 23: AUXILIARY MODE TIMING...................................................................................................................... 47FIGURE 24: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC.........................................48FIGURE 25: REFERENCE CIRCUIT OF SD CARD................................................................................................... 50FIGURE 26: REFERENCE CIRCUIT OF THE NETWORK INDICATOR................................................................. 52FIGURE 27: REFERENCE CIRCUITS OF STATUS....................................................................................................53FIGURE 28: SIMPLIFIED BLOCK DIAGRAM FOR ETHERNET APPLICATION...................................................55FIGURE 29: REFERENCE CIRCUIT OF SGMII INTERFACE WITH PHY AR8033 APPLICATION................... 56FIGURE 30: REFERENCE CIRCUIT OF WIRELESS CONNECTIVITY INTERFACES WITH FC20 MODULE 错误！未定义书签。FIGURE 31: REFERENCE CIRCUIT OF USB_BOOT INTERFACE........................................................................ 57FIGURE 32: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE..................................................................... 62FIGURE 33: MICROSTRIP LINE DESIGN ON A 2-LAYER PCB.............................................................................. 62FIGURE 34: COPLANAR WAVEGUIDE LINE DESIGN ON A 2-LAYER PCB........................................................ 63FIGURE 35: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCEGROUND).................................................................................................................................................................. 63FIGURE 36: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCEGROUND).................................................................................................................................................................. 63FIGURE 37: REFERENCE CIRCUIT OF GNSS ANTENNA...................................................................................... 65
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 10 / 105FIGURE 38: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM)...................................................... 66FIGURE 39: MECHANICALS OF U.FL-LP CONNECTORS...................................................................................... 67FIGURE 40: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM)................................................................... 67FIGURE 41: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE).....................82FIGURE 42: REFERENCED HEATSINK DESIGN (HEATSINK AT THE BOTTOM OF CUSTOMERS’ PCB)...82FIGURE 43: MODULE TOP AND SIDE DIMENSIONS...............................................................................................84FIGURE 44: MODULE BOTTOM DIMENSIONS (BOTTOM VIEW)..........................................................................85FIGURE 45: RECOMMENDED FOOTPRINT (TOP VIEW)........................................................................................86FIGURE 46: TOP VIEW OF THE MODULE.................................................................................................................. 87FIGURE 47: BOTTOM VIEW OF THE MODULE......................................................................................................... 87FIGURE 48: REFLOW SOLDERING THERMAL PROFILE....................................................................................... 89FIGURE 49: TAPE AND REEL SPECIFICATIONS......................................................................................................90
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 1-11 / 1051IntroductionThis document defines the EC21 module and describes its air interface and hardware interface which areconnected with customers’ applications.This document can help customers quickly understand module interface specifications, electrical andmechanical details, as well as other related information of EC21 module. Associated with application noteand user guide, customers can use EC21 module to design and set up mobile applications easily.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 1-12 / 1051.1. Safety InformationThe following safety precautions must be observed during all phases of the operation, such as usage,service or repair of any cellular terminal or mobile incorporating EC21 module. Manufacturers of the cellularterminal should send the following safety information to users and operating personnel, and incorporatethese guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for thecustomers’ failure to comply with these precautions.Full attention must be given to driving at all times in order to reduce the risk of anaccident. Using a mobile while driving (even with a handsfree kit) causesdistraction and can lead to an accident. You must comply with laws and regulationsrestricting the use of wireless devices while driving.Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it isswitched off. The operation of wireless appliances in an aircraft is forbidden, so asto prevent interference with communication systems. Consult the airline staff aboutthe use of wireless devices on boarding the aircraft, if your device offers anAirplane Mode which must be enabled prior to boarding an aircraft.Switch off your wireless device when in hospitals,clinics or other health carefacilities. These requests are desinged to prevent possible interference withsensitive medical equipment.Cellular terminals or mobiles operating over radio frequency signal and cellularnetwork cannot be guaranteed to connect in all conditions, for example no mobilefee or with an invalid (U)SIM card. While you are in this condition and needemergent help, please remember using emergency call. In order to make orreceive a call, the cellular terminal or mobile must be switched on and in a servicearea with adequate cellular signal strength.Your cellular terminal or mobile contains a transmitter and receiver. When it is ON,it receives and transmits radio frequency energy. RF interference can occur if it isused close to TV set, radio, computer or other electric equipment.In locations with potentially explosive atmospheres, obey all posted signs to turnoff wireless devices such as your phone or other cellular terminals. Areas withpotentially explosive atmospheres include fuelling areas, below decks on boats,fuel or chemical transfer or storage facilities, areas where the air containschemicals or particles such as grain, dust or metal powders, etc.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 2-13 / 1052Product Concept2.1. General DescriptionEC21 is a series of LTE-FDD/LTE-TDD/WCDMA/GSM wireless communication module with receivediversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA,WCDMA, EDGE and GPRS networks. It also provides GNSS1) and voice functionality2) for customers’specific applications. EC21 contains nine variants: EC21-E, EC21-A, EC21-V, EC21-AU, EC21-AUT,EC21-AUV, EC21-J, EC21-KL and EC20-CEL. Customers can choose a dedicated type based on theregion or operator. The following table shows the frequency bands of EC21 series module.Table 1: Frequency Bands of EC21 Series ModuleModules2)LTE BandsUMTS BandsGSMRx-diversityGNSS1)EC21-EFDD: B1/B3/B5/B7/B8/B20WCDMA:B1/B5/B8900/1800YGPS,GLONASS,BeiDou/Compass,Galileo,QZSSEC21-AFDD: B2/B4/B12WCDMA:B2/B4/B5NYEC21-VFDD: B4/B13NNYEC21-AU3)FDD: B1/B2/B3/B4/B5/B7/B8/B28TDD: B40WCDMA:B1/B2/B5/B8850/900/1800/1900YEC21-AUTFDD: B1/B3/B5/B7/B28WCDMA:B1/B5NYEC21-AUVFDD: B1/B3/B5/B8/B28B1/B5/B8NYNEC21-JFDD: B1/B3/B8/B18/B19/B26NNYNEC21-KLFDD: B1/B3/B5/B7/B8NNYNEC20-CELFDD: B1/B3/B5NNNN
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 2-14 / 1051. 1) GNSS function is optional.2. 2) EC21 series module (EC21-E, EC21-A, EC21-V, EC21-AU, EC21-AUT, EC21-AUV, EC21-J,EC21-KL and EC20-CEL) contains Telematics version and Data-only version. Telematics versionsupports voice and data functions, while Data-only version only supports data function.3. 3) B2 band on EC21-AU module does not support Rx-diversity.4. Y = Supported. N = Not supported.With a compact profile of 29.0mm × 32.0mm × 2.4mm, EC21 can meet almost all requirements for M2Mapplications such as automotive, metering, tracking system, security, router, wireless POS, mobilecomputing device, PDA phone, tablet PC, etc.EC21 is an SMD type module which can be embedded into applications through its 144-pin pads,including 80 LCC signal pads and 64 other pads.2.2. Key FeaturesThe following table describes the detailed features of EC21 module.Table 2: Key Features of EC21 ModuleFeaturesDetailsPower SupplySupply voltage: 3.3V~4.3VTypical supply voltage: 3.8VTransmitting PowerClass 4 (33dBm±2dB) for GSM850Class 4 (33dBm±2dB) for GSM900Class 1 (30dBm±2dB) for DCS1800Class 1 (30dBm±2dB) for PCS1900Class E2 (27dBm±3dB) for GSM850 8-PSKClass E2 (27dBm±3dB) for GSM900 8-PSKClass E2 (26dBm±3dB) for DCS1800 8-PSKClass E2 (26dBm±3dB) for PCS1900 8-PSKClass 3 (24dBm+1/-3dB) for WCDMA bandsClass 3 (23dBm±2dB) for LTE-FDD bandsClass 3 (23dBm±2dB) for LTE-TDD bandsLTE FeaturesSupport up to non-CA Cat 1 FDD and TDDSupport 1.4MHz~20MHz RF bandwidthSupport MIMO in DL directionLTE-FDD: Max 10Mbps (DL)/5Mbps (UL)NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 2-15 / 105LTE-TDD: Max 8.96Mbps (DL)/3.1Mbps (UL)UMTS FeaturesSupport 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMASupport QPSK, 16-QAM and 64-QAM modulationDC-HSDPA: Max 42Mbps (DL)HSUPA: Max 5.76Mbps (UL)WCDMA: Max 384Kbps (DL)/384Kbps (UL)GSM FeaturesGPRS:Support GPRS multi-slot class 33 (33 by default)Coding scheme: CS-1, CS-2, CS-3 and CS-4Max 107Kbps (DL)/85.6Kbps (UL)EDGE:Support EDGE multi-slot class 33 (33 by default)Support GMSK and 8-PSK for different MCS (Modulation and CodingScheme)Downlink coding schemes: CS 1-4 and MCS 1-9Uplink coding schemes: CS 1-4 and MCS 1-9Max 296Kbps (DL)/ 236.8Kbps (UL)Internet Protocol FeaturesSupport TCP/UDP/PPP/FTP/HTTP/NTP/PING/QMI/ CMUX*/HTTPS*/SMTP*/ MMS*/FTPS*/SMTPS*/SSL*/FILE* protocolsSupport PAP (Password Authentication Protocol) and CHAP (ChallengeHandshake Authentication Protocol) protocols which are usually used forPPP connectionsSMSText and PDU modePoint to point MO and MTSMS cell broadcastSMS storage: ME by default(U)SIM InterfaceSupport USIM/SIM card: 1.8V, 3.0VAudio FeaturesSupport one digital audio interface: PCM interfaceGSM: HR/FR/EFR/AMR/AMR-WBWCDMA: AMR/AMR-WBLTE: AMR/AMR-WBSupport echo cancellation and noise suppressionPCM InterfaceUsed for audio function with external codecSupport 8-bit A-law*, μ-law* and 16-bit linear data formatsSupport long frame synchronization and short frame synchronizationSupport master and slave modes, but must be the master in long framesynchronizationUSB InterfaceCompliant with USB 2.0 specification (slave only); the data transfer ratecan reach up to 480MbpsUsed for AT command communication, data transmission, GNSS NMEAoutput, software debugging, firmware upgrade and voice over USB*Support USB serial drivers for: Windows XP, Windows Vista, Windows
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 2-16 / 1057/8/8.1/10, Windows CE 5.0/6.0/7.0*, Linux 2.6/3.x/4.1,Android 4.x/5.x/6.x/7.xUART InterfaceMain UART:Used for AT command communication and data transmissionBaud rates reach up to 921600bps, 115200bps by defaultSupport RTS and CTS hardware flow controlDebug UART:Used for Linux console and log output115200bps baud rateSD Card InterfaceSupport SD 3.0 protocolSGMII InterfaceSupport 10/100/1000Mbps Ethernet connectivityRx-diversitySupport LTE/WCDMA Rx-diversityGNSS FeaturesGen8C Lite of QualcommProtocol: NMEA 0183AT CommandsCompliant with 3GPP TS 27.007, 27.005 and Quectel enhanced ATcommandsNetwork IndicationTwo pins including NET_MODE and NET_STATUS to indicate networkconnectivity statusAntenna InterfaceIncluding main antenna interface (ANT_MAIN), Rx-diversity antennainterface (ANT_DIV) and GNSS antenna interface (ANT_GNSS)Physical CharacteristicsSize: (29.0±0.15)mm × (32.0±0.15)mm × (2.4±0.2)mmWeight: approx. 4.9gTemperature RangeOperation temperature range: -35°C ~ +75°C1)Extended temperature range: -40°C ~ +85°C2)Storage temperature range: -40°C ~ +90°CFirmware UpgradeUSB interface and DFOTA*RoHSAll hardware components are fully compliant with EU RoHS directive1. 1) Within operating temperature range, the module is 3GPP compliant.2. 2) Within extended temperature range, the module remains the ability to establish and maintain avoice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. Thereare also no effects on radio spectrum and no harm to radio network. Only one or more parameterslike Pout might reduce in their value and exceed the specified tolerances. When the temperaturereturns to normal operating temperature levels, the module will meet 3GPP specifications again.3. “*” means under development.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 2-17 / 1052.3. Functional DiagramThe following figure shows a block diagram of EC21 and illustrates the major functional parts.Power managementBasebandDDR+NAND flashRadio frequencyPeripheral interfacesFigure 1: Functional Diagram2.4. Evaluation BoardIn order to help customers develop applications with EC21, Quectel supplies an evaluation board (EVB),USB to RS-232 converter cable, earphone, antenna and other peripherals to control or test the module.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-18 / 1053Application Interfaces3.1. General DescriptionEC21 is equipped with 80 LCC pads plus 64 LGA pads that can be connected to cellular applicationplatform. Sub-interfaces included in these pads are described in detail in the following chapters:Power supply(U)SIM interfaceUSB interfaceUART interfacesPCM and I2C interfacesSD card interfaceADC interfacesStatus indicationSGMII interfaceWireless connectivity interfacesUSB_BOOT interface
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-19 / 1053.2. Pin DescriptionThe following tables show the pin definition of EC21 module.Table 3: I/O Parameters DefinitionTypeDescriptionIOBidirectionalDIDigital inputDODigital outputPIPower inputPOPower outputAIAnalog inputAOAnalog outputODOpen drainTable 4: Pin DescriptionPower SupplyPin NamePin No.I/ODescriptionDC CharacteristicsCommentVBAT_BB59, 60PIPower supply formodule’s basebandpartVmax=4.3VVmin=3.3VVnorm=3.8VIt must be able toprovide sufficient currentup to 0.8A.VBAT_RF57, 58PIPower supply formodule’s RF partVmax=4.3VVmin=3.3VVnorm=3.8VIt must be able toprovide sufficient currentup to 1.8A in a bursttransmission.VDD_EXT7POProvide 1.8V forexternal circuitVnorm=1.8VIOmax=50mAPower supply forexternal GPIO’s pull-upcircuits.If unused, keep it open.GND8, 9, 19,22, 36, 46,Ground
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-20 / 10548, 50~54,56, 72,85~112Turn on/offPin NamePin No.I/ODescriptionDC CharacteristicsCommentPWRKEY21DITurn on/off themoduleVIHmax=2.1VVIHmin=1.3VVILmax=0.5VThe output voltage is0.8V because of thediode drop in theQualcomm chipset.RESET_N20DIReset signal of themoduleVIHmax=2.1VVIHmin=1.3VVILmax=0.5VIf unused, keep itopen.Status IndicationPin NamePin No.I/ODescriptionDC CharacteristicsCommentSTATUS61ODIndicate the moduleoperating statusThe drive currentshould be less than0.9mA.Require externalpull-up. If unused,keep it open.NET_MODE5DOIndicate the modulenetwork registrationmodeVOHmin=1.35VVOLmax=0.45V1.8V power domain.It cannot be pulled upbefore startup.If unused, keep itopen.NET_STATUS6DOIndicate the modulenetwork activitystatusVOHmin=1.35VVOLmax=0.45V1.8V power domain.If unused, keep itopen.USB InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentUSB_VBUS71PIUSB detectionVmax=5.25VVmin=3.0VVnorm=5.0VTypical: 5.0VIf unused, keep itopen.USB_DP69IOUSB differential databus (+)Compliant with USB2.0 standardspecification.Require differentialimpedance of 90Ω.If unused, keep itopen.USB_DM70IOUSB differential databus (-)Compliant with USB2.0 standardspecification.Require differentialimpedance of 90Ω.If unused, keep itopen.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-21 / 105(U)SIM InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentUSIM_GND10Specified ground for(U)SIM cardUSIM_VDD14POPower supply for(U)SIM cardFor 1.8V (U)SIM:Vmax=1.9VVmin=1.7VFor 3.0V (U)SIM:Vmax=3.05VVmin=2.7VIOmax=50mAEither 1.8V or 3.0V issupported by themodule automatically.USIM_DATA15IOData signal of(U)SIM cardFor 1.8V (U)SIM:VILmax=0.6VVIHmin=1.2VVOLmax=0.45VVOHmin=1.35VFor 3.0V (U)SIM:VILmax=1.0VVIHmin=1.95VVOLmax=0.45VVOHmin=2.55VUSIM_CLK16DOClock signal of(U)SIM cardFor 1.8V (U)SIM:VOLmax=0.45VVOHmin=1.35VFor 3.0V (U)SIM:VOLmax=0.45VVOHmin=2.55VUSIM_RST17DOReset signal of(U)SIM cardFor 1.8V (U)SIM:VOLmax=0.45VVOHmin=1.35VFor 3.0V (U)SIM:VOLmax=0.45VVOHmin=2.55VUSIM_PRESENCE13DI(U)SIM cardinsertion detectionVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-22 / 105Main UART InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentRI62DORing indicatorVOLmax=0.45VVOHmin=1.35V1.8V power domain.If unused, keep itopen.DCD63DOData carrierdetectionVOLmax=0.45VVOHmin=1.35V1.8V power domain.If unused, keep itopen.CTS64DOClear to sendVOLmax=0.45VVOHmin=1.35V1.8V power domain.If unused, keep itopen.RTS65DIRequest to sendVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.DTR66DIData terminal ready,sleep mode controlVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.Pulled up by default.Low level wakes upthe module.If unused, keep itopen.TXD67DOTransmit dataVOLmax=0.45VVOHmin=1.35V1.8V power domain.If unused, keep itopen.RXD68DIReceive dataVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.Debug UART InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentDBG_TXD12DOTransmit dataVOLmax=0.45VVOHmin=1.35V1.8V power domain.If unused, keep itopen.DBG_RXD11DIReceive dataVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.ADC InterfacePin NamePin No.I/ODescriptionDC CharacteristicsComment
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-23 / 105ADC045AIGeneral purposeanalog to digitalconverterVoltage range:0.3V to VBAT_BBIf unused, keep itopen.ADC144AIGeneral purposeanalog to digitalconverterVoltage range:0.3V to VBAT_BBIf unused, keep itopen.PCM InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentPCM_IN24DIPCM data inputVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.PCM_OUT25DOPCM data outputVOLmax=0.45VVOHmin=1.35V1.8V power domain.If unused, keep itopen.PCM_SYNC26IOPCM data framesynchronizationsignalVOLmax=0.45VVOHmin=1.35VVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.In master mode, it isan output signal.In slave mode, it is aninput signal.If unused, keep itopen.PCM_CLK27IOPCM clockVOLmax=0.45VVOHmin=1.35VVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.In master mode, it isan output signal.In slave mode, it is aninput signal.If unused, keep itopen.I2C InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentI2C_SCL41ODI2C serial clock.Used for externalcodecExternal pull-upresistor is required.1.8V only.If unused, keep itopen.I2C_SDA42ODI2C serial data.Used for externalcodecExternal pull-upresistor is required.1.8V only.If unused, keep it
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-24 / 105open.SD Card InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentSDC2_DATA328IOSD card SDIO busDATA31.8V signaling:VOLmax=0.45VVOHmin=1.4VVILmin=-0.3VVILmax=0.58VVIHmin=1.27VVIHmax=2.0V3.0V signaling:VOLmax=0.38VVOHmin=2.01VVILmin=-0.3VVILmax=0.76VVIHmin=1.72VVIHmax=3.34VSDIO signal level canbe selected accordingto SD card supportedlevel, more detailsplease refer to SD 3.0protocol.If unused, keep itopen.SDC2_DATA229IOSD card SDIO busDATA21.8V signaling:VOLmax=0.45VVOHmin=1.4VVILmin=-0.3VVILmax=0.58VVIHmin=1.27VVIHmax=2.0V3.0V signaling:VOLmax=0.38VVOHmin=2.01VVILmin=-0.3VVILmax=0.76VVIHmin=1.72VVIHmax=3.34VSDIO signal level canbe selected accordingto SD card supportedlevel, more detailsplease refer to SD 3.0protocol.If unused, keep itopen.SDC2_DATA130IOSD card SDIO busDATA11.8V signaling:VOLmax=0.45VVOHmin=1.4VVILmin=-0.3VVILmax=0.58VVIHmin=1.27VVIHmax=2.0V3.0V signaling:SDIO signal level canbe selected accordingto SD card supportedlevel, more detailsplease refer to SD 3.0protocol.If unused, keep itopen.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-25 / 105VOLmax=0.38VVOHmin=2.01VVILmin=-0.3VVILmax=0.76VVIHmin=1.72VVIHmax=3.34VSDC2_DATA031IOSD card SDIO busDATA01.8V signaling:VOLmax=0.45VVOHmin=1.4VVILmin=-0.3VVILmax=0.58VVIHmin=1.27VVIHmax=2.0V3.0V signaling:VOLmax=0.38VVOHmin=2.01VVILmin=-0.3VVILmax=0.76VVIHmin=1.72VVIHmax=3.34VSDIO signal level canbe selected accordingto SD card supportedlevel, more detailsplease refer to SD 3.0protocol.If unused, keep itopen.SDC2_CLK32DOSD card SDIO busclock1.8V signaling:VOLmax=0.45VVOHmin=1.4V3.0V signaling:VOLmax=0.38VVOHmin=2.01VSDIO signal level canbe selected accordingto SD card supportedlevel, more detailsplease refer to SD 3.0protocol.If unused, keep itopen.SDC2_CMD33IOSD card SDIO buscommand1.8V signaling:VOLmax=0.45VVOHmin=1.4VVILmin=-0.3VVILmax=0.58VVIHmin=1.27VVIHmax=2.0V3.0V signaling:VOLmax=0.38VVOHmin=2.01VVILmin=-0.3VVILmax=0.76VVIHmin=1.72VVIHmax=3.34VSDIO signal level canbe selected accordingto SD card supportedlevel, more detailsplease refer to SD 3.0protocol.If unused, keep itopen.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-26 / 105SD_INS_DET23DISD card insertiondetectVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.VDD_SDIO34POSD card SDIO buspull-up powerIOmax=50mA1.8V/2.85Vconfigurable. Cannotbe used for SD cardpower.If unused, keep itopen.SGMII InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentEPHY_RST_N119DOEthernet PHY resetFor 1.8V:VOLmax=0.45VVOHmin=1.4VFor 2.85V:VOLmax=0.35VVOHmin=2.14V1.8V/2.85V powerdomain.If unused, keep itopen.EPHY_INT_N120DIEthernet PHYinterruptVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.SGMII_MDATA121IOSGMII MDIO(Management DataInput/Output) dataFor 1.8V:VOLmax=0.45VVOHmin=1.4VVILmax=0.58VVIHmin=1.27VFor 2.85V:VOLmax=0.35VVOHmin=2.14VVILmax=0.71VVIHmin=1.78V1.8V/2.85V powerdomain.If unused, keep itopen.SGMII_MCLK122DOSGMII MDIO(Management DataInput/Output) clockFor 1.8V:VOLmax=0.45VVOHmin=1.4VFor 2.85V:VOLmax=0.35VVOHmin=2.14V1.8V/2.85V powerdomain.If unused, keep itopen.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-27 / 105USIM2_VDD128POSGMII MDIO pull-uppower sourceConfigurable powersource.1.8V/2.85V powerdomain.External pull-up forSGMII MDIO pins.If unused, keep itopen.SGMII_TX_M123AOSGMII transmission- minusIf unused, keep itopen.SGMII_TX_P124AOSGMII transmission- plusIf unused, keep itopen.SGMII_RX_P125AISGMII receiving- plusIf unused, keep itopen.SGMII_RX_M126AISGMII receiving- minusIf unused, keep itopen.RF InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentANT_DIV35AIDiversity antennapad50Ω impedanceIf unused, keep itopen.ANT_MAIN49IOMain antenna pad50Ω impedanceANT_GNSS47AIGNSS antenna pad50Ω impedanceIf unused, keep itopen.GPIO PinsPin NamePin No.I/ODescriptionDC CharacteristicsCommentWAKEUP_IN1DISleep mode controlVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.Cannot be pulled upbefore startup.Low level wakes upthe module.If unused, keep itopen.W_DISABLE#4DIAirplane modecontrolVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.Pull-up by default.At low voltage level,module can enter intoairplane mode.If unused, keep it
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-28 / 1051. “*” means under development.2. Pads 24~27 are multiplexing pins used for audio design on EC21 module and BT function on FC20module.3.3. Operating ModesThe table below briefly summarizes the various operating modes referred in the following chapters.Table 5: Overview of Operating ModesModeDetailsNormalOperationIdleSoftware is active. The module has registered on the network, and it isready to send and receive data.Talk/DataNetwork connection is ongoing. In this mode, the power consumption isdecided by network setting and data transfer rate.open.AP_READY2DIApplicationprocessor sleepstate detectionVILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.If unused, keep itopen.USB_BOOT InterfacePin NamePin No.I/ODescriptionDC CharacteristicsCommentUSB_BOOT115DIForce the module toenter intoemergencydownload mode.VILmin=-0.3VVILmax=0.6VVIHmin=1.2VVIHmax=2.0V1.8V power domain.Active high.If unused, keep itopen.RESERVED PinsPin NamePin No.I/ODescriptionDC CharacteristicsCommentRESERVED3, 18, 23,43, 55,73~84,113, 114,116, 117,140-144.ReservedKeep these pinsunconnected.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-29 / 105MinimumFunctionalityModeAT+CFUN command can set the module to a minimum functionality mode withoutremoving the power supply. In this case, both RF function and (U)SIM card will be invalid.AirplaneModeAT+CFUN command or W_DISABLE# pin can set the module to airplane mode. In thiscase, RF function will be invalid.Sleep ModeIn this mode, the current consumption of the module will be reduced to the minimal level.During this mode, the module can still receive paging message, SMS, voice call andTCP/UDP data from the network normally.Power downModeIn this mode, the power management unit shuts down the power supply. Software is notactive. The serial interface is not accessible. Operating voltage (connected to VBAT_RFand VBAT_BB) remains applied.3.4. Power Saving3.4.1. Sleep ModeEC21 is able to reduce its current consumption to a minimum value during the sleep mode. The followingsection describes power saving procedures of EC21 module.3.4.1.1. UART ApplicationIf the host communicates with module via UART interface, the following preconditions can let the moduleenter into sleep mode.Execute AT+QSCLK=1 command to enable sleep mode.Drive DTR to high level.The following figure shows the connection between the module and the host.Figure 3: Sleep Mode Application via UART
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-30 / 105Driving the host DTR to low level will wake up the module.When EC21 has a URC to report, RI signal will wake up the host. Refer to Chapter 3.17 for detailsabout RI behaviors.AP_READY will detect the sleep state of the host (can be configured to high level or low leveldetection). Please refer to AT+QCFG="apready"* command for details.“*” means under development.3.4.1.2. USB Application with USB Remote Wakeup FunctionIf the host supports USB suspend/resume and remote wakeup functions, the following three preconditionsmust be met to let the module enter into sleep mode.Execute AT+QSCLK=1 command to enable sleep mode.Ensure the DTR is held at high level or keep it open.The host’s USB bus, which is connected with the module’s USB interface, enters into suspendedstate.The following figure shows the connection between the module and the host.Figure 4: Sleep Mode Application with USB Remote WakeupSending data to EC21 through USB will wake up the module.When EC21 has a URC to report, the module will send remote wake-up signals via USB bus so as towake up the host.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-31 / 1053.4.1.3. USB Application with USB Suspend/Resume and RI FunctionIf the host supports USB suspend/resume, but does not support remote wake-up function, the RI signal isneeded to wake up the host.There are three preconditions to let the module enter into the sleep mode.Execute AT+QSCLK=1 command to enable sleep mode.Ensure the DTR is held at high level or keep it open.The host’s USB bus, which is connected with the module’s USB interface, enters into suspendedstate.The following figure shows the connection between the module and the host.Figure 5: Sleep Mode Application with RISending data to EC21 through USB will wake up the module.When EC21 has a URC to report, RI signal will wake up the host.3.4.1.4. USB Application without USB Suspend FunctionIf the host does not support USB suspend function, USB_VBUS should be disconnected via an additionalcontrol circuit to let the module enter into sleep mode.Execute AT+QSCLK=1 command to enable sleep mode.Ensure the DTR is held at high level or keep it open.Disconnect USB_VBUS.The following figure shows the connection between the module and the host.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-32 / 105Figure 6: Sleep Mode Application without Suspend FunctionSwitching on the power switch to supply power to USB_VBUS will wake up the module.Please pay attention to the level match shown in dotted line between the module and the host. Refer todocument [1] for more details about EC21 power management application.3.4.2. Airplane ModeWhen the module enters into airplane mode, the RF function does not work, and all AT commandscorrelative with RF function will be inaccessible. This mode can be set via the following ways.Hardware:The W_DISABLE# pin is pulled up by default. Driving it to low level will let the module enter into airplanemode.Software:AT+CFUN command provides the choice of the functionality level through setting <fun> into 0, 1 or 4.AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled.AT+CFUN=1: Full functionality mode (by default).AT+CFUN=4: Airplane mode. RF function is disabled.1. W_DISABLE# control function is disabled in firmware by default. It can be enabled byAT+QCFG="airplanecontrol" command. This command is under development.2. The execution of AT+CFUN command will not affect GNSS function.NOTESNOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-33 / 1053.5. Power Supply3.5.1. Power Supply PinsEC21 provides four VBAT pins for connection with the external power supply. There are two separatevoltage domains for VBAT.Two VBAT_RF pins for module’s RF part.Two VBAT_BB pins for module’s baseband part.The following table shows the details of VBAT pins and ground pins.Table 6: VBAT and GND PinsPin NamePin No.DescriptionMin.Typ.Max.UnitVBAT_RF57, 58Power supply for module’sRF part.3.33.84.3VVBAT_BB59, 60Power supply for module’sbaseband part.3.33.84.3VGND8, 9, 19, 22, 36,46, 48, 50~54,56, 72, 85~112Ground-0-V3.5.2. Decrease Voltage DropThe power supply range of the module is from 3.3V to 4.3V. Please make sure that the input voltage willnever drop below 3.3V. The following figure shows the voltage drop during burst transmission in 2Gnetwork. The voltage drop will be less in 3G and 4G networks.Figure 7: Power Supply Limits during Burst Transmission
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-34 / 105To decrease voltage drop, a bypass capacitor of about 100µF with low ESR (ESR=0.7Ω) should be used,and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. Itis recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array,and place these capacitors close to VBAT_BB/VBAT_RF pins. The main power supply from an externalapplication has to be a single voltage source and can be expanded to two sub paths with star structure.The width of VBAT_BB trace should be no less than 1mm; and the width of VBAT_RF trace should be noless than 2mm. In principle, the longer the VBAT trace is, the wider it will be.In addition, in order to get a stable power source, it is suggested that a zener diode whose reverse zenervoltage is 5.1V and dissipation power is more than 0.5W should be used. The following figure shows thestar structure of the power supply.Figure 8: Star Structure of the Power Supply3.5.3. Reference Design for Power SupplyPower design for the module is very important, as the performance of the module largely depends on thepower source. The power supply should be able to provide sufficient current up to 2A at least. If thevoltage drop between the input and output is not too high, it is suggested that an LDO should be used tosupply power for the module. If there is a big voltage difference between the input source and the desiredoutput (VBAT), a buck converter is preferred to be used as the power supply.The following figure shows a reference design for +5V input power source. The typical output of the powersupply is about 3.8V and the maximum load current is 3A.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-35 / 105Figure 9: Reference Circuit of Power SupplyIn order to avoid damaging internal flash, please do not switch off the power supply when the moduleworks normally. Only after the module is shut down by PWRKEY or AT command, the power supply canbe cut off.3.5.4. Monitor the Power SupplyAT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer todocument [2].3.6. Turn on and off Scenarios3.6.1. Turn on Module Using the PWRKEYThe following table shows the pin definition of PWRKEY.Table 7: Pin Definition of PWRKEYPin NamePin No.I/ODescriptionCommentPWRKEY21DITurn on/off the moduleThe output voltage is 0.8V because ofthe diode drop in the Qualcomm chipset.When EC21 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to alow level for at least 500ms. It is recommended to use an open drain/collector driver to control thePWRKEY. After STATUS pin (require external pull-up) outputting a low level, PWRKEY pin can bereleased. A simple reference circuit is illustrated in the following figure.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-36 / 105Figure 10: Turn on the Module by Using Driving CircuitThe other way to control the PWRKEY is using a button directly. When pressing the key, electrostaticstrike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby thebutton for ESD protection. A reference circuit is shown in the following figure.Figure 11: Turn on the Module by Using ButtonThe turn on scenario is illustrated in the following figure.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-37 / 105Figure 12: Timing of Turning on ModulePlease make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is noless than 30ms.3.6.2. Turn off ModuleThe following procedures can be used to turn off the module:Normal power down procedure: Turn off the module using the PWRKEY pin.Normal power down procedure: Turn off the module using AT+QPOWD command.3.6.2.1. Turn off Module Using the PWRKEY PinDriving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-downprocedure after the PWRKEY is released. The power-down scenario is illustrated in the following figure.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-38 / 105Figure 13: Timing of Turning off Module3.6.2.2. Turn off Module Using AT CommandIt is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off themodule via PWRKEY pin.Please refer to document [2] for details about AT+QPOWD command.1. In order to avoid damaging internal flash, please do not switch off the power supply when the moduleworks normally. Only after the module is shut down by PWRKEY or AT command, the power supplycan be cut off.2. When turn off module with AT command, please keep PWRKEY at high level after the execution ofpower-off command. Otherwise the module will be turned on again after successfully turn-off.3.7. Reset the ModuleThe RESET_N pin can be used to reset the module. The module can be reset by driving RESET_N to alow level voltage for time between 150ms and 460ms.Table 8: Pin Definition of RESET_NPin NamePin No.I/ODescriptionCommentNOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-39 / 105The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or buttoncan be used to control the RESET_N.Figure 14: Reference Circuit of RESET_N by Using Driving CircuitFigure 15: Reference Circuit of RESET_N by Using ButtonThe reset scenario is illustrated in the following figure.RESET_N20DIReset the module1.8V power domain
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-40 / 105Figure 16: Timing of Resetting Module1. Use RESET_N only when turning off the module by AT+QPOWD command and PWRKEY pin failed.2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins.3.8. (U)SIM InterfaceThe (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cardsare supported.Table 9: Pin Definition of the (U)SIM InterfacePin NamePin No.I/ODescriptionCommentUSIM_VDD14POPower supply for (U)SIM cardEither 1.8V or 3.0V is supportedby the module automatically.USIM_DATA15IOData signal of (U)SIM cardUSIM_CLK16DOClock signal of (U)SIM cardUSIM_RST17DOReset signal of (U)SIM cardUSIM_PRESENCE13DI(U)SIM card insertion detection1.8V power domain.If unused, keep it open.USIM_GND10Specified ground for (U)SIMcardEC21 supports (U)SIM card hot-plug via the USIM_PRESENCE pin. The function supports low level andNOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-41 / 105high level detections, and is disabled by default. Please refer to document [2] about AT+QSIMDETcommand for details.The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector.Figure 17: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card ConnectorIf (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. Areference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the followingfigure.Figure 18: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card ConnectorIn order to enhance the reliability and availability of the (U)SIM card in customers’ applications, please
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-42 / 105follow the criteria below in (U)SIM circuit design:Keep placement of (U)SIM card connector to the module as close as possible. Keep the trace lengthas less than 200mm as possible.Keep (U)SIM card signals away from RF and VBAT traces.Assure the ground between the module and the (U)SIM card connector short and wide. Keep thetrace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential.Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1uF, and place it asclose to (U)SIM card connector as possible. If the ground is complete on customers’ PCB,USIM_GND can be connected to PCB ground directly.To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other andshield them with surrounded ground.In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasiticcapacitance should not be more than 15pF. The 0Ω resistors should be added in series between themodule and the (U)SIM card to facilitate debugging. The 33pF capacitors are used for filteringinterference of GSM900MHz. Please note that the (U)SIM peripheral circuit should be close to the(U)SIM card connector.The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout traceand sensitive occasion are applied, and should be placed close to the (U)SIM card connector.3.9. USB InterfaceEC21 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0specification and supports high-speed (480Mbps) and full-speed (12Mbps) modes. The USB interface isused for AT command communication, data transmission, GNSS NMEA sentences output, softwaredebugging, firmware upgrade and voice over USB*. The following table shows the pin definition of USBinterface.Table 10: Pin Description of USB InterfacePin NamePin No.I/ODescriptionCommentUSB_DP69IOUSB differential data bus (+)Require differentialimpedance of 90ΩUSB_DM70IOUSB differential data bus (-)Require differentialimpedance of 90ΩUSB_VBUS71PIUsed for detecting the USB connectionTypically 5.0VGND72GroundFor more details about the USB 2.0 specification, please visit http://www.usb.org/home.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-43 / 105The USB interface is recommended to be reserved for firmware upgrade in customers’ designs. Thefollowing figure shows a reference circuit of USB interface.Figure 19: Reference Circuit of USB ApplicationA common mode choke L1 is recommended to be added in series between the module and customer’sMCU in order to suppress EMI spurious transmission. Meanwhile, the 0Ω resistors (R3 and R4) should beadded in series between the module and the test points so as to facilitate debugging, and the resistors arenot mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 componentsmust be placed close to the module, and also these resistors should be placed close to each other. Theextra stubs of trace must be as short as possible.The following principles should be complied with when design the USB interface, so as to meet USB 2.0specification.It is important to route the USB signal traces as differential pairs with total grounding. The impedanceof USB differential trace is 90Ω.Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It isimportant to route the USB differential traces in inner-layer with ground shielding on not only upperand lower layers but also right and left sides.Pay attention to the influence of junction capacitance of ESD protection components on USB datalines. Typically, the capacitance value should be less than 2pF.Keep the ESD protection components to the USB connector as close as possible.1. EC21 module can only be used as a slave device.2. “*” means under development.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-44 / 1053.10. UART InterfacesThe module provides two UART interfaces: the main UART interface and the debug UART interface. Thefollowing shows their features.The main UART interface supports 4800bps, 9600bps, 19200bps, 38400bps, 57600bps, 115200bps,230400bps, 460800bps and 921600bps baud rates, and the default is 115200bps. The interface isused for data transmission and AT command communication.The debug UART interface supports 115200bps baud rate. It is used for Linux console and logoutput.The following tables show the pin definition of the UART interfaces.Table 11: Pin Definition of Main UART InterfacePin NamePin No.I/ODescriptionCommentRI62DORing indicator1.8V power domainDCD63DOData carrier detectionCTS64DOClear to sendRTS65DIRequest to sendDTR66DIData terminal readyTXD67DOTransmit dataRXD68DIReceive dataTable 12: Pin Definition of Debug UART InterfacePin NamePin No.I/ODescriptionCommentDBG_TXD12DOTransmit data1.8V power domainDBG_RXD11DIReceive data1.8V power domain
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-45 / 105The logic levels are described in the following table.Table 13: Logic Levels of Digital I/OParameterMin.Max.UnitVIL-0.30.6VVIH1.22.0VVOL00.45VVOH1.351.8VThe module provides 1.8V UART interface. A level translator should be used if customers’ application isequipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments isrecommended. The following figure shows a reference design.Figure 20: Reference Circuit with Translator ChipPlease visit http://www.ti.com for more information.Another example with transistor translation circuit is shown as below. The circuit design of dotted linesection can refer to the design of solid line section, in terms of both module input and output circuitdesigns, but please pay attention to the direction of connection.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-46 / 105Figure 21: Reference Circuit with Transistor CircuitTransistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps.3.11. PCM and I2C InterfacesEC21 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports thefollowing modes and one I2C interface:Primary mode (short frame synchronization, works as both master and slave)Auxiliary mode (long frame synchronization, works as master only)In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the risingedge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHzPCM_CLK at 16kHz PCM_SYNC.In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the risingedge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates with a256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC.EC21 supports 8-bit A-law* and μ-law*, and also 16-bit linear data formats. The following figures show theprimary mode’s timing relationship with 8kHz PCM_SYNC and 2048kHz PCM_CLK, as well as theauxiliary mode’s timing relationship with 8kHz PCM_SYNC and 256kHz PCM_CLK.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-47 / 105Figure 22: Primary Mode TimingFigure 23: Auxiliary Mode TimingThe following table shows the pin definition of PCM and I2C interfaces which can be applied on audiocodec design.Table 14: Pin Definition of PCM and I2C InterfacesPin NamePin No.I/ODescriptionCommentPCM_IN24DIPCM data input1.8V power domainPCM_OUT25DOPCM data output1.8V power domain
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-48 / 105PCM_SYNC26IOPCM data framesynchronization signal1.8V power domainPCM_CLK27IOPCM data bit clock1.8V power domainI2C_SCL41ODI2C serial clockRequire external pull-up to 1.8VI2C_SDA42ODI2C serial dataRequire external pull-up to 1.8VClock and mode can be configured by AT command, and the default configuration is master mode usingshort frame synchronization format with 2048KHz PCM_CLK and 8KHz PCM_SYNC. Please refer todocument [2] about AT+QDAI command for details.The following figure shows a reference design of PCM interface with external codec IC.Figure 24: Reference Circuit of PCM Application with Audio Codec1. “*” means under development.2. It is recommended to reserve RC (R=22Ω, C=22pF) circuits on the PCM lines, especially forPCM_CLK.3. EC21 works as a master device pertaining to I2C interface.3.12. SD Card InterfaceEC21 supports SDIO3.0 interface for SD card.The following table shows the pin definition of SD card interface.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-49 / 105Table 15: Pin Definition of SD Card InterfacePin NamePin No.I/ODescriptionCommentSDC2_DATA328IOSD card SDIO bus DATA3SDIO signal level can beselected according to SDcard supported level, moredetails please refer to SD3.0 protocol.If unused, keep it open.SDC2_DATA229IOSD card SDIO bus DATA2SDIO signal level can beselected according to SDcard supported level, moredetails please refer to SD3.0 protocol.If unused, keep it open.SDC2_DATA130IOSD card SDIO bus DATA1SDIO signal level can beselected according to SDcard supported level, moredetails please refer to SD3.0 protocol.If unused, keep it open.SDC2_DATA031IOSD card SDIO bus DATA0SDIO signal level can beselected according to SDcard supported level, moredetails please refer to SD3.0 protocol.If unused, keep it open.SDC2_CLK32DOSD card SDIO bus clockSDIO signal level can beselected according to SDcard supported level, moredetails please refer to SD3.0 protocol.If unused, keep it open.SDC2_CMD33IOSD card SDIO bus commandSDIO signal level can beselected according to SDcard supported level, moredetails please refer to SD3.0 protocol.If unused, keep it open.VDD_SDIO34POSD card SDIO bus pull up power1.8V/2.85V configurable.Cannot be used for SDcard power. If unused,keep it open.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-50 / 105SD_INS_DET23DISD card insertion detection1.8V power domain.If unused, keep it open.The following figure shows a reference design of SD card.Figure 25: Reference Circuit of SD cardIn SD card interface design, in order to ensure good communication performance with SD card, thefollowing design principles should be complied with:The voltage range of SD card power supply VDD_3V is 2.7V~3.6V and a sufficient current up to 0.8Ashould be provided. As the maximum output current of VDD_SDIO is 50mA which can only be usedfor SDIO pull-up resistors, an externally power supply is needed for SD card.To avoid jitter of bus, resistors R7~R11 are needed to pull up the SDIO to VDD_SDIO. Value of theseresistors is among 10KΩ~100KΩ and the recommended value is 100KΩ. VDD_SDIO should be usedas the pull-up power.In order to adjust signal quality, it is recommended to add 0Ω resistors R1~R6 in series between themodule and the SD card. The bypass capacitors C1~C6 are reserved and not mounted by default. Allresistors and bypass capacitors should be placed close to the module.In order to offer good ESD protection, it is recommended to add a TVS diode on SD card pins nearthe SD card connector with junction capacitance less than 15pF.Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,etc., as well as noisy signals such as clock signals, DCDC signals, etc.It is important to route the SDIO signal traces with total grounding. The impedance of SDIO datatrace is 50Ω (±10%).Make sure the adjacent trace spacing is two times of the trace width and the load capacitance ofSDIO bus should be less than 15pF.It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mmand the total routing length less than 50mm. The total trace length inside the module is 27mm, so theexterior total trace length should be less than 23mm.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-51 / 1053.13. ADC InterfacesThe module provides two analog-to-digital converter (ADC) interfaces. AT+QADC=0 command can beused to read the voltage value on ADC0 pin. AT+QADC=1 command can be used to read the voltagevalue on ADC1 pin. For more details about these AT commands, please refer to document [2].In order to improve the accuracy of ADC, the trace of ADC should be surrounded by ground.Table 16: Pin Definition of ADC InterfacesPin NamePin No.DescriptionADC045General purpose analog to digital converterADC144General purpose analog to digital converterThe following table describes the characteristic of ADC function.Table 17: Characteristic of ADCParameterMin.Typ.Max.UnitADC0 Voltage Range0.3VBAT_BBVADC1 Voltage Range0.3VBAT_BBVADC Resolution15bits1. ADC input voltage must not exceed VBAT_BB.2. It is prohibited to supply any voltage to ADC pins when VBAT is removed.3. It is recommended to use a resistor divider circuit for ADC application.3.14. Network Status IndicationThe network indication pins can be used to drive network status indication LEDs. The module providestwo pins which are NET_MODE and NET_STATUS. The following tables describe the pin definition andlogic level changes in different network status.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-52 / 105Table 18: Pin Definition of Network Connection Status/Activity IndicatorPin NamePin No.I/ODescriptionCommentNET_MODE1)5DOIndicate the module’s network registrationstatus1.8V power domainCannot be pulled upbefore startupNET_STATUS6DOIndicate the module’s network activitystatus1.8V power domainTable 19: Working State of Network Connection Status/Activity IndicatorPin NameLogic Level ChangesNetwork StatusNET_MODEAlways HighRegistered on LTE networkAlways LowOthersNET_STATUSFlicker slowly (200ms High/1800ms Low)Network searchingFlicker slowly (1800ms High/200ms Low)IdleFlicker quickly (125ms High/125ms Low)Data transfer is ongoingAlways HighVoice callingA reference circuit is shown in the following figure.Figure 26: Reference Circuit of the Network Indicator
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-53 / 1053.15. STATUSThe STATUS pin is an open drain output for indicating the module’s operation status. Customers canconnect it to a GPIO of DTE with a pull up resistor, or as the LED indication circuit shown below. When themodule is turned on normally, the STATUS will present the low state. Otherwise, the STATUS will presenthigh-impedance state.Table 20: Pin Definition of STATUSPin NamePin No.I/ODescriptionCommentSTATUS61ODIndicate the module’s operation statusAn external pull-up resistoris required.If unused, keep it open.The following figure shows different circuit designs of STATUS, and customers can choose either oneaccording to their application demands.Figure 27: Reference Circuits of STATUS3.16. Behaviors of RIAT+QCFG="risignaltype","physical" command can be used to configure RI behavior.No matter on which port URC is presented, URC will trigger the behavior of RI pin.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-54 / 105URC can be outputted from UART port, USB AT port and USB modem port through configuration viaAT+QURCCFG command. The default port is USB AT port.In addition, RI behavior can be configured flexibly. The default behavior of the RI is shown as below.Table 21: Behavior of RIStateResponseIdleRI keeps at high levelURCRI outputs 120ms low pulse when a new URC returnsThe RI behavior can be changed by AT+QCFG="urc/ri/ring" command. Please refer to document [2] fordetails.3.17. SGMII InterfaceEC21 includes an integrated Ethernet MAC with an SGMII interface and two management interfaces, keyfeatures of the SGMII interface are shown below:IEEE802.3 complianceSupport 10M/100M/1000M Ethernet work modeSupport VLAN taggingSupport IEEE1588 and Precision Time Protocol (PTP)Can be used to connect to external Ethernet PHY like AR8033, or to an external switchManagement interfaces support dual voltage 1.8V/2.85VThe following table shows the pin definition of SGMII interface.Table 22: Pin Definition of the SGMII InterfacePin NamePin No.I/ODescriptionCommentControl Signal PartEPHY_RST_N119DOEthernet PHY reset1.8V/2.85V power domainEPHY_INT_N120DIEthernet PHY interrupt1.8V power domainNOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-55 / 105SGMII_MDATA121IOSGMII MDIO (Management DataInput/Output) data1.8V/2.85V power domainSGMII_MCLK122DOSGMII MDIO (Management DataInput/Output) clock1.8V/2.85V power domainUSIM2_VDD128POSGMII MDIO pull-up powersourceConfigurable power source.1.8V/2.85V power domain.External pull-up power source forSGMII MDIO pins.SGMII Signal PartSGMII_TX_M123AOSGMII transmission-minusConnect with a 0.1uF capacitor,close to the PHY side.SGMII_TX_P124AOSGMII transmission-plusConnect with a 0.1uF capacitor,close to the PHY side.SGMII_RX_P125AISGMII receiving-plusConnect with a 0.1uF capacitor,close to EC21 module.SGMII_RX_M126AISGMII receiving-minusConnect with a 0.1uF capacitor,close to EC21 module.The following figure shows the simplified block diagram for Ethernet application.Figure 28: Simplified Block Diagram for Ethernet Application
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-56 / 105The following figure shows a reference design of SGMII interface with PHY AR8033 application.Figure 29: Reference Circuit of SGMII Interface with PHY AR8033 ApplicationIn order to enhance the reliability and availability in customers’ applications, please follow the criteriabelow in the Ethernet PHY circuit design:Keep SGMII data and control signals away from other sensitive circuits/signals such as RF circuits,analog signals, etc., as well as noisy signals such as clock signals, DCDC signals, etc.Keep the maximum trace length less than 10-inch and keep skew on the differential pairs less than20mil.The differential impedance of SGMII data trace is 100Ω±10%, and the reference ground of the areashould be complete.Make sure the trace spacing between SGMII RX and TX is at least 3 times of the trace width, and thesame to the adjacent signal traces.Table 24: Pin Definition of USB_BOOT InterfacePin NamePin No.I/ODescriptionCommentUSB_BOOT115DIForce the module enter intoemergency download mode1.8V power domain.Active high.It is recommended toreserve test point.The following figure shows a reference circuit of USB_BOOT interface.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 3-57 / 105Figure 31: Reference Circuit of USB_BOOT Interface
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 4-58 / 1054GNSS Receiver4.1. General DescriptionEC21 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite ofQualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS).EC21 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate viaUSB interface by default.By default, EC21 GNSS engine is switched off. It has to be switched on via AT command. For more detailsabout GNSS engine technology and configurations, please refer to document [3].4.2. GNSS PerformanceThe following table shows the GNSS performance of EC21.Table 25: GNSS PerformanceParameterDescriptionConditionsTyp.UnitSensitivity(GNSS)Cold startAutonomous-146dBmReacquisitionAutonomous-157dBmTrackingAutonomous-157dBmTTFF(GNSS)Cold start@open skyAutonomous35sXTRA enabled18sWarm start@open skyAutonomous26sXTRA enabled2.2s
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 4-59 / 105Hot start@open skyAutonomous2.5sXTRA enabled1.8sAccuracy(GNSS)CEP-50Autonomous@open sky<1.5m1. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keepon positioning for 3 minutes.2. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module canfix position again within 3 minutes after loss of lock.3. Cold start sensitivity: the lowest GNSS signal value at the antenna port on which the module fixesposition within 3 minutes after executing cold start command.4.3. Layout GuidelinesThe following layout guidelines should be taken into account in customers’ designs.Maximize the distance among GNSS antenna, main antenna and the Rx-diversity antenna.Digital circuits such as (U)SIM card, USB interface, camera module and display connector should bekept away from the antennas.Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanarisolation and protection.Keep 50Ω characteristic impedance for the ANT_GNSS trace.Please refer to Chapter 5 for GNSS antenna reference design and antenna installation consideration.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-60 / 1055Antenna InterfacesEC21 antenna interfaces include a main antenna interface, an Rx-diversity antenna interface which isused to resist the fall of signals caused by high speed movement and multipath effect, and a GNSSantenna interface. The impedance of the antenna port is 50Ω.5.1. Main/Rx-diversity Antenna Interfaces5.1.1. Pin DefinitionThe pin definition of main antenna and Rx-diversity antenna interfaces is shown below.Table 26: Pin Definition of RF AntennasPin NamePin No.I/ODescriptionCommentANT_MAIN49IOMain antenna pad50Ω impedanceANT_DIV35AIReceive diversity antenna pad50Ω impedance5.1.2. Operating FrequencyTable 27: Module Operating Frequencies3GPP BandTransmitReceiveUnitGSM850824~849869~894MHzEGSM900880~915925~960MHzDCS18001710~17851805~1880MHzPCS19001850~19101930~1990MHzWCDMA B11920~19802110~2170MHzWCDMA B21850~19101930~1990MHz
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-61 / 105WCDMA B41710~17552110~2155MHzWCDMA B5824~849869~894MHzWCDMA B8880~915925~960MHzLTE FDD B11920~19802110~2170MHzLTE FDD B21850~19101930~1990MHzLTE FDD B31710~17851805~1880MHzLTE FDD B41710~17552110~2155MHzLTE FDD B5824~849869~894MHzLTE FDD B72500~25702620~2690MHzLTE FDD B8880~915925~960MHzLTE FDD B12699~716729~746MHzLTE FDD B13777~787746~756MHzLTE FDD B18815~830860~875MHzLTE FDD B19830~845875~890MHzLTE FDD B20832~862791~821MHzLTE FDD B26814~849859~894MHzLTE FDD B28703~748758~803MHzLTE TDD B402300~24002300~2400MHz5.1.3. Reference Design of RF Antenna InterfaceA reference design of ANT_MAIN and ANT_DIV antenna pads is shown as below. A π-type matchingcircuit should be reserved for better RF performance. The capacitors are not mounted by default.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-62 / 105Figure 32: Reference Circuit of RF Antenna Interface1. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve thereceiving sensitivity.2. ANT_DIV function is enabled by default.3. Place the π-type matching components (R1, C1, C2, R2, C3, C4) as close to the antenna aspossible.5.1.4. Reference Design of RF LayoutFor user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. Theimpedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant,the distance between signal layer and reference ground (H), and the clearance between RF trace andground (S). Microstrip line or coplanar waveguide line is typically used in RF layout for characteristicimpedance control. The following are reference designs of microstrip line or coplanar waveguide line withdifferent PCB structures.Figure 33: Microstrip Line Design on a 2-layer PCBNOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-63 / 105Figure 34: Coplanar Waveguide Line Design on a 2-layer PCBFigure 35: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground)Figure 36: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground)In order to ensure RF performance and reliability, the following principles should be complied with in RFlayout design:
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-64 / 105Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω.The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fullyconnected to ground.The distance between the RF pins and the RF connector should be as short as possible, and all theright angle traces should be changed to curved ones.There should be clearance area under the signal pin of the antenna connector or solder joint.The reference ground of RF traces should be complete. Meanwhile, adding some ground vias aroundRF traces and the reference ground could help to improve RF performance. The distance betweenthe ground vias and RF traces should be no less than two times the width of RF signal traces (2*W).For more details about RF layout, please refer to document [6].5.2. GNSS Antenna InterfaceThe following tables show the pin definition and frequency specification of GNSS antenna interface.Table 28: Pin Definition of GNSS Antenna InterfacePin NamePin No.I/ODescriptionCommentANT_GNSS47AIGNSS antenna50Ω impedanceTable 29: GNSS FrequencyTypeFrequencyUnitGPS/Galileo/QZSS1575.42±1.023MHzGLONASS1597.5~1605.8MHzBeiDou1561.098±2.046MHz
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-65 / 105A reference design of GNSS antenna is shown as below.Figure 37: Reference Circuit of GNSS Antenna1. An external LDO can be selected to supply power according to the active antenna requirement.2. If the module is designed with a passive antenna, then the VDD circuit is not needed.5.3. Antenna Installation5.3.1. Antenna RequirementThe following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna.Table 30: Antenna RequirementsTypeRequirementsGNSS1)Frequency range: 1561MHz~1615MHzPolarization: RHCP or linearVSWR: <2 (Typ.)Passive antenna gain: > 0dBiActive antenna noise figure: <1.5dBActive antenna gain: > 0dBiActive antenna embedded LNA gain: <17 dBGSM/WCDMA/LTEVSWR: ≤2Efficiency: > 30%NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-66 / 105Max Input Power: 50 WInput Impedance: 50ΩCable insertion loss: <1dB(GSM850, GSM900, WCDMA B5/B8,LTE-FDD B5/B8/B12/B13/B18/B19/B20/B26/B28)Cable insertion loss: <1.5dB(DCS1800, PCS1900, WCDMA B1/B2/B4, LTE B1/B2/B3/B4)Cable insertion loss <2dB(LTE-FDD B7, LTE-TDD B40)1) It is recommended to use a passive antenna when the module supports B13 or B14, becauseharmonics will be generated when using an active antenna, which will affect the GNSS performance5.3.2. Recommended RF Connector for Antenna InstallationIf RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connectorprovided by Hirose.Figure 38: Dimensions of the U.FL-R-SMT Connector (Unit: mm)NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 5-67 / 105U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT.Figure 39: Mechanicals of U.FL-LP ConnectorsThe following figure describes the space factor of mated connector.Figure 40: Space Factor of Mated Connector (Unit: mm)For more details, please visit http://www.hirose.com.
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-68 / 1056Electrical, Reliability and RadioCharacteristics6.1. Absolute Maximum RatingsAbsolute maximum ratings for power supply and voltage on digital and analog pins of the module arelisted in the following table.Table 31: Absolute Maximum RatingsParameterMin.Max.UnitVBAT_RF/VBAT_BB-0.34.7VUSB_VBUS-0.35.5VPeak Current of VBAT_BB00.8APeak Current of VBAT_RF01.8AVoltage at Digital Pins-0.32.3VVoltage at ADC00VBAT_BBVVoltage at ADC10VBAT_BBV
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-69 / 1056.2. Power Supply RatingsTable 32: Power Supply RatingsParameterDescriptionConditionsMin.Typ.Max.UnitVBATVBAT_BB andVBAT_RFThe actual input voltagesmust stay between theminimum and maximumvalues.3.33.84.3VVoltage drop duringburst transmissionMaximum power controllevel on GSM900400mVIVBATPeak supply current(during transmissionslot)Maximum power controllevel on GSM9001.82.0AUSB_VBUSUSB detection3.05.05.25V6.3. Operation and Storage TemperaturesThe operation and storage temperatures are listed in the following table.Table 33: Operation and Storage TemperaturesParameterMin.Typ.Max.UnitOperation Temperature Range1)-35+25+75ºCExtended Temperature Range2)-40+85ºCStorage Temperature Range-40+90ºC1. 1) Within operation temperature range, the module is 3GPP compliant.2. 2) Within extended temperature range, the module remains the ability to establish and maintain avoice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. Thereare also no effects on radio spectrum and no harm to radio network. Only one or more parameterslike Pout might reduce in their value and exceed the specified tolerances. When the temperaturereturns to the normal operating temperature levels, the module will meet 3GPP specifications again.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-70 / 1056.4. Current ConsumptionThe values of current consumption are shown below.Table 34: EC21-E Current ConsumptionParameterDescriptionConditionsTyp.UnitIVBATOFF statePower down13uASleep stateAT+CFUN=0 (USB disconnected)1.4mAGSM900 @DRX=9 (USB disconnected)1.8mADCS1800 @DRX=9 (USB disconnected)1.8mAWCDMA PF=64 (USB disconnected)2.4mAWCDMA PF=128 (USB disconnected)1.9mAFDD-LTE PF=64 (USB disconnected)3.2mAFDD-LTE PF=128 (USB disconnected)2.1mAIdle state(GNSS OFF)GSM900 @DRX=5 (USB disconnected)22.0mAGSM900 @DRX=5 (USB connected)32.0mAWCDMA PF=64 (USB disconnected)22.5mAWCDMA PF=64 (USB connected)32.7mALTE-FDD PF=64 (USB disconnected)22.5mALTE-FDD PF=64 (USB connected)32.5mAGPRS data transfer(GNSS OFF)GSM900 4DL/1UL @32.3dBm220mAGSM900 3DL/2UL @32.18dBm387mAGSM900 2DL/3UL @30.3dBm467mAGSM900 1DL/4UL @29.4dBm555mADCS1800 4DL/1UL @29.6dBm185mADCS1800 3DL/2UL @29.1dBm305mA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-71 / 105DCS1800 2DL/3UL @28.8dBm431mADCS1800 1DL/4UL @29.1dBm540mAEDGE data transfer(GNSS OFF)GSM900 4DL/1UL @26dBm148mAGSM900 3DL/2UL @26dBm245mAGSM900 2DL/3UL @25dBm338mAGSM900 1DL/4UL @25dBm432mADCS1800 4DL/1UL @26dBm150mADCS1800 3DL/2UL @25dBm243mADCS1800 2DL/3UL @25dBm337mADCS1800 1DL/4UL @25dBm430mAWCDMA data transfer(GNSS OFF)WCDMA B1 HSDPA @22.5dBm659mAWCDMA B1 HSUPA @21.11dBm545mAWCDMA B5 HSDPA @23.5dBm767mAWCDMA B5 HSUPA @21.4dBm537mAWCDMA B8 HSDPA @22.41dBm543mAWCDMA B8 HSUPA @21.2dBm445mALTE data transfer(GNSS OFF)LTE-FDD B1 @23.45dBm807mALTE-FDD B3 @23.4dBm825mALTE-FDD B5 @23.4dBm786mALTE-FDD B7 @23.86dBm887mALTE-FDD B8 @23.5dBm675mALTE-FDD B20 @23.57dBm770mAGSM voice callGSM900 PCL=5 @32.8dBm336mAPCS1800 PCL=0 @29.3dBm291mAWCDMA voice callWCDMA B1 @23.69dBm683mA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-72 / 105WCDMA B5 @23.61dBm741mAWCDMA B8 @23.35dBm564mATable 35: EC21-A Current ConsumptionParameterDescriptionConditionsTyp.UnitIVBATOFF statePower down10uASleep stateAT+CFUN=0 (USB disconnected)1.25mAWCDMA PF=64 (USB disconnected)2.03mAWCDMA PF=128 (USB disconnected)1.65mALTE-FDD PF=64 (USB disconnected)2.31mALTE-FDD PF=128 (USB disconnected)1.85mAIdle state(GNSS OFF)WCDMA PF=64 (USB disconnected)23.1mAWCDMA PF=64 (USB connected)32.8mALTE-FDD PF=64 (USB disconnected)22.8mALTE-FDD PF=64 (USB connected)32.8mAWCDMA data transfer(GNSS OFF)WCDMA B2 HSDPA @21.54dBm479.0mAWCDMA B2 HSUPA @22.19dBm530.0mAWCDMA B4 HSDPA @22.15dBm539.0mAWCDMA B4 HSUPA @21.82dBm531.0mAWCDMA B5 HSDPA @22.22dBm454.0mAWCDMA B5 HSUPA @21.45dBm433.0mALTE data transfer(GNSS OFF)LTE-FDD B2 @23.11dBm721.0mALTE-FDD B4 @23.16dBm748.0mALTE-FDD B12 @23.25dBm668.0mAWCDMA voice callWCDMA B2 @22.97dBm565.0mA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-73 / 105Table 36: EC21-V Current ConsumptionTable 37: EC21-AUT Current ConsumptionWCDMA B4 @22.91dBm590.0mAWCDMA B5 @23.06dBm493.0mAParameterDescriptionConditionsTyp.UnitIVBATOFF statePower down10uASleep stateAT+CFUN=0 (USB disconnected)1.07mALTE-FDD PF=64 (USB disconnected)2.85mALTE-FDD PF=128 (USB disconnected)2.26mAIdle state(GNSS OFF)LTE-FDD PF=64 (USB disconnected)22.0mALTE-FDD PF=64 (USB connected)32.0mALTE data transfer(GNSS OFF)LTE-FDD B4 @22.77dBm762.0mALTE-FDD B13 @23.05dBm533.0mAParameterDescriptionConditionsTyp.UnitIVBATOFF statePower down10uASleep stateAT+CFUN=0 (USB disconnected)0.99mAWCDMA PF=64 (USB disconnected)2.1mAWCDMA PF=128 (USB disconnected)1.7mALTE-FDD PF=64 (USB disconnected)2.9mALTE-FDD PF=128 (USB disconnected)2.4mAIdle stateWCDMA PF=64 (USB disconnected)22.0mAWCDMA PF=64 (USB connected)32.0mALTE-FDD PF=64 (USB disconnected)23.6mALTE-FDD PF=64 (USB connected)33.6mA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-74 / 105Table 38: EC21-AUV Current ConsumptionWCDMA data(GNSS OFF)WCDMA B1 HSDPA @22.59dBm589.0mAWCDMA B1 HSUPA @22.29dBm623.0mAWCDMA B5 HSDPA @22.22dBm511.0mAWCDMA B5 HSUPA @21.64dBm503.0mALTE datatransfer(GNSS OFF)LTE-FDD B1 @23.38dBm813.0mALTE-FDD B3 @22.87dBm840.0mALTE-FDD B5 @23.12dBm613.0mALTE-FDD B7 @22.96dBm761.0mALTE-FDD B28 @23.31dBm650.0mAWCDMA voicecallWCDMA B1 @24.21dBm687.0mAWCDMA B5 @23.18dBm535.0mAParameterDescriptionConditionsTyp.UnitIVBATOFF statePower down10uASleep stateAT+CFUN=0 (USB disconnected)1.15mAWCDMA PF=64 (USB disconnected)2.06mAWCDMA PF=128 (USB disconnected)1.65mALTE-FDD PF=64 (USB disconnected)2.46mALTE-FDD PF=128 (USB disconnected)1.86mAIdle state(GNSS OFF)WCDMA PF=64 (USB disconnected)22.0mAWCDMA PF=64 (USB connected)32.0mALTE-FDD PF=64 (USB disconnected)23.5mALTE-FDD PF=64 (USB connected)33.5mAWCDMA datatransfer (GNSSOFF)WCDMA B1 HSDPA @22.59dBm623.0mAWCDMA B1 HSUPA @22.47dBm628.0mAWCDMA B5 HSDPA @22.95dBm605.0mA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-75 / 105Table 39: EC21-J Current ConsumptionWCDMA B5 HSUPA @22.87dBm610.0mAWCDMA B8 HSDPA @22.37dBm549.0mAWCDMA B8 HSUPA @22.09dBm564.0mALTE data transfer(GNSS OFF)LTE-FDD B1 @23.28dBm789.0mALTE-FDD B3 @23.2dBm768.0mALTE-FDD B5 @23.05dBm669.0mALTE-FDD B8 @23.21dBm693.0mALTE-FDD B28 @22.9dBm795.0mAWCDMA voice callWCDMA B1 @23.43dBm672.0mAWCDMA B5 @23.32dBm616.0mAWCDMA B8 @23.31dBm592.0mAParameterDescriptionConditionsTyp.UnitIVBATOFF statePower down10uASleep stateAT+CFUN=0 (USB disconnected)0.85mALTE-FDD PF=64 (USB disconnected)2.20mALTE-FDD PF=128 (USB disconnected)1.46mAIdle state(GNSS OFF)LTE-FDD PF=64 (USB disconnected)23.5mALTE-FDD PF=64 (USB connected)33.8mALTE data transfer(GNSS OFF)LTE-FDD B1 @23.35dBm734.0mALTE-FDD B3 @22.95dBm778.0mALTE-FDD B8 @22.81dBm722.0mALTE-FDD B18 @23.15dBm677.0mALTE-FDD B19 @23.17dBm688.0mALTE-FDD B26 @23.37dBm723.0mA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-76 / 105Table 40: EC21-KL Current ConsumptionTable 41: GNSS Current Consumption of EC21 Series Module6.5. RF Output PowerThe following table shows the RF output power of EC21 module.ParameterDescriptionConditionsTyp.UnitIVBATOFF statePower down10uASleep stateAT+CFUN=0 (USB disconnected)1.08mALTE-FDD PF=64 (USB disconnected)2.1mALTE-FDD PF=128 (USB disconnected)1.4mAIdle state(GNSS OFF)LTE-FDD PF=64 (USB disconnected)24.8mALTE-FDD PF=64 (USB connected)33.5mALTE data transfer(GNSS OFF)LTE-FDD B1 @23.0dBm771.0mALTE-FDD B3 @23.36dBm780.0mALTE-FDD B5 @23.56dBm628.0mALTE-FDD B7 @23.32dBm754.0mALTE-FDD B8 @23.33dBm680.0mAParameterDescriptionConditionsTyp.UnitIVBAT(GNSS)Searching(AT+CFUN=0)Cold start @Passive Antenna58mALost state @Passive Antenna58mATracking(AT+CFUN=0)Instrument Environment33mAOpen Sky @Passive Antenna35mAOpen Sky @Active Antenna43mA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-77 / 105Table 42: RF Output PowerFrequencyMax.Min.GSM850/GSM90033dBm±2dB5dBm±5dBDCS1800/PCS190030dBm±2dB0dBm±5dBGSM850/GSM900 (8-PSK)27dBm±3dB5dBm±5dBDCS1800/PCS1900 (8-PSK)26dBm±3dB0dBm±5dBWCDMA bands24dBm+1/-3dB<-49dBmLTE-FDD bands23dBm±2dB<-39dBmLTE-TDD bands23dBm±2dB<-39dBmIn GPRS 4 slots TX mode, the maximum output power is reduced by 3.0dB. The design conforms to theGSM specification as described in Chapter 13.16 of 3GPP TS 51.010-1.6.6. RF Receiving SensitivityThe following tables show the conducted RF receiving sensitivity of EC21 series module.Table 43: EC21-E Conducted RF Receiving SensitivityFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)GSM900-109.0dBm//-102.0dBmDCS1800-109.0dBm//-102.0dbmWCDMA Band 1-110.5dBm//-106.7dBmWCDMA Band 5-110.5dBm//-104.7dBmWCDMA Band 8-110.5dBm//-103.7dBmLTE-FDD B1 (10M)-98.0dBm-98.0dBm-101.5dBm-96.3dBmLTE-FDD B3 (10M)-96.5dBm-98.5dBm-101.5dBm-93.3dBmNOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-78 / 105LTE-FDD B5 (10M)-98.0dBm-98.5dBm-101.0dBm-94.3dBmLTE-FDD B7 (10M)-97.0dBm-94.5dBm-99.5dBm-94.3dBmLTE-FDD B8 (10M)-97.0dBm-97.0dBm-101.0dBm-93.3dBmLTE-FDD B20 (10M)-97.5dBm-99.0dBm-102.5dBm-93.3dBmTable 44: EC21-A Conducted RF Receiving SensitivityFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)WCDMA B2-110.0dBm//-104.7dBmWCDMA B4-110.0dBm//-106.7dBmWCDMA B5-110.5dBm//-104.7dBmLTE-FDD B2 (10M)-98.0dBm-98.0dBm-101.0dBm-94.3dBmLTE-FDD B4 (10M)-97.5dBm-99.0dBm-101.0dBm-96.3dBmLTE-FDD B12 (10M)-96.5dBm-98.0dBm-101.0dBm-93.3dBmTable 45: EC21-V Conducted RF Receiving SensitivityFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)LTE-FDD B4 (10M)-97.5dBm-99.0dBm-101.0dBm-96.3dBmLTE-FDD B13 (10M)-95.0dBm-97.0dBm-100.0dBm-93.3dBmTable 46: EC21-AUT Conducted RF Receiving SensitivityFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)WCDMA B1-110.0dBm//-106.7dBmWCDMA B5-110.5dBm//-104.7dBmLTE-FDD B1 (10M)-98.5dBm-98.0dBm-101.0dBm-96.3dBmLTE-FDD B3 (10M)-98.0dBm-96.0dBm-100.0dBm-93.3dBm
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-79 / 105LTE-FDD B5 (10M)-98.0dBm-99.0dBm-102.5dBm-94.3dBmLTE-FDD B7 (10M)-97.0dBm-95.0dBm-98.5dBm-94.3dBmLTE-FDD B28 (10M)-97.0dBm-99.0dBm-102.0dBm-94.8dBmTable 47: EC21-KL Conducted RF Receiving SensitivityFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)LTE-FDD B1 (10M)-98.0dBm-99.5dBm-100.5dBm-96.3dBmLTE-FDD B3 (10M)-97.0dBm-97.5dBm-99.5dBm-93.3dBmLTE-FDD B5 (10M)-98.0dBm-99.5dBm-100.5dBm-94.3dBmLTE-FDD B7 (10M)-96.0dBm-96.0dBm-98.5dBm-94.3dBmLTE-FDD B8 (10M)-97.0dBm-99.0dBm-101.0dBm-93.3dBmTable 48: EC21-J Conducted RF Receiving SensitivityTable 49: EC21-AUV Conducted RF Receiving SensitivityFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)LTE-FDD B1 (10M)-97.5dBm-98.7dBm-100.2dBm-96.3dBmLTE-FDD B3 (10M)-96.5dBm-97.1dBm-100.5dBm-93.3dBmLTE-FDD B8 (10M)-98.4dBm-99.0dBm-101.2dBm-93.3dBmLTE-FDD B18 (10M)-99.5dBm-99.0dBm-101.7dBm-96.3dBmLTE-FDD B19 (10M)-99.2dBm-99.0dBm-101.4dBm-96.3dBmLTE-FDD B26 (10M)-99.5dBm-99.0dBm-101.5dBm-93.8dBmFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)WCDMA B1-109.5dBm//-106.7dBmWCDMA B5-111.0dBm//-104.7dBm
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-80 / 105Table 50: EC21-AU Conducted RF Receiving SensitivityWCDMA B8-111.0dBm//-103.7dBmLTE-FDD B1 (10M)-97.7dBm-97.5dBm-101.3dBm-96.3dBmLTE-FDD B3 (10M)-98.2dBm-98.6dBm-102.7dBm-93.3dBmLTE-FDD B5 (10M)-98.7dBm-98.2dBm-102.5dBm-94.3dBmLTE-FDD B8 (10M)-98.2dBm-98.2dBm-102.3dBm-93.3dBmLTE-FDD B28 (10M)-98.0dBm-98.7dBm-102.1dBm-94.8dBmFrequencyPrimaryDiversitySIMO1)3GPP (SIMO)GSM850-109.0dBm//-102.0dBmGSM900-109.0dBm//-102.0dBmDCS1800-109.0dBm//-102.0dBmPCS1900-109.0dBm//-102.0dBmWCDMA B1-110.0dBm//-106.7dBmWCDMA B2-110.0dBm//-104.7dBmWCDMA B5-111.0dBm//-104.7dBmWCDMA B8-111.0dBm//-103.7dBmLTE-FDD B1 (10M)-97.2dBm-97.5dBm-100.2dBm-96.3dBmLTE-FDD B2 (10M)-98.2dBm//-94.3dBmLTE-FDD B3 (10M)-98.7dBm-98.6dBm-102.2dBm-93.3dBmLTE-FDD B4 (10M)-97.7dBm-97.4dBm-100.2dBm-96.3dBmLTE-FDD B5 (10M)-98.0dBm-98.2dBm-101.0dBm-94.3dBmLTE-FDD B7 (10M)-97.7dBm-97.7dBm-101.2dBm-94.3dBmLTE-FDD B8 (10M)-99.2dBm-98.2dBm-102.2dBm-93.3dBmLTE-FDD B28 (10M)-98.6dBm-98.7dBm-102.0dBm-94.8dBm
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-81 / 1051) SIMO is a smart antenna technology that uses a single antenna at the transmitter side and twoantennas at the receiver side, which can improve RX performance.6.7. Electrostatic DischargeThe module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subjectto ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling andpackaging procedures must be applied throughout the processing, handling and operation of anyapplication that incorporates the module.The following table shows the module’s electrostatic discharge characteristics.Table 51: Electrostatic Discharge CharacteristicsTested PointsContact DischargeAir DischargeUnitVBAT, GND±5±10kVAll Antenna Interfaces±4±8kVOther Interfaces±0.5±1kV6.8. Thermal ConsiderationIn order to achieve better performance of the module, it is recommended to comply with the followingprinciples for thermal consideration:On customers’ PCB design, please keep placement of the module away from heating sources,especially high power components such as ARM processor, audio power amplifier, power supply, etc.Do not place components on the opposite side of the PCB area where the module is mounted, inorder to facilitate adding of heatsink when necessary.Do not apply solder mask on the opposite side of the PCB area where the module is mounted, so asto ensure better heat dissipation performance.The reference ground of the area where the module is mounted should be complete, and add groundvias as many as possible for better heat dissipation.LTE-TDD B40 (10M)-97.2dBm-98.4dBm-101.2dBm-96.3dBmNOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-82 / 105Make sure the ground pads of the module and PCB are fully connected.According to customers’ application demands, the heatsink can be mounted on the top of the module,or the opposite side of the PCB area where the module is mounted, or both of them.The heatsink should be designed with as many fins as possible to increase heat dissipation area.Meanwhile, a thermal pad with high thermal conductivity should be used between the heatsink andmodule/PCB.The following shows two kinds of heatsink designs for reference and customers can choose one or bothof them according to their application structure.Figure 41: Referenced Heatsink Design (Heatsink at the Top of the Module)Figure 42: Referenced Heatsink Design (Heatsink at the Bottom of Customers’ PCB)
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 6-83 / 105The module offers the best performance when the internal BB chip stays below 105°C. When themaximum temperature of the BB chip reaches or exceeds 105°C, the module works normal but providesreduced performance (such as RF output power, data rate, etc.). When the maximum BB chiptemperature reaches or exceeds 115°C, the module will disconnect from the network, and it will recover tonetwork connected state after the maximum temperature falls below 115°C. Therefore, the thermal designshould be maximally optimized to make sure the maximum BB chip temperature always maintains below105°C. Customers can execute AT+QTEMP command and get the maximum BB chip temperature fromthe first returned value.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 7-84 / 1057Mechanical DimensionsThis chapter describes the mechanical dimensions of the module. All dimensions are measured in mm.The tolerances for dimensions without tolerance values are ±0.05mm.7.1. Mechanical Dimensions of the Module32.0±0.1529.0±0.150.82.4±0.2Figure 43: Module Top and Side Dimensions
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 7-85 / 105Figure 44: Module Bottom Dimensions (Bottom View)
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 7-86 / 1057.2. Recommended FootprintFigure 45: Recommended Footprint (Top View)1. The keep out area should not be designed.2. For easy maintenance of the module, please keep about 3mm between the module and othercomponents in the host PCB.NOTES
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 7-87 / 1057.3. Design Effect Drawings of the ModuleFigure 46: Top View of the ModuleFigure 47: Bottom View of the ModuleThese are design effect drawings of EC21 module. For more accurate pictures, please refer to themodule that you get from Quectel.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 8-88 / 1058Storage, Manufacturing andPackaging8.1. StorageEC21 is stored in a vacuum-sealed bag. The storage restrictions are shown as below.1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH.2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or otherhigh temperature processes must be:Mounted within 168 hours at the factory environment of ≤30ºC/60%RHStored at <10%RH3. Devices require baking before mounting, if any circumstances below occurs:When the ambient temperature is 23ºC±5ºC and the humidity indicator card shows the humidityis >10% before opening the vacuum-sealed bag.Device mounting cannot be finished within 168 hours at factory conditions of ≤30ºC/60%RH.4. If baking is required, devices may be baked for 8 hours at 120ºC±5ºC.As the plastic package cannot be subjected to high temperature, it should be removed from devicesbefore high temperature (120ºC) baking. If shorter baking time is desired, please refer toIPC/JEDECJ-STD-033 for baking procedure.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 8-89 / 1058.2. Manufacturing and SolderingPush the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill thestencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properlyso as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, thethickness of stencil for the module is recommended to be 0.20mm. For more details, please refer todocument [4].It is suggested that the peak reflow temperature is 235ºC~245ºC (for SnAg3.0Cu0.5 alloy). The absolutemaximum reflow temperature is 260ºC. To avoid damage to the module caused by repeated heating, it issuggested that the module should be mounted after reflow soldering for the other side of PCB has beencompleted. Recommended reflow soldering thermal profile is shown below:Figure 48: Reflow Soldering Thermal ProfileDuring manufacturing and soldering, or any other processes that may contact the module directly, NEVERwipe the module label with organic solvents, such as acetone, ethyl alcohol, isopropyl alcohol,trichloroethylene, etc.NOTE
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 8-90 / 1058.3. PackagingEC21 is packaged in tape and reel carriers. One reel is 11.88m long and contains 250pcs modules. Thefigure below shows the packaging details, measured in mm.30.3± 0.1529.3± 0.1530.3± 0.1532.5± 0.1533.5± 0.150.35± 0.054.2± 0.153.1± 0.1532.5± 0.1533.5± 0.154.00± 0.12.00± 0.11.75± 0.120.20± 0.1544.00± 0.344.00± 0.11.50±0.1Direction of feedCover tape1310044.5+0.20-0.0048.5Figure 49: Tape and Reel Specifications
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 9-91 / 1059Appendix A ReferencesTable 52: Related DocumentsSNDocument NameRemark[1]Quectel_EC2x&EG9x&EM05_Power_Management_Application_NotePower management application noteforEC25, EC21, EC20 R2.0, EC20 R2.1,EG95, EG91 and EM05 modules[2]Quectel_EC25&EC21_AT_Commands_ManualEC25 and EC21 AT commands manual[3]Quectel_EC25&EC21_GNSS_AT_Commands_ManualEC25 and EC21 GNSS AT commandsmanual[4]Quectel_Module_Secondary_SMT_User_GuideModule secondary SMT user guide[5]Quectel_EC21_Reference_DesignEC21 reference design[6]Quectel_RF_Layout_Application_NoteRF layout application noteTable 53: Terms and AbbreviationsAbbreviationDescriptionAMRAdaptive Multi-ratebpsBits Per SecondCHAPChallenge Handshake Authentication ProtocolCSCoding SchemeCSDCircuit Switched DataCTSClear To SendDC-HSPA+Dual-carrier High Speed Packet AccessDFOTADelta Firmware Upgrade Over The AirDLDownlink
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 9-92 / 105DTRData Terminal ReadyDTXDiscontinuous TransmissionEFREnhanced Full RateESDElectrostatic DischargeFDDFrequency Division DuplexFRFull RateGLONASSGLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian GlobalNavigation Satellite SystemGMSKGaussian Minimum Shift KeyingGNSSGlobal Navigation Satellite SystemGPSGlobal Positioning SystemGSMGlobal System for Mobile CommunicationsHRHalf RateHSPAHigh Speed Packet AccessHSDPAHigh Speed Downlink Packet AccessHSUPAHigh Speed Uplink Packet AccessI/OInput/OutputInormNormal CurrentLEDLight Emitting DiodeLNALow Noise AmplifierLTELong Term EvolutionMIMOMultiple Input Multiple OutputMOMobile OriginatedMSMobile Station (GSM engine)MTMobile TerminatedPAPPassword Authentication Protocol
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 9-93 / 105PCBPrinted Circuit BoardPDUProtocol Data UnitPPPPoint-to-Point ProtocolQAMQuadrature Amplitude ModulationQPSKQuadrature Phase Shift KeyingRFRadio FrequencyRHCPRight Hand Circularly PolarizedRxReceiveSGMIISerial Gigabit Media Independent InterfaceSIMSubscriber Identification ModuleSIMOSingle Input Multiple OutputSMSShort Message ServiceTDDTime Division DuplexingTDMATime Division Multiple AccessTD-SCDMATime Division-Synchronous Code Division Multiple AccessTXTransmitting DirectionULUplinkUMTSUniversal Mobile Telecommunications SystemURCUnsolicited Result CodeUSIMUniversal Subscriber Identity ModuleVmaxMaximum Voltage ValueVnormNormal Voltage ValueVminMinimum Voltage ValueVIHmaxMaximum Input High Level Voltage ValueVIHminMinimum Input High Level Voltage Value
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 9-94 / 105VILmaxMaximum Input Low Level Voltage ValueVILminMinimum Input Low Level Voltage ValueVImaxAbsolute Maximum Input Voltage ValueVIminAbsolute Minimum Input Voltage ValueVOHmaxMaximum Output High Level Voltage ValueVOHminMinimum Output High Level Voltage ValueVOLmaxMaximum Output Low Level Voltage ValueVOLminMinimum Output Low Level Voltage ValueVSWRVoltage Standing Wave RatioWCDMAWideband Code Division Multiple Access
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 10-95 / 10510 Appendix B GPRS Coding SchemesTable 54: Description of Different Coding SchemesSchemeCS-1CS-2CS-3CS-4Code Rate1/22/33/41USF3333Pre-coded USF36612Radio Block excl. USF and BCS181268312428BCS40161616Tail444-Coded Bits456588676456Punctured Bits0132220-Data Rate Kb/s9.0513.415.621.4
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 11-96 / 10511 Appendix C GPRS Multi-slot ClassesTwenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slotclasses are product dependent, and determine the maximum achievable data rates in both the uplink anddownlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots,while the second number indicates the amount of uplink timeslots. The active slots determine the totalnumber of slots the GPRS device can use simultaneously for both uplink and downlink communications.The description of different multi-slot classes is shown in the following table.Table 55: GPRS Multi-slot ClassesMultislot ClassDownlink SlotsUplink SlotsActive Slots1112221332234314522463247334841593251042511435124451333NA1444NA
LTE Module SeriesEC21 Hardware DesignEC21_Hardware_Design 11-97 / 1051555NA1666NA1777NA1888NA1962NA2063NA2164NA2264NA2366NA2482NA2583NA2684NA2784NA2886NA2988NA30516315263253633546
LTE Module SiresEC21 Hardware DesignEC21_Hardware_Design 12-98 / 10512 Appendix D EDGE Modulation andCoding SchemesTable 56: EDGE Modulation and Coding SchemesCoding SchemeModulationCoding Family1 Timeslot2 Timeslot4 TimeslotCS-1:GMSK/9.05kbps18.1kbps36.2kbpsCS-2:GMSK/13.4kbps26.8kbps53.6kbpsCS-3:GMSK/15.6kbps31.2kbps62.4kbpsCS-4:GMSK/21.4kbps42.8kbps85.6kbpsMCS-1GMSKC8.80kbps17.60kbps35.20kbpsMCS-2GMSKB11.2kbps22.4kbps44.8kbpsMCS-3GMSKA14.8kbps29.6kbps59.2kbpsMCS-4GMSKC17.6kbps35.2kbps70.4kbpsMCS-58-PSKB22.4kbps44.8kbps89.6kbpsMCS-68-PSKA29.6kbps59.2kbps118.4kbpsMCS-78-PSKB44.8kbps89.6kbps179.2kbpsMCS-88-PSKA54.4kbps108.8kbps217.6kbpsMCS-98-PSKA59.2kbps118.4kbps236.8kbps
FCC Certification Requirements.According to the definition of mobile and fixed device is described in Part 2.1091(b), thisdevice is a mobile device.And the following conditions must be met:1. This Modular Approval is limited to OEM installation for mobile and fixed applicationsonly. The antenna installation and operating configurations of this transmitter, includingany applicable source-based time- averaging duty factor, antenna gain and cable lossmust satisfy MPE categorical Exclusion Requirements of 2.1091.2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT andthe user’s body and must not transmit simultaneously with any other antenna ortransmitter.3.A label with the following statements must be attached to the host end product: Thisdevice contains FCC ID: XMR201606EC21A.4.To comply with FCC regulations limiting both maximum RF output power and humanexposure to RF radiation, maximum antenna gain (including cable loss) must notexceed:❒GSM/850/GSM1900/ WCDMA B2/B5/LTE B2/B4/B5/B7: <4dBi5. This module must not transmit simultaneously with any other antenna ortransmitter6. The host end product must include a user manual that clearly defines operatingrequirements and conditions that must be observed to ensure compliance with currentFCC RF exposure guidelines.For portable devices, in addition to the conditions 3 through 6 described above, aseparate approval is required to satisfy the SAR requirements of FCC Part 2.1093
If the device is used for other equipment that separate approval is required for all otheroperating configurations, including portable configurations with respect to 2.1093 anddifferent antenna configurations.For this device, OEM integrators must be provided with labeling instructions of finishedproducts. Please refer to KDB784748 D01 v07, section 8. Page 6/7 last twoparagraphs:A certified modular has the option to use a permanently affixed label, or an electroniclabel. For a permanently affixed label, the module must be labelled withan FCC ID -Section 2.926 (see 2.2 Certification (labelling requirements) above). The OEM manualmust provide clear instructions explaining to the OEM the labellingrequirements,options and OEM user manual instructions that are required (see nextparagraph).For a host using a certified modular with a standard fixed label, if (1) the module’s FCCID is notvisible when installed in the host, or (2) if the host is marketed so that end usersdo not havestraightforward commonly used methods for access to remove the moduleso that the FCC ID ofthe module is visible; then an additional permanent label referringto the enclosed module:“Contains Transmitter Module FCC ID:XMR201606EC21A” or“Contains FCC ID: XMR201606EC21A” mustbe used. The host OEM user manual mustalso contain clear instructions on how end users can find and/or access the module andthe FCC ID.The final host / module combination may also need to be evaluated against the FCCPart 15B criteria for unintentional radiators in order to be properly authorized foroperation as a Part 15 digital device.The user’s manual or instruction manual for an intentional or unintentional radiator shallcaution the user that changes or modifications not expressly approved by the partyresponsible for compliance could void the user's authority to operate the equipment. Incases where the manual is provided only in a form other than paper, such as on a
computer disk or over the Internet, the information required by this section may beincluded in the manual in that alternative form, provided the user can reasonably beexpected to have the capability to access information in that form.This device complies with part 15 of the FCC Rules. Operation is subject to thefollowing two conditions: (1) This device may not cause harmful interference, and (2)this device must accept any interference received, including interference that maycause undesired operation.Changes or modifications not expressly approved by the manufacturer could void theuser’s authority to operate the equipment.To ensure compliance with all non-transmitter functions the host manufacturer isresponsible for ensuring compliance with the module(s) installed and fully operational. Forexample, if a host was previously authorized as an unintentional radiator under theDeclaration of Conformity procedure without a transmitter certified module and a moduleis added, the host manufacturer is responsible for ensuring that the after the module isinstalled and operational the host continues to be compliant with the Part 15Bunintentional radiator requirements.

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