Sierra Wireless Q26EX Q26 Extreme wireless CPU User Manual
Sierra Wireless, Inc. Q26 Extreme wireless CPU
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![WM_DEV_Q26EX_PTS_002 Rev 006 Page 13 of 112 Product Technical Specification and Customer Design Guidelines This document presents and defines the Q26 Extreme Wireless CPU®. The Q26 Extreme Wireless CPU® is a multi-mode EDGE 2G / WCDMA 3G / HSxPA (High Speed Downlink & High Speed Uplink Packet Access) solution with dual antenna receive diversity, footprint compatible with other Wireless CPU® Q26 devices. The Q26 Extreme Wireless CPU® supports a powerful open software platform (Open AT®). Open AT® is the world’s most comprehensive cellular development environment, which allows embedded standard ANSI C applications to be natively executed directly on the Wireless CPU®. This Product Specification document covers the Wireless CPU® alone and does not include the programmable capabilities provided via the use of Open AT® Software Suites. For more details, several reference documents may be consulted. The Wavecom reference documents are provided in the Wavecom document package, contrary to the general reference documents which are not authored by Wavecom. Please check the web site for the latest documentation available. First Software version available for Q26 Extreme Wireless CPU® is Open AT® Software Suite v2.30. [1] Getting Started with Open AT® [2] Basic Development Guide for Open AT® [3] ADL User Guide for Open AT® [4] Open AT® Release Note [5] Open AT® Firmware v7.4 AT Commands Manual (Ref: WM_DEV_OAT_UGD_079-010) [6] Open AT® Firmware Release Note](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-13.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 14 of 112 Product Technical Specification and Customer Design Guidelines [7] “I²C Bus Specification and user guide”, Version 3.0, NXP 2007 [8] ISO 7816-3 Standard Table 1. Abbreviations Abbreviation Definition AC Alternating Current ADC Analog to Digital Converter A/D Analog to Digital conversion AF Audio-Frequency AT ATtention (prefix for modem commands) AUX AUXiliary CAN Controller Area Network CB Cell Broadcast CEP Circular Error Probable CLK CLocK CMOS Complementary Metal Oxide Semiconductor CS Coding Scheme CTS Clear To Send DAC Digital to Analog Converter dB Decibel DC Direct Current DCD Data Carrier Detect DCE Data Communication Equipment DCS Digital Cellular System DR Dynamic Range DSR Data Set Ready DTE Data Terminal Equipment DTR Data Terminal Ready EDGE Enhanced Data rates for GSM Evolution EFR Enhanced Full Rate EGPRS Enhanced General Packet Radio Service E-GSM Extended GSM EMC ElectroMagnetic Compatibility EMI ElectroMagnetic Interference EMS Enhanced Message Service EN ENable ESD ElectroStatic Discharges FIFO First In First Out](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-14.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 25 of 112 Product Technical Specification and Customer Design Guidelines PFM (Power Frequency Modulation) or PSM (Phase Shift Modulation) system must be avoided. to the capacity to deliver high current peaks in a short time (burst radio emission). that the VBATT line supports peak currents with an acceptable voltage drop which guarantees a VBATT minimal value of 3.4V. For PCB design constraints related to power supply tracks, ground planes and shielding, refer to the Design Guidelines section. Decoupling capacitors on VBATT lines are embedded in the Wireless CPU. Hence, it should not be necessary to add decoupling capacitors close to the Wireless CPU. However, in case of EMI/RFI problem, VBATT signal may require some EMI/RFI decoupling: parallel 33 pF capacitor close to the Wireless CPU or a serial ferrite bead (or both to get better results). Low frequency decoupling capacitors (22µF to 100µF) may be used to reduce the TDMA noise (217Hz). Caution: When ferrite beads are used, the recommendation given for the power supply connection must be followed with care (as high current capacity and low impedance). Power consumption is dependent on the configuration used. It is for this reason that the following consumption values are given for each mode, RF band and type of software used (AT or Open AT®). All the following information is given assuming a 50 ohms RF output. The following consumption values were obtained by performing measurements on the Wireless CPU® samples at a temperature of 25° C. Three VBATT values are used to measure the consumption, VBATTmin (3.4V), VBATTmax (4.2V) and VBATTtyp (3.8V). The average current is given for the three VBATT values and the peak current given is the maximum current peak measured with the three VBATT voltages. For a more detailed description of the operating modes, see the appendix of the AT Command User Guide [5]. First let’s define start-up current in view to avoid start issues. The following measurement results are relevant when there is no Open AT® application. For explanation of power consumption mode, please Open AT® feature navigator document available on Wavecom website.](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-25.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 37 of 112 Product Technical Specification and Customer Design Guidelines Table 19. Pinout Definitions Signal Pin number Reset state I/O I/O type Description Multiplexed with D0 85 Pull down I/O 1V8 Bidirectional data and address line Not mux D1 87 Pull down I/O 1V8 Bidirectional data and address line Not mux D2 89 Pull down I/O 1V8 Bidirectional data and address line Not mux D3 91 Pull down I/O 1V8 Bidirectional data and address line Not mux D4 93 Pull down I/O 1V8 Bidirectional data and address line Not mux D5 95 Pull down I/O 1V8 Bidirectional data and address line Not mux D6 97 Pull down I/O 1V8 Bidirectional data and address line Not mux D7 99 Pull down I/O 1V8 Bidirectional data and address line Not mux D8 100 Pull down I/O 1V8 Bidirectional data and address line Not mux D9 98 Pull down I/O 1V8 Bidirectional data and address line Not mux D10 96 Pull down I/O 1V8 Bidirectional data and address line Not mux D11 94 Pull down I/O 1V8 Bidirectional data and address line Not mux D12 92 Pull down I/O 1V8 Bidirectional data and address line Not mux D13 90 Pull down I/O 1V8 Bidirectional data and address line Not mux D14 88 Pull down I/O 1V8 Bidirectional data and address line Not mux D15 86 Pull down I/O 1V8 Bidirectional data and address line Not mux ~OE-R/W 81 1 O 1V8 Output enable signal (Intel mode); read not write signal (Motorola mode) Not mux ~WE-E 84 1 O 1V8 Write enable Signal (Intel mode) Enable signal (Motorola mode) Not mux ~CS3 83 Pull up I/O 1V8 User Chip select 3 GPIO44 ~CS2 51 Pull up I/O 1V8 User Chip Select 2 GPIO1/INT2 A1 42 1 O 1V8 This signal has 2 functions: external Address or byte enable 2 for 16 or 32 bits devices. An other name is used : A1_BE2 Not mux A24 53 Z I/O 1V8 Address line for external device / Command selection GPIO2 For all timing diagrams in the following section the notations here after are used: ADR is used for address bus A [24,1] or D [15:0].when used as address lines. DATA is used for D[15:0] when used as DATA lines ~CS is used for ~CS2 or~CS3. ~BE is used for A1_~BE2 (Double function on A1 pin). ~OE and R/W are used for ~OE_R/W](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-37.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 38 of 112 Product Technical Specification and Customer Design Guidelines ~WE and E are used for ~WE_E ~ADV signal (Not available on 100 pins connector) is the address valid signal. Figure 9. Asynchronous access The ~ADV signal is mentioned here because synchronous mode devices may require the signal to be asserted when an asynchronous access is performed. Table 20. AC Characteristic of Asynchronous Accesses Signal Description Minimum Typ Maximum Unit TADR_DELAY ADR delay time from ~CS active 3 ns TDATA_SETUP DATA to ~OE setup time 18 ns TDATA_HOLD DATA hold time after ~OE inactive 3 4 ns TDATA_DELAY DATA delay time from ~CS active 5 ns TDATA_SECURE DATA hold time after ~WE inactive or ~CS inactive -5[1] ns TADV_DELAY ADV delay time from ~CS active and inactive 3 ns TWE_DELAY ~WE delay time from ~CS active 3[2] ns TOE_DELAY ~OE delay time from ~CS active 3[2] ns TBE_DELAY ~BE delay time from ~CS active 3 ns [1]This timing forces to program at least one cycle for asynchronous. [2] These maximum delays depend also on setting of registers](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-38.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 39 of 112 Product Technical Specification and Customer Design Guidelines For all timing diagrams in the following section the notations here after are used: ADR is used for address bus as A24, A1 or D [15:0].when used as address lines. DATA is used for D [15:0]. when used as data lines. ~CS is used for ~CS2 or ~CS3. ~BE is used for A1_~BE2 (Double function on A1 pin). ~OE and R/W are used for ~OE_R/W. ~WE and E are used for ~WE_E CLKBURST: is the internal clock at 26 MHz (Not available on connector pinout). ~ADV signal (Not available on 100 pins connector) is the address valid signal. ~BAA: signal (Not available on 100 pins connector): is the burst address advance for synchronous operations. ~WAIT signal (Not available on 100 pins connector): is the wait signal for synchronous operation.](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-39.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 47 of 112 Product Technical Specification and Customer Design Guidelines The signal ~CT108-2-DTR1* must be managed by following the V24 protocol signaling, if you want to use the slow idle mode. Other signals and their multiplexes are not available. Please refer to technical appendixes of AT Commands Manual [5] for more information. For use with 4-wire serial interface CT103-TXD1*, CT104-RXD1*, ~CT105-RTS1*, ~CT106-CTS1* The signal ~CT108-2-DTR1* must be configured at low level. Other signals and their multiplexes are not available. Please refer to technical appendixes in the AT Commands Manual [5] for more information. For use with 2-wire serial interface This case is possible for connected external chip, but not recommended (and forbidden for AT command or modem use) The flow control mechanism has to be managed at the customer side. CT103-TXD1*, CT104-RXD1* The signal ~CT108-2-DTR1* must be configured at low level. The signals ~CT105-RTS1*, ~CT106-CTS1* are not used, please configure the AT command (AT+IFC=0,0 see AT command User Guide [5]). The signal ~CT105-RTS1* must be configured at low level. Other signals and their multiplexes are not available. Please refer to technical appendixes in the AT Commands Manual [5] for more information. An auxiliary serial interface (UART2) is available on Q26 Extreme Wireless CPU®. This interface may be used to connect a Bluetooth or a GPS chip controlled by an Open AT® Plug-in. Table 25. UART2 interface pin description Signal Pin number I/O I/O type Reset state Description Multiplexed with CT103-TXD2* 31 I 1V8 Z Transmit serial data GPIO14 CT104-RXD2* 30 O 1V8 Z Receive serial data GPIO15 ~CT106-CTS2* 32 O 1V8 Z Clear To Send GPIO16 ~CT105-RTS2* 33 I 1V8 Z Request To Send GPIO17 See Chapter Caution:, “Electrical information for digital I/O” for Open drain, 2V8 and 1V8 voltage characteristics and Reset state definition. * According to PC view](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-47.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 49 of 112 Product Technical Specification and Customer Design Guidelines Please refer to technical appendixes in the AT Commands Manual [5] for more information. For use with 2-wire serial interface This case is possible for connected external chip, but not recommended (and forbidden for AT command or modem use) The flow control mechanism has to be managed at the customer side. CT103-TXD2*, CT104-RXD2* The signals ~CT105-RTS2*, ~CT106-CTS2* are not used, you must configure the AT command (AT+IFC=0,0 see AT Commands Manual [5]). The signal ~CT105-RTS2* must be configured at low level. Other signals and their multiplexes are not available. Please refer to technical appendixes in the AT Commands Manual [5] for more information. The Universal Subscriber Identification Module (USIM) may be directly connected to the Q26 Extreme Wireless CPU® via this dedicated interface. Using the USIM is recommended over the SIM card. The five signals are: SIM-VCC: USIM power supply ~SIM-RST: reset SIM-CLK: clock SIM-IO: I/O port SIMPRES: USIM card detect The USIM interface controls a 1V8/3V USIM. Table 26. USIM interface pin description Signal Pin number I/O I/O type Reset state Description Multiplexed with SIM-CLK 14 O 2V9 / 1V8 0 USIM Clock Not mux ~SIM-RST 13 O 2V9 / 1V8 0 USIM Reset Not mux SIM-IO 11 I/O 2V9 / 1V8 *Pull-up USIM Data Not mux SIM-VCC 9 O 2V9 / 1V8 USIM Power Supply Not mux SIMPRES 12 I 1V8 Z USIM Card Detect GPIO18 *USIM-IO pull-up is about 10kohm](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-49.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 54 of 112 Product Technical Specification and Customer Design Guidelines Signal Pin number I/O I/O type* Reset state Multiplexed with GPIO27 46 I/O Open drain Z SDA1 GPIO28 23 I/O 2V8 Z SPI1-CLK GPIO29 25 I/O 2V8 Z SPI1-IO GPIO30 24 I/O 2V8 Z SP1-I GPIO31 22 I/O 2V8 Z SPI1_LOAD GPIO32 26 I/O 2V8 Z SPI2-CLK GPIO33 27 I/O 2V8 Z SPI2-IO GPIO34 29 I/O 2V8 Z SPI2-I GPIO35 28 I/O 2V8 Z SPI2_LOAD GPIO36 71 I/O 2V8 Z CT103-TXD1 GPIO37 73 I/O 2V8 1 CT104-RXD1 GPIO38 72 I/O 2V8 Z ~CT105-RTS1 GPIO39 75 I/O 2V8 Z ~CT106-CTS1 GPIO40 74 I/O 2V8 Z ~CT107-DSR1 GPIO41 76 I/O 2V8 Z ~CT108-2-DTR1 GPIO42 69 I/O 2V8 Undefined ~CT125-RI1 GPIO43 70 I/O 2V8 Undefined ~CT109-DCD1 GPIO44 83 I/O 2V8 Pull-up PWM1 / ~CS3 See Chapter 3.3, “Electrical information for digital I/O” for Open drain, 2V8 and 1V8 voltage characteristics and Reset state definition. * If a Bluetooth module is used with the Q26 Extreme Wireless CPU®, these GPIOs must be reserved. ** With the Open AT® Software Suite see “AT Commands Manual ” [5]. Reset State: 0: Set to GND 1: Set to supply 1V8 or 2V8 depending on I/O type. Pull-down: Internal pull-down with ~60k resistor. Pull-up: Internal pull-up with ~60k resistor to supply 1V8 or 2V8 depending on I/O type. Z: High impedance. Undefined: caution, undefined must not be used in your application if a special state at reset is needed. These pins may be of toggling signals. Two Analog to Digital Converter inputs are provided by the Q26 Extreme Wireless CPU®. The converters are more than 10-bit resolution, ranging from 0 volt to 2 volts.](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-54.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 57 of 112 Product Technical Specification and Customer Design Guidelines Table 34. Equivalent circuits of MIC1 DC equivalent circuit AC equivalent circuit Table 35. Electrical Characteristics of MIC1 Parameters Min Typ Max Unit DC Characteristics N/A V AC Characteristics 200 Hz < F < 4 kHz Z1 70 120 160 k Working voltage (MIC1P-MIC1N) AT+VGT*=3500(4) 13.8 18.6*** mVrms AT+VGT*=2000(4) 77.5 104*** AT+VGT*=700(4) 346 465*** Maximum rating voltage (MIC1P or MIC1N) Positive +7.35 V Negative -0.9 *The input voltage depends of the input micro gain set by AT command. Please refer to the document :AT command User Guide [7] **Because MIC2P is internally biased, it is necessary to use a coupling capacitor to connect an audio signal provided by an active generator. Only a passive microphone can be directly connected to the MIC2P and MIC2N inputs. *** This value is obtained with digital gain = 0 and for frequency = 1kHz : (4) This value is given in dB, but it’s possible to toggle to index value. Please refer to the document :AT command User Guide [7] Warning: The voltage input value for MIC1 can’t exceed the maximum working voltage, otherwise clipping will appear. MIC1P MIC1N Z1 Z1 GND MIC1P MIC1N DC Blocked](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-57.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 61 of 112 Product Technical Specification and Customer Design Guidelines L1: Must be tuned, as per the design. Vbias must be very "clean" to avoid bad performance in case of single-ended implementation. It is highly recommended to use the VCC_2V8 supply which is available on the system connector (pin 10), in order to avoid this problem. The capacitor C1 is highly recommended to eliminate the TDMA noise. C1 must be close to the microphone. By default, the MIC2 inputs are differential ones, but it can be configured in single ended. They already include the convenient biasing for an electret microphone. The electret microphone can be directly connected on those inputs, thus allowing easy connection to a handset. AC coupling is already embedded in the Wireless CPU®. Table 36. Equivalent circuits of MIC2 DC equivalent circuit AC equivalent circuit MIC2P MIC2N Z2 Z2 [GED Reference] [GED Reference] [GED Reference] [GED Reference] [GED Reference] [GED ReferGND [GED Reference] [Rev] [Date] [GED Reference] [Rev] [Date] [GED Reference] [Rev] [Date] [GED Reference] [Rev] [Date] MIC2+ [GED Reference] [GED Reference] [GED Reference] [GED Reference] [GED Reference] [GED ReferenMIC2P MIC2N R2 R2 GND](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-61.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 62 of 112 Product Technical Specification and Customer Design Guidelines Table 37. Electrical Characteristics of MIC2 Parameters Min Typ Max Unit Internal biasing DC Characteristics MIC2+ 2 2.1 2.2 V Output current 0.5 1.5 mA R2 1650 1900 2150 AC Characteristics 200 Hz<F<4 kHz Z2 MIC2P (MIC2N=Open) 1.1 1.3 1.6 k Z2 MIC2N (MIC2P=Open) Z2 MIC2P (MIC2N=GND) 0.9 1.1 1.4 Z2 MIC2N (MIC2P=GND) Impedance between MIC2P and MIC2N 1.3 1.6 2 Working voltage (MIC2P-MIC2N) AT+VGT*=3500(4) 13.8 18.6 *** mVrms AT+VGT*=2000(4) 77.5 104*** AT+VGT*=700(4) 346 466*** Maximum rating voltage (MIC2P or MIC2N) Positive +7.35** V Negative -0.9 *The input voltage depends of the input micro gain set by AT command. Please refer to the document : AT command User Guide[7] **Because MIC2P is internally biased, it is necessary to use a coupling capacitor to connect an audio signal provided by an active generator. Only a passive microphone can be directly connected to the MIC2P and MIC2N inputs. *** This value is obtained with digital gain = 0 and for frequency = 1kHz .. (4) This value is given in dB, but it’s possible to toggle to index value. Please refer to the document :AT Command Manual [7] Warning: WARNING: The voltage input value for MIC2 can’t exceed the maximum working voltage, otherwise clipping will appear.](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-62.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 66 of 112 Product Technical Specification and Customer Design Guidelines With the SPK1 interface, only single ended speaker connection is allowed Equivalent circuits of SPK1 Table 39. Electrical Characteristics of SPK1 Parameters Min Typ Max Unit Biasing voltage - 1.30 V Output swing voltage RL=16 : AT+VGR=-1600**; single-ended - 1.7 - Vpp RL=32 ; AT+VGR=-1600**; single-ended - 1.9 2.75 Vpp RL Load resistance 14.5 32 - IOUT Output current; single-ended; peak value RL=16 - 40 85 mA RL=32 - 22 - mA POUT RL=16 ; AT+VGR*=-1600** - 25 mW RL=32 ; AT+VGR*=-1600** - 16 27 mW RPD Output pull-down resistance at power-down 28 40 52 k *The output voltage depends of the output speaker gain set by AT command. Please refer to the document AT command User Guide [7]. ** This value is given in dB, but it’s possible to toggle to index value. Please refer to the document :AT command User Guide [7] Q26 Extreme](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-66.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 67 of 112 Product Technical Specification and Customer Design Guidelines The SPK2 interface allows differential and single ended speaker connection Equivalent circuits of SPK2 Table 40. Electrical Characteristics of SPK2 Parameters Min Typ Max Unit Biasing voltage SPK2P and SPK2N 1.30 V Output swing voltage RL=8 : AT+VGR=-1000*; single ended - - 2 Vpp RL=8 : AT+VGR=-1000*; differential - - 4 Vpp RL=32 : AT+VGR=-1000*; single ended - - 2.5 Vpp RL=32 : AT+VGR=-1000*; differential - - 5 Vpp RL Load resistance 6 8 - IOUT Output current; peak value; RL=8 - - 180 mA POUT RL=8 ; AT+VGR=-1000*; - - 250 mW RPD Output pull-down resistance at power-down 28 40 52 k VPD Output DC voltage at power-down - - 100 mV *The output voltage depends of the output speaker gain set by AT command. Please refer to the document: AT command User Guide [7].This value is given in dB, but it’s possible to toggle to index value. If a singled ended solution is used with the speaker2 output, only one of the both SPK2 has to be chosen. The result is a maximal output power divided by 4. Q26 Extreme](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-67.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 78 of 112 Product Technical Specification and Customer Design Guidelines This input is used to switch the Q26 Extreme Wireless CPU® ON or OFF. A high-level signal must be provided on the ON/~OFF pin to switch ON the Wireless CPU®. The voltage of this signal has to be maintained higher than 0.8 x VBATT during a minimum of 1500ms. This signal can be left at high level until switch-off. To switch OFF the Wireless CPU®, the ON/OFF pin must be released. The Wireless CPU® can be switched off via the Operating System. Table 49. Pin description Signal Pin number I/O I/O type Description ON/ OFF 19 I CMOS Wireless CPU® Power-ON Table 50. Electrical characteristics of the signals Parameter I/O type Minimum Maximum Unit VIL CMOS VBATT x 0.2 V VIH CMOS VBATT x 0.8 VBATT V Warning: All external signals must be inactive when the Wireless CPU® module is OFF to avoid any damage when starting and allow the Wireless CPU® to start and stop correctly. Once the Wireless CPU® is supplied, the application must set the ON/OFF signal to high to start the Wireless CPU® power-ON sequence. The ON/OFF signal must be held high during a minimum delay of Ton/off-hold (Minimum hold delay on the ON/~OFF signal) to power-ON. After this delay, an internal mechanism maintains the Wireless CPU® in power-ON condition. During the power-ON sequence, an internal reset is automatically performed by the Wireless CPU® for 40ms (typical). Any external reset should be avoided during this phase. Once initialization is completed (timing is USIM- and network-dependent), the AT interface answers "OK" to the application. For further details, please check the AT Commands Manual [5].](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-78.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 79 of 112 Product Technical Specification and Customer Design Guidelines POWER SUPPLY ON/OFF STATE OF THE Wireless CPU ® Wireless CPU ® OFF IBB+RF < 22µA AT answers « OK » Wireless CPU ® READY Ton/off-hold (2000ms min) SIM and Network dependent RESET mode IBB+RF=20 to 40mA INTERNAL RST Trst (40ms typ) Wireless CPU ® ON IBB+RF<120mA (no loc. update) Figure 35. Power-ON sequence (no PIN code activated) The duration of the firmware power-up sequence depends on: the need to perform a recovery sequence if the power has been lost during a flash memory modification. Other factors have a minor influence the number of parameters stored in EEPROM by the AT commands received so far the ageing of the hardware components, especially the flash memory the temperature conditions The recommended way to de-assert the ON/~OFF signal is to use either an AT command or WIND indicators: the application must detect the end of the power-up initialization and de-assert ON/~OFF afterwards. Send an “AT” command and wait for the “OK” answer: once the initialization is complete the AT interface answers « OK » to “AT” message1. Wait for the “+WIND: 3” message: after initialization, the Wireless CPU®, if configured to do so, will return an unsolicited “+WIND: 3” message. The generation of this message is enabled or disabled via an AT command. Note: See also “AT Commands Manual” [5] for more information on these commands. Proceeding thus – by software detection - will always prevent the application from de-asserting the ON/~OFF signal too early. If WIND indicators are disabled or AT commands unavailable or not used, it is still possible to de-assert ON/~OFF after a delay long enough (Ton/off-hold) to ensure that the firmware has already completed its power-up initialization. 1 If the application manages hardware flow control, the AT command can be sent during the initialisation phase.](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-79.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 81 of 112 Product Technical Specification and Customer Design Guidelines POWER SUPPLY ON/OFF AT COMMAND STATE OF THE Wireless CPU® AT+CPOF Wireless CPU® READY Wireless CPU® OFF IBB+RF<22µA Network dependent OK response Figure 36. Power-OFF sequence Note: If the ON/~OFF pin is maintained to ON (High Level), then the Wireless CPU® can’t be switched OFF. Connecting a charger on the Wireless CPU® as exactly the same effect than setting the ON/~OFF signal. In particular the Wireless CPU® will not POWER-OFF after the AT+CPOF command, unless the Charger is disconnected. A specific BOOT control pin is available to download the Q26 Extreme Wireless CPU® only if the standard XModem download, controlled with AT command, is not possible). A specific PC software program, provided by Wavecom, is needed to perform this specific download. The BOOT pin must be connected to VCC_1V8 for this specific download. Table 52. Operating mode description BOOT Operating mode Comment Leave open Normal use No download Leave open Download XModem AT command for Download AT+WDWL 1 Download specific Need Wavecom PC software For more information, see Q26 Extreme Wireless CPU® / Open AT® Software Suite AT Command User Guide [5]. This BOOT pin must be left open either for normal use or XModem download. However, in order to render the development and maintenance phases easier, it is highly recommended to set a test point, either a jumper or a switch on the VCC_1V8 (pin 5) power supply.](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-81.png)
![WM_DEV_Q26EX_PTS_002 Rev 006 Page 108 of 112 Product Technical Specification and Customer Design Guidelines Warning: Wavecom strongly recommends working with an antenna manufacturer either to develop an antenna adapted to the application or to adapt an existing solution to the application. Both the mechanical and electrical antenna adaptation is one of the key issues in the design of the GSM/UMTS terminal. Attention should be paid to: Antenna cable integration (bending, length, position, etc) Leads of the Wireless CPU® to be soldered to the Ground plane The Q26 Extreme Wireless CPU® Operating System is stored in flash memory and can easily be upgraded. Caution: In order to follow regular changes in the 3GPP standard and to offer a state-of-the-art Operating System, Wavecom recommends that the application designed around a Wireless CPU® (or Wireless CPU® based product) allow easy Operating System upgrades on the Wireless CPU® via the standard X-modem protocol. Therefore, the application shall either allow a direct access to the Wireless CPU® serial link through an external connector or implement any mechanism allowing the Wireless CPU® Operating System to be downloaded via X-modem. The Operating System file can be downloaded to the modem using the X-modem protocol. The AT+WDWL command allows the download process to be launched (see the description in the AT Command User Guide [5]). The serial signals required to proceed with X-modem downloading are: Rx, Tx, RTS, CTS and GND. The Operating System file can also be downloaded to the modem using the DOTA (download over the air) feature. This feature is available with the Open AT® interface. For more details, please, refer to the Open AT® documentation 0.](https://usermanual.wiki/Sierra-Wireless/Q26EX/User-Guide-1208830-Page-108.png)
