Sony DVP S500D User Manual CD/DVD SYSTEM Manuals And Guides 98060757

SONY DVD Systems Manual 98060757 SONY DVD Systems Owner's Manual, SONY DVD Systems installation guides

DVP-S505D 98060757

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DVP-M35/S300/S305/S315/
S500D/S 505D/$715
OPERATION MANUAL

_

CD/DVD

PLAYER

Contents
1. Outline ....................................................................................................................................
6
1-1. Series line-up ...............................................................................................................6
1-2. External

appearance diagram ..................................................................................7

1-3,.Internal

appearance

diagram

(top view) ..............................................................8

1-4. Disc drive unit ........................................................................................................... 10
1-5. Block diagram

2. SIGNAL

...........................................................................................................

PROCESSING

BLOCK

13

................................................................... 15

2-1. DVD RF FRONT END ..........................................................................................15
2-1-1. Attenuation of OP Output Signals .........................................................................

16

2-1-2.

16

HPF ........................................................................................................................

2-1-3. RF Front End Processing: IC001 SSI33P3720 ......................................................

16

2-2. CD RF FRONT END ..............................................................................................19
2-3. RF SIGNAL PROCESSING

BLOCK ...............................................................2O

2-4. Decrypt Block ...........................................................................................................21
2-5. AV Decoder

Block ...................................................................................................21

2-6. OSD Block .................................................................................................................21
L
2-7,. DNR, Video Encoder Blocks ................................................................................23
2-8. Clock Generation
2-9. AC-3 Decoder

Block .........................................................................................

24

Block ...............................................................................................25

2-10. Audio L, R 2ch Signal Block .............................................................................26
2-11. Audio 5. lch Signal Block ....................................................................................27
2-12. DVP-S715

AU-205 Board Block Diagram

....................................................28

2-13. System Control Block ...........................................................................................29
2-14. Interface

Control Block ........................................................................................29

3. SERVO BLOCK ...........................................................................................................
33
3-1. General Description

of Servo Circuits ............................................................... 33

3-1-1. Optical Pickup Control ..........................................................................................
3-1-2. Sled Control ...........................................................................................................

33
33

3-1-3. Spindle Control ......................................................................................................
3-1-4. Tilt Control ............................................................................................................

33
33

3-I-5. Disc Loading and Chucking ..................................................................................
3-1-6. Disc Judgment .......................................................................................................

33
33

3-2. Servo Operation

at DVD Play .............................................................................. 34

3-2-1. Optical Pickup Control ..........................................................................................
3-2-2. Sled Control ...........................................................................................................

34
41

3-2-3. Spindle Control ......................................................................................................
3-2-4. Tilt Control ............................................................................................................

43
44

3-3. Servo Operation

at CD and Video CD Playing

...............................................46

3-3-1. Optical Pickup Control ..........................................................................................
3-3-2. Sled Control ...........................................................................................................

46
50

3-3-3. Spindle Control ......................................................................................................
50
3-3-4. Tilt Control .........................................................................
:.................................. 50

3-4. Disc Loading and Chucking

..................................................................................50

3-4-1. Motor Driver ..........................................................................................................

51

3-4-2. Tray Position Detection .........................................................................................

51

3-5. Differentiation

of Disk Type ...................................................................

52

3-5-1. CD/DVD Differentiation ........................................................................................
3-5-2. SL/DL Differentiation ............................................................................................
3-5-3. Differentiation ............ i...........................................................................................

3-6. Block Diagram

52
52
52

(Servo) ...........................................................................................53

4. IC PIN DESCRIPTION
4-1. ARP CXD1865R

..........................................................................................
55

(IC806 on MB-80 board) ..................................................... 55

4-1-1. Block Diagram ....................................................................................
4-1-2. Pin Functions .......................................................................................

................... 55
'.................. 57

4-2. AV Decoder L64020 (IC203 on MB-78 board) ..............................................62
4-2-1. Block Diagram .......................................................................................................
4-2-2. Pin Assignment ......................................................................................................
4-3. Digital

Signal

Processor

CXD8730R

(1C506

on MB;.78

board)

............... 65

4-3:1. Pin Assignment ......................................................................................................
4-3-2. Pin Functions .........................................................................................................

4-4. AC-3 Decoder

MB86342

62
63

65
66

(IC104 on MB-78 board) ......................................70

4-4-1. Block Diagram .......................................................................................................
4-4-2. Pin Functions .........................................................................................................

-4-

70
71

4-5. Large
4-5-1.
4-5-2.

Gate Array

(IC804

on MB-78

board)

................................

Block Diagram ....................................................................................................
Pin Functions ........................................................................................................

4-6. Middle
4-6-1.

CXD8728

Gate Array

Block Diagram

CXD8746

(IC 101 on MB-78

board)

Gate Array

.......................................................................................................

CXD8747

(IC807

on MB-78

board)

7..72
73

............................. 78

4-6-2. Pin Functions .........................................................................................................
' 4-7. Small

72

78

79

............................... 81

4-7-1. Block Diagram .......................................................................................................

81

4-7-2. Pin Assignment ..................................... ............................ :....................................

82

5. OVERALL

BLOCK

5-1. RF, Servo,

Audio,

5-2. Signal Processing

DIAGRAM

......................................................................
83

Power

Block Diagram

Block

Diagram

5

.........................................................

.......................................................................

83
89

1.

Outline
This guidebook

describes the DVD-Video.

It also describes

the functions

For the functions

not used in the DVP Series.

used in the DVP Series, refer to Secions

2 to 5, or Service

1-1. Series line-up
O

Basic Dolby digital model
DVP-S500D

NTSC U/C specifications

DVP-S500D

NTSC General overseas

DVP-S501D

NTSC Japan specifications

DVP-S505D

PAL/NTSC

*AC3
*Output

specifications
(100V)

: 5.1 ch OUT (With built-in
terminal

(110 to 240V)

Hong Kong specifications

: S terminal,

(230V)

decoder)

video, audio x2

Color difference

®

(120V)

output xl

280 size model
DVP-M30

NTSC Japan specifications

(100V)

DVP-M35

PAL/NTSC

China specifications

DVP-M35

PAL/NTSC

Hong Kong specifications

DVP-M35

PAL/NTSC

General

DVP-M35

PAL/NTSC

Singapore

overseas

(230V)
(230V)

specifications

specifications

(110 to 240V)

(230V)

*Pixy size
*Output terminal:

®

S terminal,

video, audio x2

Basic model
DVP-S300

NTSC U/C specifications

(120V)

DVP-S300

NTSC General overseas

DVP-S305

PAL/NTSC

China specifications

DVP-S305

PAL/NTSC

Taiwan specifications

DVP-S305

PAL/NTSC

General

DVP,S305

PAL/NTSC

Singapore

specifications

(230¥)

DVP- $315 PAL/NTSC

European

specifications

(230V)

DVP-S315

PAL/NTSC

Great Britain specifications

DVP-S715

PAL/NTSC

European

DVP-S715

PAL/NTSC

Great Britain specifications

DVP-S715

PAL/NTSC

Australia

specifications

overseas

(230V)
(ll0V)

specifications

specifications

specifications

-6-

(110 to 240V)

(110 to 240V)

(230V)

(230V)
(230V)

(230V)

Manual.

*Output

terminal

AC3
21P Euro (DVP-S315,
S terminal,

Note: Video-CDs

recorded

specifications

video, audio x l
in the PAL format

can be played

only by general

models.

1-2. External appearance
(_)

$715)

diagram

Basic Dolby digital models
DVP-S'500D

DVP-S501D/S505D

98ram

±

(_)

280 size models

T
91mm

1

7

overseas

(_

Basic models
DVP-S300/S305/S315

±

DVP-S715

i

!

1-3.

Internal appearance

(_)

diagram (top view)

Basic Dolby digital models
YS board
(COMPONENT VIDEO)

J

AU board
(AUDIO)

.__.__F3
.........................

Power block
(SWITCHING
REGULATOR

I

HP board
(DVP-S300/S315)
(HEAD PHONE)
ME board
(DVP-S305)

MB board
(SIGNAL PROCESS/SERVO)

(MIC)

i

LE board
(LED)

i

Disc drive unit

' ;---; ' /

/

FRONT SIDE

FR board

1
\
FL board
(FL DRIVER/FUNCTION

(IR/POWER SWITCH)

8

i

SWITCH)

(_)

280 size models

POWER BLOCK _..

j

AU-board

MB-board

j

HP board
(HEAD PHONE)

I o,sco i,vou ,

FL board

--....,

,

I
/

\

i

I

,

'1

i

/

FRONT SIDE
LE board

(_)

Basic models

PS board (DVP-S715)

Power transformer

(AUDIO POWER)

(DVP-S715)

.............

..........

AU board
,_

_t IIII111
III
tI
lIlllll_
........

JI 111

(AUDIO)

_

Iltl""IIll

"

ER board
(DVP-S315/S715)
(EURO AV)

Power
block
(SWITCHING
REGULATOR)

MB board
(SIGNAL PROCESS
/SERVO)

HP board
(HEAD PHO._
Disc drive unit

iii

'

f

'

/

/

--J

I

FRONT SIDE

FL board
(IR/POWER

FL board
(FL DRIVEFVFRUNCTION SWITCH)

SWITCH)

9

1-4.

Disc drive unit

1) Configuration

of disc drive unit.

[Optical block specifications]

CD system OPT
DVD system OPT
Tilt motor

Skew adjustment

J

i Thread motor

Configuration of thread system

Spindle motor
Tilt sensor
Optical block ass'y

Specification

Optical system
Drive unit
Object lens
Focus error
Tracking

error

Laser beam

DVD system

OPT

Non-deflection,
unlimited optical system

DC system

Non-deflection,
limited optical system
(laser coupler)

2-shaft

2-shaft

Glass
Stigmatic

OPT

Plastic

system

Differential

3-division

DPD system

TPP system,

650nm

780nm

- 10-

system

2) Optical

route diagram

Las

Objec

_....

k

y
ForCD

Mirror

J

ator

lens

_)_._,._

(__

' ' -_"_

Laser diode
Y

For DVD

-11-

OEIC

1-5.

Block

diagram
/
/

I............
256K

.i

SRAM
32M
SDRAM I

IMB BOARD1

4M DRAM

:

i
I

,

i

Lc8D910R51v
H (MBA8C63342)6CH
DSP __l]__ _x3

OPT

COAX
&(_)

-_

AC-3

2CHLP
F

2C_PFB_F
___l--;__

ITKBOARDI

©

MPEG

DVDFRONTEND

AU-L,R
OUT

SPDIF
OUT

......

(SSI33P3720)

I

-_

---

MGA

SHSerial"l

--

____.1
I_
I
I I 2CH DAC I
T-I

_-- B_(OXD8746Q)[
ARP

"-_1

AVDEC

__

_PF---_
BUFF I

,..
r

I_I(oxDa750N)I_
I F_

rTCL_

*

..........

(L64020)
(RFProcesser)
_.

OSD_
[3:0]

CDRF
(CXD1865)

(CXA1081Q)

--

SHSerial

-

'i

[

I

/

R,G,B,I

ill

IF Serial

-

Bus_

II

_

OSD

D

/

,,

/

,

HEAD
PHONE

-LP.F

BUFf /

(MB90096)

s_oo ,4
I '11,

OARDI

I

SPDLMOTOR

I

@

CCIR601

SPDLDR

'

__SHSeri_

Z

(LB 1896)

.I

I

_E

(LA6527)

SERVO
DSP H

I
I

FOCUSCOIL

I

_

,

TRACKING
COIL

(CXD8730R)i

i

ARI
lG IAY

(SH)

_(CXD8728)

_--

FCS!FRKDR

I

TILTMOTOR I

®,

21p
EURO
EURO

L----J

75aDR

l_

>

SHSera

BUS-G"3/_

BUS-Gp2

IR,G,B

"_ EUROONLY

RGBOUT

U

VIDEO
(BA5981)

BUS-Gpl
SHSerial

TILT/LDDR
(BA5912)

l"

I1<_

BUS

I/Fp-COM
16L
(MB90678)

1

""

ENCODER
SHSerial (CXD1914)

IFSerial
/1

-

SWBLOCK
&
LPF

I
IISHSerial (CDX1854)

I E_o_< ___

I(C×D}728)

P 21p

....................

EXPi-qTd-:_

1

I

LOADINGMOTOR
I-

,

'v'

CPRuA
EMxT

---

÷ EU BOARD
[ZJ

L GATE
ARRAY

SYSp-COM

i

_

.... .-_------ -------------- -----T

!1

SHSerial

II

SLEDDR

,

'-

4_4_

SGAI

CPRUo
EMXT

@.

l[

AI IIBUS-Gp'_
BUS-ep2
_

1411

ERORR

SLEDMOTOR

___

ParallelBUS

BUS-Gp2
CTRL-A1

I

V OUT
LPF
6dBAMP
75_ DR

S-LINK

"_

-

(NJM2191)
SIRCS

1

RESET
I
(ppc393)

t

i

FLO
driver

S-LINK

_
or

I

1,4.

7-

FLO

F_ONT(FL, FR)BOAR_
- 13-

©
Y/OOUZ
@

__i)

- 14 -

CTRL-A1

2.

Signal

Processing

Block

Block which perfornls various signal proccssings
the audio signal and video signal.

2-1.

from the RF frollt cnd to the output of

2-1-1. Attenuation
of OP Output Signals
The RF signals (RFP, RFM) output from OP for DVD are attenuated by R066 and
R064 so that they satisfy the input amplitude allowable level of IC006 in the post
stage.
(About IVpp D (*'3) for SL (*1) disc. In actual, only the RFP signal is output because RFM signal is connected to the ground in the OP block.

DVD RF Front End
2-1-2.

ttPF

Low frequency

TK-47 board

of the attenuated

filter (HPF) that cuts off the frequency
impedance
of C046, C047, and IC006,

0051

_

component

oo o
_

RF signal

is removed

(about 3.16kHz)
then it is entered

by a high pass

determined
by the input
to the IC001.

,coo,

8SI33P3720
RFIDVD

_

When

_

IC=3.16kHz

CNO0_

delecl

TO MB-78

2-1-3.

H
board

RF Front

End Processing:

IC001 SSI33P3720

ICs0b

CR001
R066

.ru ._

,0047

(1) ATT block

- t F_ 4)
i

',V_a..,,,,o0
_ <"_

0046
...L..

_- c053

' SL:3 6

_.,.T T

', DL:5/16 !

]_D I P_

SDATA
SDEN
SLCK

VCC

entered

In this block,

signal

amplitude

200mVwD,
utilize

i 17171 ii ,

--

The RF signal
block.

from

determined

processing,

RFP(_)

and RFN(_

is executed

level determined

according

depending

high performance

After

IC006

this processing

to the ATT

is entered

to attenuate

the signal

to the specification

on AGC

input allowable

below

(about

level)

in order

to

of IC.

the signal

is output

from IC006

ATOP_

and ATONe).

ATT: Set to 3/16 for SL disc, or 5/16 for DL (*2) disc.
These are operated
(2) AGC block
Figure

2-1.

TK-47

Board

IC006

SSI33P3720

ATT output

IC006

The AGC

respectively
block

controls

(1VppD) is supplied
about 1.4V

full-wave
level,

Decay:

lO0ns

range

500mV

20ns

Attack:

Figure 2-2.
RF (eye pattern) waveform at DVD
disc
TK-47 board CN005_)P

- 15 -

Figure 2-3.
RF envelope waveform at DVD disc
TK-47 board CN005(_P

rectified

and repeats

of current

500mV

ATOP(_

level as mentioned

and entered

range

register

set via serial

interface.

RF/DVD
able

about 1.4V

by the command

and ATONe)

above,
to AGC

input
decay

block

gain of AGC

to the IC006
signal

input

IC001

amplifier

DIP@
to IC006

and attack

by time so as to attain

are processed

below

then they are AC-coupled

DIP(_

while

a balance

allow-

and C051,

and AIN(_.

The AGC

and DIN(_)

keeping

the optimum

AIP_

so that constant

and DIN_).

AGC

by C050

input

signal

compares

with reference
with the product

gain.

When input signal to IC006 DIP(_ and DIN(_) is below I Vppl) ,
C052 (CByp) is discharged with 41aA decay current. In this case,
AGC amplifier gain gradually increases.
When input signal to IC006 DIP_
and DIN(_) is over 1VpeD, C052
(CuvP) is charged with 0.18mA attack current. In this case, AGC
amplifier

gain gradually

- 16 -

decreases.

Theinputsignalto IC006DIP_ andDIN_) is a signalprocessed
afterEQ block
mentioned
later.
"1: SingleLayerdisc
(3) EQblock

*2: DualLayerdisc

*3: Peakto PeakDifferential

TheEQblockis a programmable
equalizerfilter differentiatorblock.
TheDVD formatis premised
on theEQ andrequireshighfrequencysignalstobe
boosted.
Thisblockequalizes
RFsignaltogetoptimumRFsignalbycombiningLPF
and-EQ(boost),asshownin Figure2-4. LPFisdefinedas-3dBbandwidthwithout
boost.If theamountofboostis settoacertainvalue,thegainatcut-offfrequencyis
asfollows:
Gain(atcut-offfrequency)
= -3dB+ Boostamount[dB]
Also,LPFis usedasaprefilterfortheA/D converterprovidedin theinputstageof
RFblockof IC in thepoststage(MB78boardIC770).
10

wl

---e.--- LPF+EQ

v

_z

--D--

LPF

-5

-10

-15

t

0

1

2

3

4

5

6

FREQUENCY

Figure 2-4.

These
register

cut-off frequency

7

8

9

10

(MHz)

Frequency

characteristics

and boost amount

(EQ+LPF)

of LPF are operated

by the command

set via serial interface.

The RF signal processed

in this block is output from IC006 FNP_

signal is entered to IC006 DIP_

and DIN(_) and rectified

in full wave, then compared

in the AGC block. The RF signal output from IC006 SIG(_
RF signal processing

block IC806 in the post stage.

- 17 -

and FNN(_). This

is then transmitted

to the

(4) Serial interface
Various

values

of IC006 are set to internal

serial port register

via serial interface.

Actually, they are set by three signals from the L G/A IC804. Signals
SDATA_),

and SCLK(_,

are SDEN_,

and its timing chart is shown in Figure 2-5.

SDEN

SDATA

(

SCLK

ADDRESS,

8-BIT

_

DATA,

8-BIT

LJ

SDEN
TCLK

TTRN

SCLK

SDATA

/

(READ)/

SDATA
(WRITE) \

ADDR0

ADDR0

Figure 2-5. Timing chart

- 18-

)

2-2.

CD RF Front End
rTK-47 board
CXA,?.5550

OPTICAL
BLOCK
_1

CDRF

<

cNO01

-_

Figure 2-6. TK-47

board RF/CD

The RF signal output from the CD OP is input to IC005 (_) and (_), and transmitted
of the MB-78 board via the amplifier,

500mY

Fi0ure
RF (eye pattern)

about 1-1.4Vp-p

500ns

range

500mY

2-7.

waveform

to IC806ARP

equalizer.

about 1-1.4Vp-p

range

TK-47 board
To MB-78 board
IC.806 ARP

20ns

Figure 2-8.
at CD disc

RF envelope

waveform

at CD disc

I

TK-47 board CN005(_P

TK-47

- 19 -

board CN005(_P

2-3. RF Signal Processing

Block

The block is composed of the IC806 ARP (CXD 1865R) and IC810 4Mbit DRAM (I.tPD424260)
of the MB-78 board.
In the case of the DVD, the ARP is input with the AGC and RF equalize-processed
signal at the IC006 analog front end (SSI33P3720)
DA and video-CD,

sync clock extraction

by the RF-PLL

such as asymmetry
are carried

correction,

adaptive

in the demodulator,

and protection,

subjected

and sent to the buffer memory

In the case of the DVD and video-CD,
memories,

and output controller

navigation

information

equalization,

out so that the signal becomes

with the PLL clock. This data is EFMPlus demodulated

(CD-DA and video-CD)
detection,

of the TK-47 board. In the case of the CD-

it is input with the CD-RF signal from IC005 of the TK-47 board.

In the ARP, first RF signal processing

synchronized

DVD-RF

(DVD)/EFM

to frame/sector

binary

and
data

demodulated

sync detection,

address

controller.

the ARP is linked to the ECC core, built-in and external

to carry out error correction,

descrambling,

EDC detection,

detection (DVD only), and output data flow control, etc. The data output

in this way is then sent to the decrypt

block in the next stage.
J

This is the same for the CDDA. The ARP is linked to the built-in
CDDA signal processing

block to carry out error correction,

signal is then muted and corrected

by the CDDA

and external

memories,

and

output datll flow control, etc. The

signal processing

block, and then sent to the

IC203AV decoder (L64020).
For all of these disks, RF jitter
information

is used for adaptive

ARP

is calculated

by the RF signal

processing

block, and this

control of the servo DSP via the CPU.

DECRYPT

OCRSD0 - 7
DVD-RF
From TK-47
boa_

(

IC806
CXD1865R

IC811
CXD1904G
TOS
ERROR
AVALID
DCK
AREQ

CD-RF.(
From TK-47 boa_

_O LRCK (. To AV decoder IC203
CD DATA) _J,

MDO-15

_-.-, ,_J, _-._

MAO-8

IC810
4M DRAM
pPD424260

Figure 2-9. MB-78

- 20 -

board RF processor,

decrypt

' To AV decoder IC203

2-4.

Decrypt Block

Data sent from ARP is subject to decoding of the digital copy protection for preventing illegal
copy determined by DVD standards at ICS11 (CXD1904),

and then sent to the AV decoder in

the post stage.

2-5.

AV Decoder Block

Comp0sed of two 16M SDRAMs
is used to decode DVD/VCD

(IC201,202MB

81117622)

and AVDEC (IC203, L64020),

it

data (MPEG stream) from the decrypt.

After decoding, the video signal is letter box converted,

and output together with the subpicture

and OSD signals.

The audio signal is decoded
AC3/MPEG

compressed

for the two channels

and output. Separately

data is output as IEC958.

The CD data from ARP is bypassed

2-6.

AC3/MPEG/LPCM

inside and output from the audio output.

OSD Block

IC207 of the MB-78 board (MB90096)
inside the AV decoder

outputs the player menu, and adds it to the video signal

IC203 (L64020).

- 21 -

IC203 AV Decoder
(L64020)

DCRSD 0-7

--

YC0-7

To IC251 DNR

AU-197
0353

TOS
ERROR
AVALID
DCK
AREQ

iC351 _

IC207
MB90096

C°axial

°utptzt ]

0joltal

I

output

GPIF32T

FromIC807 ('CG--'_'O

SGA , _SO
CXD08747 ' L SCLKO

OSO

IC102 OIR (To LC8905t)

AVDATA
AV LRCK
AVBCK
t

FromIC806ARP

To IC101 MGA (2cll signal)

-CDLRCK
CDBCK
CDDATA
SPDIF

AVIO0-15

IC201
IC202
16M SOP,AM

Figure 2-10.

- 22 -

AV Decoder,

OSD

2-7.

DNR, Video Encoder Blocks

The video data from the AV decoder is sent to IC251, DNR (CXD1854),
noise reduction, and sent to the IC252 video encoder CXD1914

in the post stage. The video

data is converted to NTSC/PAL video signal (Color difference signal/S-Y,

S-C/composite)

here.

IC252
VIDEO ENCORDER
CXD 1914

IC2510NR
CXD1854

From
vr
IC203
'"
AV Decoder

subjected to video

C0-7

R-Y

1

Y
For color difference output

B-Y

YO-7

VIDEOC

Figure 2-11.

Signals are output externally

J

after passing

ForS terminal

VIDEOV

Compositevideo

DNR video encoder

through

- 23 -

VIDEO Y

the 75 _ driver.

2-8.

Clock Generator

The IC209 CXD8696PLL

Block
IC generates

27 MHz, and using this as the master clock, generates

the system clock for audio decoding.
System Clock

384fs

768fs

CD/VCD

16.9344 MHz

33.8688 MHz

DVD

18.4320 MHz

36.8640 MHz

IC209
PLL
CXD8696

IC206 SN74ABT12608
BUFF

27.0000MHz

)
)

1(;205 SN74ABT12608

BUFF

)

X210
27MHz

7_Sfs

384fs

=
33.8688MHz

Figure 2-12.

- 24 -

Clock generator

2-9.

AC-3 Decoder Block

M G/A (IC101)
CXO 87460

FromL_A (tC_4)

8s'r
6STC
$062C

From_

SCKG2
SOG2

11c8o5)
;

OR LRCK (

AC-3
DECODER
(IC_04)
M886342

DO_LRCK

/

2
DD_BCK

l

DD_OATA F

1

AC3_DATA F
AC3_OATA R
AC3.OATA C

I
AV_

AC3__K
AC;_LRCK

/
3

II

256KS_
N341256

Figure 2-13.

The SPDIF_AC3
AC-3 decoder

(Dolby Digital Bit-Stream)

AC-3 Decoder

audio data output from AVDEC

(IC104) via DIR (IC102) and M G/A (IC101).

data is processed

In the AC-3 decoder

is input to the
(IC104), the

for three lines, and sent to the AU- 197 board DF/GAC via the M G/A (IC 101).

- 25 -

2-10.

Audio L and R 2ch Signal Block

The audio signal data for 2 channels of the MB-78 board AV decoder IC203 (L64020)
through IC101MGA,
converted

is passed

passed through the digital filter in the AU197 board IC215 (CXD8750),

to analog signal in the DAC, and passed through the LDF to become

the line out

signal.
IC101
CXD8746

IC215
CXD8750
IC206
IC207
NJM4580

From
IC203
AV Decoder AVDATA
AVLRCK
AVBCK

MGA

Digitalfilter
DAC

KR DATA
KR LRCK
KR BCK

Secondary LPF

MB-78 board

Line oul

AU-197"" board

Figure 2-14.

The line out signal line is also branched

2ch signal block

out to IC214

to become

the _eadphones

output.

IC214
NJM4580

IC001
NJM4556

R

L

R

-E>

.,.

-E>
_r
HP-96 board

Y
AU197 board

Figure 2-15.

- 26 -

Headphones

amplifier

JO01

amplifier

2-11.

Audio 5.1ch Signal Block

The AC3 decoded

signal

DD-DATA

C/R/F output from the MB-78

board IC101

(CXD8746)

is input together with DD BCK and DD LRCK to IC203, IC204,

(CXD8750)

of the AU-197 board, passed through

MGA

and IC205

the digital filter, and converted to the analog

signal in DAC.
The front L and R signals are then passed through IC203 of the AU- 197 board, gain-controlled
at IC353 (BU4053B),
become

the external

and noise-eliminated

at the secondary LPF IC208, IC211 (NJM4580)

output of the front L and R.

The sound Land R, and center sub woofer signals are passed through
being gain-controlled,
IC213 (NJM4580)

and noise-eliminated

to become

the external

in the secondary

IC204 and IC205 without

LPF IC209,

output.

IC203

IC353

CXD8750

BU4053B

5.1ch OUT
IC208, 211

---L
From
MB-78board
IC101MGA

to

DD LRCK =
DD bATAF _

FOR L,R
DF/DAC

_R

DD BCK

GAIN6
IC204
CXD8750

DD LRCK , _
DO DATAR
DO BCK

IC209,212

FOR
SL, SR
DF/DAC

IC205
CXD8750

, - SR
SL

IC210,213

I

DD LRCK
___
DD DATAC
DO 8CK

CENTER
DF/DAC
SUB WOOFER

I

_CENTER I:
' SUBWOOFER
I

I

I
_J

Figure 2-16.

- 27 -

5.1ch Signal Block

IC212, IC210 and

2-12.

DVP-S715

AU-205 Board Block Diagram
1/2 _CL_I7

1/2 IC207

L P, F

BUFFER
J202

7_
OAC BCK
CLOCK BUFFER
DA,C LRCK
CN203

OAC

AOATA

SWITCH

i

1/3x3

IC204 DA CONVERTER

FILTER

_i

IC208

0212
MUTE
SW

Q204
_E01

(_)

L OUT

(_

R OUT

0211
MUTE
SW

0203
FILTER

SWITCH
1/2 1C206

t/2

HP, L

;" _ ,CN205

IC206

BUFFER

L,P,F

kATe
PMUTE

I

I

,

IF

CR202
VIDEO

V

i
MUTE

0205,

CN201

LOGIC

210

1

VIDEO

VIOEO_YAuL

I

SOG3
AUDIOMUTE
IC_85

D2LT

Q2_

*W

BUFFER

J20_

V_OEO V,

REG

_)

VIDEO

SCKG3
VIDEO
_

POWERCONTROL

Y

÷5V
VIDEOIC

_

[

©

S-V,D_O

AU*SV
---_
_1

.-_

--W

_EV REG

REO

Q214
OCCONTROL

vs
REG

DRIVE

BUFFER

BLB:FER

J_F

©c_
['1--_ AU*E2V
i
'
TO_-415
CRY04 _

_tO

p. FAIL
_1_

Figure 2-17

2-13.

System Control

Block

The system controller is composed
IC807 (CXD8728)

large gate array, 1C802 (HM62812)

and IC807 (CXD8747)

2-14.

Interface

mainly of the IC805 (HD6437034)

and

1M SRAM, ICS803 8M FLASH memory,

small gate array, etc. It serves to control the overall servo system.

Control Block

The 'interface

controller

(_PD432568)

256K SRAM, IC601 (SN74HC373),

commands

SH microcomputer,

is composed

to the SH microcomputer

of the IC604 (MBg0T678)

I/F microcomputer,

and ICS603 external ROM. It sends various

based on the switch information

FR board, receives the current information

from the SH microcomputer,

on the FL tube display.

- 29 -

IC608

from the FL board and
and displays

1(3803

Vcc=5v

IC802

ROM(Flash)SMbit

Vcc=5v

IC 506

Vcc=5V

Servo DSP
CXD8730

RAM (1Mbit)

IC 806 Vcc=3.3V

IC 811

ARP
CXD1865

DECRIPT

AV_DEC

CXD1904

L64020

HM628128
.

_k

,LL

00

;

P

T

WR

CSO
CSl

CS6
WAIT
IRQO
IRQ6
IRQ7
IRQ3
IRQ2
TxDO
TxD1
SCK1

I

10604

SOG1]

•--Lo

L

{9O

____ INT&WAIT
co
Control
SIC1
SIC2

G,Oir
IWRn
IRDn
SDSPWRn
SDSPRDn
ARPCSn
DCRCSn
AVCSn

JI
T

Address Bus
Decode Controll_
Device

_RxDs
MPX

I

ChipSelectL
INT Control -_

Out put

4
4

Expansion
I/O
10804 WAlT C:nxt_:ll,
4
LGA
4
Gro.up.2
CXD8728
Chip_elect

Servo Block
I

r_

n

T x DOSel -_
i_

R x DOSel

LGA

J
i_

o
fO
Q.

i_
T

Hsync (from 0XD1914)
AdvancedHSYNC
•

Serial

[-

Gp3,4

/

CONTROLL
Iv

=.-

SerialDevise
I/0

•

_" 13
_- _
=_J3

_1 _1

10207

MB90T678
"To Expansion
I/FCON
SlO
I/O
XI_FBSY
(Handshake)
Ch_n
SlO
SO
Ch m
SCLK
FLCS
Serial
IFSO= Sl_m
FLCS
IFSI_ SO_m
Gpl "

JPSEL I

4

J

d

X

t

i

I

j

r,-- tY-

ARP Block

,,=:

I

dir&G Control

1:3 r'_

AC3
Block

o,1o "__

_._

O'3 (:3

SA[0:19]

RD

System Control
Drive Control

X

_--I._. _ _ _z_

00

DATA 4 SD[0:15]

10805
HD 6437034

Vcc=3.3V

Ai, d

_cE

BusBuffer
(SGA)

_<_1_

Address

d,

,'-" I-C3 z

,,'-

Vcc=5V

SH

IC 203

A

t
r_

Vcc=5V

_/_1

CN802

J

AC3 Dec

J

VEnc

>

Serial
Gp2

Diagnostic

MB8-6342
I C_D_9_4Q
/

J

J

ARPINT
DCRINT
ARPWIn
DCRWrn
AVWTn
Group2RxOs

I Connector
DBSO..1 Rxl3

;°J

101

DBSI"t Tx[)

Expansion
I/O _ DIAGN

IFSO
DBSO
IFSI
DBSI
_CKG3
SOG3
SCKG4
SOG4
SCKG4n(DCLK)

II 1

SOG2PS
SCKG2PS
AVCK

,coo6_

T

10102
DIR
LC89051V

IC203~205

II DAC

I_:

oxo8 2
o_,

(for OSD, DNR,AVDEC)

_

03

SSl o_
IC251 (n
(SS133P3720)
DNR
(::3

,,z,

EEPROM
BA9020F

CXD1854Q

IC215
DAC
CXD8750

t-'t

LU
1.1.1

)

y.

k
Y

Serial Gp4

Fig. 2-18. System

- 31 -

Controller

Peripheral

Device

Control

Serial Gp3

Block Diagram

-32-

I

IC101

OSD
FL_ConI
MB90096A
pPD16311
SlSCLK
CGGS11 SISCLK
FLCS

10807
0XD8747

3.

SERVO

BLOCK

3-2.

Servo Operation

3-2-1.

3-1.

General Description

of Servo Circuits

Optical
(1) DVD

at DVD Play

Pickup
focus

Control

servo

The focus error signal output from the optical pickup for DVD (hereinafter referred to
as optical pickup) is entered to the TK-47 board IC006: SSI33P3720A
3-1-1.

Optical

Dedicated

Pickup

Control

optical pickups

(_)P).

for DVD and for CD and video CD are provided.

tracking servo gains are automatically

The focus and

adjusted for every disc loading so that the gains are

constant for every disc to be played.

The balance

amount and offset amount of the focus error signal is set by IC805 (CPU)

via IC804 of the MB-78 board using the internal register
The focus error signal is generated

3-1-2.

Sled Control

Two pickups
controlled

the FE terminal

for DVD and CD/video

CD are placed on the same sled, and the position

with one sled motor. The sled motor is attached

the Hall element, and a sled speed fluctuation
by applying

the speed servo control (feedback

with a speed detector

due to mechanical

is

utilizing

load variations is minimized

control).

3-1-3.

Spindle

at TK-47 board IC006,

The error signal is switched

according

all disc rotations. The rotation detection pulses (FG:

Tilt Control

The optical pickup
DVD is played,

is controlled

it is controlled

so that the optical axis is perpendicular
so that the time axis variation

to the disc; when

(jitter) of RF signal becomes

minimum.
At the start of DVD play (before RF signal is output), optical sensor detects
disc and the optical pickup is controlled
The servo system circuit
operation,

the tilt angle of

so that the optical axis is perpendicular

is used for both DVD and CD. At DVD, it always

but at CD, it operates

only during start-up

to the disc.
performs

and stops at the tilt position

tilt

during

playback.

3-1-5.

Disc Loading

and Chucking

One DC motor drives the tray in-out motions, and chucking of disc.

3-1-6.

Disc Judgment

The presence of a disk is judged

from the spindle motor spinning

start-up time.

Also, the disc size (12cm or 8cm) is judged from the spindle motor speed-up
data.

- 33 -

to whether

time and disc

- 34 -

the disc type is DVD or CD by the

by IC503 (OP amplifier

input to the servo DSP IC506 (CXD8730R)

Frequency Generator) utilizing the Hall element are used for control.

3-1-4.

and output from

flat cable.

is used for both DVD and CD.

motor controls

amplified,

The IC006 FOCUS error (DVD FE) signal is input to the MB-78 board via the flexible

Control

One 3-phase brushless

of IC006.

(_p).

switch IC452, its signal level is adjusted

The sled motor used is a DC motor with a brush.
The servo system circuit

A to D ((_ to

_p.

(_), (_), (_p), and it is

MB-78 board
i

r

I
Ln
I

i
i
i

I

TK-47 board

Optical Block

]
ZIF

I

IC006 SS133P3720A
CNO01

'
I

CNO05

CN452

tC452
MC14053

iC503 (1/4,3/4)
NJM3403

I

r

IC506
CXD8730R

IC363
BA5981

SERVODSP

FCSDRtVE

FE
DVD FCS--_ To DVD FOCUScoil
DVDFCS+_

_--

_

,__

_sso7 ]
'._---_--_
s_,,_,



Tray out position

H

L

Tray opefating
Chucking position

L
L

L
H

!

-51

-

flat

3-5. Differentiation

of Disc Type

This series can determine
when performing

3-5-1.

CD/DVD

three types

of discs (CD/DVD-SL/DVD-DL)

at one time

focus-search.

Differentiation

The pit shape and track pitch are quite different between

CD and DVD. Because of this

difference, TE is not generated even if a large laser spot for CD is shot at a high density
disk such as DVD. This feature is utilized to judge
Specifically,

even if DVD is played

CD or DVD.

in the CD mode (the optical pickup

operates at the

CD side), TE is not generated almost all.
On the other hand,

by playing

waveform

will be measured. This is used for the detection.

(approx.)

CDs in the CD mode, naturally, the 2Vp-p

traverse

3-5-2. SL/DL Differentiation
SL/DL is differentiated by the PI level.

3-5 -3. Differentiation

1)

The servo system mode is CD (MB-78

2)

PI mode is DVD (MB-78

3)

Both lasers turn ON

4)

The spindle turns ON

5)

The sled is moved to the external

6)

Both focus actuators

7)

The signal is measured.

board: IC452 "(_)"P and "(_"

are "L")

board: IC452 (_)P is "H")

circumference

slow.

are moved up and down.

IC506 DSP (CXD8730R)
• When the p-p value of the CD traverse
of the DVD is measured

between

(24p) is measured,

the PI level

at the same time.

• IC805 SH (system controller)
differentiate

waveform

reads the TE and PI levels measured

bythe

DSP to

CD/DVD-SL/DVD-DL.

• CD/DVD

differentiation:

TE is generated

as a clear traverse waveform,

CD/DVD

differentiation:

Judged as CD if TE is generated

as a clear traverse

waveform.
SL/DL differentiation:

CD __h_

I Approx. 2Vp-p

•

_

The PI level becomes

'

SL>DL.

I Approx.
1V

SL

OVO

----.... -

,rox.0.5V

DL

Figure. 3-20. Traverse waveform

Figure. 3-21. PI waveform

- 52 -

3-6.

Block

diagram

J

TK-47

(Servo)

t

J

L

,_ :k;AL _LOCK

MR-78 Servo Block

uv_) Rh
DVDPDIC

9

14

9_

icoo6

lO

RFU

14
13
R

A
B
C

_e

D

64
........
....

57
_F HOLO 4Z

1
2 ssi33P372oA
3

37
39

4
7

38

DVDP_
OVDFE

DVO FE

18

S

ITS06
MUt,O
MDpo

CXDI86!,R

2zM DSP
<27OOMHz)

IA1.

ID_

OPD

5

VR



.£

>

>

a

a

>
oO
T,-

"5

3 --=_w
o ,---_, O0 t_ u: ,..%t-_

--

0

.--t_

Oo

..,rr_.N
>

0...:-'- ,.._

= x---_
_" ¢_X

_o
0.

_

""._=

_-_×

.-

0

v

"_ x_
_

_- _.= _

0

0

og

o)

N

og

co

- 72 -

t_--

4-5-2. Pin Functions

Pin No.
I

Signal

Name

Function

RD/WR,SHIF

VDD

"

VDD

2

DVDLDONn

I/O, RD/WR

DVD laser light/off signal:ON

3

CDLDONn

I/O, RD/WR

CD laser light/off

4

CDfDVD

I/O, RD/WR

Signal differentiating

signal:ON

when "L"
when "L"

between

CD and DVD:DVD

when "H".
5

OPN/CLS

I/O, RD/WR

Tray open/close.

Open at "H" and Close at "L". Stop

when "Hiz".
6

DRERR

I/O, RD

7

NSTn

I/O, RD/WR

DIR LC89051V
Spindle

error signal. Error when "H".

motor non-control

voltage input.

Stop when set to 0V.
8

SPCTL1

I/O, RD/WR

Switches

the spindle servo operation

Can be set to control,
9

SPCTL0

I/O, RD/WR

non-control,

Switches the operation

mode.
acceleration.

mode between SPCTL 1 and

2Bit.
Can be set to control,
10

SPGC2

I/O, RD/WR

DETON

I/O, RD/WR

(Tout)

the gain of the "post stage" amplifier.

CD/DVD

differentiation

signal:ON

when "H"

sensor ON/OFF

(Data output during memory
12

ACDDET

I/O, RD

acceleration.

Spindle servo gain control signal.
Switches

11

non-control,

CD/DVD

differentiation

SW

test)
signal

(sensor

output

which is waveform-shaped)
13

TILT/H

I/O, RD/WR

TILT servo characteristics

switching

14

BUS_2

I/O, RD

Servo DSP busy flag:Busy

when "L"

15

ERROR

I/O, RD

Servo DSP error flag:Error

when "L"

i

(TIN)

(clk signal input during the memory

16

LOCK

I/O, RD

From ARP

17

FOK

I/O, RD

From DSP

signal

test)

18

TRAYFREE

I/O, RD/WR

Releases

19

S 12VOFF

I/O, RD/WR

Servo

20

VDD

VDD

21

GND

GND

22

SPGC 1

I/O, RDAVR

23

TBLR

I/O, RD/WR

Changer

roulette

rotation. Rotates

when "H".

24

TBLL

I/O, RD/WR

Changer

roulette

rotation. Rotates

when "H".

25

LDOUTn

I/O, RD/WR

Changer

loading OUT. Loading

26

LDINn

I/O, RD/WR

Changer

loading IN. Loading

27

ACHUCK

I/O, RD

the tray driver. Open when "L".

12V power supply OFF. 12V on when "H"

Spindle

servo gain control signal.

Switches

the gain of the "first stage" amplifier.

Mechanism

chucking

detection

out when "L".

in when "L".
signal.

"H" when chucking.
28

ATRAY

I10, RD

Tray open signal. "H" when the tray is open.

- 73 -

Pin No.
29

Signal Name
TSENS

30

DSENS

Function

RD/WR,SHIF
I/O, RD

Changer

roulette position detection

sensor.

No groove when "L". Groove is present when "H".
I/O, RD

Changer

disc presence

detection

sensor.

Present when "H" and absent when "L".
31

$3

I/O, RD

DISC detection

position (rotary sensor) 0 to 7 value

32

$2

I/O, RD

DISC detection

position (rotary sensor) 0 to 7 value

33

S1

I/O, RD

DISC detection

position (rotary sensor) 0 to 7 value

34

ACSn

I/O, RD/WR

AC3_DEC

MB86432

chip select

35

ACSI

Serial I/F, IN

AC3_DEC

MB86432

output data

36

VCSn

I/O, RD/WR

V_Enc

37

VSI

Serial I/F, IN

V_Enc CXD1914Q

38

KLTn

I/O, RD/WR

Karaoke

CXD1914Q

Chip select (XVENCCS)
output data

DSP CXD2721Q

serial data latch

39
40

VDD

VDD

41

GND

GND

42

GND

GND

43

KSI

Serial I/F, IN

Karaoke DSP CXD2721Q

44

IFSI

Serial I/F, IN

IF CON output data

45

DBSI

Serial I/F, IN

Debug serial port output data

46

SCKG3

Serial I/F, OUT

Serial Group3

47

SOG3

Serial I/F, OUT

Serial group 3 output data

48

SDEN

UO, RD/WR

SSI (SSI133P3720)

49

DCSn

I/O, RD/WR

DNR (CXD 1854Q) chip select (XDNRCS)

50

MLTn

I/O, RD/WR

DAC (CXD8696R)

51

ECSn

I/O, RD/WR

EEPROM

52

SSSD

Serial I/F, IN

SSI (SSI133P3720)

53

EESI

Serial I/F, IN

EEPROM

(BA9020F)

output data

54

EWCn

I/O, RD/WR

EEPROM

(BA9020F)

Write control (XEEWE)

55

EBSYn

I/O, RD

EEPROM

(BA9020F)

BUSY signal (XEERBS)

56

IRDn

Peripheral

I/F, OUT

Peripheral

read signal

57

IWRn

Peripheral

I/F, OUT

Peripheral

write signal

58

SDSPRDn

Peripheral

I/F, OUT

Servo DSP chip select & read

59

ARPCSn

Peripheral

I/F, OUT

ARP chip select

6O

ARPINT

Peripheral

I/F, IN

ARP INT signal input

61

ARPWTn

Peripheral

I/F, IN

ARP WAIT signal input

62

DCRCSn

63

DCRINT

64

DCRWTn

65

AVCSn

66

AVWTn

67

XWAIT'n

SHIFT, OUT

XIRQ3

SHIFT, OUT

Clock

chip select

data latch (DACLT)

(BA9020F)

chi p select (XEERCS)
input/output

DECRYPT

chip select

Peripheral

I/F, IN

DECRYPT

INT signal input

Peripheral

I/F, IN

DECRYPT

WAIT signal input

Peripheral
Peripheral

I/F, OUT
I/F, IN

AV_DEC(L64020)
AV_DEC

- 74 -

(L64020)
by AVCSn.

data

..

I/F, OUT

Peripheral

Masked

" 68

oqtput data

Chip Select
WAIT signal input.

Function

Pin No.

Signal Name

69

SIG1

SHIE OUT

70

SIG2

SHIE OUT

71

XmQ7

SHIF, OUT

72

XCS6n

SHIE IN

73

XRDn

SHIE IN

74

XLWRn

SHIE IN

75

HA21

SHIE IN

76

HA20

SHIE

77

SDSPWRn

78

CPCK

79

GND

GND

80

GND

GND

81

VDD

VDD

82

BUSGATE

83

HA19

SHIE IN

84

HA7

SHIF, IN

85

HA6

SHIE IN

86

HA5

SHIF, IN

87

HA4

SHIF, IN

88

HA3

SHIF, IN

89

HA2

SHIF, IN

90

HA1

SHIF, IN

91

HA0

SHIF, IN

92

HD7

SHIF, bidir

93

HD6

SHIF, bidir

94

HDI_

SHIF, bidir

95

HD4

SHIF, bidir

!

RD/WR,SHIF

Peripheral
SHIE

BUSCNT,

IN
I/F, OUT
IN

OUT

Servo DSP chip select & write
CPU clock

BUS buffer control.

96

HD3

SHIF, bidir

97

HD2

SHIF, bidir

98

HD1

SHIF, bidir

99

HD0

SHIF, bidir

100

VDD

VDD

101

GND

GND

102

FWON

I/O, RD/WR

ARP

block,

(for external

sync

Gate off when "H".

protection

circuit

control)

103

MD2

I/O, RD/WR

ARP block, digital audio output mute.

104

MUTE

I/O, RD/WR

ARP block, audio output mute.

105

DFCT

I/O, RD/WR

ARP block, defect detection.

106

NORF

I/O, RD/WR

ARP block, No-RF detection

107

DBGINTn

SHI, IN

108

SOG1

Serial I/F, IN

109

IFSO

Serial I/F, OUT

TXD to Serial Group 1 IF

110

DBSO

Serial I/F, OUT

TxD to Serial Group

Serial IC interruption
Serial Group

- 75 -

ON/OFF

for debugging.

Level

1 (TXD)

1 Diagnostic

Connector

Pin No.

Signal Name

111

(DIAGN)

H/W, IN

112

(CTS)

H/W, OUT

113

SCKG2, (IRQ5)

H/W, IN/OUT

Function

RD/WR,SHIF

SH serial channel

I SCLK (GROUP2)

or IRQ5

output
114

AVCK

115

CK27M

116

GAIN6n

H/W, o'UT
"

'H/W, IN
I/O, RD/WR

AV Enc CXD1914

AV CK Resync 27Mclock
AUDIO
channel

117

D2LTn

I/O, RD/wR

118

PDCLK

HW/IN

serial clock

output

gain switching

signal

4 (AC-3)

L, R (or spare port)

2 Channel

DAC Latch

13.5 M CLOCk

input

119
120

VDD

VDD

121

GND

GND

122

GND

GND

123

RESETn

H/W, IN

124

CTS

UO, RD/WR

Host status notification.

125

DIAGN

I/O, RD/WR

Presence/absence

System reset

connector.

Ready when "L"

Of connector

Connected

of diagnostic

when "L".

126

TEB

127

HsYNc

HW/IN

128

SCKG2PS

H/W, OUT

Serial Group 2 sync clock (P/S) 1 MHz

129

SOG2PS

H/W, OUT

Serial Group2 TxD

130

DC/_I3D

Memory

test setting. Normally

pull up.

HSYNC input

I/O, RD/WR

DCS control

I/O, RD/WR

Test 'tone

131

TON

132

xIFBSY

133

XSHINT

134

SCKG4

Serial I/F, OUT

Serial Group 4 Clock

135

SOG4

Serial I/F, OUT

Serial group 4 output data

136

DDLT 1n

I/O, RD/WR

DAC PCM1716

data latch-I

137

DDLT2n

' I/O, RD/WR

DAC PCM1716

data latch-2 (SL/SR)

138

DDLT3n

frO, RD/WR

DAC PCM17

139

DLTn

I/O, RD/WR

DIR LC89051V

140

OHSYNC'

H/W, OUT

141

TOFC 1

I/O, RD/WR

Tracking'Offset

142

TOFC2

I/O, RD/WR

Tracking

143

scKG4n

Serial I/F, OUT

'

I/0, RD
....I/O, RD/WR

I/F CON BUSY Status
Communication
interrupt

144

KADTS'EI_

I/O, RD/WR

Advance

KRDY

I/0, RD

i6

Grp4
Grp4

data latch Grp4
output

Control

1

-

Offset Control 2
serial clock

whether

CXD2721Q

to use

When used=H

Selects whether

the

Karaoke

DSP

(KD_SEL)

to enable or disable Karaoke

transmission.

When transmission

-76-

for

(L/R) Grp4

data latch-3 (C/SW)

HSYNC

DIR LC89051V
Selects

to I/F CON. Request

when "L"

CXD2721Q.
145

request

is enabled=H

DSP

Pin No.
146

Signal Name
CLAPBSY

Function

RD/WR,SHIF
I/O, RD

When the clap IC MSM6654
outputs

is generating

sounds,

the "H" level. When the power is turned

ON.
147

OTASUKE

I/O, RD

Active

"L" level when the help IC NJM2072M

is

needed.
148

DVD/VTR

I/O, RD/WR

149

AVCNT

I/O, RD/WR

150

EAIV/Y

Video

control.

Selects

the video

signal

external

input. Selects the external input when "H" is output.
Video control.

AV control

signal.

EURO AV ON

when "H" is output.
I/O, RD/WR

Video

control.

selected
151

E/_IV/RGB

I/O, RD/WR

Composite,

RGB selection.

VS1

I/O, RD/WR

Video control. S pin control signal.

153

FS

I/O, RD/WR

Frequency

I/O, RD/WR

External

EXCLOCK

RGB is

when "L" is output.

152

154

YC is

when "L" is output.

Video control. Composite,
selected

YC selection.

setting:L=_.
frequency

1 kHz, H=48 kHz

lock detection:L=Locked.

H=Not locked.
155

BST

I/O, RD/WR

Boost strap (when boosting

the farm)

Set to the "H" level.
156

CLAPSW1

I/O, RD/WR

Phrase input corresponding
by the clap IC MSM6654.

157

CLAPSW0

I/O, RD/WR

158

DOUTCTL

I/O, RD/WR

Phrase input corresponding
by the clap IC MSM6654.
Digital out ON/OFF
(DO-CTL)

159

GNq

160

GND

GND
GND
!

- 77 -

to the sound generated
(Required)
to the sound generated
(Required)

("H":ON,

"L":OFF)

4-6. Middle Gate Array CXD8746
4-6-1.

(IC101 on MB-78 board)

Block Diagram
a
o

rn

0
o
<
o

n-

(,3
<
a

r-

II

.C

O
CD

0)

<

/

t..o i_
o
Q

Joloele£

e_.eO olanv

/

o

:-

i..--

.._

a

a

83ZVO
/

./

_

u:,_:

_

I _-_
I _

__..1
_

>-

^

I "q

_ i 1_
O":L,,

8u.l.Va

6,ou',

I

S WlIIU61S V

P'_mI

€_lUU6!_ lO,qUOO r!

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_

I

' ....
i

i

..... .t_..t..t.

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z

o

'
I

I

- 78 -

1

!

4-6-2.

Pin Functions

Pin No.

Signal

Name

I/0

Level

From/For

Function

1

ARSTI

IN

5V

2

XLOCKI

IN

5V

3

DVD

IN

5V

4

SCK21

IN

5V

LGA

AC3 serial communication

5

SO21

IN

5V

LGA

AC3 serial communication

6

ACSI

IN

5V

LGA

AC3 serial communication

BSTI

IN

5V

LGA

FS768

IN

5V

768fs

MCK27

IN

5V

27M clock

13

TON

IN

5V

Test tone on/off

14

DC3D

IN

5V
2Ch DAC

Audio signal to 2ch DAC

m

7
8
9
10
11
12

2ch DAC data switching

15

DATA2

OUT

5V

16

LRCK2

OUT

5V

2Ch DAC

Audio signal to 2ch DAC

17

BCK2

OUT

5V

2Ch DAC

Audio signal to 2ch DAC

19

BCK9

OUT

5V

6Ch DAC

Audio signal to 6ch DAC

20

LRCK9

OUT

5V

6Ch DAC

Audio signal to 6ch DAC

21

DATF9

OUT

5V

6Ch DAC

Audio signal to 6ch DAC

22

DATR9

OUT

5V

6Ch DAC

Audio signal to 6ch DAC

23

DATC9

OUT

5V

6Ch DAC

Audio signal to 6ch DAC

18

24

t

25

BSTO

OUT

3.3V

AC-3

26

ACSO

OUT

3.3V

AC-3

AC_3 serial communication

27

SO20

OUT

3.3V

AC-3

AC_3 serial communication

28

SCK20

OUT

3.3V

AC-3

AC_3 serial communication

29

DETON

IN

3.3V

30

XLOCKO

OUT

3.3V

AC-3

31

ARSTO

OUT

3.3V

AC-3

AC_3 reset signal

33

DATC8

IN

3.3V

AC-3

Audio (C/S) signal from AC_3

34

DATR8

IN

3.3V

AC-3

Audio (RL/RR)

35

DATF8

IN

3.3V

AC-3

Audio (FR/FL) signal from AC_3

36

BCK8

IN

3.3V

AC-3

Audio signal from AC_3

37

LRCK8

IN

3.3V

AC-3

Audio signal from AC_3

39

DATA7

OUT

3.3V

AC-3

Audio signal (DIR) to AC_3

40

BCK7

OUT

3.3V

AC-3

Audio signal (DIR) to AC_3

41

LRCK7

OUT

3.3V

AC-3

Audio signal (DIR) to AC_3

32

signal from AC_3

38

- 79 -

Pin No.

Signal Name

I/O

Level

From/For

Function

OUT

3.3V

AC-3

Audio signal (Karaoke)

to AC_3

42
43

DATA5

44

BCK5

OUT

3.3V

AC-3

Audio signal (Karaoke)

to AC_3

45

LRCK5

OUT

3.3V

AC-3

Audio signal (Karaoke)

to AC_3

47

FS384

OUT

3,3V

AC-3

AC3 384fs

49

LRCK3

OUT

5V

Karaoke

Audio signal to karaoke

50

BCK3

OUT

5V

Karaoke

Audio signal to karaoke

51

DATA3

OUT

5V

Karaoke

Audio signal to karaoke

52

DATA4

IN

5V

Karaoke

Audio signal from karaoke

DATA1

IN

3.3V

AV-Dec

Audio signal from AV-Dec

AV-Dec

Audio signal from AV-Dec
Audio signal from AV-Dec

48

53
54
55

LRCK1

IN

3.3V

56

BCK1

IN

3.3V

AV-Dec

58

DATA6

IN

5V

DIR

59

LRCK6

IN

5V

DIR

60

BCK6

IN

5V

DIR

62

KDTSEL

IN

5V

Karaoke/main

63

XRST

IN

5V

Reset

57
Audio signal from DIR
Audio signal fr_rn DIR
Audio signal from DIR

61

64

- 80 -

data switching

4-7. Small Gate Array CXD8747

(MB-78 Board IC807)

4-7-1. Block Diagram

SGA

CSI
',
SCKI
!
SDI
!
CK(27MHz) i,

5V

CSO
SCKO
SDO

_l
i

LSB->MSB
InversionCircuit

,i

:

XRST

HA 0 -8

IAO- 8

DIR
HDo-7

IDo-7

OE

- 81 -

i,,.
v

4-7-2. Pin Assignment
Pin No. Signal Name
I
HA2

I/0

BUFF.TYPE

l

TLCHT

!
T

TLCHT

T

TLCHT

2

HA3

3

HA4

4

VSS

5
6

HA5
HA6

I

7

HA7

T

8
9

HA8
VDD

I

Pin No. Signal Name
51
VSS
52
53

IA1
IA0

54

VSS

55

TLCHT
TLCHT
TLCHT

TLCHT

B8
B8

DO

O

B2

56

SCKO

O

B2

57

CSO

O

B2

58
59

VDD
XRST

O

SCHMITT

60

VSS

61

CK
VDD

0

SCHMITT

HA0

O

TLCHT

HA1

O

TLCHT

VSS

II
12

HD0
HD1

I/O
I/O

BD8T
BD8T

13

HD2

I/O

BD8T

14

HD3

I/O

BD8T

15

VSS

64
65

16

HD4

UO

BD8T

66

17

HD5

I/O

BD8T

67

18

HD6

I/O

BD8T

68

I/O

BDST

69

62
63

19

HD7

20

VSS

70

21

VDD

71

22

VSS

72

23

CSI

I

TLCHT

73

24

SCKI

I

SCHMITT

74

25

DI

I

TLCHT

75

26

VDD

27

VSS

28

DIR

I

TLCHT

78

29

OE

1

TLCHT

79

30
31

NC
VDD

8O

32

VSS

82

33
34

ID7

I/O

BD8T

83

ID6

I/O

BD8T

84

35

ID5
ID4

I/O
I/O

BD8T
BD8T

85
86

76
77

81

36
37

VSS

38

ID3

I/O

BD8T

88

39

ID2

I/O

BD8T

89

40

ID1

I/O

BD8T

9O

41

ID0

I/O

BD8T

91

42

VSS

43

VDD

44

IA8

I

B8

94

45

IA7
IA6

I

B8

95

IA5

I
I

B8
B8

96
97

48

IA4

I

B8

98

49

IA3

I

B8

99

50

IA2

1

B8

100

87

92
93

- 82 -

BUFF.TYPE

O
O

i0

46
47

I/0

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Source Exif Data:
File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.2
Linearized                      : No
Page Count                      : 78
Page Layout                     : SinglePage
Page Mode                       : UseNone
Producer                        : Goby Monitor Application version 3, 2, 1, 4
Create Date                     : Sat Sep 29 12:17:39 2007
Author                          : 
Title                           : 
Subject                         : 
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