TEKSUN TECHNOLOGY 31030BT Bluetooth Speaker User Manual Module specification
SHENZHEN TEKSUN TECHNOLOGY CO.,LTD Bluetooth Speaker Module specification
Contents
- 1. User manual
- 2. Module specification
Module specification
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| Document ID | 2900309 |
| Application ID | JGiFDbznSHaRM9PPdS9d2Q== |
| Document Description | Module specification |
| Short Term Confidential | No |
| Permanent Confidential | No |
| Supercede | No |
| Document Type | User Manual |
| Display Format | Adobe Acrobat PDF - pdf |
| Filesize | 53.97kB (674596 bits) |
| Date Submitted | 2016-02-10 00:00:00 |
| Date Available | 2016-02-10 00:00:00 |
| Creation Date | 2016-01-16 10:35:49 |
| Document Lastmod | 2016-01-16 10:35:49 |
| Document Title | Module specification |
| Document Author: | yuanxuecai |
CW6631B Bluetooth Audio Player Microcontroller User Manual [CW6631B-UM-EN] Versions: 1.0.0 Release Date: 2015-12-4 II Table of content Table of content Table of content ........................................................................................................................................ II Product Overview .............................................................................................................................. 1 1.1 Outline ........................................................................................................................................ 1 1.2 Features...................................................................................................................................... 1 Pin Definitions ................................................................................................................................... 2 2.1 2.1.1 Package ............................................................................................................................... 2 2.1.2 Pin Assignment ................................................................................................................... 2 2.1.3 Pin Description.................................................................................................................... 2 CPU Core Information ....................................................................................................................... 5 3.1 Architecture ............................................................................................................................... 5 3.2 Instruction Set ............................................................................................................................ 5 3.3 Memory Mapping ...................................................................................................................... 8 3.3.1 Program Memory Mapping ................................................................................................ 8 3.3.2 External Data Memory Mapping ........................................................................................ 9 3.3.3 Internal Data Memory Mapping ......................................................................................... 9 3.4 CW6631B .................................................................................................................................... 2 Interrupt Processing ................................................................................................................. 10 3.4.1 Interrupt sources .............................................................................................................. 10 3.4.2 Interrupt Priority............................................................................................................... 12 3.5 Special Function Register Mapping (SFR) ................................................................................. 12 3.6 Extend Special Function Registers Mapping (XSFR) ................................................................. 13 3.7 CPU and Memory related SFR Description .............................................................................. 14 Reset Generation ............................................................................................................................. 24 4.1 Power-on Reset (POR) .............................................................................................................. 24 4.2 System Reset ............................................................................................................................ 24 4.2.1 LVD .................................................................................................................................... 25 4.2.2 RTCC Reset ........................................................................................................................ 26 4.2.3 Watchdog Reset ............................................................................................................... 26 CW6631B Bluetooth Audio Player Microcontroller Copyright © 2015, www.appotech.com. All Rights Reserved. Version 1.0.0 VI Table of content 15.2 15.2.1 Features .......................................................................................................................... 122 15.2.2 LFSR16 Special Function Register ................................................................................... 122 15.3 16 LFSR16 .................................................................................................................................... 122 LFSR32 .................................................................................................................................... 123 15.3.1 Features .......................................................................................................................... 123 15.3.2 LFSR32 Special Function Registers.................................................................................. 123 Integrated Interchip Sound (IIS) .................................................................................................... 124 16.1 Features.................................................................................................................................. 124 16.2 IIS Special Function Register .................................................................................................. 124 16.3 Operation Guide ..................................................................................................................... 131 17 16.3.1 CPU RD/WR..................................................................................................................... 131 16.3.2 loop ................................................................................................................................. 131 16.3.3 DMA mode...................................................................................................................... 132 PolyFuse control ............................................................................................................................ 133 17.1 PF Special Function Register .................................................................................................. 133 17.2 PF user guideline .................................................................................................................... 134 18 Characteristics ............................................................................................................................... 135 18.1 PMU Parameters .................................................................................................................... 135 18.2 CORE PLL Parameters ............................................................................................................. 135 18.3 General purpose I/O Parameters ........................................................................................... 135 18.4 Audio ADDA Parameters ........................................................................................................ 136 18.5 RF Analog Blocks .................................................................................................................... 136 19 Package Outline Dimensions ......................................................................................................... 138 19.1 SSOP28 ................................................................................................................................... 138 Revision History .......................................................................................................................................... i CW6631B Bluetooth Audio Player Microcontroller Copyright © 2015, www.appotech.com. All Rights Reserved. Version 1.0.0 1 Product Overview 1 Product Overview 1.1 Outline CW6631B is an MCS-51TM Compatible high performance mixed signal microcontroller. It integrates advanced digital and analog peripherals to suit for BT audio playback and BT Communicate applications. 1.2 Features CPU Compatible with MCS-51TM instruction set; Keypad tone mixer; Compliant Two 8-bit timers, support Capture and PWM to Bluetooth 3.0 EDR, backward-compatible with BT1.2, 2.0 and 2.1 Support SCMS-T content protection method; Support HFP v1.6, HSP v1.2, A2DP 1.3, AVCTP mode; Two 16-bit timers, support Capture and PWM mode; 1.4, AVDTP 1.3 and AVRCP 1.5 Watchdog Timer with on-chip RC oscillator; Class 2 power level, RF Performance: Tx:0dBm, Support full-duplex IIS, UART, SPI, SD interface; Rx: -80dBm; Support IIC interface for FM function; Support simple pairing and auto reconnection 2 channels 16 levels Low Voltage Detector; Power on Reset Support Full speed USB 2.0 PHY; Full speed USB 2.0 HOST/DEVICE controller; IR controller; Independent function; Support MP3/SBC decoder; Support two pairs of AUX; Six Channels 10-bit SARADC; CW6631B support 16bit Stereo DAC with >90dB SNR, embedded with four class A/B headphone amplifier 16bit Mono ADC with >90dB DR Support Audio record function to MIC ADPCM; Support Audio playback from SD/USB powered Real-Time Clock supporting 32.768kHz crystal Internal crystal oscillator support 26M crystal Internal LDO regulator:1.35V to 1.2V;4.2V to 3.3V Built-in buck converter,DC-DC:4.2V to 1.35V CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 2 2.1 CW6631B 2 Pin Definitions 2.1 CW6631B 2.1.1 Package SSOP28 2.1.2 Pin Assignment Figure 2-1 shows the pin assignment of CW6631B. P21 28 P20 MICN 27 USBDP MICP/VCM 26 USBDM AVSS 25 VDDIO/AVDD VDDHP 24 VDDLDO DACL 23 VOUT1V5 DACR 22 VBIN VCM_BUF/P01 21 XO_N P13 CW6631B SSOP28 20 XO_P VCC_VCO/VCC_XO /PAD_VDDQ GND_ANT1 P31 10 19 P32 11 18 P30 12 17 P04 13 16 RXTX PAD_VCC_IF/ VCC_RF/VCC_PA P05 14 15 P36 Figure 2-1 Pin Assignment of CW6631B 2.1.3 Pin Description Table 2-1 shows the pin description of CW6631B. Table 2-1 Pin Description of CW6631B Pin No.SSOP28 Name Type Function GPIO P21 I/O AUXR2 ADC1 CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 2 Pin Definitions Pin No.SSOP28 Name Type Function SDCLK EMIDAT1 LCD_D1 MICN MIC Negative input MICP/VCM AVSS GND Analog GND VDDHP PWR Headphone power DACR MIC Positive input DAC VCM output DAC right output GPIO input GPIO AUXR0 P01/VCM_BUF I/O UARTTX1 PORT INT/WKUP0 SDDAT2 DAC VCM buffer GPIO AUXL0 P00 I/O UARTRX1 SDDAT1 SPI0DIN2 GPIO P13 I/O ADC5 IISBCLK0 GPIO 10 P31 I/O SDCMD SPI0DIN3 GPIO 11 P32 I/O SDDAT0 SPI0DOUT3/DIN3 GPIO 12 P30 I/O ADC4 SDCLK SPI0CLK3 13 P04 I/O 14 P05 I/O 15 P36 I/O 16 17 VCC_RF/VCC_PA/ PAD_VCC_IF RXTX PWR GPIO SPI1DOUT/DIN1 GPIO SPI1CLK GPIO RF/PA Power VCC Power VCC RF Rx and Tx pin CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 4 2.1 CW6631B Pin No.SSOP28 Name Type Function 18 GND_ANT1 GND RF GND PWR Power VCC/VDDQ 19 VCC_XO/ PAD_VDDQ/ VCC_VCO 20 XO_P BT 26MHz XOSC Positive Pin 21 XO_N BT 26MHz XOSC Negative Pin 22 BVIN PWR PMU Power input Pin 4.2V(typ) 23 VOUT1V5 PWR VOUT 1.5V 24 VDDLDO PWR LDO power input 4.2V(typ) 25 VDDIO/AVDD PWR Power output VDDIO 3.3V 26 USBDM I/O USB Negative Input/output 27 USBDP I/O USB Positive Input/output GPIO AUXL2 28 P20 I/O SDCMD EMIDAT0 LCD_D0 CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 3 CPU Core Information 3 CPU Core Information 3.1 Architecture The AXC51-CORE of CW6631B is fully compatible with the MCS-51TM instruction set. The AXC51-CORE employs a pipelined architecture that greatly increases its instruction throughput over the standard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system clock cycles to execute, and usually have a maximum system clock of 12MHz. By contrast, the AXC51-CORE executes most of its instructions in 1 system clock cycle. With system clock running at 48 MHz, it has a peak throughput of 48 MIPS running in on-chip SRAM area. 3.2 Instruction Set The instruction set of the AXC51-CORE is fully compatible with the standard MCS-51TM instruction set; standard 8051 development tools can be used to develop software for the AXC51-CORE. All instructions of AXC51-CORE are the binary and functional equivalent of their MCS-51TM counterparts, including op-codes, addressing modes and effect on PSW flags. However, instruction timing is different than that of the standard 8051. Table 3-1 shows AXC51-CORE Instruction Set Summary Table 3-1 AXC51-CORE Instruction Set Summary Number of Bytes Mnemonic Operands Clock Cycles (running in IRAM) NOP AJMP code addr LJMP code addr RR INC INC data addr INC @Ri INC Rn JBC bit addr, code addr 1 or 3 ACALL code addr LCALL code addr RRC DEC DEC data addr DEC @Ri DEC Rn JB bit addr, code addr 1 or 3 RET RL ADD A, #data CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 6 3.2 Instruction Set Number of Bytes Mnemonic Operands Clock Cycles (running in IRAM) ADD A, data addr ADD A, @Ri ADD A, Rn JNB bit addr, code addr 1 or 3 RETI RLC ADDC A, #data ADDC A, data addr ADDC A, @Ri ADDC A, Rn JC code addr 1 or 3 ORL data addr, A ORL data addr, #data ORL A, #data ORL A, data addr ORL A, @Ri ORL A, Rn JNC code addr 1 or 3 ANL data addr, A ANL data addr, #data ANL A, @Ri ANL A, Rn JZ code addr 1 or 3 XRL data addr, A XRL data addr, #data XRL A, #data XRL A, data addr XRL A, @Ri XRL A, Rn JNZ code addr 1 or 3 ORL C, bit addr JMP @A+DPTR MOV A, #data MOV data addr, #data MOV @Ri, #data MOV Rn, #data SJMP code addr ANL C, bit addr MOVC* A, @A+PC DIV AB MOV data addr, data addr CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 3 CPU Core Information Number of Bytes Mnemonic Operands Clock Cycles (running in IRAM) MOV data addr, @Ri MOV data addr, Rn MOV DPTR, #data MOV bit addr, C MOVC* A, @A+DPTR SUBB A, #data SUBB A, data addr SUBB A, @Ri SUBB A, Rn ORL C, bit addr MOV C, bit addr INC DPTR MUL AB MOV @Ri, data addr MOV Rn, data addr ANL C, bit addr CPL bit addr CPL CJNE A, #data, code addr 1 or 3 CJNE A, data addr, code addr 1 or 3 CJNE @Ri, #data, code addr 1 or 3 CJNE Rn, #data, code addr 1 or 3 PUSH data addr CLR bit addr CLR SWAP XCH A, data addr XCH A, @Ri XCH A, Rn POP data addr SETB bit addr SETB DA DJNZ data addr, code addr 1 or 3 XCHD A, @Ri DJNZ Rn, code addr 1 or 3 MOVX A, @DPTR MOVX A, @Ri CLR MOV A, data addr MOV A, @Ri CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 18 Characteristics 135 18 Characteristics 18.1 PMU Parameters Table 18-1 PMU Parameters Sym Characteristics Min Typ Max Unit BVIN Buck input voltage 2.8 4.2 4.8 VDDLDO VDDLDO input voltage 2.8 4.2 4.8 VOUT1V5 Buck output voltage 1.15 1.35 1.6 VDDCORE 1.2V output voltage 1.2 VDDRTC input voltage 2.2 4.2 4.8 VDDHP 3.0V output voltage 2.8 3.0 3.3 VCM 1.5V output voltage 1.35 RVDD output voltage 1.1 1.2 1.3 VDDIO 3.3V output voltage 2.8 3.3 Conditions 18.2 CORE PLL Parameters Table 18-2 PLL Parameters Sym Characteristics Min Typ Max Unit Conditions FI1 Frequency input 32.768 KHz Low frequency OSC FI2 Frequency input 12 15 MHz High frequency OSC FOUT1 Frequency output 48 MHz TLOCK1 PLL locked time ms Use low frequency OSC as input reference TLOCK2 PLL locked time 0.1 ms Use high frequency OSC as input reference 18.3 General purpose I/O Parameters Table 18-3 I/O Parameters Symbol Description Min Typ Max Units Conditions VIL Low-Level input voltage 30% * VDDIO VDDIO = 3.3V VIH High-level input voltage 70% * VDDIO VDDIO = 3.3V RPUP0 Internal pull-up resister 0 10 KΩ RPUP1 Internal pull-up resister 1 200 KΩ RPUP2 Internal pull-up resister 2 0.5 KΩ RPDN0 Internal pull-down resister 0 10 KΩ RPDN1 Internal pull-down resister 1 0.33 KΩ RPDN2 Internal pull-down resister 2 0.5 KΩ ILEVEL1 Level1 current driving mA CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. For PORT1 Version 1.0.0 136 18.4 Audio ADDA Parameters Symbol Description Min Typ Max Units Conditions ILEVEL2 Level2 current driving 24 mA For Port1.1 18.4 Audio ADDA Parameters Table 18-4 Audio DAC Parameters Sym Characteristics Min Typ Max Unit Conditions DAC SNR&DR 90 dB 48PIN DAC SNR&DR 90 dB 28PIN & 20 PIN DAC THD+N -80 dB 10Kohm loading PWRAB ClassAB AMP power output 16 mW 32ohm loading VPP Maximum output voltage 2.6 10Kohm loading ADC SNR/DR 93 dB In Voice Band ADC THD+N 89 dB In Voice Band 18.5 RF Analog Blocks Table 18-5 Frequency Synthesizer Parameters Parameter Condition MIN typ max Unit Within +/- 25 KHz accuracy 70 us F=1 MHz -110 dBc/Hz F=2 MHz -118 dBc/Hz F3 MHz -123 dBc/Hz 26 MHz -1 +1 kHz Synthesizer Synthesizer settling time Phase Noise Fc=2.4GHz XTAL Oscillator Frequency range Frequency Trimming Range 6 bits Table 18-6 Receive path Parameters Parameter Condition MIN typ max Unit RX sensitivity -80 dBm High Gain 25 dB Mid Gain 15 dB Low Gain dB dB Receiver Channel Minimum Usable Signal LNA Gain Mixer Conversion Gain Ifamp CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 18 Characteristics 137 Parameter Condition MIN typ max Unit Gain 5/9/12/15/18 dB 12 Figure 1. MHz 30 dB Gain Range -6 +68 dB Gain Step +1/+6 dB >50 dB MIN typ max Unit Available output power -2 1.5 dBm Side Band Suppression -30 dBm MHz -7 dB Complex BPF Band pass -3 dB BW Image Rejection VGA ADMOD SNDR Freq = +- BW Table 18-7 Transmit path Parameters Parameter Condition Transmit Channel LPF Low pass -3 dB BW Figure 2. TXVGA Gain Step PA Gain Range Set paPWR[2:0] of GFSK -12 dBm Control Register #16 DPSK -15 dBm CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 138 19.1 SSOP28 19 Package Outline Dimensions 19.1 SSOP28 CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 19 Package Outline Dimensions 139 Figure 19-1 SSOP28 Package Outline Dimension CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0 19 Package Outline Dimensions Revision History Date Version Comments Revised by 2015-7-22 0.0.1 Initial version YX 2015-12-4 0.0.2 Checked GAO 2015-12-4 1.0.0 Release YX CW6631B Bluetooth Audio Player Microcontroller Copyright ©2015, www.appotech.com. All Rights Reserved. Version 1.0.0
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