Telit Communications S p A LE920A4NA Wireless Module User Manual HW User Guide

Telit Communications S.p.A. Wireless Module HW User Guide

Contents

User Manual

LE920A4 Auto
Hardware User Guide
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Applicability Table
This documentation applies to the following products:
Table 1: Applicability Table
Module Name
Description
LE920A4-NA
North America regional variant (AT&T, T-Mobile)
LE920A4-NV
North America regional variant (Verizon)
LE920A4-EU
Europe regional variant
HE920A-EU
Non-LTE Europe variant
LE920A4-CN
China variant
LE920A4-AP
APAC variant
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SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE
Notice
While reasonable efforts have been made to assure the accuracy of this document, Telit assumes
no liability resulting from any inaccuracies or omissions in this document, or from use of the
information obtained herein. The information in this document has been carefully checked and is
believed to be entirely reliable. However, no responsibility is assumed for inaccuracies or
omissions. Telit reserves the right to make changes to any products described herein and reserves
the right to revise this document and to make changes from time to time in the content hereof with
no obligation to notify any person of revisions or changes. Telit does not assume any liability arising
out of the application or use of any product, software, or circuit described herein; neither does it
convey any license under its patent rights or the rights of others.
It is possible that this publication may contain references to, or information about Telit products
(machines and programs), programming, or services that are not announced in your country. Such
references or information must not be construed to mean that Telit intends to announce such Telit
products, programming, or services in your country.
Copyrights
This instruction manual and the Telit products described in this instruction manual may be, include,
or describe copyrighted Telit material, such as computer programs stored in semiconductor
memories or other media. Laws in Italy and other countries preserve for Telit and its licensors
certain exclusive rights for copyrighted material, including the exclusive right to copy, reproduce in
any form, distribute, and make derivative works of the copyrighted material. Accordingly, any
copyrighted material of Telit and its licensors contained herein or in the Telit products described in
this instruction manual may not be copied, reproduced, distributed, merged, or modified in any
manner without the express written permission of Telit. Furthermore, the purchase of Telit
products shall not be deemed to grant either directly or by implication, estoppel, or otherwise, any
license under the copyrights, patents or patent applications of Telit, as arises by operation of law
in the sale of a product.
Computer Software Copyrights
Telit and third-party software (SW) products described in this instruction manual may include
copyrighted Telit and other third-party computer programs stored in semiconductor memories or
other media. Laws in Italy and other countries preserve for Telit and other third-party SW certain
exclusive rights for copyrighted computer programs, including the exclusive right to copy or
reproduce in any form the copyrighted computer program. Accordingly, any copyrighted Telit or
other third-party SW computer programs contained in the Telit products described in this
instruction manual may not be copied (reverse engineered) or reproduced in any manner without
the express written permission of Telit or the third-party SW supplier. Furthermore, the purchase
of Telit products shall not be deemed to grant either directly or by implication, estoppel, or
otherwise, any license under the copyrights, patents or patent applications of Telit or other third-
party SW, except for the normal non-exclusive, royalty free license to use that arises by operation
of law in the sale of a product.
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Usage and Disclosure Restrictions
License Agreements
The software described in this document is the property of Telit and its licensors. It is furnished by
an express license agreement only and may be used only in accordance with the terms of such an
agreement.
Copyrighted Materials
Software and documentation are copyrighted materials. Making unauthorized copies is prohibited
by law. No part of the software or documentation may be reproduced, transmitted, transcribed,
stored in a retrieval system, or translated into any language or computer language, in any form or
by any means, without prior written permission of Telit.
High Risk Materials
Components, units, or third-party products used in the product described herein are NOT fault-
tolerant and are NOT designed, manufactured, or intended for use as on-line control equipment in
the following hazardous environments requiring fail-safe controls: the operation of nuclear
facilities, aircraft navigation or aircraft communication systems, air traffic control, life support, or
weapons systems (“high risk activities"). Telit and its supplier(s) specifically disclaim any expressed
or implied warranty of fitness for such high risk activities.
Trademarks
TELIT and the stylized T logo are trademarks and/or registered trademarks of Telit Communications
S.p.A. in the Unites States and/or other countries. All other product or service names are the
property of their respective owners.
Copyright © 2016 Telit Communications S.p.A.
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Contents
1. Introduction ..................................................................................................... 13
1.1. Scope ................................................................................................................ 13
1.2. Audience .......................................................................................................... 13
1.3. Contact Information, Support .......................................................................... 13
1.4. Text Conventions ............................................................................................. 14
1.5. Related Documents .......................................................................................... 15
1.6. Abbreviations ................................................................................................... 15
2. General Product Description ............................................................................ 17
2.1. Overview .......................................................................................................... 17
2.2. Applications ..................................................................................................... 17
2.3. General Functionality and Main Features ....................................................... 18
2.4. Block Diagram .................................................................................................. 21
2.5. Environmental Requirements .......................................................................... 22
2.5.1. Temperature Range .............................................................................. 22
2.5.2. RoHS Compliance.................................................................................. 22
2.6. Frequency Bands .............................................................................................. 23
2.6.1. RF Bands per Regional Variant ............................................................. 23
2.6.2. Reference Table of RF Bands Characteristics ....................................... 24
2.7. Sensitivity ......................................................................................................... 26
2.8. LE920A4 Mechanical Specifications ................................................................. 27
2.8.1. Dimensions ........................................................................................... 27
2.8.2. Weight .................................................................................................. 27
3. LE920A4 Module Connections .......................................................................... 28
3.1. Pin-out .............................................................................................................. 28
3.2. LE920A4 Signals That Must Be Connected ...................................................... 44
3.3. LGA Pads Layout ............................................................................................... 46
3.4. Backward Compatibility to LE920 .................................................................... 47
4. Electrical Specifications .................................................................................... 48
4.1. Absolute Maximum Ratings Not Operational ............................................... 48
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4.2. Recommended Operating Conditions ............................................................. 48
4.3. Logic Level Specifications ................................................................................. 49
4.3.1. 1.8V Pads - Absolute Maximum Ratings ............................................... 49
4.3.2. 1.8V Standard GPIOs ............................................................................ 49
4.3.3. 1.8V SD Card Pads ................................................................................. 50
4.3.4. 1.8V SIM Card Pads ............................................................................... 50
4.3.5. Dual Voltage Pads - Absolute Maximum Ratings ................................. 51
4.3.6. SD Card Pads @ 2.95V .......................................................................... 51
4.3.7. SIM Card Pads @2.95V ......................................................................... 52
5. Hardware Commands ....................................................................................... 53
5.1. Turning on the LE920A4 Module ..................................................................... 53
5.2. Initialization and Activation State .................................................................... 53
5.3. Turning off the LE920A4 Module ..................................................................... 55
5.3.1. Shutdown by Software Command ....................................................... 55
5.3.2. Hardware Shutdown ............................................................................. 56
5.3.3. Unconditional Hardware Reset ............................................................ 57
5.3.4. Unconditional Hardware Shutdown ..................................................... 58
6. Power Supply ................................................................................................... 59
6.1. Power Supply Requirements............................................................................ 59
6.2. General Design Rules ....................................................................................... 61
6.2.1. Electrical Design Guidelines .................................................................. 61
6.2.1.1. + 5V Input Source Power Supply Design Guidelines ......... 61
6.2.1.2. + 12V Input Source Power Supply Design Guidelines ....... 62
6.2.1.3. Battery Source Power Supply Design Guidelines .............. 64
6.2.2. Thermal Design Guidelines ................................................................... 65
6.2.3. Power Supply PCB Layout Guidelines ................................................... 66
7. Antenna(s) ....................................................................................................... 67
7.1. GSM/WCDMA/LTE Antenna Requirements ..................................................... 67
7.2. GSM/WCDMA/LTE Antenna PCB Line Guidelines ......................................... 68
7.3. GSM/WCDMA/LTE Antenna Installation Guidelines .................................... 69
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7.4. Antenna Diversity Requirements ..................................................................... 69
7.5. GNSS Antenna Requirements .......................................................................... 70
7.5.1. Combined GNSS Antenna ..................................................................... 70
7.5.2. Linear and Patch GNSS Antenna ........................................................... 70
7.5.3. Front End Design Considerations ......................................................... 70
7.5.4. GNSS Antenna PCB Line Guidelines ................................................... 71
7.5.5. GNSS Antenna Installation Guidelines ............................................... 71
8. Hardware Interfaces......................................................................................... 72
8.1. USB Port ........................................................................................................... 73
8.2. HSIC Interface .................................................................................................. 74
8.3. Ethernet Connectivity (optional) ..................................................................... 74
8.3.1. SGMII Interface ..................................................................................... 74
8.3.2. Ethernet Control interface ................................................................... 74
8.4. Serial Ports ....................................................................................................... 75
8.4.1. Modem Serial Port 1 Signals ................................................................. 75
8.4.2. Modem Serial Port 2 ............................................................................. 76
8.4.3. RS232 Level Translation ........................................................................ 77
8.5. Peripheral Ports ............................................................................................... 78
8.5.1. SPI Serial Peripheral Interface ........................................................... 79
8.5.2. I2C - Inter-integrated Circuit ................................................................ 79
8.5.3. SD/MMC Card Interface ....................................................................... 81
8.5.4. WiFi SDIO Interface .............................................................................. 83
8.6. Audio Interface ................................................................................................ 84
8.6.1. Analog Audio ........................................................................................ 84
8.6.2. Digital Audio ......................................................................................... 85
8.6.2.1. Short Frame Timing Diagrams .............................................. 86
8.6.2.2. Long Frame Timing Diagrams ............................................... 88
8.7. General Purpose I/O ........................................................................................ 90
8.7.1. Using a GPIO Pad as Input .................................................................... 92
8.7.2. Using a GPIO Pad as an interrupt ......................................................... 92
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8.7.3. Using a GPIO Pad as Output ................................................................. 92
9. Miscellaneous Functions .................................................................................. 93
9.1. Indication of Network Service Availability ....................................................... 93
9.2. RTC Real Time Clock ...................................................................................... 94
9.3. VAUX Power Output ........................................................................................ 94
9.4. ADC Converter ................................................................................................. 94
9.4.1. Description............................................................................................ 94
9.4.2. Using the ADC Converter ...................................................................... 95
9.5. Using the Temperature Monitor Function ...................................................... 95
9.6. Fuel Gauge (optional) ...................................................................................... 95
9.7. GNSS Characteristics ........................................................................................ 96
10. Mounting the Module on your Board ............................................................... 97
10.1. General ............................................................................................................. 97
10.2. Finishing & Dimensions .................................................................................... 97
10.3. Recommended Footprint for the Application ................................................. 98
10.4. Stencil ............................................................................................................... 99
10.5. PCB Pad Design ................................................................................................ 99
10.6. Recommendations for PCB Pad Dimensions (mm) ........................................ 100
10.7. Solder Paste ................................................................................................... 101
10.7.1. Solder Reflow ...................................................................................... 101
11. Application Guide ........................................................................................... 103
11.1. Debug of the LE920A4 Module in Production ............................................... 103
11.2. Bypass Capacitor on Power Supplies ............................................................. 104
11.3. SIM Interface .................................................................................................. 105
11.3.1. SIM Schematic Example ...................................................................... 105
11.4. EMC Recommendations ................................................................................. 106
11.5. Download and Debug Port ............................................................................. 106
11.5.1. Fast Boot Mode .................................................................................. 106
11.5.2. Recovery Boot Mode .......................................................................... 106
11.6. Antenna Detection ......................................................................................... 107
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12. Packing System ............................................................................................... 108
12.1. Tray ................................................................................................................ 108
12.2. Tape & Reel .................................................................................................... 111
12.3. Moisture Sensitivity ....................................................................................... 112
13. Safety Recommendations ................................................................................ 113
14. Conformity assessment issues ......................................................................... 114
14.1. FCC/ISED Regulatory notices ......................................................................... 114
15. Document History ........................................................................................... 117
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List of Tables
Table 1: Applicability Table ................................................................................................................. 2
Table 2: Related Documents ............................................................................................................ 15
Table 3: Main Features ..................................................................................................................... 18
Table 4: RF Bands per Regional Variant ............................................................................................ 23
Table 5: RF Bands Characteristics ..................................................................................................... 24
Table 6: LE20A4 Pin-out .................................................................................................................... 28
Table 7: Mandatory Signals .............................................................................................................. 44
Table 8: Absolute Maximum Ratings Not Operational .................................................................. 48
Table 9: Recommended Operating Conditions ................................................................................ 48
Table 10: Absolute Maximum Ratings - Not Functional ................................................................... 49
Table 11: Operating Range Interface Levels (1.8V CMOS) ............................................................ 49
Table 12: Operating Range SD Card Pads Working at 1.8V ........................................................... 50
Table 13: Operating Range SIM Pads Working at 1.8V.................................................................. 50
Table 14: Absolute Maximum Ratings - Not Functional ................................................................... 51
Table 15: Operating Range For SD Card Pads Operating at 2.95V ................................................ 51
Table 16: Operating Range For SIM Pads Operating at 2.95V ....................................................... 52
Table 17: Power Supply Requirements ............................................................................................ 59
Table 18: LE920A4 Current Consumption ........................................................................................ 59
Table 19: GSM / WCDMA/ LTE Antenna Requirements ................................................................... 67
Table 20: Antenna Line on PCB Requirements ................................................................................. 67
Table 21: Antenna Diversity Requirements ...................................................................................... 69
Table 22: Antenna Line on PCB Requirements ................................................................................. 71
Table 23: LE920A4 Hardware Interfaces .......................................................................................... 72
Table 24: USB Interface Signals ........................................................................................................ 73
Table 25: Ethernet Control Interface Signals .................................................................................... 74
Table 26: Modem Serial Port 1 Signals ............................................................................................. 75
Table 27: Modem Serial Port 2 Signals ............................................................................................. 77
Table 28: SPI Signals ......................................................................................................................... 79
Table 29: SD Card Signals .................................................................................................................. 81
Table 30: WiFi SDIO Interface ........................................................................................................... 83
Table 31: Analog Audio Signals ......................................................................................................... 84
Table 32: Digital Audio Interface (DVI) Signals ................................................................................. 85
Table 33: PCM_CODEC Timing Parameters ...................................................................................... 87
Table 34: AUX_PCM_CODEC Timing Parameters ............................................................................. 89
Table 35: Primary GPIOs ................................................................................................................... 90
Table 36: Additional GPIOs ............................................................................................................... 91
Table 37: Network Service Availability Indication ............................................................................ 93
Table 38: Operating Range VAUX Power Supply ........................................................................... 94
Table 39: ADC Parameters ................................................................................................................ 94
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Table 40: GNSS Characteristics ......................................................................................................... 96
Table 41: Recommendations for PCB Pad Surfaces ....................................................................... 100
Table 42: Solder Profile Characteristics .......................................................................................... 102
Table 43: SIM Interface C1 Range ................................................................................................ 105
Table 44: EMC Recommendations ................................................................................................. 106
Table 45: Tray Packing .................................................................................................................... 108
Table 46: Tray Packing Quantities .................................................................................................. 108
Table 47: Document Revision History ............................................................................................ 117
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List of Figures
Figure 1: LE920A4 Block Diagram ..................................................................................................... 21
Figure 2: LGA Pads Layout ................................................................................................................ 46
Figure 3: LE920A4 vs. LE920 Pin-out Comparison ............................................................................ 47
Figure 4: Power-on Circuit ................................................................................................................ 53
Figure 5: LE920A4 Initialization and Activation ................................................................................ 54
Figure 6: Shutdown by Software Command ..................................................................................... 55
Figure 7: Hardware Shutdown via ON_OFF ...................................................................................... 56
Figure 8: Circuit for Unconditional Hardware Reset ........................................................................ 57
Figure 9: Alternate Connection of RESET_N Pad .............................................................................. 57
Figure 10: Circuit for Unconditional Hardware Shutdown ............................................................... 58
Figure 11 Power down timing using SHDN_N .................................................................................. 58
Figure 12: Example of Linear Regulator with 5V Input ..................................................................... 62
Figure 13: Example of Switching Regulator with 12V Input Part 1 ................................................ 63
Figure 14: Example of Switching Regulator with 12V Input Part 2 ................................................ 63
Figure 15: RS232 Level Adaption Circuitry Example ......................................................................... 78
Figure 16: RS232 Serial Port Lines Connection Layout ..................................................................... 78
Figure 17: SPI Signal Connectivity ..................................................................................................... 79
Figure 18: SD Interface Connectivity ................................................................................................ 82
Figure 19: Primary PCM Timing ........................................................................................................ 86
Figure 20: Auxiliary PCM Timing ....................................................................................................... 88
Figure 21: GPIO Output Pad Equivalent Circuit ................................................................................ 92
Figure 22: Status LED Reference Circuit ........................................................................................... 93
Figure 23: Fuel Gauge Connectivity Example ................................................................................... 95
Figure 24: LE920A4 Mechanical Dimensions .................................................................................... 97
Figure 25: Recommended Footprint (Top View) .............................................................................. 98
Figure 26: PCB Pad Design ................................................................................................................ 99
Figure 27: PCB Pad Dimensions ...................................................................................................... 100
Figure 28: Solder Reflow Profile ..................................................................................................... 101
Figure 29: SIM Schematics .............................................................................................................. 105
Figure 30: Tray Packing ................................................................................................................... 109
Figure 31: Tray Drawing .................................................................................................................. 110
Figure 32: Module Positioning into the Carrier .............................................................................. 111
Figure 33: Carrier Tape Detail ......................................................................................................... 111
Figure 34: Reel Detail ...................................................................................................................... 112
Figure 35: Reel Box Detail ............................................................................................................... 112
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1. Introduction
1.1. Scope
This document introduces the Telit LE920A4 module and presents possible and recommended
hardware solutions for developing a product based on the LE920A4 module. All the features and
solutions detailed in this document are applicable to all LE920A4 variants, where “LE920A4
refers to the variants listed in the applicability table.
If a specific feature is applicable to a specific product only, it will be clearly marked.
NOTE:
LE920A4 refers to all modules listed in the Applicability Table.
This document takes into account all the basic functions of a wireless module; a valid hardware
solution is suggested for each function, and incorrect solutions and common errors to be avoided
are pointed out.
Obviously, this document cannot embrace every hardware solution or every product that can be
designed. Obviously, avoiding invalid solutions must be considered mandatory. Where the
suggested hardware configurations need not be considered mandatory, the information given
should be used as a guide and a starting point for properly developing your product with the Telit
LE920A4 module.
NOTE:
The integration of the GSM/GPRS/EGPRS/WCDMA/HSPA+/LTE LE920A4 cellular module within a
user application must be done according to the design rules described in this manual.
1.2. Audience
This document is intended for Telit customers, especially system integrators, about to implement
their applications using the Telit LE920A4 module.
1.3. Contact Information, Support
For general contact, technical support, to report documentation errors and to order manuals,
contact Telit’s Technical Support Center (TTSC) at:
TS-EMEA@telit.com
TS-NORTHAMERICA@telit.com
TS-LATINAMERICA@telit.com
TS-APAC@telit.com
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Alternatively, use:
http://www.telit.com/en/products/technical-support-center/contact.php
For detailed information about where you can buy the Telit modules or for recommendations on
accessories and components, visit:
http://www.telit.com
To register for product news and announcements or for product questions contact Telit’s
Technical Support Center (TTSC).
Our aim is to make this guide as helpful as possible. Keep us informed of your comments and
suggestions for improvements.
Telit appreciates feedback from the users about the information provided.
1.4. Text Conventions
The following conventions are used to emphasize specific types of information:
DANGER:
This information MUST be followed or catastrophic equipment failure or bodily injury may
occur.
CAUTION or WARNING:
Alerts the user to important points about integrating the module. If these points are not
followed, the module and end user equipment may fail or malfunction.
NOTE:
Tip or Information Provides advice and suggestions that may be useful when integrating the
module.
All dates are in ISO 8601 format, that is, YYYY-MM-DD.
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1.5. Related Documents
Table 2: Related Documents
Document Title
Document Number
Ref 1: LE920A4 AT Command User Guide
80490ST10778A
Ref 2: LE920A4 Software Guide
1VV0301332
Ref 3: Generic EVB HW User Guide
1VV0301249
Ref 4: LE920A4 Interface Board HW User Guide
1VV0301248
Ref 5: xE920 Audio Settings Application Note
80404NT10095A
Ref 6: LE920 Hardware User Guide
1VV0301026
Ref 7: SIM Integration Design Guide Application Note Rev10
80000NT10001A
Ref 8: Telit_LE920A4_LE910Cx_Wi-Fi_Interface_Application_Note_r1
80490NT11511A
Ref 9: Antenna Detection Application Note
80000NT10002A
Ref 10: High-Speed Inter-Chip USB Electrical Specification, version 1.0
(a supplement to the USB 2.0 specification, Section 3.8.2)
1.6. Abbreviations
Term
ADC
AE
DAC
DTE
FDD
GLONASS
GNSS
GPIO
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Term
GPRS
GPS
GSM
HSIC
I2C
LTE
SD
SGMII
SIM
SOC
SMX
SPI
UART
UMTS
USB
WCI
WCDMA
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2. General Product Description
2.1. Overview
LE920A4 is Telit’s platform for automotive telematics on-board units (OBU's) for applications,
such as automotive telematics and eCall, based on the following technologies:
4G cellular for voice and data communication
GNSS - GPS, GLONASS, BeiDou, Galileo, QZSS, for positioning service
Embedded security
o ARM Trust Zone services
o Hardware security processor (optional)
Designed for automotive markets
1
quality needs
In its most basic use case, LE920A4 can be applied as a wireless communication front-end for
telematics products, offering GNSS and mobile communication features to an external host CPU
through its rich interfaces.
LE920A4 can further support customer software applications and security features. LE920A4
provides a software application development environment with sufficient system resources for
creating rich on-board applications. Thanks to a dedicated application processor and embedded
security resources, product developers and manufacturers can create products that guarantee
fraud prevention and tamper evidence without extra effort for additional security precautions.
LE920A4 can be self-sufficient and serve as a fully integrated solution for applications, such as
location-based cellular telematics, navigation, road pricing and eCall. In such a case, the customer
would simply complement the module with a power supply, speaker amplifier, microphone,
antennas, and an HMI (if applicable).
LE920A4 is available in hardware variants as listed in Table 1: Applicability Table. The designated
RF band sets per each variant are detailed in Section 2.6.1, RF Bands per Regional Variant.
2.2. Applications
LE920A4 can be used for telematics applications where tamper-resistance, confidentiality,
integrity, and authenticity of end-user information are required, for example:
Emergency call
Telematics services
Road pricing
Pay-as-you-drive insurance
Stolen vehicles tracking
Internet connectivity
1
In accordance with Telit’s Robustness Validation, using AEC-Q100-defined qualification tests.
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2.3. General Functionality and Main Features
The LE920A4 family of automotive cellular modules features LTE and multi-RAT modem together
with an on-chip powerful application processor and a rich set of interfaces.
The major functions and features are listed below.
Table 3: Main Features
Function
Features
Modem
Multi-RAT cellular modem for voice and data communication
o LTE FDD/TDD Cat4 (150/50 Mbps DL/UL)
o GSM/GPRS/EDGE
o WCDMA up to DC HSPA+, Rel.9
o TD-SCDMA (China variant only)
Support for European eCall , US E911, and ERA Glonass
Support for SIM profile switching
Regional variants with optimal choice of RF bands for worldwide coverage
of countries and MNOs
State-of-the-art GNSS solution with GPS/GLONASS/BeiDou/Galileo/QZSS
receiver
Audio subsystem
Embedded analog codec with two microphone inputs
Embedded analog codec with one stereo or two mono outputs
PCM/I2S digital audio interface
Up to 48 kHz sample rate, 16 bit words
Two USIM ports
dual voltage
Class B and Class C support
Hot swap support
Clock rates up to 4 MHz
Application
processor
Application processor to run customer application code
32 bit ARM Cortex-A7 up to 1.2 GHz running the Linux operating system
Flash + DDR are large enough to allow for customer’s own software
applications
Default memory configuration is 4Gb (512MB) Flash + 2Gb (256MB) RAM
Other memory configuration can be supported upon request, for example:
2Gbit Flash + 2Gbit DDR, 4Gbit Flash + 4Gbit DDR.
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Function
Features
Interfaces
Rich set of interfaces, including:
SD/MMC Card Interface supporting SD3.0 standard
SDIO for external WiFi transceiver supporting SDIO3.0 standard
SGMII for external Ethernet transceiver (optional)
o Compliant with IEEE802.3
o Full duplex operation at 1 Gbps
o Half/full duplex operation at 10/100 Mbps
o Support for VLAN tagging
o Support for IEEE1588, PTP (Precision Time Protocol)
USB2.0 USB port is typically used for:
o Flashing of firmware and module configuration
o Production testing
o Accessing the Application Processor’s file system
o AT command access
o High-speed WWAN access to external host
o Diagnostic monitoring and debugging
o Communication between Java application environment and an external
host CPU
o NMEA data to an external host CPU
HSIC
o High-speed 480 Mbps (240 MHz DDR) USB transfers are 100% host driver
compatible with traditional USB cable connected topologies
o Bidirectional data strobe signal (STROBE)
o Bidirectional data signal (DATA)
o No power consumption unless a transfer is in progress
o Maximum trace length 10 cm
o Signals driven at 1.2V standard LVCMOS levels
Peripheral Ports SPI, I2C, UART
GPIOs
Analog audio I/F
Antenna ports
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Function
Features
Major software
features
Advanced security features
o Boot integrity of firmware up to customer applications
o Disable/secure re-enable of debug
o Embedded security
FOTA (optional)
Telit Unified AT command set
Java VM (optional) with the following features:
o Rich and standardized application environment for customer applications
o State-of-the-art and high performance Java SE8 embedded Virtual
Machine
o Oracle Java SE8 Embedded, Compact Profile 1
o JIT-enabled
Form factor
Form factor (40x34mm), accommodating the multiple RF bands in each region
variant
Environment and
quality requirements
The entire module is designed and qualified by Telit for satisfying the environment
and quality requirements for use in automotive applications2.
Single supply module
The module generates all its internal supply voltages.
RTC
RTC is maintained as long as VBATT is supplied
Operating
temperature
Range -40 °C to +85 °C
(conditions as defined in Section 2.5.1, Temperature Range)
2
In accordance with Telit’s Robustness Validation, using AEC-Q100-defined qualification tests
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2.4. Block Diagram
Figure 1 shows an overview of the internal architecture of the LE920A4 module.
It includes the following sub-functions:
Application processor, Modem subsystem and Location processing with their external
interfaces. These three functions are contained in a single SOC.
RF front end, including antenna diagnosis circuitry
Analog Audio codec for attaching external speaker amplifier and microphone
Rich IO interfaces. Depending on which LE920A4 software features are enabled, some of
its interfaces that are exported through multiplexing may be used internally and thus may
not be usable by the application.
PMIC with the RTC function inside
Figure 1: LE920A4 Block Diagram
ANT
DIAG
Memories
RF
Frontend
GNSS Antennna
GPIO
Cellular Antenna 1
Cellular Antenna 2
Microphone
Ear / Line out
PCM In/out
SIM
GNSS_Sync
Application
Processor
Modem
Location
HSICI2C
ANT
DIAG
USB2.0SGMIISPI
UART
JTAG
Audio
CODEC
2xSDIO
PMIC VBATT
ADC
VBATT_PA
RTC
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2.5. Environmental Requirements
2.5.1. Temperature Range
Operating
temperature range
-20 ~ +55°C
This range is defined by 3GPP (the global standard for wireless mobile
communication). Telit guarantees its modules to comply with all the
3GPP requirements and to have full functionality of the module with in
this range.
-40 ~ +85°C
Telit guarantees full functionality within this range as well. However,
there may possibly be some performance deviations in this extended
range relative to 3GPP requirements, which means that some RF
parameters may deviate from the 3GPP specification in the order of a
few dB. For example: receiver sensitivity or maximum output power may
be slightly degraded.
Even so, all the functionalities, such as call connection, SMS, USB
communication, UART activation etc., will be maintained, and the effect
of such degradations will not lead to malfunction.
40°C ~ +95°C
eCall must be functional (until the module is broken)
Storage and non-
operating
temperature range
40°C ~ +105°C
2.5.2. RoHS Compliance
As a part of the Telit corporate policy of environmental protection, the LE920A4 complies with
the RoHS (Restriction of Hazardous Substances) directive of the European Union (EU directive
2011/65/EU).
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2.6. Frequency Bands
The operating frequencies in GSM850, EGSM900, DCS1800, PCS1900, WCDMA & LTE modes
conform to the 3GPP specifications.
2.6.1. RF Bands per Regional Variant
Table 4 summarizes all region variants within the LE920A4 family, showing the supported band
sets in each variant.
Table 4: RF Bands per Regional Variant
Region
Variant
LTE FDD
LTE TDD
HSPA+
TD-
SCDMA
2G
LE920A4-NA
2, 4, 5, 7(*), 12
-
2, 4, 5
-
2, 5
LE920A4-NV
(TBD)
2, 4, 5, 7(*), 13
-
2, 5
-
-
LE920A4-EU
1, 3, 5(*), 7, 8, 20, 28(*)
-
1, 3, 5(*), 8
-
3, 8
HE920A-EU
(Non-LTE,
TBD)
-
-
1, 3, 5, 8
-
2, 3, 5, 8
LE920A4-CN
1, 3, 5, 8, 26
38, 39, 40, 41M
1, 5, 8
34, 39
3, 8
LE920A4-AP
(TBD)
1, 3, 5, 7, 8, 19, 21, 26,
28
-
1, 3, 5, 8, 19
-
2, 3, 5, 8
(*) Indicates optional bands, with a different schedule than the standard configuration
Band 41M for China: 2,555-2,655 MHz
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2.6.2. Reference Table of RF Bands Characteristics
Table 5: RF Bands Characteristics
Mode
Freq. Tx (MHz)
Freq. Rx (MHz)
Channels
Tx-Rx Offset
PCS 1900
1850.2 ~
1909.8
1930.2 ~ 1989.8
512 ~ 810
80 MHz
DCS 1800
1710 ~ 1785
1805 ~ 1880
512 ~ 885
95 MHz
GSM 850
824.2 ~ 848.8
869.2 ~ 893.8
128 ~ 251
45 MHz
EGSM 900
890 ~ 915
935 ~ 960
0 ~ 124
45 MHz
880 ~ 890
925 ~ 935
975 ~ 1023
45 MHz
WCDMA 2100 B1
1920 ~ 1980
2110 ~ 2170
Tx: 9612 ~ 9888
Rx: 10562 ~ 10838
190 MHz
WCDMA 1900 B2
1850 ~ 1910
1930 ~ 1990
Tx: 9262 ~ 9538
Rx: 9662 ~ 9938
80 MHz
WCDMA 1800 B3
1710 ~ 1785
1805 ~ 1880
Tx: 937 ~ 1288
Rx: 1162 ~ 1513
95 MHz
WCDMA AWS B4
1710 ~ 1755
2110 ~ 2155
Tx: 1312 ~ 1513
Rx: 1537 ~ 1738
400 MHz
WCDMA 850 B5
824 ~ 849
869 ~ 894
Tx: 4132 ~ 4233
Rx: 4357 ~ 4458
45 MHz
WCDMA 900 B8
880 ~ 915
925 ~ 960
Tx: 2712 ~ 2863
Rx: 2937 ~ 3088
45 MHz
WCDMA 1800 B9
1750 ~ 1784.8
1845 ~ 1879.8
Tx: 8762 ~ 8912
Rx: 9237 ~ 9387
95 MHz
WCDMA 800 B19
830 ~ 845
875 ~ 890
Tx: 312 ~ 363
Rx: 712 ~ 763
45 MHz
TDSCDMA 2000 B34
2010 ~ 2025
2010 ~ 2025
Tx: 10054 ~ 10121
Rx: 10054 ~ 10121
0 MHz
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Mode
Freq. Tx (MHz)
Freq. Rx (MHz)
Channels
Tx-Rx Offset
TDSCDMA 1900 B39
1880 ~ 1920
1880 ~ 1920
Tx: 9404 ~ 9596
Rx: 9404 ~ 9596
0 MHz
LTE 2100 B1
1920 ~ 1980
2110 ~ 2170
Tx: 18000 ~ 18599
Rx: 0 ~ 599
190 MHz
LTE 1900 B2
1850 ~ 1910
1930 ~ 1990
Tx: 18600 ~ 19199
Rx: 600 ~ 1199
80 MHz
LTE 1800 B3
1710 ~ 1785
1805 ~ 1880
Tx: 19200 ~ 19949
Rx: 1200 ~ 1949
95 MHz
LTE AWS B4
1710 ~ 1755
2110 ~ 2155
Tx: 19950 ~ 20399
Rx: 1950 ~ 2399
400 MHz
LTE 850 B5
824 ~ 849
869 ~ 894
Tx: 20400 ~ 20649
Rx: 2400 ~ 2649
45 MHz
LTE 2600 B7
2500 ~ 2570
2620 ~ 2690
Tx: 20750 ~ 21449
Rx: 2750 ~ 3449
120 MHz
LTE 900 B8
880 ~ 915
925 ~ 960
Tx: 21450 ~ 21799
Rx: 3450 ~ 3799
45 MHz
LTE 1800 B9
1749.9 ~
1784.9
1844.9 ~ 1879.9
Tx: 21800 ~ 2149
Rx: 3800 ~ 4149
95 MHz
LTE AWS+ B10
1710 ~ 1770
2110 ~ 2170
Tx: 22150 ~ 22749
Rx: 4150 ~ 4749
400 MHz
LTE 700a B12
699 ~ 716
729 ~ 746
Tx : 23010 ~ 23179
Rx : 5010 ~ 5179
30 MHz
LTE 700c B13
777 ~ 787
746 ~ 756
Tx : 27210 ~ 27659
Rx : 9210 ~ 9659
-31 MHz
LTE 700b B17
704 ~ 716
734 ~ 746
Tx: 23730 ~ 23849
Rx: 5730 ~ 5849
30 MHz
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Mode
Freq. Tx (MHz)
Freq. Rx (MHz)
Channels
Tx-Rx Offset
LTE 800 B19
830 ~ 845
875 ~ 890
Tx: 24000 ~ 24149
Rx: 6000 ~ 6149
45 MHz
LTE 800 B20
832 ~ 862
791 ~ 821
Tx: 24150 ~ 24449
Rx: 6150 ~ 6449
-41 MHz
LTE 1500 B21
1447.9 ~
1462.9
1495.9 ~ 1510.9
Tx: 24450 ~ 24599
Rx: 6450 ~ 6599
48 MHz
LTE 850+ B26
814 ~ 849
859 ~ 894
Tx: 26690 ~ 27039
Rx: 8690 ~ 9039
45 MHz
LTE 700 B28
703 ~ 748
758 ~ 803
Tx : 27210 ~ 27659
Rx : 9210 ~ 9659
45 MHz
LTE TDD 2600 B38
2570 ~ 2620
2570 ~ 2620
Tx: 37750 ~ 38250
Rx: 37750 ~ 38250
0 MHz
LTE TDD 1900 B39
1880 ~ 1920
1880 ~ 1920
Tx: 38250 ~ 38650
Rx: 38250 ~ 38650
0 MHz
LTE TDD 2300 B40
2300 ~ 2400
2300 ~ 2400
Tx: 38650 ~ 39650
Rx: 38650 ~ 39650
0 MHz
LTE TDD 2500 B41
2496 ~ 2690
2496 ~ 2690
Tx: 39650 ~ 41590
Rx: 39650 ~ 41590
0 MHz
2.7. Sensitivity
LE920A4 maximum sensitivity levels are as follow:
-108 dBm (TBD) @ 2G
-111 dBm (TBD) @ 3G
-102 dBm (TBD) @ 4G FDD (BW=5 MHz)
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2.8. LE920A4 Mechanical Specifications
2.8.1. Dimensions
The LE920A4 module’s overall dimensions are:
Length: 34 mm, +/- 0.15 mm tolerance
Width: 40 mm, +/- 0.15 mm tolerance
Thickness: 2.9 mm, +/- 0.15 mm tolerance
2.8.2. Weight
The nominal weight of the LE920A4 module is 9.0 gram.
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3. LE920A4 Module Connections
3.1. Pin-out
Table 6: LE20A4 Pin-out
PAD
Signal
I/O
Function
Type
Comment
USB HS 2.0 Communication Port
D19
USB_D+
I/O
USB differential data(+)
F19
USB_D-
I/O
USB differential data(-)
A18
USB_VBUS
AI
Power sense for the internal USB transceiver
Power
2.5V-5.5V
B19
USB_ID
AI
USB ID for supporting USB2.0 OTG
Asynchronous UART
AH19
C103/TXD
I
Serial data input (TXD) from DTE
1.8V
AF19
C104/RXD
O
Serial data output to DTE
1.8V
AA18
C105/RTS
I
Input for Request To Send signal (RTS) from
DTE
1.8V
AK19
C106/CTS
O
Output for Clear To Send signal (CTS) to DTE
1.8V
AG18
C107/DSR
O
Output for Data Set Ready (DSR) to DTE
1.8V
Alternate Fn
GPIO_32
AC18
C108/DTR
I
Input for Data Terminal Ready (DTR) from
DTE
1.8V
Alternate Fn
GPIO_34
AE18
C109/DCD
O
Output for Data Carrier Detect (DCD) to DTE
1.8V
Alternate Fn
GPIO_33
AJ18
C125/RING
O
Output for Ring Indication (RI) to DTE
1.8V
Alternate Fn
GPIO_31
Asynchronous Auxiliary UART
AB19
TX_AUX
O
Auxiliary UART (Tx Data to DTE)
1.8V
AD19
RX_AUX
I
Auxiliary UART (Rx Data from DTE)
1.8V
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PAD
Signal
I/O
Function
Type
Comment
SPI Serial Peripheral Interface
P19
SPI_CLK
O
SPI clock output
1.8V
M19
SPI_MISO
I
SPI data Master Input Slave Output
1.8V
K19
SPI_MOSI
O
SPI data Master Output Slave Input
1.8V
N18
SPI_CS
O
SPI chip select output
1.8V
SD/MMC Card Interface
AH17
SD/MMC_CMD
O
SD command
1.8/2.95V
AD17
SD/MMC_CLK
O
SD card clock
1.8/2.95V
Y17
SD/MMC_DATA0
I/O
SD Serial Data 0
1.8/2.95V
AF17
SD/MMC_DATA1
I/O
SD Serial Data 1
1.8/2.95V
AB17
SD/MMC_DATA2
I/O
SD Serial Data 2
1.8/2.95V
W17
SD/MMC_DATA3
I/O
SD Serial Data 3
1.8/2.95V
U17
SD/MMC_CD
I
SD card detect input
1.8V
Active Low
S17
VMMC
-
Power supply for MMC card pull-up resistors
1.8/2.95V
WiFi (SDIO) Interface
AB3
WiFi_SD_CMD
O
WiFi SD command
1.8V
AM3
WiFi_SD_CLK
O
WiFi SD clock
1.8V
AD3
WiFi_SD_DATA0
I/O
WiFi SD Serial Data 0
1.8V
AF3
WiFi_SD_DATA1
I/O
WiFi SD Serial Data 1
1.8V
AH3
WiFi_SD_DATA2
I/O
WiFi SD Serial Data 2
1.8V
AK3
WiFi_SD_DATA3
I/O
WiFi SD Serial Data 3
1.8V
Y3
WiFi_SDRST
O
WiFi Reset / Power enable control
1.8V
Active Low
AA4
WLAN_SLEEP_CLK
O
WiFi Sleep clock output
1.8V
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PAD
Signal
I/O
Function
Type
Comment
X4
RFCLK2_QCA
O
WiFi low-noise RF clock output
1.8V
LTE-WiFi Coexistence
AS3
WCI_TX
O
Wireless coexistence interface TXD
1.8V
AT2
WCI_RX
I
Wireless coexistence interface RXD
1.8V
SIM Card Interface 1
A10
SIMCLK1
O
External SIM 1 signal Clock
1.8/2.85V
B11
SIMRST1
O
External SIM 1 signal Reset
1.8/2.85V
B9
SIMIO1
I/O
External SIM 1 signal - Data I/O
1.8/2.85V
Internally PU
20 kΩ to
SIMVCC1
B7
SIMIN1
I
External SIM1 signal - Presence
1.8V
Active low
A8
SIMVCC1
-
External SIM1 signal power supply for SIM1
1.8/2.85V
E8
Reserved for
ESIM_RST
I
Reserved for eSIM signal Reset
1.8/2.85V
Reserved
SIM Card Interface 2
C16
SIMCLK2
O
External SIM 2 signal Clock
1.8/2.85V
D17
SIMRST2
O
External SIM 2 signal Reset
1.8/2.85V
E16
SIMIO2
I/O
External SIM 2 signal Data I/O
1.8/2.85V
Internally PU
20kΩ to
SIMVCC2
C18
SIMIN2
I
External SIM 2 signal Presence
1.8V
Active low
D15
SIMVCC2
-
External SIM2 signal Power supply for SIM2
1.8/2.85V
Analog Audio interface
B5
EAR1_MT+
AO
Earphone signal output1, phase +
Audio
A4
EAR1_MT-
AO
Earphone signal output1, phase -
Audio
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PAD
Signal
I/O
Function
Type
Comment
B3
MIC1_MT+
AI
Mic signal input1, phase +
Audio
A2
MIC1_MT-
AI
Mic signal input1, phase -
Audio
G6
MICBIAS
AO
Mic BIAS
Audio
E2
EAR2_MT+
AO
Earphone signal output2, phase +
Audio
D1
EAR2_MT-
AO
Earphone signal output2, phase -
Audio
C2
MIC2_MT+
AI
Mic signal input2, phase +
Audio
B1
MIC2_MT-
AI
Mic signal input2, phase -
Audio
Digital Voice Interface (DVI)
D11
DVI_WA0
O
Digital Voice interface (WA0 master output)
1.8V
C8
DVI_RX
I
Digital Voice interface (Rx)
1.8V
D9
DVI_TX
O
Digital Voice interface (Tx)
1.8V
C10
DVI_CLK
O
Digital Voice interface (CLK master output)
1.8V
C12
REF_CLK
O
Reference clock for external Codec
1.8V
General Purpose Digital I/O
F9
GPIO_01
I/O
GPIO_01
1.8V
Alternate Fn
I2C
E10
GPIO_02
I/O
GPIO_02
1.8V
Alternate Fn
I2C
F11
GPIO_03
I/O
GPIO_03
1.8V
Alternate Fn
I2C
E12
GPIO_04
I/O
GPIO_04
1.8V
Alternate Fn
I2C
F13
GPIO_05
I/O
GPIO_05
1.8V
Alternate Fn
I2C
E14
GPIO_06
I/O
GPIO_06
1.8V
Alternate Fn
I2C
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PAD
Signal
I/O
Function
Type
Comment
W19
GPIO_10
I/O
GPIO_10
1.8V
Alternate Fn
I2C
AN4
GPIO_20
I/O
GPIO_20
1.8V
RF Section
AD1
Antenna
I/O
GSM/EDGE/UMTS/LTE main antenna
(50 Ohm)
RF
AU9
ANT_DIV
I
UMTS/LTE antenna diversity input (50 Ohm)
RF
GPS Section
S1
ANT_GPS
I
GPS antenna (50 Ohm)
RF
V2
GPS_LNA_EN
O
Enables the external regulator for GPS LNA
1.8V
W3
GPS_SYNC
O
GPS sync signal for Dead Reckoning
1.8V
Miscellaneous Functions
AN8
RESET_N
I
Reset input
Active low
AS1
ON_OFF_N
I
Power ON / Power OFF input
Active low
AN12
SHDN_N
I
Unconditional Shutdown input
Active low
P17
VAUX/PWRMON
O
Supply output for external accessories /
Power ON monitor
1.8V
D5
ADC_IN1
AI
Analog/Digital Converter Input 1
Analog
E6
ADC_IN2
AI
Analog/Digital Converter Input 2
Analog
F7
ADC_IN3
AI
Analog/Digital Converter Input 3
Analog
AU3
STAT_LED
O
Status Indicator LED
1.8V
AN10
SW_RDY
O
Indicates that the boot sequence has
completed successfully
1.8V
SGMII Interface
ZZ11
SGMII_RX_P
AI
SGMII receive - plus
PHY
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PAD
Signal
I/O
Function
Type
Comment
ZZ13
SGMII_RX_M
AI
SGMII receive - minus
PHY
ZZ15
SGMII_TX_P
AO
SGMII transmit - plus
PHY
ZZ17
SGMII_TX_M
AO
SGMII transmit - minus
PHY
Ethernet PHY Control Interface
G14
MAC_MDC
O
MAC to PHY Clock
2.85V
G12
MAC_MDIO
I/O
MAC to PHY Data
2.85V
G8
ETH_RST_N
O
Ethernet PHY Reset
2.85V
G10
ETH_INT_N
I
Ethernet PHY Interrupt
2.85V
HSIC Interface
A14
HSIC_DATA
I/O
High-speed inter-chip interface - data
1.2V
A16
HSIC_STB
I/O
High-speed inter-chip interface - strobe
1.2V
I2C Interface
C14
I2C_SCL
I/O
I2C clock
1.8V
Internally PU
2.2kΩ to 1.8V
D13
I2C_SDA
I/O
I2C Data
1.8V
Internally PU
2.2kΩ to 1.8V
Power Supply
AP17
VBATT
-
Main Power Supply (Digital Section)
Power
AP19
VBATT
-
Main Power Supply (Digital Section)
Power
AR18
VBATT
-
Main Power Supply (Digital Section)
Power
AR20
VBATT
-
Main Power Supply (Digital Section)
Power
AS17
VBATT_PA
-
Main Power Supply (RF Section)
Power
AS19
VBATT_PA
-
Main Power Supply (RF Section)
Power
AT18
VBATT_PA
-
Main Power Supply (RF Section)
Power
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PAD
Signal
I/O
Function
Type
Comment
AU17
VBATT_PA
-
Main Power Supply (RF Section)
Power
AU19
VBATT_PA
-
Main Power Supply (RF Section)
Power
AT20
VBATT_PA
-
Main Power Supply (RF Section)
Power
A0
GND
-
Ground
N0
GND
Ground
R0
GND
-
Ground
T0
GND
-
Ground
V0
GND
-
Ground
X0
GND
-
Ground
AA0
GND
-
Ground
AC0
GND
-
Ground
AE0
GND
-
Ground
AG0
GND
-
Ground
AJ0
GND
-
Ground
AL0
GND
-
Ground
AN0
GND
-
Ground
AR0
GND
-
Ground
AV0
GND
-
Ground
ZZ1
GND
-
Ground
F1
GND
-
Ground
M1
GND
-
Ground
P1
GND
-
Ground
U1
GND
-
Ground
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PAD
Signal
I/O
Function
Type
Comment
W1
GND
-
Ground
Y1
GND
-
Ground
AB1
GND
-
Ground
AF1
GND
-
Ground
AH1
GND
-
Ground
AK1
GND
-
Ground
AU1
GND
-
Ground
N2
GND
-
Ground
R2
GND
-
Ground
T2
GND
-
Ground
X2
GND
-
Ground
AA2
GND
-
Ground
AC2
GND
-
Ground
AE2
GND
-
Ground
AG2
GND
-
Ground
AJ2
GND
-
Ground
AL2
GND
-
Ground
AN2
GND
-
Ground
AR2
GND
-
Ground
D3
GND
-
Ground
P3
GND
-
Ground
AP3
GND
-
Ground
C4
GND
-
Ground
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PAD
Signal
I/O
Function
Type
Comment
AR4
GND
-
Ground
AT4
GND
-
Ground
AP5
GND
-
Ground
AS5
GND
-
Ground
AU5
GND
-
Ground
A6
GND
-
Ground
C6
GND
-
Ground
AR6
GND
-
Ground
AT6
GND
-
Ground
D7
GND
-
Ground
AP7
GND
-
Ground
AS7
GND
-
Ground
AU7
GND
-
Ground
T8
GND
-
Ground
V8
GND
-
Ground
X8
GND
-
Ground
AA8
GND
-
Ground
AR8
GND
-
Ground
AT8
GND
-
Ground
AV8
GND
-
Ground
U9
GND
-
Ground
W9
GND
-
Ground
Y9
GND
-
Ground
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PAD
Signal
I/O
Function
Type
Comment
AP9
GND
-
Ground
AS9
GND
-
Ground
T10
GND
-
Ground
V10
GND
-
Ground
X10
GND
-
Ground
AA10
GND
-
Ground
AR10
GND
-
Ground
AT10
GND
-
Ground
AV10
GND
-
Ground
U11
GND
-
Ground
W11
GND
-
Ground
Y11
GND
-
Ground
AP11
GND
-
Ground
AS11
GND
-
Ground
AU11
GND
-
Ground
A12
GND
-
Ground
T12
GND
-
Ground
V12
GND
-
Ground
X12
GND
-
Ground
AA12
GND
-
Ground
AR12
GND
-
Ground
AT12
GND
-
Ground
AV12
GND
-
Ground
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PAD
Signal
I/O
Function
Type
Comment
B13
GND
-
Ground
AP13
GND
-
Ground
AS13
GND
-
Ground
AR14
GND
-
Ground
AT14
GND
-
Ground
AV14
GND
-
Ground
B15
GND
-
Ground
AP15
GND
-
Ground
AS15
GND
-
Ground
AU15
GND
-
Ground
AN16
GND
-
Ground
AR16
GND
-
Ground
AT16
GND
-
Ground
AV16
GND
-
Ground
B17
GND
-
Ground
AK17
GND
-
Ground
AM17
GND
-
Ground
E18
GND
-
Ground
G18
GND
-
Ground
T18
GND
-
Ground
V18
GND
-
Ground
X18
GND
-
Ground
AL18
GND
-
Ground
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PAD
Signal
I/O
Function
Type
Comment
AN18
GND
-
Ground
AV18
GND
-
Ground
ZZ19
GND
-
Ground
H19
GND
-
Ground
Y19
GND
-
Ground
AM19
GND
-
Ground
A20
GND
-
Ground
L20
GND
-
Ground
N20
GND
-
Ground
AV20
GND
-
Ground
Reserved
C0
Reserved
-
Reserved
E0
Reserved
-
Reserved
G0
Reserved
-
Reserved
J0
Reserved
-
Reserved
L0
Reserved
-
Reserved
AT0
Reserved
-
Reserved
K1
Reserved
-
Reserved
AM1
Reserved
-
Reserved
G2
Reserved
-
Reserved
J2
Reserved
-
Reserved
L2
Reserved
-
Reserved
AV2
Reserved
-
Reserved
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PAD
Signal
I/O
Function
Type
Comment
ZZ3
Reserved
-
Reserved
F3
Reserved
-
Reserved
H3
Reserved
-
Reserved
K3
Reserved
-
Reserved
M3
Reserved
-
Reserved
S3
Reserved
-
Reserved
U3
Reserved
-
Reserved
E4
Reserved
-
Reserved
G4
Reserved
-
Reserved
J4
Reserved
-
Reserved
L4
Reserved
-
Reserved
N4
Reserved
-
Reserved
R4
Reserved
-
Reserved
T4
Reserved
-
Reserved
V4
Reserved
-
Reserved
AG4
Reserved
-
Reserved
AJ4
Reserved
-
Reserved
AL4
Reserved
-
Reserved
AV4
Reserved
-
Reserved
ZZ5
Reserved
-
Reserved
F5
Reserved
-
Reserved
AM5
Reserved
-
Reserved
AN6
Reserved
-
Reserved
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PAD
Signal
I/O
Function
Type
Comment
AV6
Reserved
-
Reserved
ZZ7
Reserved
-
Reserved
AM7
Reserved
-
Reserved
AP1
Reserved
-
Reserved for RESET_N in case that backward
compatibility to LE920 is needed (instead of
Pad AN8)
Refer to
Sec. 5.3.3,Unc
onditional
Hardware
Reset
ZZ9
Reserved
-
Reserved
AM9
Reserved
-
Reserved
AM11
Reserved
-
Reserved
AM13
Reserved
-
Reserved
AU13
Reserved
-
Reserved
AN14
Reserved
-
Reserved
F15
Reserved
-
Reserved
AM15
Reserved
-
Reserved
G16
Reserved
-
Reserved
J16
Reserved
-
Reserved
L16
Reserved
-
Reserved
N16
Reserved
-
Reserved
R16
Reserved
-
Reserved
T16
Reserved
-
Reserved
V16
Reserved
-
Reserved
X16
Reserved
-
Reserved
AA16
Reserved
-
Reserved
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PAD
Signal
I/O
Function
Type
Comment
AC16
Reserved
-
Reserved
AE16
Reserved
-
Reserved
AG16
Reserved
-
Reserved
AJ16
Reserved
-
Reserved
AL16
Reserved
-
Reserved
F17
Reserved
-
Reserved
H17
Reserved
-
Reserved
K17
Reserved
-
Reserved
M17
Reserved
-
Reserved
C20
Reserved
-
Reserved
E20
Reserved
-
Reserved
G20
Reserved
-
Reserved
J20
Reserved
-
Reserved
R20
Reserved
-
Reserved
T20
Reserved
-
Reserved
V20
Reserved
-
Reserved
X20
Reserved
-
Reserved
AA20
Reserved
-
Reserved
AC20
Reserved
-
Reserved
AE20
Reserved
-
Reserved
AG20
Reserved
-
Reserved
AJ20
Reserved
-
Reserved
AL20
Reserved
-
Reserved
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PAD
Signal
I/O
Function
Type
Comment
AN20
Reserved
-
Reserved
R18
Reserved
-
Reserved
S19
Reserved
-
Reserved
U19
Reserved
-
Reserved
L18
Reserved
-
Reserved
J18
Reserved
-
Reserved
H1
Reserved
-
Reserved
AE4
Reserved
-
Reserved
AC4
Reserved
-
Reserved
NOTE:
GPIO_20 and WCI_RX are used as special HW flags during boot.
If they are used as GPIOs, they must be connected via a 3-state buffer to avoid any undesirable
effect during the boot.
NOTE:
When the UART signals are used as the communication port between the Host and the Modem,
RTS must be connected to GND (on the module side) if flow control is not used.
If the UART port is not used, UART signals can be left floating.
NOTE:
Unless otherwise specified, RESERVED pins must be left unconnected (Floating).
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3.2. LE920A4 Signals That Must Be Connected
Table 7 specifies the LE920A4 signals that must be connected even if not used by the end
application:
Table 7: Mandatory Signals
PAD
Signal
Notes
AP17, AP19, AR18, AR20, AS17, AS19, AT18, AU17, AU19,
AT20
VBATT &
VBATT_PA
A0, N0, R0, T0, V0, X0, AA0, AC0, AE0, AG0, AJ0, AL0,
AN0, AR0, AV0, ZZ1, F1, M1, P1, U1, W1, Y1, AB1, AF1,
AH1, AK1, AU1, N2, R2, T2, X2, AA2, AC2, AE2, AG2,
AJ2, AL2, AN2, AR2, D3, P3, AP3, C4, AR4, AT4, AP5,
AS5, AU5, A6, C6, AR6, AT6, D7, AP7, AS7, AU7, T8, V8, X8,
AA8, AR8, AT8, AV8, U9, W9, Y9, AP9, AS9, T10, V10, X10,
AA10, AR10, AT10, AV10, U11, W11, Y11, AP11,
AS11, AU11, A12, T12, V12, X12, AA12, AR12, AT12,
AV12, B13, AP13, AS13, AR14, AT14, AV14, B15, AP15,
AS15, AU15, AN16, AR16, AT16, AV16, B17, AK17,
AM17, E18, G18, T18, V18, X18, AL18, AN18, AV18,
ZZ19, H19, Y19, AM19, A20, L20, N20, AV20
GND
AS1
ON/OFF
Main power on off signal
AN12
SHDN_N
Emergency power off
D19
USB_D+
If not used, connect to a test point
or an USB connector
F19
USB_D-
If not used, connect to a test point
or an USB connector
A18
USB_VBUS
If not used, connect to a test point
or an USB connector
AH19
C103/TXD
If not used, connect to a test point
AF19
C104/RXD
If not used, connect to a test point
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PAD
Signal
Notes
AA18
C105/RTS
If flow control is not used, connect
to GND
AK19
C106/CTS
If not used, connect to a test point
AB19
TX_AUX
If not used, connect to a test point
AD19
RX_AUX
If not used, connect to a test point
AD1
Antenna
MAIN antenna
AU9
ANT_DIV
S1
ANT_GPS
J2, L2, F3, H3, K3, E4, AN14
Reserved
Connect to a test point for Telit
internal use
AN4
GPIO_20
If not used, connect to a test point
AT2
WCI_RX
If not used, connect to a test point
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3.3. LGA Pads Layout
Figure 2: LGA Pads Layout
zz A B C D E F G H J K L M N P R S T U V W X Y AA AB AC AD AE AF AG AH AJ AK AL AM AN AP AR AS AT AU
AV
0GND
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RFU GND GND GND GND GND GND GND GND GND GND GND GND GND RFU GND
1GND
MIC2
_MT-
EAR2
_MT-
GND
TGPIO
_21
TGPIO
_22
GND GND
ANT
_GPS
GND GND GND GND ANT 1 GND GND GND ANT 2
RESERV
ED
ON
_OFF*
GND
2
MIC1
_MT-
MIC2
_MT+
EAR2
_MT+
RESERV
ED
RESERV
ED
RESERV
ED
GND GND GND
GPS_
LNA
_EN
GND GND GND GND GND GND GND GND GND
WCI_RX
D
RFU
3
RESERV
ED
MIC1
_MT+
GND
RESERV
ED
RESERV
ED
RESERV
ED
JTAG_T
ORIGIN
GND
RESERV
ED
RESERV
ED
GPS_PP
S
WiFi
_SDRST
_TGPIO
WiFi_SD
CMD_TG
PIO14
WiFi_SD
0_TGPI
O15
WiFi_SD
1_TGPI
O16
WiFi_SD
2_TGPI
O17
WiFi_SD
3_TGPI
O18
WiFi_SD
CLK_TG
PIO19
GND
WCI_TX
D
STAT
_LED
4
EAR1
_MT-
GND
RESERV
ED
RESERV
ED
RESERV
ED
RFU RFU RFU RFU RFU
RFCLK2
_QCA
WLAN_S
LEEP_C
LK
I2C_SDA
_AUX
I2C_SCL
_AUX
RESERV
ED
RESERV
ED
RESERV
ED
TGPIO
_20
GND GND
RFU
5
RESERV
ED
EAR1
_MT+
ADC
_IN1
RESERV
ED
RESERV
ED
GND GND GND
6GND GND
ADC
_IN2
MIC_BIA
S
LED_DR
V
GND GND
RFU
7
RESERV
ED
SIMIN1 GND
ADC
_IN3
RFU GND GND GND
8SIMVCC1
DVI_RX
eSIM
RST
ETH_RS
T_N
GND GND GND GND
RESET_
N
GND GND GND
9
RESERV
ED
SIMIO1
DVI
_TX
TGPIO
_01
GND GND GND
RESERV
ED
GND GND
ANT
_DIV 1
10 SIMCLK1
DVI
_CLK
TGPIO
_02
ETH_IN_
N
GND GND GND GND
SW_
RDY
GND GND GND
11
SGMII_R
X_P
SIM
RST1
DVI
_WAO
TGPIO
_03
GND GND GND
RESERV
ED
GND GND GND
12 GND
REF
_CLK
TGPIO
_04
MAC_
MDIO
GND GND GND GND SHDN GND GND GND
13
SGMII_R
X_M
GND
I2C
SDA
TGPIO
_05
RESERV
ED
GND GND
ANT
_DIV 2
14
HSIC_D
ATA
I2C
_SCL
TGPIO
_06
MAC_
MDC
JTAG_P
S_HOLD
GND GND GND
15
SGMII_T
X_P
GND SIMVCC2
HW_KE
Y
RESERV
ED
GND GND GND
16
HSIC_S
TB
SIMCLK2 SIMIO2
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
GND GND GND GND
17
SGMII_T
X_M
GND
SIM
RST2
VRTC
RESERV
ED
RESERV
ED
LED_DR
V_EN
VAUX/
PWR
MON
VMMC
MMC
_CD
MMC
_DAT3
MMC
_DAT0
MMC
_DAT2
MMC
_CLK
MMC
_DAT1
MMC
_CMD
GND GND VBATT
VBATT
_PA
VBATT
_PA
18
USB
_VBUS
SIMIN2 GND GND
TGPIO_
12
TGPIO_
11
SPI
_CS*
TGPIO
_07
GND GND GND
C105/
RTS*
C108/
DTR*
C109/
DCD
C107/
DSR*
C125/
RING*
GND GND VBATT
VBATT
_PA
GND
19 GND
USB_ID
USB
_D+
USB
_D- GND
SPI
_MOSI
SPI
_MISO
SPI
_CLK
TGPIO
_08
TGPIO
_09
TGPIO
_10
GND
TX
_AUX
RX
_AUX
C104/
RXD
C103/
TXD
C106/
CTS*
GND VBATT
VBATT
_PA
VBATT
_PA
20 GND
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
GND GND
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RESERV
ED
RFU RFU VBATT
VBATT
_PA
GND
New xE920 (34 mm X 40 mm) Form Factor Pin MAP
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3.4. Backward Compatibility to LE920
The LE920A4 is the successor of LE920 and is fully backward compatible to the previous LE920 in
terms of:
Mechanical dimensions
Package and pin-map
To support the extra features and additional interfaces, the LE920A4 introduces more pins
compared to the LE920. The extra pins of the LE920A4 can be considered as optional if not
needed and can be left unconnected (floating) if not used. In this case, the new LE920A4 can be
safely mounted on existing carrier boards designed for the previous LE920.
The additional pins of the LE920A4 are shown in Figure 3 (marked as Green)
Figure 3: LE920A4 vs. LE920 Pin-out Comparison
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4. Electrical Specifications
4.1. Absolute Maximum Ratings – Not Operational
CAUTION:
A deviation from the value ranges listed below may harm the LE920A4 module.
Table 8: Absolute Maximum Ratings Not Operational
Symbol
Parameter
Min
Max
Unit
VBATT
Battery supply voltage on pin VBATT
-0.5
+6.0
[V]
VBATT TRANSIENT
Transient voltage on pin VBATT (< 10 ms)
-0.5
+7.0
[V]
VBATT_PA
Battery supply voltage on pin VBATT_PA
-0.3
+6.0
[V]
4.2. Recommended Operating Conditions
Table 9: Recommended Operating Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Tamb
Ambient temperature
-40
+25
+85
[°C]
VBATT
Battery supply voltage on pin VBATT
3.4
3.8
4.2
[V]
VBATT_PA
Battery supply voltage on pin VBATT_PA
3.4
3.8
4.2
[V]
IBATT_PA + IBATT
Peak current to be used to dimension
decoupling capacitors on pin VBATT_PA
-
80
2000
[mA]
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4.3. Logic Level Specifications
Unless otherwise specified, all the interface circuits of the LE920A4 are 1.8V CMOS logic.
Only few specific interfaces (such as USIM and SD Card) are capable of dual voltage I/O.
The following tables show the logic level specifications used in the LE920A4 interface circuits. The
data specified in the tables below is valid throughout all drive strengths and the entire
temperature ranges.
CAUTION:
Do not connect LE920A4’s digital logic signal directly to OEM’s digital logic signal with a level
higher than 2.7V for 1.8V CMOS signals.
4.3.1. 1.8V Pads - Absolute Maximum Ratings
Table 10: Absolute Maximum Ratings - Not Functional
Parameter
Min
Max
Input level on any
digital pin when on
-0.3V
+2.16V
Input voltage on
analog pins when on
-0.3V
+2.16 V
4.3.2. 1.8V Standard GPIOs
Table 11: Operating Range Interface Levels (1.8V CMOS)
Pad
Parameter
Min
Max
Unit
Comment
VIH
Input high level
1.25V
--
[V]
VIL
Input low level
--
0.6V
[V]
VOH
Output high level
1.4V
--
[V]
VOL
Output low level
--
0.45V
[V]
IIL
Low-level input leakage current
-1
--
[uA]
No pull-up
IIH
High-level input leakage current
--
+1
[uA]
No pull-down
RPU
Pull-up resistance
30
390
[kΩ]
See Note
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Pad
Parameter
Min
Max
Unit
Comment
RPD
Pull-down resistance
30
390
[kΩ]
See Note
Ci
Input capacitance
--
5
[pF]
NOTE:
Pull-Up and Pull-Down resistance of GPIO5 is different than above mentioned
GPIO5 pull resistance is specified as 10K to 50KΩ
4.3.3. 1.8V SD Card Pads
Table 12: Operating Range SD Card Pads Working at 1.8V
Pad
Parameter
Min
Max
Unit
Comment
VIH
Input high level
1.27V
2V
[V]
VIL
Input low level
-0.3V
0.58V
[V]
VOH
Output high level
1.4V
--
[V]
VOL
Output low level
0
0.45V
[V]
IIL
Low-level input leakage current
-2
-
[uA]
No pull-up
IIH
High-level input leakage current
-
2
[uA]
No pull-down
RPU
Pull-up resistance
10
100
[kΩ]
RPD
Pull-down resistance
10
100
[kΩ]
Ci
Input capacitance
5
[pF]
4.3.4. 1.8V SIM Card Pads
Table 13: Operating Range SIM Pads Working at 1.8V
Pad
Parameter
Min
Max
Unit
Comment
VIH
Input high level
1.35V
2V
[V]
VIL
Input low level
-0.3V
0.43V
[V]
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Pad
Parameter
Min
Max
Unit
Comment
VOH
Output high level
1.35V
1.875V
[V]
VOL
Output low level
0V
0.4V
[V]
IIL
Low-level input leakage current
-2
-
[uA]
No pull-up
IIH
High-level input leakage current
-
2
[uA]
No pull-down
RPU
Pull-up resistance
10
100
[kΩ]
RPD
Pull-down resistance
10
100
[kΩ]
Ci
Input capacitance
5
[pF]
4.3.5. Dual Voltage Pads - Absolute Maximum Ratings
Table 14: Absolute Maximum Ratings - Not Functional
Parameter
Min
Max
Input level on any
digital pin when on
-0.3V
+3.6V
Input voltage on
analog pins when on
-0.3V
+3.6 V
4.3.6. SD Card Pads @ 2.95V
Table 15: Operating Range For SD Card Pads Operating at 2.95V
Pad
Parameter
Min
Max
Unit
Comments
VIH
Input high level
1.9V
3.1V
[V]
VIL
Input low level
-0.3V
0.7V
[V]
VOH
Output high level
2.1V
3.05V
[V]
VOL
Output low level
0V
0.4V
[V]
IIL
Low-level input leakage current
-10
[uA]
No pull-up
IIH
High-level input leakage current
10
[uA]
No pull-down
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Pad
Parameter
Min
Max
Unit
Comments
RPU
Pull-up resistance
10
100
[kΩ]
RPD
Pull-down resistance
10
100
[kΩ]
Ci
Input capacitance
5
[pF]
4.3.7. SIM Card Pads @2.95V
Table 16: Operating Range For SIM Pads Operating at 2.95V
Pad
Parameter
Min
Max
Unit
Comment
VIH
Input high level
2.1V
3.1V
[V]
VIL
Input low level
-0.3V
0.55V
[V]
VOH
Output high level
2.25V
3.1V
[V]
VOL
Output low level
0V
0.4V
[V]
IIL
Low-level input leakage current
-10
[uA]
No pull-up
IIH
High-level input leakage current
10
[uA]
No pull-down
RPU
Pull-up resistance
10
100
[kΩ]
RPD
Pull-down resistance
10
100
[kΩ]
Ci
Input capacitance
5
[pF]
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5. Hardware Commands
5.1. Turning on the LE920A4 Module
To turn on the LE920A4 module, the ON/OFF pad must be asserted low for at least 1 second and
then released.
The maximum current that can be drained from the ON/OFF pad is 0.1 mA. This pin is internally
pulled up; customers should expect to see ~ 800 mV on the output.
Figure 4 illustrates a simple circuit to power on the module using an inverted buffer output.
Figure 4: Power-on Circuit
5.2. Initialization and Activation State
After turning on the LE920A4 module, the LE920A4 is not yet activated because the SW
initialization process of the LE920A4 module is still in process internally. It takes some time to
fully complete the HW and SW initialization of the module.
For this reason, it is impossible to access LE920A4 during the Initialization state.
As shown in Figure 5, the LE920A4 becomes operational (in the Activation state) at least 20
seconds after the assertion of ON_OFF.
NOTE:
During the Initialization state, AT commands are not available. The DTE host must wait for the
Activation state prior to communicating with the LE920A4.
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Figure 5: LE920A4 Initialization and Activation
NOTE:
To check if the LE920A4 has completely powered on, monitor the SW_RDY hardware line. When
SW_RDY goes high, the module has completely powered on and is ready to accept AT
commands.
NOTE:
During SW initialization of the LE920A4, the SW configures all pads and interfaces to their desired
mode. When PWRMON goes high, this indicates that the initialization of all I/O pads is
completed.
NOTE:
Do not use any pull-up resistor on the ON/OFF line as it is internally pulled up. Using a pull-up
resistor may cause latch-up problems on the LE920A4 power regulator and improper powering
on/off of the module. The ON/OFF line must be connected only in an open-collector
configuration.
NOTE:
Active low signals are labeled with a name that ends with “_N”
NOTE:
To avoid a back-powering effect, it is recommended to avoid having any HIGH logic level signal
applied to the digital pins of the module when it is powered OFF or during an ON/OFF transition.
1 Sec < T_Hold < 2 Sec
VBATT
ON_OFF
SW_RDY
T_RDY < 20 Sec
V_AUX
PWRMON
18 Sec < T_PWRMON < 20 Sec
OFF State Initialization State Active State
OK to Send AT
commands
All interfaces and pins
configured
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5.3. Turning off the LE920A4 Module
Turning off the device can be done in four different ways:
AT#SHDN software command
Hardware shutdown using ON/OFF pad
Hardware Unconditional Shutdown using the SHDN_N
When the device is shut down by a software command or a hardware shutdown, it issues a
detach request to the network, informing the network that the device will not be reachable any
more.
NOTE:
To check if the device has powered off, monitor the PWRMON hardware line. When PWRMON
goes low, this indicates that the device has powered off.
NOTE:
To avoid a back-powering effect, it is recommended to avoid having any HIGH logic level signal
applied to the digital pins of the module when it is powered OFF or during an ON/OFF transition.
NOTE:
Using the RESET_N for resetting the LE920A4 is not recommended
5.3.1. Shutdown by Software Command
The LE920A4 module can be shut down by a software command.
When a shutdown command is sent, LE920A4 goes into the Finalization state and at the end of
the finalization process shuts down PWRMON. The duration of the finalization state can differ
according to the current situation of the module, so a value cannot be defined.
Usually, it will take more than 15 seconds from sending a shutdown command until reaching a
complete shutdown. The DTE should monitor the status of PWRMON to observe the actual
power-off.
Figure 6: Shutdown by Software Command
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NOTE:
To check whether the device has powered off, monitor the PWRMON hardware line. When
PWRMON goes low, the device has powered off.
5.3.2. Hardware Shutdown
To turn off LE920A4 module, the ON/OFF pad must be asserted low for at least 2.5 seconds and
then released. Use the same circuitry and timing for power-on.
When the hold time of ON/OFF is above 2.5 seconds, LE920A4 goes into the Finalization state and
in the end shuts down PWRMON.
The duration of the Finalization state can differ according to the current situation of the module,
so a value cannot be defined.
Usually, it will take more than 15 seconds from sending a shutdown command until reaching a
complete shutdown. DTE should monitor the status of PWRMON to observe the actual power-off.
Figure 7: Hardware Shutdown via ON_OFF
NOTE:
To check whether the device has powered off, monitor the PWRMON hardware line. When
PWRMON goes low, the device has powered off.
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5.3.3. Unconditional Hardware Reset
To unconditionally restart the LE920A4 module, the RESET_N pad must be asserted low for a
period of 500-2000 milliseconds and then released.
Figure 8 shows a simple circuit for this action.
Figure 8: Circuit for Unconditional Hardware Reset
For keeping backward compatibility to LE920, it is recommended to prepare an alternate
connection of the RESET_N pad also to Pad AP1 while keeping Pad AN8 as the default connection
as is shown in Figure 9.
Figure 9: Alternate Connection of RESET_N Pad
LE920A4
AP1
AN8
DNP
0 Ohm
RESET#
NOTE:
In general, using RESET_N is not recommended.
The Unconditional Hardware Reset must always be implemented on the boards, but the software
must use it only as an emergency exit procedure, and not as a normal Reset operation.
NOTE:
Do not use any pull-up resistor on the RESET_N line or any totem pole digital output. Using a pull-
up resistor may cause latch-up problems on the LE920A4 power regulator and improper
functioning of the module. The RESET_N line must be connected only in an open-collector
configuration.
NOTE:
Asserting tRESET low for period longer than 2000 milliseconds will cause the module to shut down.
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5.3.4. Unconditional Hardware Shutdown
To unconditionally shut down the LE920A4 module, the SHDN_N pad must be tied low for at least
200 milliseconds and then released.
A simple circuit for applying unconditional shutdown is shown below:
Figure 10: Circuit for Unconditional Hardware Shutdown
The system power down timing for using SHDN_N is shown below
Figure 11 Power down timing using SHDN_N
NOTE:
Do not use any pull-up resistor on the SHDN_N line or any totem pole digital output. Using a pull-
up resistor may cause latch-up problems on the LE920A4 power regulator and improper
functioning of the module. The SHDN_N line must be connected only in an open-collector
configuration.
NOTE:
The Unconditional Hardware Shutdown must always be implemented on the boards, but the
software must use it only as an emergency exit procedure, and not as a normal power-off
operation.
200mS Sec < T_Hold
VBATT
SHDN_N
SW_RDY
T_RDY ~0 Sec
V_AUX
PWRMON
T_PWRMON ~0 Sec
OFF StateActive State
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6. Power Supply
The power supply circuitry and board layout are very important parts of the full product design,
with critical impact on the overall product performance. Read the following requirements and
guidelines carefully to ensure a good and proper design.
6.1. Power Supply Requirements
The LE920A4 power requirements are as follows:
Table 17: Power Supply Requirements
Nominal supply voltage
3.8V
Supply voltage range
3.4V 4.2V
Maximum ripple on module input supply
30 mV
Table 18 provides typical current consumption values of LE920A4 for various operation modes.
Table 18: LE920A4 Current Consumption
Mode
Average [Typ.]
Mode Description
Switched Off
Switched off
25 µA
Module is powered but switched off (RTC is on)
IDLE Mode (Standby Mode; No Call in Progress)
AT+CFUN=4
1.0 mA
Tx and Rx are disabled; module is not registered
on the network (Flight mode)
DRX
GSM
2.0 mA
DRx2
1.4 mA
DRx5
WCDMA
1.4 mA
DRx7
1.2 mA
DRx8
LTE
1.8 mA
Paging cycle #128 frames (1.28 sec DRx cycle)
1.4 mA
Paging cycle #256 frames (2.56 sec DRx cycle)
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Mode
Average [Typ.]
Mode Description
Operative Mode (LTE)
LTE (0 dBm)
190 mA
LTE CAT 4 channel BW 20 MHz, RB=1,
Tx = 0 dBm
(Test case: BAND 1, Channel 300)
LTE (22 dBm)
500 mA
LTE CAT 4 channel BW 20 MHz, RB=1,
Tx = 22 dBm
(Test case: BAND 1, Channel 300)
Operative Mode (WCDMA)
WCDMA Voice
200 mA
WCDMA voice call (Tx = 10 dBm)
WCDMA HSDPA (0 dBm)
150 mA
WCDMA data call (Cat 14, Tx = 0 dBm,
Max throughput)
WCDMA HSDPA
(22 dBm)
310 mA
WCDMA data call (Cat 14, Tx = 22 dBm,
Max throughput)
Operative Mode (GSM)
GSM Tx and Rx mode
GSM900 PL5
250 mA
GSM voice call
DCS1800 PL0
170 mA
GPRS 4 Tx + 1 Rx
GSM900 PL5
430 mA
GPRS Sending Data mode (CS-4)
DCS1800 PL0
340 mA
* Worst/best case current values depend on network configuration - not under module control.
NOTE:
The electrical design for the power supply must ensure a peak current output of at least 2A.
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NOTE:
In GSM/GPRS mode, RF transmission is not continuous, but is packed into bursts at a base
frequency of about 216 Hz with relative current peaks as high as about 2A. Therefore, the power
supply must be designed to withstand these current peaks without big voltage drops. This means
that both the electrical design and the board layout must be designed for this current flow.
If the layout of the PCB is not well designed, a strong noise floor is generated on the ground. This
will reflect on all the audio paths producing an audible annoying noise at 216 Hz.
If the voltage drops during the peaks, current absorption is too high. The device may even shut
down as a consequence of the supply voltage drop.
6.2. General Design Rules
The principal guidelines for the Power Supply Design embrace three different design steps:
Electrical design
Thermal design
PCB layout
6.2.1. Electrical Design Guidelines
The electrical design of the power supply depends strongly on the power source where this
power is drained. Power sources can be distinguished by three categories:
+5V input (typically PC internal regulator output)
+12V input (typically automotive)
Battery
6.2.1.1. + 5V Input Source Power Supply Design Guidelines
The desired output for the power supply is 3.8V. So, the difference between the input
source and the desired output is not big, and therefore a linear regulator can be used. A
switching power supply is preferred to reduce power consumption.
When using a linear regulator, a proper heat sink must be provided to dissipate the
power generated.
A bypass low ESR capacitor of adequate capacity must be provided to cut the current
absorption peaks close to the LE920A4 module. A 100 μF tantalum capacitor is usually
suitable (on both VBATT and VBATT_PA together).
Make sure that the low ESR capacitor on the power supply output (usually a tantalum
one) is rated at least 10V.
A protection diode must be inserted close to the power input to protect the LE920A4
module from power polarity inversion.
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Figure 12 shows an example of linear regulator with 5V input.
Figure 12: Example of Linear Regulator with 5V Input
6.2.1.2. + 12V Input Source Power Supply Design Guidelines
The desired output for the power supply is 3.8V. Due to the big difference between the
input source and the desired output, a linear regulator is unsuitable and must not be
used. A switching power supply is preferable because of its better efficiency, especially
with the 2A peak current load which is expected during GSM Tx.
When using a switching regulator, a 500-kHz or higher switching frequency regulator is
preferable because of its smaller inductor size and its faster transient response. This
allows the regulator to respond quickly to the current peaks absorption.
In any case, the selection of the frequency and switching design is related to the
application to be developed due to the fact that the switching frequency can also
generate EMC interference.
For car batteries (lead-acid accumulators) the input voltage can rise up to 15.8V. This
must be kept in mind when choosing components: all components in the power supply
must withstand this voltage.
A bypass low ESR capacitor of adequate capacity must be provided to cut the current
absorption peaks. A 100μF tantalum capacitor is usually suitable (on both VBATT and
VBATT_PA together).
Make sure that the low ESR capacitor on the power supply output (usually a tantalum
one) is rated at least 10V.
For automotive applications, a spike protection diode must be inserted close to the
power input to clean the supply of spikes.
A protection diode must be inserted close to the power input to protect the LE920A4
module from power polarity inversion. This can be the same diode as for spike protection.
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Figure 13 and Figure 14 show an example of switching regulator with 12V input.
Figure 13: Example of Switching Regulator with 12V Input Part 1
Figure 14: Example of Switching Regulator with 12V Input Part 2
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6.2.1.3. Battery Source Power Supply Design Guidelines
The desired nominal output for the power supply is 3.8V, and the maximum allowed
voltage is 4.2V. Hence, a single 3.7V Li-Ion cell battery type is suitable for supplying the
power to the LE920A4 module.
CAUTION:
Do not use any Ni-Cd, Ni-MH, and Pb battery types directly connected to the LE920A4
module. Their use can lead to overvoltage on the LE920A4 and damage it. Use only Li-Ion
battery types.
A bypass low ESR capacitor of adequate capacity must be provided to cut the current
absorption peaks; a 100μF tantalum capacitor is usually suitable (on both VBATT and
VBATT_PA together).
Make sure that the low ESR capacitor (usually a tantalum one) is rated at least 10V.
A protection diode must be inserted close to the power input to protect the LE920A4
module from power polarity inversion. Otherwise, the battery connector must be done in
a way to avoid polarity inversions when connecting the battery.
The battery capacity must be at least 900 mAh to withstand the current peaks of 2A.
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6.2.2. Thermal Design Guidelines
The thermal design for the power supply heat sink must be done with the following specifications:
Average current consumption during RF transmission @PWR level max in LE920A4 as
shown in Section 6.1, Table 18
Average current consumption during Class12 GPRS transmission @PWR level max as
shown in Section 6.1, Table 18
Average GPS current during GPS ON (Power Saving disabled) : mA (TBD)
NOTE:
The average consumption during transmission depends on the power level at which the device is
requested to transmit via the network. Therefore, the average current consumption varies
significantly.
NOTE:
The thermal design for the power supply must be made keeping an average consumption at the
maximum transmitting level during calls of LTE/HSPA/GPRS plus average consumption in GPS
Tracking mode.
Considering the very low current during Idle, especially if the Power Saving function is enabled, it
is possible to consider from the thermal point of view that the device absorbs significant current
only during an Active Call or Data session.
For the heat generated by the LE920A4 module, consider it to be 2W max during transmission at
Class12 GPRS upload. The generated heat is mostly conducted to the ground plane under the
LE920A4 module. Ensure that your application can dissipate heat.
In LTE/WCDMA/HSPA mode, the LE920A4 emits RF signals continuously during transmission.
Therefore, you must pay special attention how to dissipate the heat generated.
While designing the application board, the designer must make sure that the LE920A4 module is
mounted on a large ground area of the application board, with many ground vias available
beneath the module for effective heat dissipation.
Even though peak current consumption in GSM mode is higher than in LTE/WCDMA/HSPA,
considerations for heat sink are more important in the case of WCDMA due to the continuous
transmission conditions.
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6.2.3. Power Supply PCB Layout Guidelines
As seen in the electrical design guidelines, the power supply must have a low ESR capacitor on the
output to cut the current peaks and a protection diode on the input to protect the supply from
spikes and polarity inversion. The placement of these components is crucial for the correct
operation of the circuitry. A misplaced component can be useless or can even decrease the power
supply performances.
The bypass low ESR capacitor must be placed close to the LE920A4 power input pads, or if
the power supply is of a switching type, it can be placed close to the inductor to cut the
ripple, as long as the PCB trace from the capacitor to LE920A4 is wide enough to ensure a
drop-less connection even during the 2A current peaks.
The protection diode must be placed close to the input connector where the power
source is drained.
The PCB traces from the input connector to the power regulator IC must be wide enough
to ensure that no voltage drops occur during the 2A current peaks.
Note that this is not done to save power loss but especially to avoid the voltage drops on the
power line at the current peaks frequency of 216 Hz that will reflect on all the components
connected to that supply (also introducing the noise floor at the burst base frequency.)
For this reason while a voltage drop of 300-400 mV may be acceptable from the power loss
point of view, the same voltage drop may not be acceptable from the noise point of view. If
your application does not have an audio interface but only uses the data feature of the
LE920A4, this noise is not so disturbing, and the power supply layout design can be more
forgiving.
The PCB traces to LE920A4 and the bypass capacitor must be wide enough to ensure that
no significant voltage drops occur when the 2A current peaks are absorbed. This is
needed for the same above-mentioned reasons. Try to keep these traces as short as
possible.
The PCB traces connecting the switching output to the inductor and the switching diode
must be kept as short as possible by placing the inductor and the diode very close to the
power switching IC (only for the switching power supply). This is done to reduce the
radiated field (noise) at the switching frequency (usually 100-500 kHz).
Use a good common ground plane.
Place the power supply on the board in a way to guarantee that the high current return
paths in the ground plane do not overlap any noise sensitive circuitry, such as the
microphone amplifier/buffer or earphone amplifier.
The power supply input cables must be kept separate from noise sensitive lines, such as
microphone/earphone cables.
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7. Antenna(s)
Antenna connection and board layout design are the most important parts in the full product
design, and they have a strong influence on the product’s overall performance. Read carefully and
follow the requirements and guidelines for a good and proper design.
7.1. GSM/WCDMA/LTE Antenna Requirements
The antenna for the LE920A4 device must meet the following requirements:
Table 19: GSM / WCDMA/ LTE Antenna Requirements
Frequency range
The customer must use the most suitable antenna band width for
covering the frequency bands provided by the network operator
and also supported by the car OEM while using the Telit module.
The bands supported by each variant of the LE920A4 module family
are provided in Section 2.6.1, RF Bands per Regional Variant.
Gain
Gain < 3 dBi
Impedance
50 Ohm
Input power
> 33 dBm(2 W) peak power in GSM
> 24 dBm average power in WCDMA & LTE
VSWR absolute max
<= 10:1
VSWR recommended
<= 2:1
Since there is no antenna connector on the LE920A4 module, the antenna must be connected to
the LE920A4 antenna pad (AD1) by a transmission line implemented on the PCB.
If the antenna is not directly connected to the antenna pad of the LE920A4, a PCB line is required
to connect to it or to its connector.
This transmission line must meet the following requirements:
Table 20: Antenna Line on PCB Requirements
Characteristic impedance
50 Ohm
Max attenuation
0.3 dB
Avoid coupling with other signals.
Cold End (Ground Plane) of the antenna must be equipotential to the LE920A4 ground pads.
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Furthermore, if the device is developed for the US and/or Canada market, it must comply with the
FCC and/or IC approval requirements.
NOTE:
This device is to be used only for mobile and fixed application. The antenna(s) used for this
transmitter must be installed to provide a separation distance of at least 20 cm from all persons
and must not be co-located or operating in conjunction with any other antenna or transmitter.
End-Users must be provided with transmitter operation conditions for satisfying RF exposure
compliance. OEM integrators must ensure that the end user has no manual instructions to
remove or install the LE920A4 module. Antennas used for this OEM module must not exceed
3dBi gain for mobile and fixed operating configurations.
7.2. GSM/WCDMA/LTE Antenna – PCB Line Guidelines
Make sure that the transmission line’s characteristic impedance is 50 Ohm.
Keep the line on the PCB as short as possible since the antenna line loss should be less
than around 0.3 dB.
Line geometry should have uniform characteristics, constant cross sections, and avoid
meanders and abrupt curves.
Any suitable geometry/structure can be used for implementing the printed transmission
line affecting the antenna.
If a ground plane is required in the line geometry, this plane must be continuous and
sufficiently extended so the geometry can be as similar as possible to the related
canonical model.
Keep, if possible, at least one layer of the PCB used only for the ground plane. If possible,
use this layer as reference ground plane for the transmission line.
Surround the PCB transmission line with ground (on both sides). Avoid having other signal
tracks facing the antenna line track directly.
Avoid crossing any un-shielded transmission line footprint with other tracks on different
layers.
The ground surrounding the antenna line on the PCB must be strictly connected to the
main Ground plane by means of via-holes (once per 2 mm at least) placed close to the
ground edges facing the line track.
Place EM-noisy devices as far as possible from LE920A4 antenna line.
Keep the antenna line far away from the LE920A4 power supply lines.
If EM-noisy devices are present on the PCB hosting the LE920A4, such as fast switching
ICs, take care to shield them with a metal frame cover.
If EM-noisy devices are not present around the line, geometries like Micro strip or
Grounded Coplanar Waveguide are preferred because they typically ensure less
attenuation compared to a Strip line having the same length.
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7.3. GSM/WCDMA/LTE Antenna – Installation Guidelines
Install the antenna in a location with access to the network radio signal.
The antenna must be installed such that it provides a separation distance of at least 20
cm from all persons and must not be co-located or operating in conjunction with any
other antenna or transmitter.
The antenna must not be installed inside metal cases.
The antenna must be installed according to the antenna manufacturer’s instructions.
7.4. Antenna Diversity Requirements
This product includes an input for a second Rx antenna to improve radio sensitivity. The function
is called Antenna Diversity.
Table 21: Antenna Diversity Requirements
Frequency range
The customer must use the most suitable antenna band width
for covering the frequency bands provided by the network
operator and also supported by the car OEM while using the Telit
module.
The bands supported by each variant of the LE920A4 module
family are provided in Section 2.6.1, RF Bands per Regional
Variant
Impedance
50
VSWR recommended
≤ 2:1
Since there is no antenna connector on the LE920A4 module, the antenna must be connected to
the LE920A4 antenna pad by means of a transmission line implemented on the PCB.
If the antenna is not directly connected at the antenna pad of the LE920A4, a PCB line is required
to connect to it or to its connector.
The second Rx antenna must not be located in close vicinity of the main antenna. To improve
diversity gain and isolation and to reduce mutual interaction, the two antennas should be located
at the maximum reciprocal distance possible, taking into consideration the available space within
the application.
NOTE:
If Rx Diversity is not used/connected, disable the Diversity functionality using the AT#RXDIV
command (refer to the AT User guide) and leave the Diversity pad AU9 unconnected.
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7.5. GNSS Antenna Requirements
LE920A4 supports an active antenna.
It is recommended to use antennas as follow:
An external active antenna (GPS only)
An external active antenna plus GNSS pre-filter
NOTE:
The external GNSS pre-filter is required for the GLONASS application.
The GNSS pre-filter must meet the following requirements:
Source and load impedance = 50 Ohm
Insertion loss (1575.421576.42 MHz) = 1.4 dB (Max)
Insertion loss (1565.421585.42 MHz) = 2.0 dB (Max)
Insertion loss (1597.55151605.886 MHz) = 2.0 dB (Max)
NOTE:
It is recommended to add a DC block to the customer’s GPS application to prevent damage to the
LE920A4 module due to unwanted DC voltage.
7.5.1. Combined GNSS Antenna
The use of a combined RF/GNSS antenna is NOT recommended. This solution can generate an
extremely poor GNSS reception. In addition, the combination of antennas requires an additional
diplexer, which adds significant power loss in the RF path.
7.5.2. Linear and Patch GNSS Antenna
Using this type of antenna introduces at least 3 dB of loss compared to a circularly polarized (CP)
antenna. Having a spherical gain response instead of a hemispherical gain response can aggravate
the multipath behavior and create poor position accuracy.
7.5.3. Front End Design Considerations
Since there is no antenna connector on the LE920A4 module, the antenna must be connected to
the LE920A4 through the PCB to the antenna pad.
If the antenna is not directly connected at the antenna pad of the LE920A4, a PCB line is required.
This line of transmission must meet the following requirements:
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Table 22: Antenna Line on PCB Requirements
Characteristic impedance
50 Ohm
Max attenuation
0.3 dB
Avoid coupling with other signals.
Cold End (Ground Plane) of the antenna must be equipotential to the LE920A4 ground pads.
Furthermore, if the device is developed for the US and/or Canada market, it must comply with the
FCC and/or IC requirements.
This device is to be used only for mobile and fixed application.
7.5.4. GNSS Antenna PCB Line Guidelines
Ensure that the antenna line impedance is 50 Ohm.
Keep the line on the PCB as short as possible to reduce the loss.
The antenna line must have uniform characteristics, constant cross section, avoiding
meanders and abrupt curves.
Keep one layer of the PCB used only for the Ground plane; if possible.
Surround (on the sides, over and under) the antenna line on the PCB with Ground. Avoid
having other signal tracks directly facing the antenna line track.
The Ground around the antenna line on the PCB must be strictly connected to the main
Ground plane by placing vias at least once per 2mm.
Place EM-noisy devices as far as possible from LE920A4 antenna line.
Keep the antenna line far away from the LE920A4 power supply lines.
If EM-noisy devices are around the PCB hosting the LE920A4, such as fast switching ICs,
ensure shielding the antenna line by burying it inside the layers of PCB and surrounding it
with Ground planes; or shield it with a metal frame cover.
If you do not have EM-noisy devices around the PCB of LE920A4, use a Micro strip line on
the surface copper layer for the antenna line. The line attenuation will be lower than a
buried one.
7.5.5. GNSS Antenna Installation Guidelines
The LE920A4, due to its sensitivity characteristics, is capable of performing a fix inside
buildings. (In any case, the sensitivity could be affected by the building characteristics i.e.
shielding.)
The antenna must not be co-located or operating in conjunction with any other antenna
or transmitter.
The antenna must not be installed inside metal cases.
The antenna must be installed according to the antenna manufacturer’s instructions.
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8. Hardware Interfaces
Table 23 summarizes all the hardware interfaces of the LE920A4 module.
Table 23: LE920A4 Hardware Interfaces
Interface
LE920A4
SGMII
For Ethernet PHY support
Ethernet Control
For controlling an external Ethernet PHY
HSIC
x1
SDIO
x2 (for SD/MMC card and for WLAN)
USB
USB2.0, OTG support
SPI
Master only, up to 50 MHz
I2C
For sensors, audio control
UART
2 HS-UART (up to 4 Mbps)
Audio I/F
I2S/PCM, Analog I/O
GPIO
8 ~ 23 (8 dedicated + 15 multiplexed with other signals)
USIM
x2, dual voltage each (1.8V/2.85V)
ADC
Up to x3
Antenna ports
2 for Cellular, 1 for GNSS
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8.1. USB Port
The LE920A4 module includes a Universal Serial Bus (USB) transceiver, which operates at USB
high-speed (480 Mbits/sec). It can also operate with USB full-speed hosts (12 Mbits/sec).
It is compliant with the USB 2.0 specification and can be used for control and data transfers as
well as for diagnostic monitoring and firmware update.
The USB port is typically the main interface between the LE920A4 module and OEM hardware.
NOTE:
The USB_D+ and USB_D- signals have a clock rate of 480 MHz. The signal traces must be routed
carefully. Minimize trace lengths, number of vias, and capacitive loading. The impedance value
should be as close as possible to 90 Ohms differential.
Table 24 lists the USB interface signals.
Table 24: USB Interface Signals
Signal
LE920A4
Pad No.
Usage
USB_VBUS
A18
Power and cable detection for the internal USB transceiver.
Acceptable input voltage range 2.5V 5.5V @ max 5 mA consumption
USB_D-
F19
Minus (-) line of the differential, bi-directional USB signal to/from the
peripheral device
USB_D+
D19
Plus (+) line of the differential, bi-directional USB signal to/from the
peripheral device
USB_ID
B19
USB ID signal for supporting USB2.0 OTG (see note below)
NOTE:
USB_VBUS input power is internally used to detect the USB port and start the enumeration
process. It is not used for supplying power to the internal LE920A4 USB HW block. Therefore,
only a maximum of 5 mA is required.
NOTE:
Even if USB communication is not used, it is still highly recommended to place an optional USB
connector on the application board.
At least test points of the USB signals are required since the USB physical communication is
needed in the case of SW update.
NOTE:
For supporting USB OTG an additional 5V power supply should be added externally
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8.2. HSIC Interface
The application processor exposes a High-Speed Inter-Chip (HSIC). HSIC eliminates the analog
transceiver from a USB interface for lower voltage operation and reduced power dissipation.
The HSIC interface is compliant with Ref 10: High-Speed Inter-Chip USB Electrical Specification,
version 1.0 (a supplement to the USB 2.0 specification, Section 3.8.2), and supports the following:
High-speed 480 Mbps (240 MHz DDR) USB transfers are 100% host driver compatible with
traditional USB cable connected topologies
Bidirectional data strobe signal (STROBE)
Bidirectional data signal (DATA)
No power consumption unless a transfer is in progress
Further details will be provided in a future release of this document.
8.3. Ethernet Connectivity (optional)
Ethernet connectivity can be optionally added to LE920A4 by adding an external PHY
PHY connectivity uses SGMII interface for Data and few additional signals for PHY control
8.3.1. SGMII Interface
The LE920A4 includes an integrated Ethernet MAC with an SGMII interface, having the following
key features:
The SGMII interface can be used connect to an external Ethernet PHY, or an external
switch.
When enabled, an additional network interface will be available to the Linux kernel’s
router.
8.3.2. Ethernet Control interface
When using an external PHY for Ethernet connectivity, the LE920A4 also includes the control
interface for managing this external PHY
The table below lists the signals for controlling the external PHY
Table 25: Ethernet Control Interface Signals
PAD
Signal
I/O
Function
Type
COMMENT
G14
MAC_MDC
O
MAC to PHY Clock
2.85V
G12
MAC_MDIO
I/O
MAC to PHY Data
2.85V
G8
ETH_RST_N
O
Reset to Ethernet PHY
2.85V
G10
ETH_INT_N
I
Interrupt from Ethernet PHY
2.85V
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NOTE:
The Ethernet control interface is internally (inside SoC) shared with USIM2 port!
When Ethernet PHY is used, USIM2 port cannot be used (and vice versa).
8.4. Serial Ports
The serial port is typically a secondary interface between the LE920A4 module and OEM
hardware. Two serial ports are available on the module:
MODEM SERIAL PORT 1(Main)
MODEM SERIAL PORT 2 (Auxiliary)
Several configurations can be designed for the serial port on the OEM hardware. The most
common are:
RS232 PC com port
Microcontroller UART @ 1.8V (Universal Asynchronous Receive Transmit)
Microcontroller UART @ 3.3V/5V or other voltages different from 1.8V
Depending on the type of serial port on the OEM hardware, a level translator circuit may be
needed to make the system operate. The only configuration that does not need level translation
is the 1.8V UART.
The levels for LE920A4 UART are the CMOS levels as described in Section 4.3, Logic Level
Specifications.
8.4.1. Modem Serial Port 1 Signals
Serial Port 1 on LE920A4 is a +1.8V UART with 7 RS232 signals. It differs from the PC-RS232 in
signal polarity (RS232 is reversed) and levels.
Table 26 lists the signals of LE920A4 Serial Port 1.
Table 26: Modem Serial Port 1 Signals
RS232
Pin No.
Signal
LE920A4
Pad No.
Name
Usage
1
DCD -
DCD_UART
AE18
Data Carrier
Detect
Output from the LE920A4 that
indicates carrier presence
2
RXD -
TX_UART
AF19
Transmit line
*see Note
Output transmit line of the
LE920A4 UART
3
TXD -
RX_UART
AH19
Receive line
*see Note
Input receive line of the LE920A4
UART
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RS232
Pin No.
Signal
LE920A4
Pad No.
Name
Usage
4
DTR -
DTR_UART
AC18
Data Terminal
Ready
Input to LE920A4 that controls the
DTE READY condition
5
GND
A6, A12, B13,
B15…
Ground
Ground
6
DSR -
DSR_UART
AG18
Data Set
Ready
Output from the LE920A4 that
indicates that the module is ready
7
RTS -
RTS_UART
AA18
Request to
Send
Input to LE920A4 controlling the
Hardware flow control
8
CTS -
CTS_UART
AK19
Clear to Send
Output from LE920A4 controlling
the Hardware flow control
9
RI -
RI_UART
AJ18
Ring Indicator
Output from LE920A4 indicating
the Incoming call condition
NOTE:
DCD, DTR, DSR, RI signals that are not used for UART functions can be configured as GPIO using
AT commands.
NOTE:
To avoid a back-powering effect, it is recommended to avoid having any HIGH logic level signal
applied to the digital pins of the module when it is powered OFF or during an ON/OFF transition.
NOTE:
For minimum implementations, only the TXD and RXD lines needs be connected. The other lines
can be left open provided a software flow control is implemented.
NOTE:
According to V.24, Rx/Tx signal names refer to the application side; therefore, on the LE920A4
side, these signal are in the opposite direction: TXD on the application side will be connected to
the receive line (here named TXD/ RX_UART) of the LE920A4 serial port and vice versa for Rx.
8.4.2. Modem Serial Port 2
Serial Port 2 on the LE920A4 is a +1.8V UART with Rx and Tx signals only.
Table 27 lists the signals of LE920A4 Serial Port 2.
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Table 27: Modem Serial Port 2 Signals
PAD
Signal
I/O
Function
Type
COMMENT
AB19
TX_AUX
O
Auxiliary UART (Tx Data to DTE)
1.8V
AD19
RX_AUX
I
Auxiliary UART (Rx Data to DTE)
1.8V
NOTE:
To avoid a back-powering effect, it is recommended to avoid having any HIGH logic level signal
applied to the digital pins of the module when it is powered OFF or during an ON/OFF transition.
NOTE:
The Auxiliary UART is used as the SW main debug console. It is required to place test points on
this interface even if not used.
8.4.3. RS232 Level Translation
To interface the LE920A4 with a PC com port or a RS232 (EIA/TIA-232) application, a level
translator is required. This level translator must:
Invert the electrical signal in both directions
Change the level from 0/1.8V to +15/-15V
The RS232 UART 16450, 16550, 16650 & 16750 chipsets accept signals with lower levels on the
RS232 side (EIA/TIA-562), allowing a lower voltage-multiplying ratio on the level translator. Note
that the negative signal voltage must be less than 0V and hence some sort of level translation is
always required.
The simplest way to translate the levels and invert the signal is by using a single chip-level
translator. There are a multitude of them, differing in the number of drivers and receivers and in
the levels (be sure to get a true RS232 level translator, not a RS485 or other standards).
By convention, the driver is the level translator from the 0-1.8V UART to the RS232 level. The
receiver is the translator from the RS232 level to 0-1.8V UART.
To translate the whole set of control lines of the UART, the following is required:
2 drivers
2 receivers
NOTE:
The digital input lines operating at 1.8V CMOS have an absolute maximum input voltage of 2.7V.
Therefore, the level translator IC must not be powered by the +3.8V supply of the module.
Instead, it must be powered from a dedicated +1.8V power supply.
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Figure 15: RS232 Level Adaption Circuitry Example
NOTE:
In this case, the length of the lines on the application must be taken into account to avoid
problems in the case of High-speed rates on RS232.
For example, RS232 level adaption circuitry could use a MAXIM transceiver (MAX218). This chip as
shown in Figure 15, is capable of translating directly from 1.8V to the RS232 levels (Example on 4
signals only).
The RS232 serial port lines are usually connected to a DB9 connector as shown in Figure 16. Signal
names and directions are named and defined from the DTE point of view.
Figure 16: RS232 Serial Port Lines Connection Layout
8.5. Peripheral Ports
In addition to the LE920A4 serial ports, the LE920A4 supports the following peripheral ports:
SPI Serial Peripheral Interface
I2C - Inter-integrated circuit
SD/MMC Card Interface
SDIO Interface
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8.5.1. SPI Serial Peripheral Interface
The LE920A4 SPI supports the following:
Master Mode only
1.8V CMOS level
Up to 50 MHz clock rate
NOTE:
SPI is supported on Linux side only. Master mode only is supported, no Slave mode configuration.
Table 28: SPI Signals
PAD
Signal
I/O
Function
Type
Comment
P19
SPI_CLK
O
SPI clock output
1.8V
M19
SPI_MISO
I
SPI data Master input Slave output
1.8V
K19
SPI_MOSI
O
SPI data Master output Slave input
1.8V
N18
SPI_CS
O
SPI chip-select output
1.8V
Figure 17: SPI Signal Connectivity
8.5.2. I2C - Inter-integrated Circuit
The LE920A4 supports an I2C interface on the following pins:
C14 - I2C_SCL
D13 - I2C_SDA
The I2C interface is used for controlling peripherals inside the module (such as codec, etc.).
The I2C can also be used externally by the end customer application. However, to avoid conflicts,
the following addresses must not be used externally by the customer:
Address 0x30 (8 bit, write), 0x31 (8 bit, read)
LE920A4 (Master)
SPI_CS
SPI_CLK
SPI_MOSI
SPI_MISO
Host (Slave)
SPI_CS
SPI_CLK
SPI_MOSI
SPI_MISO
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Address 0x90 (8 bit, write), 0x91 (8 bit, read)
In addition, SW emulated I2C functionality can be used on GPIO 1-6 pins.
Any GPIO (among GPIO 1-6) can be configured as SCL or SDA.
LE920A4 supports I2C Master mode only.
NOTE:
SW emulated I2C on GPIO lines is supported only from the Modem side.
For more information, refer to the LE920A4 AT SW manual for command settings.
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8.5.3. SD/MMC Card Interface
The LE920A4 provides an SD port supporting the SD3.0 specification, which can be used to
support standard SD/MMC memory cards with the following features:
Interface with SD/MMC memory cards up to 2 Tera Byte
Max clock @ 2.95V - 50 MHz SDR
o Max Data: 25 MByte/s
o SD standard: HS-SDR25 at 2.95V
Max clock @ 1.8V - 200 MHz SDR
o Max Data: 100 MByte/s
o SD standard: UHS-SDR104 at 1.8 V
Max clock @ 1.8V - 50 MHz DDR
o Max Data: 50 MByte/s
o SD standard: UHS-DDR50 at 1.8 V
Table 29 lists the LE920A4 SD card signals.
Table 29: SD Card Signals
PAD
Signal
I/O
Function
Type
Comments
AH17
SD/MMC_CMD
O
SD command
1.8/2.95V
AD17
SD/MMC_CLK
O
SD card clock
1.8/2.95V
Y17
SD/MMC_DATA0
I/O
SD Serial Data 0
1.8/2.95V
AF17
SD/MMC_DATA1
I/O
SD Serial Data 1
1.8/2.95V
AB17
SD/MMC_DATA2
I/O
SD Serial Data 2
1.8/2.95V
W17
SD/MMC_DATA3
I/O
SD Serial Data 3
1.8/2.95V
U17
SD/MMC_CD
I
SD card detect input
1.8V
Active Low
S17
VMMC
-
Power supply for MMC
card pull-up resistors
1.8/2.95V
Max Current is
50mA
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Figure 18 shows the recommended connection diagram of the SD interface.
Figure 18: SD Interface Connectivity
NOTE:
SD/MMC is supported only on the Linux side.
The VMMC supply is limited to 50mA max and can be used only to supply the MMC card external
pull-up resistors.
Pull-up resistors must be placed on the host application board.
The card detection input has an internal pull-up resistor.
NOTE:
The power supply to the SD/MMC card VCC is to be provided by the Host application board.
The LE920A4 does not provide a dedicated power supply for the SD/MMC card.
VMMC can be used for enabling of the external power supply (LDO Enable signal)
SD/MMC_DATA2
SD/MMC_DATA3
SD/MMC_CMD
SD/MMC_CLK
SD/MMC_DATA0
SD/MMC_DATA1
LE920A4
SDIO Interface
SD/MMC_CD
DATA2
DATA3
CMD
VDD
VSS
DATA0
DATA1
MicroSD
MMC_CD
GND
GND
10K
10K
10K
10K
10K
C=100nF
GND
External PS 3V
VMMC
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8.5.4. WiFi SDIO Interface
The LE920A4 provides an SDIO port supporting the SDIO3.0 specification, which can be used to
interface with a WiFi chipset (a Qualcomm QCA65x4 chipset or other WiFi solutions - TBD)
The LE920A4 module includes an integrated SW driver for supporting the Qualcomm QCA65x4
chipset.
The SDIO port supports the SDIO 3.0 specification at 1.8V CMOS only, thus cannot be used as an
external SD/MMC card connection.
The LE920A4 module supports an LTE/WiFi coexistence mechanism via the WCI (Wireless
Coexistence Interface) port, which connects between the module and the external WiFi IC.
For a detailed explanation, refer to 0.
Table 30: WiFi SDIO Interface
Pad
Signal
I/O
Function
Type
Comments
AB3
WIFI_SD_CMD
O
WiFi SD Command
1.8V
AM3
WIFI_SD_CLK
O
WiFi SD Clock
1.8V
200 MHz max.
AD3
WIFI_SD_DATA0
I/O
WiFi SD Serial Data 0
1.8V
AF3
WIFI_SD_DATA1
I/O
WiFi SD Serial Data 1
1.8V
AH3
WIFI_SD_DATA2
I/O
WiFi SD Serial Data 2
1.8V
AK3
WIFI_SD_DATA3
I/O
WiFi SD Serial Data 3
1.8V
Y3
WIFI_SDRST
O
WiFi Reset / Power enable control
1.8V
Active Low
AS3
WCI_TX
O
Wireless coexistence interface TXD
1.8V
AT2
WCI_RX
I
Wireless coexistence interface RXD
1.8V
NOTE:
It is recommended that WIFI_RST_CTR be equipped with a pull-up resistor to 1.8V on the host
application to disable WiFi reset function if needed.
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8.6. Audio Interface
The LE920A4 module supports analog and digital audio interfaces.
8.6.1. Analog Audio
The LE920A4 module provides a single analog audio path for transmitting and receiving on the
following pins:
Table 31: Analog Audio Signals
PAD
Signal
I/O
Function
Type
Comments
B5
EAR1_MT+
AO
Earphone signal output1, phase +
Analog
A4
EAR1_MT-
AO
Earphone signal output1, phase -
Analog
B3
MIC1_MT+
AI
Mic signal input1, phase +
Analog
A2
MIC1_MT-
AI
Mic signal input1, phase -
Analog
G6
MICBIAS
AO
Mic bias
Analog
E2
EAR2_MT+
AO
Earphone signal output2, phase +
Analog
D1
EAR2_MT-
AO
Earphone signal output2, phase -
Analog
C2
MIC2_MT+
AI
Mic signal input2, phase +
Analog
B1
MIC2_MT-
AI
Mic signal input2, phase -
Analog
For more details, refer to Ref 5: xE920 Audio Settings Application Note.
WARNING:
The LE920A4 Analog audio implementation uses an internal CODEC (inside the module).
The internal codec uses the same signals as the external LE920A4 Digital audio interface.
Therefore, applications that use analog audio (that is, the codec inside the module) must make
sure that the digital audio interface is either not connected, or set to Hi-Z, or set to ‘input’ at
the Host application.
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8.6.2. Digital Audio
The LE920A4 module can be connected to an external codec through the digital interface.
The product provides a single Digital Audio Interface (DVI) on the following pins:
Table 32: Digital Audio Interface (DVI) Signals
PAD
Signal
I/O
Function
Type
COMMENT
D11
DVI_WA0
O
Digital Audio Interface (WA0)
B-PD 1.8V
PCM_SYNC/I2S WS
C8
DVI_RX
I
Digital Audio Interface (RX)
B-PD 1.8V
PCM_DIN/I2S_DATA_IN
D9
DVI_TX
O
Digital Audio Interface (TX)
B-PD 1.8V
PCM_DOUT/I2S_DATA_OUT
C10
DVI_CLK
O
Digital Audio Interface (CLK)
B-PD 1.8V
PCM_CLK/I2S_CLK
C12
REF_CLK
O
Codec Reference Clock
B-PD 1.8V
I2S_MCLK
LE920A4 DVI has the following characteristics:
PCM Master mode using short or long frame sync modes
16 bit linear PCM format
PCM clock rates of 256 kHz, 512 kHz, 1024 kHz and 2048 kHz (Default)
Frame size of 8, 16, 32, 64, 128 & 256 bits per frame
Sample rates of 8 kHz and 16 kHz
In addition to the DVI port, the LE920A4 module provides a master clock signal (REF_CLK on Pin
C12) which can either provide a reference clock to an external codec or form an I2S interface
together with the DVI port where the REF_CLK acts as the I2S_MCLK.
The REF_CLK default frequency is 12.288 MHz.
When using the DVI with REF_CLK as an I2S interface, 12.288 MHz is 256 x fs (where fs = 48 kHz).
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8.6.2.1. Short Frame Timing Diagrams
Figure 19: Primary PCM Timing
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Table 33: PCM_CODEC Timing Parameters
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8.6.2.2. Long Frame Timing Diagrams
Figure 20: Auxiliary PCM Timing
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Table 34: AUX_PCM_CODEC Timing Parameters
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8.7. General Purpose I/O
The general-purpose I/O pads can be configured to act in three different ways:
Input
Output
Alternate function (internally controlled)
Input pads can only be read and report digital values (high or low) present on the pad at the read
time. Output pads can only be written or queried and set the value of the pad output. An
alternate function pad is internally controlled by LE920A4 firmware and acts depending on the
implemented function.
The following GPIOs are always available as a primary function on the LE920A4.
Table 35: Primary GPIOs
PAD
Signal
I/O
Function
Type
Drive Strength
F9
GPIO_01
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
E10
GPIO_02
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
F11
GPIO_03
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
E12
GPIO_04
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
F13
GPIO_05
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
E14
GPIO_06
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
W19
GPIO_10
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
AN4
GPIO_20
I/O
Configurable GPIO
CMOS 1.8V
2-16 mA
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The additional GPIOs below can be used if their initial functionality is not used.
Table 36: Additional GPIOs
PAD
Signal
I/O
Initial Function
Alternate Function
Type
Drive Strength
Y3
GPIO_13
I/O
WIFI_SDRST
Configurable GPIO
CMOS 1.8V
2-16 mA
AB3
GPIO_14
I/O
WIFI_SDIO_CMD
Configurable GPIO
CMOS 1.8V
2-16 mA
AD3
GPIO_15
I/O
WIFI_SDIO_D0
Configurable GPIO
CMOS 1.8V
2-16 mA
AF3
GPIO_16
I/O
WIFI_SDIO_D1
Configurable GPIO
CMOS 1.8V
2-16 mA
AH3
GPIO_17
I/O
WIFI_SDIO_D2
Configurable GPIO
CMOS 1.8V
2-16 mA
AK3
GPIO_18
I/O
WIFI_SDIO_D3
Configurable GPIO
CMOS 1.8V
2-16 mA
AM3
GPIO_19
I/O
WIFI_SDIO_CLK
Configurable GPIO
CMOS 1.8V
2-16 mA
AJ18
GPIO_31
I/O
UART_RI
Configurable GPIO
CMOS 1.8V
2-16 mA
AG18
GPIO_32
I/O
UART_DSR
Configurable GPIO
CMOS 1.8V
2-16 mA
AE18
GPIO_33
I/O
UART_DCD
Configurable GPIO
CMOS 1.8V
2-16 mA
AC18
GPIO_34
I/O
UART_DTR
Configurable GPIO
CMOS 1.8V
2-16 mA
P19
GPIO_35
I/O
SPI_CLK
Configurable GPIO
CMOS 1.8V
2-16 mA
M19
GPIO_36
I/O
SPI_MISO
Configurable GPIO
CMOS 1.8V
2-16 mA
K19
GPIO_37
I/O
SPI_MOSI
Configurable GPIO
CMOS 1.8V
2-16 mA
N18
GPIO_38
I/O
SPI_CS
Configurable GPIO
CMOS 1.8V
2-16 mA
NOTE:
To avoid a back-powering effect, it is recommended to avoid having any HIGH logic level signal
applied to the digital pins of the module when it is powered OFF or during an ON/OFF transition.
NOTE:
LE920A4 GPIOs can serve as alternate I2C. Refer to Section 8.5.2, I2C - Inter-integrated Circuit.
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8.7.1. Using a GPIO Pad as Input
GPIO pads, when used as inputs, can be tied to a digital output of another device and report its
status, provided the device interface levels are compatible with the GPIO 1.8V CMOS levels.
If a digital output of a device is tied to GPIO input, the pad has interface levels different than 1.8V
CMOS. It can be buffered with an open collector transistor with a 47 kΩ pull-up resistor to 1.8V.
8.7.2. Using a GPIO Pad as an interrupt
GPIO pads which are used as input can also be used as an interrupt source for the software.
In general all GPIO pads can be also used as interrupts.
However, not all GPIO’s can be used as a wakeup source of the module (wakeup from sleep)
Only the following GPIO’s can be used for waking up the system from sleep
GPIO1
GPIO4
GPIO5
8.7.3. Using a GPIO Pad as Output
GPIO pads, when used as outputs, can drive 1.8V CMOS digital devices or compatible hardware.
When set as outputs, the pads have a push-pull output, and therefore the pull-up resistor can be
omitted.
Figure 21: GPIO Output Pad Equivalent Circuit
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9. Miscellaneous Functions
9.1. Indication of Network Service Availability
The STAT_LED pin status shows information on the network service availability and call status.
In the LE920A4 modules, the STAT_LED usually needs an external transistor to drive an external
LED. The table below shows the device status corresponding to the pin status:
Table 37: Network Service Availability Indication
LED Status
Device Status
Permanently off
Device off
Fast blinking (Period 1s, Ton 0,5s)
Net search / Not registered / Turning off
Slow blinking (Period 3s, Ton 0,3s)
Registered full service
Permanently on
A call is active
Figure 22: Status LED Reference Circuit
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9.2. RTC – Real Time Clock
The RTC within the LE920A4 module does not have a dedicated RTC supply pin. The RTC block is
supplied by the VBATT supply.
If the battery is removed, RTC is not maintained so if maintaining an internal RTC is needed,
VBATT must be supplied continuously.
In Power OFF mode, the average current consumption is ~25 uA.
9.3. VAUX Power Output
A regulated power supply output is provided to supply small devices from the module. This
output is active when the module is ON and goes OFF when the module is shut down. The
operating range characteristics of the supply are as follows:
Table 38: Operating Range VAUX Power Supply
Min
Typical
Max
Output voltage
1.75V
1.80V
1.85V
Output current
100 mA
Output bypass capacitor
(inside the module)
1 μF
9.4. ADC Converter
9.4.1. Description
The LE920A4 module provides three 8-bit Analog to Digital converters. Each ADC reads the
voltage level applied on the relevant pin, converts it, and stores it into an 8-bit word.
Table 39 shows the ADC characteristics.
Table 39: ADC Parameters
Min
Max
Units
Input voltage range
0.1
1.7
Volt
AD conversion
-
8
bits
Resolution
-
< 6.6
mV
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9.4.2. Using the ADC Converter
An AT command is available to use the ADC function.
The command is AT#ADC=1,2. The read value is expressed in mV.
Refer to Ref 1: LE920A4 AT Command User Guide for the full description of this function.
9.5. Using the Temperature Monitor Function
The Temperature Monitor permits to control the module’s internal temperature and, if properly
set (see the #TEMPMON command in Ref 1: LE920A4 AT Command User Guide), raises a GPIO to
High Logic level when the maximum temperature is reached.
9.6. Fuel Gauge (optional)
The LE920A4 module can optionally support an external Fuel Gauge solution.
In this case, an external IC that is capable of measuring the current flow in and out of the module
must be added on the carrier board.
Figure 23 shows an example of a typical connectivity of such an external fuel gauge to the
LE920A4 module.
Detailed design - TBD
Figure 23: Fuel Gauge Connectivity Example
Telit Module
VBATT_IN
I2C
GPIO (Wake up)
I2C
Alert Out
SENSE- SENSE+
HOST Power Supply 50mohm Rsense
High side current sensing
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9.7. GNSS Characteristics
The table below specifies the GNSS characteristics and expected performance
The values are related to typical environment and conditions.
Table 40: GNSS Characteristics
Parameters
Typical
Measurement
Notes
Sensitivity
Standalone or MS Based
Tracking Sensitivity
-162.3 dBm
Acquisition
-162.3 dBm
Cold Start Sensitivity
-157.5 dBm
TTFF
Hot
1.1s
GPS+GLONASS Simulator test
Warm
22.1s
GPS+GLONASS Simulator test
Cold
29.94s
GPS+GLONASS Simulator test
Accuracy
0.8 m
GPS+GLONASS Simulator test
Min Navigation update rate
1Hz
Dynamics
2g
Operation Limits
515 m/sec
A-GPS
Supported
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10. Mounting the Module on your Board
10.1. General
The LE920A4 module was designed to be compliant with a standard lead-free SMT process.
10.2. Finishing & Dimensions
Figure 24 shows the mechanical dimensions of the LE920A4 module.
Figure 24: LE920A4 Mechanical Dimensions
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10.3. Recommended Footprint for the Application
Figure 25 shows the recommended footprint for the application board (dimensions are in mm).
To facilitate replacing the LE920A4 module if necessary, it is suggested to design the application
with a 1.5 mm placement inhibit area around the module.
It is also suggested, as a common rule for an SMT component, to avoid having a mechanical part
of the application in direct contact with the module.
NOTE:
In the customer application, the 5 crowns marked as INHIBIT in Figure 25 must be clear of any
signal wiring or ground polygons.
The 5 crown pads should not exist on the customer application board
Figure 25: Recommended Footprint (Top View)
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10.4. Stencil
Stencil’s apertures layout can be the same as the recommended footprint (1:1). The suggested
thickness of stencil foil is greater than 120 µm.
10.5. PCB Pad Design
The solder pads on the PCB are recommended to be of the Non Solder Mask Defined (NSMD)
type.
Figure 26: PCB Pad Design
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10.6. Recommendations for PCB Pad Dimensions (mm)
Figure 27: PCB Pad Dimensions
It is not recommended to place around the pads a via or micro-via that is not covered by solder
resist in an area of 0.15 mm unless it carries the same signal as the pad itself. Micro via inside the
pads are allowed.
Holes in pad are allowed only for blind holes and not for through holes.
Table 41: Recommendations for PCB Pad Surfaces
Finish
Layer Thickness (um)
Properties
Electro-less Ni / Immersion Au
3-7 / 0.05-0.15
Good solder ability protection,
high shear force values
The PCB must be able to resist the higher temperatures, which occur during the lead-free process.
This issue should be discussed with the PCB-supplier. Generally, the wettability of tin-lead solder
paste on the described surface plating is better compared to lead-free solder paste.
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10.7. Solder Paste
We recommend using only “no clean solder paste to avoid the cleaning of the modules after
assembly.
10.7.1. Solder Reflow
Figure 28 shows the recommended solder reflow profile.
Figure 28: Solder Reflow Profile
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Table 42: Solder Profile Characteristics
Profile Feature
Pb-Free Assembly
Average ramp-up rate (TL to TP)
3°C/second max
Preheat
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (min to max) (ts)
150°C
200°C
60-180 seconds
Tsmax to TL
Ramp-up rate
3°C/second max
Time maintained above:
Temperature (TL)
Time (tL)
217°C
60-150 seconds
Peak temperature (Tp)
245 +0/-5°C
Time within 5°C of actual peak
Temperature (tp)
10-30 seconds
Ramp-down rate
6°C/second max
Time 25°C to peak temperature
8 minutes max
NOTE:
All temperatures refer to topside of the package, measured on the package body surface.
WARNING:
The LE920A4 module withstands one reflow process only.
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11. Application Guide
11.1. Debug of the LE920A4 Module in Production
To test and debug the mounting of the LE920A4 module, we strongly recommend to add several
test pads on the host PCB for the following purposes:
Checking the connection between the LE920A4 itself and the application
Testing the performance of the module by connecting it with an external computer
Depending on the customer application, these test pads include, but are not limited to the
following signals:
TXD
RXD
ON/OFF
SHDN_N
RESET_N
GND
VBATT
TX_AUX
RX_AUX
USB_VBUS
USB_D+
USB_D-
GPIO20
WCI_RX
In addition, the following signals are also recommended (but not mandatory):
PWRMON
STAT_LED
SW_RDY
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11.2. Bypass Capacitor on Power Supplies
When a sudden voltage step is asserted to or a cut from the power supplies, the steep transition
causes some reactions such as overshoot and undershoot. This abrupt voltage transition can
affect the device causing it to not operate or to malfunction.
Bypass capacitors are needed to alleviate this behavior. The behavior can appear differently
depending on the various applications. Customers must pay special attention to this issue when
they design their application board.
The length and width of the power lines must be considered carefully, and the capacitance of the
capacitors must be selected accordingly.
The capacitor will also prevent ripple of the power supplies and the switching noise caused in
TDMA systems such as GSM.
Especially, a suitable bypass capacitor must be mounted on the following lines on the application
board:
VBATT & VBATT_PA (Pads AP17,AP19,AR18,AR20,AS17,AS19,AT18,AU17,AU19,AT20)
USB_VBUS (Pad A18)
Recommended values are:
100uF for both VBATT and VBATT_PA together
4.7uF for USB_VBUS (including the 1uF capacitor inside the module)
Customers must still consider that the capacitance mainly depends on the conditions of their
application board.
Generally, more capacitance is required when the power line is longer.
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11.3. SIM Interface
This section presents the recommended schematics for the design of SIM interfaces on the
application boards. The LE920A4 supports two external SIM interfaces.
11.3.1. SIM Schematic Example
Figure 29 illustrates in particular how the application side should be designed, and what values
the components should have.
Figure 29: SIM Schematics
NOTE:
The resistor value on SIMIO pulled up to SIMVCC must be defined to be compliant with the 3GPP
specification for USIM electrical testing.
The LE920A4 module contains an internal pull-up resistor of 20K Ω on SIMIO.
However, the un-mounted option in the application design can be recommended to tune R1 if
necessary.
Table 43 lists the values of C1 to be adopted with the LE920A4 product:
Table 43: SIM Interface C1 Range
Product P/N
C1 Range (nF)
LE920A4
100 nF
Refer to the following document for details:
Ref 7: SIM Integration Design Guide Application Note Rev10
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11.4. EMC Recommendations
All LE920A4 signals are provided with some EMC protection. Nevertheless, the accepted level
differs according to the specific pin. Table 44 lists the characteristics.
Table 44: EMC Recommendations
Pad
Signal
I/O
Function
Contact
Air
All Pins
All
± TBD
± TBD
Antenna
AD1,AU9,S1
Antenna pads
Analog I/O
Antenna pad
± TBD
± TBD
Appropriate series resistors must be considered to protect the input lines from overvoltage.
11.5. Download and Debug Port
Chose one of the following options in the design of the host system to download or upgrade the
Telit software and debug the LE920A4 module when it is already mounted on a host system.
UART and USB interfaces
Users who use both UART and USB interfaces to communicate with LE920A4 must implement
a USB download method in the host system to upgrade the LE920A4 when it is mounted.
USB interface only
Users who use a USB interface only to communicate with the LE920A4 module must arrange
for a USB port in the host system to debug or upgrade the LE920A4 when it is mounted.
UART interface only
Users who use a UART interface only to communicate with the LE920A4 module must arrange
for a UART port in the host system to debug or upgrade the LE920A4 when it is mounted.
11.5.1. Fast Boot Mode
Fast Boot mode is normally used by Telit software to enter SW Download mode.
Fast Boot mode is triggered by GPIO20 (PAD AN4). Asserting this signal high (1.8V) during boot
will force the system into Fast Boot mode.
11.5.2. Recovery Boot Mode
An Emergency Boot Download mode is used if a corrupted boot image was flashed into the device
or if all other recovery modes failed.
Emergency Boot Download mode is triggered by the WCI_RX signal (PAD AT2). Asserting this
signal high (1.8V) during boot will force the system into Emergency Boot Download mode.
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NOTE:
The application board must support accessible test pads on the GPIO20 and WCI_RX signals to
enable the download recovery modes mentioned above.
11.6. Antenna Detection
The LE920A4 module provides an antenna detection application, indicating for each of the cellular
and GNSS antennas whether it is shorted to ground or open.
Refer to Ref 9: Antenna Detection Application Note.
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12. Packing System
12.1. Tray
The LE920A4 module is packed on trays.
The tray is JEDEC compliant, injection molded antistatic Modified Polyphenylene ether (MPPO). It
has good thermal characteristics and can withstand the standard baking temperature of up to
125°C, thereby avoiding the need of handling the modules if baking is required. The trays are
rigid, thus providing more mechanical protection against transport stress. In addition, they are re-
usable and so environmentally sustainable.
There are 2 (two) antistatic rubber bands that enclose each envelope.
The carton box is rigid, thus offering mechanical protection. The carton box has one flap across
the entire top surface. It is sealed with tape along the edges of the box.
Table 45: Tray Packing
Modules per
Tray
Trays per
Envelope
Modules per
Envelope
Envelopes per
Carton Box
Modules per
Box
24
5+ 1 empty
120
4
480
Table 46: Tray Packing Quantities
Order Type
Quantity
Minimum Order Quantity (MOQ)
120
Standard Packing Quantity (SPQ)
480
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Each tray contains 24 modules as shown in Figure 30.
Figure 30: Tray Packing
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Figure 31: Tray Drawing
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12.2. Tape & Reel
The LE920A4 can be packed on tape & reels of 200 pieces each.
Figure 32: Module Positioning into the Carrier
Figure 33: Carrier Tape Detail
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Figure 34: Reel Detail
Figure 35: Reel Box Detail
12.3. Moisture Sensitivity
The LE920A4 module is a Moisture Sensitive Device Level 3, in accordance with standard
IPC/JEDEC J-STD-020. Observe all of the requirements for using this kind of component.
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13. Safety Recommendations
READ CAREFULLY
Be sure that the use of this product is allowed in your country and in the environment required.
The use of this product may be dangerous and must be avoided in the following areas:
Where it can interfere with other electronic devices in environments such as hospitals,
airports, aircrafts, etc.
Where there is risk of explosion, such as gasoline stations, oil refineries, etc.
It is the responsibility of the user to enforce the country regulations and the specific environment
regulations.
Do not disassemble the product; any mark of tampering will compromise the warranty validity.
We recommend following the instructions of the hardware user guides for correct wiring of the
product. The product must be supplied with a stabilized voltage source and the wiring conform to
the security and fire prevention regulations.
The product must be handled with care, avoiding any contact with the pins because electrostatic
discharges may damage the product itself. The same caution must be taken for the SIM, checking
carefully the instructions for its use. Do not insert or remove the SIM when the product is in
power saving mode.
The system integrator is responsible for the functioning of the final product; therefore, care must
be taken of the external components of the module, as well as of any project or installation issue,
because of the risk of disturbing the GSM network or external devices or having any impact on
safety. Should there be any doubt, refer to the technical documentation and the regulations in
force.
Every module must be equipped with a proper antenna with the specified characteristics. The
antenna must be installed with care to avoid any interference with other electronic devices and
must be installed with the guarantee of a minimum 20 cm distance from a human body. If this
requirement cannot be satisfied, the system integrator must assess the final product against the
SAR regulation.
The European Community provides some Directives for electronic equipment introduced on the
market. All the relevant information is available on the European Community website:
http://europa.eu.int/comm/enterprise/rtte/dir99-5.htm
The text of the Directive 99/05 regarding telecommunication equipment is available, while the
applicable Directives (Low Voltage and EMC) are available at:
http://europa.eu.int/comm/enterprise/rtte/dir99-5.htm
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14. Conformity assessment issues
14.1. FCC/ISED Regulatory notices
Modification statement
Telit has not approved any changes or modifications to this device by the user. Any changes or
modifications could void the user’s authority to operate the equipment.
Telit n’approuve aucune modification apportée à l’appareil par l’utilisateur, quelle qu’en soit la
nature. Tout changement ou modification peuvent annuler le droit d’utilisation de l’appareil par
l’utilisateur.
Interference statement (if it is not placed in the device)
This device complies with Part 15 of the FCC Rules and Industry Canada licence-exempt RSS
standard(s). Operation is subject to the following two conditions: (1) this device may not cause
interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio
exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne
doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage
radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Wireless notice
This device complies with FCC/ISED radiation exposure limits set forth for an uncontrolled
environment and meets the FCC radio frequency (RF) Exposure Guidelines and RSS‐102 of the ISED
radio frequency (RF) Exposure rules. Antenna gain must be below:
Frequency Band Freq [MHz] Gain [dBi]
850 MHz 850 0.63
1900 MHz 1900 2.51
1700 MHz 1700 5.00
2500 MHz 2500 8.01
700 MHz 700 5.63
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This transmitter must not be co-located or operating in conjunction with any other antenna or
transmitter.
Le présent appareil est conforme à l'exposition aux radiations FCC / ISED définies pour un
environnement non contrôlé et répond aux directives d'exposition de la fréquence de la FCC
radiofréquence (RF) et RSS‐102 de la fréquence radio (RF) ISED règles d'exposition. Gain de
l'antenne doit être ci-dessous:
L'émetteur ne doit pas être colocalisé ni fonctionner conjointement avec à autre antenne
ou autre émetteur.
FCC Class B digital device notice
This equipment has been tested and found to comply with the limits for a Class B digital device,
pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection
against harmful interference in a residential installation. This equipment generates, uses and can
radiate radio frequency energy and, if not installed and used in accordance with the instructions,
may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful
interference to radio or television reception, which can be determined by turning the equipment
off and on, the user is encouraged to try to correct the interference by one or more of the following
measures:
-Reorient or relocate the receiving antenna.
-Increase the separation between the equipment and receiver.
-Connect the equipment into an outlet on a circuit different from that to which the receiver
is connected.
-Consult the dealer or an experienced radio/TV technician for help.
LE920A4 NA
Contains FCC ID: RI7LE920A4NA
Contains IC: 5131A-LE920A4NA
Frequency Band Freq [MHz] Gain [dBi]
850 MHz 850 0.63
1900 MHz 1900 2.51
1700 MHz 1700 5.00
2500 MHz 2500 8.01
700 MHz 700 5.63
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CAN ICES-3 (B) / NMB-3 (B)
This Class B digital apparatus complies with Canadian ICES-003.
Cet appareil numérique de classe B est conforme à la norme canadienne ICES-003.
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15. Document History
Table 47: Document Revision History
Revision
Date
Changes
3.31
2017-02-16
Adding Section 14: FCC/ISED Regulatory notices
Changing Document History section from 14 to 15
3.3
2017-01-03
Remove “Preliminary” label
Section 1.5: Updated “Related Documents” table
Section 2.3: Added more info on memory supported options
Section 3.1: Added PHY control interface
Section 3.3: Updated LGA “PinMap” Drawing
Section 5.3.3: Added clarification about RESET_N usage
Section 5.3.4: Added Figure for SHDN_N power down timing
Section 8.1: Added info related to USB OTG
Section 8.3: Added info related to PHY control interface
Section 8.5.3: Added clarification about VMMC
Section 8.6.2: Added clarification about I2S support
Section 9.2: Added clarification about RTC
Section 9.7: Added GNSS characteristics
Section 10.2: Updated mechanical drawing
Section 10.3: Updated application footprint drawing
3.2
2016-12-16
Updated Applicability table
3.1
2016-11-27
Section 4.3.2 : Added note regarding pull resistance of special GPIO’s.
Section 8.7.2 : Added info regarding wakeup from GPIO’s.
Section 10.3 : Updated application board footprint drawing
Section 1.5 : Updated link to WIFI application note
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Revision
Date
Changes
3.0
2016-09-01
Official Release;
Merged and updated the Applicability table (p.2) based on previous
Section 1.6
Section 1.5 : Updated the table of related documents
Section 2.6.1 : Updated the table of RF bands
Section 3.1 : Few updates in the table of pin-out
Section 6.1 : Added voltage ripple requirement
Section 6.1: Table 18 : Added current consumption values
Section 9.1: Updated description
Section 9.2: Updated the RTC consumption
Section 9.4.1: Updated description
Section 11.5: Added sub-sections 11.5.1 and 11.5.2
Section 12: Updated table
Section 12.2 : Added information about Tape & Reel packing
General editing and formatting
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Revision
Date
Changes
2.7
2016-06-15
Official Release;
Sec. 2.5.1: Storage temp. is 105 deg.C max.
Sec. 3.1 : Updates about pads E8, AN8
Previous Sec. 4.2 (Limiting Values) Removed
New Sec. 4.2 : Updated min. supply voltage levels
Sec 4.3 : Updated Logic Level Specification
Sec 5.3.3: Updated Reset connection (added future support)
Sec 5.2: Updated “Initialization and Activation state”
Sec. 5.3.3 : Added recommendation and diagram for future
compatibility
Sec. 8 : All hardware interfaces are gathered under this section
A summary table of the module interfaces is presented
Updated number of available GPIO’s inside the summary table
Sec. 8.6.2 : Updated the Digital Audio specifications
Sec. 9.4.1 : Updated the ADC range of input level
Sec. 10.3 : Updated the “Recommended footprint” figure
(was previously mistaken)
Added “PRELIMINARY on top of each page
2.2
2016-04-12
Official Release;
Moved RoHS paragraph from 2.8.3 to 2.5.1
Sections 4.3 & 6.1: VBAT min is 3.4V (not 3.3V)
Added Sec. 15.5 (now 9.5): Temperature Monitor Function
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Revision
Date
Changes
2.0
2016-03-23
Official Release;
General update Added Datasheet related sections
Added Sec. 1.6: Product Variants
Added Sec. 2.2: Applications
Added Sec. 2.3: General Functionality
Added Sec. 2.4: Block Diagram
Modified Sec. 2.6: Frequency Bands
Added Sec. 3: Functional Description
Changed ESD values to TBD (until tested)
Added Sec. 5: Backward compatibility to LE920
Modified Sec. 7.5 : GNSS Antenna Requirements
Added Sec. 15.6 (now 9.6): Fuel Gauge
Added Sec. 17.6 (now 11.6): Antenna Detection
1.0
2016-02-14
Official Release;
Section 2.5.1: Channels corrected for WCDMA B4.
Section 2.5.1: LTE B17 replaced by LTE B12
Section 2.5.2: Added table for LE920A4 -EU
Section 2.6: Sensitivity typical values updated
Section 7.1: Main antenna requirements updated
Section 7.4: Diversity antenna requirements updated
0.5
2015-12-20
First Draft

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