Telit Communications S p A UE910NAV2 UE910-NA V2 User Manual DE910 DUAL Hardware User Guide Preliminary
Telit Communications S.p.A. UE910-NA V2 DE910 DUAL Hardware User Guide Preliminary
User Manual
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| Document ID | 2142782 |
| Application ID | z55qHZLeFHSgXrdnblWmEA== |
| Document Description | User Manual |
| Short Term Confidential | No |
| Permanent Confidential | No |
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| Document Type | User Manual |
| Display Format | Adobe Acrobat PDF - pdf |
| Filesize | 171.01kB (2137597 bits) |
| Date Submitted | 2013-12-16 00:00:00 |
| Date Available | 2014-06-14 00:00:00 |
| Creation Date | 2013-12-12 15:11:44 |
| Producing Software | Microsoft® Word 2010 |
| Document Lastmod | 2013-12-12 15:11:44 |
| Document Title | DE910-DUAL Hardware User Guide - Preliminary |
| Document Creator | Microsoft® Word 2010 |
| Document Author: | issac |
UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 APPLICABILITY TABLE PRODUCT UE910-EU V2 UE910-NA V2 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 2 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE DISCLAIMER While reasonable efforts have been made to assure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from use of the information obtained herein. The information in this document has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies or omissions. Telit reserves the right to make changes to any products described herein and reserves the right to revise this document and to make changes from time to time in content hereof with no obligation to notify any person of revisions or changes. Telit does not assume any liability arising out of the application or use of any product, software, or circuit described herein; neither does it convey license under its patent rights or the rights of others. It is possible that this publication may contain references to, or information about Telit products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that Telit intends to announce such Telit products, programming, or services in your country. Copyrights This instruction manual and the Telit products described in this instruction manual may be, include or describe copyrighted Telit material, such as computer programs stored in semiconductor memories or other media. Laws in the Italy and other countries preserve for Telit and its licensors certain exclusive rights for copyrighted material, including the exclusive right to copy, reproduce in any form, distribute and make derivative works of the copyrighted material. Accordingly, any copyrighted material of Telit and its licensors contained herein or in the Telit products described in this instruction manual may not be copied, reproduced, distributed, merged or modified in any manner without the express written permission of Telit. Furthermore, the purchase of Telit products shall not be deemed to grant either directly or by implication, estoppel, or otherwise, any license under the copyrights, patents or patent applications of Telit, as arises by operation of law in the sale of a product. Computer Software Copyrights The Telit and 3rd Party supplied Software (SW) products described in this instruction manual may include copyrighted Telit and other 3rd Party supplied computer programs stored in semiconductor memories or other media. Laws in the Italy and other countries preserve for Telit and other 3rd Party supplied SW certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or reproduce in any form the copyrighted computer program. Accordingly, any copyrighted Telit or other 3rd Party supplied SW computer programs contained in the Telit products described in this instruction manual may not be copied (reverse engineered) or reproduced in any manner without the express written permission of Telit or the 3rd Party SW supplier. Furthermore, the purchase of Telit products shall not be deemed to grant either directly or by implication, estoppel, or otherwise, any license under the copyrights, patents or patent applications of Telit or other 3rd Party supplied SW, except for the normal non-exclusive, royalty free license to use that arises by operation of law in the sale of a product. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 3 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Usage and Disclosure Restrictions License Agreements The software described in this document is the property of Telit and its licensors. It is furnished by express license agreement only and may be used only in accordance with the terms of such an agreement. Copyrighted Materials Software and documentation are copyrighted materials. Making unauthorized copies is prohibited by law. No part of the software or documentation may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, without prior written permission of Telit High Risk Materials Components, units, or third-party products used in the product described herein are NOT fault-tolerant and are NOT designed, manufactured, or intended for use as on-line control equipment in the following hazardous environments requiring fail-safe controls: the operation of Nuclear Facilities, Aircraft Navigation or Aircraft Communication Systems, Air Traffic Control, Life Support, or Weapons Systems (High Risk Activities"). Telit and its supplier(s) specifically disclaim any expressed or implied warranty of fitness for such High Risk Activities. Trademarks TELIT and the Stylized T Logo are registered in Trademark Office. All other product or service names are the property of their respective owners. Copyright © Telit Communications S.p.A. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 4 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Contents 1. 2. 3. Introduction ............................................................................................................................. 8 1.1. Scope.................................................................................................................................. 8 1.2. Audience ............................................................................................................................. 8 1.3. Contact Information, Support .............................................................................................. 8 1.4. Document Organization ...................................................................................................... 9 1.5. Text Conventions ................................................................................................................ 9 1.6. Related Documents .......................................................................................................... 10 General Product Description ................................................................................................ 11 2.1. Overview ........................................................................................................................... 11 2.2. Product Specifications ...................................................................................................... 12 2.3. RoHS Compliance ............................................................................................................ 13 UE910 V2 Module Connections ............................................................................................ 14 3.1. Pin-Out.............................................................................................................................. 14 3.1.1. 4. Hardware Commands ........................................................................................................... 20 4.1. Turning on the UE910 V2 module ..................................................................................... 20 4.1.1. 4.2. Initialization and Activation State ........................................................................................... 20 Turning off the UE910 V2 module ..................................................................................... 22 4.2.1. 4.2.2. 5. LGA Pads Layout .................................................................................................................. 19 Turning OFF by AT Command .............................................................................................. 22 Turning OFF by tying low ON_OFF* ...................................................................................... 23 4.3. Summary of Turning ON and OFF the Module ................................................................. 23 4.4. Hardware Unconditional Shutdown ................................................................................... 24 Power Supply......................................................................................................................... 26 5.1. Power Supply Requirements ............................................................................................ 26 5.2. Power Supply Requirements ............................................................................................ 27 5.3. General Design Rules ....................................................................................................... 28 5.3.1. 5.3.2. 5.3.3. 5.3.4. Electrical Design Guidelines .................................................................................................. 28 + 5V Input Source Power Supply Design Guidelines ............................................................. 28 +12V Input Source Power Supply Design Guidelines ............................................................ 29 Battery Source Power Supply Design Guidelines .................................................................. 30 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 5 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 5.3.5. 5.3.6. 6. Thermal Design Guidelines ................................................................................................... 30 Power Supply PCB layout Guidelines .................................................................................... 31 Antenna .................................................................................................................................. 33 6.1. GSM/WCDMA Antenna Requirements ............................................................................. 33 6.2. GSM/WCDMA antenna – PCB line Guidelines ................................................................. 34 6.3. GSM/WCDMA Antenna installation Guidelines ....................................................................... 34 7. USB Port ................................................................................................................................ 36 8. Serial Port .............................................................................................................................. 37 8.1. Modem Serial Port 1 ......................................................................................................... 38 8.2. Modem Serial Port 2 ......................................................................................................... 40 8.3. RS232 Level Translation................................................................................................... 41 9. Audio Section Overview ....................................................................................................... 42 9.1. Analog Audio Interface...................................................................................................... 42 9.1.1. 9.1.2. 9.1.3. 9.2. Digital Voice Interface(DVI) ............................................................................................... 46 9.2.1. 10. MIC Connection..................................................................................................................... 43 LIN-IN Connection (TBD) ...................................................................................................... 44 EAR Connection .................................................................................................................... 45 CODEC Example .................................................................................................................. 46 General Purpose I/O........................................................................................................... 47 10.1. Logic Level Specification ............................................................................................... 48 10.2. Using a GPIO Pad as Input ........................................................................................... 48 10.3. Using a GPIO Pad as Output......................................................................................... 49 10.4. Indication of Network Service Availability ...................................................................... 49 10.5. RTC Bypass Output ....................................................................................................... 50 10.6. VAUX/PWRMON Power Output .................................................................................... 50 11. ADC section ........................................................................................................................ 51 11.1. Description..................................................................................................................... 51 11.2. Using ADC Converter .................................................................................................... 51 12. Mounting UE910 V2 on the Application ........................................................................... 52 12.1. General .......................................................................................................................... 52 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 6 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 12.2. Module Finishing & Dimensions .................................................................................... 52 12.3. Recommended foot print for the application .................................................................. 54 12.4. Stencil ............................................................................................................................ 55 12.5. PCB Pad Design ............................................................................................................ 55 12.6. Recommendations for PCB Pad Dimensions (mm) ....................................................... 55 12.7. Solder Paste .................................................................................................................. 57 12.7.1. Solder Reflow ........................................................................................................................ 57 13. Packing System.................................................................................................................. 59 13.1. 14. Application Design Guide ................................................................................................. 62 14.1. 15. Moisture Sensibility ........................................................................................................ 61 Download and Debug Port............................................................................................. 62 Conformity Assessment Issues(Problèmes d'évaluation de conformité) ..................... 63 15.1. 1999/5EC Directive ........................................................................................................ 63 15.2. FCC/IC Regulatory notices ............................................................................................ 64 16. Safety Recommendations ................................................................................................. 66 17. Document History .............................................................................................................. 67 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 7 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 1. Introduction 1.1. Scope The aim of this document is the description of typical hardware solutions useful for developing a product with the Telit UE910 V2 module. 1.2. Audience This document is intended for Telit customers who are about to implement their applications using our UE910 V2 modules. 1.3. Contact Information, Support For general contact, technical support, to report documentation errors and to order manuals, contact Telit Technical Support Center (TTSC) at: TS-EMEA@telit.com TS-NORTHAMERICA@telit.com TS-LATINAMERICA@telit.com TS-APAC@telit.com Alternatively, use: http://www.telit.com/en/products/technical-support-center/contact.php For detailed information about where to buy the Telit modules or for recommendations on accessories and components visit: http://www.telit.com To register for product news and announcements or for product questions contact Telit Technical Support Center (TTSC). Our aim is to make this guide as helpful as possible. Please keep us informed of comments and suggestions for improvements. Telit appreciates feedback from the users of our information. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 8 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 1.4. Document Organization This document contains the following chapters: Chapter 1: “Introduction” provides a scope for this document, target audience, contact and support information, and text conventions. Chapter 2: “General Product Description” gives an overview of the features of the product. Chapter 3: “UE910 V2 Module Connections” deals with the pin out configuration and layout. Chapter 4: “Hardware Commands” How to operate the module via hardware. Chapter 5: “Power supply” Power supply requirements and general design rules. Chapter 6: “Antenna” The antenna connection and board layout design are the most important parts in the full product design. Chapter 7: “USB Port” The USB port on the Telit UE910 V2 is the core of the interface between the module and OEM hardware. Chapter 8: “Serial ports” Refers to the serial ports of the Telit UE910 V2. Chapter 9: “Audio Section overview” Refers to the audio blocks of the Base Band Chip of the UE910 V2 Telit Module. Chapter 10: “General Purpose I/O” How the general purpose I/O pads can be configured. Chapter 11: “ADC section” Deals with this one kind of converter. Chapter 12: “Mounting UE910 V2 on the Application” Mechanical dimensions and recommendations on how to mount the module on the user’s board. Chapter 13: “Packing System” Deals with packing system. Chapter 14: “Application Design Guide” Deals with the design of host system for download or upgrade. Chapter 15: “Conformity Assessment Issues” provides some fundamental hints about the conformity assessment that the final application might need. Chapter 16: “Safety Recommendation” provides some safety recommendations that must be followed by the customer in the design of the application that makes use of the Telit UE910 V2. Chapter 17: “Document History” provides document revision history of the Telit UE910 V2. 1.5. Text Conventions Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur. Caution or Warning – Alerts the user to important points about integrating the module. If these points are not followed, the module and end user equipment may fail or malfunction. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 9 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Tip or Information – Provides advice and suggestions that may be useful when integrating the module. All dates are in ISO 8601 format, i.e. YYYY-MM-DD. 1.6. Related Documents UE910 V2 Software User Guide 1VV0301066 UE910 V2 AT Commands Reference Guide 80419ST10124A Telit EVK2 User Guide 1vv0300704 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 10 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 2. General Product Description 2.1. Overview The aim of this document is the description of typical hardware solutions useful for developing a product with the Telit UE910 V2 module. In this document all the basic functions of a mobile device will be taken into account; for each one of them a proper hardware solution will be suggested and eventually the wrong solutions and common errors to be avoided will be evidenced. Obviously this document cannot embrace all hardware solutions and products that may be designed. Avoiding the discussed wrong solutions must be considered as mandatory. While the suggested hardware configurations must not be considered mandatory, the information given must be used as a guide and a starting point for properly developing a product with the Telit UE910 V2 module. NOTE: The integration of the GSM/GPRS/EGPRS/WCDMA/HSDPA UE910 V2 module within a user application must be done according to the design rules described in this manual. The information presented in this document is believed to be accurate and reliable. However, no responsibility is assumed by Telit Communication S.p.A. for its use, such as any infringement of patents or other rights of third parties. No license is granted by implication or otherwise under any patent rights of Telit Communication S.p.A. other than for circuitry embodied in Telit products. This document is subject to change without notice. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 11 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 2.2. Product Specifications ITEM Air Interface Data Service Power Class for Each band Multi-slot Configuration FEATUREs UE910-EU V2 UE910-NA V2 Dual-Bands WCDMA/HSDPA Dual-Bands WCDMA/HSDPA 900/2100MHz 850/1900MHz Dual-Bands EGSM 900/DCS1800MHz Dual-Bands GSM 850/PCS1900MHz HSDPA : Uplink up to 384kbps / Downlink up to 3.6Mbps(cat-6) WCDMA : Uplink/Downlink up to 384kbps EDGE : Uplink/Downlink up to 236.8kbps GPRS : Uplink/Downlink up to 85.6kbps CSD : 9.6kbps GSM /GPRS GSM /GPRS - Power Class4 @ 900MHz - Power Class4@850MHz - Power Class1 @1800MHz - Power Class1@1900MHz EDGE EDGE - Power Class E2@900MHz - Power Class E2@850MHz - Power Class E2 @1800MHz - Power Class E2@1900MHz WCDMA WCDMA - Power Class3@900/2100MHZ - Power Class3@850/1900MHZ GPRS/EDGE Multi-slot Configuration: - EGSM900/DCS1800 : Multi-slot Class12(up to 4TX) - GSM850/PCS1900 : Multi-slot Class10(up to 2TX) Device dimensions Weight 28.2mm(L) x 28.2mm(W) x 2.2mm(T) 4.1g Temperature Range Storage and Operating temperature range : –40 ~ +85°C Operating voltage IO voltage Operating Voltage Range : 3.4 ~ 4.2V 1.8V 144 Land-Grid-Array interface 10 general I/O ports maximum including multi-functional I/Os State LED output 1 A/D converter Full RS232 CMOS UART: baud rate up to 4Mbps USB High speed 2.0 : baud rate up to 480Mbps 900/1800/2100MHz 850/1900MHz Analog audio interface ( 1 EAR/MIC) Digital Voice Interface SMS (MO/MT) R&TTE, GCF FCC, IC, PTCRB Interface Antenna Audio Message Approvals Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 12 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 2.3. RoHS Compliance As a part of Telit’s corporate policy of environmental protection, the UE910 V2 complies with the RoHS (Restriction of Hazardous Substances) directive of the European Union (EU directive 2002/95/EG). Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 13 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 3. UE910 V2 Module Connections 3.1. Pin-Out Pin Signal I/O Function USB HS 2.0 Communication Port I/O USB differential Data(+) B15 USB_D+ I/O USB differential Data(-) C15 USB_DI Power sense for the internal USB transceiver A13 VUSB Asynchronous UART – Prog. / data +HW Flow Control Serial data input from DTE N15 C103/TXD Serial data output to DTE M15 C104/RXD Input for (DTR) from DTE M14 C108/DTR Input for (RTS) from DTE L14 C105/RTS Output for (CTS) to DTE P15 C106/CTS Output for (DCD) to DTE N14 C109/DCD Output for (DSR) to DTE P14 C107/DSR Output for (RI) to DTE R14 C125/RING SIM Interface SIMVCC External SIM signal – Power supply for the SIM A3 SIMIN External SIM signal – Presence (active low) A4 SIMIO I/O External SIM signal – Data I/O A5 SIMCLK External SIM signal – Clock A6 SIMRST External SIM signal – Reset A7 Digital Voice interface DVI_WA0 I/O Digital Voice Inteface B9 DVI_RX I/O Digital Voice Inteface B6 DVI_TX I/O Digital Voice Inteface B7 DVI_CLK I/O Digital Voice Inteface B8 Analog Voice Interface EAR+ AO Earphone signal output, phase + B2 EARAO Earphone signal output, phase B3 MIC+ AI Microphone input, phase + B4 MICAI Microphone input, phase B5 Digital IO GPIO_01 I/O GPIO_01 / STAT LED C8 GPIO_02 I/O GPIO_02 C9 I/O GPIO_03 C10 GPIO_03 I/O GPIO_04 C11 GPIO_04 I/O GPIO_05 B14 GPIO_05 I/O GPIO_06 C12 GPIO_06 I/O GPIO_07 C13 GPIO_07 I/O GPIO_08 K15 GPIO_08 I/O GPIO_09 L15 GPIO_09 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Type 5V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V 1.8/3V CMOS 1.8V 1.8/3V 1.8/3V 1.8/3V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V Page 14 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Pin Signal G15 GPIO_10 ADC Section ADC_IN1 B1 RF Section Antenna K1 Miscellaneous Functions R13 HW_SHUTDOWN* R12 ON_OFF* C14 VRTC R11 VAUX/PWRMON Power Supply VBATT M1 VBATT M2 VBATT_PA N1 VBATT_PA N2 VBATT_PA P1 VBATT_PA P2 GND E1 GND G1 GND H1 GND J1 GND L1 GND A2 GND E2 GND F2 GND G2 GND H2 GND J2 GND K2 GND L2 GND R2 GND M3 GND N3 GND P3 GND R3 GND D4 GND M4 GND N4 GND P4 GND R4 GND N5 GND P5 GND R5 GND N6 GND P6 I/O I/O GPIO_10 AI Analog to Digital converter input A/D I/O GSM/WCDMA Antenna (50Ohm) RF Hardware Unconditional Shutdown Input Command for Power ON RTC Power Supply Output for external accessories / Power ON Monitor Function Main Power Supply (Baseband) Main Power Supply (Baseband) Main Power Supply (Radio PA) Main Power Supply (Radio PA) Main Power Supply (Radio PA) Main Power Supply (Radio PA) Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Type CMOS 1.8V Pull up to VBATT CMOS 1.8V Power 1.8V Power Power Power Power Power Power Page 15 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Pin Signal GND R6 GND P8 GND R8 GND P9 P10 GND R10 GND M12 GND B13 GND P13 GND E14 GND Reserved Reserved C1 Reserved D1 Reserved F1 Reserved C2 Reserved D2 Reserved C3 Reserved D3 Reserved E3 Reserved F3 Reserved G3 Reserved H3 Reserved J3 Reserved K3 Reserved L3 Reserved C4 Reserved C5 Reserved C6 Reserved C7 Reserved N7 Reserved P7 Reserved R7 Reserved A8 Reserved N8 Reserved A9 Reserved N9 Reserved R9 A10 Reserved B10 Reserved N10 Reserved A11 Reserved B11 Reserved N11 Reserved P11 Reserved A12 Reserved B12 Reserved I/O Function Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Type Page 16 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Pin D12 N12 P12 D13 E13 F13 G13 H13 J13 K13 L13 M13 N13 A14 D14 F14 G14 H14 J14 K14 D15 E15 F15 H15 J15 Signal Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved I/O Function Type Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved WARNING: Reserved pins must not be connected. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 17 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 NOTE: If not used, almost all pins not in use must be left disconnected. The only exceptions are the following pins: PAD M1,M2,N1,N2,P1,P2 E1,G1,H1,J1,L1,A2,E2,F2,G2,H2,J 2,K2,L2,R2,M3,N3,P3,R3,D4,M4,N 4,P4,R4,N5,P5,R5,N6,P6,R6,P8,R8, P9,P10,R10,M12,B13,P13,E14 R12 R13 Signal VBATT&VBATT_PA B15 USB_D+ C15 USB_D- A13 VUSB N15 C103/TXD M15 C104/RXD L14 C105/RTS P15 C106/CTS K1 Main Antenna Notes GND ON/OFF* HW_SHUTDOWN* If not used it should be connected to a Test point. If not used it should be connected to a Test point. If not used it should be connected to a Test point. If not used it should be connected to a Test point. If not used it should be connected to a Test point. If the flow control is not used it should be connected to GND. If not used it should be connected to a Test point. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 18 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 3.1.1. LGA Pads Layout Top View NOTE: The pin defined as RES must be considered RESERVED and not connected on any pin in the application. The related area on the application has to be kept empty. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 19 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 4. Hardware Commands 4.1. Turning on the UE910 V2 module To turn on the UE910 V2, the pad ON_OFF* must be tied low for at least 1 second and then released. The maximum current that can be drained from the ON_OFF* pad is 0.1 mA. A simple circuit to power on the module is illustrated below: 4.1.1. Initialization and Activation State Upon turning on UE910 V2 module, the UE910 V2 module is not active yet because the boot sequence of UE910 V2 is still executing internally. It takes about 10 seconds to complete the initialization of the module internally. For this reason, it would be useless to try to access UE910 V2 during the Initialization state as below. The UE910 V2 module needs at least 10 seconds after the PWRMON goes High to become operational by reaching the activation state. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 20 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 During the Initialization state, any kind of AT-command is not available. DTE must wait for the Activation state to communicate with UE910 V2. To check if the UE910 V2 has powered on, the hardware line VAUX/PWRMON must be monitored. When VAUX/PWRMON goes high, the module has powered on. NOTE: Do not use any pull up resistor on the ON_OFF* line. It is pulled up with 250kΩ internally. Using a pull up resistor may bring latch up problems on the UE910 V2 power regulator and improper power on/off of the module. The line ON_OFF* must be connected only in open collector configuration. NOTE: In this document all the lines are inverted. Active low signals are labeled with a name that ends with "*" or with a bar over the name. NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UE910 V2 module when the module is powered OFF or during an ON/OFF transition. For example: 1. To drive the ON_OFF* pad with a totem pole output of a +3/5 V microcontroller (uP_OUT1): 2. To drive the ON_OFF* pad directly with an ON/OFF button: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 21 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 4.2. Turning off the UE910 V2 module Turning off the device can be done in two ways: via AT command (see UE910 V2 Software User Guide, AT#SHDN) by tying low pin ON_OFF* Either ways, the device issues a detach request to network informing that the device will not be reachable any more. To turn OFF the UE910 V2 the pad ON_OFF* must be tied low for at least 2 seconds and then released. TIP: To check if the device has powered off, hardware line PWRMON must be monitored. The device is powered off when PWRMON goes low. NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UE910 V2 when the module is powered OFF or during an ON/OFF transition. 4.2.1. Turning OFF by AT Command The UE910 V2 can be shut down by a software command. When a shutdown command is sent, the UE910 V2 goes into the finalization state and will shut down PWRMON at the end of this state. The period of the finalization state can vary according to the state of the UE910 V2 so it cannot be fixed definitely. Normally it will be 10 seconds after sending a shutdown command and DTE should monitor the status of PWRMON to see the actual power off. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 22 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 4.2.2. Turning OFF by tying low ON_OFF* To turn OFF the UE910 V2 the pad ON_OFF* must be tied low for at least 2 seconds and then released. The same circuitry and timing for the power on must be used. When the hold time of ON_OFF* is above 2 seconds, the UE910 V2 goes into the finalization state and will shut down PWRMON at the end of this state. The period of the finalization state can vary according to the state of the UE910 V2 so it cannot be fixed definitely. Normally it will be 10 seconds after releasing ON_OFF* and DTE should monitor the status of PWRMON to see the actual power off. 4.3. Summary of Turning ON and OFF the Module The chart below describes the overall sequences for turning ON and OFF the module. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 23 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 4.4. Hardware Unconditional Shutdown The Unconditional shutdown of the module could be activated using the HW_SHUTDOWN* line(pad R13). WARNING: The hardware unconditional shutdown must NOT be used during normal operation of the device since it does not detach the device from the network. It shall be used as an emergency exit procedure. To unconditionally shutdown the UE910 V2, the pad HW_SHUTDOWN* must be tied low for at least 0.8 seconds and then released. NOTE: Do not use any pull up resistor on the HW_SHUTDOWN* line nor any totem pole digital output. It is pulled up internally to VBATT with 57kΩ. Using an external pull up resistor may bring latch up problems on the UE910 V2 power regulator and improper functioning of the module. The line HW_SHUTDOWN* must be connected only in open collector configuration. The HW_SHUTDOWN* will generate an unconditional shutdown of the module without an automatic restart. The module will shutdown but will NOT perform the detach from the cellular network. To proper power on again the module please refer to 4.1 Turning ON the UE910 V2. TIP: The unconditional hardware shutdown must always be implemented on the boards and the software must use it only as an emergency exit procedure. A simple circuit to unconditionally shutdown the module is illustrated below: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 24 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 For example: Let us assume you need to drive the HW_SHUTDOWN* pad with a totem pole output of a +3/5 V microcontroller (uP_OUT2): NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UE910 V2 when the module is powered OFF or during an ON/OFF transition. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 25 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 5. Power Supply The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product’s overall performance. Read carefully the requirements and the guidelines that follow for a proper design. 5.1. Power Supply Requirements The external power supply must be connected to VBATT & VBATT_PA signals and must fulfill the following requirements: Power Supply Nominal Supply Voltage Normal Operating Voltage range Extended Operating Voltage range 3.8V 3.4V ~ 4.2V 3.4V ~ 4.5V NOTE: The Operating Voltage Range MUST never be exceeded. Special care must be taken when designing the application’s power supply section to avoid having an excessive voltage drop. If the voltage drop is exceeding the limits it could cause a Power Off of the module.. Behavior in the extended operating voltage range might deviate from 3GPP specification. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 26 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 5.2. Power Supply Requirements Current Consumption Average Mode Mode Description (mA) < 10uA Power off current (Typical) No call in progress Standby mode AT+CFUN=1 22 Normal mode; full functionality of the module Disabled TX and RX; modules is not registered on the AT+CFUN=4 20 network Power saving; CFUN=0 module registered on the network and can receive voice call or an SMS; but it is AT+CFUN=0 not possible to send AT commands; module wakes up or with an unsolicited code (call or SMS) or rising RTS 4.8/1.2* AT+CFUN=5 line. CFUN=5 full functionality with power saving; Module registered on the network can receive incoming call sand SMS A call in progress Tx and Rx mode Max Power Mode 700 WCDMA/HSDPA voice/data call 700 EU : GPRS Class12 Max Power Mode 440 NA : GPRS Class10 420 EU : EGPRS Class12 Max Power Mode 270 NA : EGPRS Class10 *Worst/best case depends on network configuration and is not under module control. TIP: The electrical design for the power supply should be made ensuring it will be capable of a peak current output of at least 2A. In GSM/GPRS mode, RF transmission is not continuous and it is packed into bursts at a base frequency of about 216 Hz, and the relative current peaks can be as high as about 2A. Therefore the power supply has to be designed in order to withstand these current peaks without big voltage drops; this means that both the electrical design and the board layout must be designed for this current flow. If the layout of the PCB is not well designed, a strong noise floor is generated on the ground; this will reflect on all the audio paths producing an audible annoying noise at 216 Hz; if the voltage drops during the peak, current absorption is too much. The device may even shut down as a consequence of the supply voltage drop. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 27 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 5.3. General Design Rules The principal guidelines for the Power Supply Design embrace three different design steps: 5.3.1. the electrical design the thermal design the PCB layout Electrical Design Guidelines The electrical design of the power supply depends strongly on the power source where this power is drained. We will distinguish them into three categories: 5.3.2. +5V input (typically PC internal regulator output) +12V input (typically automotive) Battery + 5V Input Source Power Supply Design Guidelines The desired output for the power supply is 3.8V, hence there is not a big difference between the input source and the desired output so a linear regulator can be used. A switching power supply will not be suitable because of the low drop-out requirements. When using a linear regulator, a proper heat sink must be provided in order to dissipate the power generated. A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks close to the UE910 V2. A tantalum 100μF capacitor is usually suited. Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is rated at least 10V. A protection diode must be inserted close to the power input in order to save the UE910 V2 from power polarity inversion. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 28 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 An example of a linear regulator with 5V input: 5.3.3. +12V Input Source Power Supply Design Guidelines The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suitable and must not be used. A switching power supply would be preferable because of its better efficiency, especially with the 2A peak current load represented by UE910 V2. When using a switching regulator, a 500 kHz or more switching frequency regulator is preferable because of its smaller inductor size and its faster transient response. This allows the regulator to respond quickly to the current peaks absorption. In any case, the frequency and switching design selection is related to the application to be developed due to the fact the switching frequency could also generate EMC interferences. For car PB battery the input voltage can rise up to 15.8V and this must be kept in mind when choosing components: all components in the power supply must withstand this voltage. A bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks. A 100μF tantalum capacitor is usually suited for this. Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is rated at least 10V. For car applications a spike protection diode must be inserted close to the power input in order to clean the supply from spikes. A protection diode must be inserted close to the power input in order to save the UE910 V2 from power polarity inversion. This can be the same diode as for spike protection. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 29 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 An example of switching regulator with 12V input is in the schematic below: 5.3.4. Battery Source Power Supply Design Guidelines The desired nominal output for the power supply is 3.8V and the maximum voltage allowed is 4.2V. A single 3.7V lithium-ion cell battery type is ideal to supply power to the Telit UE910 V2 module. WARNING: The three battery cells (Ni/Cd or Ni/MH 3.6V nom. battery types or 4V PB types) MUST NOT be used directly because their maximum voltage can rise over the absolute maximum voltage for the UE910 V2 and cause damage. USE only Li-Ion battery types. 5.3.5. A bypass low (usually a 100uF tantalum) ESR capacitor with adequate capacity must be provided in order to cut the current absorption peaks. Make sure the low ESR capacitor (usually a tantalum) is rated at least 10V. A protection diode must be inserted close to the power input in order to protect the UE910 V2 module from power polarity inversions when connecting the battery. The battery capacity must be at least 500mAh in order to withstand the current peaks of 2A. The suggested battery capacity is from 500mAh to 1000mAh. Thermal Design Guidelines The thermal design for the power supply heat sink must be done with the following specifications: Average current consumption during GSM/WCDMA @PWR level max : 700mA NOTE: The average consumption during transmissions depends on the power level at which the device is requested to transmit via the network. The average current consumption hence varies significantly. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 30 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Considering the very low current during idle, especially if the Power Saving function is enabled, it is possible to consider from the thermal point of view that the device absorbs current significantly only during calls. If we assume that the device stays in transmission for short periods of time (a few minutes) and then remains for quite a long time in idle (one hour), then the power supply always has time to cool down between the calls and the heat sink could be smaller than the calculated for 700mA maximum RMS current. There could even be a simple chip package (no heat sink). Moreover in average network conditions the device is requested to transmit at a lower power level than the maximum and hence the current consumption will be less than 700mA (usually around 200 mA). For these reasons the thermal design is rarely a concern and the simple ground plane where the power supply chip is placed can be enough to ensure a good thermal condition and avoid overheating. The heat generated by the UE910 V2 must be taken into consideration during transmission at 23.5dBm max during calls. This generated heat will be mostly conducted to the ground plane under the UE910 V2. The application must be able to dissipate heat. In the GSM/WCDMA mode, since UE910 V2 emits RF signals continuously during transmission, special attention must be paid to how to dissipate the heat generated. The current consumption will be up to about 700mA in GSM/WCDMA continuously at the maximum TX output power. Thus, you must arrange the area on the application PCB must be as large as possible under UE910 V2. The UE910 V2 must be mounted on the large ground area of the application board and make many ground vias to dissipate the heat. 5.3.6. Power Supply PCB layout Guidelines As seen in the electrical design guidelines, the power supply must have a low ESR capacitor on the output to cut the current peaks and a protection diode on the input to protect the supply from spikes and polarity inversion. The placement of these components is crucial for the correct operation of the circuitry. A misplaced component can be useless or can even decrease the power supply performance. The bypass low ESR capacitor must be placed close to the Telit UE910 V2 power input pads, or if the power supply is a switching type, the capacitor can be placed close to the inductor to cut the ripple if the PCB trace from the capacitor to UE910 V2 is wide enough to ensure a drop-less connection even during the 2A current peaks. The protection diode must be placed close to the input connector where the power source is drained. The PCB traces from the input connector to the power regulator IC must be wide enough to ensure no voltage drops occur when the 2A current peaks are absorbed. While a voltage drop of hundreds of mV may be acceptable from the power loss point of view, the same voltage drop may not be acceptable from the noise point of view. If the application does not have an audio interface but only uses the data feature of the Telit UE910 V2, then this noise is not as disruptive and the power supply layout design can be more forgiving. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 31 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 The PCB traces to UE910 V2 and the Bypass capacitor must be wide enough to ensure no significant voltage drops occur when the 2A current peaks are absorbed. This is a must for the same above-mentioned reasons. Try to keep this trace as short as possible. The PCB traces connecting the switching output to the inductor and the switching diode must be kept as short as possible by placing the inductor and the diode very close to the power switching IC (only for switching power supply). This is done in order to reduce the radiated field (noise) at the switching frequency (usually 100-500 kHz). The use of a good common ground plane is suggested. The placement of the power supply on the board must be done in a way to guarantee that the high current return paths in the ground plane are not overlapped with any noise sensitive circuitry such as the microphone amplifier/buffer or earphone amplifier. The power supply input cables must be kept separate from noise sensitive lines such as microphone/earphone cables. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 32 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 6. Antenna The antenna connection and board layout design are the most important parts in the full product design and they strongly reflect on the product’s overall performance. Read carefully and follow the requirements and the guidelines for a proper design. 6.1. GSM/WCDMA Antenna Requirements The antenna for a Telit UE910 V2 device must fulfill the following requirements: GSM / WCDMA Antenna Requirements Frequency range Bandwidth Gain Impedance Input power Depending on the frequency band(s) provided by the network operator, the customer must use the most suitable antenna for that/those band(s) UE910-EU V2 UE910-NA V2 EGSM900 : 80 MHz GSM850 : 70 MHz GSM1800(DCS) : 170 MHz GSM1900(PCS) : 140 MHz WCDMA FDD-I(2100) : 250 MHz WCDMA FDD-II(1900) : 140 MHz WCDMA FDD-VIII(900) : 80 MHz WCDMA FDD-V(850) : 70 MHz Gain < 3dBi 50 Ohm > 33dBm(2 W) peak power in GSM > 23.5dBm Average power in WCDMA <= 5:1(limit to avoid permanent damage) VSWR absolute max <= 2:1(limit to fulfill all regulatory requirements) VSWR recommended When using the Telit UE910 V2, since there’s no antenna connector on the module, the antenna must be connected to the UE910 V2 antenna pad (K1) by means of a transmission line implemented in the PCB. In the case that the antenna is not directly connected at the antenna pad of the UE910 V2, then a PCB line is required. This transmission line shall fulfill the following requirements: Antenna Line on PCB Requirements Characteristic Impedance 50Ohm Max Attenuation 0.3dB Coupling with other signals shall be avoided Cold End (Ground Plane) of antenna shall be equipotential to the UE910 V2 ground pads Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 33 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Furthermore if the device is developed for the US and/or Canada market, it must comply with the FCC and/or IC approval requirements: This device is to be used only for mobile and fixed application. The antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. End-Users must be provided with transmitter operation conditions for satisfying RF exposure compliance. OEM integrators must ensure that the end user has no manual instructions to remove or install the UE910 V2 module. Antennas used for this OEM module must not exceed 2dBi gain for mobile and fixed operating configurations. 6.2. GSM/WCDMA antenna – PCB line Guidelines 6.3. Make sure that the transmission line’s characteristic impedance is 50ohm. Keep line on the PCB as short as possible since the antenna line loss shall be less than around 0.3dB. Line geometry should have uniform characteristics, constant cross section, avoid meanders and abrupt curves. Any kind of suitable geometry/structure can be used for implementing the printed transmission line afferent the antenna. If a Ground plane is required in line geometry, that plane has to be continuous and sufficiently extended so the geometry can be as similar as possible to the related canonical model. Keep, if possible, at least one layer of the PCB used only for the Ground plane; If possible, use this layer as reference Ground plane for the transmission line. It is wise to surround (on both sides) the PCB transmission line with Ground. Avoid having other signal tracks facing directly the antenna line track. Avoid crossing any un-shielded transmission line footprint with other tracks on different layers. The Ground surrounding the antenna line on PCB has to be strictly connected to the main Ground plane by means of via holes (once per 2mm at least) placed close to the ground edges facing line track. Place EM noisy devices as far as possible from UE910 V2 antenna line. Keep the antenna line far away from the UE910 V2 power supply lines. If EM noisy devices are present on the PCB hosting the UE910 V2, such as fast switching ICs, take care of shielding them with a metal frame cover. If EM noisy devices are not present around the line use of geometries like Micro strip or Grounded Coplanar Waveguide are preferred since they typically ensure less attenuation when compared to a Strip line having same length. GSM/WCDMA Antenna installation Guidelines Install the antenna in a place covered by the GSM/WCDMA signal. If the device antenna in the application is located greater then 20cm from the human body and there are no co-located transmitters then the Telit FCC/IC approvals can be re-used by the end product. Antenna shall not be installed inside metal cases. Antenna shall be installed also according to antenna manufacture instructions. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 34 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 WARNING: Consider a mechanical design and a low-capacitance ESD protection device to protect UE910 V2 or customer specific requirements from ESD event to Antenna port (K1). Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 35 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 7. USB Port The UE910 V2 module includes a Universal Serial Bus (USB) transceiver, which operates at USB High-speed (480Mbits/sec) and slave mode only. It is compliant with the USB 2.0 specification and can be used for diagnostic monitoring, control and data transfers. The table below describes the USB interface signals: Pin B15 C15 A13 Signal USB_D+ USB_DVUSB I/O I/O I/O Function USB differential Data(+) USB differential Data(+) Power sense for the internal USB transceiver Type 5V The table below describes the VUSB specification: Parameter Input voltage Min 4.75V Typ 5.0V Max 5.25V WARNING: Consider a mechanical design and a low-capacitance ESD protection device to protect UE910 V2 or customer specific requirements from ESD event to USB lines (B15, C15 and A13). Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 36 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 8. Serial Port The serial port on the Telit UE910 V2 is the interface between the module and OEM hardware. Only one serial port is available on the module: Modem Serial Port 1 (Main) Several configurations can be designed for the serial port on the OEM hardware. The most common are: RS232 PC comport Microcontroller UART@1.8V(Universal Asynchronous Receiver Transmit) Microcontroller UART@5V or other voltages different from 1.8V Depending on the type of serial port on the OEM hardware, a level translator circuit may be needed to make the system work. On the UE910 V2 the ports are CMOS 1.8V. The electrical characteristics of the serial port are explained in the following tables: Absolute Maximum Ratings -Not Functional Parameter Input level on non-power pin with respect to ground Min -0.3 Max +2.3V Operating Range - Interface levels (1.8V CMOS) Parameter Input high level Input low level Output high level Output low level Min 1.5V 0V 1.35V 0V Max 2.1 V 0.35V 1.8V 0.45V Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 37 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 8.1. Modem Serial Port 1 The serial port 1 on the UE910 V2 is a +1.8V UART with all 7 RS232 signals. It differs from the PC-RS232 in the signal polarity (RS232 is reversed) and levels. RS232 Pin # Signal UE910 V2 Pad No. C109/DCD N14 Data Carrier Detect C104/RXD M15 Transmit line *see Note C103/TXD N15 Receive line *see Note C108/DTR M14 Data Terminal Ready GND C107/DSR P14 Data Set Ready C106/CTS P15 Request to Send C105/RTS L14 Clear to Send C125/RI R14 Ring Indicator Function Usage Output from the UE910 V2 that indicates the carrier presence Output transmit line of the UE910 V2 UART Input receive of the UE910 V2 UART Input to the UE910 V2 that controls the DTE READY condition GND Output from the UE910 V2 that indicates the module is ready Output from the UE910 V2 that controls the hardware flow control Input to the UE910 V2 that controls the hardware flow control Output from the UE910 V2 that indicates the incoming call condition The following table shows the typical value(pulled inside the baseband chipset) and status for input lines in all module states: Signal/State OFF RESET ON Power saving PU tied to unknown Pull Down (21K~210K) Pull Down (21K~210K) Pull Up (39K~390K) Pull Up (39K~390K) Pull Up (39K~390K) 1.8V TXD RTS DTR NOTE: According to V.24, RX/TX signal names are referred to the application side. Therefore, on the UE910 V2 side these signals are on the opposite direction: TXD on the application side will be connected to the receive line (here named C103/TXD) Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 38 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 RXD in the application side will be connected to the transmit line (here named C104/RXD) NOTE: For minimum implementation, only the TXD and RXD lines must be connected, the other lines can be left open provided a software flow control is implemented. NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UE910 V2 when the module is powered off or during an ON/OFF transition. NOTE: High-speed UART supports up to 4Mbps. Please refer to the AT command User Guide in detail. WARNING: Consider a mechanical design and a low-capacitance ESD protection device to protect UE910 V2 or customer specific requirements from ESD event to UART port (M15, N15, P15 and L14). Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 39 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 8.2. Modem Serial Port 2 The secondary serial port on the UE910 V2 is not supported. PAD D15 E15 Signal Reserved Reserved I/O Function Type Reserved Reserved Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 40 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 8.3. RS232 Level Translation In order to interface the Telit UE910 V2 with a PC com port or a RS232 (EIA/TIA-232) application, a level translator is required. This level translator must: Invert the electrical signal in both directions Change the level from 0/1.8V to +/-15V Actually, the RS232 UART 16450, 16550, 16650 & 16750 chipsets accept signals with lower levels on the RS232 side (EIA/TIA-562), allowing a lower voltage-multiplying ratio on the level translator. Note that the negative signal voltage must be less than 0V and hence some sort of level translation is always required. The simplest way to translate the levels and invert the signal is by using a single chip level translator. There is a multitude of them, differing in the number of drivers and receivers and in the levels (be sure to get a true RS232 level translator not a RS485 or other standards). By convention the driver is the level translator from the 0-1.8V UART to the RS232 level. The receiver is the translator from the RS232 level to 0-1.8V UART. In order to translate the whole set of control lines of the UART you will need: 5 drivers 3 receivers An example of RS232 level adaption circuitry could be accomplished using a MAXIM transceiver (MAX218). In this case the chipset is capable of translating directly from 1.8V to the RS232 levels (Example on 4 signals only). The RS232 serial port lines are usually connected to a DB9 connector with the following layout: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 41 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 9. Audio Section Overview The UE910 V2 provides an analog audio interface and digital audio interface. 9.1. Analog Audio Interface The UE910 V2 provides an analog audio interface; one differential input for audio to be transmitted(Uplink) and a balanced output for audio to be received(Downlink). The bias for the microphone has to be as clean as possible; the first connection (single ended) is preferable since the Vmic noise and ground noise are fed into the input as common mode and then rejected. This sounds strange; usually the connection to use in order to reject the common mode is the balanced one. In this situation we have to recall that the microphone is a sound to current transducer, so the resistor is the current to tension transducer, so finally the resistor feeds the input in balanced way even if the configuration, from a microphone point of view, seems to be un-balanced. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 42 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 9.1.1. MIC Connection If a “balanced way” is anyway desired, much more care has to be taken to VMIC noise and ground noise. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 43 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 TIP: Since the J-FET transistor inside the microphone acts as RF-detector-amplifier, ask vendor for a microphone with anti-EMI capacitor (usually a 33pF or a 10pF capacitor placed across the output terminals inside the case). 9.1.2. LIN-IN Connection (TBD) If the audio source is not a mike but a different device, the following connections can be done. Place 100nF capacitor in series with both inputs, so the DC current is blocked. Place the 33pF-100Ohm33pF RF-filter, in order to prevent some EMI field to get into the high impedance high gain MIC inputs. Since the input is differential, the common mode voltage noise between the two (different) grounds is rejected, provided that both AF_IN+ & AF_IN- are connected directly onto the source. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 44 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 9.1.3. EAR Connection The audio output of the UE910 V2 is balanced, this is helpful to double the level and to reject common mode (click and pop are common mode and therefore rejected). These outputs can drive directly a small loudspeaker with electrical impedance not lower than 32Ohm. TIP: in order to get the maximum audio level at a given output voltage level (dBspl/Vrms), the following breaking through procedure can be used. Have the loudspeaker as close as you can to the listener (this simplify also the echo cancelling); choose the loudspeaker with the higher sensitivity (dBspl per W); choose loudspeakers with the impedance close to the limit in order to feed more power inside the transducer (it increases the W/Vrms ratio). If this were not enough, an external amplifier should be used. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 45 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 9.2. Digital Voice Interface(DVI) The product is providing one Digital Audio Interface (DVI) on the following Pins: Pin Signal I/O Function B9 DVI_WA0 I/O Digital Voice interface (WA0) B6 DVI_RX Digital Voice interface (RX) B7 DVI_TX Digital Voice interface (TX) B8 DVI_CLK I/O Digital Voice interface (CLK) Type 1.8V 9.2.1. CODEC Example Please refer to the Digital Voice Interface Application note. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 46 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 10. General Purpose I/O The UE910 V2 module is provided by a set of Digital Input / Output pins Input pads can only be read; they report the digital value (high or low) present on the pad at the read time. Output pads can only be written or queried and set the value of the pad output. An alternate function pad is internally controlled by the UE910 V2 firmware and acts depending on the function implemented. The following GPIOs are available on the UE910 V2: Pin Signal I/O Function Type Default State Note C8 GPIO_01 I/O Configurable GPIO CMOS 1.8V INPUT Alternate function STAT_LED C9 C10 C11 B14 C12 C13 K15 L15 G15 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 GPIO_09 GPIO_10 I/O I/O I/O I/O I/O I/O I/O I/O I/O Configurable GPIO Configurable GPIO Configurable GPIO Configurable GPIO Configurable GPIO Configurable GPIO Configurable GPIO Configurable GPIO Configurable GPIO CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V CMOS 1.8V INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 47 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 10.1. Logic Level Specification Where not specifically stated, all the interface circuits work at 1.8V CMOS logic levels. The following table shows the logic level specifications used in the UE910 V2 interface circuits: Absolute Maximum Ratings -Not Functional Parameter Input level on any digital pin (CMOS 1.8) with respect to ground Min -0.3V Max 2.3V Operating Range - Interface levels (1.8V CMOS) Parameter Input high level Input low level Output high level Output low level Min 1.5V 0.0V 1.35V 0.0V Max 2.1V 0.35V 1.8V 0.45V Current characteristics Parameter Output Current Input Current 10.2. Typical 2mA 30uA Using a GPIO Pad as Input The GPIO pads, when used as inputs, can be connected to a digital output of another device and report its status, provided this device has interface levels compatible with the 1.8V CMOS levels of the GPIO. If the digital output of the device to be connected with the GPIO input pad has interface levels different from the 1.8V CMOS, then it can be buffered with an open collector transistor with a 47KΩ pull-up resistor to 1.8V. NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the module when it is powered OFF or during an ON/OFF transition. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 48 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 10.3. Using a GPIO Pad as Output The GPIO pads, when used as outputs, can drive 1.8V CMOS digital devices or compatible hardware. When set as outputs, the pads have a push-pull output and therefore the pull-up resistor may be omitted. 10.4. Indication of Network Service Availability The STAT_LED pin status shows information on the network service availability and Call status. In the UE910 V2 modules, the STAT_LED usually needs an external transistor to drive an external LED. Because of the above, the status indicated in the following table is reversed with respect to the pin status: LED status Permanently off Fast blinking (Period 1s, Ton 0,5s) Slow blinking (Period 3s, Ton 0,3s) Permanently on Device Status Device off Net search / Not registered / turning off Registered full service a call is active A schematic example could be: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 49 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 10.5. RTC Bypass Output The VRTC pin brings out the Real Time Clock supply, which is separate from the rest of the digital part, allowing having only RTC going on when all the other parts of the device are off. To this power output a backup capacitor can be added in order to increase the RTC autonomy during power off of the battery. NO Devices must be powered from this pin. In order to keep the RTC active when VBATT is not supplied it is possible to back up the RTC section connecting a backup circuit to the related VRTC signal (pad C14 on module’s Pinout). For additional details on the Backup solutions please refer to the related application note (xE910 RTC Backup Application Note) 10.6. VAUX/PWRMON Power Output A regulated power supply output is provided in order to supply small devices from the module. This output is active when the module is ON and goes OFF when the module is shut down. The operating range characteristics of the supply are: Operating Range – VAUX/PWRMON power supply Parameter Output voltage Output current Output bypass capacitor (Inside the module) Min 1.77V Typical 1.8V Max 1.83V 200mA 2.2μF Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 50 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 11. ADC section 11.1. Description The on board ADC is 12-bit converter. It is able to read a voltage level in the range of 0 ~ 1.2 volts applied on the ADC pin input and store and convert it into 12 bit word. Parameter Input Voltage range AD conversion Resolution Input Resistance Min Max 1.2 10 Units Volt bits mV Mohm The UE910 V2 provides one Analog to Digital Converter. The input line is named as ADC_IN1 and it is available on pad B1. 11.2. Using ADC Converter An AT command is available to use the ADC function. The command is AT#ADC=1,2. The read value is expressed in mV Refer to SW User Guide or AT Commands Reference Guide for the full description of this function. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 51 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 12. Mounting UE910 V2 on the Application 12.1. General The UE910 V2 has been designed in order to be compliant with a standard lead-free SMT process. 12.2. Module Finishing & Dimensions The UE910 V2 overall dimensions are: Length : 28.2 mm Width : 28.2 mm Thickness : 2.2 mm Weight : 4.1 g Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 52 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 53 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 12.3. Recommended foot print for the application 144 pins < Top View > In order to easily rework the UE910 V2 it is suggested to consider having a 1.5 mm placement inhibit area around the module on the application. It is also suggested, as a common rule for an SMT component, to avoid having a mechanical part of the application in direct contact with the module. NOTE: In the customer application, the region under WIRING INHIBIT (see figure) must be clear from signal or ground paths. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 54 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 12.4. Stencil Stencil’s apertures layout can be the same as the recommended footprint (1:1). A suggested thickness of stencil foil ≥ 120 µm. 12.5. PCB Pad Design Non solder mask defined (NSMD) type is recommended for the solder pads on the PCB. Copper pad Solder mask Copper pad PCB Solder Mask Defined 12.6. Non Solder Mask Defined Recommendations for PCB Pad Dimensions (mm) The recommendation for the PCB pads dimensions are described in the following image(dimensions in mm) It is not recommended to place via or micro-via not covered by solder resist in an area of 0.3 mm around the pads unless it carries the same signal as the pad itself (see following figure). Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 55 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Holes in pad are allowed only for blind holes and not for through holes. Recommendations for PCB Pad Surfaces: Finish Electro-less Ni / Immersion Au Layer thickness (um) 3 ~ 7 / 0.05 ~ 0.15 Properties good solder ability protection, high shear force values The PCB must be able to resist the higher temperatures which are occurring at the lead-free process. This issue should be discussed with the PCB-supplier. Generally, the wettability of tin-lead solder paste on the described surface plating is better compared to lead-free solder paste. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 56 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 12.7. Solder Paste Solder Paste Lead free Sn/Ag/Cu We recommend using only “no clean” solder paste in order to avoid the cleaning of the modules after assembly. 12.7.1. Solder Reflow The following is the recommended solder reflow profile: Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Tsmax to TL - Ramp-up Rate Time maintained above: - Temperature (TL) - Time (tL) Peak Temperature (TP) Pb-Free Assembly 3℃/second max 150℃ 200℃ 60 ~ 180 seconds 3℃/second max 217℃ 60 ~150 seconds 245 +0/-5℃ Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 57 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Profile Feature Pb-Free Assembly Time within 5℃ of actual Peak Temperature (tP) 10 ~30 seconds Ramp-down Rate 6 ℃/sec max Time 25℃ to Peak Temperature 8 minutes max NOTE: All temperatures refer to topside of the package, measured on the package body surface. WARNING: The UE910 V2 module withstands one reflow process only. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 58 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 13. Packing System The UE910 V2 modules are packaged on trays of 20 pieces each. These trays can be used in SMT processes for pick & place handling. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 59 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 60 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 13.1. Moisture Sensibility The UE910 V2 is a Moisture Sensitive Device level 3, in accordance with standard IPC/JEDEC JSTD-020, take care all the relative requirements for using this kind of components. Moreover, the customer has to take care of the following conditions: a) Calculated shelf life in sealed bag: 12 months at < 40°C and 90% relative humidity (RH). b) Environmental condition during the production: 30°C / 60% RH according to IPC/JEDEC J-STD033A paragraph 5. c) The maximum time between the opening of the sealed bag and the reflow process must be 168hours if condition b) “IPC/JEDEC J-STD-033A paragraph 5.2” is respected d) Baking is required if conditions b) or c) are not respected e) Baking is required if the humidity indicator inside the bag indicates 10% RH or more Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 61 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 14. Application Design Guide 14.1. Download and Debug Port One of the following options should be chosen in the design of host system in order to download or upgrade the Telit’s software and debug UE910 V2 when UE910 V2 is already mounted on a host system. CASE I: Users who use both of UART and USB interfaces to communicate with UE910 V2 Must implement a download method in a host system for upgrading UE910 V2 when it’s mounted. CASE II: Users who use USB interface only to communicate with UE910 V2 Must arrange UART port in a host system for debugging or upgrading UE910 V2 when it’s mounted. CASE III: Users who use UART interface only to communicate with UE910 V2 Must arrange USB port in a host system for debugging or upgrading UE910 V2 when it’s mounted. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 62 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 15. Conformity Assessment Issues(Problèmes d'évaluation de conformité) 15.1. 1999/5EC Directive The Telit UE910-EU V2 module has been evaluated against the essential requirements of the 1999/5/EC Directive. The conformity assessment procedure referred to in Article 10 and detailed in Annex IV of Directive 1999/5/EC has been followed with the involvement of the following Notified Body: AT4 wireless S.A. Parque Technologico de Andalucia C/ Severo Ochoa 2 29590 Campanillas – Malaga SPAIN Notified Body No: 1909 Thus the following marking is included in the product: Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 63 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 15.2. FCC/IC Regulatory notices Modification statement Telit has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user’s authority to operate the equipment. Interference statement This device complies with Part 15 of the FCC Rules and Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) This device may not cause interference, (2) This device must accept any interference, including interference that may cause undesired operation of the device. Wireless notice The user must refer to below information to meet the FCC/IC's RF exposure rules and regulations when they design: The system antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all the persons and must not be co-located or operating in conjunction with any other antenna or transmitter. Users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance. Antenna gain must be below: Frequency band GSM850 WCDMA FDD V PCS1900 WCDMA FDD II UE910-NA V2 8.1 dBi 11.09 dBi 3.51 dBi 9.83 dBi FCC Class B digital device notice This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: - Reorient or relocate the receiving antenna. - Increase the separation between the equipment and the receiver. - Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. - Consult the dealer or an experienced radio/TV technician for help. Labeling on Host product statements Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 64 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 Host system including UE910-NA V2 must be labeled with “Contains FCC ID:RI7UE910NAV2 and IC ID:5131A-UE910NAV2”. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 65 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 16. Safety Recommendations READ CAREFULLY Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas: Where it can interfere with other electronic devices in environments such as hospitals, airports, aircrafts, etc. Where there is risk of explosion such as gasoline stations, oil refineries, etc. It is the responsibility of the user to enforce the country’s regulations and the specific environmental regulation. Do not disassemble the product; any evidence of tampering will compromise the warranty validity. Follow the instructions of the hardware user guides for a correct wiring of the product. The product has to be supplied with a stabilized voltage source and the wiring has to conform to the security and fire prevention regulations. The product has to be handled with care, avoiding any contact with the pads because electrostatic discharges may damage the product itself. The system integrator is responsible for the functioning of the final product; therefore, care has to be taken with the external components of the module as well as of any project or installation issue because of the risk of disturbing the GSM/WCDMA network or external devices or having impact on security. Should there be any doubt, please refer to the technical documentation and the regulations in force. Every module has to be equipped with a proper antenna with specific characteristics. The antenna has to be installed with care in order to avoid any interference with other electronic devices and has to guarantee a minimum distance from the body (20 cm). In case this requirement cannot be satisfied, the system integrator has to assess the final product against SAR regulations. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 66 of 67 UE910 V2 Hardware User Guide 1VV0301065 Rev.1 – 2013-12-12 17. Document History Revision Date 2013-08-22 2013-12-12 Changes Preliminary release Changed Audio block diagram Added Conformity Assessment Issues Updated FCC/IC Regulatory notices Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 67 of 67
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