Unigen UGWC821R NEMO BLUETOOTH RADIO MODULE User Manual NEMO Datasheet UGWC621RSMA133

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NEMO Bluetooth Radio Module
Datasheet
Solutions for a Real Time World
Unigen Corp. Wireless Module Products
NEMO Bluetooth Radio Modules
UGWC621RSMA133
Issue Date: 18-Aug-09
Revision: 1.1
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NEMO Bluetooth Radio Module
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Revision History
Rev. No.
1.0
1.1
History
Issue Date
Draft
Revision
Dec. 5, 2008
Aug. 18, 2009
Remarks
Advanced information; Author: Allen B. Cabreros
Added dimensional drawings.
THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY
WARRANTY OF MERCHANTABILITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR
PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION
OR SAMPLE.
Unigen Corporation disclaims all liability, including liability for infringement of any proprietary
rights, relating to use of information in this document. No license, expressed or implied, by
estoppel or otherwise, to any intellectual property rights is granted herein.
*Third-party brands, names, and trademarks are the property of their respective owners.
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TABLE OF CONTENTS
LIST OF FIGURES __________________________________________4
LIST OF TABLES ___________________________________________5
PRODUCT INTRODUCTION ___________________________________6
PRODUCT INTRODUCTION ___________________________________6
FEATURES AND BENEFITS____________________________________6
PRODUCT DESCRIPTION_____________________________________8
NEMO Module __________________________________________8
CSR BlueCore 6 ROM Transceiver IC _________________________8
Functional Block Diagrams ________________________________9
PIN ASSIGNMENT __________________________________________11
PIN FUNCTIONS ___________________________________________12
ABSOLUTE MAXIMUM RATINGS _______________________________13
RECOMMENDED OPERATING CONDITIONS ______________________13
RF CHARACTERISTICS ______________________________________14
EXTERNAL SLOW CLOCK SOURCE CHARACTERISTICS ______________14
AGENCY CERTIFICATIONS (PRE-SCAN) _________________________15
REGULATORY COMPLIANCE STATEMENT ________________________15
FUNCTIONAL OVERVIEW ____________________________________16
NEMO Hardware Functional Description ______________________16
NEMO Firmware Functional Description ______________________17
CSR BLUETOOTH SOFTWARE STACK ____________________________18
Key Features of the HCI Stack: Standard Bluetooth Functionality __19
Key Features of the HCI Stack: Extra Functionality______________21
DIGITAL INTERFACES _______________________________________22
High Speed UART Interface________________________________22
BlueCore Serial Protocol (BCSP) ____________________________22
BLUECORE COMMAND (BCCMD) PROTOCOL ______________________24
Audio PCM and I2S Interfaces _____________________________25
PCM Interface Master/Slave _______________________________25
PCM Long Frame Sync ____________________________________27
Short Frame Sync _______________________________________28
Multi-slot Operation _____________________________________29
GCI Interface __________________________________________30
PCM Slots and Sample Formats _____________________________31
PCM Timing Information __________________________________32
PCM CLK and PCM SYNC Generation _________________________34
PCM Configuration ______________________________________35
Digital Audio Interface (I²S) _______________________________38
Figure 20: Digital Audio Interface Master Timing _______________41
POWER CONSUMPTION _____________________________________42
BOOTING NEMO ROM _______________________________________44
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NEMO Bluetooth Radio Module
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Datasheet
UART Auto Baud Rate ____________________________________44
Persistent Store Keys (PSKEYS) ____________________________45
TYPICAL APPLICATION CIRCUITS _____________________________48
NEMO with out external 32kHz slow clock source: ______________48
NEMO with external 32kHz slow clock source: _________________49
MECHANICAL DRAWINGS ____________________________________50
REFERENCE DOCUMENTATION ________________________________51
CONTACT INFORMATION ____________________________________51
LIST OF FIGURES
Figure 1: NEMO Module Block Diagram__________________________9
Figure 2: CSR BlueCore 6 ROM Block Diagram ____________________10
Figure 3: NEMO Module Pin Locations __________________________11
Figure 4: BlueCore Bluetooth HCI Stack _________________________18
Figure 5: UART Host Connection _______________________________23
Figure 6: BCSP Context ______________________________________23
Figure 7: BCCMD Interface ___________________________________24
Figure 8: PCM Interface Master _______________________________25
Figure 9: PCM Interface Slave_________________________________26
Figure 10: Long Frame Sync (Shown with 8-bit Companded Sample) __27
Figure 11: Short Frame Sync (Shown with 16-bit Sample) ___________28
Figure 12: Multi-slot Operation with Two Slots and 8-bit Companded Samples
________________________________________________________29
Figure 13: GCI Interface _____________________________________30
Figure 14: 16-Bit Slot Length and Sample Formats ________________31
Figure 15: PCM Master Timing Long Frame Sync __________________33
Figure 16: PCM Master Timing Short Frame Sync __________________33
Figure 17: PCM slave Timing Short Frame Sync ___________________34
Figure 18: I²S Mode Digital Audio Interface ______________________39
Figure 19: Digital Audio Interface Slave Timing ___________________40
Figure 20: Digital Audio Interface Master Timing __________________41
Figure 21: NEMO Example Application Circuit; No External Slow Clock Source
________________________________________________________48
Figure 22: NEMO Example Application Circuit; External Slow Clock Source
________________________________________________________49
Figure 23: NEMO Mechanical Drawing __________________________50
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NEMO Bluetooth Radio Module
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LIST OF TABLES
TABLE 1: NEMO PIN FUNCTIONS ______________________________12
TABLE 2: ABSOLUTE MAXIMUM RATINGS________________________13
TABLE 3: RECOMMENDED OPERATING CONDITIONS _______________13
TABLE 4: RF CHARACTERISTICS _______________________________14
TABLE 5: EXTERNAL SLOW CLOCK CHARACTERISTICS______________14
TABLE 6: PCM TIMING TABLE _________________________________32
TABLE 7: PSKEY_PCM_LOW_JITTER_CONFIG DESCRIPTION_________36
TABLE 8: PSKEY_PCM_CONFIG32 DESCRIPTION __________________36
TABLE 9: ALTERNATIVE FUNCTIONS OF THE DIGITAL AUDIO BUS INTERFACE
ON THE PCM INTERFACE_____________________________________38
TABLE 10: PSKEY_DIGITAL_AUDIO_CONFIG _____________________38
TABLE 11: DIGITAL AUDIO INTERFACE SLAVE TIMING _____________40
TABLE 12: DIGITAL AUDIO INTERFACE MASTER TIMING____________41
TABLE 13: OPERATING POWER CONSUMPTION FIGURES ___________42
TABLE 14: PEAK CURRENT ___________________________________43
TABLE 15: BOOT PSKEY LIST _________________________________46
TABLE 16: REFERENCE DOCUMENTATION _______________________51
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NEMO Bluetooth Radio Module
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Datasheet
PRODUCT INTRODUCTION
The Nemo Bluetooth radio module enables Bluetooth functionality to any hosted system. Nemo
supports Bluetooth version 2.1 with Enhanced Data Rate mode for up to 3Mbps throughput.
Nemo’s small module footprint and low power consumption makes it attractive for small, handheld,
battery powered devices for short range wireless communications. Bluetooth is a cable
replacement radio technology. The advanced Bluetooth protocol stack adds seamless, secure,
adhoc, point to multi-point communications between other Bluetooth enabled devices regardless
of manufacturer. Bluetooth enables personal area networks and short range communications
between devices such as portable handhelds, personal computers, embedded devices and
industrial communication devices.
FEATURES AND BENEFITS
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•
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•
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•
•
•
Bluetooth v2.1+EDR compliant
CSR BlueCore 6 ROM
2.40-2.480 GHz FHSS Radio
Max Data Rate 3Mbps
±10PPM Crystal Oscillator Included
4Mbit High Speed UART Interface
Single 3.3V Power Supply
Bluetooth Co-existence Support with 802.11
Deep Sleep Mode of 40µA With Fast Wake-up
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Datasheet
Applications
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Short Range Radio Systems
Point-to-Point Systems
Point-to-Multi-Point Systems
Cable Replacement
Portable Devices
Mobile Phones
Headsets
Hand Free Kits
Personal Computers
Laptops
Personal Hand Handhelds
Remote Controls
Mouse
Keyboards
Human Interface Devices (HID)
Embedded Devices
Asset Tracking
Barcode Scanners
Data Acquisition Devices
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PRODUCT DESCRIPTION
NEMO Module
The Nemo module is a complete 2.4GHz radio transceiver operating in the license free ISM
(Industrial, Scientific and Medical) band. The Nemo module has CSR’s BlueCore 6 ROM Bluetooth
solution. The CSR BlueCore 6 ROM is a single-chip radio and baseband IC for Bluetooth 2.4GHz
systems including enhanced data rate (EDR) to 3Mbps. With the on-chip CSR Bluetooth software
stack, it provides a fully compliant Bluetooth v2.1 + EDR specification system for data and voice
communications. The module dimensions measure 6.5mm x 5.5mm x 1.5mm. A single 3.3V power
supply input, single ended RF output/input, and a low 26 pin count makes the NEMO module easy
to interface with.
CSR BlueCore 6 ROM Transceiver IC
BlueCore™6-ROM is a single-chip radio and baseband IC for Bluetooth 2.4 GHz systems including
enhanced data rates (EDR) to 3Mbits/s. With the on-chip CSR Bluetooth software stack, it
provides a fully compliant Bluetooth system to v2.1 of the specification for data and voice
communications.
BlueCore6-ROM has been designed to reduce the number of external components required which
ensures production costs are minimized. BlueCore6-ROM includes the AuriStream baseband
CODEC, which offers significant power reduction over the CVSD based system when used at both
ends of the link. The device incorporates auto-calibration and built-in self-test (BIST) routines to
simplify development, type approval and production test. All hardware and device firmware is fully
compliant with the Bluetooth v2.1 +EDR specification (all mandatory and optional features). To
improve the performance of both Bluetooth and 802.11b/g co-located systems a wide range of
coexistence features are available including a variety of hardware signaling: basic activity
signaling and Intel WCS activity and channel signaling.
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Functional Block Diagrams
Figure 1: NEMO Module Block Diagram
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Figure 2: CSR BlueCore 6 ROM Block Diagram
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PIN ASSIGNMENT
Figure 3: NEMO Module Pin Locations
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PIN FUNCTIONS
Table 1: NEMO Pin Functions
Pin
10
11
12
13
14
15
16
17
Signal Name
BT_CTRL_RTS_N
BT_WAKE_P
HOST_WAKE_P
GND
BT_CTRL_RXD_N
BT_CTRL_TXD_N
BLUETOOTH_TX_CONFIRM
BLUETOOTH_TX_REQUEST
BLUETOOTH_STATUS
GND
ANT_OUT
GND
BT_PCM_CLK_P
BT_PCM_RXD_P
BT_PCM_TXD_P
BT_PCM_SYNC_P
GND
Description
UART RTS
Module wakeup
Host device wakeup
Ground Reference
UART RXD
UART TXD
Wi-Fi Coexistence signal
Wi-Fi Coexistence signal
Wi-Fi Coexistence signal
Ground Reference
Antenna Output
Ground Reference
PCM_CLK
PCM RXD serial input
PCM TXD serial output
PCM SYNC
Ground Reference
32.768kHz low power
18
BLUETOOTH_LPO_IN
Input
clock input
19
BLUETOOTH_RESET_N
Input
Module Reset
Internal regulator
20
BT_REG_CTRL_P
Input
enable/disable
21
GND
-Ground Reference
22
+VBT_IO
Input
I/O Power Supply
23
+VBT
Input
Main supply input
Bypass Capacitor
24
+VRF
-connection for RF VDD.
25
GND
-Ground Reference
26
BT_CTRL_CTS_N
Input
UART CTS
Note: Active Low signals are designated with an '_N' suffix, and Active High signals
are designated with an '_P' suffix.
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Type
Output
Input
Output
-Input
Output
Input
Output
Output
-Output
-Input
Input
Output
Input
--
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ABSOLUTE MAXIMUM RATINGS
Table 2: Absolute Maximum Ratings
Symbol
+VBT
+VBT_IO
TS
Definition
Supply Voltage
IO Supply Voltage
Storage Temperature
Min
-0.4
-0.4
-40
Max
4.9
3.7
+85
Unit
VDC
VDC
°C
These are stress ratings only. Exposure to stresses beyond these maximum ratings may
cause permanent damage to, or affect the reliability of this module. Avoid using the module
outside the recommended operating conditions defined below. This module is ESD sensitive
and should be handled and/or used in accordance with proper ESD mitigation.
RECOMMENDED OPERATING CONDITIONS
Table 3: Recommended Operating Conditions
Symbol
Description
+VBT
Supply Voltage
Operating Temp.
Range
TOC
GND
Min
2.4
Ground Voltage
Value
Typ
Max
3.3
4.9
Unit
VDC
-40*
25
85
°C
-0.4
+0.
VDC
*Unigen and CSR do not guarantee EDR receiver sensitivity 8DPSK performance below -30ºC.
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RF CHARACTERISTICS
Table 4: RF Characteristics
Parameter
Specifications
Units
RF output power
+7
dBm
Receiver sensitivity
- 89
dBm
EXTERNAL SLOW CLOCK SOURCE CHARACTERISTICS
Table 5: External Slow Clock Characteristics
32kHz External Reference Clock
Min
Typ
Max
Units
Frequency
Frequency deviation at 25ºC
Frequency deviation at -30°C to 85°C
Input high level, square wave
Input low level, square wave
Duty cycle square wave
Rise and fall time
32748
0.625 x +VBT
30
32768
32788
±20
±150
0.425 x +VBT
70
50
Hz
ppm
ppm
ns
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AGENCY CERTIFICATIONS (PRE-SCAN)
TBD
REGULATORY COMPLIANCE STATEMENT
TBD
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FUNCTIONAL OVERVIEW
NEMO Hardware Functional Description
The NEMO is a complete Radio Transceiver Module operating in the license free ISM (Industrial
Scientific and Medical) 2.4GHz band. The Nemo module is equipped an external 26MHz crystal
oscillator and BALUN for a single ended RF input and output path. NEMO incorporates CSR
BlueCore 6 ROM WLCP chipset that is fully compliant to the Bluetooth 2.1 specification with
Enhanced Data Rate (EDR) radio for transfers up to 3Mbit throughput.
The Nemo module has uses CSR’s BlueCore 6 built in voltage regulator for powering the radio and
digital circuitry. The separate IO supply line give the option of running the digital interfaces such
as the high speed UART and PCM port at different signal voltages to match the external host
MCU’s digital interfaces. The built in CSR voltage regulators supplies the 1.8V supply to the radio
and digital MCU blocks of the CSR chip.
The module converts CSRs differential RF output and input into a single ended RF path for
transmit and receive. Matching circuitry is in line between the CSR device and the BALUN for
optimized transmit output and receive sensitivity.
The high speed UART interface, PCM port, GPIO along with WLAN co-existence interface lines are
all brought outside of the module. The UART interface communicates with an external host
running the upper Bluetooth stack and using the BlueCore Serial Protocol over the Bluetooth
defined Host Controller Interface (HCI) layer. The UART is used to send HCI commands and
events to and from the external host to the NEMO module.
Asynchronous and Synchronous data is sent between the module and external host via the UART
interface as well. Asynchronous data sent and received over an Asynchronous packet switched RF
link defined by the Bluetooth specification as “Asynchronous ConnectionLess” (ACL). Synchronous
data such as audio data uses “Synchronous Connection Oriented” (SCO) circuit switched RF links
defined by the Bluetooth specification. ACL data links can retransmit lost or corrupted data
continuously due to the packet switched connection. SCO data can provide fast reliable
continuous synchronous data over the circuit-switched RF link.
Synchronous audio data received or transmitted over the air via a Bluetooth SCO connection can
be immediately decoded over the air and passed directly through CSR’s digital PCM port for audio
applications. The module also support I2S digital formats through the same physical PCM port for
systems supporting I2S interfaces.
A slow clock 32.768kHz input is brought out for support for Deep Sleep and Standy By low power
modes in between radio transmissions. This is used to keep the CSR radio from drifting out of
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sync from the remote Bluetooth device during an active connection with “dead silence” and allows
BlueCore to enter Deep Sleep low power mode during “dead silence” to conserve power
consumption.
NEMO Firmware Functional Description
The Nemo module incorporates the CSR BlueCore 6 ROM chipset and ROM Bluetooth firmware.
The firmware controls the CSR internal MCU, IO handling, radio control and also incorporates the
lower Bluetooth protocol stack. The lower stack includes the Link Controller (LC), Link Manager or
Link Manager Protocol (LM, LMP), Bluetooth radio Baseband (BB). These Bluetooth protocol stack
components are all qualified to the Bluetooth v2.1+ EDR specification supporting all features such
as Adaptive Frequency Hopping “AFH”, low power mode link modes (Hold, Sniff, Park) end
Extended Synchronous Connection Oriented (eSCO) links.
The lower stack is a prequalified Bluetooth component. This means that the lower stack and
baseband has already been tested and recognized by the Bluetooth Special Interest Group (SIG)
as a working qualified software stack. No further testing of these lower stack components are
necessary when seeking Bluetooth qualification. Protocol Implementation Conformance Statement
(PICS) can be obtained from CSR or the Bluetooth SIG and submitted for these particular test
cases and bypassed.
The firmware is burned into ROM within the CSR BlueCore 6 chipset. There is no need to load the
firmware from an external memory device or from the host via a communication interface. The
Nemo module and CSR chipset is initialized via a small subset of registers (PSKEYS) that can
easily be programmed via the UART interface. These PSKEYS configure and control the radio
behavior, interfaces (UART baud rate, PCM settings, etc), and holds information such as the
Bluetooth address and country code of operation. Detailed descriptions of the necessary PSKEY
that need to be set are discussed later in this document.
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CSR BLUETOOTH SOFTWARE STACK
NEMO is supplied with the CSR BlueCore 6 ROM chip. CSR’s BlueCOre 6 ROM contains the lower
layers of the Bluetooth stack. The stack is Bluetooth v2.1+EDR compliant and runs on the internal
RISC microcontroller within BlueCore. The implementation shown below illustrates the internal
processor of BlueCore running the Bluetooth stack up to the Host Controller Interface (HCI). The
external host processor, external to NEMO, must provide all the upper layers of the Bluetooth
stack including the application.
Figure 4: BlueCore Bluetooth HCI Stack
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Key Features of the HCI Stack: Standard Bluetooth Functionality
CSR supports the following Bluetooth v2.1 + EDR functionality:
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Secure simple pairing
Sniff subrating
Encryption pause resume
Packet boundary flags
Encryption
Extended inquiry response
CSR supports the following Bluetooth v2.0 + EDR mandatory functionality:
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Adaptive frequency hopping (AFH), including classifier
Faster connection - enhanced inquiry scan (immediate FHS response)
LMP improvements
Parameter ranges
Optional Bluetooth v2.0 + EDR functionality supported:
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Adaptive Frequency Hopping (AFH) as Master and Automatic Channel Classification
Fast Connect - Interlaced Inquiry and Page Scan plus RSSI during Inquiry
Extended SCO (eSCO), eV3 +CRC, eV4, eV5
SCO handle
Synchronization
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The firmware was written against the Bluetooth v2.0+EDR specification.
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Bluetooth components:
o Baseband (including LC)
o LM
o HCI
Standard UART HCI Transport Layers
All standard Bluetooth radio packet types
Full Bluetooth data rate, enhanced data rates of 2 and 3Mbps
Operation with up to seven active slaves
Scatternet v2.5 operation
Maximum number of simultaneous active ACL connections: 7
Maximum number of simultaneous active SCO connections: 3
Operation with up to three SCO links, routed to one or more slaves
All standard SCO voice coding, plus transparent SCO
Standard operating modes: Page, Inquiry, Page-Scan and Inquiry-Scan
All standard pairing, authentication, link key and encryption operations
Standard Bluetooth power saving mechanisms: Hold, Sniff and Park modes, including
Forced Hold
Dynamic control of peers' transmit power via LMP
Master/Slave switch
Broadcast
Channel quality driven data rate
All standard Bluetooth test modes
The firmware's supported Bluetooth features are detailed in the standard Protocol Implementation
Conformance Statement (PICS) documents, available from http://www.csr.com.
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Key Features of the HCI Stack: Extra Functionality
The firmware extends the standard Bluetooth functionality with the following features:
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•
•
Supports BlueCore Serial Protocol (BCSP), a proprietary, reliable alternative to the standard
Bluetooth UART Host Transport
Provides a set of approximately 50 manufacturer-specific HCI extension commands. This
command set, called BlueCore Command (BCCMD), provides:
o Access to the chip's general-purpose PIO port
o The negotiated effective encryption key length on established Bluetooth links
o Access to the firmware's random number generator
o Controls to set the default and maximum transmit powers; these can help minimize
interference between overlapping, fixed-location piconets
o Dynamic UART configuration
o Bluetooth radio transmitter enable/disable. A simple command connects to a
dedicated hardware switch that determines whether the radio can transmit.
A block of BCCMD commands provides access to the chip's Persistent Store (PS)
configuration database. The database sets the device's Bluetooth address, Class of Device,
Bluetooth radio (transmit class) configuration, SCO routing, LM, constants, etc.
A UART break condition can be used in three ways:
o Presenting a UART break condition to the chip can force the chip to perform a
hardware reboot
o Presenting a break condition at boot time can hold the chip in a low power state,
preventing normal initialization while the condition exists
o With BCSP, the firmware can be configured to send a break to the host before
sending data. (This is normally used to wake the host from a Deep-Sleep state.)
A block of Bluetooth radio test or BIST commands allows direct control of the chip's radio.
This aids the development of modules' radio designs, and can be used to support Bluetooth
qualification.
Hardware low power modes: Shallow Sleep and Deep-Sleep. The chip drops into modes
that significantly reduce power consumption when the software goes idle.
SCO channels are normally routed via HCI (over BCSP). However, up to three SCO
channels can be routed over the chip's PCM ports (at the same time as routing any
remaining SCO channels over HCI).
For more details on the CSR Bluetooth stack, limitations and firmware refer to CSR’s firmware
release note “BlueCore Unified 23c Release Note (CS-116212-RNP3).pdf”
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DIGITAL INTERFACES
High Speed UART Interface
NEMO uses a standard UART interface for communicating to other serial devices. Four signals
from NEMO implement the UART function. The signal operation amplitude can be varied with the
external +VBT_IO supply pin. This is useful for different systems that support different digital
communication amplitudes such as 3.3V or 1.8V. When NEMO is connected to another digital
device, BT_CTRL_RXD_N and BT_CTRL_TXD_N transfer data between the two devices. The other
two remaining UART pins, BT_CTRL_RTS_N and BT_CTRL_CTS_N, can be used as hardware flow
control signal as used in RS232 communications.
The high speed UART can support up to 4Mbits in throughput which is needed for data transfers
using EDR RF link payloads with 3Mbit over the air throughput. The baud rate and other
configuration parameters can be set via the firmware and PSKEYs during bootup and initialization.
BlueCore Serial Protocol (BCSP)
This document only describes CSR’s BlueCore Serial Protocol overview and does not go into detail
on BCSP implementation, packet structure and stack elements. Please refer to CSR’s “BlueCore
Serial Protocol (bcore-sp-012Pb).pdf” document for more a detailed explanation and
implementation. BCSP must be implemented on the Host to communicate to the NEMO module.
BlueCore Serial Protocol (BCSP) is a protocol used to carry data that flow through a reliable UART
link. The Bluetooth stack has been designed to transfer data between a Bluetooth Host and a
Host Controller (NEMO). The Bluetooth stack is intended to be used to carry the Bluetooth HCI
(Host Controller Interface) protocols plus several others. BCSP is intended to be used with CSR
based Host Controllers (NEMO), which provides hardware to support much of the Bluetooth stack
functionality.
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Figure 5: UART Host Connection
BCSP is used to control and format information that flows between the Bluetooth Host and the
NEMO modules. The Bluetooth stack carries a set of parallel information that flows between the
two process entities, multiplexing them over the single UART link.
Figure 6: BCSP Context
An instance of the BCSP stack runs on both the Host and the Host Controller (NEMO). The BCSP
stack is layered above the UART on each side.
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The top of the BCSP stack presents:
•
•
One bidirectional reliable datagram service
One bidirectional unreliable datagram service
The BCSP protocol is defined to run on a 3-wire UART connection (TXD, RXD, & GND). However,
BCSP can also run on a 5 wire UART connection (TXD, RXD, GND, CTS, RTS) which is common for
higher baud rates.
BLUECORE COMMAND (BCCMD) PROTOCOL
This document only gives an overview of CSR’s BCCMD Protocol overview and does not go into
detail on BCCMD implementation, command set and events. The BlueCore Command Protocol
(BCCMD) is used to configure parameters such as UART Baud Rate, Bluetooth address and initiate
NEMO’s radio. BCCMD and BCSP are protocols that need to be implemented on the Host
connected to NEMO via the UART interface. For detailed information and implementation of CSR’s
BCCMD Protocol please refer to CSR’s “BCCMD Protocol (bcore-sp-002Pc).pdf” document.
BCCMD describes a software interface to a command interpreter on a CSR BlueCore Bluetooth
device, in this case the BlueCore 6 ROM chip inside NEMO. The command interpreter presents
commands and events that allow monitoring and control of specific CSR ship functions outside of
the Bluetooth stack protocol. The command set is not part of the Bluetooth protocol.
BCCMD allows the software on the Bluetooth Host to control and monitor the CSR BlueCore ship
and flows alongside the normal Host Controller Interface (HCI) channels. The BCCMD protocol is
carried over the UART link over a BCSP channel.
Figure 7: BCCMD Interface
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Audio PCM and I2S Interfaces
The NEMO module has a Pulse Code Modulation (PCM) audio port and I2S interface. These
interfaces are intended to be used for quick transfer of synchronous audio date transmitted or
received over Bluetooth SCO audio links for voice applications such as headsets and hands free
kits. These signals can also vary in operation amplitude based on the +VBT_IO supply pin.
PCM is a standard method for digitizing audio (particularly voice) for transmission over digital
communications channels. The dedicated PCM port reduces overhead processing power for
battery powered devices. The PCM port bi-directional digital audio interface is routed directly into
the CSR radio baseband for fast encoding/decoding. The audio is not passed through the
UART/HCI layer. The digitized audio through the baseband is sent and received via Bluetooth
defined RF SCO links.
The PCM port can operate as a the PCM master generating an output clock of 128, 256, 512,
1536, and 2400kz. When configured as a PCM slave, NEMO can support a master input clock up
to 2400kHz. A variety of clock formats are supported including, Long Frame Sync, Short Frame
Sync, and GCI timing environments.
It supports 13-bit or 16-bit linear. 8-bit µ-law or A-law companded sample formats at 8ksamples/s.
These samples can be received and transmitting through any selection of the first 3 out of the 4
timing slots following BT_PCM_SYNC_P.
PCM Interface Master/Slave
When NEMO is configured as a PCM master, NEMO generates BT_PCM_CLK_P and BT_PCM_SYNC
signals
Figure 8: PCM Interface Master
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Figure 9: PCM Interface Slave
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PCM Long Frame Sync
Long Frame Sync is a clocking format that controls data transfer for PCM data words or sample
between two devices. The rising edge of BT_PCM_SYNC_P indicates the start of a PCM word in
Long Frame Sync. When NEMO is configured as a PCM master, generating BT_PCM_SYNC_P and
BT_PCM_CLK_P, the BT_PCM_SYNC_P is 8-bits long. As a PCM slave, BT_PCM_SYNC_P may be
from two consecutive falling edges of BT_PCM_SYNC_P to half of the BT_PCM_SYNC_P rate, i.e
62.5us long.
Figure 10: Long Frame Sync (Shown with 8-bit Companded Sample)
NEMO samples BT_PCM_RXD_P on the falling edge of BT_PCM_CLK_P and transmits
BT_PCMTXD_P on the rising edge of BT_PCM_CLK_P. The BT_PCM_TXD_P signal maybe
configured to be high impedance on the falling edge of BT_PCM_CLK_P in the LSB position or on
the rising edge.
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Short Frame Sync
In Short Frame Sync, the falling edge of BT_PCM_SYNC_P indicates the start of the PCM word.
BT_PCM_SYNC_P is always one clock cycle long.
Figure 11: Short Frame Sync (Shown with 16-bit Sample)
Like with Long Frame Sync, NEMO samples BT_PCM_RXD_P on the falling edge of
BT_PCM_CLK_P and transmits BT_PCM_TXD_P on the rising edge. BT_PCM_TXD_P maybe
configured to be high impedance on the falling edge of BT_PCM_CLK_P in the LSB position or on
the rising edge.
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Multi-slot Operation
More than one audio Bluetooth SCO connection over the PCM interface is supported using multiple
slots as more than one Bluetooth SCO connection can exist simultaneously. Up to three Bluetooth
SCO connections can be handled simultaneously and can be carried over any of the first three out
of the four slots of the PCM port.
Figure 12: Multi-slot Operation with Two Slots and 8-bit Companded Samples
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GCI Interface
NEMO is compatible with General Circuit Interface (GCI), a standard synchronous 2B+D ISDN
timing interface. The two 64kbps B channels can be accessed when this mode is configured.
Figure 13: GCI Interface
The start of frame is indicated by the rising edge of BT_PCM_SYNC_P and runs at 8kHz. With
NEMO in slave mode, the frequency of BT_PCM_CLK can be up to 4.096MHz.
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PCM Slots and Sample Formats
NEMO can receive and transmit on any selection of the first four slots following each sync pulse.
Slot durations can be either 8 or 16 clock cycles. Durations of 8 clock cycles may only be used
with 8-bit sample formats. Durations of 16 clocks may be used with 8-bit, 13-bit or 16-bit sample
formats. NEMO supports 13-bit linear, 16-bit linear and 8-bit μ-law or A-law sample formats.
The sample rate is 8ksamples/s. The bit order may be little or big endian. When 16-bit slots are
used, the 3 or 8 unused bits in each slot may be filled with sign extension, padded with zeros or a
programmable 3-bit audio attenuation compatible with some Motorola CODECs.
Figure 14: 16-Bit Slot Length and Sample Formats
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PCM Timing Information
Table 6: PCM Timing Table
Symbol
fmclk
Parameter
Min
Typ
Max
Unit
kHz
128
4MHz DDS generation.
Selection of frequency is
programmable. See
Table XXXX
48MHz DDS generation.
Selection of frequency is
programmable. See
Table XXXX.
2.9
kHz
kHz
512
BT_PCM_CLK_P
frequency
BT_PCM_SYNC_P Frequency for SCO
256
tmclkh
BT_PCM_CLK_P high
4MHz DDS generation
980
Ns
tmclkl
BT_PCM_CLK_P low
4MHz DDS generation
730
Ns
BT_PCM_CLK_P jitter
48MHz DDS generation.
21
ns pk-pk
20
Ns
20
Ns
20
Ns
20
Ns
20
Ns
20
Ns
30
Ns
10
Ns
tdmclksynch
tdmclkpout
tdmclklsyncl
tdmclkhsyncl
tdmclklpoutz
tdmclkhpoutz
tsupinclkl
thpinclkl
Delay time from BT_PCM_CLK_P high to
BT_PCM_SYNC high
Delay time from BT_PCM_CLK_P high to valid
BT_PCM_TXD_P
Delay time from BT_PCM_CLK_P low to
BT_PCM_SYNC_P low (Long Frame Sync only)
Delay time from BT_PCM_CLK_P high to
BT_PCM_SYNC low
Delay time from BT_PCM_CLK_P low to
BT_PCM_TXD high impedance
Delay time from BT_PCM_CLK_P high to
BT_PCM_TXD_P high impedance
Set-up time for BT_PCM_RXD_P vaid to
BT_PCM_CLK low
Hold time for BT_PCM_CLK low to
BT_pCM_RXD_P invalid
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Figure 15: PCM Master Timing Long Frame Sync
Figure 16: PCM Master Timing Short Frame Sync
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Figure 17: PCM slave Timing Short Frame Sync
PCM CLK and PCM SYNC Generation
NEMO has two methods of generating the PCM CLK and PCM SYNC in master mode:
•
Generating signals by Direct Digital Synthesis (DDS) from internal 4MHz clock. Using this
mode limits BT_PCM_CLK_P to 126, 256 or 512kHz, and BT_PCM_SYNC_P to 8kHz.
•
Generating these signals by DDS from an internal 48MHz clock (which allows greater range
of frequencies to be generated with low jitter but consumes more power). This method is
selected by setting bit 48M_PCM_CLK_GEN_EN in the PSKEY_PCM_CONFIG32 key. When in
this mode and with long frame sync, the length of the BT_PCM_SYNC_P can either be8 or
16 cycles of BT_PCM_CLK_P, determined by LONG_LENGTH_SYNC_EN bit in the
PSKEY_PCM_CONFIG32 key.
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The equation below describes the PCM CLK frequency when being generated using the internal
48MHz clock:
The frequency of the PCM SYNC relative to the PCM CLK is set using either of the two equations
below by setting the value of PCM_SYNC_MULT (see Table 10.4):
CNT_RATE, CNT_LIMIT and SYNC_LIMIT are set using PSKEY_PCM_LOW_JITTER_CONFIG. As an
example, to generate BT_PCM_CLK_P at 512kHz with BT_PCM_SYNC_P at 8kHz, set
PSKEY_PCM_LOW_JITTER_CONFIG to 0x08080177.
PCM Configuration
The PCM configuration is set using the PS Keys, PSKEY_PCM_CONFIG32 described in Table 10.4
and PSKEY_PCM_LOW_JITTER_CONFIG in Table 10.3. The default for PSKEY_PCM_CONFIG32 is
0x00800000, i.e., first slot following sync is active, 13-bit linear voice format, long frame sync and
interface master generating 256kHz PCM_CLK from 4MHz internal clock with no tri-state of
PCM_OUT. For more information in regards to PS keys and their usage refer to the Persistent
Store section of this document.
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Table 7: PSKEY_PCM_LOW_JITTER_CONFIG Description
Name
CNT_LIMIT
CNT_RATE
SYNC_LIMIT
Bit Position
[12:0]
[23:16]
[31:24]
Description
Sets the PCM CLK counter limit
Sets the PCM CLK count rate
Sets the PCM SYNC division relative to PCM CLK
Table 8: PSKEY_PCM_CONFIG32 Description
Name
Bit
Position
SLAVE_MODE_EN
SHORT_SYNC_EN
SIGN_EXTENDED_EN
LSB_FIRST_EN
TX_TRISTATE_EN
TX_TRISTATE_RISING_EDGE_EN
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Set to 0
0 = Master mode with internal generation of the
BT_PCM_CLK_P and BT_PCM_SYNC_P.
1 = Slave mode requiring externally generated PCM
CLK and the PCM SYNC signals.
0 = Long Frame Sync mode (rising edge indicates
start of frame).
1 = Short Frame Sync mode (falling edge indicates
start of frame).
Set to 0
0 = Padding of 8 or 13-bit voice sample into a 16-bit
slot by inserting extra LSBs. When padding is
selected with 13-bit voice sample, the 3 padding bits
are the audio gain setting; with 8-bit sample the 8
padding bits are zeroes.
1 = Sign-extension.
0 = MSB first of transmit and receive voice samples.
1 = LSB first of transmit and receive voice samples.
0 = Drive PCM_OUT continuously.
1 = Tri-state BT_PCM_TXD_P immediately after
falling edge of BT_PCM_CLK_P in the last bit of an
active slot, assuming the next slot is not active.
0 = Tri-state BT_PCM_TXD_P immediately after
falling edge of BT_PCM_CLK_P in last bit of an active
slot, assuming the next slot is also not active.
1 = Tri-state BT_PCM_TXD after rising edge of
BT_PCM_CLK_P.
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SYNC_SUPPRESS_EN
GCI_MODE_EN
MUTE_EN
10
48M_PCM_CLK_GEN_EN
11
LONG_LENGTH_SYNC_EN
12
PCM_SYNC_MULT
13
0 = enable PCM_SYNC output when master.
1 = suppress PCM_SYNC while keeping PCM_CLK
running. Some CODECS use this to enter a low
power state.
1 = enable GCI mode.
1 = force BT_PCM_TXD_P to 0.
0 = set PCM_CLK and PCM_SYNC generation via
DDS from internal 4MHz clock.
1 = set PCM_CLK and PCM_SYNC generation via
DDS from internal 48MHz clock.
0 = set PCM_SYNC length to 8 PCM_CLK cycles.
1 = set length to 16 PCM_CLK cycles. Only applies
for long frame sync and with
48M_PCM_CLK_GEN_EN set to 1.
0 = Sync limit = SYNC_LIMIT x 8.
1 = SYNC_LIMIT.
Set to 0b00000
Selects 128 (0b01), 256 (0b00), 512 (0b10) kHz
BT_PCM_CLK+P frequency when master and
48M_PCM_CLK_GEN_EN (bit 11) is low.
Default is 0001. Ignored by firmware.
Selects between 13 (0b00), 16 (0b01), 8 (0b10) bit
sample with 16-cycle slot duration or 8 (0b11) bit
sample with 8-cycle slot duration.
[20:16]
MASTER_CLK_RATE
[22:21]
ACTIVE_SLOT
[26:23]
SAMPLE_FORMAT
[28:27]
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Digital Audio Interface (I²S)
The digital audio interface supports the industry standard formats for I²S, left-justified (LJ) or
right-justified (RJ). The interface shares the same pins as the PCM interface, which means each
audio bus is mutually exclusive in its usage. Table 7 lists these alternative functions.
Table 9: Alternative Functions of the Digital Audio Bus Interface on the PCM Interface
PCM Interface
BT_PCM_TXD_P
BT_PCM_RXD_P
BT_PCM_SYNC_P
BT_PCM_CLK_P
I²S Interface
SD_OUT
SD_IN
WS
SCK
Table 8 describes the values for the PS Key (PSKEY_DIGITAL_AUDIO_CONFIG) that is used to
set-up the digital audio interface. For example, to configure an I²S interface with 16-bit SD data
set PSKEY_DIGITAL_CONFIG to
0x0406.
Table 10: PSKEY_DIGITAL_AUDIO_CONFIG
Bit
Mask
Name
D[0]
0x0001
CONFIG_JUSTIFY_FORMAT
D[1]
0x0002
CONFIG_LEFT_JUSTIFY_DELAY
D[2]
0x0004
CONFIG_CHANNEL_POLARITY
D[3]
0x0008
CONFIG_AUDIO_ATTEN_EN
D[7:4]
0x00F0
CONFIG_AUDIO_ATTEN
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Description
0 for left justified, 1 for right
justified.
For left justified formats: 0 is MSB of
SD data occurs in the first SCLK
period following WS transition. 1 is
MSB of SD data occurs in the second
SCLK period.
For 0, SD data is left channel when
WS is high. For 1 SD data is right
channel.
For 0, 17 bit SD data is rounded
down to 16 bits. For 1, the audio
attenuation defined in
CONFIG_AUDIO_ATTEN is applied
over 24 bits with saturated rounding.
Requires CONFIG_16_BIT_CROP_EN
to be 0.
Attenuation in 6 dB steps.
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D[9:8]
0x0300
CONFIG_JUSTIFY_RESOLUTION
D[10]
0x0400
CONFIG_16_BIT_CROP_EN
Resolution of data on SD_IN, 00=16
bit, 01=20 bit, 10=24 bit,
11=Reserved. This is required for
right justified format and with left
justified LSB first.
For 0, 17 bit SD_IN data is rounded
down to 16 bits. For 1 only the most
significant 16 bits of data are
received.
Figure 18: I²S Mode Digital Audio Interface
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Table 11: Digital Audio Interface Slave Timing
Symbol
tch
tcl
topd
tssu
tsh
tisu
tih
Parameter
SCK Frequency
WS Frequency
SCK high time
SCK low time
SCK to SD_OUT delay
WS to SCK set-up time
WS to SCK hold time
SD_IN to SCK set-up time
SD_IN to SCK hold time
Min
80
80
20
20
20
20
Typ
Max
6.2
96
20
Unit
MHz
kHz
ns
ns
ns
ns
ns
ns
ns
Figure 19: Digital Audio Interface Slave Timing
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Table 12: Digital Audio Interface Master Timing
Symbol
topd
tspd
tisu
tih
Parameter
SCK Frequency
WS Frequency
SCK to SD_OUT delay
SCK to WS delay
SD_IN to SCK set-up time
SD_IN to SCK hold time
Min
20
10
Typ
Max
6.2
96
20
20
Unit
MHz
kHz
ns
ns
ns
ns
Figure 20: Digital Audio Interface Master Timing
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NEMO Bluetooth Radio Module
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POWER CONSUMPTION
Table 13: Operating Power Consumption Figures
Operation Mode
Page scan, time interval 1.28s
Inquiry and page scan, time interval 1.28s
ACL no traffic
ACL with file transfer
ACL 40ms sniff
ACL 1.28s sniff
eSCO EV5
eSCO EV3
eSCO EV3 - hands-free - setting S1
SCO HV1
SCO HV3
SCO HV3 30ms sniff
ACL no traffic
ACL with file transfer
ACL 40ms sniff
ACL 1.28s sniff
eSCO EV5
eSCO EV3
eSCO EV3 - hands-free - setting S1
SCO HV1
SCO HV3
SCO HV3 30ms sniff
Standby host connection (Deep-Sleep)
Reset (active low)
Connection Type
Master
Master
Master
Master
Master
Master
Master
Master
Master
Master
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Average
0.4
0.8
0.2
12
18
18.5
37
17
17
14
17
1.6
0.2
19
23
23
37
23
16
40
39
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
Note Conditions: 20ºC, +VBT = 3.15V, +VBT = 3.15V, UART BAUD rate = 115.2kbps.
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NEMO Bluetooth Radio Module
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Table 14: Peak Current
Typical Peak Current @ 20ºC
Device Activity/State
Current (mA)
Peak current during cold boot
45
Peak TX current Master
45
Peak RX current Master
40
Peak TX current Slave
45
Peak RX current Slave
45
Conditions
VREGIN_H, VDD_PADS
3.15
Host Interfaces
UART
UART Baud rate
115200
RF output power
0dBm
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NEMO Bluetooth Radio Module
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BOOTING NEMO ROM
The NEMO module contains the CSR BlueCore 6 ROM device. The firmware is loaded from
BlueCore’s internal ROM. The NEMO module is boot-strapped to use the UART interface upon
power up. The BCSP communication protocol along with the BCCMD protocol is used over the
UART. PIO 4 must be held low in order to boot into BCSP over the UART successfully.
Configuration of NEMO is handled through the UART interface and BCCMD protocol. The
Bluetooth address, UART baud rate, PCM configuration and country code are all parameters that
can be configured on the ROM device upon power up. These parameters are programmed into
Persistent Store Keys in RAM and are loaded into firmware after a soft reset.
NEMO Boot Process
1.
2.
3.
4.
5.
6.
Power up NEMO with PIO4 pulled low.
Initialize BCSP communications over the UART link.
Load and program the PSKEYS via BCCMD commands necessary for the initialization
Issue BCCMD warm_reset command
Re-initialize BCSP communications
Module is ready for operation
This process needs to be performed during every cold boot or hard reset on NEMO.
UART Auto Baud Rate
The NEMO module can support booting into UART mode without pre-configuration of the baud
rate, and clock reference. Although a 26MHz internal crystal oscillator is built into the module, the
CSR BlueCore device needs to be configured to use the clock reference for radio and UART
communication purposes. The CSR device support an “AUTOBAUD” adaption algorithm where the
Host can communicate over the UART link to load configuration PSKEYS into RAM and perform
initialization of the module.
The AUTOBAUD UART baud rate adaption mechanism starts by treating the UARTS RXD data line
as a simple PIO input, and it records the hosts initial UART traffic in a buffer. The mechanism
then examines the recorded data stream to determine the times between signal level transitions
and, from this, derives the baud rate the host is using. The mechanism then matches the
measured baud rate.
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Datasheet
The BCSP stack is used on the host to send sync messages from the host to the NEMO module.
The Sync message packet is a reasonably good data set for the analysis to complete, though at
high baud rates several sync messages from the BCSP stack may need to be sent.
This AUTOBAUD mechanism must complete before any normal UART traffic is passed to or from
the host transport. For example, the BCSP Link Establishment messages described in CSR’s
BlueCore Serial Protocol document are neither transmitted or responded to until the UART’s baud
rate has been set by this mechanism.
The mechanism is designed to operate between 38.4 kbaud and 691.2 kbaud. However, testing
from CSR has only been concentrated on operation between 56 kbaud and 115.2 kbaud.
Implementers are therefore advised to choose a bootup baud rate within these ranges.
During cold boot, the CSR BlueCore device can operate where the systems clock frequency is
unknown. This causes BlueCore to run more slowly than normal. Consequently, the range of
acceptable baud rates is shifted down pro-rata. The radio is not operational until the external
system clock is defined in the PSKEY setting. This is due to the PLL not locking to a known
external clock frequency. Therefore, the system clock must be programmed upon boot-up via the
PSKEY_ANA_FREQ persistent store key in order for the radio to operate.
Operation with an unknown system clock implies dual-boot initialization of NEMO. The approach is
for the host to use a safe tested baud rate at the during cold boot (115.2 kbaud), then to set the
external clock frequency to 26MHz and the actual baud rate via PSKEYS then issue a “warm reset”
command to NEMO over the same UART interface.
For more details on AUTOBAUD rate of the CSR device, please refer to the “UART Baud Rate
Adaption (bcore-me-019Pd).pdf” document available from CSR directly.
Persistent Store Keys (PSKEYS)
Persistent Store Keys are configuration settings that are used to configure and initiate the CSR
BlueCore 6 device within NEMO. These PSKEYS are written using the BCCMD protocol to send
commands to the CSR BlueCore devices. PSKEY are written using BCCMD write commands that
are interpreted by the CSR device within NEMO.
PSKEYS configure the CSR chips behavior from its interfaces to radio performance. Data such as
Bluetooth address, product ID and country code is also stored in PSKEYS and are necessary
information in some cases. Programming these various PSKEYS are vital to initializing NEMO upon
cold boot. PSKEYS are address locations with specific values. The values are used for
configuration of different systems of the NEMO.
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NEMO Bluetooth Radio Module
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Datasheet
The following are PSKEYS needs to be written and programmed during a cold boot of NEMO
Table 15: Boot PSKEY List
PSKEY Name
PSKEY
Address
Value
PSKEY_ANA_FREQ
0x01FE
0x6590
PSKEY_HOST_INTERFACE
0x01f9
0x0001
PSKEY_UART_BAUDRATE
0x01be
PSKEY_BDADDR
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0x0001
- 46 -
Description
This sets CSRs BlueCore to use a
26MHz reference clock built into
NEMO.
Sets the Host interface to use BCSP
over the UART interface
When the system is configured to
use a UART-based host transport,
i.e. if PSKEY_HOST_INTERFACE
selects BCSP, H4, H5 or User (VM
access to the UART), then the
UART's Baud rate is set to the value
of this PS key when the firmware
boots. The PS key's value is:
Baud rate = pskey_value/0.004096
Some common values are:
38k4 baud - 157 (0x009d)
57k6 baud - 236 (0x00ec)
115k2 baud - 472 (0x01d8)
230k4 baud - 944 (0x03b0)
460k8 baud - 1887 (0x075f)
921k6 baud - 3775 (0x0ebf)
1382k4 baud - 5662 (0x161e)
This is the local device's Bluetooth
address. This should be unique to
this device and allocated by the
manufacturer. Bluetooth addresses
are distributed by IEEE in the same
manner as MAC addresses.
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PSKEY_COUNTRYCODE
Datasheet
0x0002
PSKEY_DEEP_SLEEP_
EXTERNAL_CLOCK_SOURCE
0x03c3
PSKEY_PCM_CONFIG32
0x01b3
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North America and most of Europe
use a particular block of 79 radio
frequencies for Bluetooth, but not
all countries allow use of these
frequencies. Some countries allow
the use of different blocks of
frequencies. This key selects the
frequency blocks used by these
exceptional countries.
0 North America and Europe
1 France
2 Spain
3 Japan
Enable the use of an external 32kHz
clock source for more reliable low
power mode and radio
synchronization.
See Table 6 for more description of
this PSKEY.
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TYPICAL APPLICATION CIRCUITS
NEMO with out external 32kHz slow clock source:
Figure 21: NEMO Example Application Circuit; No External Slow Clock Source
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NEMO with external 32kHz slow clock source:
Figure 22: NEMO Example Application Circuit; External Slow Clock Source
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MECHANICAL DRAWINGS
Figure 23: NEMO Mechanical Drawing
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Datasheet
REFERENCE DOCUMENTATION
Table 16: Reference Documentation
Document
CSR BlueCore 6 ROM
Datasheet
Name
Rev/Date Source
"BC6ROM_WLCSP_CS-113960-DSP12.pdf"
Issue 12
CSR
Firmware Release Note
“BlueCore Unified 23c Release Note (CS-116212RNP3).pdf”
Issue 3
CSR
AUTOBAUD rate adaption
“UART Baud Rate Adaption (bcore-me019Pd).pdf”
Jun-05
CSR
BCSP
“BlueCore Serial Protocol (bcore-sp-012Pb).pdf”
Jul-04
CSR
BCCMD
“BCCMD Protocol (bcore-sp-002Pc).pdf”
Jul-04
CSR
CONTACT INFORMATION
CORPORATE HEADQUARTERS
Unigen Corporation
45388 Warm Springs Boulevard
Fremont, CA 94539
Telephone:
Fax:
Email:
Web:
Toll Free:
1 (510) 688-2088
1 (510) 668-2788
Support@unigen.com
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1 (800) 826-0808
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