QM_CycloneV_5CEFA2F23_User_Manual(CoreBoard) V01 QM Cyclone V 5CEFA2F23 User Manual(Core Board)
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CYCLONEV_5CEFA2 CORE BOARD USER MANUAL Preface The QMTech® Cyclone V SDRAM Development Kit uses Altera(Intel) 5CEFA2F23 device to demonstrate the industry's lowest system cost and power, along with performance levels that make the device family ideal for differentiating your high-volume applications. You'll get up to 40% lower total power compared with the previous generation, efficient logic integration capabilities, integrated transceiver variants, and SoC FPGA variants with an ARM®-based hard processor system (HPS). QM_CycloneV_5CEFA2 Core Board-User Manual(Hardware) Table of Contents 1. INTRODUCTION .................................................................................. 3 1.1 1.2 1.3 2. DOCUMENT SCOPE ..................................................................... 3 KIT OVERVIEW........................................................................... 3 KIT TOP VIEW ........................................................................... 3 GETTING STARTED .............................................................................. 4 2.2 QM_CYCLONEV_5CEFA2 HARDWARE DESIGN ............................... 5 2.2.1 QM_CycloneV_5CEFA2 Power Supply ........................ 5 2.2.2 QM_CycloneV_5CEFA2 SDRAM Memory .................... 6 2.2.3 QM_CycloneV_5CEFA2 SPI Boot................................. 6 2.2.4 QM_CycloneV_5CEFA2 System Clock ......................... 7 2.2.1 QM_CycloneV_5CEFA2 JTAG Port .............................. 7 2.2.2 QM_CycloneV_5CEFA2 Power Supply ........................ 8 2.2.3 QM_CycloneV_5CEFA2 Extension IO .......................... 9 2.2.4 QM_CycloneV_5CEFA2 User LED .............................. 10 2.2.5 QM_CycloneV_5CEFA2 User Key .............................. 10 3. REFERENCE........................................................................................ 11 4. REVISION .......................................................................................... 12 QM_CycloneV_5CEFA2 Core Board User Manual-V01 1. Introduction 1.1 Document Scope This demo user manual introduces the QM_CycloneV_5CEFA2 core board and describes how to setup the core board running with application software Altera Quartus II 15.1. Users may employee the on board rich logic resource FPGA 5CEFA2F23I7N and large SDRAM memory MT48LC16M16 to implement various applications. The core board also has 108 non-multiplexed FPGA IOs for extending customized modules, such as UART module, CMOS/CCD camera module, LCD/HDMI/VGA display module etc. 1.2 Kit Overview Below section lists the parameters of the QM_CycloneV_5CEFA2: On-Board FPGA: 5CEFA2F23I7N; On-Board FPGA external crystal frequency: 50MHz; 5CEFA2F23I7N has rich block RAM resource up to 1760Kb; 5CEFA2F23I7N has 25K Logic elements; On-Board N25Q064 SPI Flash, 8M bytes for user configuration code; On-Board 32MB Micron SDRAM, MT48LC16M16A2; On-Board 3.3V power supply for FPGA by using MP2315 wide input range DC/DC; QM_CycloneV_5CEFA2 core board has two 64p, 2.54mm pitch headers for extending user IOs. All IOs are precisely designed with length matching; QM_CycloneV_5CEFA2 core board has 3 user switches; QM_CycloneV_5CEFA2 core board has 2 user LEDs; QM_CycloneV_5CEFA2 core board has JTAG interface, by using 10p, 2.54mm pitch header; QM_CycloneV_5CEFA2 core board PCB size is: 6.7cm x 8.4cm; Default power source for core board is: 1A@5V DC, the DC header type: DC-050, 5.5mmx2.1mm; 1.3 Kit Top View Figure 1-1. QM_CycloneV_5CEFA2 Top View QM_CycloneV_5CEFA2 Core Board User Manual-V01 2. Getting Started Below image shows the dimension of the QM_CycloneV_5CEFA2 core board: 67.1mm x 84.1mm. The unit in below image is millimeter(mm). Figure 2-1. QM_CycloneV_5CEFA2 Dimension The QM_CycloneV_5CEFA2 core board tool chain consists of Altera Quartus II 15.1, Altera USB Blaster cable, 5CEFA2F23 core board and 5V DC power supply. Below image shows the Altera Quartus II 15.1 development environment which could be downloaded from Altera(Intel) office website: QM_CycloneV_5CEFA2 Core Board User Manual-V01 2.2 QM_CycloneV_5CEFA2 Hardware Design 2.2.1 QM_CycloneV_5CEFA2 Power Supply The core board needs 5V DC input as power supply which could be directly injected from power header or the 64P header U7/U8. Users may refer to the hardware schematic for the detailed design. The on board LED D4 indicates the 3.3V supply, it will be turned on when the 5V power supply is active. In default status, all the FPGA banks IO power level is 3.3V because bank power supply is 3.3V. Note: FPGA core supply 1.1V is regulated by On-Semi DC/DC chip NCP1529 which could output maximum 1A current. R240 2.0K A1 U12R ,RREF_TL,,,,,, 5CEFA2F23 2V5 M3 T3 T5 F4 U18 H19 U12S ,VCCA_FPLL1,,,,,, ,VCCA_FPLL2,,,,,, ,VCCA_FPLL3,,,,,, ,VCCA_FPLL4,,,,,, ,VCCA_FPLL5,,,,,, ,VCCA_FPLL6,,,,,, 5CEFA2F23 P2 AB19 AB14 AB9 AB2 AB1 AA11 AA6 AA4 AA3 Y 18 Y5 Y2 Y1 W4 W3 V22 V17 V12 V7 V4 V2 V1 U9 U5 U4 U3 T21 T16 T2 T1 R13 R3 P10 P4 P1 N22 N17 N15 N13 N11 N7 N5 N3 M14 M12 M10 M4 M2 M1 U12J ,GND1,,,,,, ,GND2,,,,,, ,GND3,,,,,, ,GND4,,,,,, ,GND5,,,,,, ,GND6,,,,,, ,GND7,,,,,, ,GND8,,,,,, ,GND9,,,,,, ,GND10,,,,,, ,GND11,,,,,, ,GND12,,,,,, ,GND13,,,,,, ,GND14,,,,,, ,GND15,,,,,, ,GND16,,,,,, ,GND17,,,,,, ,GND18,,,,,, ,GND19,,,,,, ,GND20,,,,,, ,GND21,,,,,, ,GND22,,,,,, ,GND23,,,,,, ,GND24,,,,,, ,GND25,,,,,, ,GND26,,,,,, ,GND27,,,,,, ,GND28,,,,,, ,GND29,,,,,, ,GND30,,,,,, ,GND31,,,,,, ,GND32,,,,,, ,GND33,,,,,, ,GND34,,,,,, ,GND35,,,,,, ,GND36,,,,,, ,GND37,,,,,, ,GND38,,,,,, ,GND39,,,,,, ,GND40,,,,,, ,GND41,,,,,, ,GND42,,,,,, ,GND43,,,,,, ,GND44,,,,,, ,GND45,,,,,, ,GND46,,,,,, ,GND47,,,,,, ,GND48,,,,,, ,GND49,,,,,, ,GND50,,,,,, 5CEFA2F23 L21 L15 L13 L11 L5 L3 K14 K12 K10 K8 K4 K2 K1 J20 J15 J5 J3 H22 H12 H7 H4 H3 H2 H1 G19 G9 G4 G3 F16 F6 F5 F2 F1 E13 E4 E3 D20 D10 D5 D2 D1 C17 C4 C3 B14 B9 B2 B1 A21 A11 U12K ,GND,1,,,,, ,GND,2,,,,, ,GND,3,,,,, ,GND,4,,,,, ,GND,5,,,,, ,GND,6,,,,, ,GND,7,,,,, ,GND,8,,,,, ,GND,9,,,,, ,GND,10,,,,, ,GND,11,,,,, ,GND,12,,,,, ,GND,13,,,,, ,GND,14,,,,, ,GND,15,,,,, ,GND,16,,,,, ,GND,17,,,,, ,GND,18,,,,, ,GND,19,,,,, ,GND,20,,,,, ,GND,21,,,,, ,GND,22,,,,, ,GND,23,,,,, ,GND,24,,,,, ,GND,25,,,,, ,GND,26,,,,, ,GND,27,,,,, ,GND,28,,,,, ,GND,29,,,,, ,GND,30,,,,, ,GND,31,,,,, ,GND,32,,,,, ,GND,33,,,,, ,GND,34,,,,, ,GND,35,,,,, ,GND,36,,,,, ,GND,37,,,,, ,GND,38,,,,, ,GND,39,,,,, ,GND,40,,,,, ,GND,41,,,,, ,GND,42,,,,, ,GND,43,,,,, ,GND,44,,,,, ,GND,45,,,,, ,GND,46,,,,, ,GND,47,,,,, ,GND,48,,,,, ,GND,49,,,,, ,GND,50,,,,, 3V3 D4 Y4 R1 J1 T6 Y8 T11 Y 13 W10 R8 U19 AA21 AA16 W20 W15 U14 P20 R18 M19 K18 A16 H17 G14 F21 F11 E18 D15 C22 C12 B19 A6 G7 E8 C7 U12O ,VCCIO2A1,,,,,, ,VCCIO2A2,,,,,, ,VCCIO2A3,,,,,, ,VCCIO2A4,,,,,, ,VCCIO3A1,,,,,, ,VCCIO3A2,,,,,, ,VCCIO3B1,,,,,, ,VCCIO3B2,,,,,, ,VCCIO3B3,,,,,, ,VCCIO3B4,,,,,, ,VCCIO4A1,,,,,, ,VCCIO4A2,,,,,, ,VCCIO4A3,,,,,, ,VCCIO4A4,,,,,, ,VCCIO4A5,,,,,, ,VCCIO4A6,,,,,, ,VCCIO5A1,,,,,, ,VCCIO5A2,,,,,, ,VCCIO5B1,,,,,, ,VCCIO5B2,,,,,, ,VCCIO7A1,,,,,, ,VCCIO7A2,,,,,, ,VCCIO7A3,,,,,, ,VCCIO7A4,,,,,, ,VCCIO7A5,,,,,, ,VCCIO7A6,,,,,, ,VCCIO7A7,,,,,, ,VCCIO7A8,,,,,, ,VCCIO7A9,,,,,, ,VCCIO7A10,,,,,, ,VCCIO8A1,,,,,, ,VCCIO8A2,,,,,, ,VCCIO8A3,,,,,, ,VCCIO8A4,,,,,, N4 P15 P13 P11 P3 N14 N12 N10 M15 M13 M11 L16 L14 L12 L10 L4 K15 K13 K11 K5 K3 J16 J14 J12 J10 J4 U12L ,VCC1,,,,,, ,VCC2,,,,,, ,VCC3,,,,,, ,VCC4,,,,,, ,VCC5,,,,,, ,VCC6,,,,,, ,VCC7,,,,,, ,VCC8,,,,,, ,VCC9,,,,,, ,VCC10,,,,,, ,VCC11,,,,,, ,VCC12,,,,,, ,VCC13,,,,,, ,VCC14,,,,,, ,VCC15,,,,,, ,VCC16,,,,,, ,VCC17,,,,,, ,VCC18,,,,,, ,VCC19,,,,,, ,VCC20,,,,,, ,VCC21,,,,,, ,VCC22,,,,,, ,VCC23,,,,,, ,VCC24,,,,,, ,VCC25,,,,,, ,VCC26,,,,,, 1V1 5CEFA2F23 B3 B4 E17 L9 U12M ,DNU1,,,,,, ,DNU2,,,,,, ,DNU3,,,,,, ,DNU4,,,,,, 5CEFA2F23 5CEFA2F23 3V3 Y6 V11 J22 J21 H21 H20 G22 G21 G20 F22 F20 F19 F18 E22 E21 E20 E19 D22 D21 D19 C21 C20 C19 C18 B22 B21 B20 B18 B17 A22 A20 A19 A18 A17 5CEFA2F23 V8 R19 F8 A3 U12Q ,NC1,,,,,, ,NC2,,,,,, ,NC3,,,,,, ,NC4,,,,,, ,NC5,,,,,, ,NC6,,,,,, ,NC7,,,,,, ,NC8,,,,,, ,NC9,,,,,, ,NC10,,,,,, ,NC11,,,,,, ,NC12,,,,,, ,NC13,,,,,, ,NC14,,,,,, ,NC15,,,,,, ,NC16,,,,,, ,NC17,,,,,, ,NC18,,,,,, ,NC19,,,,,, ,NC20,,,,,, ,NC21,,,,,, ,NC22,,,,,, ,NC23,,,,,, ,NC24,,,,,, ,NC25,,,,,, ,NC26,,,,,, ,NC27,,,,,, ,NC28,,,,,, ,NC29,,,,,, ,NC30,,,,,, ,NC31,,,,,, ,NC32,,,,,, ,NC33,,,,,, ,NC34,,,,,, 5CEFA2F23 U12N ,VCCPGM1,,,,,, ,VCCPGM2,,,,,, ,VCCPGM3,,,,,, ,VCCBAT,,,,,, 2V5 5CEFA2F23 3V3 E1 R2 J2 W6 W17 W14 W12 W11 P21 N18 M17 D16 E11 D14 D8 C10 U12P ,VCCPD1A2A1,,,,,, ,VCCPD1A2A2,,,,,, ,VCCPD1A2A3,,,,,, ,VCCPD3A,,,,,, ,VCCPD3B4A1,,,,,, ,VCCPD3B4A2,,,,,, ,VCCPD3B4A3,,,,,, ,VCCPD3B4A4,,,,,, ,VCCPD5A,,,,,, ,VCCPD5B1,,,,,, ,VCCPD5B2,,,,,, ,VCCPD7A8A1,,,,,, ,VCCPD7A8A2,,,,,, ,VCCPD7A8A3,,,,,, ,VCCPD7A8A4,,,,,, ,VCCPD7A8A5,,,,,, 5CEFA2F23 2V5 E6 D11 D18 W18 W13 W7 U12T ,VCC_AUX1,,,,,, ,VCC_AUX2,,,,,, ,VCC_AUX3,,,,,, ,VCC_AUX4,,,,,, ,VCC_AUX5,,,,,, ,VCC_AUX6,,,,,, 5CEFA2F23 Figure 2-2. Power Supply for the FPGA QM_CycloneV_5CEFA2 Core Board User Manual-V01 2.2.2 QM_CycloneV_5CEFA2 SDRAM Memory QM_CycloneV_5CEFA2 has on board 16bit width data bus, 32MB memory size MT48LC16M16 SDRAM provided by Micron. Below image shows the detailed hardware design: D[15..0] A[14..0] SDCKE0 SDCLK0 DQML DQMH CAS RAS A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 23 24 25 26 29 30 31 32 33 34 22 35 A13 A14 20 21 A12 36 40 SDCKE0 37 SDCLK0 38 DQML DQMH 15 39 CAS RAS 17 18 MN1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA0 BA1 A12 N.C CKE CLK DQML DQMH CAS RAS 16 SDWE SD_NCS0 19 SDWE SD_NCS0 MT48LC16M16A2 WE CS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSSQ VSSQ VSSQ VSSQ 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 3V3 1 14 27 3 9 43 49 28 41 54 6 12 46 52 C9 C3 C88 C87 100NF 100NF 100NF 100NF C4 C6 100NF 100NF 256 M bit s Figure 2-3. SDRAM 2.2.3 QM_CycloneV_5CEFA2 SPI Boot QM_CycloneV_5CEFA2 boots from external SPI Flash, detailed hardware design is shown in below figure. The SPI flash is using N25Q064 manufactured by Micron, with 64Mbit memory storage. Note: The SPI Flash is designed with x1 mode. 3V3 R248 FPGA_NCSO 1 FPGA_DATA1 2 R249 1K 3 4 U6 nCE VDD SO HOLD WP SCK VSS SI 1K 8 7 6 FPGA_DCLK 5 FPGA_ADSO N25Q064A13ESE40F Figure 2-4. SPI Flash QM_CycloneV_5CEFA2 Core Board User Manual-V01 Below image shows the hardware configuration of MSEL[4:0]: 10011, in which way will make the FPGA boot from Active Serial (x1 or x4) Standard Mode: Figure 2-5. MSEL Settings 2.2.4 QM_CycloneV_5CEFA2 System Clock The QM_CycloneV_5CEFA2 has system clock frequency 50MHz which is directly provided by external crystal. The crystal is designed with high accuracy and stability with low temperature drift 10ppm/°c. Below image shows the detailed hardware design: Figure 2-6. 50MHz System Clock 2.2.1 QM_CycloneV_5CEFA2 JTAG Port The on board JTAG port uses 10P 2.54mm pitch header which could be easily connected to Altera USB blaster cable. Below image shows the hardware design of the JTAG port: JTAG_TCK JTAG_TDO JTAG_TMS JTAG_TDI 1 3 5 7 9 J2 2 4 6 8 10 3V3 CONA_10P Figure 2-7. JTAG Port QM_CycloneV_5CEFA2 Core Board User Manual-V01 QM_CycloneV_5CEFA2 Power Supply The core board’s 3.3V power supply is using high efficiency DC/DC chip MP2315 provided by MPS Inc. The MP2315 supports wide voltage input range from 4.5V to 24V. In normal use case, 5V DC power supply is suggested to be applied on the board. Below image shows the MP2315 hardware design: REG ULATED 5V O NLY 3V3 C5 100nF R238 20R VIN U11 5 BST IN 2 4 3 2 1 4.7uH 3 SW EN/SY NC VCC R239 8 FB 4 33K GND 22pF 47uF100nF 100K C81 C82 C7 + L6 R235 AAM 6 R10 100K + 7 C80 1 R237 100nF C58 47uF C68 100nF JP5 Power_Header_SMT 75K MP2315 R236 33K Figure 2-8. MP2315 Hardware Design The core board’s 2.5V and 1.1V FPGA core voltage power supply is using high efficiency DC/DC chip NCP1529 provided by On-Semi Inc. 2V5 2V5 4.7uH M L7 3V3 4 U10 VIN SW C71 3 4.7uF R226 75K C73 22pF C72 4.7uF 1 EN GND 2 FB 5 NCP1529 R227 23.7K 1V1 L3 1V1 4.7uH M 2.2.2 3V3 4 U5 VIN SW 3 C56 4.7uF R21 100K C46 22pF C47 4.7uF 1 EN GND 2 FB 5 NCP1529 R26 120K Figure 2-9. NCP1529 Hardware Design QM_CycloneV_5CEFA2 Core Board User Manual-V01 2.2.3 QM_CycloneV_5CEFA2 Extension IO The core board has two 64P 2.54mm pitch female headers which are used for extending user modules, such as ADC/DAC module, audio/video module, ethernet module, etc. U8 3V3 BANK_4A_AA14 BANK_4A_AA15 BANK_4A_Y 15 BANK_4A_AB18 BANK_4A_Y 17 BANK_4A_AA18 BANK_4A_AA20 BANK_4A_Y 20 BANK_4A_AB21 BANK_4A_AA22 BANK_4A_W22 BANK_4A_Y 21 BANK_4A_U22 BANK_4A_V20 BANK_4A_U21 BANK_5A_R22 BANK_5A_P22 BANK_5A_T20 BANK_5A_P16 BANK_5B_N20 BANK_5B_M21 BANK_5B_M18 BANK_5B_L18 BANK_5B_M22 BANK_5B_L17 BANK_5B_K22 BANK_5B_M16 VIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 3V3 BANK_4A_AA13 BANK_4A_AB15 BANK_4A_Y 14 BANK_4A_AB17 BANK_4A_Y 16 BANK_4A_AA17 BANK_4A_AA19 BANK_4A_Y 19 BANK_4A_AB20 BANK_4A_AB22 BANK_4A_Y 22 BANK_4A_W21 BANK_4A_V21 BANK_4A_W19 BANK_4A_U20 BANK_5A_T22 BANK_5A_R21 BANK_5A_T19 BANK_5A_P17 BANK_5B_N21 BANK_5B_M20 BANK_5B_N19 BANK_5B_L19 BANK_5B_L22 BANK_5B_K17 BANK_5B_K21 BANK_5B_N16 VIN HDR_32X2 Connected to VIN power header. U7 3V3 BANK_2A_AA2 BANK_2A_Y 3 BANK_2A_U1 BANK_2A_N1 BANK_2A_L1 BANK_2A_G1 BANK_2A_E2 BANK_2A_C1 BANK_8A_G6 BANK_8A_G8 BANK_8A_F7 BANK_8A_D6 BANK_8A_E9 BANK_8A_B5 BANK_8A_B6 BANK_8A_A7 BANK_8A_A9 BANK_8A_B10 BANK_8A_G10 BANK_7A_C11 BANK_7A_B12 BANK_7A_E12 BANK_7A_D13 BANK_7A_B13 BANK_7A_A15 BANK_7A_B15 BANK_7A_C16 VIN Connected to VIN power header. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 3V3 BANK_2A_AA1 BANK_2A_W2 BANK_2A_U2 BANK_2A_N2 BANK_2A_L2 BANK_2A_G2 BANK_2A_D3 BANK_2A_C2 BANK_8A_H6 BANK_8A_H8 BANK_8A_E7 BANK_8A_C6 BANK_8A_D9 BANK_8A_A5 BANK_8A_B7 BANK_8A_A8 BANK_8A_A10 BANK_8A_C9 BANK_8A_F10 BANK_7A_B11 BANK_7A_A12 BANK_7A_D12 BANK_7A_C13 BANK_7A_A13 BANK_7A_A14 BANK_7A_C15 BANK_7A_B16 VIN HDR_32X2 Figure 2-10. Extension IO QM_CycloneV_5CEFA2 Core Board User Manual-V01 2.2.4 QM_CycloneV_5CEFA2 User LED Below image shows one user LED and 3.3V power supply indicator: R131 R255 1K 1K 3V3 3V3 1 D5 2 1 D4 2 LED_D5 Figure 2-11. User LEDs 2.2.5 QM_CycloneV_5CEFA2 User Key Below image shows the nCONFIG key and two user keys: 3V3 3V3 R228 4.7k KEY 0 R221 4.7K 2 SW1 RESET_N KEY 0 2 SW2 1 nCONFIG RESET_N 2 SW3 1 1 Figure 2-12. User Keys QM_CycloneV_5CEFA2 Core Board User Manual-V01 3. Reference [1] [2] [3] [4] [5] [6] 5cefa2-sdram_20171202_V01.pdf cv_5v2_Cyclone V Device Handbook.pdf an662_Arria V and Cyclone V Design Guidelines.pdf cv_51001_Cyclone V Device Overview.pdf cv_51002_Cyclone V Device Datasheet.pdf pcg-01014_Cyclone® V Device Family Pin Connection Guidelines.pdf QM_CycloneV_5CEFA2 Core Board User Manual-V01 4. Revision Doc. Rev. Date Comments 0.1 1/1/2018 Initial Version. 1.0 7/1/2018 V1.0 Formal Release. QM_CycloneV_5CEFA2 Core Board User Manual-V01
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