Compal LA 1311 Schematics. Www.s Manuals.com. R1a Schematics
User Manual: Motherboard Compal LA-1311 ATW02 - Schematics. Free.
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A
B
Model Name : ATW02
C
D
E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
BLOCK DIAGRAM
Mobile Celeron
Coppermine-T
(Trualatin)
4
4
Thermal Sensor
MAX1617MEE
(uFCBGA/uFCPGA)
CK TITAN
ICS9250-38
PAGE 5
PAGE 4,5,6
CPU VID & All
reference voltage
PAGE12
PAGE 7
PSB
CRT
Connector
PAGE 16
Almador-M
GMCH-M
VCH
Connector
Memory Bus
BANK 2,3,4,5
625 BGA
PAGE 15
3
SO-DIMM * 2
830MG
GM Bus Interface
PAGE 13,14
3
PAGE 8,9,10,11
HUB
Interface
TV-OUT
Connector
PAGE 16
USB
HDD Connector
421 BGA
2
PCI BUS
CD-ROM Connector
Mini PCI
Socket
PAGE 17,18,19
PAGE 20
PAGE 34
PAGE 27
ICH3-M
PAGE 20
FAN on controller &
TEMP. sensing circuit
USB & BlueTooth
2
DC/DC Interface
RTC Battery
PAGE 28
PAGE 36
LPC
TI PCI1420
Super I/O
Slot 0/1
CardBus
PAGE 24
PAGE 23
BATTERY
Charger
Embedded
Controller
LPC47N227
PAGE 25
PAGE 38,39
NS PC87591
AC'97
CODEC
CS4299
PAGE 32
POWER
Interface
PAGE 30
PAGE 37,40,41,42,43
1
Parallel
PAGE 26
Scan KB
FDD
PAGE 20
PAGE 15
BIOS & I/O
PORT
PAGE 33
Audio Jack
Audio Amplifier
PAGE 31
PAGE 31
Title
1
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Size
Document Number
Custom
Rev
1A
401204
Date:
A
B
C
D
星星星, 星星星 26, 2001
Sheet
E
2
of
43
A
B
C
D
E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
22
Voltage Rails
PIR
1
2
Power Plane
Description
S1
S3
S5
VIN
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+VCC_H_CORE
Core voltage for CPU
ON
OFF
OFF
REV 0.2
+VTT
1.2V switched power rail for CPU AGTL Bus
ON
OFF
OFF
Date
Page
Description
+1.5V
1.5V power rail
ON
ON
OFF
+1.5VS
AGP 4X
ON
OFF
OFF
10/23
10/23
10/25
10/29
16
10
37 to 43
35
+1.8V
1.8V power rail
ON
ON
OFF
+1.8VS
1.8V switched power rail
ON
OFF
OFF
Change R10 R12 R14 to 10Ohm
Change R229 to 255_1% Ohm
Integrate Power schematic rev0.4
Change H30 H31 H32 H33 H34
H35 H37 H38
Footprint to PAD_3_4X2_2MM
+2.5V
2.5V power rail
ON
ON
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+3V
3.3V power rail
ON
ON
OFF
+3VS
3.3V switched power rail
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
10/30
10/30
10/30
10/30
10/30
10/30
10/30
11/01
11/01
11/05
11/22
16
26
30
23
29
7
35
28
7
12
All
+5V
5V power rail
ON
ON
OFF
+5VS
5V switched power rail
ON
OFF
OFF
+12VALW
12V always on power rail
ON
ON
ON*
+12VS
12V switched power rail
ON
OFF
OFF
RTCVCC
RTC power
ON
ON
ON
REV 0.1
Date
9/26
Page
1
Description
First time modify for remove
OZ168
1
Remove @ on R199 R200 R201
Remove @ on R561
Remove @ on R81
Add @ on R473 C695
Add @ on R536
Add @ on R460 R461 U49
Delete H34
Remove @ on U61
Change R288 to 499_1% R291 to 1K_1%
Change R110 R111 from 330 to 1K
Version update to 1.0
2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Devices
Device
IDSEL#
REQ#/GNT#
Interrupts
CardBus
AD20
2
PIRQA/PIRQB
Mini-PCI
AD18
1/4
PIRQC/PIRQD
3
3
EC SM Bus1 address
EC SM Bus2 address
Device
Address
Device
Address
Smart Battery
0001 011X b
MAX1617MEE
1001 110X b
EEPROM(24C16/02)
1010 000X b
Smart Battery
0001 011X b
1011 000Xb
Docking
0011 011X b
DOT Board
XXXX XXXXb
(24C04)
ICH3-M SM Bus address
4
Device
Address
Clock Generator ( ICS9238-50)
1101 0000
SDRAM Select ( 74HC4052 )
1010 0000
CPU Voltage VID select ( F3565 )
0110 111Xb
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Size
Document Number
Custom
Rev
1A
401204
Date:
A
B
C
D
星星星, 星星星 26, 2001
Sheet
E
3
of
43
A
B
C
D
E
+VCC_H_CORE
1
2
8
H_REQ#[0..4]
H_ADS#
+1.5VS
3
A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35
R1
L3
T1
U1
L1
T4
AA3
REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
RP#
ADS#
W2
AB3
P3
C14
AF23
AF4
AERR#
AP#0
AP#1
BERR#
BINIT#
IERR#
BREQ0#
NC
NC
NC
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
H_REQ#[0..4]
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
8
K1
J1
G2
K3
J2
H3
G1
A3
J3
H1
D3
F3
G3
C2
B5
B11
C6
B9
B7
C8
A8
A10
B3
A13
A9
C3
C12
C10
A6
A15
A14
B13
A12
R331
1
1.5K
2
R87
1
10
2
8
8
8
H_BPRI#
H_BNR#
H_LOCK#
A7
C4
C22
AD23
R2
L2
V3
8
8
8
H_HIT#
H_HITM#
H_DEFER#
AA2
U2
T3
TUALATIN
VCC
Address
Lines
Mobile
Data
Signals
Celeron
Request
Signals
Coppermine-T
Error
Interface
Arbitration
Signals
Snoop
Signals
VSS
VCC
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74
VCC_73
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_D#[0..63]
D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63
A16
B17
A17
D23
B19
C20
C16
A20
A22
A19
A23
A24
C18
D24
B24
A18
E23
B21
B23
E26
C24
F24
D25
E24
B25
G24
H24
F26
L24
H25
C26
K24
G26
K25
J24
K26
F25
N26
J26
M24
U26
P25
L26
R24
R26
M25
V25
T24
M26
P24
AA26
T26
U24
Y25
W26
V26
AB25
T25
Y24
W24
Y26
AB24
AA24
V24
H_D#[0..63] 8
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
2
3
P6
M6
AC5
AA5
AB6
W5
Y6
U5
U9A
H_A#[3..31]
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
H_A#[3..31]
E16
VSS_0
R4
VSS_1
E25
VSS_2
G25
VSS_3
J25
VSS_4
L25
VSS_5
N25
VSS_6
R25
VSS_7
U25
VSS_8
W25
VSS_9
AA25
VSS_10
AC25
VSS_11
AF25
VSS_12
AE26
VSS_13
C23
VSS_14
F23
VSS_15
H23
VSS_16
K23
VSS_17
M23
VSS_18
P23
VSS_19
T23
VSS_20
V23
VSS_21
Y23
VSS_22
AB23
VSS_23
AE23
VSS_24
B22
VSS_25
D21
VSS_26
F21
VSS_27
E22
VSS_28
H21
VSS_29
G22
VSS_30
K21
VSS_31
J22
VSS_32
M21
VSS_33
L22
VSS_34
P21
VSS_35
N22
VSS_36
T21
VSS_37
R22
VSS_38
V21
VSS_39
U22
VSS_40
Y21
VSS_41
W22
VSS_42
AB21
VSS_43
AA22
VSS_44
AC22
VSS_45
AE21
VSS_46
B20
VSS_47
D19
VSS_48
AB19
VSS_49
AA20
VSS_50
AC20
VSS_51
AE19
VSS_52
B18
VSS_53
D17
VSS_54
F17
VSS_55
E18
VSS_56
AB17
VSS_57
8
D22
F22
E21
H22
G21
K22
J21
M22
L21
P22
N21
T22
R21
V22
U21
Y22
W21
AB22
AA21
AC21
D20
F20
E19
AB20
AA19
AC19
D18
F18
E17
AB18
AA17
AC17
D16
F16
E15
AB16
AA15
AC15
D14
F14
E13
AB14
AA13
AC13
D12
F12
E11
AB12
AA11
AC11
D10
F10
E9
AB10
AA9
AC9
D8
F8
E7
AB8
AA7
AC7
D6
F6
E5
H6
G5
K6
J5
N5
T6
V6
1
+VCC_H_CORE
4
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
4
of
43
B
C
+VTT
+1.8VS
+1.5VS
1
1
17
H_A20M#
17
17
H_IGNNE#
H_SMI#
H_A20M#
H_IGNNE#
17
H_STPCLK#
17,42 H_DPSLP#
17
H_INTR
17
H_NMI
17
H_INIT#
H_RESET#
W3
Y1
H_DBSY#
H_DRDY#
H_PICD0
H_PICD1
R55
150
10,12
12
H_BSEL0
H_BSEL1
1
2
R280
110_1%
2
2
Celeron
CLK0
CLK0#
TESTLO
AC1
AD1
M1
CLK_HCLK
CLK_HCLK#
TESTLO2
DBSY#
DRDY#
Analog
AF13
AF14
THERMDA
THERMDC
AE12
AF10
AF16
SELFSB0
SELFSB1
EDGECTRLP
AD19
AD17
AF20
12 CLK_CPU_APIC
C39
APIC
1
2
@33_0402
AF22
AE20
AD22
AD21
RP2#
RP3#
BPM0#
BPM1#
Debug
Break
Point
AD10
AD7
AD11
AF7
AF15
AF19
AE22
TCK
TDI
TDO
TMS
TRST#
PREQ#
PRDY#
R482 1.5K
1
2 ITP_TRST#
1
2
+1.5VS
AF12
AD5
AE16
CMOSREF_1
CMOSREF_0
RTTIMPDEP
R517 200
1
R68
2
56.2_1%
L5
17,19 PM_CPUPERF#
3
NC
NCHCTRLP
TESTHI
NC
NC
NC
TESTHI
NC
Test
Access
PORT
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
( ITP )
VCCT
VID
VTTPWRGOOD
NC
GHI#
Note :
GHI# Pull-Up internally
1
+V_AGTLREF
+VCC_H_CORE
+VTT
1
L30
2
4.7UH
C520
33UF_16V_D2
CLK_HCLK 12
CLK_HCLK# 12
2
AF18
AD16
AF11
AE8
N24
AE10
E2
R76
1
14_1%
2
TESTHI1
TESTHI2
P4
AD4
A5
D1
AD13
B1
P26
A11
E3
CPUVTT_PWRGD
D26
3
TUALATIN
+VTT
1
+VTT
TESTLO1
TESTLO2
8P4R_1K
+VTT
R41
@10PF
+VS_CMOSREF
Coppermine-T
PICD0
PICD1
PICCLK
8
7
6
5
VSS_142
VSS_141
VSS_140
VSS_139
VSS_138
VSS_137
VSS_136
VSS_135
VSS_134
VSS_133
VSS_132
VSS_131
VSS_130
17
17
Y4
R5
N3
N2
P1
P5
E1
F1
TESTLO1
Mobile
TESTLO
VCC
PLL1
PLL2
NC
NC
NC
NC
VTT Ref
1
H_THERMDA
H_THERMDC
2
@0
2
2
@0
AF21
AB26
H26
A21
AF9
A4
N1
AA1
Data
Signals
A20M#
FERR#
FLUSH#
IGNNE#
SMI#
PWRGOOD
STPCLK#
DPSLP# Compatibility
INTR/LINT0
NMI/LINT1
INIT#
RESET#
1
2
3
4
+
1
+1.5VS
R53
1
1
R64
VREF_1
VREF_2
VREF_3
VREF_4
VREF_5
VREF_6
VREF_7
VREF_8
GND
F19
E20
C25
A25
AE1
AD2
AB2
Y2
V2
T2
P2
M2
K2
8
8
+1.5VS
R62
150
AE24
AD25
AE25
AC24
AF24
AD26
AC26
AD24
C1
NC
AF17
NC
N4
NC
8
H_INTR
H_NMI
AC3
AF6
AF5
AD9
AD3
AB4
AE4
AF8
AD15
AE14
AE6
B15
+VTT
RP23
TESTHI1
TESTHI2
DEP#0
DEP#1
DEP#2
DEP#3
DEP#4
DEP#5
DEP#6
DEP#7
2
H_TRDY#
RS#0
RS#1
RS#2
RSP# Request
TRDY# Signals
B26
VSS
M4
VSS
AF26
VSS
H_PWRGD
8
Y3
V1
U3
M5
W1
VID0
VID1
VID2
VID3
VID4
17
H_RS#0
H_RS#1
H_RS#2
AB1
AC2
AE2
AF3
R3
H_FERR#
R336
1.5K
8
8
8
A26
VCCT_1
G23
VCCT_2
J23
VCCT_3
L23
VCCT_4
N23
VCCT_5
R23
VCCT_6
U23
VCCT_7
W23
VCCT_8
AA23
VCCT_9
C21
VCCT_10
C19
VCCT_11
AD20
VCCT_12
C17
VCCT_13
AD18
VCCT_14
C15
VCCT_15
C13
VCCT_16
AD14
VCCT_17
C11
VCCT_18
AD12
VCCT_19
C9
VCCT_20
C7
VCCT_21
AD8
VCCT_22
C5
VCCT_23
AD6
VCCT_24
AC23
VCCT_25
AA4
VCCT_26
E4
VCCT_27
G4
VCCT_28
J4
VCCT_29
L4
VCCT_30
AC4
VCCT_31
V4
VCCT_32
AE3
VCCT_33
AF2
VCCT_34
AF1
VCCT_35
AE18
VCCT_36
D5
VCCT_37
E6
VCCT_38
17
R335
3K
2
R325
1.5K
2
R61
56.2_1%
2
Place H_RESET#
R3<0.1" from U1
1
1
+1.5VS
1
E
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
U9B
D
AA18
AC18
AE17
B16
D15
F15
AB15
AA16
AC16
AE15
B14
D13
F13
E14
AB13
AA14
AC14
AE13
B12
D11
F11
E12
AB11
AA12
AC12
AE11
B10
D9
F9
E10
AB9
AA10
AC10
AE9
B8
D7
F7
E8
AB7
AA8
AC8
AE7
B6
F5
H5
G6
K5
J6
N6
L6
T5
R6
V5
U6
Y5
W6
AB5
AA6
AC6
AE5
B4
D4
F4
H4
K4
M3
U4
W4
B2
D2
F2
H2
A
R44
+5VALW
10K
200
CPU_VR_VID4
CPU_VR_VID3
CPU_VR_VID2
CPU_VR_VID1
CPU_VR_VID0
1
.1UF
7
7
7
7
7
+3VS
2N7002
R100
EC_SMC2 32
10K
VTT_PWRGD
1
43
2
From 87591
EC_SMD2 32
1
MAX6654
14
U36F
13
C105
12
VTT_PWRGD# 12,32
74LVC14
7
4
.1UF
R50
R49
1K
10K
2
Thermal Sensor
3
16
15
14
13
12
11
10
9
2
1K
4
2
NC
STBY
SMBCLK
NC
SMBDATA
ALERT
ADD0
NC
1
1
+5VALW
R80
NC
VCC
DXP
DXN
NC
ADD1
GND
GND
Title
2
2
H_THERMDA
H_THERMDC
1
2
3
4
5
6
7
8
Q6
2
+3V
1
1
U8
C70
2200PF
CPUVTT_PWRGD
2
C40
R99
2
1
2
1
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
+5VALW
Rev
1A
401204
A
B
C
D
Sheet
E
5
of
43
A
B
C
D
E
Layout note :
Place close to CPU, Use 2~3 vias per PAD.
Place .47uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.
Layout note :
+
1
1
1
C412
.47UF
C45
220UF_4V_D2
+
C513
220UF_4V_D2
2
2
C390
.47UF
2
C398
.47UF
2
2
C397
.47UF
1
1
1
1
C396
.47UF
2
C395
.47UF
2
C394
.47UF
2
2
C393
.47UF
1
1
1
1
C392
.47UF
2
C391
.47UF
2
C389
.47UF
2
C388
.47UF
1
+VTT
1
1
+VCC_H_CORE
2
1
Place close to CPU,
Use 2 vias per PAD.
2
1
+VCC_H_CORE
+VTT
C32
C34
C37
C41
C43
C48
C59
C67
1
1
1
1
1
1UF_10V_0603
1
1
1
1
1
1
C431
.47UF
1UF_10V_0603
C72
C79
1UF_10V_0603
1UF_10V_0603
1UF_10V_0603
1UF_10V_0603
2
2
2
2
2
2
2
2
2
2
2
2
C408
.47UF
2
C420
.47UF
2
2
C409
.47UF
1
1
1
1
C432
.47UF
2
C525
.47UF
2
C421
.47UF
2
2
C424
.47UF
1
1
1
1
C433
.47UF
2
C411
.47UF
2
C425
.47UF
2
2
C434
.47UF
1
1
1
1UF_10V_0603
1UF_10V_0603
2
1UF_10V_0603
1UF_10V_0603
1
1
C446
10UF_10V_1206
2
C447
10UF_10V_1206
2
C448
10UF_10V_1206
2
C449
10UF_10V_1206
2
2
C450
10UF_10V_1206
1
1
1
+VCC_H_CORE
1
1
C33
10UF_10V_1206
2
C38
10UF_10V_1206
2
C30
10UF_10V_1206
2
C117
10UF_10V_1206
2
2
C445
10UF_10V_1206
1
1
1
+VCC_H_CORE
+VCC_H_CORE
1
1
C549
+
150UF_6.3V_D2
C538
150UF_6.3V_D2
2
C519
+
150UF_6.3V_D2
2
1
C537
+
150UF_6.3V_D2
2
2
C536
+
150UF_6.3V_D2
2
+
1
3
1
3
2
C314
+
150UF_6.3V_D2
1
C313
+
150UF_6.3V_D2
C297
150UF_6.3V_D2
2
1
1
C308
+
150UF_6.3V_D2
2
1
C309
+
150UF_6.3V_D2
2
2
C310
+
150UF_6.3V_D2
2
+
1
1
+VCC_H_CORE
4
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
6
of
43
A
B
C
D
Mount R321 and RP30 if without support SpeedStep
E
+VTT
GTL Reference Voltage
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
1
R303
1K_1%
Layout note :
1. Place R303 and R322 between and GMCH and CPU.
2. Place decoupling caps near CPU.(Within 500mils)
2
D4 D3
D2 D1
D0
CPU_Core(V) QS( MP)
-------------------------------------------------------0
0
1
1
1
1.40V (Performance)
0
1
1
0
0
1.15V (Battery)
1
0
1
0
1
0.85V (Deeper Sleep)
1
1
Tualatin
42
42
42
42
42
+3V
R302
249_1%
2
.1UF
+V_SMREF
R291
1K_1%
2
C467
.1UF
1
2
1
2
1
C439
.1UF
C440
.1UF
1
Mode
Battery
Performance
Place Reference Circuit near GMCH
+1.5VS
+1.8VS
Deeper sleep
HUB Interface Reference
1
2
R308
301_1%
3
C578470PF
2
1
0
From
Non-volatile
register(SOPRB)
From
Non-volatile
register(SOPRA)
R376
1K_1%
Layout note :
1. Place R308 and R296 in middle of Bus.
2. Place capacitors near GMCH.
+VAGP_BRDREF
3
R370
1K_1%
2
C453
.1UF
R365
82.5_1%
1
C555470PF
2
2
2
R296
301_1%
1
1
1
+VS_HUBREF
R373
82.5_1%
2
1
MUX_outputs
MUX_inputs
1
0
2
A/B#
X
0
1
MUX_SEL
1
1
1
PM_DPRSLPVR = 1: for Deeper Sleep mode
0 : for Performance mode
U49
Override#
@NC7SZ02
1
2
PM_GMUXSEL = 1 : for Performance mode
0 : for CPU default power
2
3
2
2
2
17,42 PM_GMUXSEL
4
2
+VS_CMOSREF
Place capacitor close to GMCH.
R297
49.9_1%
MUX_SEL
Layout note :
1. Place R288 and R291 between and GMCH and CPU.
2. Place decoupling caps near CPU.
249.9_1%
@FM3565
1
17,42 PM_DPRSLPVR
1
CMOS Reference Voltage
R288
499_1%
1
5
System Memory Reference
1
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
2
R173
@10K
C647
2
+1.5VS
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
2
1
@0
2
2
@0
1
2
R460
1
1
R461
1
+3V
1
+3VS
20
19
18
17
16
15
14
13
12
11
VCC
SCL
ASEL
SDA
WP
Override#
NC
I_0
MUX_SEL
I_1
Y_0
I_2
Y_1
I_3
Y_2
I_4
Y_3
A/B#
Y_4
GND
2
1
2
8
7
6
5
1
2
3
4
5
6
7
8
9
10
2
C27
.1UF
.1UF
U17
CPU_VR_VID0
CPU_VR_VID1
CPU_VR_VID2
CPU_VR_VID3
CPU_VR_VID4
C35
.1UF
2
1
Address 0110 111X
2
From Tualatin CPU
5
5
5
5
5
C71
.1UF
C213
@100K
12,14,17 SMB_CLK
12,14,17 SMB_DATA
C514
.1UF
2
+3V
R172
RP30
8P4R_0
R321
0
1
1
1
2
3
4
1
Default for Resistors Should
be +VCC_CPU = 0.7V, for
Deeper Sleep Only.
R322
2K_1%
2
+3V
1
1
+V_AGTLREF
CPU Voltege ID
+1.8VS
1
HUB Interface VSwing Voltage
R275
576_1%
1
+1.8VS
1. Place R275 and R274 near GMCH.
1. Place R93 and R94 in middle of Bus.
+VS_RIMMREF
1
2
2
R93
301_1%
+VS_HUBVSWING
R94
301_1%
C97
.1UF
4
2
2
2
4
1
1
R274
2K_1%
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
7
of
43
AJ5
D2
AC5
Y5
U5
P5
L5
H5
AH2
AE2
AB2
W2
T2
N2
K2
G2
AC7
VSS_H0
VSS_H1
VSS_H2
VSS_H3
VSS_H4
VSS_H5
VSS_H6
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H14
VSS_H15
VSS_H16
H_A#[3..31]
Almador-M
GMCH
A3
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H2
E3
G3
N4
M6
F1
F2
J3
F3
P6
G1
N5
H1
P4
T4
M2
J2
L2
R4
K1
L3
L1
J1
N1
T5
H3
M3
M1
K3
H_CPURST#
H_ADS#
H_BNR#
H_BPRI#
H_DBSY#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
R6
C1
E1
L4
G5
J4
F4
D3
D1
J6
G4
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
K6
M4
K5
K4
L6
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H6
H4
G6
H_RS#0
H_RS#1
H_RS#2
1
R290
H_RS#[0..2]
CLK_GHT 12
CLK_GHT# 12
2
CLK_DREF 12
CLK_GBIN 12
CLK_GBOUT 12
2
R26047
R242 R276
@33_0402
@33_0402
.01UF
C373
R158
240K
C381
@10PF
1
2
1
2
AC19
AG26
AD24
1
G8
VSSA_CPLL
AD7
VSSA_HPLL
AH26
VSSA_DAC
AH24
VSSP_DVO0
AF25
VSSP_DVO1
AF27
VSSP_DVO2
G28
VSSP_HUB0
H25
VSSP_HUB1
H_GTLRCOMP
CLK_DREF
CLK_GBIN
CLK_GBOUT
AJ4
AH5
Closely to C.G
@10PF
2
80.6_1%
1
1
C471
.1UF
2
2
1
1 54.9_1%
2 27.4_1%
2 54.9_1%
2
R78
2
1
2
R246 2
R92 1
R83 1
H_RS#[0..2] 5
+V_AGTLREF
C469
.1UF
C476
.01UF
H_RESETX#
H_RESET# 5
H_ADS# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_DRDY# 5
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 5
H_REQ#[0..4] 4
H_REQ#[0..4]
C322
1
R91
17 HUB_PD[0..10]
17 HUB_PSTRB
17 HUB_PSTRB#
4
2
@0
3
CLK_HT
CLK_HT#
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
+VS_HUBREF
2
Close to Ball R6.
1
Host
Interface
H_A#[3..31] 4
1
Host
Interface
AH19
VSSPCMOS_LM0
AH20
VSSPCMOS_LM1
AF5
VSSPCMOS_LM2
ALMADOR-M
E
VSS
AB23
VSS
AC23
VSS
3
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
C2
2
U4
P1
W6
U2
U6
R1
N3
W5
V4
P3
R3
U1
V6
W4
T3
P2
V3
R2
T1
W3
U3
Y4
AA3
W1
V1
Y1
Y6
AD3
AB4
AB5
V2
Y3
Y2
AA4
AA1
AA6
AB1
AC4
AA2
AB3
AD2
AD1
AC2
AB6
AC6
AC1
AF3
AD4
AD6
AC3
AH3
AE5
AE3
AG2
AF4
AF2
AJ3
AE4
AG1
AE1
AG4
AH4
AG3
AF1
AC22
DVO_RCOMP
F6
SM_RCOMP
J23
HUB_RCOMP
J25
AGP_REF
K24
AGP_RCOMP/DVOBC_RCOMP
AB24
RESET#
AA7
H_GTLREF1
J7
H_GTLREF0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
AC26
VSSP_IO0
AD22
VSSP_IO1
AE28
VSSP_IO2
U7A
H_D#[0..63]
D
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
H_D#[0..63]
1
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PSTRB
HUB_PSTRB#
HUB_REF
4
C
M12
M13
M17
M18
N12
N13
N14
N15
N16
N17
N18
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T13
T14
T15
T16
T17
U12
U13
U14
U15
U16
U17
U18
V12
V13
V17
V18
B
G26
H28
H29
H27
F29
F27
E29
E28
G25
G27
H26
G29
F28
H24
A
1
54.9_1%
PCIRST# 15,17,19,20,21,22,23,24,25,28,29,34
4
C470
.1UF
10 mils wide,length <=500 mils.
+VAGP_CRDREF
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
8
of
43
A
B
C
D
SM_DQ[0..63]
AE20
G24
K28
N28
T28
W28
AB28
L25
P25
U25
Y25
VSSA_DPLL0
VSSA_DPLL1
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
VSS_LM
Almador-M
GMCH
SDRAM
System
Memory
SDRAM
System
Memory
A3
SM_D_MA[0..12] 13
SM_D_MA0
SM_D_MA1
SM_D_MA2
SM_D_MA3
SM_D_MA4
SM_D_MA5
SM_D_MA6
SM_D_MA7
SM_D_MA8
SM_D_MA9
SM_D_MA10
SM_D_MA11
SM_D_MA12
SM_MA0
SM_MA1
SM_MA2
SM_MA3
SM_MA4
SM_MA5
SM_MA6
SM_MA7
SM_MA8
SM_MA9
SM_MA10
SM_MA11
SM_MA12
A20
B20
B19
C19
A18
A19
C17
C18
B17
A17
A16
C15
C14
NC
NC
NC
NC
VSS
VSS
VCC_SM
VCC_SM
F20
E20
F12
E11
C21
F19
E12
A12
SM_BA0
SM_BA1
B16
C16
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
F18
D18
D13
D12
E18
F17
F14
F13
SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
VCCQ_SM
VSS
E17
F16
D16
D15
E15
E14
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
SM_CLK0
SM_CLK1
SM_CLK2
SM_CLK3
VSS
VSS
A15
B2
B14
A3
A14
C3
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
VSS
VCC_SM
A13
C9
C13
A9
B13
A8
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
A21
SM_WE#
D19
SM_CAS#
C20
SM_RAS#
C24
SM_RCLK
A24
SM_OCLK
Power
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
F24
SM_VREF1
E5
SM_VREF0
ALMADOR-M
SM_D_MA[0..12]
VSS
H7
H23
K7
K23
L7
N6
T6
W7
Y7
AB7
M24
P24
T24
V24
Y23
M14
M15
M16
P12
R12
T12
P18
R18
T18
3
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
VSSP_SM0
VSSP_SM1
VSSP_SM2
VSSP_SM3
VSSP_SM4
VSSP_SM5
VSSP_SM6
VSSP_SM7
VSSP_SM8
VSSP_SM9
VSSP_SM10
VSSP_SM11
VSSP_SM12
VSSP_SM13
VSSP_SM14
VSSP_SM15
VSSP_SM16
VSSP_SM17
VSSP_SM18
VSSP_SM19
2
D29
C29
D27
C27
A27
B26
E24
C25
E23
B25
C23
F22
B23
C22
E21
B22
C12
D10
C11
A10
C10
C8
A7
E9
C7
E8
A5
F8
C5
D6
B4
C4
E27
C28
B28
E26
C26
D25
A26
D24
F23
A25
G22
D22
A23
F21
D21
A22
F11
A11
B11
F10
B10
B8
D9
B7
F9
A6
C6
D7
B5
E6
A4
D4
B3
B6
B9
B12
B15
B18
B21
B24
B27
E7
E10
E13
E16
E19
E22
E25
G9
G21
E4
D28
1
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
VSSP_AGP0
VSSP_AGP1
VSSP_AGP2
VSSP_AGP3
VSSP_AGP4
VSSP_AGP5
VSSP_AGP6
VSSP_AGP7
VSSP_AGP8
AD8
AD9
AD10
AJ21
AE8
AE9
AE10
AE11
AE12
AE13
AE17
AE19
AH21
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AG7
AG15
AG16
AG21
AH6
AH8
AH9
AH11
AH12
AH14
AH17
AH18
VSSA_DPLL0 10
VSSA_DPLL1 10
U7B
E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R254
VSSA_DPLL0 1
R306
VSSA_DPLL1 1
0
2
0
2
*
*
1
XOR layout note:
F20,E20,F12,E11 add
testpoint for factory
For Almador-M A3 stepping requirement.
+3V
1
C512
2 10
2 10
R3191
R3101
2
.1UF
SM_BA0 14
SM_BA1 14
SM_DQM[0..7] 14
2
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
14
14
14
14
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
14
14
14
14
+3V
3
C452
1
.1UF
2
+3V
Layout note :
1.Placement TP6 for Almador-M A2 stepping die.
2.The 0.1uF capacitor and connection to +3V
must be implanted for Almador-M A3 stepping
die.
SM_DQ[0..63] 14
R312 1
R311 1
R316 1
+VTT
SM_OCLK
SM_RCLK
1
2
2
2
10
10
10
SM_RAS# 14
SM_CAS# 14
SM_WE# 14
2
C507 @22PF
Layout note :
Line length 0.15 inches +- 50mils
Layout note :
near pin C24
Layout note :
1
C494
1
+V_SMREF
Place resistors & capacitors near GMCH
C493
Close to Ball E5 and F24
.1UF
4
1
14
14
14
14
C515
@33PF
C517
@33PF
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
2
C516
@33PF
2
C506
@33PF
1
SMD_CLK0
SMD_CLK1
SMD_CLK2
SMD_CLK3
2
10
10
10
10
2
2
2
2
2
1
1
1
1
1
1
R318
R313
R317
R315
2
.1UF
SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3
2
4
Size
Document Number
Custom
Rev
1A
401204
Date:
A
B
C
D
星星星, 星星星 26, 2001
Sheet
E
9
of
43
C
D
+VTT
+3V
Place close to AE16,
AE15 of GMCH
2
C483
1
.1UF
1
C383
1
*
C283
C384
+3V
@.1UF
.01UF
+1.8VS
E
+1.8VS
.1UF
2
.1UF
1
2
Layout note :
C330
2
1
+VTT
+1.8VS
2
0_0805
1
1
R277
+1.5VS
*
C282
VSSA_DPLL0 9
VSSA_DPLL1 9
*
C286
@.1UF @220UF_4V_D2
2
B
*
C285
@220UF_4V_D2
L3
0_0805 R301
1
2
1
1
2
1
* L4 0_0805 R299
*
2
A
+VTT
+1.5VS
+1.5VS
AC21
AF21
AF24
VCCP_DVO
VCCP_DVO
VCCP_DVO
AC20
F25
VCCA_DPLL0
VCCA_DPLL1
F5
J5
M5
R5
V5
AA5
AD5
AG5
E2
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
VCC_H
AF26
AG27
VCCA_DAC
VCCA_DAC
AF6
AE7
AC9
AC8
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
VCCPCMOS_LM
G10
G20
VCCQ_SM
VCCQ_SM
AE6
G7
VCCA_HPLL
VCCA_CPLL
N24
W23
J24
F26
AE25
AD23
J26
M26
R26
V26
AA26
L23
AA23
U24
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
VCCP_AGP
Power
Interface
AGP_CBE#[0..3]
AGP_CBE#0 L27
AGP_CBE#1 P29
AGP_CBE#2 R27
AGP_CBE#3 T25
15
15
15
AGP_PIPE#
AGP_WBF#
AGP_RBF#
AGP_PIPE#
AGP_WBF#
AGP_RBF#
DVOA_D1
IOQD=2
IOQD=8
DVOA_D5
Desktop
Mobile
DVOA_D6
Dual Ended Term
Single Ended Term
*
R269 1
R226 1
2 @2.2K DVOA_D6
2 2.2K DVOA_D5
R240 1
2 @2.2K DVOA_D0 1
1
2
H_BSEL0 5,12
DVO_CLKIN
DVO_BLANK#
DVO_VSYNC
DVO_HSYNC
IO_I2CCLK
IO_I2CDATA
DVO_CLK#
DVO_CLK
AD20
AD21
AF23
AF22
AD25
AC25
AG24
AJ24
DVOA_CLKIN
DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11
AJ22
AH22
AG22
AJ23
AH23
AG23
AE23
AE24
AJ25
AH25
AG25
AJ26
DVOA_D0
DVOA_D1
IO_DDC2DATA
IO_DDC2CLK
DVO_INTR#
DVO_FIELD
AD26
AE26
AE21
AE22
LM_DQA0
LM_DQA1
LM_DQA2
LM_DQA3
LM_DQA4
LM_DQA5
LM_DQA6
LM_DQA7
AG17
AJ17
AG18
AJ18
AG19
AJ19
AG20
AJ20
LM_DQB0
LM_DQB1
LM_DQB2
LM_DQB3
LM_DQB4
LM_DQB5
LM_DQB6
LM_DQB7
AJ11
AH10
AJ10
AG10
AJ9
AG9
AJ8
AG8
AGP_BUSY#
AC24
IO_DDC1CLK
IO_DDC1DATA
1
2
R229
255_1%
DAC_VSYNC 16
DAC_HSYNC 16
DAC_RED# 16
DAC_GREEN# 16
DAC_BLUE# 16
DAC_RED 16
DAC_GREEN 16
DAC_BLUE 16
1
R262 1
R252 10K
2
2 10K
R551 1
R552 1
2 10K
2 10K
AGP_DDCCLK 15,16
AGP_DDCDATA 15,16
R551,R552: No stuff in AGP mode,
Stuff in VCH mode
VCH_I2CDATA 15
VCH_I2CCLK 15
R261 1
R263 1
+3VS
2 0
2 0
+3VS
2
A3
Local Memory
Interface
AC10
VCC_LM
AC11
VCC_LM
AD11
VCC_LM
AD12
VCC_LM
AD13
VCC_LM
AE18
VCC_LM
AD17
VCC_LM
AD18
VCC_LM
AD19
VCC_LM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCP_SM
VCCQ_SM
VCCQ_SM
VCCP_SM
VCCQ_SM
VCCP_SM
D5
D8
D11
D14
D17
D20
D23
D26
F7
F15
G11
G19
G23
AJ16
LM_CFM
AH16
LM_CFM#
AH15
LM_CTM
AJ15
LM_CTM#
AD14
LM_RAMREF0
AE14
LM_RAMREF1
Local Memory
Interface
DVOA_CLKIN
1
R259
1
R255
DVOA_FIELD 1
R256
DVOA_INTR#
DVOA_D4
DVOA_D5
DVOA_D6
2
100K
2
100K
2
10K
XOR layout note: AE24,AJ25
add testpoint for factory
TV_OUT_DDC2DATA 15
TV_OUT_DDC2CLK 15
R251 1
R250 1
2 10K
2 10K
+3VS
DVOA_INTR#
DVOA_FIELD
3
R257
1
2
@10K
AGP_BUSY#
*
+3VS
AGP_BUSY# 15,17
+1.8VS
+3V
C354
68PF
2
AGP_PAR : Strapping option for SW detection of
AGP or DVO device.
0 -> DVO B/C device
1 -> AGP device
AE29
AD28
AF28
AG28
AH27
AF29
AG29
AH28
AE27
AD27
AJ27
Almador-M
GMCH
AJ6
LM_RCLK
AG6
LM_GCLK
ALMADOR-M
DAC_VSYNC
DAC_HSYNC
DAC_RED#
DAC_GREEN#
DAC_BLUE#
DAC_RED
DAC_GREEN
DAC_BLUE
IO_DDC1CLK
IO_DDC1DATA
DAC_REFSET
(DVOA port)
AG11
LM_RQ0
AJ12
LM_RQ1
AG12
LM_RQ2
AH13
LM_RQ3
AG13
LM_RQ4
AJ13
LM_RQ5
AG14
LM_RQ6
AJ14
LM_RQ7
AGP_AD0/DVOB_HSYNC
AGP_AD1/DVOB_VSYNC
AGP_AD2/DVOB_D1
AGP_AD3/DVOB_D0
AGP_AD4/DVOB_D3
AGP_AD5/DVOB_D2
AGP_AD6/DVOB_D5
AGP_AD7/DVOB_D4
AGP_AD8/DVOB_D6
AGP_AD9/DVOB_D9
AGP_AD10/DVOB_D8
AGP_AD11/DVOB_D11
AGP_AD12/DVOB_D10
AGP_AD13/DVOBC_CLKINT#
AGP_AD14/DVOB_FLD/STL
AGP_AD15/M_DDC2_CLK
AGP_AD16/DVOC_VSYNC
AGP_AD17/DVOC_HSYNC
AGP_AD18/DVOC_BLANK#
AGP_AD19/DVOC_D0
AGP_AD20/DVOC_D1
AGP_AD21/DVOC_D2
AGP_AD22/DVOC_D3
AGP_AD23/DVOC_D4
AGP_AD24/DVOC_D7
AGP_AD25/DVOC_D6
AGP_AD26/DVOC_D9
AGP_AD27/DVOC_D8
AGP_AD28/DVOC_D11
AGP_AD29/DVOC_D10
AGP_AD30/DVOBC_INTR#/DPMS_CLK
AGP_AD31/DVOC_FLD/STL
133MHz
R232@2.2K
Display
Interface
(DVOB/DVOC & ZV port)
J29
J28
K26
K25
L26
J27
K29
K27
M29
M28
L24
M27
N29
M25
N26
N27
R25
R24
T29
T27
T26
U27
V27
V28
U26
V29
W29
V25
W26
W25
W27
Y29
2
2
0
High
Reserved
+1.5VS
AH7
LM_CMD
AF7
LM_SCK
AJ7
LM_SIO
3
AGP_ADSTB0/DVOB_CLK
AGP_ADSTB#0/DVOB_CLK#
AGP_ADSTB1/DVOC_CLK
AGP_ADSTB#1/DVOC_CLK#
AGP_SBSTB/ZV_D4
AGP_SBSTB#/ZV_D3
AGP_FRAME#/M_DDC1_DATA
AGP_IRDY#/M_I2C_CLK
AGP_TRDY#/M_DDC1_CLK
AGP_STOP#/M_DDC2_DATA
AGP_DEVSEL#/M_I2C_DATA
AGP_REQ#/ZV_CLK
AGP
AGP_GNT#/ZV_D15
Interface
AGP_PAR/DVO_DETECT
AC28
AGP_ST0/ZV_D14
AC29
AGP_ST1/ZV_D13
AB27
AGP_ST2/ZV_D12
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
L29
L28
U29
U28
AA27
AA28
R29
P26
P27
N25
R28
AC27
AD29
P28
AGP_ST0
AGP_ST1
AGP_ST2
AGP_ADSTB0
AGP_ADSTB#0
AGP_ADSTB1
AGP_ADSTB#1
AGP_SBSTB
AGP_SBSTB#
AGP_FRAME#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_DEVSEL#
AGP_REQ#
AGP_GNT#
AGP_PAR
AGP_AD[0..31]
15 AGP_ADSTB0
15 AGP_ADSTB#0
15 AGP_ADSTB1
15 AGP_ADSTB#1
15
AGP_SBSTB
15 AGP_SBSTB#
15 AGP_FRAME#
15
AGP_IRDY#
15 AGP_TRDY#
15 AGP_STOP#
15 AGP_DEVSEL#
15
AGP_REQ#
15
AGP_GNT#
15
AGP_PAR
15 AGP_AD[0..31]
AGP_CBE#0/DVOB_D7
AGP_CBE#1/DVOB_BLANK#
AGP_CBE#2/ZV_VSYNC
AGP_CBE#3/DVOC_D5
AB26
AGP_PIPE#/ZV_D10
AB29
AGP_WBF#/ZV_D9
AB25
AGP_RBF#/ZV_D11
15 AGP_CBE#[0..3]
*
Low
DVOA_D0
1
AGP_SBA0/ZV_D8
AGP_SBA1/ZV_D7
AGP_SBA2/ZV_D6
AGP_SBA3/ZV_D5
AGP_SBA4/ZV_D2
AGP_SBA5/ZV_D1
AGP_SBA6/ZV_D0
AGP_SBA7/ZV_HREF
VCCQ_AGP
VCCQ_AGP
AA29
AA24
AA25
Y24
Y27
Y26
W24
Y28
VCCP_HUB
VCCP_HUB
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
VCCP_IO
VCCP_IO
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
VDD_LM
U7C
AGP_SBA[0..7]
15 AGP_SBA[0..7]
2
V14
V15
V16
AE16
AE15
AD15
AD16
C413
68PF
2
1
1
+VTT
0
Strap Name
AGP_PAR
15
+1.5VS
1
2
4
1
R234 1
R239 1
2
C340
.1UF
B
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
+VS_RIMMREF
2 10K
2 10K
330
1
@8.2K
AGP_ST[0..2]
R279
1
R272
Title
C328
.1UF
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Size
Document Number
Custom
2
4
AGP_ST[0..2]
Rev
1A
401204
Date:
C
D
星星星, 星星星 26, 2001
Sheet
E
10
of
43
A
B
C
D
Layout note :
Layout note :
Distribute as close as possible
to GMCH Processor Quadrant .
Distribute as close as possible
to VCCPCMOS_LM .
E
+1.8VS
C365
.01UF
1
C334
.01UF
2
.1UF
1
C364
.1UF
2
2
1
1
C363
2
C419
.1UF
2
C407
.1UF
2
C387
.1UF
2
C344
.1UF
2
C343
.1UF
2
C358
.1UF
2
C357
.1UF
2
C350
.1UF
2
2
C327
.1UF
2
C302
22UF_16V_1206
+
C353
.1UF
2
1
1
1
1
1
1
1
1
1
1
1
1
1
+VTT
+VTT
1
1
1
Distribute as close as possible
to GMCH Local Memory Quadrant .
2
C462
.1UF
2
C459
.1UF
2
C460
.1UF
2
C438
.1UF
2
C435
.1UF
2
C427
.1UF
1
1
1
1
C474
.1UF
2
C466
.1UF
2
C454
.1UF
2
2
1
1
1
Layout note :
C437
.1UF
2
+
+
68UF_4V_B2
C319
1
1
1
C299
C320
+
68UF_4V_B2
+
C300
@68UF_4V_B2 @68UF_4V_B2
2
68UF_4V_B2
2
C298
.1UF
2
C355+
2
.1UF
1
1
1
C356
2
82PF
2
C361
2
.1UF
1
1
C360
2
2
2
1
.1UF
C301
2
1
C359
82PF 22UF_16V_1206
C345+
2
1
1
+1.8VS
+VTT
2
Layout note :
Distribute as close as possible
to GMCH AGP/DVO Quadrant .
1
1
2
C399
.1UF
C423
.1UF
2
1
C386
.1UF
2
C372
.1UF
2
C436
.1UF
2
2
C429
.1UF
1
1
1
1
C418
.1UF
2
C403
.1UF
2
C404
.1UF
2
2
C405
.1UF
1
1
1
1
C127
220UF_4V_D2
2
1
C457
C443
.1UF
82PF
2
2
C244
.1UF
2
C442
.1UF
82PF
1
1
1
C428
2
C406
.1UF
2
C366
.1UF
82PF
1
1
1
1
C415
2
2
C400
.1UF
2
C382
.1UF
82PF
2
1
C379
2
C335
.1UF
2
2
2
1
C83
.1UF
C336
.1UF
22UF_16V_1206
2
C78
.1UF
2
C31
.1UF
2
2
C88
.1UF
1
1
1
1
C74
.1UF
2
C28
.1UF
2
C81
.1UF
2
2
C473
.1UF
1
1
1
1
C463
.1UF
2
C410
.1UF
2
C80
220UF_4V_D2
2
+
1
1
C287
2
+
1
1
1
1
+VTT
+1.5VS
1
+
Layout note :
+VTT
1
C468
.1UF
+3V
3
1
1
C491
.1UF
C505
.1UF
2
2
C479
.1UF
2
C480
.1UF
82PF
2
1
1
C497
2
C495
.1UF
2
C498
.1UF
82PF
1
1
1
C496
2
2
C489
.1UF
2
C500
.1UF
82PF
1
1
1
C501
2
C502
.1UF
2
2
1
1
1
C503
.1UF
82PF
2
2
2
2
C481
C464
.1UF
2
C417
.1UF
2
2
C414
.1UF
C482
.1UF
1
1
1
1
C402
.1UF
2
C504
.1UF
2
C490
.1UF
2
2
C484
.1UF
1
1
1
1
C475
.1UF
C477
.1UF
2
+
C523
22UF_16V_1206
2
1
+VTT
1
1
1
2
C472
.1UF
2
C458
.1UF
2
C465
.1UF
1
1
1
C456
.1UF
2
C451
.1UF
2
C441
.1UF
1
1
1
C422
.1UF
2
2
2
2
C401
.1UF
2
C380
.1UF
1
1
C36
220UF_4V_D2
3
2
+
1
1
Distribute as close as possible
to GMCH System Memory Quadrant .
Layout note :
Distribute as close as possible
to IO Quadrant .
+3V
1
C499
.1UF
C511
.1UF
2
2
C524
22UF_16V_1206
2
+
1
C106
220UF_4V_D2
1
+
2
C62
220UF_4V_D2
2
+
1
1
+VTT
4
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
11
of
43
A
B
C
+3VS
D
E
+3V_CLK
L6
CHB2012U170
1
2
1
1
1
1
1
1
1
Check Bead Value
should be 19.6K
1
1
1
Width=40 mils
+
C123
.01UF
2
C156
.01UF
2
C155
.01UF
2
C124
.01UF
2
C122
.01UF
2
C121
.01UF
2
C152
.01UF
2
C133
.01UF
2
C130
.01UF
2
2
C115
22UF_16V_1206
1
2 10K
2
15
CLK_VCH
1
R154
PWR_DWN#
PCI_STOP#
CPU_STOP#
28
VTT_PWRGD#
29
30
SDATA
SCLK
33
35
3V66_0/DRCG
3V66_1/VCH_CLK
R137 1
2 220_1%
* 221_1%
42
IREF
2 22
* 33
39
48MHZ_USB
17
CLK_ICH48
R141 1
8
CLK_DREF
R149 1
2 22
* 33
38
CLK_ICH14
CLK_SIO14
R108 1
1
R109
2 33
2
33
56
2
2
@10PF @10PF
CPUCLKC1
48
CPUCLKT0
52
CLK_GCLK#
CPUCLKC0
51
24
66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2
23
22
21
R153 1
R150 1
R147 1
2 33
2 33
2 33
7
6
5
R119 1
R118 1
R115 1
2 33
2 33
2 @33
18
17
16
13
12
11
10
R143
R144
R140
R136
R125
R121
R122
2
2
2
2
2
2
2
PCICLK_F2
PCICLK_F1
PCICLK_F0
REF
GND_REF
GND_PCI
GND_PCI
GND_3V66
GND_3V66
GND_48MHZ
GND_IREF
GND_CPU
Place caps. near
CK Titan (U5)
CLK_GCLK
48MHZ_DOT
ICS950805
C148
CLK_BCLK#
49
R31
R30
2 61.9_1%
2 33
Place all these Block's
Components near CPU (U1)
CLK_HCLK# 5
2
2 33
61.9_1%
CLK_GHT 8
Place all these Block's
Components near GMCH (U6)
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
1
1
2
CLK_GHT# 8
CLK_GBOUT 8
1
1
1
1
1
1
1
2
1
CLK_AGPCONN 15
@33_0402 @10PF
CLK_GBIN 8
R155
C154
CLK_ICHHUB 17
CLK_ICHPCI 17
PCIF1
PCIF0
33
@33
33
@33
@33
33
33
CLK_PCI_CB 23
CLK_PCI_LAN 21
CLK_LPC_SIO 25
CLK_PCI_1394 22
CLK_PCI_SD/SM 29
CLK_LPC_EC 32
CLK_MINIPCI 28
C147
@10PF
4
9
15
20
31
36
41
47
1
1
C135
44
CPUCLKT1
66MHZ_IN/3V66_5
3
17
25
CPU_CLKC2
MULT0
2
4.7K
R151 1
2 33
R151: No stuff in AGP mode
Stuff in VCH mode
2 61.9_1%
2 33
R34
475_1%
4.7K
7,14,17 SMB_DATA
7,14,17 SMB_CLK
+3V
25
34
53
43
R328 1
1
R323
1
R32 1
R33
CLK_HCLK 5
R334
475_1%
C149
1
2
RB751V
2
2 33
61.9_1%
@10PF
3
C150
@10PF
2
2 10K
1
R324 1
R329
1
R562 1
R138 1
+3V
CLK_BCLK
2
2 0
R157 1
45
SEL2
SEL1
SEL0
2
2 @0
R116 1
1
D47
5,32 VTT_PWRGD#
27
CPUCLKT2
2 0
R529 1
+3VS
GND_CORE
1
2
2
R528 1
17,32 PM_SLP_S3#
17 PM_STPPCI#
17 PM_STPCPU#
2
XTAL_OUT
1
40
55
54
17,32 PM_SLP_S1#
R114
@0
C128
22UF_16V_1206
1
3
5PF
1
1
1
2
R112
@0
Place all these Block's
Components near CK_Titan(U5)
+
C120
.01UF
2
2
+3VS
2
2
2
2
1
C129
L5
CHB2012U170
1
2
26
Y1
14.318MHZ
SEL2
SEL1
SEL0
R145
@0
VDD_CORE
1
1
caps are internal
to CK_TITAN
R111
1K
H_BSEL1
H_BSEL0
XTAL_IN
2
R110
1K
2
2
R146
10K
1
1
1
+3VS
5PF
2
2
C118
1
VDD_REF
VDD_PCI
VDD_PCI
VDD_3V66
VDD_3V66
VDD_48MHZ
VDD_CPU
VDD_CPU
Place Crystal within 500 mils of CK_Titan
+3VS
1
U10
+3VS
5
5,10
1
8
14
19
32
37
46
50
1
Place caps. near
CK_Titan (U5)
Place near CPU
SEL0
0
1
0
1
CPUCLKC[0..2]
66.67
100.00
200.00
133.33
CPUCLKT[0..2]
66.67
100.00
200.00
133.33
1
R351
@51.1_1%
CLK_CPU_APIC 5
CLK_ICHAPIC 17
2
R35
137_1%
2
4
R352 348_1%
0_0603
2
SEL1
0
0
1
1
26.7_1%
2
1
SEL2
1
1
1
1
R36
1
1
PCIF1
PCIF0
Title
0 ohm resistor for ICH3 doesn't
need to support APIC function.
4
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
12
of
43
A
B
C
9,14 SM_DQ[0..63]
D
E
MD[0..63] 9,14
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3
1
MD0
MD1
MD2
MD3
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
MD32
MD33
MD34
MD35
Layout note :
1
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 0) pin .
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
MD48
MD49
MD50
MD51
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
MD20
MD21
MD22
MD23
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
MD52
MD53
MD54
MD55
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
MD24
MD25
MD26
MD27
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59
MD56
MD57
MD58
MD59
SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31
MD28
MD29
MD30
MD31
SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63
MD60
MD61
MD62
MD63
1000PF
1000PF
C216
C209
.1UF
1
C188
C189
.1UF
1
C190
C194
.1UF
C203
C202
.1UF
1000PF
1000PF
2
1000PF
1
C195
C196
.1UF
2
1000PF
2
C199
C170
.1UF
1
C119
22UF_16V_1206
2
MD16
MD17
MD18
MD19
1000PF
+3V
+
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
C169
C164
.1UF
1
MD44
MD45
MD46
MD47
1000PF
2
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
C184
C168
.1UF
1
MD12
MD13
MD14
MD15
1000PF
2
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
C167
C192
.1UF
1
MD40
MD41
MD42
MD43
2
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
1
MD8
MD9
MD10
MD11
2
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
+3V
1
MD36
MD37
MD38
MD39
2
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
1
MD4
MD5
MD6
MD7
2
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
2
2
Layout note :
One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 1) pin .
1000PF
C165
C160
.1UF
1
C217
C218
.1UF
C214
C187
.1UF
1000PF
1000PF
2
1000PF
1
C219
C220
.1UF
2
1000PF
1
C221
C215
.1UF
2
1000PF
1
C166
C222
.1UF
2
1000PF
1
C207
C206
.1UF
2
1000PF
1
1
C210
C205
.1UF
2
2
2
1000PF
2
C211
C212
.1UF
1
1
+3V
1
+3V
+
C126
22UF_16V_1206
3
2
3
9 SM_D_MA[0..12]
MAA[0..12] 14
RP22
4
SM_D_MA0
SM_D_MA1
SM_D_MA2
SM_D_MA3
1
2
3
4
8
7
6
5
MAA0
MAA1
MAA2
MAA3
SM_D_MA4
SM_D_MA5
SM_D_MA6
SM_D_MA7
1
2
3
4
8P4R_10
RP21
8
7
6
5
MAA4
MAA5
MAA6
MAA7
SM_D_MA8
SM_D_MA9
SM_D_MA10
SM_D_MA11
1
2
3
4
8P4R_10
RP20
8
7
6
5
MAA8
MAA9
MAA10
MAA11
4
8P4R_10
SM_D_MA12 1
R176
2
10
MAA12
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
13
of
43
A
B
C
+3V
SO-DIM 144 PINS
RAM MODULE CONN.
BANK 0/1
+3V
D
+3V
+
+
C142
10UF_10V_1206
BANK 2/3
+
C143
10UF_10V_1206
C132
10UF_10V_1206
+3V
+3V
+3V
JP26
MD0
MD1
MD2
MD3
1
13
MAA[0..12]
9
MD[0..63]
9
MAA[0..12]
MD4
MD5
MD6
MD7
MD[0..63]
SM_DQM[0..7]
SM_DQM[0..7]
SM_DQM0
SM_DQM4
MAA0
MAA1
MAA2
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
R174
C204
10PF
2
JP27
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
MD8
MD9
MD10
MD11
MD0
MD1
MD2
MD3
MD12
MD13
MD14
MD15
MD4
MD5
MD6
MD7
SM_DQM1
SM_DQM5
SM_DQM0
SM_DQM4
MAA3
MAA4
MAA5
MAA0
MAA1
MAA2
MD40
MD41
MD42
MD43
MD32
MD33
MD34
MD35
MD44
MD45
MD46
MD47
MD36
MD37
MD38
MD39
R162
C163
10PF
22
9
SM_RAS#
SM_WE#
SM_CS#0
SM_CS#1
SM_RAS#
SM_WE#
SM_CS#0
SM_CS#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MAA6
MAA8
MAA9
MAA10
SM_DQM2
SM_DQM6
3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CE0#
CE1#
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RESVD/DQ64
RESVD/DQ65
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
VSS
CE4#
CE5#
VCC
A3
A4
A5
VSS
DQ40
DQ41
DQ42
DQ43
VCC
DQ44
DQ45
DQ46
DQ47
VSS
RESVD/DQ68
RESVD/DQ69
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
RFU/CLK0
VCC
RFU
WE#
RE0#
RE1#
OE#/RESVD
VSS
RESVD/DQ66
RESVD/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/RESVD
CE3#/RESVD
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
RESVD/DQ70
RESVD/DQ71
VCC
DQ48
DQ49
DQ50
DQ51
VSS
DQ52
DQ53
DQ54
DQ55
VCC
A7
A11/BA0
VSS
A12/BA1
A13/A11
VCC
CE6#/RESVD
CE7#/RESVD
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
SCL
VCC
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
MD8
MD9
MD10
MD11
1
MD12
MD13
MD14
MD15
SM_DQM1
SM_DQM5
MAA3
MAA4
MAA5
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
2
22
SMD_CLK0
9
9
9
9
E
+3V
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
SDADIMM0
SM_CKE0
SM_CKE0 9
SM_CAS#
SM_CKE1
MAA12
9
SMD_CLK2
SM_CKE1 9
9
9
SM_CS#2
SM_CS#3
SM_RAS#
SM_WE#
SM_CS#2
SM_CS#3
SMD_CLK1 9
R175
22
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
C223
10PF
MAA7
SM_BA0
SM_BA1
MAA11
SM_BA0
9
SM_BA1
9
MAA6
MAA8
MAA9
MAA10
SM_DQM3
SM_DQM7
SM_DQM2
SM_DQM6
MD56
MD57
MD58
MD59
MD48
MD49
MD50
MD51
MD60
MD61
MD62
MD63
MD52
MD53
MD54
MD55
+3V
SCKDIMM0
SDADIMM1
C230 .1UF
SO-DIMM144-STANDRD
SM_CKE2
SM_CAS#
SM_CKE3
MAA12
SM_CKE2 9
SM_CAS# 9
SM_CKE3 9
SMD_CLK3 9
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
R170
22
C193
10PF
MAA7
SM_BA0
SM_BA1
MAA11
SM_DQM3
SM_DQM7
3
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
SCKDIMM1
SO-DIMM144 REVERSE
17
SM_SEL0
6
10
9
INH
A
B
7,12,17 SMB_CLK
3
X
7,12,17 SMB_DATA
13
Y
4
GND
GND
DIMM0
VCC
16
U18
X0
X1
X2
X3
1
5
2
4
SCKDIMM0
SCKDIMM1
Y0
Y1
Y2
Y3
12
14
15
11
SDADIMM0
SDADIMM1
4
SM_SEL0
X/Y
7
8
74HC4052
DIMM1
0
1
+3V
SCKDIMM0
SCKDIMM1
Compal Electronics, inc.
RP4
1
2
3
4
8
7
6
5
SCKDIMM1
SCKDIMM0
SDADIMM1
SDADIMM0
Title
PROPRIETARY NOTE
8P4R_10K
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C
D
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
E
14
of
43
5
4
3
2
32
KSI[0..7]
32
KSO[0..15]
1
KSI[0..7]
KS0[0..15]
Int. Keyboard CONN.
JP11
AGP CONN.
17,23,24,29 RTCCLK
+3V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
JP8
RP38
10
C
AGP_SBSTB
AGP_SBA4
AGP_SBA6
AGP_CLK
12 CLK_AGPCONN
AGP_AD31
AGP_AD29
AGP_AD27
AGP_AD25
10 AGP_ADSTB1
AGP_AD23
AGP_AD21
AGP_AD19
AGP_AD17
10
AGP_CBE#2
12
CLK_VCH
10
AGP_IRDY#
10 AGP_DEVSEL#
10
CLK_VCH
AGP_IRDY#
AGP_DEVSEL#
AGP_CBE#1
AGP_AD14
AGP_AD12
AGP_AD10
AGP_AD8
10 AGP_ADSTB0
STP_AGP#
AGP_AD7
AGP_AD5
AGP_AD3
AGP_AD1
B
+VAGP_BRDREF
CRMA
LUMA
COMPS
TV_SYNC
INVT_PWM
16
16
16
16
1
2
3
4
TVOUT_IO_DDC2CLK
TVOUT_IO_DDC2DATA
VCH_IO_I2CCLK
VCH_IO_I2CDATA
1
2
3
4
INVT_PWM 32
+5VALW
ENBKL
32
ENVEE
32
+1.5V
ENBKL
ENVEE
+2.5V
8
7
6
5
PID0
PID1
PID2
PID3
25
25
25
25
@8P4R_0 In AGP mode : stuff RP38, no stuff RP39.
In VCH mode: stuff RP39, no stuff RP38.
RP39
8
TV_OUT_DDC2CLK 10
7
TV_OUT_DDC2DATA 10
6
VCH_I2CCLK 10
5
VCH_I2CDATA 10
8P4R_0
+1.5VS
32
KSI0
KSI2
KSI4
KSI6
KSO0
KSO2
KSO4
KSO6
KSO8
KSO10
KSO12
KSO14
+3VS
+5VS
TP_DATA
D
+5V
TP_CLK
32
HEADER 2X20
PIRQA#
17,19,22,23
PCIRST# 8,17,19,20,21,22,23,24,25,28,29,34
AGP_GNT# 10
AGP_ST1 10
AGP_PIPE# 10
AGP_WBF# 10
PCI_RST#
KSI1
KSI3
KSI5
KSI7
KSO1
KSO3
KSO5
KSO7
KSO9
KSO11
KSO13
KSO15
AGP_SBA1
AGP_SBA3
AGP_SBSTB# 10
AGP_SBA5
AGP_SBA7
+
AGP_CBE#3 10
AGP_AD30
AGP_AD28
AGP_AD26
AGP_AD24
+3.3VAUX
+1.5V
C101
22UF_16V_1206
+3VS_MDC
C146
1UF_25V_0805
+5VS_MDC
1
AGP_SBA0
AGP_SBA2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
C145
1UF_25V_0805
C159
AGP_ADSTB#1 10
AGP_AD22
AGP_AD20
AGP_AD18
AGP_AD16
AGP_FRAME#
AGP_FRAME# 10
AGP_TRDY# 10
AGP_STOP# 10
AGP_PAR 10
JP13
AGP_AD15
AGP_AD13
AGP_AD11
AGP_AD9
30
MD_MIC
AGP_ADSTB#0 10
AGP_AD6
AGP_AD4
AGP_AD2
AGP_AD0
AGP_CBE#0 10
+3.3VAUX
+3VS
17,30 IAC_SDATAO
17,30 IAC_RST#
+VAGP_CRDREF
HEADER 2X60
L39
1
2 +3VS_MDC
CHB1608B121
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
MONO_OUT/PC_BEEP AUDIO_PWDN
MONO_PHONE
GND
RESERVED
AUXA_RIGHT
GND
AUXA_LEFT
+5V
CD_GND
RESERVED
CD_RIGHT
RESERVED
CD_LEFT
RESERVED
GND
RESERVED
3.3Vaux
RESERVED
GND
AC97_SYNC
3.3Vmain
AC97_SDATA_OUT AC97_SDATA_IN1
AC97_SDATA_IN0
AC97_RESET#
GND
GND
AC97_BITCLK
AC97_MSTRCLK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
MDC_DN# 33
MD_SPK 30
+5VS_MDC1
2
+5VS
L41 CHB1608B121
1
2
+3VS
R388 10K
1
R548
1
R383
IAC_SYNC 17,30
2
@22
2
22
AGP_AD[0..31]
AMP-108-5424
1
1
@33
2
IAC_BITCLK 17,30
R378 22
.1UF
2
SUS_STAT#
@15PF
R120
C125
2
1
2
U60
1
4
17
STP_AGP#
2
C3_STAT#
@15PF
3
@33
1
2
10K
C112
2
CLK_VCH 1
MDC CONN.
2
5
R104
AGP_CLK 1
+3V
C727
AGP_SBA[0..7]
10 AGP_SBA[0..7]
B
IAC_SDATAI1 17
1
R381
10 AGP_AD[0..31]
C
1UF_25V_0805
2
17,21,25,34 SUS_STAT#
10,17 AGP_BUSY#
10
AGP_REQ#
10
AGP_ST0
10
AGP_ST2
10
AGP_RBF#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
1
+1.5VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
2
DAC_BRIG
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
1
16
AGP_R
16
AGP_G
16
AGP_B
16 AGP_HSYNC1
16 AGP_VSYNC1
10,16 AGP_DDCDATA
10,16 AGP_DDCCLK
16
DDC_MD2
16,18
M_SEN#
+5VALW
32
DAC_BRIG
21,22,23,24,28,29 CBRST#
+1.5V
2
D
+12V
+3V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
@7SH08FU
2
R544 0
A
A
Compal Electronics, inc.
Title
PROPRIETARY NOTE
5
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3
2
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
1
15
of
43
A
B
C
D
E
TV_OUT CONN.
1
D9
@DAN217
1
D10
@DAN217
1
D11
@DAN217
1
L17
15
TV_SYNC
15
LUMA
15
CRMA
15
1
2
@FBM-11-160808-121
COMPS
2
@0
1
R560
2
@0
+3VS
3
2
3
2
3
2
R559 For CH7011 (VCH)
1
R559
1
+5VS
R560 For CH7007
JP2
L21
1
2
@FBM-11-160808-121
L20
1
2
@FBM-11-160808-121
L22
1
2
@FBM-11-160808-121
1
2
3
4
5
6
7
C270
1
C261
C262
1
1
1
C269
2
2
2
@47PF @47PF @470PF
@47PF
2
C292
@47PF
@47PF
2
2
2
C291
2
2
TV_GND
1
C293
@47PF
2
R219
@75
1
1
R218
@75
R220
@75
1
1
1
@S CONN._SUYIN
In AGP mode: No stuff C326,R245,C318,R231,C325,R230.
In VCH mode: Stuff C326,R245,C318,R231,C325,R230
2
1
C326
10
1
R245
DAC_RED#
1
C318
1
R231
10 DAC_GREEN#
1
C325
10
1
R230
DAC_BLUE#
2
0.1UF
2
*
*
2
37.5_1%
2
0.1UF
*
*
2
37.5_1%
2
0.1UF
*
*
2
37.5_1%
+5VS
R_CRT_VCC
F1
1
1
CRT_VCC
3
2
C254
1
15PF
15PF
C253
100PF
3
1
Q17
2N7002
100K
1
L2
1
2
CHB1608B121
2
R202
@0
2
+12VS
C3
68PF
*10PF
C2
220PF
1
R550
15 AGP_VSYNC1
2
FROM AGP CONN.
1
1
1
1
R15
@ 2.2K
R7
@2.2K
AGP_DDCDATA 10,15
5VDDCDA
1
2
CHB1608B121
Q18
2N7002
C4
68PF
*10PF
C250
100PF
1
Q1
2N7002
5VDDCCL
3
1
Q3
2N7002
C252
220PF
4
3
AGP_DDCCLK 10,15
Compal Electronics, inc.
2
1
1
3
2
@0
1
R549
R555
@2.2K
100K
2
L1
15 AGP_HSYNC1
R554
2.2K
2
C255
2
15PF
+5VS
R16
R553
2.2K
2
C256
2
2
18PF
75
1
2
1
75
+5VS
2
C266
18PF
18PF
+3VS
2
R201
CRT_VCC
+12VS
2
C265 R200
L12
1
2
FCM2012C80_0805
In AGP mode: Stuff R16,R15,R7. No stuff R553,R554,R555.
In VCH mode: Stuff R553,R554,R555. No stuff R16,R15,R7
2
1
C264
1
2 10_5%
2 @0
CRT_VCC
CRT_VCC
2
1
1
2
R10
R9
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
1
3
2
3
2
3
JP3
CRT-15P
1
2
FCM2012C80_0805
L11
1
2
FCM2012C80_0805
1
2 10_5%
2 @0
1
1
1
1
R12
R11
R199
75
4
C5
.1UF
DAN217
L10
2
DAC_BLUE
AGP_B
2 10_5%
2 @0
2
10
15
1
1
1
DAC_GREEN
AGP_G
R14
R13
2
10
15
DAN217
1
DAC_RED
AGP_R
2
10
15
DAN217
FUSE_1A
M_SEN#
1
15,18
2
DDC_MD2
2
15
RB491D
2
In AGP mode: No stuff R6,R8,R10,R12,R14. Stuff R9,R11,R13,R549,R550
In VCH mode: Stuff R6,R8,R10,R12,R14. No stuff R9,R11,R13,R549,R550
2
10K
1
2
2
D5
1
D6
1
1
D7
1
D8
R86
2
+5VS +5VS
1
CRT Connector
3
Title
10 DAC_HSYNC
FROM GMCH
10
A
DAC_VSYNC
1
R6
1
R8
SCHEMATIC, M/B LA-1311
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
0
2
0
Rev
1A
401204
B
C
D
Sheet
E
16
of
43
A
B
C
D
RP15
2
CLK_ICHAPIC
H_PICD0
H_PICD1
PIRQA#
PIRQB#
PIRQC#
PIRQD#
ICH_PID0
ICH_PID1
ICH_PID2
ICH_PID3
1
J19
J20
J21
B1
C1
B2
A2
A6
B5
C5
A5
AB14
W19
H22
1
V2
W2
Y4
Y2
W3
W4
Y3
GPIO_7
GPIO_8
GPIO_12
GPIO_13
GPIO_25
GPIO_27
GPIO_28
V1
U3
T3
U2
T2
U4
U1
IDE_PATADET
ECSMI#
ECSCI#
LID#
GPIO_25
2 47
2 47
1
.047UF
2
1
2
1
1
C416
1UF_10V_0603
R521
22M
HUB_VSWING
HUB_VREF
HUB_RCOMP
HUB_PSTRB#
HUB_PSTRB
HUB_PAR
HUB_CLK
R338
1K
R295 10M
R294
X2
10M
32.768KHZ
1
HUB_PD[0..10] 8
CLK_ICHHUB
+VS_HUBVSWING
CLK_ICHHUB
HUB_ICH_RCOMP
CLK_ICHHUB 12
HUB_PSTRB 8
HUB_PSTRB# 8
C543
5PF
2
36.5_1%
C444
100K
R59
1
+3V
2
R67
PM_RSMRST# 1
2
1
C44
2
.1UF
Title
10K
2
Close to ICH3-M.
C
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Size
Document Number
Custom
Rev
1A
401204
Date:
B
4
C529
.01UF
PM_LANPWROK
R278
1K
12PF
2
12PF
R344
10
1
R346
C530
.01UF
2
C461
1
2.4M
R339
1K
+VS_HUBREF
L19
L20
K19
P23
N22
R19
T19
D10
EEP_SHCLK
E8
EEP_DOUT
D8
EEP_DIN
E9
EEP_CS
LAN_RSTSYNC
LAN_JCLK
LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_RXD2
LAN_RXD1
LAN_RXD0
H_PICD0
H_PICD1
HUB_PD[0..10]
R77
@0
J1
JOPEN
R522
A
3
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
2
RTC_X1
RTC_X2
2
H_DPSLP# 5,42
1
+RTCVCC
2
R332 0
H_SMI#
5
H_STPCLK# 5
1
RTC_VBIAS
R327 (for use if CPU unable
@10K to support DPSLP#)
1
H_FERR# 5
H_IGNNE# 5
H_INIT#
5
H_INTR
5
H_NMI
5
H_PWRGD 5
RC#
32
2
C426
2
R286 15K
1
HubLink
Interface
GATEA20 32
H_A20M# 5
2
1
2
R287 1K
2
1
1
4
2
+RTCVCC
CLK_ICH14
CLK_ICH48
CLK_ICH14
CLK_ICH48
EEPROM
Interface
Y22
V23
AB22
J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23
1
12
12
LAN
Interface
D7
C9
A10
C10
B9
A9
A8
C8
A1
A13
A16
A17
A20
A23
B8
B10
B13
B14
B15
B18
B19
B20
B22
C3
C6
F19
C14
C15
C16
C17
C18
C19
C20
C21
C22
D9
D13
D16
D17
D20
D21
D22
E5
ICH3-M
CLK_14
CLK_48
CLK_RTEST#
CLK_RTCX1
CLK_RTCX2
CLK_VBIAS
Clocks
J23
F20
RTC_RST# Y7
RTC_X1
AC7
RTC_X2
AC6
RTC_VBIASAB7
VSS
SM_INTRUDER# 19
SMLINK0 19
SMLINK1 19
SMB_CLK 7,12,14
SMB_DATA 7,12,14
SMB_ALERT# 19
2
2
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
Y6
AC3
AB2
AC4
AB5
AC5
L22
M21
M23
N20
P21
R22
R20
T23
M19
P19
N19
C42
@15PF
PCI_IRDY# 19,21,22,23,28,29
PCI_PAR 19,21,22,23,28,29
PCI_PERR# 19,21,22,23,28
PCI_LOCK# 19
ICH_WAKE_UP# 32
PCIRST# 8,15,19,20,21,22,23,24,25,28,29,34
PCI_SERR# 19,21,22,23,28
PCI_STOP# 19,21,22,23,28,29
PCI_TRDY# 19,21,22,23,28,29
+1.5VS
1
D3
F4
A3
R4
E4
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
2
@15PF
GNTA#
@10
12
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
C534
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
R66
CLK_ICHPCI 12
PCI_DEVSEL# 19,21,22,23,28,29
PCI_FRAME# 19,21,22,23,28,29
PCI_REQA# 19
PCI_REQB# 19
2
19,22
19,28
19,23
19,21
19,28
CPU_A20GATE
CPU_A20M#
CPU_DPSLP#
CPU_FERR#
CPU_IGNNE#
CPU_INIT#
CPU
CPU_INTR
Interface
CPU_NMI
CPU_PWRGOOD
CPU_RCIN#
CPU_SLP#
CPU_SMI#
STPCLK#
CLK_ICHPCI
1
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
1
12
@10
ICH3-M (1/2)
T5
M3
F1
C4
D4
B6
B3
N3
G5
M2
M1
W1
Y1
L5
H2
H1
2
R340
SMB_ALERT#/GPIO11
1 2
3
Interrupt
Interface
SM_INTRUDER#
SMLINK0
1
CLK_ICH48
21,22,23,28,29
21,22,23,28,29
21,22,23,28,29
21,22,23,28,29
PCI_CLK
PCI_DEVSEL#
PCI_FRAME#
PCI_GPIO0/REQA#
PCI_GPIO1/REQB#/REQ5#
PCI_GPIO16/GNTA#
PCI_GPIO17/GNTB#/GNT5#
PCI_IRDY#
PCI_PAR
PCI_PERR#
PCI_LOCK#
PCI
PCI_PME#
Interface
PCI_RST#
PCI_SERR#
STOP#
PCI_TRDY#
2
A4
E3
D2
D5
B4
1
12
2
@15PF
CLK_ICHPCI
1
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
C541
unMUX
GPIO
C540
@10PF
15,19,22,23
19,21,23
19,28,29
19,28,29
2
19,22
19,28
19,23
19,21
19,28
@10
LPC
Interface
PIRQA#
PIRQB#
PIRQC#
PIRQD#
1
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
R337
AC'97
Interface
1
R342
@33_0402
PIRQA#
PIRQB#
PIRQC#
PIRQD#
System
SMLINK1
Managment SMB_CLK
Interface SMB_DATA
PCI
Interface
8P4R_4.7K
R65
@10K
GNTA#
1
2
+3VS
GPIO_25 1
2
+3V
R54
10K
Place closely to ICH3-M
CLK_ICHAPIC
2
K2
K5
N1
R2
CLK_ICH14
Geyserville
ICH_PID0
ICH_PID1
ICH_PID2
ICH_PID3
8
7
6
5
INT_IRQ14 19,20
INT_IRQ15 19,20
INT_SERIRQ 19,23,25,32
INT_APICCLK
INT_APICD0
INT_APICD1
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
INT_PIRQG#/GPIO4
INT_PIRQH#/GPIO5
INT_IRQ14
INT_IRQ15
INT_SERIRQ
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
Place closely to ICH3-M
Power Management
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
2
IAC_SDATAO
IAC_SYNC
10PF
J2
K1
J4
K3
H5
K4
H3
L1
L2
G2
L4
H4
M4
J3
M5
J1
F5
N2
G4
P2
G1
P1
F2
P3
F3
R1
E2
N4
D1
P4
E1
P5
1
2
3
4
+3VS
SM_SEL0 14
SIDEPWR 20
CLK_ICHAPIC 12
H_PICD0 5
H_PICD1 5
AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAOUT
AC_SYNC
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PM_AGPBUSY#/GPIO6
PM_AUXPWROK
PM_BATLOW#
PM_C3_STAT#/GPIO21
PM_CLKRUN#/GPIO24
PM_DPRSLPVR
PM_PWRBTN#
PM_PWROK
PM_RI#
PM_RSMRST#
PM_SLP_S1#/GPIO19
PM_SLP_S3#
PM_SLP_S5#
PM_STPCPU#/GPIO20
PM_STPPCI#/GPIO18
PM_SUS_CLK
PM_SUS_STAT#
PM_THRM#
21,22,23,28,29 PCI_AD[0..31]
U20
Y20
V19
V4
Y5
AB3
V5
AC2
AB21
AB1
AA6
AA1
AA7
W20
AA5
AA2
V21
U21
AA4
AB4
U5
10,15 AGP_BUSY#
U33A
IAC_BITCLK2
B7
IAC_RST#
D11
IAC_SDATAI0
B11
IAC_SDATAI1
C11
C7 R70
1
R69
A7
1
R72
PM_LANPWROK
LPC_AD0 25,32
LPC_AD1 25,32
LPC_AD2 25,32
LPC_AD3 25,32
LPC_DRQ#0 19,32
LPC_DRQ#1 19,25
LPC_FRAME# 25,32
C60
22
1
PM_RSMRST#
1
2
0
R37
PM_GMUXSEL/GPIO23
PM_CPUPREF#/GPIO22
PM_VGATE/VRMPWRGD
IAC_BITCLK
IAC_RST#
IAC_SDATAI0
IAC_SDATAI1
IAC_SDATAO
IAC_SYNC
15,30 IAC_BITCLK
15,30 IAC_RST#
30 IAC_SDATAI0
15 IAC_SDATAI1
15,30 IAC_SDATAO
15,30 IAC_SYNC
PM_SUSCLK
15,23,24,29 RTCCLK
1
35
ICH_VGATE
5,19 PM_CPUPERF#
7,42 PM_GMUXSEL
32
ATF_INT#
15,21,25,34 SUS_STAT#
12 PM_STPPCI#
12 PM_STPCPU#
32 PM_SLP_S5#
12,32 PM_SLP_S3#
12,32 PM_SLP_S1#
35 PM_RSMRST#
19
ICH_RI#
35 SYS_PWROK
19
PBTN#
7,42 PM_DPRSLPVR
19,22,23,25,28,29,32 PM_CLKRUN#
15
C3_STAT#
32 PM_BATLOW#
ECSMI#
ECSCI#
LID#
IDE_PATADET
R60 0
2
1 PM_SUSCLK
19
ECSMI#
19
ECSCI#
19
LID#
20 IDE_PATADET
星星星, 星星星 26, 2001
Sheet
D
17
of
43
A
B
C
D
E
USB_D_PP1
USB_D_PN1
USB_D_PP0
USB_D_PN0
USB_PP1
USB_PN1
USB_PP0
USB_PN0
+5VS
+3VS
+3V
1
27
27
27
27
@5PF
2
2
C508
1
1
CLOSE TO ICH3-M(< 1 inch)
R73
1K
D26
1SS355
R305
0
2
2
1
1
2
+V5S_ICHREF
1
1
2
27
27
USB_OC#0
USB_OC#1
27
USB_OC#3
2
1
1
+1.8VS
2
+3VS
USB_LEDA#0/GPIO32
USB_LEDA#1/GPIO33
USB_LEDA#2/GPIO34
USB_LEDA#3/GPIO35
USB_LEDA#4/GPIO36
USB_LEDA#5/GPIO37
USB_LEDG#0/GPIO38
USB_LEDG#1/GPIO39
USB_LEDG#2/GPIO40
USB_LEDG#3/GPIO41
USB_LEDG#4/GPIO42
USB_LEDG#5/GPIO43
B21
USB_RBIAS
H23
SPKR
U19
VCCA
F17
F18
K14
VCCPSUS3/VCCPUSB0
VCCPSUS4/VCCPUSB1
VCCPSUS5/VCCPUSB2
E10
V8
V9
VCCPSUS0
VCCPSUS1
VCCPSUS2
R98
1
19
19
33
15,16
FWH_WP#
FWH_TBL#
EC_FLASH#
@0
2
ICH_ACIN
M_SEN#
31
ICH_SPKR
ICH_SPKR
2
+1.8VS
1
+3V
Disable Timeout Feature
+3VS
R309
0_0805
+V3A_ICH
2 ICH_SPKR
1
2
4
+3VS
E11
K6
K18
P6
P18
V10
V14
J18
M14
R18
T18
VCCPHL0
VCCPHL1
VCCPHL2
VCCPHL3
P12
V15
V16
V17
V18
G18
H18
VCCP0
VCCP1
F6
G6
H6
J6
M10
R6
T6
U6
A21
A22
B23
C23
P14
U18
V22
F9
F10
C13
W5
E6
W8
E7
T21
D6
T1
C2
N/C0
N/C1
N/C2
N/C3
N/C4
VSS102
VSS103
AA14
AC14
AA15
AC20
AA19
AB20
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
W12
AB11
AA10
AC10
W11
Y9
AB9
AA9
AC9
Y10
W9
Y11
AB10
AC11
AA11
AC12
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
ICH3-M (2/2)
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
Y17
W17
AC17
AB16
W16
Y14
AA13
W15
W13
Y16
Y15
AC16
AB17
AA17
Y18
AC18
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_PDDACK#
IDE_SDDACK#
IDE_PDDREQ
IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#
IDE_PIORDY
IDE_SIORDY
Y13
Y19
AB12
AB18
AC13
AC19
Y12
AA18
AB13
AB19
IDE
Interface
Misc
Power
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
20
20
20
20
2
IDE_PDA0 20
IDE_PDA1 20
IDE_PDA2 20
IDE_SDA0 20
IDE_SDA1 20
IDE_SDA2 20
IDE_PDD[0..15] 20
IDE_SDD[0..15] 20
3
IDE_PDDACK# 20
IDE_SDDACK# 20
IDE_PDDREQ 20
IDE_SDDREQ 20
IDE_PDIOR# 20
IDE_SDIOR# 20
IDE_PDIOW# 20
IDE_SDIOW# 20
IDE_PIORDY 20
IDE_SIORDY 20
4
1
ICH3-M
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2
USB
Interface
VSS
R343
@1K
AC15
AB15
AC21
AC22
E14
VSS35
E15
VSS36
E18
VSS37
E19
VSS38
E20
VSS39
F22
VSS40
G3
VSS41
G20
VSS42
H19
VSS43
AA22
VSS44
J5
VSS45
K11
VSS46
K13
VSS47
K20
VSS48
K21
VSS49
K22
VSS50
K23
VSS51
L3
VSS52
L10
VSS53
L11
VSS54
L12
VSS55
L13
VSS56
L14
VSS57
L21
VSS58
L23
VSS59
M11
VSS60
M12
VSS61
M13
VSS62
M20
VSS63
M22
VSS64
N5
VSS65
N10
VSS66
N11
VSS67
N12
VSS68
N13
VSS69
N14
VSS70
N21
VSS71
N23
VSS72
P11
VSS73
P13
VSS74
P20
VSS75
P22
VSS76
R3
VSS77
R5
VSS78
R21
VSS79
R23
VSS80
T4
VSS81
T20
VSS82
T22
VSS83
V3
VSS84
AC23
VSS85
V20
VSS86
W6
VSS87
W7
VSS88
W10
VSS89
W14
VSS90
W18
VSS91
W22
VSS92
Y8
VSS93
AA3
VSS94
AA8
VSS95
AA12
VSS96
AA16
VSS97
AA20
VSS98
AB8
VSS99
AC1
VSS100
AC8
VSS101
R314
18.2_1%
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
Power
1
USB_RBIAS
VCCCORE0
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
H20
G22
F21
G19
E22
E21
H21
G23
F23
G21
D23
E23
20 ICH_IDE_PRST#
20 ICH_IDE_SRST#
VCCPIDE0
VCCPIDE1
VCCPIDE2
VCCPIDE3
VCCPIDE4
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
VCCPPCI0
VCCPPCI1
VCCPPCI2
VCCPPCI3
VCCPPCI4
VCCPPCI5
VCCPPCI6
VCCPPCI7
E12
D12
C12
B12
A12
A11
VCCUSBBG/VCC_SUS8
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
VCCPCPU0
VCCPCPU1
VCCPCPU2
USB_PP0
USB_PP1
USB_PP2
USB_PP3
USB_PP4
USB_PP5
USB_PN#0
USB_PN#1
USB_PN#2
USB_PN#3
USB_PN#4
USB_PN#5
VCCUSBPLL/VCC_SUS9
USB_OC#4
USB_OC#5
3
R341
0_0805
+1.8VA_ICH
2
USB_OC#2
8
7
6
5
D19
A19
E17
B17
D15
A15
D18
A18
E16
B16
D14
A14
VCCPAUX0/VCCLAN3_3
VCCPAUX1/VCCLAN3_3
2
USB_D_PP0
USB_D_PP1
USB_D_PP2
USB_D_PP3
USB_D_PP4
USB_PP5
USB_D_PN0
USB_D_PN1
USB_D_PN2
USB_D_PN3
USB_D_PN4
USB_PN5
VCC5REFSUS1
VCC5REFSUS2
RP19
8P4R_10K
AB6
U33B
VCC_RTC
USB_D_PP4
USB_D_PN4
1
2
3
4
+1.5VS
R298
0_0805
VCC5REF1
VCC5REF2
@5PF
2
+RTCVCC
F7
F8
K10
C86
2
+1.8V
+3V
CHB2012U170
VCC_SUS0
VCC_SUS1
VCC_SUS2
VCC_SUS3
VCC_SUS4
VCC_SUS5
@5PF
USB_PP4
USB_PN4
+3V
2
0_0805
C197
1
R320
L33
1
VCC5REFSUS
+V1.8_ICHLAN
1
1
1
1
+1.8V
VCC_AUX0/VCCLAN1_8
VCC_AUX1/VCCLAN1_8
VCC_AUX2/VCCLAN1_8
USB_PP3
USB_PN3
USB_PP2
USB_PN2
C455
1UF_10V_0603
E13
F14
K12
P10
V6
V7
27
27
27
27
USB_D_PP3
USB_D_PN3
USB_D_PP2
USB_D_PN2
C492
.1UF
2
C58
.1UF
2
1
VCC5REF
F15
F16
@5PF
2
VCC_USB0/VCC_SUS6
VCC_USB1/VCC_SUS7
@5PF
C91
1
C509
R326
100K
2
Title
1
D32
32,34,37,40 ACIN
A
2
RB751V
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
ICH_ACIN
Rev
1A
401204
B
C
D
Sheet
E
18
of
43
A
B
+3VS
C
D
E
+3VS
RP13
1
2
3
4
5
17,21,22,23,28,29 PCI_FRAME#
17,21,22,23,28,29 PCI_IRDY#
17,21,22,23,28,29 PCI_TRDY#
17,21,22,23,28,29 PCI_STOP#
10
9
8
7
6
PCI_SERR# 17,21,22,23,28
PCI_DEVSEL# 17,21,22,23,28,29
PCI_PERR# 17,21,22,23,28
PCI_LOCK# 17
10P8R_8.2K
1
1
+3VS
+3VS
+3VS
RP18
17
17
17,22
17,28
RP24
1
2
3
4
5
PCI_REQA#
PCI_REQB#
PCI_REQ#0
PCI_REQ#1
10
9
8
7
6
1
2
3
4
18
FWH_WP#
PCI_REQ#2 17,23
18
FWH_TBL#
PCI_REQ#3 17,21
17,22,23,25,28,29,32 PM_CLKRUN#
PCI_REQ#4 17,28
INT_SERIRQ 17,23,25,32
8
7
6
5
R71
17,21,22,23,28,29 PCI_PAR
1
@100
2
8P4R_10K
10P8R_8.2K
+3V
+3VS
+3VS
RP14
INT_IRQ15 17,20
PIRQA#
15,17,22,23
PIRQB#
17,21,23
PIRQC# 17,28,29
10K
2
+1.5VS
+V5S_ICHREF
+3VS
2
100K
1
+VTT
17
+3V
32 EC_LID_OUT#
1
1
1
2
2
2
2
1
C161
.1UF
2
47PF
C73
.1UF
2
C162
1
1
C103
.1UF
2
2
2
1
C100
.1UF
47PF
2
C89
1
1
1
C87
.1UF
2
2
C94
.1UF
2
C93
.1UF
47PF
2
1
1
1
1
2
2
2
2
1
1
1
1
2
2
C77
.1UF
2
2
2
C54
.1UF
ICH_RI#
17
ECSMI#
17
ECSCI#
17
LID#
17
1
1
+
C96
.1UF
C76
47PF
C98
.1UF
C99
.1UF
2
C95
.1UF
2
C52
47PF
2
C85
.1UF
2
C317
150UF_6.3V_D2
2
ICH_RI#
+1.8VA_ICH
ECSMI#
LID#
4
1
1
+
C531
.1UF
C532
.1UF
2
C527
22UF_16V_1206
2
ECSCI#
1
1
+3V
C65
.1UF
+1.8VS
2
EC_SCI#
C57
.1UF
47PF
C63
1
2
10K
2
RB751V
32
+3V
C56
.1UF
2
1
R40
1
D18
EC_SMI#
C55
.1UF
C69
1
2
10K
2
RB751V
2
10K
2
RB751V
32
C50
.1UF
47PF
47PF
2
1
R47
1
D16
1
R42
1
D17
EC_RIOUT#
C46
C487
1
2
10K
2
RB751V
+3V
32
C47
.1UF
3
PBTN#
2
2
@RB751V
1
R38
1
D13
2
C533
.1UF
2
1
D15
C488
.1UF
1
ON/OFF
PBTN#
C485
.1UF
1
2
RB751V
C486
.1UF
2
2
1
D14
C110
.1UF
1
32,34
PBTN_OUT#
C102
.1UF
+V1.8_ICHLAN
C341
22UF_16V_1206
32
1
1
C51
.1UF
+
3
C84
1UF_10V_0603
+3V
R300 @10K
1
2
5,17 PM_CPUPERF#
C385
22UF_16V_1206
1
1
R282
+
C362
22UF_16V_1206
2
+
+RTCVCC
17 SM_INTRUDER#
10K
2
C64
.1UF
+3VS
1
SMLINK1
+
C49
.1UF
+3V
2
@8.2K
2
4.7K
2
4.7K
2
SMLINK0
17
1
1
17
+
2
8.2K
1
1
R39
1
R515
1
R516
8,15,17,20,21,22,23,24,25,28,29,34 PCIRST#
10K
2
1
R58
R56
2
1
17,28 PCI_GNT#4
1
C75
1UF_10V_0603
17,25 LPC_DRQ#1
1
2
17,32 LPC_DRQ#0
2
17,21 PCI_GNT#3
R45
1
17,22 PCI_GNT#0
2
8.2K
2
8.2K
1
1
+3VS
1
R57
1
R63
2
10P8R_8.2K
R289 1
17 SMB_ALERT#
2
10
9
8
7
6
1
1
2
3
4
5
17,28 PCI_GNT#1
17,23 PCI_GNT#2
17,28,29 PIRQD#
17,20 INT_IRQ14
+V3A_ICH
C92
C82
C61
C66
C104
C68
.1UF
.1UF
.1UF
.1UF
.01UF
.01UF
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
Rev
1A
401204
A
B
C
D
Sheet
E
19
of
43
IDE,CD-ROM Module CONN.
2
Q9
SI3456DV
ATA33 : populate R43, de-populate R46.
ATA66/100 : populate R46, de-populate R43.
6
5
2
1
R43
IDE_PDD[0..15]
18 IDE_PDD[0..15]
+5VS
HDD Manual ATA Type Selection:
1
.1UF
2
2
1000PF
+5VS
C107
+5VMOD
4
Place component's closely IDE CONN.
1
C114
C518
10UF_16V_1206
1UF_25V_0805
C109
1
1
1
1
+5VS
R161
+
@10K
3
2
100K
1
R167
2 SHDD_LED#
100K
1
R84
1
R556
2
@0
G1
Q41A
SI1906DL
+5VS
10K
+3VS
5.6K
2 IDE_PDDREQ
R152 5.6K
1
2 IDE_SDDREQ
2 IDE_SDD7
IDE_SIORDY
SHDD_LED#
EXTCSEL
RDATA#
WP#
TRACK0#
WDATA#
STEP#
MTR0#
DSKCHG#
DRV0#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
CD_AGND
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_SDDREQ
EXTID0
EXTID1
EXTID2
HDSEL#
WGATE#
FDDIR#
3MODE#
INT_CD_R 30
+5VMOD
2 IDE_PIORDY
R428 1K
1
+5VS
WGATE#
25
FDDIR#
3MODE#
25
25
1
.1UF
8P4R_1K
U12
1
4
PIDE_RST#
2
18 ICH_IDE_PRST#
7SH08FU
+5VS
INDEX#
INDEX#
+5VMOD
25
C139
1
2
.1UF
8 EXTID0
7 EXTID1
6 EXTID2
5
U13
PCIRST# 1
4
18 ICH_IDE_SRST#
8P4R_100K
SIDE_RST#
2
3
1
2
3
4
2
PCIRST#
8,15,17,19,21,22,23,24,25,28,29,34 PCIRST#
RP3
DSKCHG#
INDEX#
WP#
TRACK0#
2 IDE_SIORDY
C140
IDE_SDDREQ 18
IDE_SDIOR# 18
IDE_SDDACK# 18
IDE_SDA2 18
IDE_SDCS3# 18
EXTID0
33
EXTID1
33
EXTID2
33
HDSEL# 25
+3VALW
RP2
1K
5
+5VS
R88
1
5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
HEADER 2X30
7SH08FU
2 DRV0#
1K
10P8R_1K
C186
1000PF
C183
10UF_16V_1206
1
C182
1UF_25V_0805
2
STEP#
MTR0#
RDATA#
+5VS
C185
.1UF
2
1
5
4
3
2
1
2
6
7
8
9
10
1
W=80mils
+5VMOD
RP1
+5VS
R82
1
2 IDE_PDD7
HDD 44P SUYIN 20225A-44G5-A
CD_AGND
SIDE_RST#
IDE_SDD7
IDE_SDD6
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2
IDE_SDD1
IDE_SDD0
25
RDATA#
25
WP#
25
TRACK0#
25
WDATA#
25
STEP#
25
MTR0#
25
DSKCHG#
25,33
DRV0#
WDATA#
WGATE#
HDSEL#
FDDIR#
S2 4
SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
Id(MAX): 5.1A
VGS,+-20V
IDE_PDA2 18
IDE_PDCS3# 18
3
INT_CD_L
CD_AGND
18 IDE_SDIOW#
18 IDE_SIORDY
17,19 INT_IRQ15
18
IDE_SDA1
18
IDE_SDA0
18 IDE_SDCS1#
33 SHDD_LED#
1
R253
2
47K
2
2
470
JP17
1
2
3
4
Q41B
SI1906DL
C176
0.01UF
3
SIDEPWR
R429 10K
1
8
7
6
5
1
1K
6
17
PCSEL
5 EXTIDE_EN#
G2
CDD[0..15]
18 IDE_SDD[0..15]
30
30
47K
2
R412
Q39
DTC144EKA
1
1
2
10K
R75
1
+5VMOD
1
100K
33 EXTIDEPWR#
3 D2 2
R165
2
R46
S1
+5VS
1
R95
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
1
IDE_PIORDY
INT_IRQ14
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
C174
4.7UF_16V_1206
D1
+5VS
IDE_PATADET 17
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
IDE_PDDREQ
18 IDE_PDDREQ
18 IDE_PDIOW#
18 IDE_PDIOR#
18 IDE_PIORDY
18 IDE_PDDACK#
17,19 INT_IRQ14
18
IDE_PDA1
18
IDE_PDA0
18
IDE_PDCS1#
33
PHDD_LED#
2
2
+12VALW
JP7
PIDE_RST#
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
1K
{1st Part Field}
Compal Electronics, inc.
Place component's closely CD-ROM CONN.
Title
1
R166
2 EXTCSEL
470
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
20
of
43
5
4
3
2
1
+3V
1
LAN_IDSEL
2
R271
@ 100K
AVDD-1
1
L28
2
@ 4.7UH
AVDD-2
1
L27
2
@ 4.7UH
AVDD-3
1
L25
2
@ 4.7UH
C288
D
C306
@ 4.7UF_10V_1206
C304
2
@ 0.1UF
1
1
2
@ 0.1UF
2
@ 0.1UF
LAN_TDLAN_TD+
@ 2N7002
1
C295
*BOM 16.9K_1%
Q24
2
EN_LAN#
1
LAN_RDLAN_RD+
3
33
D
LAN_PME#
1
32
LAN_X1
@ 1.69K_1%
R217
Y2
@ 25 MHz
LAN_X2
LAN_X2
C370
@ 0.1UF
2
@ 100
1
1
2
2
1
PCI_C/BE#0 17,22,23,28,29
1
C29
@ 0.1UF
@ RTL8100-L
R187
@ 510_0603
2
ACTIVITY#
2
Amber LED-
PR4+
PR2-
5
PR3-
4
PR3+
RJ45_RX+
3
PR2+
RJ45_TX-
2
PR1-
RJ45_TX+
1
PR1+
1
1
1
2
2
@ 0.1UF
1
SHLD4
16
SHLD3
15
B
10
Green LED-
9
Green LED+
SHLD2
14
SHLD1
13
1
1
R184
@ 75
R185
@ 75
2
C248
@1000P_2KV_1206
LAN_GND
LANGND
1
C249
@0.1UF
C257
@4.7UF_10V_0805
1
1
2
+3V
R17
@ 75
1
2
C18
@ 0.1UF
2
C19
@ 0.1UF
A
Termination plane should be copled to chassis ground
R18
@ 75
2
1
+3V
LAN_GND
Compal Electronics, inc.
2
2
2
R24
@ 50
2
C11
1
RJ45_TX+
RJ45_TX-
1
1
2
1
2
1
2
Q21
@ DTA114YKA
@ Pulse H0013
R25
@ 50
C12
@0.1UF
C349
3
1
LAN_TD+
LAN_TD-
@ 0.1UF
Title
PROPRIETARY NOTE
5
4
C
AMP RJ45/RJ11 with LED
2
2
1
12
2
1
@ 50
2
R21
@ 50
LINK10_100#
RJ45_RX+
RJ45_RX-
16
15
14
13
12
11
10
9
B
U23
2
@ 510_0603
E
A
1
Layout Note
H0013 pls close to
conn.
R22
C329
@ 1000PF
PR4-
6
R186
RX+
RXCT
NC
NC
CT
TX+
TX-
1
11
3
Q20
@ DTA114YKA
@0.1UF
RD+
RDCT
NC
NC
CT
TD+
TD-
@ 0.1UF
JP5
Amber LED+
7
RJ45_RX-
C352
1
2
3
4
5
6
7
8
@ 0.1UF
12
8
+3VLAN
LAN_RD+
LAN_RD-
C371
2
2
@ 1000PF
C333
@4.7UF_10V_1206
10K
@10PF
C332
PCI_AD7
47K
C324
1
C351
2
C368
@ 0.1UF
C
@22
C369
@ 1000PF
2
PCI_AD4
PCI_AD5
PCI_AD6
+3V
17,22,23,28,29 PCI_C/BE#2
17,19,22,23,28,29 PCI_FRAME#
17,19,22,23,28,29 PCI_IRDY#
17,19,22,23,28,29 PCI_TRDY#
17,19,22,23,28,29 PCI_DEVSEL#
17,19,22,23,28,29 PCI_STOP#
17,19,22,23,28 PCI_PERR#
17,19,22,23,28 PCI_SERR#
17,19,22,23,28,29 PCI_PAR
17,22,23,28,29 PCI_C/BE#1
@ 0.1UF
+2.5VLAN
+2.5VLAN
+3VLAN
CLK_PCI_LAN
R238
C367
2
2
@ 1000PF
@ 0.1UF
@ 9346
PCI_AD2
PCI_AD3
C347
2
C348
@ 0.1UF
C21
2
8
7
6
5
VCC
NC
NC
GND
1
CS
SK
DI
DO
1
PCI_AD0
PCI_AD1
1
2
3
4
1
U5
LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO
1
+3V
AUX
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_PAR
+2.5VLAN
PCI_AD18
PCI_AD17
PCI_AD16
PCI_C/BE#2
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_AD[0..31]
PCI_AD21
PCI_AD20
PCI_AD19
17,22,23,28,29 PCI_AD[0..31]
B
PCI_AD22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
2
LAN_IDSEL 1
R270
@ 5.6K
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
AUX
EECS
EESK
EEDI
EEDO
AD0
AD1
GND
AD2
AD3
VDD25
VDD
AD4
AD5
AD6
VDD25
VDD
AD7
CBE0B
GND
1
PCI_AD23
+3VLAN
2
1
17,22,23,28,29 PCI_C/BE#3
R224
1
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
2
@ 0_1206
U6
2
PCI_AD29
1
1
PCI_AD31
PCI_AD30
INTAB
RSTB
CLK
GNTB
REQB
AD31
AD30
GND
AD29
VDD
AD28
AD27
AD26
AD25
AD24
VDD25
VDD
CBE3B
IDSEL
AD23
+3V
R52
For 3V LAN only
1
CLK_PCI_LAN
+3VLAN
+2.5VLAN
2
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
@ 18PF
2
12 CLK_PCI_LAN
17,19 PCI_GNT#3
17,19 PCI_REQ#3
C
2 R484
2 R485
C311
+3VLAN
LED0
LED1
NC
LED2
AVDD25
AVDD
ISOLATEB
GND
TXD+
TXDAVDD
AVDD25
RXIN+
RXINGND
RTSET
RTT2
RTT3
GND
X1
X2
AVDD
AVDD25
PMEB
GND
VCTRL
NC
NC
NC
VDD25
1 @0
1
@0
C312
@ 18PF
+3V
AD22
GND
AD21
AD20
AD19
VDD
VDD25
AD18
AD17
AD16
CBE2B
FRAMEB
IRDYB
TRDYB
DEVSELB
GND
STOPB
PERRB
SERRB
PAR
CBE1B
VDD
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
17,19,23 PIRQB#
8,15,17,19,20,22,23,24,25,28,29,34 PCIRST#
15,22,23,24,28,29 CBRST#
+2.5VLAN
2
R222
@15K
2
Q23
@ FDV301
ACTIVITY#
LINK10_100#
1
2
@1K
LAN_IDSEL
B
3
E
1
R227
+3VS
PCI_AD17 1
10K
2
LAN_X1
47K
@ 470K
1
15,17,25,34 SUS_STAT#
2
C
R241
1
+12VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3
2
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
1
21
of
43
A
B
C
D
E
+3V
.1UF
C651
1
C609
.1UF
C632
.1UF
2
.1UF
1
C642
2
.01UF
1
C631
2
.01UF
1
1
C645
2
.01UF
2
1
C649
2
.01UF
2
2
+3V
1
C640
2
1
C614
.01UF
PCI_AD[0..31]
17,21,23,28,29 PCI_AD[0..31]
1
+3V
@ 8P4R_4.7K RP31
1
8
2
7
3
6
4
5
3
1394_PME#
PCI_SERR#
PCI_PAR
PCIRST#
15,21,23,24,28,29 CBRST#
2
2
89
90
GPIO3
GPIO2
R1
119
X0
6
1
R0
118
C652
@ 0.01UF
2
@ 0_0805
+3V
C653
@ 4.7UF_10V_0805
2
125
124
123
122
121
1
TPBIAS1
TPA1+
TPA1TPB1+
TPB1-
1
2
CYCLEOUT
TEST7
TEST17
TEST16
CYCLEIN
106
L45
PLLVDD
+3V
PCI BUS INTERFACE
PHY PORT 2
BIAS CURRENT
OSCILLATOR
1
R434
2
@ 1K
1
C646
1
1
2
@ 0.1UF
R459 2 @ 1K
2
R458
@ 1K
R453
2
@ 6.34K_1%
C656
1
2
@ 15PF
Y4
FILTER
X1
5
FILTER0
3
FILTER1
4
EEPROM 2 WIRE BUS SDA
92
SCL
91
PC0
PC1
PC2
99
98
97
POWER CLASS
PHY PORT 1
@ 24.576MHz C655
1
2
1
C650
2
@ 0.1UF
1
R424
1
R425
2
@ 220
2
@ 220
@ 15PF
JP12
TPB0TPB0+
TPA0TPA0+
R394
2
CLK_PCI_1394
C657
@.1UF
1
4
1
R462
C605
@.1UF
@22
C590
@Molex SD-54030-0411
TPBIAS0
TEST9
TEST8
94
95
R423 1
R422 1
2 @ 220
2 @ 220
TEST3
TEST2
TEST1
TEST0
101
102
104
105
R437
R439
R441
R442
2
2
2
2
1
1
1
1
@ 220
@ 220
@ 220
@ 220
3
TPA0+
TPA0TPB0+
TPB0-
R400
@ 56.2_1%
R387
R395
@ 56.2_1%
C585
@ 5.11K_1%
@ 220PF
2
TSB43AB22 USE
For TSB43AA22
C657,C605
change to 0
ohm to short
to GND
4
Compal Electronics, inc.
C654
Title
@10PF
PROPRIETARY NOTE
A
1
2
3
4
@ 0.33UF
R399
@ 56.2_1%
116
115
114
113
112
TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -
@ 56.2_1%
1
2
3
4
1
R410
@ 220
1
R411
@ 220
20
35
48
62
78
G_RST
VDDP
VDDP
VDDP
VDDP
VDDP
14
CPS
+3V
1
1394_IDSEL
17,19,21,23,28,29 PCI_FRAME#
17,19,21,23,28,29 PCI_IRDY#
17,19,21,23,28,29 PCI_TRDY#
17,19,21,23,28,29 PCI_DEVSEL#
17,19,21,23,28,29 PCI_STOP#
17,19,21,23,28 PCI_PERR#
15,17,19,23 PIRQA#
32
1394_PME#
17,19,21,23,28 PCI_SERR#
17,19,21,23,28,29 PCI_PAR
17,19,23,25,28,29,32 PM_CLKRUN#
8,15,17,19,20,21,23,24,25,28,29,34 PCIRST#
15
27
39
51
59
72
88
100
7
1
2
107
108
120
2
17,21,23,28,29 PCI_C/BE#3
17,21,23,28,29 PCI_C/BE#2
17,21,23,28,29 PCI_C/BE#1
17,21,23,28,29 PCI_C/BE#0
12 CLK_PCI_1394
17,19 PCI_GNT#0
17,19 PCI_REQ#0
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD
2
2 1394_IDSEL
@ 100
TSB43AB22
1
PCI_AD16 1
R475
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA
PCI_PME
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST
PLLGND1
PLLGND2
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
2
22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85
8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_PCI_1394
86
96
10
11
1
U48
@ TSB43AB22
87
1
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C
D
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
E
22
of
43
D
CARDBUS
PCI1420
1
1
+3V
1
1
C664
Slot
R474
100
S2_VCC
22K
S2_VCC
PCI_AD[0..31]
17,21,22,28,29 PCI_AD[0..31]
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
1
C691
.1UF
C693
.1UF
2
15,21,22,24,28,29
2
CBRST#
B
S1_BVD1
S1_BVD2
S1_CD1#
S1_CD2#
S1_RDY#
S1_WAIT#
S1_WP
S1_INPACK#
A_CE1#/CC/BE0#
A_CE2#/CAD10
A_WE#/CGNT#
A_IORD#/CAD13
A_IOWR#/CAD15
A_OE#/CAD11
A_VS1#/CVS1
A_VS2#/CVS2
A_REG#/CC/BE3#
A_RESET/CRST#
P13
R13
R19
W15
V15
U14
J18
M19
K17
L18
PCM1_LED
PCM2_LED
S1_VS1
S1_VS2
S1_RST
S1_A23
S1_WP
22K
2
22K
S1_VCC
S1_VCC
2 S1_A16
47
Placement near
to PCMCIA
controller
S1_BVD1 24
S1_BVD2 24
S1_CD1# 24
S1_CD2# 24
S1_RDY# 24
S1_WAIT# 24
S1_WP
24
S1_INPACK# 24
3
S1_CE1# 24
S1_CE2# 24
S1_WE# 24
S1_IORD# 24
S1_IOWR# 24
S1_OE#
24
S1_VS1
24
S1_VS2
24
S1_REG# 24
S1_RST
24
+3V
R477
22K
PCM_PME# 32
PM_CLKRUN# 17,19,22,25,28,29,32
PCM1_LED 33
PCM_RI# 29
INT_SERIRQ 17,19,25,32
Title
PCM2_LED 33
+3V
R307
22K
Size
2
1
PCM_SUSP# 32
D27
RB751V
B
R472
22K
PCM_INTA#
1
D41
2
RB751V
PIRQA#
15,17,19,22
PCM_INTB#
1
D40
2
RB751V
PIRQB#
17,19,21
PCI1420-GHK
D
R468
1
R470
R466
1
Date:
C
C690
1000PF
2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PCM_PME#
1
H19
J15
V11
H17
J17
J14
H18
L14
C692
1000PF
2
A_BVD1/CSTSCHG
A_BVD2/CAUDIO
A_CD1#/CCD1#
A_CD2#/CCD2#
A_READY/CINT#
A_WAIT#/CSERR#
A_WP/CCLKRUN#
A_INPACK/CREQ#
1
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A8
S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
SA_A16
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25
C688
1000PF
2
J19
K14
K15
K19
L15
L17
L19
M15
W16
R14
W14
P14
N18
R17
N14
M14
P18
U15
T19
P15
R18
P17
P19
N17
N19
M18
+3V
1
A_A0/CAD26
A_A1/CAD25
A_A2/CAD24
A_A3/CAD23
A_A4/CAD22
A_A5/CAD21
A_A6/CAD20
A_A7/CAD18
A_A8/CC/BE1#
A_A9/CAD14
A_A10/CAD9
A_A11/CAD12
A_A12/CC/BE2#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A17/CAD16
A_A18/RSVD
A_A19/CBLOCK#
A_A20/CSTOP#
A_A21/CDEVSEL#
A_A22/TRDY#
A_A23/CFRAME#
A_A24/CAD17
A_A25/CAD19
C687
1000PF
2
S1_D0
S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8
S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
1
H14
G18
G14
U11
R11
U12
R12
V13
H15
G17
F19
P11
V12
P12
W13
U13
2
M17
M5
A11
A_D0/CAD27
A_D1/CAD29
A_D2/RSVD
A_D3/CAD0
A_D4/CAD1
A_D5/CAD3
A_D6/CAD5
A_D7/CAD7
A_D8/CAD28
A_D9/CAD30
A_D10/CAD31
A_D11/CAD2
A_D12/CAD4
A_D13/CAD6
A_D14/RSVD
A_D15/CAD8
G2
J5
P2
P9
V14
K18
E18
F12
B10
E8
C5
RIOUT#/PME#
GRST#
VCCA
F3
L3
U7
W12
N15
G19
B14
C9
E7
+3V
U51
GND
2
C14
IDSEL
INTA#/MFUNC0
INTB#/MFUNC1
SUSPEND#
DMAREQ#/MFUNC2
IRQSER/MFUNC3
LOCK#/MFUNC4
DMAGNT#/MFUNC5
CLKRUN#/MFUNC6
IRQ/DMA
F15
E17
D19
A16
C15
E14
F13
B15
H5
G1
G3
H6
F1
G5
F2
E1
G6
F5
E3
C12
A4
E6
B5
F6
B8
A8
E9
F9
B9
A9
F10
E10
F11
E13
C11
B11
A12
B12
E12
A13
2
22K
A
PCI_AD20
1
R435
S2_A23
R177
Slot
B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
S2_WP
D1
E11
Interface
PCM_INTB#
PCM_INTA#
4
F18
F14
E19
F17
G15
C13
B13
E2
A5
C8
A15
PCI
C10
S2_RST
Power
1
S2_VS1
S2_VS2
VCCB
B_CE1#/CC/BE0#
B_CE2#/CAD10
B_WE#/CGNT#
B_IORD#/CAD13
B_IOWR#/CAD15
B_OE#/CAD11
B_VS1#/CVS1
B_VS2#/CVS2
B_REG#/CC/BE3#
B_RESET/CRST#
S2_CE1#
S2_CE2#
S2_WE#
S2_IORD#
S2_IOWR#
S2_OE#
S2_VS1
S2_VS2
S2_REG#
S2_RST
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
K6
L2
P3
L5
M2
L6
U8
P7
P8
W5
24
24
24
24
24
24
24
24
24
24
VCCI
B_BVD1/CSTSCHG
B_BVD2/CAUDIO
B_CD1#/CCD1#
B_CD2#/CCD2#
B_READY/CINT#
B_WAIT#/CSERR#
B_WP/CCLKRUN#
B_INPACK/CREQ#
S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#
VCCP
VCCP
V9
W9
H3
R9
V8
W8
U9
R7
S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RDY#
S2_WAIT#
S2_WP
S2_INPACK#
DATA
CLOCK
LATCH
SPKOUT
B_A0/CAD26
B_A1/CAD25
B_A2/CAD24
B_A3/CAD23
B_A4/CAD22
B_A5/CAD21
B_A6/CAD20
B_A7/CAD18
B_A8/CC/BE1#
B_A9/CAD14
B_A10/CAD9
B_A11/CAD12
B_A12/CC/BE2#
B_A13/CPAR
B_A14/CPERR#
B_A15/CIRDY#
B_A16/CCLK
B_A17/CAD16
B_A18/RSVD
B_A19/CBLOCK#
B_A20/CSTOP#
B_A21/CDEVSEL#
B_A22/CTRDY#
B_A23/CFRAME#
B_A24/CAD17
B_A25/CAD19
GNT#
R8
W7
V7
W6
V6
U6
V5
U5
N1
M3
L1
M1
T1
N3
P1
P5
P6
M6
N2
N6
N5
R1
R2
R3
W4
R6
B_D0/CAD27
B_D1/CAD29
B_D2/RSVD
B_D3/CAD0
B_D4/CAD1
B_D5/CAD3
B_D6/CAD5
B_D7/CAD7
B_D8/CAD28
B_D9/CAD30
B_D10/CAD31
B_D11/CAD2
B_D12/CAD4
B_D13/CAD6
B_D14/RSVD
B_D15/CAD8
REQ#
S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12
S2_A13
S2_A14
S2_A15
R463
S2_A16
1
2 SB_A16
S2_A17
S2_A18
47
S2_A19
Placement near
S2_A20
to PCMCIA
S2_A21
controller
S2_A22
S2_A23
S2_A24
S2_A25
24
24
24
24
24
24
24
24
1
1
12
W10
U10
P10
H2
J1
J3
K1
K3
V10
R10
W11
H1
J2
J6
K2
K5
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
3
CBRST#
S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9
S2_D10
S2_D11
S2_D12
S2_D13
S2_D14
S2_D15
2
+3V
10PF
C/BE0#
C/BE1#
C/BE2#
C/BE3#
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
+3V
2
.1UF
C695
17,19,21,22,28,29 PCI_PAR
C6
B6
A6
F7
A7
B7
A14
C7
F8
24
24
24
24
1
+3V
1
C681
2
3
Q60 2N7002
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
S2_A[0..25]
C666
.1UF
S1_VCC
A10
100K
17,19,21,22,28 PCI_SERR#
S2_VCC
33
PCLK
2
2
+12VS
1
2
.1UF
R473
17,19,21,22,28,29 PCI_FRAME#
17,19,21,22,28,29 PCI_DEVSEL#
8,15,17,19,20,21,22,24,25,28,29,34 PCIRST#
17,19,21,22,28,29 PCI_TRDY#
17,19,21,22,28,29 PCI_IRDY#
17,19,21,22,28,29 PCI_STOP#
17,19,21,22,28 PCI_PERR#
C669
.1UF
2
C668
.1UF
2
C667
.1UF
+3V
1
PCM_SPK# 31
PAR
SERR#
PERR#
STOP#
IRDY#
TRDY#
RSTIN#
DEVSEL#
FRAME#
R478
1
E
2
C
1
B
24
SLATCH
15,17,24,29 RTCCLK
24
SLDATA
17,19 PCI_GNT#2
17,19 PCI_REQ#2
17,21,22,28,29 PCI_C/BE#3
17,21,22,28,29 PCI_C/BE#2
17,21,22,28,29 PCI_C/BE#1
17,21,22,28,29 PCI_C/BE#0
12 CLK_PCI_CB
2
A
4
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
E
23
of
43
PCMCIA POWER CTRL.
+5V_CBS
+3V
+12V
S1_VPP
CARDBUS
SOCKET
S1_VPP
W=40mils
S1_VCC
JP19
1
U19
1
1
1
1
1
1
7
24
2 C226
.1UF
2 C225
.1UF
2 C227
.1UF
2 C660
.1UF
2 C638
.1UF
2 C641
.1UF
1
2
30
5V
5V
5V
15
16
17
3.3V
3.3V
3.3V
33
3
5
4
23
SLDATA
23
SLATCH
15,17,23,29 RTCCLK
13
19
18
OCCB#
+3V
1
12V
12V
BVPP
BVCC
BVCC
BVCC
23
20
21
22
RESET
RESET#
6
14
NC
NC
NC
NC
26
27
28
29
DATA
LATCH
CLOCK
APWR_GOOD#
BPWR_GOOD#
OC#
GND
C240
2
C231
2 1UF_25V_0805
AVPP
AVCC
AVCC
AVCC
23
23
4.7UF_10V_0805
S2_VPP
S1_CD2#
S1_WP
S2_VPP
W=40mils
S2_VCC
1
1
VCC_5V
8
9
10
11
C237
2
25
23
4.7UF_10V_0805
CBRST#
12
2
TPS2206AI/TPS2216
R455
100K
S1_BVD1
23
S1_BVD2
23
S1_REG#
23
S1_INPACK#
23
S1_WAIT#
23
S1_RST
23
S1_VS2
PCMRST# 33
1
14
2
8,15,17,19,20,21,22,23,25,28,29,34 PCIRST#
3
7
1
R348
2
0
15,21,22,23,28,29
S1_VCC
R354
23
S1_RDY#
23
S1_WE#
23
S1_IOWR#
23
S1_IORD#
2
1
R349
G_RST#
2
@0
+3V
+5V_CBS
1
1
JP29
C233
C659
.01UF
1UF_25V_0805
2
2
CBRST#
+3V POWER
+5V
W=30mils
S2_VPP
CBRST#
10K
32
80 mils
1
S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25
S1_VPP
S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]
S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]
80 mils
2
PAD-OPEN 4x4m
23
23
23
S1_VS1
S1_OE#
S1_CE2#
23
S1_CE1#
S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10
U58
1UF_25V_0805
2
OUT
8
IN
OUT
7
4.926V
1
2
C228
.01UF
IN
2
3
RST#
SET
6
4
SHDN#
GND
5
R531
@100K_1%
C719
@2.2UF_0805
2
C718
@1UF_10V_0603
C229
1
2
1
1
1
W=30mils
S1_VPP
2
1
@MAX1857
23
1.25V
S1_VCC
S1_CD1#
C662
1000PF
1
R533
1
R534
2
@10K
2
@10K
IN
OUT
8
2
IN
OUT
7
3
RST#
SET
6
SHDN#
GND
5
4
@MAX1857
S2_VCC
2
1
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3
a68
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5
GND
a38
a4
a37
a3
a36
a2
a35
a1
S1_CD1# 1
@1000PF
1
56PF
C674
2
1
1
C678
10UF_16V_1206
C673
1000PF
2
.1UF
B77
B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
S2_CD2#
S2_WP
S2_CD2# 23
S2_WP
23
S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1
S2_BVD1 23
S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3
S2_BVD2 23
S2_REG# 23
S2_INPACK# 23
S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25
S2_WAIT# 23
S2_RST
23
S2_VS2
23
S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22
S2_A16
S2_VPP
S2_VCC
S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13
S2_RDY# 23
S2_WE#
S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#
23
S2_IOWR# 23
S2_IORD# 23
S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10
S2_VS1
23
S2_OE#
23
S2_CE2# 23
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6
S2_CE1# 23
S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3
S2_CD1# 23
2
PCMC154PIN
C686
S1_CD2# 1
@1000PF
2
C689
S2_CD1# 1
2
@1000PF
C665
C234
b68
b34
b67
b33
GND
b66
b32
b65
b31
b64
b30
b63
GND
b29
b62
b28
b61
b27
b60
b26
GND
b59
b25
b58
b24
b57
b23
b56
GND
b22
b55
b21
b54
b20
b53
GND
b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13
GND
b46
b12
b45
b11
b44
GND
b10
b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
C670
R532
@34K_1%_0603
1
.1UF
2
2
56PF
C661
2
C663
C671
10UF_16V_1206
1
1
1
U59
2
23
23
23
23
S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3
S1_A16
U37A
74LVC125
1
1
2
.1UF
S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1
S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22
+3V
C116
S1_CD2#
S1_WP
A77
A76
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
S2_CD2# 1
@1000PF
Compal Electronics, inc.
2
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
24
of
43
A
B
C
D
E
.1UF
C713
1
2
U55
+3V
8,15,17,19,20,21,22,23,24,28,29,34 PCIRST#
LPCRST 1
2
1
SUPER I/O SMsC FDC47N227
R524
10K
5
VCC Y1
1
A1
3
A2
C714
6
1
R518
LPCRST
Y2
4
1
GND
2
D45
RB751V
2
2
10K
LPC_RST#
+3VS
LPC_RST# 32
NC7WZ14
.1UF
1
2
1
LPC_AD[0..3]
17,32 LPC_AD[0..3]
U29
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
20
21
22
23
LAD0
LAD1
LAD2
LAD3
24
25
LFRAME#
LDRQ#
LPC_RST#
26
27
PCIRST#
LPCPD#
2
10K
CLK_LPC_SIO
50
17
30
28
29
GPIO12/IO_SMI#
IO_PME#
SIRQ
CLKRUN#
PCICLK
CLK_SIO14
19
CLK14
48
54
55
56
57
58
59
6
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
GPIO10
GPIO15
GPIO16
GPIO17
GPIO20
GPIO21
GPIO22
GPIO24
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
51
52
64
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23/FDC_PP
18
VTR
53
65
93
VCC
VCC
VCC
7
31
60
76
VSS
VSS
VSS
VSS
17,32 LPC_FRAME#
17,19 LPC_DRQ#1
15,17,21,34 SUS_STAT#
+3VS
17,19,23,32 INT_SERIRQ
17,19,22,23,28,29,32 PM_CLKRUN#
12 CLK_LPC_SIO
2
12
CLK_SIO14
15
15
15
15
27
PID0
PID1
PID2
PID3
BT_DET#
+3VS
1
R195
1
R196
1
R520
1
R248
2
10K
2
10K
2
10K
2
10K
+3VS
CLK_LPC_SIO
CLK_SIO14
1
R209
2
2
1
C338
.1UF
C276
.1UF
C307
1
15PF
C294
4.7UF_10V_0805 .1UF
10V
21
21
1
C339
C278
2
@33
10
1
R228
2
R249
1
2
3
@22PF
PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD5
PD6/MTR0#
PD7
68
69
70
71
72
73
74
75
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0#
SLCTIN#/STEP#
79
78
77
81
80
66
82
83
67
LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#
DTR2#
CTS2#
RTS2#
DSR2#
TXD2
RXD2
DCD2#
RI2#
100
99
98
97
96
95
94
92
DTR1#
CTS1#
RTS1#
DSR1#
TXD1
RXD1
DCD1#
RI1#
89
88
87
86
85
84
91
90
IRMODE/IRRX3
IRRX2
IRTX2
63
61
62
RDATA#
WDATA#
WGATE#
HDSEL#
DIR#
STEP#
DS0#
INDEX#
DSKCHG#
WRTPRT#
TRK0#
MTR0#
DRVDEN0
16
10
11
12
8
9
5
13
4
15
14
3
1
DRVDEN1
2
GPIO11/SYSOPT
49
LPD[0..7]
LPTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#
INIT#
LPTAFD#
LPTSTB#
SLCTIN#
26
26
26
26
26
26
26
26
26
LPD[0..7]
26
RP10
DCD#1
RI#1
CTS#1
DSR#1
CTS#2
1
2
3
4
+3VS
8
7
6
5
RP11
CTS#2
DSR#2
DCD#2
RI#2
+3VS
1
2
3
4
8
7
6
5
2
DSR#2
DCD#2
RI#2
DTR#1
CTS#1
RTS#1
DSR#1
TXD1
RXD1
DCD#1
RI#1
8P4R_4.7K
1
R223
2
1K
8P4R_4.7K
+5V
JP24
1
R213
29
29
29
29
29
29
29
29
2
1K
IRMODE 26
IRRX
26
IRTXOUT 26
RDATA#
WDATA#
WGATE#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#
2
R247
1
R208
RDATA#
WDATA#
WGATE#
HDSEL#
FDDIR#
STEP#
DRV0#
INDEX#
DSKCHG#
WP#
TRACK0#
MTR0#
3MODE#
20
20
20
20
20
20
20,33
20
20
20
20
20
20
1
10K
2
1K
+5VS
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
@96212-1011S
3
Base I/O Address
* 0 = 02Eh
1 = 04Eh
SMsC LPC47N227
4
4
Compal Electronics, inc.
Title
PROPRIETARY NOTE
A
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C
D
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
E
25
of
43
FIR Module
R2
@4.7_1206
C1
2
2
25
IRMODE
2
@10K
2
@10K
R5
@4.7_1206
+
W=40mils
VCC
LEDA
10
7
GND
AGND
2
4
MODE0
TXD
9
IRTXOUT
5
MODE1
RXD
8
IRRX
3
FIR_SEL
N.C
6
C259
@68UF_4V_B2
2
1
@0.47UF
1
R4
1
R3
2
+
@68UF_4V_B2
1/4W
IRTXOUT 25
IRRX
25
1
C7
1
1
FIR_VCC
U1
2
W=40mils
1
+3VS
1
1
+3VS
R561
10K
IRMODE
(R561 For VCH ONLY)
2
@HSDL-3600
The component's most place
cloely IRDA MODULE.
+5V_PRN
PARALLEL PORT
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
10
9
8
7
6
+5V_PRN
CP2
RP7
10P8R_2.7K
D4
+5VS
2
1
R192
2.2K
1
2
3
4
5
RB420D
+5V_PRN
25
AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#
LPTSTB#
AFD#/3M#
R191
25
INIT#
25
SLCTIN#
1
2
1
R188
33
2
+5V_PRN
LPTINIT#
25
LPTAFD#
25
LPTERR#
LPTSLCTIN#
FD4
RP6
10
9
8
7
6
LPD0
LPD1
LPD2
LPD3
RP8
10P8R_2.7K
1
2
3
4
FD0
LPTERR#
FD1
LPTINIT#
FD2
LPTSLCTIN#
FD3
8
7
6
5
FD5
FD0
FD1
FD2
FD3
FD6
FD7
1
2
3
4
5
LPD7
LPD6
LPD5
LPD4
+5V_PRN
1
2
3
4
FD3
FD2
FD1
FD0
8P4R_68
RP5
8
7
6
5
FD7
FD6
FD5
FD4
25
LPTACK#
25
LPTBUSY
25
LPTPE
25
LPTSLCT
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
1
2
3
4
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
4
3
2
1
8P4C_220PF
CP1
5
6
7
8
FD0
FD1
FD2
FD3
1
2
3
4
8P4C_220PF
CP3
8
7
6
5
FD4
FD5
FD6
FD7
1
2
3
4
8P4C_220PF
CP4
8
7
6
5
33
R190
R189
33
FD4
FD5
FD6
FD7
LPTSTB#
C251
220PF
AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#
33
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13
8
7
6
5
8P4C_220PF
JP4
LPTCN-25
8P4R_68
25
LPD[0..7]
LPD[0..7]
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
26
of
43
USB PORT
USB_VCCA
USB_VCCC
F4
F3
C208
+
POLYSWITCH_0.75A
C153
150UF_E
2
USB_AGND
2
1
1
USB_OC#3
1
18
R355
C279
R197
1000PF
560K
1000PF
560K
L36
FBM-160808-121T
1
2
1
2
L34
FBM-160808-121T
JP9
C720
1
USB0_DUSB0_D+
USB_PN0
USB_PP0
1
18
18
2
2
C560
2
2
1
USB_OC#0
USB_CGND
470K
2
470K
18
+
C267
C263
.1UF 150UF_E
R194
2
.1UF
R353
1
1
POLYSWITCH_0.75A
1
+5VS
1
+5VS
1
2
3
4
C721
18
18
USB3_DUSB3_D+
USB_PN3
USB_PP3
L19
FBM-160808-121T
1
2
1
2
L18
FBM-160808-121T
2
1
C271
2
.1UF
C722
1
L13
CHB4516G750_1806
4516
C535
2
1
1
1
L35
CHB4516G750_1806
4516
2
2
2
47PF
1
SUYIN USB Connector 2569A-04G3T-B
47PF
1
2
2
2
1
C198
@0.1UF
@ HRS DF15-08-20DS-065V
18
18
USB_PN1
USB_PP1
USB1_DUSB1_D+
JP1
1
2
3
4
5
6
7
8
L16
FBM-160808-121T
1
2
1
2
L15
FBM-160808-121T
L14
CHB4516G750_1806
C724
1
560K
47PF
C275
.1UF
SUYIN 2553A-0BG5T-A
C725
47PF
2
R204
1000PF
1
C201
@4.7UF_10V_1206
C273
2
+
USB_BGND
1
1
BT_VCC
USB_OC#1
1
BT_RESET#
470K
BT_DET# 25
18
2
@DTC124EK
33
USB2_D+
USB2_D-
1
22K
USB_PP2
USB_PN2
+
C281
C272
.1UF 150UF_E
R203
2
Q40
BT_VCC
POLYSWITCH_0.75A
2
4
6
8
10
12
14
16
18
20
2
2
C171
@0.1UF
18
18
1
RFOFF#
3
33,34
22K
2
1
2
1
1
1
3
5
7
9
11
13
15
17
19
2
2
Q10
@SI2301DS
+5VS
JP15
33
BT_DETACH
33 BT_WAKE_UP
2
1
3
C172
@0.1UF
2
1
2
R163
@100K
USB_VCCB
F2
R171
@100K
1
+3VALW
1
+5VALW
47PF
2
2
47PF
Bluetooth
C723
.1UF
4516
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
27
of
43
Q54
@SI2301DS
+3.3VAUX
D
S
3
1
R385
1
2
+3V
+5VS_MINIPCI
PCIRST#
2
0
2
@0
PCIRST#
8,15,17,19,20,21,22,23,24,25,29,34
CBRST#
15,21,22,23,24,29
1
1
C173
@1000PF
@.1UF
C236
C178
@10UF_16V_1206
@.1UF
2
2
2
1
R168
1
R164
MINI_RST#
C175
2
C592
@1UF_25V_0805
2
C629
@1UF_25V_0805
1
1
G
1
0
2
+3VALW
R454
1
EN_WOL#
2
+5VALW
@100K
+3V
C728
5
LAN RESERVED
L9
W=40mils
2
C232
1
1
CHB1608B121
0603
17,19 PCI_REQ#4
.1UF
12 CLK_MINIPCI
PCI_REQ#4
CLK_MINIPCI
PCI_REQ#1
2
.1UF
PIRQD#
17,19,29 PIRQD#
C191
17,19 PCI_REQ#1
PCI_AD31
PCI_AD29
17,21,22,23,29 PCI_AD31
17,21,22,23,29 PCI_AD29
PCI_AD27
PCI_AD25
17,21,22,23,29 PCI_AD27
17,21,22,23,29 PCI_AD25
1
CLK_MINIPCI
12
R169
@10
C180
@33PF
17,21,22,23,29 PCI_C/BE#3
17,21,22,23,29 PCI_AD23
17,21,22,23,29 PCI_AD21
17,21,22,23,29 PCI_AD19
17,21,22,23,29 PCI_AD17
17,21,22,23,29 PCI_C/BE#2
17,19,21,22,23,29 PCI_IRDY#
17,19,22,23,25,29,32 PM_CLKRUN#
17,19,21,22,23 PCI_SERR#
17,19,21,22,23 PCI_PERR#
17,21,22,23,29 PCI_C/BE#1
17,21,22,23,29 PCI_AD14
17,21,22,23,29 PCI_AD12
17,21,22,23,29 PCI_AD10
17,21,22,23,29 PCI_AD8
17,21,22,23,29 PCI_AD7
17,21,22,23,29 PCI_AD5
17,21,22,23,29 PCI_AD3
+5VS_MINIPCI
17,21,22,23,29 PCI_AD1
+5VS
1
L7
PCI_C/BE#3
PCI_AD23
PCI_AD21
PCI_AD19
PCI_AD17
PCI_C/BE#2
PCI_IRDY#
PM_CLKRUN#
PCI_SERR#
PCI_PERR#
PCI_C/BE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
W=30mils
PCI_AD1
2
0_0603
0603
W=30mils
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
LAN RESERVED
W=30mils
PIRQC#
W=40mils
MINI_RST#
+5VS_MINIPCI
PIRQC#
17,19,29
PCI_GNT#4 17,19
+3.3VAUX
+3VS_MINIPCI
L8
W=40mils
PCI_GNT#1 17,19
WLANPME# 32
.1UF
PCI_AD30
PCI_DEVSEL#
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_C/BE#0
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
W=20mils
2
+3V
C200 CHB1608B121
0603
.1UF
PCI_AD30 17,21,22,23,29
PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL
PCI_AD18
1
2
R48
100
PCI_AD22
PCI_AD22
PCI_AD20
PCI_AD20
PCI_PAR
PCI_PAR
PCI_AD18
PCI_AD18
PCI_AD16
PCI_AD16
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
1
C181
1
@7SH08FU
2
2
RING
PCI_AD28 17,21,22,23,29
PCI_AD26 17,21,22,23,29
PCI_AD24 17,21,22,23,29
17,21,22,23,29
17,21,22,23,29
17,19,21,22,23,29
17,21,22,23,29
17,21,22,23,29
PCI_FRAME# 17,19,21,22,23,29
PCI_TRDY# 17,19,21,22,23,29
PCI_STOP# 17,19,21,22,23,29
PCI_DEVSEL# 17,19,21,22,23,29
PCI_AD15 17,21,22,23,29
PCI_AD13 17,21,22,23,29
PCI_AD11 17,21,22,23,29
PCI_AD9 17,21,22,23,29
PCI_C/BE#0 17,21,22,23,29
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
17,21,22,23,29
17,21,22,23,29
17,21,22,23,29
17,21,22,23,29
+3.3VAUX
1
TIP
+3VS_MINIPCI
+3V
C177
10UF_16V_1206
.1UF
JP18
4
KILL_SW
C224
.1UF
1
WL_OFF#
3
33,34
U61
C179
Mini-PCI SLOT
.1UF
+5VS_MINIPCI
2
33
+3VS_MINIPCI
2
1
1
2
32
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
28
of
43
1
R486 @1M
2
@.1UF
2
1
2
INPUT OUTPUT
4
5
3
VCC
GND
1
C707
SMC_VCC
.1UF
NC
34
3
2
6
17
28
39
49
60
70
81
92
103
113
124
SMC_VCC
+3V
SMC_VCC
3
4
VIN
VOUT
VIN/CE VOUT
2
GND
+3V
2
C711
@10PF
@0
R536
2 IDSEL0
1
+3V
R514
1
17,21,22,23,28 PCI_C/BE#0
17,21,22,23,28 PCI_C/BE#1
17,21,22,23,28 PCI_C/BE#2
17,21,22,23,28 PCI_C/BE#3
17,19,21,22,23,28 PCI_PAR
17,19,21,22,23,28 PCI_FRAME#
17,19,21,22,23,28 PCI_IRDY#
17,19,21,22,23,28 PCI_TRDY#
17,19,21,22,23,28 PCI_STOP#
PCI_AD22 R496 1
PCI_AD22 R497 1
@100K
2 IDSEL1
2 @100
2 @100
17,19,22,23,25,28,32 PM_CLKRUN#
17,19,21,22,23,28 PCI_DEVSEL#
12 CLK_PCI_SD/SM
R546 1
@0 2
PCTRST# 1
2
17,19,28 PIRQC#
17,19,28 PIRQD#
R547 @0
32 SM/SD_P ME#
15,21,22,23,24,28 CBRST#
8,15,17,19,20,21,22,23,24,25,28,34 PCIRST#
R537
R538
R539
R540
R541
CLK_PCI_SD/SM
1
1
1
1
1
2
2
2
2
2
@100K
@100K
@100K
@100K
@100K
1
SDCD0
SDCD1
SDCD2
SDCD3
SDCMD
2
R542 @0
13
120
IDSEL0
IDSEL1
55
27
125
123
121
122
128
CLKRUN#
DEVSEL#
PCICLK
PCIRST#
INTA#
INTB#
PME#
101
102
83
85
89
98
104
105
69
SDCD0
SDCD1
SDCD2
SDCD3
SDCMD
SDCLK
SDCD#
SDWP
SDPWR
RXD1
DSR#1
CTS#1
DTR#1
DCD#1
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
@SD/COM
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
110
111
112
114
115
116
117
119
NC
NC
126
127
2
12
11
13
10
14
9
15
8
16
7
17
6
18
5
19
4
20
3
21
2
22
1
23
24
SMD5
SMD3
SMD6
SMD2
SMD7
SMD1
SM_LVD
SMD0
+3V
+3V
+3V
SM_WP#
SM_R/B#
SMWE#
SM_RE#
SM_ALE
SM_CE#
SM_CLE
FCMODE
RTCCLK
15,17,23,24
SUSP#
32,36,40
+3V
1
R488
2 SMW PD#
@10K
VCC
PCD#
I/O4
VSS
I/O5
I/O3
I/O6
I/O2
I/O7
I/O1
LVD
I/O0
GND
WP#
RDY
WE#
RD#
ALE
CE#
CLE
VCC
VSS
GND
WPRO#
@SmartMedia Slot
1
R498
2
@100K
1
1
1
1
1
1
1
1
@100K
@100K
@100K
@100K
@100K
@100K
@100K
@100K
+3V
R499
R500
R501
R502
R503
R504
R505
R506
2
2
2
2
2
2
2
2
+3V
+3V
+3V
SMD0
SMD1
SMD2
SMD3
When the serial
ROM interface is
not applied need
pull up.
1
2
3
4
8
7
6
5
@8P4R_100K *
RP35
SMD4
SMD5
SMD6
SMD7
1
2
3
4
8
7
6
5
@8P4R_100K *
SM_CLE
SM_ALE
SM_WP#
SM_LVD
TEST0
TEST1
TEST2
TEST3
61
62
63
64
1
R508
1
2
3
4
8
7
6
5
@8P4R_100K *
2
@0
+3V
+3V
SMC_VCC
RP37
R509
@10K
@TC637 1AF
SM_CE#
SMWE#
SM_RE#
R510
@10K
1
2
3
4
8
7
6
5
D43
23
PCM_RI#
2
1
RING#
@RB75 1V
+3V
COM_RI#
TXD1
RTS#1
RI#1
COM_RI#
JP14
@100K
SMCD#
2
SMD4
SMC_VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SDCD1
SDCD3
SDCLK
SDWP
SDLED
R487
1
TXD1
RTS#1
RI#1
25
25
25
@8P4R_100K *
32
SM_R/B#
D
Q62
@2N70 02
2
G
1
2
R494
@10K
S
3
25
25
25
25
25
RXD1
DSR#1
CTS#1
DTR#1
DCD#1
SUSP#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
@1K
RP36
1
12
23
33
44
54
65
76
87
97
108
118
JP28
SDCD0
SDCD2
SDCMD
SDCD#
SDPWR
2 @100K
2 @100K
2 @100K
PWR ST#
GND
SD Transfer Conn.
2
59
56
57
58
68
67
66
C717
RP34
SD CARD I/F
+3V
IDSEL0
IDSEL1
CLK32
PWRST#
SUSPEND#
FCMODE
ROM_CS
ROM_SK
ROM_D
R535
@1000 PF
C726 @1000 PF
1
2
+3V
1
CLK_PCI_SD/SM 1
R511
@22
2
@0
PCI I/F
1
R526
C709
@10UF_16V_ 1206
R523 @ 0
2 SMEJSW#
2
2
R493 @10K
SMCD# 1
1
1
C708
@ 0.1UF
@RT9701- CB
1
FCMODE
SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7
SM_CLE
SM_ALE
SM_CE#
SMWE#
SM_RE#
SM_WP#
SM_R/B#
SMCD#
SM_LVD
SMWP D#
SMEJSW#
R490 1
R491 1
R492 1
SMVC3E N
2
+3V
SmartMedia I/F
2
R525 @10K
System I/F
1
GPIO I/F
@ 0.1UF
1
86
90
93
95
99
96
94
91
75
78
77
80
79
84
82
100
88
73
74
107
109
106
72
71
Test Pins
PWR ST#
C716
2
SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7
SMCLE
SMALE
SMCE#
SMWE#
SMRE#
SMWP#
SMRB#
SMCD#
SMLVD
SMWPD#
SMEJSW#
SMLED#
SMLOCK#
SMEJCT#
SMVC3EN
SMVC5EN
1
5
1
SMVC3EN
1
U52
Power
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
PAR
FRAME#
IRDY#
TRDY#
STOP#
Q64
@DTC114YKA
47K
PCI_AD[0..31]
53
52
51
50
48
47
46
45
42
41
40
38
37
36
35
34
22
21
20
19
18
16
15
14
10
9
8
7
5
4
3
2
43
32
31
11
30
24
25
26
29
+5VS
2
@1K
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
1
@110
10K
SM_LED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
17,21,22,23,28 PCI_AD[0..31]
2
R543
R545
@NC7S14
U53
2
D46
@HSMB-C110 BLUE
2
1000PF
SM_LED
1
+3V
1
1
C706
SM_LED
2
.1UF
2
1000PF
C705
2
1
C704
2
.1UF
2
.1UF
C703
1
1
C702
2
1000P F
2
.1UF
C701
1
C700
2
2
1
1
C699
1000PF
2
.1UF
1
1
1
C698
1
U62
C729
+3V
1
+3V
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Size
B
Date:
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
29
of
43
AC97 Codec
+5VS
+5VS
VIN
VOUT
5
2
DELAY
SENSE
6
7
ERROR
CNOISE
1
8
ON/OFF#
GND
3
VDDA
1
4
C552
4.7UF_10V_0805
2
2
.1UF
2
4.7UF_10V_0805
C577
1
1
1
U40
C580
C564
SI9182
2
.1UF
AVDD_AC97
L37
1
VDDA
2
VDDC
R124
CHB2012U170
C599
4.7UF_10V_0805
LINE_IN_R
INT_CD_L
INT_CD_R
31
MIC
1
6.8K
1
6.8K
1
6.8K
1
6.8K
2
R406
2
R407
1
20K
1
20K
MIC
1
2
C606 1000PF
1
C604
MD_SPK
31
15,17
2
1UF_25V_0805
2
R404
2
R393
IAC_RST#
2
R379
1
100
2
2
1
9
VCC
VCC
25
38
AVCC
1
AUX_L
LINE_OUT_L
35
LINEL
1
15
AUX_R
LINE_OUT_R
36
LINER
1
16
VIDEO_L
MONO_OUT
37
1
17
VIDEO_R
HP_OUT_L
39
2
23
LIN_IN_L
HP_OUT_R
41
24
LIN_IN_R
18
20
BIT_CLK
6
SDATA_IN
8
XTL_IN
2
CD_L
CD_R
19
CD_GNA
21
MIC1
22
MIC2
13
PHONE
AFLT1
29
PC_BEEP
AFLT2
30
VREFOUT
28
REFFLT
27
FLT3D
32
BPCFG
FLTI
FLTO
NC
NC
31
33
34
43
44
NC
AGND
AGND
40
26
42
11
15,17 IAC_SDATAO
5
R374
1
22
2
R377
2 22
1
LEFT
RIGHT
LEFT
31
RIGHT
31
MD_MIC
15
IAC_BITCLK 15,17
R81
1
10K
2
IAC_SDATAI0 17
C570
22PF
Y3
NPO
24.576MHz
XTL_OUT
RESET#
SYNC
3
1
C589
2
1000PF
NPO
1
2
C583
1000PF
NPO 1
R396
C572
22PF
NPO
2
AUD_VREF
0
SDATA_OUT
2
2
1
2
AUD_VREF
1UF_25V_0805
L44
1
CHB2012U170
2
L40
1
CHB2012U170
2
L38
1
CHB2012U170
2
2
20
1
C593
C594
4.7UF_10V_0805
.1UF
2
CS4299A
1000PF
NPO
C584
1UF_25V_0805
2
GND
GND
R380
@100K
C591
.1UF
C574
1
4
7
C576
1
S/PDIF_OUT
2
48
C581
.01UF
1
EAPD#
1
47
2
EAPD
ID0#
ID1#
CD_GNA
1
CD_AGND
R416
3.3K
1
31
45
46
2
1
15,17 IAC_SYNC
10
C571
1 1000PF
C573
2 1000PF
C567
2 4.7UF_10V_0805
C566
2 4.7UF_10V_0805
C557
2 1UF_25V_0805
C559
1 1000PF
2
14
12
MONO_IN
R427
R415
0
3.3K
2
15
1
2
C597
1UF_25V_0805
1
2
C598
1UF_25V_0805
CD_L_R 1
2
C595
1UF_25V_0805
CD_R_R 1
2
C596
1UF_25V_0805
CD_GNA 1
2
C602
1UF_25V_0805
1
2
C603
1UF_25V_0805
1
AUD_VREF
2.4K
1
1
2
10K
C600
1UF_25V_0805
+3VS
1
31
2
R417
2
R403
2
R405
2
R408
1
20
LINE_IN_L
AUD_VREF
1
6.8K
1
6.8K
2
20
31
AVCC
U41
2
R418
2
R402
2
0_0603
C568
4.7UF_10V_0805
.1UF
2
2
.1UF
C579
1
1
C565
1
1
1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
30
of
43
A
B
C
D
E
AMP & Audio Jack
+5VS
+5VS
2 Q42
2
1
33
2N7002
Q52
R513
INTSPK_R2
10K
.47UF
C610 .47UF
1
2
1
17
1
2
Q44
INTSPK_L2 1
.47UF
10K
1
3
2
2
33
C622
.47UF
DTC314TK
2 1
R447
3
33
JP20
TPA0132
5
4
2
JP16
INTSPK_R1
INTSPK_R2
INTSPK_L1
INTSPK_L2
30
LINE_IN_R
FBM-11-160808-700T
1
2
L46
1
2
L47
FBM-11-160808-700T
30
LINE_IN_L
1
2
3
4
LINE_IN JACK
3
6
2
1
C685
1
@.1UF
3
4
C626
4.7UF_10V_0805
DTC314TK
.047UF_0805
C613
DAN217
3
C680
PHONEJACK
330PF
2
330PF
2
1
Q43
C625
.47UF
3
C630
2
C643 .47UF
VDDA
2
1
1
100K
R446
C618
1
1
C644
2
R448
INTSPK_L1 1
1
12
13
24
DTC314TK
33
10K
1
NBA_PLUG
C637 1
2
.1UF
INTSPK_L2
INTSPK_R2
1
RIGHT
U3-5
U3-23
U3-6
U3-20
2
R420 2.2K
R419
C620
4.7K
10UF_16V_1206
2
30
VOL_OP
INTSPK_L1
INTSPK_R1
1
2
C615 .47UF
2
2
3
4
21
5
23
6
20
22
15
14
11
9
16
10
8
1
LEFT
2
PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
PC-BEEP
BYPASS
PC-ENABLE LOUTROUTVOLUME
LIN
LOUT+
RIN
ROUT+
LLINEIN
RLINEIN
GND
GND
LHPIN
GND
RHPIN
GND
CLK
2
30
7
18
19
100K
1
R432
1
1
R443
2
1
U46
3
12
1
R444
+5VS
2
2.2K
2
2
30
2
2
EAPD
1
R430
1
2
INTSPK_R1
2
3
2SB1188
1
2
Q30
4.7UF_10V_0805
3
DTC314TK
2
1
1
.1UF
10K
R512
1.65K
2
1
C612
1
Q53
C601
SHUTDOWN#
3
1
2
100K
W=40Mil
10K
VOL_AMP 32
D39
R401
4
5
C712
@1000PF
4
3
+5VS
2
-
1
+
1
1
2
CHB3216U121
2
VOL_OP
U56
2
LM7111
1
L51
ACES 85205-0400
JP23
1
C551
2
1
R345
100K
+3V POWER
2
7
74LVC14
C539
1
C528
2
R333
1
1UF_10V_0603
2
560
R397
10K
+3V POWER
2
C611
10UF_16V_1206
2
.22UF
1UF_10V_0603
AVDD_AC97
2
3 Q34
2SC2411K
1
R456
18K_1%
1
2
Q47
3 2SC2411K
2
2
+3V
C648
R464
100K_1%
1UF_10V_0603
R476
2
1
1UF_10V_0603 560
R409
2.4K
1
1
2
R457
18K_1%
1
MONO_IN 30
1
R390
1
2
C586
2
MONO_IN
1
1
PCM_SPK#
C588
2
2
2
2
AVDD_AC97
1
23
330PF
2
1
1
2
8.2K
C696
2
1
R350
1
6
1
2
5
2
330PF
U36A
14
SPEAKER OUT
JACK
3
6
2
1
PHONEJACK
R392
10K
.1UF
4
U37B
74LVC125
4
1
VDDA
5
2
BEEP#
L49
2
1
2 INTSPK_R1-3
47 FBM-11-160808-700T
2
1
2 INTSPK_L1-3
47
L50
FBM-11-160808-700T
C697
2
1K
1
+3V
1
32
C633
150UF_6.3V_D2
INTSPK_R1 1
2
1
R480
INTSPK_L1 1
2
1
R481
C623
150UF_6.3V_D2
+ +
+3V
1
R479
NBA_PLUG
JP21
2.2K
2
5
4
74LVC14
+3V POWER
1
C587
2
R391
1
1UF_10V_0603
560
30
R389
10K
1
2
L48
FBM-11-160808-700T
C694
220PF
D33
RB751V
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A
B
PHONEJACK
1
2
2
1
MIC
MIC
EXT.
MICPHONE
JACK
3
6
2
1
2
1
7
4
2
ICH_SPKR
U36B
1
18
3
1
14
C
D
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
E
31
of
43
GATEA20
1 G20
1 RCL#
2
RC#
19
D19
SM/SD_PME#
1
22
1394_PME#
1
23
PCM_PME#
2
29
24
19
RB751V
2
1
2
+3VALW
R265 10K
D20
ACIN
RING#
EC_SMI#
VGA_SUSP#
G_RST#
EC_RIOUT#
A/B#USE
12,17 PM_SLP_S1#
BATT_TEMPA
BATT_TEMPB
VBATTA
VBATTB
39
BATT_TEMPA
39
ALI/MH#
3
RB717F
D21
28
WLANPME#
1
21
LAN_PME#
2
BLI/MH#
BATT_CHGI
ADP_I
3
19,34
ON/OFF
17 PM_SLP_S5#
RB717F
D44
1
17 ICH_WAKE_UP#
ECAGND
RB751V
2
OEM
OEM
15
31
38
34
DAC_BRIG
VOL_AMP
IREF
EN_DFAN
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
17,25 LPC_AD[0..3]
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
17,25 LPC_FRAME#
17,19 LPC_DRQ#0
17,19,23,25 INT_SERIRQ
+5VALW
34
EC_SMC2
2
4.7K
EC_SMD2
2
4.7K
19
A
1
2
3
4
5
6
7
8
9
10
EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
EC_URXD
EC_UTXD
EC_USCLK
1
R293
AD0
AD1
AD2
AD3
87
88
89
90
2
44
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
IOPE4/SWIN
IOPE5/EXWINT40
93
94
DP/AD8
DN/AD9
99
100
101
102
DA0
DA1
DA2
DA3
105
106
107
108
109
TINT#
TCK
TDO
TDI
TMS
15
14
13
10
LAD0
LAD1
LAD2
LAD3
95
161
VBAT
AVCC
34
45
123
136
157
166
16
81
82
83
84
@0
51RST#
EC_RST#
EC_SCI#
G20
RCL#
+3VALW
2
1
@22PFR304
2
@33
LFRAME#
LDRQ#
SERIRQ
19
22
23
24
25
LREST#
SMI#
PWUREQ#
IOPE6/LPCPD#/EXWIN45
IOPE7/CLKRUN#/EXWINT46
31
5
6
IOPD3/ECSCI#
GA20/IOPB5
KBRST#/IOPB6
18
12 CLK_LPC_EC
1
C478
9
8
7
2
34
LPCPD#
17,19,22,23,25,28,29 PM_CLKRUN#
JP25
1
2
3
4
5
6
7
8
9
10
IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS#
IOPJ6/PLI
IOPJ7/BRKL_RSTO#
LPC_AD[0..3]
8P4R_10K
1
R237
1
R236
62
63
69
70
75
76
PCI_PME#
BATT_TEMPA
1
2
C521
.01UF
BATT_TEMPB
1
2
C522
.01UF
+3VALW
RP16
G_RST#
1
8
FRD#
2
7
SELIO#
3
6
FSEL#
4
5
B
IOPD0/RI1#/EXWINT20
IOPD1/RI2#/EXWINT21
IOPD2/EXWINT24
IOPD4
IOPD5
IOPD6
IOPD7
PC7
34
NUM_LED#
34
CAPS_LED#
34 ARROW_LED#
RB751V
C
26
29
30
SCR_LED# 41
42
54
55
PCI_PME#
ATFOUT#
18,34,37,40 ACIN
29
RING#
12,17 PM_SLP_S3#
RB751V
D24
17
MP3#
PC7
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
LCLK
124
125
126
127
128
131
132
133
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
ECAGND
IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD
143
142
135
134
130
129
121
120
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#
113
112
104
103
48
KBA16
KBA17
KBA18
KBA19
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
138
139
140
141
144
145
146
147
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
IOPJ0/RD#
IOPJ1/WR0#
150
151
FRD#
SELIO#
152
SELIO#
SEL0#
SEL1#
173
174
FSEL#
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15
148
149
155
156
3
4
27
28
SYSON
SUSP#
MMO_ON
TRICKLE
VTT_ON
VTT_PWRGD#
ENVEE
ENBKL
PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7
110
111
114
115
116
117
118
119
KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
71
72
73
74
77
78
79
80
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
32KX1/32KCLKOUT
158
CRY1
32KX2
160
CRY2
CLK
FSTCHG
38
FRD#
FWR#
33
33
VR_ON
42
1
10K
2
ATF_INT# 17
RB751V
D
C
SELIO#
33
FSEL#
33
SYSON
SUSP#
36
29,36,40
+3VALW
VTT_ON 43
VTT_PWRGD# 5,12
ENVEE
15
ENBKL
15
KBA0
KBA1
1
R129
1
R130
2
@1K
2
1K
R131
1
R132
@1K
2
1K
R133
1
R134
@1K
2
1K
KBA2
TP_CLK
15
TP_DATA 15
LID_SW# 34
CDON#/MP3 34
KBA3
KBA4
KBA5
B
I/O Address
BADDR1(KBA3) BADDR0(KBA2)
*
Index
Data
0
0
2E
2F
0
1
4E
4F
1
0
1
1
(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
Reserved
R266
CRY1
ENV0 (KBA0)
2 CRY2
1
20M
R267
120K
IRE
* OBD
DEV
PROG
0
0
1
1
ENV1 (KBA1)
TRIS (KBA4)
0
1
0
1
0
0
0
0
X1
47
PC87591VPC
L32
1
2
CHB1608U800
2
R283
D23
32.768KHZ
C376
10PF
C346
12PF
SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use
Compal Electronics, inc.
Title
@96212-1011S
PROPRIETARY NOTE
5
2
RB751V
ATFOUT# 1
1
17
1
1
D25
2
34
34
168
169
170
171
172
175
176
1
EC_SMC2
EC_SMD2
AGND
R285
10K
PBTN_OUT#
EC_SMC2
EC_SMD2
FAN_SPEED
2
10K
1
+3VS
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
2
2
R292
10K
19
5
5
34
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING#/PFAIL#
MMO_ON
2
28
EN_WOL#
33,39 EC_SMC1
33,39 EC_SMD1
25
LPC_RST#
153
154
162
163
164
165
1
R258
+3V
1
EC_URXD
EC_UTXD
EC_USCLK
EC_SMC1
EC_SMD1
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
KBA[0..18]
ADB[0..7]
KSI[0..7]
KSO[0..15]
KBA[0..18]
ADB[0..7]
KSI[0..7]
KSO[0..15]
1
For PWM
EN_DFAN
KSO16
KSO17
+3VS
32
33
36
37
38
39
40
43
1
D22
11
12
20
21
85
86
91
92
97
98
.1UF
ECAGND
33
33
15
15
2
38
ACOFF
17 PM_BATLOW#
34
51ON
19 EC_LID_OUT#
23 PCM_SUSP#
INVT_PWM
VDD
2
L31
1
2
CHB1608U800
C510
INVT_PWM
BEEP#
96
2
2
.1UF
U34
GND1
GND2
GND3
GND4
GND5
GND6
GND7
1
1
C375
15
31
+RTCVCC
C53
.1UF
+3VALW
EC_AVCC
51VDD
2
@0
17
35
46
122
137
159
167
+RTCVCC
C377
2
+3VALW
0
1000PF 1000PF
EC_AVCC
D
C90
3
2
2
.1UF
1
1
C108
2
.1UF
2
C430
1
1
C378
.1UF
2
2
.1UF
2
C374
1
1
+3VS
1
R79
1
R74
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
+3VALW
2
4
+3VALW
1
5
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3
2
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
1
32
of
43
A
+3VALW
C315
1
+5VALW
2
.1UF
C289
1
2
+3VALW
U25B
74LVC32
SELIO#
SELIO#
20
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
+3VALW
RP12
DD
AA
BB
CC
1
2
3
4
1G
2G
C284
8
7
6
5
1
+3VALW
2
.1UF
14
1
KBA2
8P4R_100K
U25A
74LVC32
3
SELIO#
2
7
74LVC244
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
3
4
7
8
13
14
17
18
D0
D1
D2
D3
D4
D5
D6
D7
AA
LARST#
11
1
CLK
CLR
U27
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
10
6
32
18
16
14
12
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
10
14
4
KBA1
1
19
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
VCC
PCM_LED
20 SHDD_LED#
20 PHDD_LED#
20,25
DRV0#
24
OCCB#
U31
VCC
2
4
6
8
11
13
15
17
BUTTON1#
INTERNET#
GND
34
34
CC
5
7
R268
+5VALW
1
1
R221
EXTIDEPWR# 20
MDC_DN# 15
BT_DETACH 27
RFOFF# 27,34
BT_RESET# 27
2
0
HDD_LED# 34
2ND_CHGI_CD_FDD_LED# 34
GND
20
.1UF
74HCT273
C342
2
1
1UF_25V_0805
1
20K
2
R243
100K
D12
+5VALW
.1UF
U32
20
VOL_UP#
VOL_DW#
KILL_SW
+3VALW
11
SELIO#
1G
2G
10
14
12
KBA3
1
19
U25D
74LVC32
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
18
16
14
12
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
+3VALW
14
9
KBA4
U25C
74LVC32
8
SELIO#
GND
34
34
28,34
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
VCC
2
4
6
8
11
13
15
17
20
EXTID0
20
EXTID1
20
EXTID2
27 BT_WAKE_UP
2
.1UF
2
20
1
DAN202U
1
10
7
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
3
4
7
8
13
14
17
18
D0
D1
D2
D3
D4
D5
D6
D7
BB
LARST#
11
1
CLK
CLR
U26
2
5
6
9
12
15
16
19
VCC
2
C316
74LVC244
PWR_LED# 34
2nd_BATT_LOW_LED# 34
BATT_LOW_LED# 34
BATT_CHGI_LED# 34
WL_OFF# 28
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
PCMRST# 24
EN_LAN# 21
GND
+3VALW
10
PCM_LED
3
23 PCM2_LED
C243
2
1
23 PCM1_LED
74HCT273
DD
13
7
+5VALW
2
SELIO#
1
U30
4
C151
1
2
FLASH_VCC
KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA[0..18]
ADB[0..7]
1
2N7002
U44
7SH32FU
FWR#
32
32,39
32,39
EC_SMC1
EC_SMD1
R214
4.7K
4.7K
1
2
.1UF
U21
8 VCC
7 WC
6 SCL
5 SDA
R205
100K
A0
A1
A2
GND
2
R206
2
EC_FLASH# 18
1
1
1
Q36
3
1
2
2
G
100K
S
4
+12VS
1
2
3
4
NM24C16
R198
100K
74LVC244
2
1
R159
1
R156
2
@0
2
0
+5VALW
1
C158
+3VALW
U15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
@SST39VF040_TSOP
KBA[0..18]
ADB[0..7]
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
2
.1UF
U16
U14
.1UF
32
32
2
FWE#
D
1G
2G
2
5
1
19
1
3
7SH32FU
+3VALW
1 R26
2 100K
1
2 100K
BID
1
2
R29
@100K
1 R27
2
100K
2 R557
1 @100K
2
1
R558 @100K
R433
R398
100K
3
R28
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
18
16
14
12
9
7
5
3
2
.1UF
1
KBA5
2
.1UF
1
C608
GND
5
1
VCC
20
C331
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
+5VALW
C280
2
.1UF
U24
10
+3VALW
+5VALW +5VALW
1
1
2
4
6
8
11
13
15
17
+3VALW +3VALW
C290
2
+3VALW
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3
FRD#
32
FSEL#
32
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#
FLASH_VCC
FLASH_VCC
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A11
A9
A8
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
A6
A5
A4
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3
Compal Electronics, inc.
@29F040_TSOP
29F040/SST39VF040_PLCC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
33
of
43
5
4
3
2
1
1
+3VALW
+3VALW
1
R85
470K
Switch Board Connector
R273
2
EC_RST#
EC_RST# 32
2
1
470K
D
2
PC7
2N7002
3
32
JP6
19,32
ON/OFF
32
51ON
33 2nd_BATT_LOW_LED#
27,33
RFOFF#
28,33 KILL_SW
32 ARROW_LED#
33
INTERNET#
33
VOL_DW#
18,32,37,40 ACIN
33 BATT_LOW_LED#
33
HDD_LED#
32
CDON#/MP3
Q26
1
R19
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
@0
+3VALW
2
.1UF
5
1
C321
C
+5VALW
+3V
4 LPCPD#
LPCPD#
2
3
15,17,21,25 SUS_STAT#
LPCPD#
R233
U28
1
8,15,17,19,20,21,22,23,24,25,28,29 PCIRST#
32
D
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
51ON#
37
LID_SW# 32
MP3#
32
SM_LED 29
CAPS_LED# 32
NUM_LED# 32
BUTTON1# 33
VOL_UP# 33
PWR_LED# 33
BATT_CHGI_LED# 33
2ND_CHGI_CD_FDD_LED# 33
SMLED
+3VALW
+3VS
SUYIN-80065A-040G2T
7SH08FU
@0
C
For PC87591 REV 0.A Only
FAN CONN.
+12V
+5V
1
B
B
EN_DFAN
5 VCC
1
EN_DFAN
1N4148
3
2
@10UF_16V_1206
2
FAN1
2
1SS355
JP10
D35
1N4148
1
2
3
VEE LMV321_SOT23-5
53398-0310-FAN
+3V
1
2
.1UF
Q33
2SA1036K
4
1
R113
13K_1%
3
2
.1UF
U39
2
1
C556
.1UF
C157
C569
D38
2
32
D37
1
2
C548
Q29
FMMT619
E
1
+5V
1
2
1
2
C
2
B
1
1
3.6K
1
R160
1
R347
7.32K_1%
2
R369
FAN_SPEED
2
10K
32
A
A
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
5
4
3
2
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
1
34
of
43
A
B
C
D
E
+3V
RTC Batt. Connector
+3V
2
-
U36C
14
U36D
14
R101
.1UF
+
+3V
R105
47K
+RTC_BATT
C141
1
1
2
BATT1
330K
RTCBATT
6
9
8
7
74LVC14
7
74LVC14
C526
.22UF
+3V POWER
PM_RSMRST# 17
+3V POWER
1
2
1
PM_RSMRST#
5
1
+RTCVCC
1
2
1
W=30mils
2
W=30mils
D1
RB751V
CHGRTC
+5V
+3V
C111
1
1
D3
RB751V
C131
.1UF
1
+3V
47K
R102
330K
U36E
14
2
2
4
2
11
10
1
1
1
74LVC14
7
2
H31
H32
H33
H35
H37
.1UF
H38
+3VS
2
EMI FINGER
EMI FINGER
1
1
1
EMI FINGER
1
1
EMI FINGER
1
1
1
1
+5VS
EMI FINGER
H2
H8
ST2
ST3
ST4
2
H18
5
MR#
3
PFI
U11
MAX6342
RST#
6
Stand-Off 053
Stand-Off 090
PFO#
4
+3V POWER
R103
10K
2
.1UF
SYS_PWROK 17
2
1
2
1
.01UF
C138
8
2
Stand-Off 053
1
Stand-Off 053
H10
+3V
H9
1
H27
1
Stand-Off 115
H12
1
Screw Boss 070 Stand-Off 090
1
1
1
1
240K
C137
2
R127
U37C
74LVC125
9
1
ST1
2
1
100K
VCC
1
R126
C136 .1UF
2
GND
EMI FINGER EMI FINGER
7SH32FU
3
C113
H30
.1UF
10
2
Place near ICH3-M
2
U35
5
R106
R97
2
13
1
1
1
1
100K
U37D
74LVC125
3
3
H29
H20
1
2
R107
@0
I Fixed Position Hold F Fixed Position Hold
H17
H21
H19
H26
1
1
1
1
1
1
1
1
1
L Screw Hold
M Screw Hold
N Screw Hold
O Screw Hold
O Screw Hold
O Screw Hold
O Screw Hold
O Screw Hold
O Screw Hold
1
1
1
CF10
CF6
CF7
CF8
CF3
CF5
CF19
CF20
CF17
CF12
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
FD2
FIDUCAL
FD1
FIDUCAL
FD3
FIDUCAL
FD5
FIDUCAL
FD4
FIDUCAL
1
H7
1
H13
1
H14
1
H24
1
H11
1
1
M Fixed Position Hold
1
1
I Screw Hold
1
1
G Screw Hold
1
1
F Screw Hold
CF2
CF4
CF1
CF9
SMD40M80 SMD40M80 SMD40M80 SMD40M80
1
1
D Screw Hold
1
1
C Screw Hold
1
1
CF11
CF18
CF15
CF13
CF16
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80
A Screw Hold
ICH_VGATE 17
+3V POWER
H22
H5
11
1
H4
12
VGATE
1
H1
42
1
H23
J CPU Thermal Plane Screw Hold
1
H28
J CPU Thermal Plane Screw Hold
1
H3
J CPU Thermal Plane Screw Hold
1
J CPU Thermal Plane Screw Hold
FD6
FIDUCAL
1
1
H6
1
H15
1
H16
1
4
H25
1
4
Compal Electronics, inc.
A
1
E HDD Frame Hold
1
E HDD Frame Hold
1
1
Title
E HDD Frame Hold
E HDD Frame Hold
PROPRIETARY NOTE
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C
D
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
E
35
of
43
A
B
C
+1.5VS
R440
1M
ON_GATE
+5VS_GATE
+12VALW
R438
100K
C242
SYSON#
.01UF
Q12
C16
4.7UF_10V_0805
3
2
2
S
SUSP
1
2
1
1K
2N7002
2
.01UF
D
2
G
C20
C23
C25
1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805
R20
SI4800
2
SYSON#
12
1
C624
1
1
2
1
ON_GATE
1
SYSON#
1
S
S
S
G
1
1
D
D
D
D
2
1UF_25V_0805
SI4702DY
1
2
3
4
1
1
U4
8
7
6
5
2
2
+1.5V
C247
1
1UF_25V_0805
S2
S2
VHV
S1
VON/OFF
2
4.7UF_10V_0805
4.7UF_10V_0805
SI4702DY
VIN
VIN
VIN
C245
4.7UF_10V_0805
1
C246
C639
3
4
8
1
2
1
C636
+1.5V TO +1.5V_SW Transfer
+5V
U20
7
6
5
2
2
1
S2
S2
VHV
S1
VON/OFF
1
VIN
VIN
VIN
+5VALW
2
C628
4.7UF_10V_0805
3
4
8
1
2
1
2
+3V
U47
7
6
5
E
+5VALW To +5V Transfer
+3VALW To +3V Transfer
+3VALW
D
D
Q5
2N7002
2
G
3
S
+3VALW To +3VS Transfer
+12V
R183
470
R193
1K
SUSP
Q16
2N7002
1
1
1
Q56
2N7002
2
G
D
S
2
G
Q19
2N7002
3
S
3
S
D
3
12
1
2
2
D
2
G
1K
2
SUSP
SYSON#
C22
C17
C24
1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805
R23
SI4800
C14
4.7UF_10V_0805
R211
1M
1
C26
.1UF
2
100K
12
1
2
1
R212
2
1
+5VS_GATE
+5VS_GATE
2
+3VS
2
+3V
2
10UF_16V_1206
1
2
3
4
S
S
S
G
2
C260
D
D
D
D
1
2
10UF_16V_1206
8
7
6
5
1
1
C258
10UF_16V_1206
2
C6
10UF_16V_1206
2
C277
1
1
C268
SI4702DY
C323
4.7UF_10V_0805
+1.8VS
U3
1
S2
S2
VHV
S1
VON/OFF
1
2
VIN
VIN
VIN
+1.8V
2
SUSP
1UF_10V_0603
3
4
8
1
2
7
6
5
+1.8V_ALW TO +1.8V_SW Transfer
+3VS
U22
1
+3VALW
+5VALW To +5VS Transfer
+5V
+5VALW
+5VS
+1.8V
+5VS
1
SYSON#
SUSP
2
G
+5VS_GATE
1
2
1
D
2
330K
2N7002
2
G
1
1
1
1
2
2
2
C8
C10
C9
1UF_10V_0603 4.7UF_10V_0805 4.7UF_10V_0805
C13
4.7UF_10V_0805
D
2
G
Q55
2N7002
S
3
Q2
R436
C621
.01UF
SUSP
3
2
S
3
3
Q15
2N7002
S
1
C658
4.7UF_10V_0805
D
2
4.7UF_25V_1206
12
4.7UF_25V_1206
R465
1K
C676
1
4.7UF_25V_1206
R182
470
1
1
C679
3
SI4702DY
.1UF
C677
2
4.7UF_10V_0805
C675
2
C672
1
1
3
4
8
1
2
2
S2
S2
VHV
S1
VON/OFF
2
SUSP
VIN
VIN
VIN
2
7
6
5
1
1
U50
+3VALW
+3VALW
10K
1K
1K
SYSON#
2
2
3
6
12
S
SYSON
G1
2
Q22A
SI1906DL
29,32,40
SUSP#
SUSP# 5
G2
Q22B
SI1906DL
1
1
32
Q57
2N7002
4
3
2
1
1
4
+12VS
1
12
C683
1UF_25V_0805
D
2
SUSP# 2
Q59 G
2N7002
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
S
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星, 星星星 26, 2001
Date:
3
2
2
3
2
1
2
Q13
2N7002
3
S
1000PF
D
SUSP 2
G
SUSP
D
R471
51K
C235
1UF_25V_0805
D
1UF_25V_0805
Q14
2N7002
3
12
1
1
1
2
3
G
D
4
S
Q58
NDS352P
2
D
2
G
41
S2
+12V
SYSON#
C684
SYSON#
S1
1
R469
100K
.1UF_25V_0805
G
2
C682
S
S
1
C238
D2
1
+12VALW
1UF_25V_0805
Q11
NDS352P
2
R179
47K
12
R467
4.7K
R180
100K
.1UF_25V_0805
1
R216
R178
D1
2
1
+12VALW
C239
2
G
C241
R210
1
+12VALW
1
+12VALW To +12VS Transfer
1
+12VALW
+12VS
1
+12V
+12VALW To +12V Transfer
SYSON
Rev
1A
401204
A
B
C
D
Sheet
E
36
of
43
A
B
C
D
Vin Detector
High 16.265 15.526 14.808 V
Low 15.628 14.919 14.198 V
VS
1
VIN
1
PR2
1M_1%
2
PL1
CHC4532U800_1812
1
1
PR1
@10_1206
1
PC4
100PF_50V
PZD1
@RLZ24B
1
1
-
1
+
2
PU1A
LM393M
4
PC3
1000PF_50V
PC6
0.1UF_50V
2
ACIN
18,32,34,40
PACIN
38
PZD2
RLZ3.6B
PR8
10K
2
1
2
2
1
PR11
10K
PL2
CHC4532U800_1812
3MM
2
PJP1
1
2
2
2
PC2
100PF_50V
PR7
24K_1%
3
2
PC1
1000PF_50V
2
2DC-S026B201 2.5D 5P
PC5
1000PF_50V
2
2
21
PD1
BYS10-45
1
1
2
3
2
1
1
3
PR6
22K
2
1
1
PR5
1K
10K
2
2
1
PR3
PR4
84.5K_1%
8
PF1
5A 32V UL/CSA FAST
PCN1
1
1
1
VIN
RTCVREF
3.3V
2
2
2
VIN
PD3
RB751V
2
PD2
RLS4148
1
1
BATT+
PR15
33_1206
PZD3
RLZ6.2C
2
CHGRTCP
3
2
1
PR19
200
2
PC12
1UF_0805_25V
PC11
0.1UF_0805_25V
PZD4
RLZ16B
34
1
51ON#
3
2
PR17
22K
2
PC13
10UF_1206_10V
PC10
0.22UF_1206_25V
2
3
2
2
PR16
100K
3
1
2
1
CHGRTC
1
1
200_0805
3.3V
2
S-81233SGUP (SOT-89)
1
*
1
PR18
PU2
1
RTCVREF
VS
PQ1
TP0610T
3
1
PJP2
+12VALWP
2
PJP5
1
+12VALW
(120mA,20mils ,Via NO.= 1)
+1_5VP
2
JOPEN/+12V
1
+1.5V
(1.5A,60mils ,Via NO.= 3)
+1.8V
(3A,120mils ,Via NO.= 6)
+VTT
(6A,240mils ,Via NO.= 12)
PJP6
PJP3
+5VALWP
1
3MMA/CPU_IO
2
+5VALW
(5A,200mils ,Via NO.= 10)
+3VALW
(5A,200mils ,Via NO.= 10)
+1_8VP
2
1
3MMA/CPU_IO
PAD-OPEN 4x4m
PJP4
4
+3VALWP
1
PJP7
2
+VTTP
PAD-OPEN 4x4m
1
4
2
PAD-OPEN 4x4m
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星
Date:
, 星星星 26, 2001
Rev
1A
401204
A
B
C
Sheet
D
37
of
43
A
B
C
D
1
1
PQ4
SI4835DY
PC14
PC16
0.1UF_0805_25V
PC17
@1000PF
4
1
ACOFF#
-INC2
+INC2
24
2
2
G
PR27
10K
OUTC2 GND
23
PQ7
2N7002
VIN
1
PC18
220PF_50V
3
+INE2
CS
22
1
2
4
-INE2 VCC(o)
21
1
2
FB2
OUT
20
VH
19
VCC
18
RT
17
2
4
PQ5
FDS4435
100K
2
ACOFF
32
2
6
VREF
LXCHRG
PC25
0.1UF_0805_25V
1
2
1
2
1
2
PC24
2200PF_50V
2
PR32
10K
PR36
162K_1%
1
2
8
-INE1
1
10
+INE1
-INE3
1
FB3
15
11
OUTD
CTL
14
12
-INC1
+INC1
13
FSTCHG
2
PR34
68K
16
OUTC1
PC30
0.1UF_16V
1
2
PR38
47K
CC=0.5~2.0A
CV=14.4V(8 CELLS)
32
1
PL4
22UH_SPC-1205P-220A
1
2
1
PD6
1SS355
2
PC27
1500PF_50V
1
2
PR39
100K_1%
PR37 10K
2
1
BATT+
2
PR35
0.02_2512_1%
PD8
RB051L-40
PR40
47K
+
3
2
2
2
IREF=1.31*Icharge
IREF=0.73~2.63V
FB1
9
1
IREF
7
2
PC23
0.1UF_16V
5
6
7
8
PC19
0.1UF_0805_25V
PC22
0.1UF_50V
1
2
1
2
2
PC21
PR31
4700PF_50V 10K
5
PC29
4.7UF_1210_25V
2
1
1
PC28
4.7UF_1210_25V
2
1
2
PC26
100UF_EC_25V
2
1
1
PQ6
DTC115EK
3
PR30
10K_1%
2
PC20
0.1UF_16V
100K
1
PR29
24.9K_1%
1
3
1
S
32
2
PR24 47K
3
2
1
1
1
2
D
1
1
1
1
PACIN
1
PR28
10K
2
2
PR23 10K
2
PR26
150K
2
1
PR25
0
PU3
MB3878
2
1
2
3
8
7
6
5
4
1
PD5
1SS355
ACOFF#
37
1
2
3
2
2
4.7UF_1210_25V
2
4.7UF_1210_25V
PR22
200K
4
PR21
10K
PC15
1
1
2
2
1
8
7
6
5
PL3
FBM-L11-453215-900LMAT_1812
1
2
1
1
2
3
PR20
0.02_2512_1%
2
1
1
2
3
1
8
7
6
5
B++
B+
PQ3
SI4835DY
2
PQ2
SI4835DY
VIN
Iadp=0~2.9A
P3
1
P2
2
1
PR41
47K_1%
2
1
PR42
115K_1%
4.2V
4
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date:
A
B
C
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
D
38
of
43
A
B
C
D
PH1 under CPU botten side :
CPU thermal protection at 82 degree C
Recovery at 50(51) degree C
1
1
VL
1
PC31
1000PF_50V
PJP8
PF2
7A 24V UL/CSA FAST
PR66
1K
* PR61
47K
PC33
0.01UF_50V
TM_REF1
6
40
+
7
ALI/MH#
2
PC9
0.22UF_0805_16V
2
2
PH1
10K_1%
PD15
@BAS40-04
MAINPWON
MAINPWON
PU1B
LM393M
4
3
1
2
5
2
2
PR48
100
1
1
PR43
1K
PR12
16.9K_1%
+3VALWP
PC8
1000PF_50V
SUYIN 25063A-07G1-E 7P P2.5
1
1
PR47
100
PR10
47K_1%
PC7
0.1UF_50V
8
2
1
1
ALI/NIMH#
AB/I
TSA
PR9
2.15K_1%
BATT+
2
1
2
3
4
5
6
7
PL5
BLM41P600S_1806
2
1
2
*
2
1
VS
VL
PR13
100K_1%
32
2
PR14
100K_1%
+3VALWP
1
1
PR59
25.5K_1%
2
PR63
1K
PH2 near main Battery CONN :
BAT. thermal protection at 73 degree C
Recovery at 50(51) degree C
2
3
PD16
@BAS40-04
1
2
VS
VL
EC_SMD1 32,33
PC117
0.1UF_50V
PR170
2.37K_1%
EC_SMC1 32,33
3
PD10
@BAS40-04
PR172
10K_1%
8
PD9
@BAS40-04
3
+
2
-
*
1
PU9A
LM393M
PC119
0.22UF_0805_16V
+5VALWP
PH2
10K_1%
PC118 1000PF_50V
4
3
2
2
TM_REF2
3
PR171
47K_1%
1
1
EC_SMC1
2
EC_SMD1
3
1
BATT_TEMPA 32
VL
PR173
100K_1%
PR174
100K_1%
4
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星
Date:
, 星星星 26, 2001
Rev
1A
401204
A
B
C
Sheet
D
39
of
43
A
B
C
+5VALWP
VS
DAP202U
PD20
PC50
4.7UF_1206_16V
PC46
2.2UF_0805_16V
5
6
7
8
PQ20
SI4800
27
OUT1_D
26
OUTGND1
23
VCC
TRIP2
18
OUT2_D
19
OUTGND2
20
2
VL
PR97
11.5K_1%
PR100
47K
G
S
S
S
4
3
2
1
INV2
15
PC61
2200PF_50V
PC66
150UF_D_6.3V
PR94
220
+
PC67
10PF_50V
VL
+3VALWP
1
FB2
PGOD
SCP
STBY2
STBY1
SOFT2
13
12
11
10
9
PC56 0.01UF_50V 14
PC60 4700PF_50V
+
PZD7
RLZ4.3B
PC65
@150UF_D_6.3V
PR99
@100K
+3.3V : Ipeak = 6.66A ~10A
MAINPWON 39
150K
PC70
0.047U_16V
3
1
3
PC71
0.01UF_50V
PR202
100K
PR103
100K
1
2
1
PC121
1UF_0805_25V
PQ44
3 FMMT3904
PR203
47K
PQ24
2N7002
2
3
PR207
10K
PZD8
RLZ7.5B
5V_STBY
VS
1
VIN
1
PR204
100K
1
PQ45
3 FMMT3904
2
2
2
3
PC72
SCP
0.1UF_0805_25V
PC122
1UF_0805_25V
22K
1
2
1
PR104
B++
VL
PR205
47K
2
47K
10K
PQ43
DTA144WKA
1
4
1
PQ25
TP0610T
2
3
PD23
BYS10-45
PR96
11.5K_1%
5V_STBY
PR102
100K
18,32,34,37 ACIN
2
MAINPWON
100K
PQ23
DTC115EK
3
33.2K_1%
PR92
330
2
2
PR90
PR101
47K
VS
SUSP#
PQ22
SI4810DY
PC54
@1000PF_50V
+3VALWP
0.85VREF
1
+5V : Ipeak = 6.66A ~ 10A
29,32,36
0
2
PC63
150UF_D_6.3V
SCP
47P_50V
PC64
2200PF_50V
PC59
PC57
3300P_50V
+
PC58
PC62
150UF_D_6.3V
PZD6
RLZ6.2C
2
PD22
BYS10-45
24
25
TRIP1
REF
GND
8
7
0.1UF_16V
5V_STBY
CT
SOFT1
3
FB1
INV1
2
1
6
S
S
S
G
1
1
+
PC69 0.01UF_50V
GND
PR91
330
PR93 430
2
PC68
4.7UF_1206_16V
+5VALWP
3
LL2
PU6
57.6K_1%
VIN
17
1
10UH_SPC_1205P_100
PR88
PR89
+12VALWP
VOUT
OUT2_U
0
TPS5120
PU7
XC6202
1
PR86
1
LL1
2
2
28
PL7
16
5
6
7
8
OUT1_U
PC55
@1000PF_50V
2
1
PC52
0.1UF_0805_25V
LH2
0
1
2
3
4
2
PT1
10UH_SDT-1205P-100-118
PR87
SKIP/PWM #
PQ21
SI4810DY
PC53
2.2UF_1206_25V
29
3
D
D
D
D
2
PZD5
RLZ16B
4.7UF_1210_25V
D
D
D
D
8
7
6
5
PC51 0.1UF_0805_25V
1
PD21 EC11FS2
LH1
REG5V_IN
30
21
22
0
1
5
4
4
2
VREF5
PR85
1
PC42
0.1UF_0805_25V
D
D
D
D
PR83
15K_1%
1
2
3
4
PR84
22_1206
PR82
15K_1%
PC41
4.7UF_1210_25V
4
3
2
1
S
S
S
G
PQ19
SI4800
PC40
G
S
S
S
1
D
D
D
D
PC44
4.7UF_1210_25V
2
PC49
470PF_0805_100V
1
PC48
0.1UF_0805_25V
PC47
0.1UF_0805_25V
VL
8
7
6
5
1
PC45
4.7UF_1210_25V
B++
3
2
B++
PC43
2200PF_50V
D
4
PR105
2
330
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星
Date:
, 星星星 26, 2001
Rev
1A
401204
A
B
C
Sheet
D
40
of
43
A
B
+1_8VP
PQ26
SI3442DV
D
S
1
4
PC73
47UF_D_6.3V
8
PU8A
LM358A
+
PC76
220PF_50V
1
PR106
5.1K
1
PC75
0.1UF_50V
2
1
PR107
0
2
+5VALWP
2
+1_5VP
3
PC74
4.7UF_1206_25V
D
+1.5V+-5%
G
6
5
2
1
1
C
+
3
-
2
2
1
PC77
0.01UF_50V
1
1
PR109
30.1K_1%
1
4
PC78
68PF_50V
VL
PR108
69.8K_1%
2
1
100K
2
2
1
2
SYSON#
36
2
2
PR111
5.1K
*
100K
3
PQ27
DTC115EK
PR110
0
+1.8V+-5%
PQ28
SI3445DV
3
2
1
1
2
3
1
2
+ PC79
150UF_D_4V_FP
2
1
1
PD25
RB051L-40
PR114
10K
1
2
3
PQ30
HMBT2222A
1
PR112
191K_1%
G
PC80
4.7UF_1206_25V
PD24
RB751V
+1_8VP
PL8
5UH-SPC-06704-5R0
1
2
2
2
4
LX18
1
S
6
5
2
1
1
D
+5VALWP
1
3
PR117
162K_1%
2
PR115
1K
PC81
2200PF_50V
2
8
2
+5VALWP
2
1
3
-
2
1
4
PU13A
LM393M
+
1
100K
PC85
0.01UF_50V
2
PR123
1
3
PQ32
2SA1036K 1
0.85VREF
10K
2
3
2
100K
PQ33
DTC115EK
4
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星
Date:
, 星星星 26, 2001
Rev
1A
401204
A
B
C
Sheet
D
41
of
43
A
B
C
D
PC91
4.7UF_1210_25V
B++
PC93
4.7UF_1210_25V
PC95
2200PF_50V
+3V
2
1
PC92
4.7UF_1210_25V
PR126
10K
PR127
10K
2
2
2
2
PR125
0
2
1
PR128
10K
PR129
10K
PC94
4.7UF_1210_25V
1
GL2
PR130
10K
+5VALWP
27
DH
28
23
D2
BST
26
1
24
D1
DL
16
PR141
25
D0
V+
1
14
VGATE
VCC
9
FB
4
TIME
51K
2
SDN/SKIP
POS
13
VDD
NEG
5
17
6
470PF_50V
1UF_0805_16V
1
18
5
6
7
8
3
2
1
3
2
1
2
3
2
1
+5VALWP
5
6
7
8
PQ39
SI4404DY
PQ40
SI4404DY
PD28
EC10QS04
REF
S1
8
12
ILIM
S0
7
15
GND
TON
4
1
NO2
V+
2
NO3
COM
9
10
NO0
8
3
NO1
4
INH
ADDA
7
GND
ADDB
6
1
2
PR151
@10K
2
2
1
1
PR178
1K_1%
1
D3
D2
0
0
0
0
D1
VOLTS
D0
D4 = 1
D4 = 0
1
0
0
0.975
1.75
0
1
@0
1
PR157
100K
PR208
0
1
2
2
1
H_DPSLP# 5,17
1
PR162
3
0
1
0
0.925
1.65
0
0
1
1
0.900
1.60
0
1
0
0
0.875
1.55
0
1
0
1
0.850
1.50
0
1
1
0
0.825
1.45
0
1
1
1
0.800
1.40
1
0
0
0
0.775
1.35
1
0
0
1
0.750
1.30
1
0
1
0
0.725
1.25
1
0
1
1
0.700
1.20
1
1
0
0
0.675
1.15
1
1
0
1
0.650
1.10
1
1
1
0
0.625
1.05
1
1
1
1
0.600
1.00
@0
100K
1
0
PQ41
@DTC115EK
1
ADDB
X
0
1
0
1
4
Title
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
星星星
Date:
, 星星星 26, 2001
Rev
1A
401204
A
3
1.70
0.950
@0
2
1
PR161
@61.9K_1%
CPU_COREP OUTPUT_ MODE
PR160
@16.2K_1%
1
ADDA
X
1
1
0
0
2
2
@0
PM_DPRSLPVR 7,17
2
2
2
1
PR159
@604K_1%
2
4
Vout(0A)
0.850
1.094
1.199
1.134
1.248
- 4
PR176
1K_1%
PM_GMUXSEL 7,17
PR156
2
PR154
0
MODE
RBOTTOM
X
16.2K
19.6K
61.9K
604K
PU14
MAX4322
PR148
0
PR153
@0
PU11 @MAX4524
2
0
PR158
@19.6K_1%
OFFSET
0mV
-56mV
-51mV
-16mV
-1.8mV
1
+3VALWP
PR149
1
0
PR150
249K_1%
MODE
DEEPER SLEEP
BATTEY SLEEP
PERFORMANCE SLEEP
BATTERY MODE
PERFORMANCE MODE
2
0
2
COM
1
PR152
0
CPU CONTROL
PR142
+ 3
10
5
PR155
150K_1%
1
PC103
1000PF_50V
GL3
3
PR201
2
PR146
100
PR177
499_1%
5
PC120
0.1UF_0805_25V
4
2
PR200
2
2
4
5
6
7
8
5
6
7
8
PQ38
SI4404DY
2
PR175
180K
19
SUS
11
VR_ON
PR147
150K
ZMODE
OVP
PC96
0.1UF_0805_25V
1
32
PC105
2
CC
2
0
2
3
20
1
PC98
220UF_D_4V
BL2
1
1
4.7UF_1206_16V
PC104
PC97
220UF_D_4V
2
PC102
+VCC_H_CORE
+
1
LX
D3
3
2
1
PR145
1
+
3
2
1
PC123
@0.01UF_50V
2
D4
22
1
21
3
2
1
2
1
PR137
1
2
PR206 @1K
2
PQ36
SI4894DY
PL9
0.7UF HK-RM136-22A0R7
PC100 @0.01UF_50V
PR144
@0
PD27
1SS355
0.1UF_0805_25V
1
LC
4
PQ35
SI4894DY
PU10 MAX1718
1
2
10
PC99
1
4
PQ34
SI4894DY
PR135
20
VGATE
2
35
0
2
0
2
PR140
1
1
PR143
@10K
2
PR138
1
0
2
+3V
PR133
CPU_VID0
4
PR139
0.002_21515_1%(2W)
2
PR132
1
7
2
CPU_VID1
0
CPU_VID2
7
PR136
7
1
PC101 4.7UF_1206_16V
CPU_VID3
0
7
2
CPU_VID4
1
PR131
0_0805
7
5
6
7
8
5
6
7
8
2
1
1
1
1
1
BL1
B
C
Sheet
D
42
of
43
5
4
3
2
1
D
D
2
+5VALWP
1
PR163
0_0805
PC107
4.7UF_1210_25V
C
C
PR164
2
B++
10
PC106
0.1UF_0805_25V
PC109
4.7UF_1206_16V
PD29
1SS355
4
5
3
6
2
7
1
8
PC108
4.7UF_1210_25V
PU12
15
VCC
VDD
14
18
SKIP
BST
19
DH
1
PGOOD
LX
20
IO_LX
SHDN
DL
13
IO_GL5
10
VTT_PWRGD
3
VTT_ON
PR166
1
1
PR169
84.5K_1 %
2
0
Vref 2.0V
PR168
15K_1%
6
ILIM
PGND
12
2
N/C
N/C
11
7
REF
N/C
9
16
TON
OUT
5
FB
4
8
AGND
IO_GL4
PC111
0.1UF_0805_25V
PL10
10UH_SPC-1205P-10 0
PQ42
SI4834DY
PR165
2.49K_1 %
PD30
EC10QS 04
+
PC112
150UF_D_6.3V
PR167
10K_1%
IO_FB
MAX1714A
2
(+1.25V : I_peak = 6A)
+VTTP
1
5
32
V+
IO_BST
2
17
1
PC110
4.7UF_1206_16V
FB 1.0V
PC113
0.1UF_16V
B
B
PC114
@150PF_ 50V
PC115
@0.1UF
A
A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
4
3
2
Compal Electronics, inc.
SCHEMATIC, M/B LA-1311
Size
B
Date:
Document Number
Rev
1A
401204
星星星, 星星星 26, 2001
Sheet
1
43
of
43
www.s-manuals.com
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.6 Linearized : No XMP Toolkit : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39 Create Date : 2002:02:05 15:58Z Modify Date : 2014:11:05 19:29:29+02:00 Metadata Date : 2014:11:05 19:29:29+02:00 Producer : Acrobat Distiller 4.0 for Windows Format : application/pdf Title : Compal LA-1311 - Schematics. www.s-manuals.com. Creator : Subject : Compal LA-1311 - Schematics. www.s-manuals.com. Document ID : uuid:76703653-bc33-4ed7-99e6-b9c716dbd5ee Instance ID : uuid:f515c6ea-804a-4c95-b096-f74f41f7042e Page Count : 43 Keywords : Compal, LA-1311, -, Schematics., www.s-manuals.com.EXIF Metadata provided by EXIF.tools