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A B C D E 1 1 HAZ00/HTW01 2 2 LA-2861 REV 1.0 Schematic 3 3 UFC-PGA Dothan/ RC410MD(RC410MB)/ SB450 2005-07-11 Rev.1.0 4 4 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Compal Electronics, Inc. Title Black Diagram Size B Date: Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Rev 1.0 Sheet E 1 of 42 A B HAZ00 & HTW01 C LA-2861 FUNCTION BLOCK INTEL Celeron 479 pin 4 D FSB page 13 DIAGRAM 4 Thermal Sensor ADM1032ARM PAGE 4,5,6 CRT Conn. E Clock Generator ICS951411AGT PAGE 5 CPU VID PAGE 11 PAGE 5 400MHz PAGE 33 RTC Battery PAGE 14 DC/DC Interface PAGE 34 LID/Kill Switch Power Buttom LCD Conn page 12 ATI-RC410MB 400/533/667MHz (1.8V) Memory Bus LVDS & TV-OUT Conn. PAGE 31 SO-DIMM x 2(DDRII) BANK 0,1,2,3 PAGE 9,10 VGA M10P Embeded 707 pin BGA page 12 3 FANController DCIN&DETECTOR PAGE 35 BATT CONN/OTP PAGE 36 CHARGER PAGE 37 3V/5V/12V PAGE 38 DDR_1.8V/0.9VEP PAGE 40 1.8VCORE PAGE 39 1.5V/PROCHOT PAGE 40 CPU_CORE PAGE 41 3 PAGE 6,7,8 A-Link Express x 4 2.5GHz(1.2V) Bandwidth 500MB 480MHz(5V) Primary ATA-100 (5V) ATI-SB450 PCI BUS 33MHz (3.3V) Secondary ATA-100 (5V) 2 CB1410 PAGE 20 TSB43AB21 Mini PCI FOR WLAN PAGE 22 PAGE 23 IDE HDD PAGE 26 564 pin BGA CARDBUS USB 2.0 Port *3 0,2,4 PAGE 36 HAZ00 IDE ODD PAGE 21,22,23,24,25 2 PAGE 26 LPC BUS 33MHz (3.3V) BL10E IDE ODD CARD BUS SOCKET 1394-Port PAGE 22 PAGE 26 Embedded Controller LAN RTL8100CL PAGE 19 AC-LINK 14.318MHz(3.3V) ENE KB910PAGE 29 AC97 CODEC ALC 250 PAGE 21 Audio Amplifier APA2068 PAGE 25 PAGE 24 RJ-45 MDC Connector PAGE 19 BIOS(1M) & I/O PORT 1 PAGE 30 Scan KB PAGE 33 PAGE 30 1 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Compal Electronics, Inc. Black Diagram Size B Date: Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Rev 1.0 Sheet E 2 of 42 A B C D Voltage Rails 1 2 SIGNAL STATE Power Plane Description S1 S3 S5 VIN Adapter power supply (19V) ON ON ON B+ AC or battery power rail for power circuit. ON ON ON +CPU_CORE Core voltage for CPU ON OFF OFF +CPUVID 1.2V switched power rail for CPU AGTL Bus ON OFF OFF +VGA_CORE 1.0V/1.2V switched power rail for VGA chip ON OFF OFF +1.2VS 1.2VS for PCI-Express ON OFF OFF +0.9VS 0.9V switched power rail ON OFF OFF +1.5VS DOTHAN B ON OFF OFF +1.8VS 1.8VS switched power rail ON OFF OFF E SLP_S3# SLP_S5# +VALW +V +VS Clock HIGH HIGH ON ON ON ON HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW ON OFF OFF OFF Full ON S1(Power On Suspend) 1 Board ID Table for AD channel +1.8VALW 1.8V always on power rail ON ON ON* +1.8V 1.8V power rail ON ON OFF Vcc Ra +3VALW 3.3V always on power rail ON ON ON* Board ID +3VS 3.3V switched power rail ON OFF OFF +5VALW 5V always on power rail ON ON ON* +5VS 5V switched power rail ON OFF OFF +12VALW 12V always on power rail ON ON ON* +RTCVCC RTC power ON ON ON 0 1 2 3 4 5 6 7 3.3V +/- 5% 100K +/- 5% Rb 0 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC V AD_BID min 0 V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V V AD_BID typ 0 V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V V AD_BID max 0 V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V 2 Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. External PCI Devices Device IDSEL# TI 1410 AD20 REQ#/GNT# 2 LAN Interrupts Board ID 0 1 2 3 4 5 6 7 PIRQA/PIRQB A D22 1 PIRQG Mini-PCI(WLAN) AD18 3 PIRQF/PIRQG 1394 AD16 0 PIRQA 3 EC SM Bus1 address EC SM Bus2 address Device Address Device Address Smart Battery 0001 011X b ADM1032 1001 110X b Device Address Clock Generator (ICS951413BGLFT) 1101 001Xb DDR DIMM0 1010 0100b DDR DIMM1 1010 0110b 3 SKU Status SKU ID 0 1 2 3 4 5 6 7 SB450 SM Bus address PCB Revision 0.1, 0.2 0.3 1.0 HDD Password NO Yes 0 1 1 Buttons 7 Buttons 4 4 A4 A6 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B Compal Electronics, Inc. Compal Secret Data Security Classification C D Title Notes List Size B Date: Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Rev 1.0 Sheet E 3 of 42 5 4 3 2 1 +3VS H_D#[0..63] H_D#[0..63] 6 U3 AE5 ADSTB0# ADSTB1# A16 A15 ITP_CLK0 ITP_CLK1 CLK_BCLK CLK_BCLK# B15 B14 BCLK0 BCLK1 6 6 6 H_ADS# H_BNR# H_BPRI# 6 6 6 6 H_DEFER# H_DRDY# H_HIT# H_HITM# N2 L1 J3 N4 L4 H2 K3 K4 A4 J2 B11 ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT# HITM# IERR# LOCK# RESET# 6 6 C 11 11 6 6,14 H_ADSTB#0 H_ADSTB#1 H_LOCK# H_RESET# H_BR0# H _IERR# H_RESET# H_RS#0 H_RS#1 H_RS#2 6 H_TRDY# B H1 K1 L2 M3 C8 B8 A9 C9 6 6 H_DBSY# H_DPWR# 14 H_PWRGOOD 14 H_CPUSLP# ITP_DBRRESET# A7 M2 H_DPSLP# B7 H_DPRSTP# G1 C19 A10 PREQ# B10 PROCHOT# B17 H_PWRGOOD H_CPUSLP# ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST# E4 A6 A13 C12 A12 C5 F23 C11 B13 THERMDA B18 THERMDC A18 H_THERMTRIP# C17 BPM0# BPM1# BPM2# BPM3# DBR# DBSY# DPSLP# DPRSTP# DPWR# PRDY# PREQ# PROCHOT# MISC PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST# A20M# FERR# IGNNE# INIT# LINT0 LINT1 THERMAL DIODE THERMDA THERMDC THERMTRIP# STPCLK# SMI# R68 @ 47K_0402_5% SCLK THERM# 4 28 EC_SMB_DA2 7 SDATA GND 5 D R69 47K_0402_5% MAINPWON 15,34,35,37,38 +1.05VS C 1 2 2 B C260 @ 0.1U_0603_25V7K E Q22 2SC2411K_SC59 +1.05VS 1 2 R67 56_0402_5% H_THERMTRIP# Q26 MMBT3904_SOT23 2 R166 470_0402_5% 2 1 11,14,40 CPU_STP# H_DPSLP# Q27 2 C MMBT3904_SOT23 +1.05VS 6 6 6 6 6 6 6 6 6 6 6 6 H_A20M# 14 H_FERR# 14 H_IGNNE# 14 H_INIT# 14 H_INTR 14 H_NMI 14 C6 B4 8 +1.05VS +CPU_CORE H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 LEGACY CPU 28 EC_SMB_CK2 ADM1032ARM_RM8 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 C2 D3 A3 B5 D1 D4 2 C23 K24 W25 AE24 C22 L24 W24 AE25 RS0# RS1# RS2# TRDY# 6 1 DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3# CONTROL GROUP 1 ALERT# 3 D25 J26 T24 AD20 HOST CLK VDD1 D- 2 DINV0# DINV1# DINV2# DINV3# REQ0# REQ1# REQ2# REQ3# REQ4# D+ 3 R172 470_0402_5% R2 P3 T2 P1 T1 DATA GROUP 2 THERMDC 2 1 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 ADDR GROUP U26 THERMDA 2200P_0402_50V7K R303 @ 10K_0402_5% 1 D 1 C503 C502 0.1U_0402_16V4Z 3 H_RS#[0..2] 2 1 H_REQ#[0..4] A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 3 H_RS#[0..2] D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# Dothan 1 6 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# 2 6 H_REQ#[0..4] P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 1 H_A#[3..31] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 2 6 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 1 1 JP19A H_A#[3..31] H_STPCLK# 14 H_SMI# 14 H_FERR# R72 2 1 PREQ# R77 2 1 @ 56_0402_5% H_DPSLP# R62 1 2 200_0402_5% H_BR0# R70 1 2 200_0402_5% H_DPRSTP# R71 2 1 @ 56_0402_5% ITP_TDI R79 2 1 ITP_TDO R78 2 1 @ 54.9_0402_1% 56_0402_5% 150_0402_5% H_RESET# R63 2 1 @ 54.9_0402_1% ITP_TMS R64 2 1 40.2_0402_1% PROCHOT# R66 2 1 56_0402_5% H _IERR# R75 2 1 56_0402_5% H_PWRGOOD R82 2 1 200_0402_5% H_CPUSLP# R81 1 2 200_0402_5% B Place Caps Close to CPU Socket C263 1 2 180P_0402_50V8J H_INIT# C255 1 2 180P_0402_50V8J H_A20M# C264 1 2 180P_0402_50V8J H_CPUSLP# C254 1 2 180P_0402_50V8J H_INTR C262 1 2 180P_0402_50V8J H_NMI C257 1 2 180P_0402_50V8J H_SMI# C261 1 2@ 180P_0402_50V8J H_STPCLK# C256 1 2 180P_0402_50V8J H_IGNNE# C265 1 2 180P_0402_50V8J H_PWRGOOD C640 1 2 180P_0402_50V8J H_FERR# +3VS ITP_DBRRESET# R76 2 1 @ 150_0402_5% ITP_TRST# R80 2 1 680_0402_5% ITP_TCK R65 2 1 27.4_0402_1% TEST1 R61 2 1 @ 1K_0402_5% TEST2 R294 2 1 @ 1K_0402_5% TYCO_1612365-1_Dothan A A THERMDA & THERMDC Trace / Space = 10 / 10 mil Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. Dothan(1/2) Size Document Number Custom HAZ00/BL10E (LA2861) Date: Monday, August 08, 2005 R ev 1.0 Sheet 1 4 of 42 5 4 3 2 1 +CPU_CORE +CPU_CORE JP19B D 1 1 1.5V FOR DOTHAN-B +1.5VS @ 54.9_0402_1% VCCSENSE @ 54.9_0402_1% VSSSENSE 2 2 +1.05VS 20mils +VCCA C495 1 AE7 AF6 2 0.01U_0402_16V7K F26 B1 N1 AC26 VCCA0 VCCA1 VCCA2 VCCA3 P23 W4 VCCQ0 VCCQ1 D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L5 L21 M6 M22 N5 N21 P6 P22 R5 R21 T6 T22 U21 1 C489 10U_0805_6.3V6M 2 C +CPU_CORE 40 1 +1.05VS 2 R249 1K_0402_1% 40 40 40 40 40 40 B 1 R250 2 2K_0402_1% 7,11 11 PSI# CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_BSEL0 CPU_BSEL1 VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP D6 D8 D18 D20 D22 E5 E7 E9 E17 E19 E21 F6 F8 F18 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC E1 PSI# E2 F2 F3 G3 G4 H4 VID0 VID1 VID2 VID3 VID4 VID5 GTL_REF0 AD26 Width 12mils spacing 15mils JP19C VCCSENSE VSSSENSE Dothan POWER, GROUNG, RESERVED SIGNALS AND NC R45 R44 GTLREF CPU_BSEL0 CPU_BSEL1 C16 C14 BSEL0 BSEL1 COMP0 COMP1 COMP2 COMP3 P25 P26 AB2 AB1 COMP0 COMP1 COMP2 COMP3 B2 C3 E26 AF7 AC1 RSVD RSVD RSVD RSVD RSVD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS TYCO_1612365-1_Dothan A R275 1 2 27.4_0402_1% COMP0 R274 1 2 54.9_0402_1% COMP1 R243 1 2 27.4_0402_1% COMP2 R245 1 2 54.9_0402_1% COMP3 A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 1 330U_D_2VM 1 + C180 @ 330U_D_2VM 1 1 + C492 2 330U_D_2VM 2 + C209 2 @ 330U_D_2VM 4 x 330uF(12mOhm/4) 2 +CPU_CORE 10U_0805_6.3V6M 1 1 C192 10U_0805_6.3V6M 10U_0805_6.3V6M 1 1 1 C195 C197 1 1 1 C454 C193 2 10U_0805_6.3V6M C194 2 2 10U_0805_6.3V6M C196 2 2 10U_0805_6.3V6M C198 2 2 10U_0805_6.3V6M 2 0.1U_0402_16V4Z +CPU_CORE 1 10U_0805_6.3V6M 1 C215 1 10U_0805_6.3V6M 1 C217 1 10U_0805_6.3V6M 1 C219 1 1 C453 C214 2 10U_0805_6.3V6M C216 2 2 10U_0805_6.3V6M C218 2 2 10U_0805_6.3V6M C220 2 2 10U_0805_6.3V6M 2 0.1U_0402_16V4Z +CPU_CORE 1 10U_0805_6.3V6M 1 C207 1 10U_0805_6.3V6M 1 C464 1 10U_0805_6.3V6M 1 C462 1 1 C452 C206 2 10U_0805_6.3V6M C465 2 2 10U_0805_6.3V6M C463 2 2 10U_0805_6.3V6M C461 2 2 10U_0805_6.3V6M 2 0.1U_0402_16V4Z +CPU_CORE 1 10U_0805_6.3V6M 1 C479 C477 2 10U_0805_6.3V6M 2 1 10U_0805_6.3V6M 1 C481 C480 2 10U_0805_6.3V6M 2 1 10U_0805_6.3V6M 1 C460 C478 2 10U_0805_6.3V6M 2 1 C482 2 10U_0805_6.3V6M +CPU_CORE 1 10U_0805_6.3V6M 1 C451 C475 2 10U_0805_6.3V6M 2 1 10U_0805_6.3V6M 1 C469 C473 2 10U_0805_6.3V6M 2 1 10U_0805_6.3V6M 1 C472 C474 2 10U_0805_6.3V6M 2 1 C,uF ESR, mohm ESL,nH 4X330uF 7m ohm/2 3.5nH/2 MLCC 0805 X5R 35X10uF 5m ohm/35 0.6nH/35 +1.05VS 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 + C467 2 1 C211 1 C459 2 2 1 C205 2 0.1U_0402_16V4Z 1 C199 2 1 C210 2 0.1U_0402_16V4Z 1 C212 2 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Dothan POWER, GROUND C468 2 10U_0805_6.3V6M Vcc-core Decoupling SPCAP,Polymer 150U_D2_6.3VM 1 C201 2 0.1U_0402_16V4Z 1 1 C191 2 C470 2 C471 2 0.1U_0402_16V4Z VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24 D C B TYCO_1612365-1_Dothan 0.1U_0402_16V4Z A Compal Secret Data Security Classification TRACE CLOSELY CPU < 0.5' 2005/03/01 Issued Date COMP0, COMP2 layout : Width 18mils and Space 25mils COMP1, COMP3 layout : Space 25mils 5 + C466 F20 F22 G5 G21 H6 H22 J5 J21 K22 U5 V6 V22 W5 W21 Y6 Y22 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC9 AC11 AC13 AC15 AC17 AC19 AD8 AD10 AD12 AD14 AD16 AD18 AE9 AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18 4 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 2 Title Compal Electronics, Inc. Dothan(2/2) Size B Date: Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet 1 5 of 42 A C D 4 H_ADSTB#1 4 4 4 4 4 4 H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# F25 F24 E23 E25 G24 F23 CPU_ADS# CPU_BNR# CPU_BPRI# CPU_DEFER# CPU_DRDY# CPU_DBSY# 4 H_LOCK# E27 CPU_LOCK# 4,14 H_RESET# 4 4 4 C11 H_RS#2 D23 H_RS#1 G23 H_RS#0 E26 F22 D26 E24 H_TRDY# H_HIT# H_HITM# CPU_CPURSET# CPU_RS2# CPU_RS1# CPU_RS0# CPU_TRDY# CPU_HIT# CPU_HITM# CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36# CPU_D37# CPU_D38# CPU_D39# CPU_D40# CPU_D41# CPU_D42# CPU_D43# CPU_D44# CPU_D45# CPU_D46# CPU_D47# CPU_DBI2# CPU_DSTBN2# CPU_DSTBP2# C18 H_D#32 F19 H_D#33 E19 H_D#34 A18 H_D#35 D19 H_D#36 B18 H_D#37 C17 H_D#38 B17 H_D#39 E17 H_D#40 B16 H_D#41 C15 H_D#42 A15 H_D#43 B15 H_D#44 F16 H_D#45 G18 H_D#46 F18 H_D#47 C16 H_DINV#2 D18 H_DSTBN#2 E18 H_DSTBP#2 CPU_D48# CPU_D49# CPU_D50# CPU_D51# CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59# CPU_D60# CPU_D61# CPU_D62# CPU_D63# CPU_DBI3# CPU_DSTBN3# CPU_DSTBP3# E16 H_D#48 D16 H_D#49 C14 H_D#50 B14 H_D#51 E15 H_D#52 D15 H_D#53 C13 H_D#54 E14 H_D#55 F13 H_D#56 B13 H_D#57 A12 H_D#58 C12 H_D#59 E12 H_D#60 D13 H_D#61 D12 H_D#62 B12 H_D#63 E13 H_DINV#3 F15 H_DSTBN#3 G15 H_DSTBP#3 HSCOMP D11 CPU_COMP_N HRCOMP B11 CPU_COMP_P CPU_VREF 1 C123 220P_0402_50V9J H22 D25 E11 G22 2 Place C close to Ball H22 4 CPU_VREF MISC. 2 1R30 24.9_0402_1% 2 1R234 49.9_0402_1% RESERVED0 RESERVED1 CPU_DPWR# ATI recommendation R40, R41 GFX_RX0N GFX_RX0P L4 K4 GFX_RX1N GFX_RX1P L5 L6 GFX_RX2N GFX_RX2P +1.2VS SB_A_RXN0 SB_A_RXP0 1 C430 SB_A_RXN1 SB_A_RXP1 1 NB_A_RXN0 C427 NB_A_RXP0 NB_A_RXN1 NB_A_RXP1 1 1 1 1 R29 R34 R33 R28 PCE_RXISET PCE_TXISET PCE_NCAL PCE_PCAL C4321 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K C4291 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K 11 CLK_NB_ALINK# 11 CLK_NB_ALINK 10 10 10 10 mils mils mils mils NB_A_TXN0 NB_A_TXP0 NB_A_TXN1 NB_A_TXP1 N2 N1 GFX_TX1N GFX_TX1P R2 P2 GFX_TX2N GFX_TX2P T1 R1 GFX_TX3N GFX_TX3P U2 T2 GFX_RX3N GFX_RX3P P4 N4 GFX_RX4N GFX_RX4P GFX_TX4N GFX_TX4P V1 V2 P5 P6 GFX_RX5N GFX_RX5P GFX_TX5N GFX_TX5P W2 W1 R4 R5 GFX_RX6N GFX_RX6P GFX_TX6N GFX_TX6P AA2 Y2 GFX_TX7N GFX_TX7P AB1 AA1 GFX_TX8N GFX_TX8P AC2 AB2 GFX_TX9N GFX_TX9P AD1 AD2 GFX_TX10N GFX_TX10P AE2 AE1 GFX_TX11N GFX_TX11P AG2 AF2 GFX_TX12N GFX_TX12P AH1 AG1 GFX_TX13N GFX_TX13P AJ2 AH2 GFX_TX14N GFX_TX14P AJ4 AJ3 GFX_TX15N GFX_TX15P AJ5 AK4 GFX_CLKN GFX_CLKP M1 M2 T3 T4 GFX_RX7N GFX_RX7P U5 U6 GFX_RX8N GFX_RX8P V4 V5 GFX_RX9N GFX_RX9P W3 W4 GFX_RX10N GFX_RX10P Y5 Y6 GFX_RX11N GFX_RX11P AA4 AA5 GFX_RX12N GFX_RX12P AB3 AB4 GFX_RX13N GFX_RX13P AC5 AC6 GFX_RX14N GFX_RX14P AD4 AD5 GFX_RX15N GFX_RX15P AJ12 AK13 AG12 AH12 PCE_ISET PCE_TXISET PCE_NCAL PCE_PCAL AJ11 AJ10 AK10 AK9 SB_TX0N SB_TX0P SB_TX1N SB_TX1P AG10 AG9 AF10 AE9 SB_RX0N SB_RX0P SB_RX1N SB_RX1P L2 K2 SB_CLKN SB_CLKP Place R Close to Ball 10K_0402_1% 2 8.25K_0402_1% 2 82.5_0402_1% 2 150_0402_1% 2 GFX_TX0N GFX_TX0P M4 M5 PCI EXPRESS I/F C19 C23 C20 C22 B22 B23 C21 B24 E21 B21 B20 G19 F21 B19 E20 D21 A21 D22 E22 J4 J5 PART 3 OF 6 DATA GROUP 0 PART 1 OF 6 DATA GROUP 1 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DINV#1 H_DSTBN#1 H_DSTBP#1 +1.05VS *** GPP_TX0N/SB_TX2N GPP_TX0P/SB_TX2P GPP_TX1N/SB_TX3N GPP_TX1P/SB_TX3P GPP_TX2N GPP_TX2P GPP_TX3N GPP_TX3P GPP_RX0N/SB_RX2N GPP_RX0P/SB_RX2P GPP_RX1N/SB_RX3N GPP_RX1P/SB_RX3P GPP_RX2N GPP_RX2P GPP_RX3N GPP_RX3P 1 2 AJ9 AJ8 AF6 AE6 AK6 AJ6 AF4 AE4 AG8 AF8 AG7 AG6 AJ7 AK7 AH4 AG4 3 216CPP4AKA21HK_BGA707 SB_A_RXN[0..1] SB_A_RXP[0..1] NB_A_RXN[0..1] NB_A_RXP[0..1] SB_A_RXN[0..1] 14 SB_A_RXP[0..1] 14 NB_A_RXN[0..1] 14 NB_A_RXP[0..1] 14 To SB A-PCIE Link H_DPWR# 216CPP4AKA21HK_BGA707 1 +1.05VS CPU_VREF Trace=12Mil Space=15Mil R38 49.9_0402_1% 4 2 CPU_VREF A Compal Secret Data Security Classification R37 100_0402_1% 2005/03/01 Issued Date 2 2 1 *** 1 C121 1U_0402_6.3V4Z 4 H_D#0 E28 H_D#1 D28 H_D#2 D29 H_D#3 C29 H_D#4 D30 H_D#5 C30 H_D#6 B29 H_D#7 C28 H_D#8 C26 H_D#9 B25 B27 H_D#10 H_D#11 C25 A27 H_D#12 C24 H_D#13 A24 H_D#14 B26 H_D#15 C27 H_DINV#0 A28 H_DSTBN#0 B28 H_DSTBP#0 CPU_D16# CPU_D17# CPU_D18# CPU_D19# CPU_D20# CPU_D21# CPU_D22# CPU_D23# CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31# CPU_DBI1# CPU_DSTBN1# CPU_DSTBP1# DATA GROUP 3 3 CPU_A17# CPU_A18# CPU_A19# CPU_A20# CPU_A21# CPU_A22# CPU_A23# CPU_A24# CPU_A25# CPU_A26# CPU_A27# CPU_A28# CPU_A29# CPU_A30# CPU_A31# CPU_ADSTB1# CPU_D0# CPU_D1# CPU_D2# CPU_D3# CPU_D4# CPU_D5# CPU_D6# CPU_D7# CPU_D8# CPU_D9# CPU_D10# CPU_D11# CPU_D12# CPU_D13# CPU_D14# CPU_D15# CPU_DBI0# CPU_DSTBN0# CPU_DSTBP0# RC410MD PCI EXPRESS I/F 2 M28 K29 K30 J26 L28 L29 M30 K27 M29 K26 N28 L26 N25 L25 N24 L27 DATA GROUP 2 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 RC410MD CPU I/F H_ADSTB#0 U21C ADDR. GROUP 1 4 CPU_A3# CPU_A4# CPU_A5# CPU_A6# CPU_A7# CPU_A8# CPU_A9# CPU_A10# CPU_A11# CPU_A12# CPU_A13# CPU_A14# CPU_A15# CPU_A16# CPU_REQ0# CPU_REQ1# CPU_REQ2# CPU_REQ3# CPU_REQ4# CPU_ADSTB0# CONTROL 1 G28 H26 G27 G30 G29 G26 H28 J28 H25 K28 H29 J29 K24 K25 F29 G25 F26 F28 E29 H27 ADDR. GROUP 0 U21A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 E H_D#[0..63] 4 H_DINV#[0..3] 4 H_DSTBN#[0..3] 4 H_DSTBP#[0..3] 4 H_A#[3..31] H_REQ#[0..4] H_RS#[0..2] A-LINK EXPRESS I/F 4 4 4 B Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B C D Title Size B Date: Compal Electronics, Inc. RC410MD-FSB, PCIE,A-PCIE Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Sheet E 6 of Rev 1.0 42 A B C D E U21B MEM_CK2N MEM_CK2P 10 DDR_CLK3# 10 DDR_CLK3 MEM_CK3N MEM_CK3P +DDR_VREF 10 DDR_CLK4# 10 DDR_CLK4 AG17 AF17 MEM_CK4N MEM_CK4P 1 2 DDR_SCKE0 DDR_SCKE1 DDR_SCKE2 DDR_SCKE3 W29 W28 AH20 AJ20 AE24 AE21 MEM_CK5N MEM_CK5P MEM_CKE0 MEM_CKE1 MEM_CKE2 MEM_CKE3 DDR_SCS#0 DDR_SCS#0 DDR_SCS#1 DDR_SCS#1 DDR_SCS#2 DDR_SCS#2 DDR_SCS#3 DDR_SCS#3 DDR_ODT0 DDR_ODT0 DDR_ODT1 DDR_ODT1 DDR_ODT2 DDR_ODT2 DDR_ODT3 DDR_ODT3 R43 1 2 1K_0402_5% +1.8V MEM_CAP1 10mil 1.8V: DDR2 MEM_CAP2 10mil MEM_COMPP 10mil MEM_COMPN 10mil +DDR_VREF 20mil AH29 AG29 AH28 AF29 AG30 AE28 AC30 Y30 AD28 AJ14 N30 AJ15 AE29 AB27 MEM_CS#0 MEM_CS#1 MEM_CS#2 MEM_CS#3 MEM_ODT0 MEM_ODT1 MEM_ODT2/RSV2 MEM_ODT3/RSV3 MEM_VMODE MEM_CAP1 MEM_CAP2 MEM_COMPP MEM_COMPN MEM_VREF C174 9 9 9,10 9,10 9 9 9,10 9,10 9 9,10 9 9,10 MEM_VMODE: DDR_DQS#0 DDR_DQS0 AH17 AJ18 MEM_DQS0N MEM_DQS0P DDR_DQS#1 DDR_DQS1 AF15 AE14 MEM_DQS1N MEM_DQS1P DDR_DQS#2 DDR_DQS2 AE22 AF22 MEM_DQS2N MEM_DQS2P R242 *** R237 C435 1 2 C450 1 2 0.47U_0603_10V7K MEM_COMPN MEM_COMPP MEM_CAP1 MEM_CAP2 0.47U_0603_10V7K 3 61.9_0603_1% 2 1 61.9_0603_1% 2 1 +1.8V Place these R and C close to relative Ball. DDR_DQS#3 DDR_DQS3 AF26 AE25 MEM_DQS3N MEM_DQS3P DDR_DQS#4 DDR_DQS4 W26 W27 MEM_DQS4N MEM_DQS4P DDR_DQS#5 DDR_DQS5 AB30 AB29 MEM_DQS5N MEM_DQS5P DDR_DQS#6 DDR_DQS6 R25 P25 MEM_DQS6N MEM_DQS6P DDR_DQS#7 DDR_DQS7 R30 R29 MEM_DQS7N MEM_DQS7P E10 GREEN 13 NB_CRT_B D10 BLUE 13 NB_CRT_HSYNC 13 NB_CRT_VSYNC C3 B3 RSET 1 2 R232 715_0402_1% B10 15mil NB_DDC_CLK NB_DDC_DATA 13 NB_DDC_CLK 13 NB_DDC_DATA 1C422 @ 15P_0402_50V8D 2 1 R218 10_0402_5% DACHSYNC DACVSYNC RSET B2 C2 DACSCL DACSDA G1 OSCIN F1 OSCOUT 2 11 CLK_NB_14M G2 2 10K_0402_5% TVCLKIN J1 CPU_CLKP K1 CPU_CLKN 1 R217 11 CLK_NB_BCLK 11 CLK_NB_BCLK# NB_EDID_CLK NB_EDID_DATA NB_DVI_DDCDATA STRP_DATA TESTMODE 12 NB_EDID_CLK 12 NB_EDID_DATA R230 D2 C1 H3 D1 C4 AH13 AJ13 TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P TXCLK_LN TXCLK_LP E5 F5 D5 C5 E6 D6 E7 E8 G6 F6 LVDS_BLON LVDS_DIGON LVDS_BLEN G3 E2 F2 BMREQ# BM_REQ# TMDS_HPD J2 AJ17 AG15 AE20 AF25 Y27 AB28 R26 R28 1 R219 2 4.7K_0402_5% +3VS NB_EDID_CLK R236 4.7K_0402_5% D21 NB_EDID_DATA 1 R226 2 4.7K_0402_5% SUS_STAT# NB_DVI_DDCDATA 1 R23 2 @ 4.7K_0402_5% 2 1 R22 2 4.7K_0402_5% 2@ 4.7K_0402_5% R222 1 2 4.7K_0402_5% C420 @ 0.1U_0402_10V6K R214 @ 1K_0402_5% 1 3 U19 1 2 3 4 NC A1 A2 VSS VCC WP SCL SDA 8 7 6 5 NB_EDID_CLK STRP_DATA +3VALW ** STRP_DATA LVDS_ENBKL R225 2 1 4.7K_0402_5% R220 2 1 @ 4.7K_0402_5% 1 A U5A NB_DDC_CLK R20 4.7K_0402_5% B STRP_DATA: DEBUG STRAP DEFAULT: 1 0: MEMORY CHANNEL STRAPING 1: E2PROM STRAPING 28 *** +3VALW NB_DDC_CLK: CPU VCC SEL DEFAULT: 1 1: DESKTOP CPU 0: MOBILE CPU Q5 2 R11 2 1 2K_0402_5% 4 LVDS_ENVDD SB_PWRGD# 16 5 1 A U5B O B 6 NB_ENVDD 12 4 SN74LVC08APW_TSSOP14 2 2 R229 1 4.7K_0402_5% Compal Secret Data Security Classification CPU_BSEL0 5,11 Issued Date 2005/03/01 2006/03/01 Deciphered Date Title 3 MMBT3904_SOT23 12 R227 4.7K_0402_5% R228 2 1 4.7K_0402_5% Q35 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A ENBKL SN74LVC08APW_TSSOP14 NB_PWRGD 3 MMBT3904_SOT23 1 NB_CRT_VSYNC +3VS 3 O +3VS +3VS 4 NB_RST# @ AT24C04N-10SI-2.7_SO8~D 2 NB_CRT_HSYNC 1 2 DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7 7 R223 1 NB_SUS_STAT# 15 CH751H-40_SC76 14 BM_REQ# 1 CH751H-40_SC76 D20 P 1 BM_REQ# 14 G 0 0 NB_PWRGD 16 +1.8V 2 0 NB_RST# 14 R216 10K_0402_5% Low: Normal Mode(Fixed) High: Test Mode NB STRAPING PINS 0 2 @ 4.7K_0402_5% 2 @ 4.7K_0402_5% 2 216CPP4AKA21HK_BGA707 BM_REQ# NB_CRT_HSYNC NB_CRT_VSYNC 0 12 12 12 12 12 12 NB_TXCLK- 12 NB_TXCLK+ 12 LVDS_ENBKL 1 R21 LVDS_ENVDD 1 R224 2 MEM_DM0 MEM_DM1 MEM_DM2 MEM_DM3 MEM_DM4 MEM_DM5 MEM_DM6 MEM_DM7 NB_TXOUT0NB_TXOUT0+ NB_TXOUT1NB_TXOUT1+ NB_TXOUT2NB_TXOUT2+ NB_TXCLKNB_TXCLK+ H2 7 133MHZ NB_TXOUT0NB_TXOUT0+ NB_TXOUT1NB_TXOUT1+ NB_TXOUT2NB_TXOUT2+ NB_RST# SUS_STAT# NB_PWRGD +3VS 1 100MHZ 1 A3 AH14 E3 SYSRESET# SUS_STAT# POWERGOOD I2C_CLK I2C_DATA DDC_DATA STRP_DATA TESTMODE THERMALDIODE_P THERMALDIODE_N 216CPP4AKA21HK_BGA707 FSB SPEED LVDS NB_CRT_G PART 4 OF 6 RED 13 CRT & TV I/F F10 1 2 C172 NB_CRT_R 2 V29 V30 AC24 AC23 1 13 2 MEM_CK1N MEM_CK1P COMP NB_COMPS 2 75_0402_1% B4 A4 B5 C6 B6 A6 B7 A7 F7 F8 1 AF16 AE16 E9 1 R27 TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P TXCLK_UN TXCLK_UP 14 DDR_CLK1# DDR_CLK1 C P 9 9 D9 RC410MD MEM_CK0N MEM_CK0P NB_CRMA CLK. GEN. AC26 AC25 Y 12 G 2 DDR_CLK0# DDR_CLK0 F9 1 R46 9 9 NB_LUMA 2 0.1U_0402_10V6K R42 0.1U_0402_10V6K 1K_0603_1% 2 1 1K_0603_1% 2 1 +1.8V MEM_RAS# MEM_CAS# MEM_WE# 12 2 9,10 DDR_SRAS# 9,10 DDR_SCAS# 9,10 DDR_SWE# AJ29 AG28 AH30 DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 DDR_DQ16 DDR_DQ17 DDR_DQ18 DDR_DQ19 DDR_DQ20 DDR_DQ21 DDR_DQ22 DDR_DQ23 DDR_DQ24 DDR_DQ25 DDR_DQ26 DDR_DQ27 DDR_DQ28 DDR_DQ29 DDR_DQ30 DDR_DQ31 DDR_DQ32 DDR_DQ33 DDR_DQ34 DDR_DQ35 DDR_DQ36 DDR_DQ37 DDR_DQ38 DDR_DQ39 DDR_DQ40 DDR_DQ41 DDR_DQ42 DDR_DQ43 DDR_DQ44 DDR_DQ45 DDR_DQ46 DDR_DQ47 DDR_DQ48 DDR_DQ49 DDR_DQ50 DDR_DQ51 DDR_DQ52 DDR_DQ53 DDR_DQ54 DDR_DQ55 DDR_DQ56 DDR_DQ57 DDR_DQ58 DDR_DQ59 DDR_DQ60 DDR_DQ61 DDR_DQ62 DDR_DQ63 1 1 AJ16 AH16 AJ19 AH19 AH15 AK16 AH18 AK19 AF13 AF14 AE19 AF19 AE13 AG13 AF18 AE17 AF20 AF21 AG23 AF24 AG19 AG20 AG22 AF23 AD25 AG25 AE27 AD27 AE23 AD24 AE26 AD26 AA25 Y26 W24 U25 AA26 Y25 V26 W25 AC28 AC29 AA29 Y29 AD30 AD29 AA30 Y28 U27 T27 N26 M27 U26 T26 P27 P26 U29 T29 P29 N29 U28 T28 P28 N27 4.7K_0402_5% DDR_SMA[0..17] 9,10 DATA DDR_SMA[0..17] MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_DQ16 MEM_DQ17 MEM_DQ18 MEM_DQ19 MEM_DQ20 MEM_DQ21 MEM_DQ22 MEM_DQ23 MEM_DQ24 MEM_DQ25 MEM_DQ26 MEM_DQ27 MEM_DQ28 MEM_DQ29 MEM_DQ30 MEM_DQ31 MEM_DQ32 MEM_DQ33 MEM_DQ34 MEM_DQ35 MEM_DQ36 MEM_DQ37 MEM_DQ38 MEM_DQ39 MEM_DQ40 MEM_DQ41 MEM_DQ42 MEM_DQ43 MEM_DQ44 MEM_DQ45 MEM_DQ46 MEM_DQ47 MEM_DQ48 MEM_DQ49 MEM_DQ50 MEM_DQ51 MEM_DQ52 MEM_DQ53 MEM_DQ54 MEM_DQ55 MEM_DQ56 MEM_DQ57 MEM_DQ58 MEM_DQ59 MEM_DQ60 MEM_DQ61 MEM_DQ62 MEM_DQ63 PART 2 OF 6 DDR_DM[0..7] 9,10 U21D RC410MD MEMORY I/F DDR_DM[0..7] MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13 MEM_A14 MEM_A15 MEM_A16 MEM_A17 ADDRESS DDR_DQS#[0..7] 9,10 AK27 AJ27 AH26 AJ26 AH25 AJ25 AH24 AH23 AJ24 AJ23 AH27 AH22 AJ22 AF28 AJ21 AG27 AJ28 AH21 CLK DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12 DDR_SMA13 DDR_SMA14 DDR_SMA15 DDR_SMA16 DDR_SMA17 MISC DDR_DQ[0..63] 9,10 DDR_DQS[0..7] 9,10 DDR_DQS#[0..7] DATA DDR_DQ[0..63] DDR_DQS[0..7] B C D Compal Electronics, Inc. RC410MD-DDR/DISP/MISC Size Document Number Custom HAZ00/BL10E (LA2861) Date: Monday, August 08, 2005 Sheet E 7 R ev 1.0 of 42 A B C D E +1.2VS C92 C95 1 1 C99 1 C144 1 C59 3 +1.8VS +1.05VS 5A A10 F11 F12 F17 G11 G12 G13 G14 G16 G17 G20 H11 H12 H13 H14 H16 H17 H19 H23 H24 L23 L24 N23 P23 P24 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 1 Place C between Ball D8,C8 L8 1 2 CHB1608U301_0603 C53 1 0.1U_0402_16V4Z 0.1A 1 2 2 C57 2 1 C46 +CPVDD +MPVDD VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU VDD_CPU C9 AVDD B8 D8 AVDDQ AVDDDI H21 AB26 CPVDD MPVDD +AVDD +AVDDQ VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 VDDA_18 +1.8VS +1.2VS 1 C61 C418 C417 1 2 CHB1608U301_0603 C70 AB8 AC10 AC9 AD10 AE11 AF11 AG11 U7 U8 Y7 Y8 C56 C68 C63 C62 C51 C45 G4 G5 J8 C7 H7 H8 H10 +VDDQ 1 +1.8VS C22 C25 2 0.1U_0402_16V4Z 2 1U_0402_6.3V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 10U_0805_10V4Z 1 1 1 1 1 1 1 1 C23 L7 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 1U_0402_6.3V4Z 2 1U_0402_6.3V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 470U_D2_2.5VM 2 470U_D2_2.5VM 1 C66 C85 C43 C84 1 1 1 1 1 1 1 C102 1 C41 1 C42 1 C78 1 C40 1 C414 1 C15 20mils +LPVDD 20mils ATI recommend separate pure power 20mils +PLLVDD +VDDQ 0.1U_0402_16V4Z 1 C29 1 C44 22U_1206_6.3V6M 0.1U_0402_16V4Z 2 2 2 2.25A 0.1A 1 +3VS L5 1 C650 AB7 AC7 AC8 AD9 H4 H5 J6 K6 L7 L8 M7 M8 P7 P8 T7 T8 W7 W8 L4 1 2 CHB1608U301_0603 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 1 C134 1 C135 1 C58 1 C67 1 C31 1 C28 +1.2VS 0.75A VDDR3 VDDR3 LPVDD LVDDR18D LVDDR18A LVDDR18A PLLVDD +AVDD 1 + VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 VDDA_12 AB22 AB9 J22 J9 1 2 CHB2012U170_0805 C648 10U_0805_10V4Z 2 C32 1 1 C649 2 2 +3VS L37 2 CHB2012U170_0805 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Place L close to Ball AB26 Place C between Ball AB26,AA27 C37 0.1U_0402_16V4Z 1U_0402_6.3V4Z 2 +MPVDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS PART 6 OF 6 A13 A16 A19 A2 A22 A25 A29 A9 AA23 AA24 AA28 AC11 AC12 AC14 AC15 AC17 AC18 AC20 AC27 AD11 AD12 AD14 AD15 AD17 AD18 AD20 AE30 AF12 AF27 AG14 AG16 AG18 AG21 AG24 AG26 AH11 AJ1 AJ30 AK12 AK15 AK18 AK2 AK22 AK25 AK29 B1 B30 D14 D17 D20 D24 D27 D3 D4 F27 F3 F30 F4 G10 H15 H18 J23 J24 J27 J3 J30 K23 K8 M12 M14 M16 M18 M23 M24 M26 N13 N15 N17 N19 P12 P14 P16 P18 216CPP4AKA21HK_BGA707 ATI recommend 2.2uF 1 VDD_18 VDD_18 VDD_18 VDD_18 U21F RC410MD GOUND 1 C100 1 C131 1 C91 1 C69 1 C133 1 C150 1 C151 2A + 1 VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM VDDR_MEM AB23 AB24 AC13 AC16 AC19 AC21 AC22 AD13 AD16 AD19 AD21 AD22 AD23 AK21 AK24 AK28 T23 T24 V23 V24 Y23 Y24 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z + 1 VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE MEM I/F PWR M13 M15 M17 M19 N12 N14 N16 N18 P13 P15 P17 P19 R12 R14 R16 R18 T13 T15 T17 T19 U12 U14 U16 U18 V13 V15 V17 V19 W12 W14 W16 W18 1U_0402_6.3V4Z 2 C80 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 1U_0402_6.3V4Z C79 C118 1 C115 1 C72 1 C119 1 C93 1 C166 1 C76 1 C124 1 C152 1 C132 1 C117 1 C122 1 C139 1 C110 1 C86 1 C77 1 C130 1 C129 1 C141 1 C140 U21E +1.05VS 1 ** 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z +1.8V +1.2VS 5A CPU I/F PWR 1 C107 1 C88 1 C90 1 C104 1 C73 1 C74 1 C105 1 C36 1 C55 1 C89 1 C71 1 C106 1 C49 1 C50 1 1 C103 1 C149 PART 5 OF 6 1 1 C87 RC410MD POWER C75 +1.8V 2 10U_0805_10V4Z 2 10U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 1 C64 CORE PWR 1 C65 R13 R15 R17 R19 R23 R24 R27 T12 T14 T16 T18 T30 U13 U15 U17 U19 U23 U24 V12 V14 V16 V18 V27 V28 W13 W15 W17 W19 W23 W30 VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA AA3 AA7 AA8 AB5 AB6 AC3 AD3 AD7 AD8 AE8 AF3 AF5 AF7 AF9 AG5 AH10 AH3 AH5 AH6 AH7 AH8 AH9 K5 L3 M3 N5 N6 N7 N8 P3 R3 R7 R8 T5 T6 U3 V3 V7 V8 W5 W6 Y3 AVSSN AVSSQ AVSSDI LPVSS LVSSR LVSSR LVSSR PLLVSS CPVSS MPVSS C10 B9 C8 J7 G7 G8 G9 H9 H20 AA27 1 2 3 216CPP4AKA21HK_BGA707 +1.8VS +1.8VS +PLLVDD 220U_D_6.3VM L12 +CPVDD 1 +1.8VS 2 2 L6 1 2 1 2 A C30 1 1 2 CHB2012U170_0805 +1.8VS +1.8VS 2 C33 1U_0402_6.3V4Z 2 1 + C137 C289 470U_D2_2.5VM 2 1 1 2 2 C175 1 L11 1 C138 2 1 2 CHB1608U301_0603 1 C158 C114 0.1U_0402_16V4Z 2 2 1 1U_0402_6.3V4Z 1 0.1U_0402_16V4Z 1 C47 10U_0805_10V4Z C54 0.1U_0402_16V4Z C48 0.1U_0402_16V4Z 4 1 1U_0402_6.3V4Z +LPVDD 10U_0805_10V4Z C641 2 2 CHB1608U301_0603 C60 C159 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 2 1U_0402_6.3V4Z 2 C81 L10 1 2 CHB1608U301_0603 1 C82 C116 10U_0805_10V4Z 2 10U_0805_10V4Z 2 4 10U_0805_10V4Z 1U_0402_6.3V4Z Compal Secret Data Security Classification 2005/03/01 Issued Date 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B 1 C D Title Compal Electronics, Inc. RC410MB PWR/GND Size Document Number CustomHAZ00/BL10E (LA2861) Date: Thursday, August 04, 2005 Sheet E R ev 1.0 8 of 42 A B C D E +1.8V F +1.8V +1.8V 1 JP16 R13 1K_0402_5% 2 C18 1 2 0.1U_0402_16V4Z 2 DDR_ DQ1 DDR_ DQ0 2 1 0.1U_0402_16V4Z 2 DDR_ DQ9 DD R_DQ13 1 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 2 R14 1K_0402_5% C644 1 0.1U_0402_16V4Z 2 C643 1 0.1U_0402_16V4Z 2 C642 1 0.1U_0402_16V4Z 2 C145 1 0.1U_0402_16V4Z 2 C113 1 0.1U_0402_16V4Z 2 C96 1 0.1U_0402_16V4Z 2 C163 1 0.1U_0402_16V4Z 2 C162 1 0.1U_0402_16V4Z 2 C101 1 0.1U_0402_16V4Z 2 C154 C111 C143 1 + C148 470U_D2_2.5VM DD R_DQ10 DD R_DQ14 C19 0.1U_0402_16V4Z DDR_DQS#1 D DR_DQS1 1 DDR_VREF1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 1 +1.8V 2 DDR_DQS#0 D DR_DQS0 DDR_ DQ3 DDR_ DQ2 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 DD R_DQ16 DD R_DQ20 DDR_DQS#2 D DR_DQS2 DD R_DQ23 DD R_DQ19 DD R_DQ28 DD R_DQ25 Layout Note: Place one cap close to every 2 pullup resistors terminated to V_DDR_MCH_REF D DR_DM3 DD R_DQ26 DD R_DQ27 7 DDR_SCKE0 DDR_SCKE0 DDR_SMA17 DDR_SMA12 DDR_SMA9 DDR_SMA8 2 +0.9VS DDR_SMA5 DDR_SMA3 DDR_SMA1 1 7,10 DDR_SWE# 22U_1206_6.3V6M 2 C177 1 22U_1206_6.3V6M 2 C176 1 0.1U_0402_16V4Z 2 C147 1 0.1U_0402_16V4Z 2 C108 1 0.1U_0402_16V4Z 2 C120 1 0.1U_0402_16V4Z 2 C136 2 1 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 1 C83 1 0.1U_0402_16V4Z 2 C156 2 1 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 1 C94 1 C161 1 C436 C437 C438 1 0.1U_0402_16V4Z 2 C439 2 1 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 1 C443 1 C444 C445 C447 1 7,10 DDR_SCAS# 7 DDR_SCS#1 2 7 DDR_SMA10 DDR_SMA15 DD R_SWE# DDR_SCAS# DDR_SCS#1 DDR_ODT2 DDR_ODT2 DD R_DQ32 DD R_DQ36 DDR_DQS#4 D DR_DQS4 DD R_DQ38 DD R_DQ35 DD R_DQ45 DD R_DQ40 D DR_DM5 +0.9VS DD R_DQ46 DD R_DQ43 RP11 RP1 7,10 DDR_SCKE3 3 DDR_SCKE1 DDR_SCKE3 DDR_SMA14 DDR_SMA17 1 2 3 4 8 7 6 5 5 6 7 8 56_1206_8P4R_5% 1 2 3 4 8 7 6 5 5 6 7 8 56_1206_8P4R_5% 1 2 3 4 8 7 6 5 5 6 7 8 DD R_DQ56 DD R_DQ61 D DR_DM7 4 3 2 1 DD R_DQ62 DD R_DQ58 DDR_SMA10 DDR_SMA1 DDR_SMA16 DD R_SWE# 5 6 7 8 56_1206_8P4R_5% 4 3 2 1 DDR_SCS#0 DDR_ODT0 DDR_ODT1 DDR_SCS#3 +3VS 1 DDR_ODT1 7,10 DDR_SCS#3 7,10 2 56_1206_8P4R_5% R40 2 1 56_0402_5% DDR_ODT2 1 VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 VSS CK0 CK0# VSS DQ14 DQ15 VSS VSS DQ20 DQ21 VSS NC DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS NC/CKE1 VDD NC/A15 NC/A14 VDD A11 A7 A6 VDD A4 A2 A0 VDD BA1 RAS# S0# VDD ODT0 NC/A13 VDD NC VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS CK1 CK1# VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS SAO SA1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 DD R_DQ15 DD R_DQ12 D DR_DM1 DDR_ DQ8 DD R_DQ11 DD R_DQ[0..63] DD R_DQS[0..7] DDR_ DQ4 DDR_ DQ5 DDR_DQS#[0..7] D DR_DM0 D DR_DM[0..7] DD R_CLK1 DDR_CLK1# DDR_CLK1 7 DDR_CLK1# 7 DDR_SMA[0..17] DDR_DQ[0..63] 7,10 1 DDR_DQS[0..7] 7,10 DDR_DQS#[0..7] 7,10 DDR_DM[0..7] 7,10 DDR_SMA[0..17] 7,10 DDR_ DQ6 DDR_ DQ7 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 DD R_DQ17 DD R_DQ21 D DR_DM2 DD R_DQ22 DD R_DQ18 DD R_DQ29 DD R_DQ24 DDR_DQS#3 D DR_DQS3 DD R_DQ30 DD R_DQ31 DDR_SCKE1 DDR_SCKE1 7 DDR_SMA14 DDR_SMA11 DDR_SMA7 DDR_SMA6 2 DDR_SMA4 DDR_SMA2 DDR_SMA0 DDR_SMA16 DDR_SRAS# DDR_SCS#0 DDR_ODT0 DDR_SMA13 DDR_SRAS# 7,10 DDR_SCS#0 7 DDR_ODT0 7 DD R_DQ37 DD R_DQ33 D DR_DM4 DD R_DQ39 DD R_DQ34 DD R_DQ44 DD R_DQ41 DDR_DQS#5 D DR_DQS5 DD R_DQ42 DD R_DQ47 DD R_DQ53 DD R_DQ49 DD R_CLK0 DDR_CLK0# DDR_CLK0 7 DDR_CLK0# 7 3 D DR_DM6 DD R_DQ55 DD R_DQ51 DD R_DQ60 DD R_DQ57 DDR_DQS#7 D DR_DQS7 DD R_DQ63 DD R_DQ59 +3VS P-TWO_A5692B-A0G16-P C185 8 7 6 5 10,11,15 SB_SMDATA 10,11,15 SB_SMCLK Layout Note: Place these resistor closely JDIM2,all trace length Max=1.3" 0.1U_0402_16V4Z 7,10 DDR_ODT3 DD R_DQ50 DD R_DQ54 C187 7,10 DDR_SCS#2 DDR_SMA6 DDR_SMA8 DDR_SMA4 DDR_SMA3 56_1206_8P4R_5% RP14 RP4 1 2 3 4 4 3 2 1 DDR_DQS#6 D DR_DQS6 Layout Note: Place these resistor closely JDIM2,all trace length<750 mil 2.2U_0805_10V6K 56_1206_8P4R_5% DDR_SCS#2 DDR_SMA13 DDR_SCS#1 DDR_ODT3 DDR_SCKE2 7,10 56_1206_8P4R_5% RP13 RP3 DDR_SMA15 DDR_SMA0 DDR_SRAS# DDR_SCAS# DDR_SCKE0 DDR_SCKE2 DDR_SMA11 DDR_SMA12 DD R_DQ52 DD R_DQ48 56_1206_8P4R_5% RP12 RP2 DDR_SMA7 DDR_SMA9 DDR_SMA2 DDR_SMA5 4 3 2 1 H Trace=20mil DDR_VREF1 Layout Note: Place near JDIM1 1 G 2 DIMMA Reverse ATI recommendation 4 4 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D E F Size C Date: G Compal Electronics, Inc. DDRII-SODIMM2 Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet 9 H of 42 A B C +1.8V D E +1.8V DDR_VREF2 Trace=20mil Layout Note: Place near JDIM1 JP15 DD R_DQ46 DD R_DQ43 DD R_DQ52 DD R_DQ48 3 DDR_DQS#6 D DR_DQS6 DD R_DQ50 DD R_DQ54 DD R_DQ56 DD R_DQ61 D DR_DM7 DD R_DQ62 DD R_DQ58 9,11,15 SB_SMDATA 9,11,15 SB_SMCLK +3VS 2 1 2 1 2 2 DD R_DQ17 DD R_DQ21 +1.8V D DR_DM2 1 DD R_DQ22 DD R_DQ18 DD R_DQ29 DD R_DQ24 1 C21 0.1U_0402_16V4Z 2 2 DD R_DQ30 DD R_DQ31 DDR_SCKE3 R15 1K_0402_5% DDR_VREF2 DDR_DQS#3 D DR_DQS3 R16 1K_0402_5% DDR_SCKE3 7,9 DDR_SMA14 1 2 C20 0.1U_0402_16V4Z DDR_SMA11 DDR_SMA7 DDR_SMA6 2 DDR_SMA4 DDR_SMA2 DDR_SMA0 DDR_SMA16 DDR_SRAS# DDR_SCS#2 DDR_ODT1 DDR_SMA13 DDR_SRAS# 7,9 DDR_SCS#2 7,9 DDR_ODT1 7,9 DD R_DQ37 DD R_DQ33 D DR_DM4 DD R_DQ39 DD R_DQ34 DD R_DQ44 DD R_DQ41 DDR_DQS#5 D DR_DQS5 DD R_DQ42 DD R_DQ47 DD R_DQ53 DD R_DQ49 DD R_CLK3 DDR_CLK3# DDR_CLK3 7 DDR_CLK3# 7 3 D DR_DM6 DD R_DQ55 DD R_DQ51 DD R_DQ60 DD R_DQ57 DDR_DQS#7 D DR_DQS7 DD R_DQ63 DD R_DQ59 +3VS PTI_A5652D-A0G16-P 1 2 C184 C186 2 2.2U_0805_10V6K 0.1U_0402_16V4Z 1 2 0.1U_0402_16V4Z D DR_DM5 1 C647 DD R_DQ45 DD R_DQ40 2 0.1U_0402_16V4Z DD R_DQ38 DD R_DQ35 1 C646 DDR_DQS#4 D DR_DQS4 2 0.1U_0402_16V4Z DD R_DQ32 DD R_DQ36 1 C645 DDR_ODT3 7,9 DDR_ODT3 2 0.1U_0402_16V4Z DDR_SCAS# DDR_SCS#3 7,9 DDR_SCAS# 7,9 DDR_SCS#3 1 C164 DDR_SMA10 DDR_SMA15 DD R_SWE# 7,9 DDR_SWE# 2 0.1U_0402_16V4Z DDR_SMA5 DDR_SMA3 DDR_SMA1 1 C109 DDR_SMA12 DDR_SMA9 DDR_SMA8 2 2 0.1U_0402_16V4Z DDR_SMA17 1 C142 DDR_SCKE2 2 0.1U_0402_16V4Z DD R_DQ26 DD R_DQ27 7,9 DDR_SCKE2 1 C155 D DR_DM3 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 2 0.1U_0402_16V4Z DD R_DQ28 DD R_DQ25 VSS DQ20 DQ21 VSS NC DM2 VSS DQ22 DQ23 VSS DQ28 DQ29 VSS DQS3# DQS3 VSS DQ30 DQ31 VSS NC/CKE1 VDD NC/A15 NC/A14 VDD A11 A7 A6 VDD A4 A2 A0 VDD BA1 RAS# S0# VDD ODT0 NC/A13 VDD NC VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ44 DQ45 VSS DQS5# DQS5 VSS DQ46 DQ47 VSS DQ52 DQ53 VSS CK1 CK1# VSS DM6 VSS DQ54 DQ55 VSS DQ60 DQ61 VSS DQS7# DQS7 VSS DQ62 DQ63 VSS SAO SA1 1 C98 DD R_DQ23 DD R_DQ19 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 NC VSS DQ26 DQ27 VSS CKE0 VDD NC BA2 VDD A12 A9 A8 VDD A5 A3 A1 VDD A10/AP BA0 WE# VDD CAS# NC/S1# VDD NC/ODT1 VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS NC,TEST VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SDA SCL VDDSPD DDR_CLK4 7 DDR_CLK4# 7 DDR_ DQ6 DDR_ DQ7 2 0.1U_0402_16V4Z DDR_DQS#2 D DR_DQS2 1 C125 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 DD R_DQ16 DD R_DQ20 DD R_CLK4 DDR_CLK4# 1 1 2 0.1U_0402_16V4Z DDR_ DQ3 DDR_ DQ2 D DR_DM0 1 C157 DDR_DQS#0 D DR_DQS0 + C52 470U_D2_2.5VM 0.1U_0402_16V4Z DDR_ DQ1 DDR_ DQ0 1 DDR_ DQ4 DDR_ DQ5 0.1U_0402_16V4Z DDR_SMA[0..17] DDR_ DQ8 DD R_DQ11 C165 DDR_ DQ9 DD R_DQ13 +1.8V D DR_DM1 0.1U_0402_16V4Z 7,9 DDR_SMA[0..17] DDR_DQS#[0..7] D DR_DM[0..7] DD R_DQ15 DD R_DQ12 C97 7,9 DDR_DM[0..7] DDR_DQS#1 D DR_DQS1 VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS DQ12 DQ13 VSS DM1 VSS CK0 CK0# VSS DQ14 DQ15 VSS C112 7,9 DDR_DQS#[0..7] 1 DD R_DQS[0..7] VREF VSS DQ0 DQ1 VSS DQS0# DQS0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS 1 7,9 DDR_DQS[0..7] DD R_DQ10 DD R_DQ14 DD R_DQ[0..63] 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 2 7,9 DDR_DQ[0..63] 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 DIMMB Reverse 4 4 Compal Secret Data Security Classification Issued Date 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Size C Date: Compal Electronics, Inc. DDR-II SODIMM1 Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet E 10 of 42 A B C Clock Generator D E 1- PLACE ALL THE SERIES TERMINATION RESISTORS AS CLOSE TO CLOCK GEN AS POSSIBLE 2- ROUTE ALL CPUCLK/#, NBCLK/#, ITPCLK/# AND SCR/# ,AS DIFFERENT PAIR RULE 1 C497 4.7U_0805_10V4Z +3VS C190 0.1U_0402_16V4Z 1 C484 2 1 L13 2 CHB1608U301_0603 0.1U_0402_16V4Z 2 2 2 2 1 1 C457 22P_0402_50V8J 1 C501 C182 Y3 R259 1 2 49.9_0402_1% R258 1 2 49.9_0402_1% R257 1 2 49.9_0402_1% SRCCLKT0 SRCCLKC0 ATIGCLKT0 ATIGCLKC0 ATIGCLKT1 ATIGCLKC1 SRCCLKT3 SRCCLKC3 SRCCLKT4 SRCCLKC4 SRCCLKT5 SRCCLKC5 SRCCLKT6 SRCCLKC6 SRCCLKT7 SRCCLKC7 34 33 30 29 27 28 24 25 22 23 18 19 16 17 12 13 SRCCLKT0 SRCCLKC0 R261 1 R263 1 2 33_0402_5% 2 33_0402_5% CLK_SB_ALINK 14 CLK_SB_ALINK# 14 SRCCLKT3 SRCCLKC3 R285 1 R278 1 2 33_0402_5% 2 33_0402_5% CLK_NB_ALINK 6 CLK_NB_ALINK# 6 CLKREQA# CLKREQB# 10 11 CK410#/PCICLK0 VTT_PWRGD#/PD CPU_STOP# USB_48MHZ 50 FS_C FS_B/REF1 FS_A/REF0 TEST_SEL/REF2 9 53 54 52 VDDCPU VDDPCI VDDATI VDDSRC VDDSRC VDDSRC VDD48 VDDREF VDDA 44 49 31 36 26 20 15 5 55 38 XTALIN_CLK 2 R270 R271 R272 R273 GNDCPU GNDPCI GNDATI GNDSRC GNDSRC GNDSRC GNDSRC GND GND GNDA 1 XIN 2 XOUT R277 1 1 1 1 2 2 2 2 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% CLK_NB_BCLK 7 CLK_NB_BCLK# 7 CLK_BCLK 4 CLK_BCLK# 4 R262 2 1 49.9_0402_1% L33 1 2 CHB1608U301_0603 C456 2 CPUCLKT0 CPUCLKC0 CPUCLKT1 CPUCLKC1 CPUCLKT2_ITP CPUCLKC2_ITP CPUCLKT0 CPUCLKC0 CPUCLKT1 CPUCLKC1 R264 2 1 49.9_0402_1% +3VS 1 2 1 47 46 43 42 41 40 R286 2 1 49.9_0402_1% 10U_0805_10V4Z 2 2 2 0.1U_0402_16V4Z 45 51 32 35 14 21 3 56 39 R279 2 1 49.9_0402_1% 1 2 CHB1608U301_0603 2 10U_0805_10V4Z +3VS 10U_0805_10V4Z 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 C203 C189 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 C458 C485 1 L14 U23 0.1U_0402_16V4Z 1 1 C188 C486 0.1U_0402_16V4Z +CLK_VDD1 L16 1 2 +3VS KC FBM-L11-201209-221LMAT_0805 1 C221 1 1 R256 1 2 49.9_0402_1% 3- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN POWER PIN 2 2 15,16 1 R281 2 10K_0402_5% 1 2 G CLK_OK D 1 C500 XTALOUT_CLK 2 14.31818MHZ_20P_6X1430004201 4,14,40 CPU_STP# 3 S 2N7002_SOT23 6 48 2 1 R269 @ 4.7K_0402_5% 2 1 R255 0_0402_5% +CLK_VDD1 Q40 2 22P_0402_50V8J +CLK_VDD1 2 @ 1M_0402_5% 7 8 9,10,15 SB_SMCLK 9,10,15 SB_SMDATA SCLK SDATA 1 2 475_0402_1% 37 R260 R283 1 2 10K_0402_5% R284 1 2 10K_0402_5% R254 1 2 4.7K_0402_5% 1 2 R268 @ 4.7K_0402_5% 4 FS_C FS_B/REF1 FS_A/REF0 TEST_SEL/REF2 R2661 R2521 R2671 R2651 2 2 2 2 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% +CLK_VDD1 +CLK_VDD1 +CLK_VDD1 R282 1 R253 1 R251 1 2 4.7K_0402_5% 2 4.7K_0402_5% 2 4.7K_0402_5% CPU_BSEL0 5,7 CPU_BSEL1 5 +CLK_VDD1 IREF ICS951413CGLFT_TSSOP56 ICS951413 CLK_SB_14M 15 CLK_14M_SIO 29 CLK_NB_14M 7 CLK_AUDIO_14M 24 3 3 SRC PCI REF USB FS_C FS_B FS_A CPU 1 0 1 100.00100.0033.33 14.31848.000 1 133.33100.0033.33 14.31848.000 0 0 1 1 1 ----------- 4 4 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Size B Date: Compal Electronics, Inc. ClockGen ICS 951411 Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Sheet E Rev 1.0 11 of 42 A B C D E TV-OUT CONNECTOR D7 1. 2. 3. 4. 1 D8 1 1 Reduce LUMA_1 and CRMA_1 length As short as possible Y C Y C PANEL +LCDVDD CTRL CKT ground ground (luminance+sync) (crominance) 1 22P_0402_50V8J C204 1 2 1 2 CHB1608B121_0603 Q2 2 @ DAN217_SC59 1 1 2 2 2 G 3 1 Q3 Q34 2 2 C411 4.7U_0805_10V4Z S 2 2N7002_SOT23 1 C13 R8 100K_0402_5% 1 82P_0402_50V8J 1 1 2 2 1 @ JUMP_43X118 2 82P_0402_50V8J D 1 C223 R7 100_0402_5% 1 2 J4 @ JUMP_43X118 80mil 1 100K_0402_5% 3 82P_0402_50V8J SI2301BDS_SOT23 R9 470_0402_5% 1 1 82P_0402_50V8J 2 2 1 C202 1 C200 2 C213 J1 2 2 1 1 2 3 4 R10 ALLTO_C10877-104A1-L_4P 5 5 6 6 1 LUMA_2 CRMA_2 1 2 L17 CHB1608B121_0603 2 1 2 3 4 D 1 JP18 22P_0402_50V8J C224 1 2 R59 75_0603_1% 1 +3VS +LCDVDD NB_CRMA R57 75_0603_1% 3 3 2 3 @ DAN217_SC59 G NB_CRMA L15 S 7 NB_LUMA D NB_LUMA G 7 NB_ENVDD NB_ENVDD S 2 +3VALW 7 +3VS SI2301BDS_SOT23 +LCDVDD +3VS 28 1 R209 1 BKOFF# +LCDVDD Width: 40mils 2 10K_0402_5% 1 C410 DISPOFF# 2 2 80mil 2 2 D19 CH751H-40_SC76 1 2 2 1 C404 4.7U_0805_10V4Z 2 2 C405 0.1U_0402_16V4Z 0.047U_0402_16V7K 220P_0402_50V7K LCD/PANEL BD. Conn. C406 @ 0.1U_0402_16V4Z +3VS 3 C407 @ 0.1U_0402_16V4Z 1 2 +LCDVDD 1 2 JP1 L40 FBM-L11-201209-221LMA30T_0805 1 2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 1 2 L38 FBM-L11-201209-221LMA30T_0805 NB_EDID_CLK NB_EDID_DATA DAC_BRIG INVT_PWM DISPOFF# 7 NB_EDID_CLK 7 NB_EDID_DATA 28 DAC_BRIG 28 INVT_PWM L39 B+ 1 2 FBM-L11-201209-221LMA30T_0805 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 NB_TXCLKNB_TXCLK+ NB_TXOUT0NB_TXOUT0+ NB_TXOUT2NB_TXOUT2+ NB_TXOUT1NB_TXOUT1+ NB_TXCLK- 7 NB_TXCLK+ 7 NB_TXOUT0- 7 NB_TXOUT0+ 7 NB_TXOUT2- 7 NB_TXOUT2+ 7 3 NB_TXOUT1- 7 NB_TXOUT1+ 7 ACES_88242-3000 NB_EDID_CLK 1 C408 2 47P_0402_50V8J NB_EDID_DATA 1 C409 2 47P_0402_50V8J 4 4 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Size B Date: Compal Electronics, Inc. TV-OUT, LVDS CONNECTOR Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Sheet E 12 of Rev 1.0 42 5 4 3 2 1 CRT CONNECTOR D D3 +R_CRT_VCC D4 1 D1 1 1 +5VS D2 1 3 2 3 2 3 2 0.1U_0402_16V4Z @ DAN217_SC59 @ DAN217_SC59 @ DAN217_SC59 2 1 CH491D_SC59 1 1A_6VDC_MINISMDC110 C400 +3VS D +CRT_VCC F1 2 CRT Conn. 2 JP14 1 2 2 C402 2 1 1 1 C6 C4 1 R207 R205 Q32 1 2N7002_SOT23 2 @ 6P_0402_50V8K R206 R208 3 220P_0402_50V7K @ 6P_0402_50V8K 2 +3VS TYCO_1470801-1 C7 D 1 1 1 C10 C8 C5 R3 75_0603_1% 6P_0402_50V8K 6P_0402_50V8K 2 2 2 6P_0402_50V8K 75_0603_1% R2 2 R1 75_0603_1% C 1 1 2 FCM2012C-800_0805 NB_CRT_B 1 7 R204 +3VS 2 @ 6P_0402_50V8K 1 1 2 2 C398 Q33 1 2N7002_SOT23 NB_DDC_DATA 7 3 C NB_DDC_CLK 7 S L3 +3VS 10K_0402_5% 1 2 DVI_B +CRT_VCC 10K_0402_5% 1 2 L2 1 2 FCM2012C-800_0805 +CRT_VCC S NB_CRT_G DVI_G 2 G 7 1 2 FCM2012C-800_0805 D NB_CRT_R 2.2K_0402_5% 2 1 2 G 7 4.7K_0402_5% 1 2 DVI_R L1 4.7K_0402_5% 1 2 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 C9 L29 1 2 CHB1608B121_0603 L30 1 2 CHB1608B121_0603 A Y C11 1 2 P OE# 0.1U_0402_16V4Z 2 A Y U24 SN74AHCT1G125GW_SOT353-5 DV I_HSYNC DVI_VSYNC 1 1 C403 C401 @ 68P_0402_50V8K @ 68P_0402_50V8K 2 2 3 G 7 NB_CRT_VSYNC R4 1K_0402_5% 1 U3 SN74AHCT1G125GW_SOT353-5 +CRT_VCC 4 G 7 NB_CRT_HSYNC 3 2 5 1 0.1U_0402_16V4Z 2 2 P OE# 1 +CRT_VCC 5 1 68P_0402_50V8K 68P_0402_50V8K C12 B B A A Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size B Date: Compal Electronics, Inc. CRT CONNECTOR Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Sheet 1 Rev 1.0 13 of 42 5 4 3 2 1 PCI_AD[0..31] 18,19,20,22,23 PCI_AD[0..31] +3VS RP8 C314 1 1 2 3 4 C 8 7 6 5 PCI_STOP# PCI_TRDY# PCI_FRAME# PCI _IRDY# 2 +PCIE_VDDR 2 50mil trace lenght 10U_0805_10V4Z C312 1 2 0.1U_0402_10V6K 8.2K_1206_8P4R_5% RP9 1 2 3 4 8 7 6 5 PCI_SERR# PCI_PERR# LOCK# PCI_DEVSEL# 8.2K_1206_8P4R_5% RP24 1 2 3 4 R3821 R1621 8 7 6 5 PCI_GNT#5 PCI_GNT#4 PCI_GNT#3 PCI_GNT#2 4,11,40 CPU_STP# 8.2K_1206_8P4R_5% 2 8.2K_0402_5%PCI_REQ#6 2 8.2K_0402_5%PCI_GNT#6 +1.8VS C288 2 20,22 PCI_PIRQA# PCI_PIRQB# 23 PCI_PIRQF# 19,23 PCI_PIRQG# 1 + 2 1 R167 PCIE_CALI PCIE_PVDD F26 R29 G26 P26 K26 L26 P28 N26 P27 PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7 PCIE_VDDR_8 PCIE_VDDR_9 H28 F29 H29 H26 F27 G29 L29 J26 L28 J27 N27 M26 K27 P29 P30 PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8 PCIE_VSS_9 PCIE_VSS_10 PCIE_VSS_11 PCIE_VSS_12 PCIE_VSS_13 PCIE_VSS_14 PCIE_VSS_15 2 0_0402_5%AJ8 AK7 AG5 AH5 AJ5 AH6 AJ6 AK6 AG7 AH7 PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH# CPU_STP#/DPSLP# PCI_STP# INTA# INTB# INTC# INTD# INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36 470U_D2_2.5VM 1 C285 C291 C552 C550 C537 C562 C559 C561 C558 C541 C531 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 +PCIE_VDDR 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4 4 4 4 4 4 4 4 4 4 H_PWRGOOD H_INTR H_NMI H_INIT# H_SMI# H_CPUSLP# H_IGNNE# H_A20M# H_FERR# H_STPCLK# SB_32KH0 B1 X2 DPRSLPVR BM_REQ# H_RESET# H_A20M# R336 2 1 10K_0402_5% R317 2 1 @ 0_0402_5% C29 A28 C28 B29 D29 E4 B30 F28 E28 E29 D25 E27 D27 D28 CPU_PG/LDT_PG INTR/LINT0 NMI/LINT1 INIT# SMI# SLP#/LDT_STP# IGNNE# A20M# FERR# STPCLK#/ALLOW_LDTSTP LDT_PG/SSMUXSEL/GPIO0 DPRSLPVR BMREQ# LDT_RST# CHS-215SB400-02_BGA564 PCI_PAR LPC_DRQ0# SERIRQ LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# LPC_DRQ1# SERIRQ AK27 SERIRQ VBAT RTC_GND A2 A1 2 8.2K_0402_5% 4 3 2 1 RP20 5 6 7 8 10K_1206_8P4R_5% 4 3 2 1 RP21 5 6 7 8 100K_1206_8P4R_5% C LPC_AD2 LPC_AD1 LPC_AD0 LPC_AD3 AG25 AH25 AJ25 AH24 AG24 AH26 AG26 C2 F3 R136 1 LPC_DRQ1# PM_CLKRUN# PCI_C/BE#0 19,20,22,23 PCI_C/BE#1 19,20,22,23 PCI_C/BE#2 19,20,22,23 PCI_C/BE#3 19,20,22,23 PCI_FRAME# 19,20,22,23 PCI_DEVSEL# 19,20,22,23 PCI_IRDY# 19,20,22,23 PCI_TRDY# 19,20,22,23 PCI_PAR 19,20,22,23 PCI_STOP# 19,20,22,23 PCI_PERR# 19,20,22,23 PCI_SERR# 19,20,22,23 PCI_REQ#0 22 PCI_REQ#1 19 PCI_REQ#2 20 PCI_REQ#3 23 PCI_REQ#4 PCI_REQ#5 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 1 R151 2 4.7K_0402_5% 22 19 20 23 B PM_CLKRUN# 19,20,22,23,28 RTC Battery LPC_AD0 28,29 LPC_AD1 28,29 LPC_AD2 28,29 LPC_AD3 28,29 LPC_FRAME# 28,29 - + BATT1 2 1 +RTCBATT +RTCBATT LPC_DRQ1# SERIRQ RTC_CLK 20,28,29 45@ RTCBATT RTC_CLK 18 AUTO_ON# 18 +SB_VBAT D12 Place J1 close to DDR-SODIMM BAS40-04_SOT23 +RTCVCC +SB_VBAT Consider --connect RTC_CLK to EC R87 2 1 470_0805_5% C278 2 18P_0402_50V8J 1 4 OUT IN 1 R88 2 1 470_0805_5% W=20mils No short 2 JOPEN1 @ JUMP_43X39 +CHGRTC 1 2 C274 0.1U_0402_16V4Z A R102 20M_0603_5% 2 2 3 1 NC 1 C287 +3VS LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1# RTCCLK RTC_IRQ#/ACPWR_STRAP 2 C563 @ 100P_0402_50V8J 19,20,22,23,28,29 R165 8.2K_0402_5% PCI_FRAME# PCI_DEVSEL# PCI _IRDY# PCI_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_REQ#5 PCI_REQ#6 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PCI_GNT#5 PCI_GNT#6 PM_CLKRUN# LOCK# SB_32KHI NC 18P_0402_50V8J 1 C286 Y1 X1 H_PWRGD 1 R103 2 20M_0603_5% A B2 Pull-high on CPU side 40 7 4,6 SB_32KH0 SB_32KHI XTAL L22 CHB2012U170_0805 B D 1 1U_0402_6.3V4Z PCIE_CALRP PCIE_CALRN 1 PCIRST# CLK_PCI_MINI 23 CLK_PCI_CB 20 CLK_PCI2 18 CLK_PCI3 18 CLK_PCI_LAN 18,19 CLK_PCI_LPC 18,28 CLK_PCI_1394 18,22 CLK_PCI7 18 CLK_PCI_SIO 18,29 2 C313 1 RP10 G27 2 1 R1082 150_0402_1% H27 1 +PCIE_VDDR R110 150_0402_1% G28 1 2 R343 4.12K_0603_1% 80mA PCIE_PVDD R30 CLK_PCI_MINI CLK_PCI_CB CLK_PCI2 CLK_PCI3 CLK_PCI_LAN CLK_PCI_LPC CLK_PCI_1394 CLK_PCI7 CLK_PCI_SIO 3 5 6 7 8 PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N 22_0402_5% 22_0402_5% 22_0402_5% 22_0402_5% 22_0402_5% 22_0402_5% 22_0402_5% 22_0402_5% 22_0402_5% 22_0402_5% 1 Trace width L24 8.2K_1206_8P4R_5% 4 PCI_REQ#4 3 PCI_REQ#5 2 PCI_GNT#0 1 PCI_GNT#1 M29 N29 M28 N28 J29 K29 J28 K28 2 2 2 2 2 2 2 2 2 2 1 SB_A_RXP0 SB_A_RXN0 SB_A_RXP1 SB_A_RXN1 PCIRST# PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 1 1 1 1 1 1 1 1 1 1 2 8.2K_1206_8P4R_5% 6 6 6 6 AJ7 W3 Y2 W4 Y3 V1 Y4 V2 W2 AA4 V4 AA3 U1 AA2 U2 AA1 U3 T4 AC1 R2 AD4 R3 AD3 R4 AD2 P2 AE3 P3 AE2 P4 AF2 N1 AF1 V3 AB4 AC2 AE4 T3 AC4 AC3 T2 U4 T1 AB2 AB3 AF4 AF3 AG2 AG3 AH1 AH2 AH3 AJ2 AK2 AJ3 AK3 AG4 AH4 AJ4 AG1 AB1 R340 R333 R117 R118 R354 R344 R349 R124 R365 R363 2 PCI_REQ#3 PCI_REQ#0 PCI_REQ#2 PCI_REQ#1 1 2 CHB2012U170_0805 8 7 6 5 PCIRST# AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11 AD8/ROMA9 AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE0#/ROMA10 CBE1#/ROMA1 CBE2#/ROMWE# CBE3# FRAME# DEVSEL#/ROMA0 IRDY# TRDY#/ROMOE# PAR/ROMA19 STOP# PERR# SERR# REQ0# REQ1# REQ2# REQ3#/PDMA_REQ0# REQ4#/PLL_BP33/PDMA_REQ1# REQ5#/GPIO13 REQ6#/GPIO31 GNT0# GNT1# GNT2# GNT3#/PLL_BP66/PDMA_GNT0# GNT4#/PLL_BP50/PDMA_GNT1# GNT5#/GPIO14 GNT6#/GPIO32 CLKRUN# LOCK# PCI_CLK0_R PCI_CLK1_R PCI_CLK2_R PCI_CLK3_R PCI_CLK4_R PCI_CLK5_R PCI_CLK6_R PCI_CLK7_R PCI_CLK8_R PCICLK9_R PCICLKFB 1U_0402_6.3V4Z +1.8VS 1 2 3 4 PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N L4 L3 L2 L1 M4 M3 M2 M1 N4 N3 N2 1 RP22 RP25 PCIE_RCLKP PCIE_RCLKN M30 N30 K30 L30 H30 J30 F30 G30 PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6 PCICLK7 PCICLK8 PCICLK9 PCICLK_FB 2 SB_A_TXP0 SB_A_TXN0 SB_A_TXP1 SB_A_TXN1 2 2 C300 2 C305 2 C295 C298 SB400 PCI CLKS 8.2K_1206_8P4R_5% PCI_PIRQG# 5 4 PCI_PIRQH# 6 3 PCI_PIRQE# 7 2 PCI_PIRQF# 8 1 11 CLK_SB_ALINK 11 CLK_SB_ALINK# 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K 1 0.1U_0402_10V6K NB_A_RXP0 NB_A_RXN0 NB_A_RXP1 NB_A_RXN1 A_RST# L27 M27 L PC *** 6 6 6 6 AH8 PCI INTERFACE RP23 D NB_RST# CPU 7 2 8.2K_0402_5% U9A NB_RST# RTC R163 1 PCI EXPRESS INTERFACE 8.2K_1206_8P4R_5% PCI_PIRQD# 5 4 PCI_PIRQC# 6 3 PCI_PIRQB# 7 2 PCI_PIRQA# 8 1 *** 2 Compal Secret Data Security Classification 2005/03/01 Issued Date 32.768KHZ_12.5P_1TJS125DJ2A073 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size Date: Compal Electronics, Inc. PCI_EXP/LPC/RTC Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet 1 14 of 42 5 4 3 2 1 +3VALW 1 R95 2 OSCLIN 0_0402_5% U9B RP17 4.7K_1206_8P4R_5% R96 R99 R94 2 4.7K_0402_5% EC_SWI# 2 10K_0402_5% PM_SLP_S3# 2 10K_0402_5% PBTN_OUT# 1 1 1 SIO_SMI# H_PROCHOT# EC_RSMRST# ** 11 +3VS CLK_SB_14M 2 R97 1 0_0402_5% 1C279 @ 15P_0402_50V8D 2 R326 1 R337 1 2 10K_0402_5% 2 10K_0402_5% AGP_BUSY# AGP_STP# R90 1 R385 1 2 10K_0402_5% 2 10K_0402_5% SIO_SMI# SB_GA20 R384 1 R98 1 R325 1 2 10K_0402_5% 2 2.2K_0402_5% 2 2.2K_0402_5% SB_KBRST# SB_SMCLK SB_SMDATA AGP_STP# AGP_BUSY# 26 PIDERST# 25 SPKR 9,10,11 SB_SMCLK 9,10,11 SB_SMDATA C A23 SB_INT_FLASH_SEL 29 SB_INT_FLASH_SEL 26 SIDERST# 11,16 CLK_OK ** SPKR SB_SMCLK SB_SMDATA GPIO9 GPIO8 GPIO11 GPIO12 AC_BITCLK 8 AC_SDIN1 7 AC_SDIN2 6 AC_SDIN0 5 10K_1206_8P4R_5% ** 10K_1206_8P4R_5% 4 5 3 6 2 7 1 8 B23 AK24 B25 C25 C23 D24 D23 A27 C24 A26 B26 B27 C26 C27 D26 J2 K3 J3 K2 RP7 1 2 3 4 D1 24,32 AC_BITCLK 18,24,32 AC_SDOUT 24 AC_SDIN0 32 AC_SDIN1 GPIO12 GPIO8 GPIO11 GPIO9 24,32 AC_SYNC 24,32 AC_RST# 18 SPDIF_OUT RP15 AC_BITCLK AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 A C_SYNC AC_RST# SPDIF_OUT R327 2 33_0402_5% 1 1 1 R113 2 33_0402_5% R330 2 33_0402_5% G1 G2 H4 G3 G4 H1 H3 H2 RSMRST# 14M_X1/OSC 14M_X2 SIO_CLK ROM_CS#/GPIO1 GHI#/GPIO6 VGATE/GPIO7 AGP_STP#/GPIO4 AGP_BUSY#/GPIO5 FANOUT0/GPIO3 SPKR/GPIO2 SCL0/GPOC0# SDA0/GPOC1# DDC1_SCL/GPIO9 DDC1_SDA/GPIO8 DDC2_SCL/GPIO11 DDC2_SDA/GPIO12 NC1 NC4 NC3 NC2 AC_BITCLK AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_SYNC AC_RST# SPDIF_OUT USB INTERFACE 7 NB_SUS_STAT# SB400 48M_X1/USBCLK TALERT#/TEMP_ALERT#/GPIO10 48M_X2 BLINK/GPM6# USB_RCOMP PCI_PME#/GEVENT4# USB_VREFOUT RI#/EXTEVNT0# USB_ATEST1 SLP_S3# USB_ATEST0 SLP_S5# USB_OC0#/GPM0# PWR_BTN# USB_OC1#/GPM1# PWR_GOOD USB_OC2#/FANOUT1/GPM2# SUS_STAT# USB_OC3#/GPM3# TEST1 USB_OC4#/GPM4# TEST0 USB_OC5#/GPM5# GA20IN USB_OC6#/FAN_ALERT#/GEVENT6# KBRST# USB_OC7#/CASE_ALERT#/GEVENT7# SMBALERT#/THRMTRIP#/GEVENT2# LPC_PME#/GEVENT3# USB_HSDP7+ LPC_SMI#/EXTEVNT1# USB_HSDM7VOLT_ALERT#/S3_STATE/GEVENT5# SYS_RESET#/GPM7# USB_HSDP6+ WAKE#/GEVENT8# USB_HSDM6- USB PWR EXTEVENT0# PCIE_PME# EC_FLASH# PM_SLP_S5# 8 7 6 5 PM_SLP_S3# PM_SLP_S5# PBTN_OUT# SB_PWRGD C6 D5 C4 D3 B4 E3 B3 C3 R3081 2 0_0402_5% D4 R3191 2 10K_0402_5% F2 R3141 2 10K_0402_5% E2 SB_GA20 AJ26 SB_KBRST# AJ27 MAINPWON_R D6 EC_PME# C5 SIO_SMI# A25 D8 MASTER_RST# D7 PCIE_PME# D2 EC_SWI# EXTEVENT0# PM_SLP_S3# PM_SLP_S5# PBTN_OUT# ACPI/WAKE UP EVENTS 1 2 3 4 28 28 28 16 EC_THRM# CLK / RST RP6 EC_THRM# EC_FLASH# EC_SWI# GPIO 10K_1206_8P4R_5% D 28 29 28 (NOT USED) MASTER_RST# EC_THRM# EC_PME# AC_RST# 8 7 6 5 A C97 1 2 3 4 B D32 SB_GA20 @1CH751H-40_SC76 GATEA20 2 1 SB_KBRST# @1CH751H-40_SC76 KBRST# 2 D31 R392 2 1 0_0402_5% CH751H-40_SC76 2 1 MAINPWON_R GATEA20 28 R393 2 0_0402_5% KBRST# 28 R1001 2@ 10K_0402_5% A15 R3071 2@ 10K_0402_5% B15 2 11.3K_0603_1% C15 USB_RCOMP R3181 D16 C16 D15 USB_OC0# B8 USB_OC1# C8 USB_OC2# C7 EC_LID_OUT# B7 EC_LID_OUT# 28 USB_OC4# B6 EC_SCI# A6 EC_SCI# 28 USB_OC6# B5 EC_SMI# A5 EC_SMI# 28 A11 B11 RP16 10K_1206_8P4R_5% USB_HSDP5+ USB_HSDM5- A14 B14 USB_HSDP4+ USB_HSDM4- A13 B13 USB_HSDP3+ USB_HSDM3- A18 B18 USB_HSDP2+ USB_HSDM2- A17 B17 USB_HSDP1+ USB_HSDM1- A21 B21 USB_HSDP0+ USB_HSDM0- A20 B20 AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 C21 C18 D13 D10 D20 D17 C14 C11 AVDDTX AVDDC A16 AVDDC AVSSC B16 AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24 A9 A12 A19 A22 B9 B12 B19 B22 C9 C10 C12 C13 C17 C19 C20 C22 D9 D11 D12 D14 D18 D19 D21 D22 USBP4+ USBP4- USBP2+ USBP2- USBP0+ USBP0- 27 27 USBP0+ USBP0- 27 27 L18 C FBM-10-201209-260-T_0805 2 1 AVDDTX C268 1 2 10U_0805_10V4Z C281 1 2 1U_0402_6.3V4Z C512 1 C513 1 C514 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z L19 1 AVDDRX B FBM-10-201209-260-T_0805 2 C270 1 2 10U_0805_10V4Z C283 1 2 1U_0402_6.3V4Z C521 1 C510 1 C511 1 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z L21 1 X1 2 1 USBP2+ USBP2- AVDDC 47K_0402_5% +3VALW 1 FBM-10-201209-260-T_0805 2 C277 1 2 10U_0805_10V4Z C276 1 2 1U_0402_6.3V4Z C504 1 2 0.1U_0402_16V4Z A 48MHZ_4P_FN4800002 OSCLIN OUT 3 VDD 1 OE C267 0.1U_0402_10V6K GND 2 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 1 AVDDRX 2 1 2 Control by EC Delay 50ms after +3VALW ready R74 10K_0402_5% 2 5 6 7 8 EC_RSMRST# 28 EC_RSMRST# 4 EC_SMI# USB_OC6# EC_SCI# USB_OC4# 27 27 RP5 R137 1 USBP4+ USBP4- MAINPWON 4,34,35,37,38 +3VALW R84 0_0603_5% +3VALW 10K_1206_8P4R_5% EC_LID_OUT# 5 4 USB_OC2# 6 3 USB_OC0# 7 2 USB_OC1# 8 1 A10 B10 CHS-215SB400-02_BGA564 D11 A D 4 3 2 Title Compal Electronics, Inc. SB450 USB/ACPI/AC97/GPIO Size Document Number CustomHAZ00/BL10E (LA2861) Date: Monday, August 08, 2005 Sheet 1 15 of Rev 1.0 42 5 4 3 2 1 U9C AK19 AJ19 SATA_TX1+ SATA_TX1- AK18 AJ18 SATA_RX1SATA_RX1+ AK14 AJ14 SATA_TX2+ SATA_TX2- AK13 AJ13 SATA_RX2SATA_RX2+ AK11 AJ11 SATA_TX3+ SATA_TX3- AK10 AJ10 SATA_RX3SATA_RX3+ AJ15 SATA_CAL AJ16 SATA_X1 AK16 SATA_X2 C PIDE_IORDY PIDE_IRQ PIDE_A0 PIDE_A1 PIDE_A2 PIDE_DACK# PIDE_DRQ PIDE_IOR# PIDE_IOW# PIDE_CS1# PIDE_CS3# AD30 AE28 AD27 AC27 AD28 AD29 AE27 AE30 AE29 AC28 AC29 IDE_ PDIORDY INT_IRQ14 IDE_PDA0 IDE_PDA1 IDE_PDA2 IDE_PDDACK# IDE_PDDREQ IDE_PDIOR# IDE_PDIOW# IDE_PDCS1# IDE_PDCS3# PIDE_D0 PIDE_D1 PIDE_D2 PIDE_D3 PIDE_D4 PIDE_D5 PIDE_D6 PIDE_D7 PIDE_D8 PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15 AF29 AF27 AG29 AH30 AH28 AK29 AK28 AH27 AG27 AJ28 AJ29 AH29 AG28 AG30 AF30 AF28 IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15 V29 T27 T28 U29 T29 V30 U28 W29 W30 R27 R28 IDE_ SDIORDY INT_IRQ15 IDE_SDA0 IDE_SDA1 IDE_SDA2 IDE_SDDACK# IDE_SDDREQ IDE_SDIOR# IDE_SDIOW# IDE_SDCS1# IDE_SDCS3# SIDE_D0/GPIO15 SIDE_D1/GPIO16 SIDE_D2/GPIO17 SIDE_D3/GPIO18 SIDE_D4/GPIO19 SIDE_D5/GPIO20 SIDE_D6/GPIO21 SIDE_D7/GPIO22 SIDE_D8/GPIO23 SIDE_D9/GPIO24 SIDE_D10/GPIO25 SIDE_D11/GPIO26 SIDE_D12/GPIO27 SIDE_D13/GPIO28 SIDE_D14/GPIO29 SIDE_D15/GPIO30 V28 W28 Y30 AA30 Y28 AA28 AB28 AB27 AB29 AA27 Y27 AA29 W27 Y29 V27 U27 IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 AVSS_SATA_33 AVSS_SATA_34 AVSS_SATA_35 AVSS_SATA_36 AVSS_SATA_37 AVSS_SATA_38 AVSS_SATA_39 AVSS_SATA_40 AVSS_SATA_41 AVSS_SATA_42 AVSS_SATA_43 AVSS_SATA_44 AVSS_SATA_45 AG13 AH22 AK12 AH11 AJ17 AH14 AH19 AJ20 AH21 AJ9 AG16 AK15 AK20 SATA_ACT# AH15 PLLVDD_SATA SIDE_IORDY SIDE_IRQ SIDE_A0 SIDE_A1 SIDE_A2 SIDE_DACK# SIDE_DRQ SIDE_IOR# SIDE_IOW# SIDE_CS1# SIDE_CS3# AH16 XTLVDD_SATA AG10 AG14 AH12 AG12 AG18 AG21 AH18 AG20 AVDD_SATA_1 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_4 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 AVDD_SATA_8 AG9 AF10 AF11 AF12 AF13 AF14 AF15 AF16 AF17 AF18 AF19 AF20 AF21 AF22 AH9 AG11 AG15 AG17 AG19 AG22 AG23 AF9 AH17 AH23 AH13 AH20 AK9 AJ12 AK17 AK23 AH10 AJ23 AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 AVSS_SATA_21 AVSS_SATA_22 AVSS_SATA_23 AVSS_SATA_24 AVSS_SATA_25 AVSS_SATA_26 AVSS_SATA_27 AVSS_SATA_28 AVSS_SATA_29 AVSS_SATA_30 AVSS_SATA_31 AVSS_SATA_32 SECONDARY ATA 66/100 AK8 SB400 PRIMARY ATA 66/100 SATA_RX0SATA_RX0+ SERIAL ATA SATA_TX0+ SATA_TX0- AK21 AJ21 SERIAL ATA POWER D AK22 AJ22 IDE_PDIORDY 26 INT_IRQ14 26 IDE_PDA0 26 IDE_PDA1 26 IDE_PDA2 26 IDE_PDDACK# 18,26 IDE_PDDREQ 26 IDE_PDIOR# 26 IDE_PDIOW# 26 IDE_PDCS1# 26 IDE_PDCS3# 26 D IDE_PDD[0..15] 26 IDE_SDIORDY 26 INT_IRQ15 26 IDE_SDA0 26 IDE_SDA1 26 IDE_SDA2 26 IDE_SDDACK# 26 IDE_SDDREQ 26 IDE_SDIOR# 26 IDE_SDIOW# 26 IDE_SDCS1# 26 IDE_SDCS3# 26 IDE_SDD[0..15] 26 C B B +3VS 1 U11-->please close to SB450(U7) +3VALW +3VALW +3VALW R129 +3VALW +3VALW +3VALW +3VALW C127 0.1U_0402_16V4Z C128 0.1U_0402_16V4Z 2 SN74LVC14APWLE_TSSOP14 U7D C293 I P 14 11 1 2 330K_0402_5% O 1 10 U7E SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14 O 12 U7F CLK_OK 9 A 10 B 12 A CLK_OK 13 B U5C O 8 SB_PWRGD 15 SN74LVC08APW_TSSOP14 SN74LVC14APWLE_TSSOP14 U5D P 14 11,15 11 NB_PWRGD 7 G O 7 CLK_OK I SB_PWRGD# 7 +3VALW CLK_OK 13 0.47U_0603_10V7K 2 2 SN74LVC14APWLE_TSSOP14 P R111 R115 1 2 0_0402_5% P 8 G O G I 14 14 14 P U7C 9 7 0.1U_0402_10V6K 1M_0402_5% 1 6 7 C308 O G U7B I 7 5 1 2 330K_0402_5% G 4 P R130 O 7 I G U7A 3 7 2 7 1 R128 14 14 O G I CHS-215SB400-02_BGA564 7 1 VGATE G 40 P P 2 14 10K_0402_5% SN74LVC08APW_TSSOP14 A A Compal Secret Data Security Classification Issued Date 2005/03/01 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. SB450 IDE/SATA Size Document Number CustomHAZ00/BL10E (LA2861) Date: Re v 1.0 Sheet Monday, August 08, 2005 1 16 of 42 +3VS U9D 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z A30 D30 E24 E25 J5 K1 K5 N5 P5 R1 U5 U26 U30 V5 V26 Y1 Y26 AA5 AA26 AB5 AC30 AD5 AD26 AE1 AE5 AE26 AF6 AF7 AF24 AF25 AK1 AK4 AK26 AK30 +1.8VS +3VS +1.8VALW 1 1 C660 2 C661 2 22U_1210_10V4Z 22U_1210_10V4Z C566 C553 C560 C573 C653 C654 C655 C656 C570 C569 C547 C571 C556 C554 C572 C578 C557 C577 C555 C546 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C266 C275 C508 C507 C523 C525 C535 1 1 1 1 1 1 1 2 2 2 2 2 2 2 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 220mA M12 M13 M18 M19 N12 N13 N18 N19 V12 V13 V18 V19 W12 W13 W18 W19 +3VALW +1.8VALW C536 C657 C526 C530 C524 1 1 1 1 1 2 2 2 2 2 1U_0402_6.3V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C534 C532 C540 C533 1 1 1 1 2 2 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C516 1 2 +1.05VS D14 +3VS 2 AVDD_CK V5_VREF 1 CH751H-40_SC76 +1.8VS 2 2 1 1 C337 1 R154 2 1K_0402_5% C589 0.1U_0402_16V4Z R86 0_0805_5% 2 +5VS 1 1U_0402_6.3V4Z C269 1 2 10U_0805_10V4Z C282 1 2 1U_0402_6.3V4Z C280 1 2 0.1U_0402_16V4Z VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 VDDQ_24 VDDQ_25 VDDQ_26 VDDQ_27 VDDQ_28 VDDQ_29 VDDQ_30 VDDQ_31 VDDQ_32 VDDQ_33 VDDQ_34 SB400 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 A3 A7 E6 E7 E1 F5 S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 E9 E10 E20 E21 S5_1.8V_1 S5_1.8V_2 S5_1.8V_3 S5_1.8V_4 E13 E14 E16 E17 USB_PHY_1.8V_1 USB_PHY_1.8V_2 USB_PHY_1.8V_3 USB_PHY_1.8V_4 C30 CPU_PWR AG6 V5_VREF A24 B24 AVDDCK AVSSCK A4 A8 A29 B28 C1 E5 E8 E11 E12 E15 E18 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 POWER C587 C585 C651 C652 C520 C543 C522 C542 C564 C579 C584 C568 C576 C565 C586 C581 C594 C519 C598 C596 C597 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 E19 E22 E23 E26 E30 F1 F4 G5 H5 J1 J4 K4 L5 M5 P1 R5 R26 T5 T26 T30 W1 W5 W26 Y5 AB26 AB30 AC5 AC26 AD1 AF5 AF8 AF23 AF26 AG8 AJ1 AJ24 AJ30 AK5 AK25 M14 M15 M16 M17 N14 N15 N16 N17 P12 P13 P14 P15 P16 P17 P18 P19 R12 R13 R14 R15 R16 R17 R18 R19 T12 T13 T14 T15 T16 T17 T18 T19 U12 U13 U14 U15 U16 U17 U18 U19 V14 V15 V16 V17 W14 W15 W16 W17 CHS-215SB400-02_BGA564 Compal Secret Data Security Classification Issued Date 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Size B Date: Compal Electronics, Inc. SB450/POWER/GND Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Sheet Rev 1.0 17 of 42 5 4 +3VALW +3VS 3 +3VALW +3VS +3VS +3VS 2 +3VS +3VS +3VS 1 +3VS 1 R122 R367 R335 10K_0402_5% 10K_0402_5% @ 10K_0402_5% 2 2 2 1 1 R351 10K_0402_5% @ 10K_0402_5% 2 R345 2 2 1 1 1 1 1 R355 R321 R341 @ 10K_0402_5% 10K_0402_5% @ 10K_0402_5% 2 R309 10K_0402_5% 2 1 1 R329 @ 10K_0402_5% 2 2 R315 10K_0402_5% 2 1 +3VS AUTO_ON# AC_SDOUT RTC_CLK SPDIF_OUT CLK_PCI3 CLK_PCI_LAN CLK_PCI_LPC CLK_PCI_1394 CLK_PCI7 CLK_PCI_SIO D Selects type of 48MHz clock pad 1 1 1 1 1 1 1 1 14 CLK_PCI2 1 14 15,24,32 14 15 14 14,19 14,28 14,22 14 14,29 D R123 R366 @ 10K_0402_5% 10K_0402_5% R334 @ 10K_0402_5% 2 2 2 2 2 R356 R346 R350 10K_0402_5% @ 10K_0402_5% 10K_0402_5% 2 R342 @ 10K_0402_5% 2 2 R320 10K_0402_5% 2 R328 10K_0402_5% REQUIRED STRAPS ACPWRON AUTO_ON# AC97_SDOUT USE DEBUG STRAPS MANUAL PWR ON PULL HIGH C DE FAULT RTC_CLK SPDIF_OUT CLK_PCI3 INTERNAL RTC PU for 48Mhz X TAL mode USB PHY PWRDOWN DISABLE CLK_PCI_LAN CLK_PCI_LPC PCI_CLK6 PCI_CLK7 PCIE CM_SET low ROM TYPE Internal PLL DE FAULT CPU I/F = K8 PCI_CLK8 CLK_PCI_MINI2 Clock input buffer H,H = PCI ROM DE FAULT C DE FAULT H,L = LPC ROM I CPU I/F = P4 DE FAULT L,L = FWH ROM +3VS +3VS +3VS +3VS 1 +3VS Crytsal Pad L,H = LPC ROM II DE FAULT 1 +3VS PCIE CM_SET HIGH 1 +3VS DE FAULT External Clock DE FAULT 1 +3VS 1 +3VS 1 1 +3VS USB PHY PWRDOWN ENABLE 48M OSC mode 1 DE FAULT EXTERNAL RTC (NOT SUPPORTED W/ IT8712 ) 1 IGNORE DEBUG STRAPS 1 AUTO PWR ON PULL LOW 2 2 2 2 2 2 2 2 2 2 R132 R138 R142 R149 R127 R146 R373 R141 R369 R381 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% ** 16,26 IDE_PDDACK# 14,19,20,22,23 PCI_AD31 14,19,20,22,23 PCI_AD30 14,19,20,22,23 PCI_AD29 14,19,20,22,23 PCI_AD28 14,19,20,22,23 PCI_AD27 14,19,20,22,23 PCI_AD26 14,19,20,22,23 PCI_AD25 14,19,20,22,23 PCI_AD24 14,19,20,22,23 PCI_AD23 1 1 R139 @ 10K_0402_5% 2 R131 10K_0402_5% 2 R380 10K_0402_5% 2 R370 10K_0402_5% 2 2 2 2 1 1 1 1 1 1 2 2 R143 R148 R126 R147 R374 R140 @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% @ 10K_0402_5% 10K_0402_5% 2 Pop R634 when debug . 1 B 1 B DEBUG STRAPS IDE_PDDACK# PCI_AD31 PULL HIGH USE LONG RESET Res erved PCI_AD30 Res erved PCI_AD29 Res erved PCI_AD28 PCI_AD27 Res erved PCI_AD24 PCI_AD23 BYPASS PCI PLL PCI_AD26 BYPASS ACPI BCLK BYPASS IDE PLL PCI_AD25 USE EEPROM PCIE STRAPS Res erved USE PCI PLL USE ACPI BCLK USE IDE PLL USE DEFAULT PCIE STRAPS DE FAULT DE FAULT DE FAULT DE FAULT DE FAULT PULL LOW USE SHORT RESET A Compal Secret Data Security Classification 2005/03/01 Issued Date A 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. HARDWARE TRAP Size Document Number CustomHAZ00/BL10E (LA2861) Date: Monday, August 08, 2005 Rev 1.0 Sheet 1 18 of 42 C D E R215 2 1 4.7K_0402_5% 2 1 21 38 51 66 81 91 101 119 1 C433 22P_0402_50V8J 2 35 52 80 100 22 48 62 73 112 118 CTRL25 8 GND GND GND GND 2 PR1- RJ45_TX+ 1 PR1+ 2 1 1K_0402_5% R231 1 15K_0402_5% 1 5.6K_0603_1% 10 2 300_0402_5% SHLD2 14 SHLD1 13 Green LED- 9 Green LED+ +3VS 1 1 TYCO_3-440470-4 2 R201 R202 75_0402_5% 75_0402_5% 2 LINK_10_100# R221 C391 1 2 RJ45_PR 0.1U_0402_16V4Z LANGND 1 1 1000P_1206_2KV7K C1 +3VALW Termination plane should be coupled to chassis ground 2 2 C2 4.7U_0805_10V4Z E +LAN_DVDD CTRL25 2 Q8 2SB1197K_SOT23 2 B 40mil +2.5V_LAN C34 10U_0805_10V4Z 1 1 2 2 C35 0.1U_0402_16V4Z Layout Note TS6121 pls close to conn. U18 RTT3/CRTL18 125 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 26 41 56 71 84 94 107 GND/VSS GND/VSS GND/VSS GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST GND/VSSPST 2 CTRL25 Y2 LAN_X1 2 1 +3VALW C416 27P_0402_50V8J LAN_TD+ LAN_TDLAN_X2 1 25MHZ_20P 2 2 1 C415 27P_0402_50V8J R210 49.9_0402_1% LAN_RD+ LAN_RDR211 49.9_0402_1% R212 +LAN_AVDDL 3 7 20 16 40mil 1 2 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 VDD25/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 NC/VDD18 AVDD25/HSDAC- 32 54 78 99 1 C428 0.1U_0402_16V4Z 2 C425 0.1U_0402_16V4Z 1 24 45 64 110 116 1 2 C421 C431 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 2 +LAN_DVDD 40mil 2 1 2 +3VALW KC FBM-L11-201209-221LMAT_0805 C423 0.1U_0402_16V4Z 2 1 2 L31 1 2 KC FBM-L11-201209-221LMAT_0805 C440 20mil RTL8100CL_LQFP128 +2.5V_LAN_VDD 1 1 C39 0.1U_0402_16V4Z 2 L9 2 1 CHB2012U170_0805 R213 49.9_0402_1% 1 C412 0.1U_0402_16V4Z TX+ TXCT NC NC CT RX+ RX- 2 Closed to RTL8100CL RJ45_TX+ RJ45_TX- 16 14 15 13 12 10 11 9 RJ45_RX+ RJ45_RX- 0.5u_TS6121C 1 C413 2 3 R5 75_0402_5% C14 R6 75_0402_5% 0.1U_0402_16V4Z RJ45_PR 0.1U_0402_16V4Z Closed to RTL8100CL +2.5V_LAN +3VALW 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 12 TD+ TDCT NC NC CT RD+ RD- 49.9_0402_1% L32 AVDD33/AVDDL AVDD33/AVDDL AVDD33/AVDDL NC/AVDDL 1 3 2 4 5 7 6 8 1 CLK CLKRUN# R235 10_0402_5% NC/GND NC/GND NC/GND NC/GND NC/GND NC/GND PR2+ RJ45_TX- 1 1 RST# 28 65 R233 2 2 2 27 14,18 CLK_PCI_LAN 14,20,22,23,28 PM_CLKRUN# 4 17 128 9 13 1 +3VALW C NC/VSS NC/VSS PME# 14,20,22,23,28,29 PCIRST# 3 11 123 124 126 Power 31 22,23,28 LAN_PME# NC/HSDAC+ GND GND NC/LV2 3 2 INTA# 10 120 PR3+ RJ45_RX+ 10mil 15 2 25 14,23 PCI_PIRQG# PCI_PIRQG# NC/AVDDH NC/HV PR3- 4 Q1 DTA114YKA_SC59 3 1 R203 16 SHLD1 1 REQ# GNT# PCI_REQ#1 PCI_GNT#1 88 PR2- 5 2 30 29 14 14 NC/M66EN 6 RJ45_RXACTIVITY# LAN_X1 LAN_X2 105 23 10mil 127 72 10mil 74 PR4+ 1 PERR# SERR# AT93C46-10SI-2.7_SO8 SHLD2 PR4- 7 2 70 75 +3VALW C17 1 0.1U_0402_16V4Z 14 15 18 19 121 122 Amber LED- 8 LAN_TD+ LAN_TDLAN_RD+ LAN_RD- 1 2 5 6 Amber LED+ 11 2 1 14,20,22,23 PCI_PERR# 14,20,22,23 PCI_SERR# 5 6 7 8 GND NC NC VCC 2 PAR FRAME# IRDY# TRDY# DEVSEL# STOP# DO DI SK CS JP12 12 3 76 61 63 67 68 69 2 100_0402_5% ACTIVITY# LINK_10_100# 4 3 2 1 1 14,20,22,23 PCI_PAR 14,20,22,23 PCI_FRAME# 14,20,22,23 PCI_IRDY# 14,20,22,23 PCI_TRDY# 14,20,22,23 PCI_DEVSEL# 14,20,22,23 PCI_STOP# 1 R238 117 115 114 113 LWAKE ISOLATE# RTSET NC/SMBCLK NC/SMBDATA LAN I/F PCI I/F IDSEL PCI_AD22 LED0 LED1 LED2 NC/LED3 X1 X2 46 2 EEDO EEDI EESK EECS NC/MDI2+ NC/MDI2NC/MDI3+ NC/MDI3- C/BE#0 C/BE#1 C/BE#2 C/BE#3 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 108 109 111 106 TXD+/MDI0+ TXD-/MDI0RXIN+/MDI1+ RXIN-/MDI1- 92 77 60 44 14,20,22,23 14,20,22,23 14,20,22,23 14,20,22,23 EEDO AUX/EEDI EESK EECS H 10mil 2 300_0402_5% 47K U4 47K AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 1 +3VALW 10K PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 104 103 102 98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33 +3VALW 10K U20 1 G Q31 DTA114YKA_SC59 3 1 R200 PCI_AD[0..31] 14,18,20,22,23 PCI_AD[0..31] PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 F 2 B 1 A C419 +2.5V_LAN C426 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 C442 C424 2 2 0.1U_0402_16V4Z 1 C441 2 2 0.1U_0402_16V4Z C434 0.1U_0402_16V4Z C38 2 0.1U_0402_16V4Z 4 4 Compal Secret Data Security Classification Issued Date 2005/03/01 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D E F Title Size B Date: Compal Electronics, Inc. RTL8100CL Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 G Rev 1.0 Sheet 19 of H 42 4 2 R407 @10_0402_5% 1 C612 @ 18P_0402_50V8K 2 14,19,22,23 14,19,22,23 14,19,22,23 14,19,22,23 PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0 PCIRST# 14,19,22,23,28,29 PCIRST# 14,19,22,23 PCI_FRAME# 14,19,22,23 PCI_IRDY# 14,19,22,23 PCI_TRDY# 14,19,22,23 PCI_DEVSEL# 14,19,22,23 PCI_STOP# 14,19,22,23 PCI_PERR# 14,19,22,23 PCI_SERR# 14,19,22,23 PCI_PAR 14 PCI_REQ#2 14 PCI_GNT#2 14 CLK_PCI_CB +3VS IDSEL: PCI_AD20 14,22 PCI_PIRQA# B 14,28,29 SERIRQ 14,19,22,23,28 PM_CLKRUN# CLK_PCI_CB 23V_PCM_SUSP 10K_0402_5% 2 PCM_ID 100_0402_5% 1 R159 PCI_AD20 1 R406 PCI_PIRQA# @ 10K_0402_5% 1 @ 10K_0402_5% @ 10K_0402_5% 1 1 1 R161 CBE3# CBE2# CBE1# CBE0# G4 J4 K1 K3 L1 L2 L3 M1 M2 A1 B1 H1 PCIRST# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR PCIREQ# PCIGNT# PCICLK L8 L11 RIOUT#_PME# SUSPEND# F4 K8 N9 K9 N10 2 R171 L10 2 R168 N11 2 M11 0_0402_5% J9 B4 C8 D12 H11 L9 L6 N4 K2 G1 F3 1 S1_A[0..25] VCC10 VCC9 VCC8 VCC7 VCC6 VCC5 VCC4 VCC3 VCC2 VCC1 A7 G13 +3VS MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6 MFUNC7 CCBE3#/REG# CCBE2#/A12 CCBE1#/A8 CCBE0#/CE1# B7 A11 E11 H13 S1_REG# S1_A12 S1_A8 S1_CE1# CRST#/RESET CFRAME#/A23 CIRDY#/A15 CTRDY#/A22 CDEVSEL#/A21 CSTOP#/A20 CPERR#/A14 CSERR#/WAIT# CPAR/A13 CREQ#/INPACK# CGNT#/WE# CCLK/A16 B9 B11 A12 A13 B13 C12 C13 A5 D13 B8 C11 B12 C5 D5 S1_RST S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A14 S1_WAIT# S1_A13 S1_INPACK# S1_WE# A16_CLK 1 R160 S1_BVD1 S1_WP D11 S1_A19 CINT#/READY_IREQ# D6 S1_RDY# SPKROUT CAUDIO/BVD2_SPKR# M9 B5 PCM_SPK# S1_BVD2 A4 L12 D9 C6 A2 E10 J13 S1_CD2# S1_CD1# S1_VS2 S1_VS1 S1_D2 S1_A18 S1_D14 CCD2#/CD2# CCD1#/CD1# CVS2/VS2# CVS1/VS1 CRSV3/D2 CRSV2/A18 CRSV1/D14 GRST# 2 2 C348 0.1U_0402_16V4Z 2 1 C354 0.1U_0402_16V4Z +3VS CAD31/D10 CAD30/D9 CAD29/D1 CAD28/D8 CAD27/D0 CAD26/A0 CAD25/A1 CAD24/A2 CAD23/A3 CAD22/A4 CAD21/A5 CAD20/A6 CAD19/A25 CAD18/A7 CAD17/A24 CAD16/A17 CAD15/IOWR# CAD14/A9 CAD13/IORD# CAD12/A11 CAD11/OE# CAD10/CE2# CAD9/A10 CAD8/D15 CAD7/D7 CAD6/D13 CAD5/D6 CAD4/D12 CAD3/D5 CAD2/D11 CAD1/D4 CAD0/D3 S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3 CBLOCK#/A19 2 1 C355 0.1U_0402_16V4Z S1_D[0..15] 21 B2 C3 B3 A3 C4 A6 D7 C7 A8 D8 A9 C9 A10 B10 D10 E12 F10 E13 F13 F11 G10 G11 G12 H12 H10 J11 J12 K13 J10 K10 K12 L13 CSTSCHG/BVD1_STSCHG# CCLKRUN#/WP_IOIS16# IDSEL S1_A[0..25] 21 S1_D[0..15] 1 C345 0.1U_0402_16V4Z D 1 2 1 C343 0.1U_0402_16V4Z 1 C347 0.1U_0402_16V4Z 2 1 C359 0.1U_0402_16V4Z 2 C358 0.1U_0402_16V4Z 2 +S1_VCC 1 S1_IOWR# 21 S1_IORD# 21 S1_OE# S1_CE2# 2 21 21 1 C351 0.1U_0402_16V4Z 1 C334 0.1U_0402_16V4Z 2 2 1 C340 0.1U_0402_16V4Z S1_CD1# C336 10P_0402_50V8J S1_REG# 21 S1_CE1# 21 S1_RST 21 C349 0.1U_0402_16V4Z 2 S1_CD2# 1 C357 10P_0402_50V8J 2 Closed to Pin L12 C 1 2 Closed to Pin A4 Close chip termenal S1_WAIT# 21 +S1_VCC S1_INPACK# 21 S1_WE# 21 S1_A16 2 33_0402_5% S1_BVD1 21 S1_WP 21 R180 @ 43K_0402_5% S1_RDY# 21 S1_WP PCM_SPK# 25 S1_BVD2 21 S1_CD2# S1_CD1# S1_VS2 S1_VS1 B 21 21 21 21 D3 H2 L4 M8 K11 F12 C10 B6 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 M10 VCCA2 VCCA1 M12 N12 E1 J3 N1 N5 2 R174 PCIRST# VPPD1 VPPD0 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 1 2 1 CLK_PCI_CB C2 C1 D4 D2 D1 E4 E3 E2 F2 F1 G2 G3 H3 H4 J1 J2 N2 M3 N3 K4 M4 K5 L5 M5 K6 M6 N6 M7 N7 L7 K7 N8 CARDBUS PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0 PCI Interface PCI_AD[0..31] D C VCCD1# VCCD0# U29 14,18,19,22,23 PCI_AD[0..31] 2 +S1_VCC +3VS VPPD0 VPPD1 VCCD0# VCCD1# M13 N13 21 21 21 21 3 1 5 PCI1410AGGU_PBGA144 A A Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size B Date: Compal Electronics, Inc. ENE-CB1410 Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Rev 1.0 Sheet 1 20 of 42 5 4 3 2 +S1_VCC PCMCIA Power Controller 1 VCC VCC VCC 12V 13 12 11 2 W=40mil C325 C331 0.1U_0402_16V4Z 2 2 20 S1_A[0..25] 20 SHDN 3.3V 3.3V C326 7 R135 10K_0402_5% 16 2 10 2 VCCD0 VCCD1 VPPD0 VPPD1 3 4 1 OC 1 2 15 14 VCCD0# VCCD1# VPPD0 VPPD1 C304 0.1U_0402_16V4Z CardBus Socket VCCD0# 20 VCCD1# 20 VPPD0 20 VPPD1 20 JP7 8 TPS2211AIDBR_SSOP16 C CardBus Socket 20 S1_A[0..25] 20 S1_D[0..15] S1_A[0..25] S1_D[0..15] Close to CardBus Conn. C316 10U_0805_10V4Z Reserve for Debug. +S1_VCC 1 1 C319 0.1U_0402_16V4Z 2 2 S1_WP 2 43K_0402_5% S1_OE# 2 47K_0402_5% S1_RST 2 47K_0402_5% S1_CE1# 2 47K_0402_5% S1_CE2# 2 47K_0402_5% +S1_VCC 1 R173 1 R332 1 R153 1 R316 1 R324 B +S1_VPP 1 C320 4.7U_0805_10V4Z S1_D[0..15] C322 0.1U_0402_16V4Z S1_D[0..15] D 2 2 C303 4.7U_0805_10V4Z S1_A[0..25] +S1_VPP 5V 5V GND W=40mil 0.1U_0402_16V4Z C329 10U_0805_10V4Z 5 6 +3VS 1 C318 0.1U_0402_16V4Z C321 0.1U_0402_16V4Z 1 VPP 1 1 2 1 0.1U_0402_16V4Z 10U_0805_6.3V6M 1 +S1_VPP 40mil +5VS C335 +S1_VCC C317 0.1U_0402_16V4Z 40mil 9 +S1_VPP +S1_VCC U10 D 1 2 1 C323 0.01U_0402_25V4Z 2 69 70 GND GND DATA3 CD1# DATA4 DATA11 DATA5 DATA12 DATA6 DATA13 DATA7 DATA14 CE1# DATA15 ADD10 CE2# OE# VS1# ADD11 IORD# ADD9 IOWR# ADD8 ADD17 ADD13 ADD18 ADD14 ADD19 WE# ADD20 READY ADD21 VCC VCC VPP VPP ADD16 ADD22 ADD15 ADD23 ADD12 ADD24 ADD7 ADD25 ADD6 VS2# ADD5 RESET ADD4 WAIT# ADD3 INPACK# ADD2 REG# ADD1 BVD2 ADD0 BVD1 DATA0 DATA8 DATA1 GND DATA9 GND DATA2 DATA10 WP CD2# GND GND 1 35 2 36 3 37 4 38 5 39 6 40 7 41 8 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 S1_D3 S1_CD1# S1_D4 S1_D11 S1_D5 S1_D12 S1_D6 S1_D13 S1_D7 S1_D14 S1_CE1# S1_D15 S1_A10 S1_CE2# S1_OE# S1_VS1 S1_A11 S1_IORD# S1_A9 S1_IOWR# S1_A8 S1_A17 S1_A13 S1_A18 S1_A14 S1_A19 S1_WE# S1_A20 S1_RDY# S1_A21 S1_CD1# 20 S1_CE1# 20 S1_CE2# S1_OE# S1_VS1 20 20 20 C S1_IORD# 20 S1_IOWR# 20 S1_WE# 20 S1_RDY# 20 +S1_VCC +S1_VPP S1_A16 S1_A22 S1_A15 S1_A23 S1_A12 S1_A24 S1_A7 S1_A25 S1_A6 S1_VS2 S1_A5 S1_RST S1_A4 S1_WAIT# S1_A3 S1_INPACK# S1_A2 S1_REG# S1_A1 S1_BVD2 S1_A0 S1_BVD1 S1_D0 S1_D8 S1_D1 S1_D9 S1_D2 S1_D10 S1_WP S1_CD2# S1_VS2 20 S1_RST 20 B S1_WAIT# 20 S1_INPACK# 20 S1_REG# 20 S1_BVD2 20 S1_BVD1 20 S1_WP 20 S1_CD2# 20 SANTA_130606-1_LT A A Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size B Date: Compal Electronics, Inc. CARD BUS SOCKET Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Sheet 1 Rev 1.0 21 of 42 5 4 3 2 1 +3VS +3VS R361 C299 1 2 1394@4.7K_0402_5% 1 R362 2 1394@10K_0402_5% R338 2 1 1394@4.7K_0402_5% R359 2 1 1394@4.7K_0402_5% R360 1 2 1394@ 4.7K_0402_5% +3VS D C574 1394@ 0.1U_0402_16V4Z 1 R144 2 1394_IDSEL 1394@100_0402_5% 14,19,20,23 PCI_C/BE#3 14,19,20,23 PCI_C/BE#2 14,19,20,23 PCI_C/BE#1 14,19,20,23 PCI_C/BE#0 14,18 CLK_PCI_1394 14 PCI_GNT#0 14 PCI_REQ#0 86 96 10 11 CYCLEIN CYCLEOUT/CARDBUS CNA TEST17 TEST16 87 20 35 48 62 78 1394@ 0.1U_0402_16V4Z CPS 106 1394@ 0.1U_0402_16V4Z C575 C580 C592 D C591 1394@ 1000P_0402_50V7K 1394@ 1000P_0402_50V7K +3VS 1394@ 1000P_0402_50V7K 1394@ 1000P_0402_50V7K 1394_PLLVDD C307 L25 1 2 1394@ BLM21A601SPT_0805 C311 +3VS 1394@ 4.7U_0805_10V4Z 1394@ 0.01U_0402_25V4Z PCI BUS INTERFACE R120 1 2 1394@ NC/(TPBIAS1) NC/(TPA1+) NC/(TPA1-) NC/(TPB1+) NC/(TPB1-) BIAS CURRENT R0 1K_0402_5% 125 124 123 122 121 C 118 R121 6.34K_0603_1% OSCILLATOR FILTER R1 119 X0 6 X1 5 FILTER0 3 1394@ C548 1394@ 22P_0402_50V8J X3 1394@ 24.576MHz_16P_3XG-24576-43E1 C539 1394@ 22P_0402_50V8J C302 4 1394@ 0.1U_0402_16V4Z EEPROM 2 WIRE BUS SDA 92 SCL 91 1 R347 2 1394@ 220_0402_5% 1 R348 2 1394@ 220_0402_5% PC0 PC1 PC2 99 98 97 FILTER1 POWER CLASS PHY PORT 1 TPBIAS0 TPA0+ TPA0TPB0 + TPB0 - 116 115 114 113 112 C527 R322 1394@ 56.2_0603_1% R311 1394@ 0.33U_0603_16V4Z 1394@ 56.2_0603_1% TPBIAS0 TPA0+ TPA0TPB0+ TPB0- JP22 4 3 2 1 4 3 G 2 G 1 B 6 5 1394@ TYCO_1470383-2 J2 JUMP_43X118 @ TEST3 TEST2 TEST1 TEST0 101 102 104 105 R312 1394@ 56.2_0603_1% R353 R323 1394@ 56.2_0603_1% 2 GPIO3 GPIO2 94 95 2 G_RST 8 9 109 110 111 117 126 127 128 17 23 30 33 44 55 64 68 75 83 93 103 R352 1394@ 220_0402_5% 2 14 89 90 TEST9 TEST8 C518 2 R364 @10_0402_5% 2 1 CLK_PCI_1394 PLLGND1 REG_EN AGND AGND AGND AGND AGND AGND AGND DGND DGND REG18 DGND DGND DGND DGND DGND DGND DGND REG18 DGND 1 14,19,20,23 PCI_FRAME# 14,19,20,23 PCI_IRDY# 14,19,20,23 PCI_TRDY# 14,19,20,23 PCI_DEVSEL# 14,19,20,23 PCI_STOP# 14,19,20,23 PCI_PERR# 14,20 PCI_PIRQA# 19,23,28 1394_PME# 14,19,20,23 PCI_SERR# 14,19,20,23 PCI_PAR 14,19,20,23,28 PM_CLKRUN# 14,19,20,23,28,29 PCIRST# TSB43AB21 /(TSB43AB22) 15 27 39 51 59 72 88 100 7 1 2 107 108 120 C582 1394@ 0.1U_0402_16V4Z 1394@ 1000P_0402_50V7K DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD PLLVDD AVDD AVDD AVDD AVDD AVDD C593 1394@ 0.1U_0402_16V4Z 1 PCI_AD16 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE3 PCI_C/BE2 PCI_C/BE1 PCI_C/BE0 PCI_CLK PCI_GNT PCI_REQ PCI_IDSEL PCI_FRAME PCI_IRDY PCI_TRDY PCI_DEVSEL PCI_STOP PCI_PERR PCI_INTA/CINT PCI_PME/CSTSCHG PCI_SERR PCI_PAR PCI_CLKRUN PCI_RST C590 +3VS 2 IDSEL:PCI_AD16 84 82 81 80 79 77 76 74 71 70 69 67 66 65 63 61 46 45 43 42 41 40 38 37 32 31 29 28 26 25 24 22 34 47 60 73 16 18 19 36 49 50 52 53 54 56 13 21 57 58 12 85 C297 1394@ 0.1U_0402_16V4Z 1 C PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0 CLK_PCI_1394 PCI_GNT#0 PCI_REQ#0 1394_IDSEL PCI_FRAME# P CI_IRDY# PCI_TRDY# PCI_DEVSEL# PCI_STOP# PCI_PERR# PCI_PIRQA# 1394_PME# PCI_SERR# PCI_PAR PM_CLKRUN# PCIRST# VDDP VDDP VDDP VDDP VDDP U27 C296 1394@ 0.1U_0402_16V4Z C310 PCI_AD[0..31] 14,18,19,20,23 PCI_AD[0..31] B C538 1394@ 0.1U_0402_16V4Z 1394@ 220P_0402_50V8K R313 1394@ 5.11K_0603_1% 1394@ TSB43AB21_PQFP128 1 1 1394@ 220_0402_5% C567 @10P_0402_50V8K C583 1394@ 0.1U_0402_16V4Z C549 1394@ 0.1U_0402_16V4Z A A Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size B Date: Compal Electronics, Inc. TSB43AB21 Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet 1 22 of 42 MINI_PCI SOCKET FOR WLAN (BOTTOM) PCI_AD[0..31] PCI_AD[0..31] 14,18,19,20,22 WL@ 0.1U_0402_16V4Z WL@10U_0805_10V4Z +5VS +3VALW 1 C126 2 1 2 5 WL@ 0.1U_0402_16V4Z U30 1 28,30 KILL_SW# 2 B Y A 1 1 C528 1 1 C605 2 C517 2 WL@ 0.1U_0402_16V4Z WL@ 10U_0805_10V4Z P WL_OFF# 2 C614 WL@1000P_0402_50V7K 4 WL@ 0.1U_0402_16V4Z G 28 2 C602 WL@10U_0805_10V4Z WL@ 0.1U_0402_16V4Z 3 +3VS JP24 TIP WL@ TC7SH08FU_SSOP5 14,19 PCI_PIRQG# +3VS W=40mils 14 CLK_PCI_MINI 14 PCI_REQ#3 14,19,20,22 PCI_C/BE#3 14,19,20,22 PCI_C/BE#2 14,19,20,22 PCI_IRDY# 14,19,20,22,28 PM_CLKRUN# 14,19,20,22 PCI_SERR# 14,19,20,22 PCI_PERR# 14,19,20,22 PCI_C/BE#1 1 CLK_PCI_MINI R331 @10_0402_5% 2 +5VS 1 2 C544 @ 22P_0402_50V8J +5VS 1 2 1 KEY 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 2 KEY 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 3 LAN RESERVED 5 7 WL@ CH751H-40_SC76 9 D30 11 1 2 13 15 PCI_PIRQG# 17 19 21 23 CLK_PCI_MINI 25 27 29 31 PCI_AD31 33 PCI_AD29 35 37 PCI_AD27 39 PCI_AD25 41 43 45 PCI_AD23 47 49 PCI_AD21 51 PCI_AD19 53 55 PCI_AD17 57 59 61 63 PM_CLKRUN# 65 67 69 71 73 PCI_AD14 75 77 PCI_AD12 79 PCI_AD10 81 83 PCI_AD8 85 PCI_AD7 87 89 PCI_AD5 91 93 PCI_AD3 95 W=30mils 97 PCI_AD1 99 101 103 105 107 109 111 113 115 117 119 121 W=30mils 123 125 125 126 126 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 C599 2 C600 C529 2 1 C588 RING C551 1 1 1 1 1 2 LAN RESERVED WL@0.1U_0402_16V4Z W=30mils PCI_PIRQF# W=40mils PCIRST# WL@0.1U_0402_16V4Z WL@0.1U_0402_16V4Z +5VS PCI_PIRQF# 14 +3VALW PCIRST# 14,19,20,22,28,29 W=40mils +3VS PCI_GNT#3 14 WLANPME# 19,22,28 PCI_AD30 PCI_AD28 PCI_AD26 PCI_AD24 MINI_IDSEL1 2 PCI_AD18 R368 WL@100_0402_1% PCI_AD22 PCI_AD20 IDSEL : PCI_AD18 PCI_PAR 14,19,20,22 PCI_AD18 PCI_AD16 Port 80 Debug Card Connector PCI_FRAME# 14,19,20,22 PCI_TRDY# 14,19,20,22 PCI_STOP# 14,19,20,22 ** PCI_DEVSEL# 14,19,20,22 JP29 PCI_AD15 PCI_AD13 PCI_AD11 PCI_C/BE#0 PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0 PCI_AD1 PCI_AD3 PCI_AD5 PCI_AD7 PCI_AD8 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 PCI_AD9 PCI_C/BE#0 14,19,20,22 PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0 CLK_PCI_MINI 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 R456 1 2 +5VS @ 0_0402_5% PCIRST# PCI_FRAME# PCI_TRDY# PCI_AD9 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 @ ACES_85201-2005 W=20mils 2 FOX_AS0A226-S2T 2 C545 1 +3VALW Place under MiniPCI Socket C609 WL@ 0.1U_0402_16V4Z Compal Secret Data Security Classification Issued Date 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Size B Date: Compal Electronics, Inc. MINI PCI SLOT Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet 23 of 42 5 4 3 Adjustable Output +5VALW 2 1 +VDDA 6 7 ERROR CNOISE 1 GND 3 SD SI9182DH-AD_MSOP8 R404 24K _0402_1% Audio Signal Bias Circuit 26 INT_CD_L 26 INT_CD_R 2 R412 2 R413 CD_L 1 2 C377 1U_0402_6.3V4Z CD _R 1 2 C375 1U_0402_6.3V4Z 1 20K_0402_1% 1 20K_0402_1% 1 2 C606 28,29,33,38,39 SUSP# D C367 8 R405 69.8K_0603_1% 1 C362 4.7U_0805_10V4Z 2 VOUT 2 +AVDD_AC97 R411 6.8K_0402_5% +3VS 2 R414 6.8K_0402_5% AC97 Codec 10U_0805_10V4Z L28 1 2 CHB2012U170_0805 +VDDA 1 DELAY SENSE or ADJ 1 C369 VIN 2 +VDDA 5 0.1U_0402_16V4Z D 0.1U_0402_16V4Z 4.7U_0805_10V4Z U14 4 C389 C 1 C388 1 C632 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 C383 10U_0805_10V4Z C CD_AGND To CD_GNA Bypass R436 RA 0_0402_5% 23 LINE_IN_L HP_OUT_R 41 24 LINE_IN_R 18 CD_L XTL_IN 2 CD_GND 21 MIC1 22 MIC2 XTL_OUT 3 13 PHONE PC_BEEP 11 RESET# 10 SYNC 1 1 2 C630 27P_0402_50V8J 1 R429 Analog Reference V 2 22_0402_5% SDA XTLSEL 47 SPDIFI/EAPD 48 SPDIFO 4 7 DVSS1 DVSS2 +AUD_VREF AC_BITCLK 15,32 C363 1 2 AC_SDIN0 15 R426 22_0402_5% CLK_AUDIO_14M CLK_AUDIO_14M 11 0.1U_0402_16V4Z C365 B AFILT1 29 C623 1000P_0402_50V7K AFILT2 30 C628 1000P_0402_50V7K VREFOUT 28 VREF 27 DCVOL 32 NC VREFOUT2 VAUX DISABLE# SCK 31 33 34 43 44 NC AVSS1 AVSS2 40 26 42 DGND To AGND Bypass +AUD_VREF 1 R198 2 0_0603_5% SDATA_OUT 45 46 6.8K_0402_5% 4.7U_0805_10V4Z 6 8 CD_R 19 5 BIT_CLK SDATA_IN R408 0_0402_5% 2 39 R410 2 37 HP_OUT_L 20K_0402_1% CD_GNA 1 1 9 1 MONO_OUT/VREFOUT3 JD1 AMP_RIGHT 25 R421 0_0603_5% 1 2 1 2 R437 10K_0402_5% +AVDD_AC97 +3VS AGND 2 1 2 1 2 1 R187 2 0_0603_5% 1 R441 2 0_0603_5% DGND AGND 1 ALC250-VD_LQFP48 1 1U_0402_6.3V4Z EAPD DVDD1 JD2 17 AMP_RIGHT C378 R419 2 1 22_0402_5% R422 1 2 22_0402_5% R427 1 2 22_0402_5% DVDD2 38 16 2 28 LINER AMP_LEFT 25 0.1U_0402_16V4Z 15,18,32 AC_SDOUT 36 AMP_LEFT 2 1U_0402_6.3V4Z 2 1U_0402_6.3V4Z C621 AC_RST# 15,32 AC_SYNC LINE_OUT_R 12 MONO_IN 15,32 AUX_R 1 C633 1 C638 1U_0402_6.3V4Z 25 15 20 CD_GNA 1 2 C376 1U_0402_6.3V4Z C_MIC 1 2 C616 1U_0402_6.3V4Z 1 2 C615 1U_0402_6.3V4Z 1 2 C619 0.1U_0402_16V4Z MIC LINEL C627 30 35 0.01U_0402_16V7K B LINE_OUT_L C629 CD _R AUX_L 2 1 2 C620 0.1U_0402_16V4Z CD_L R409 2 CD_AGND C634 @ 1000P_0402_50V7K 14 @ 0_0402_5% SPK_SEL 25,30 NBA_PLUG 26 1 28 C635 @ 1000P_0402_50V7K R428 1 2 C379 1U_0402_6.3V4Z AVDD2 AVDD1 U16 25 2 DGND AGND A A WITH 14.318MHz : RA POP WITH 24.576MHz : RA DEPOP Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Size B Date: Compal Electronics, Inc. AC97 CODEC ALC250D Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Sheet 1 Rev 1.0 24 of 42 A B +5VS C D E +5VS 1 +5VS 1 1 2 2 VOL_AMP 0.1U_0402_16V4Z 30 2 1 C360 1 C613 AMP_LEFT 24 AMP_RIGHT 0.47U_0603_10V7K VDD VDD MUTE SHUTDOWN# 1 2 AMP_MUTE 28 LOUT- 9 SPKL- ROUT- 16 SPKR- LOUT+ 11 SPKL+ ROUT+ 14 SPKR+ GND GND 5 12 VOL_AMP 7 VOLUME VOLMAX 8 VOLMAX 2 1U_0402_6.3V4Z 2 1U_0402_6.3V4Z C364 4 U15 10 15 NBA_PLUG 24,30 NBA_PLUG 24 R190 100K_0402_5% 1 C617 22U_1206_16V4Z 2 R402 0_0402_5% 10U_0805_10V4Z VOLMAX 1 C356 2 1 C380 13 SE/BTL# 6 3 BYPASS LINRIN- 4 BYPASS 1 SHUTDOWN# Q29 2N7002_SOT23 2 EC_EAPD 28 G 1 NBA_PLUG D W=30mil S 3 2 R442 100K_0402_5% 4 SPKL+ 30 SPKR+ 30 APA2068KAI-TRL_SOP16 2 3 3 Speaker Conn. JP2 SPKL+ SPKLSPKR+ SPKR- EC Beep +AVDD_AC97 2 R197 560_0402_5% 1 C381 1 2 3 R440 10K_0402_5% 3 C662 4.7U_0603_6.3V6M 1U_0402_6.3V4Z R189 2.4K_0402_5% R461 4.7K_0402_5% CH751H-40_SC76 D34 CH751H-40_SC76 28 TI_BUG R462 TI_BIG 1 2 4.7K_0402_5% TI_BIG2# Q52 2 3 MMBT3904_SOT23 2 2 1 D37 2 R196 560_0402_5% 1 1 MONO_IN 24 2 C384 2 1U_0402_6.3V4Z 2 MONO_IN 1 1 SPKR Q30 MMBT3904_SOT23 2 1 15 2 PCI Beep 1 C386 @1U_0402_6.3V4Z 2 2 @ PSOT24C_SOT23 @ PSOT24C_SOT23 1 R430 10K_0402_5% C390 1U_0402_6.3V4Z 0.01U_0402_16V7K 1 D5 2 TI_BIG2# 2 560_0402_5% 2 2 1 2 D6 +S1_VCC 1 1 PCM_SPK# R199 2 20 C387 2 1 21 4 3 2 1 ACES_85204-0400 R431 10K_0402_5% CardBus Beep 2 0_0603_5% 0_0603_5% 0_0603_5% 0_0603_5% 3 1 2 2 2 2 1 2 C385 1U_0402_6.3V4Z 1 1 BEEP# 1 1 1 1 1 28 R35 R36 R25 R26 1 1 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Size B Date: Compal Electronics, Inc. AMP&Audio Jack Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet E 25 of 42 HDD CONNECTOR IDE_PDD[0..15] 16 IDE_PDD[0..15] JP25 15 PIDERST# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0 2 +3VS R386 IDE_PDDREQ IDE_PDIOW# IDE_PDIOR# 16 IDE_PDDREQ 16 IDE_PDIOW# 16 IDE_PDIOR# 1 4.7K_0402_5% 16 IDE_PDIORDY INT_IRQ14 INT_IRQ14 R399 IDE_PDD7 2 @ 10K_0402_1% 2 R383 IDE_PDDREQ 1 @ 5.6K_0603_1% 8.2K_0402_5% IDE_PDA1 IDE_PDA0 IDE_PDCS1# 16 IDE_PDA1 16 IDE_PDA0 16 IDE_PDCS1# 28 PHDD_LED# 1 1 R339 IDE_PDDACK# 16,18 IDE_PDDACK# 2 16 +5VS 1 R403 2 100K_0402_5% +5VS 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15 PCSEL 1 R397 2 470_0805_5% IDE_PDA2 IDE_PDCS3# IDE_PDA2 16 IDE_PDCS3# 16 +5VS OCTEK_HDS-22TA1_44P_RV +3VALW 2 HAZ00 ODD CONNECTOR IDE_SDD[0..15] 16 IDE_SDD[0..15] R455 4.7K_0402_5% INT_CD_L CD_AGND INT_CD_L CD_AGND SIDERST# IDE_SDD7 IDE_SDD6 IDE_SDD5 IDE_SDD4 IDE_SDD3 IDE_SDD2 IDE_SDD1 IDE_SDD0 2 +3VS 1 16 IDE_SDIOW# 1 R302 4.7K_0402_5% 16 16 16 IDE_SDA1 IDE_SDA0 IDE_SDCS1# 1 2 R293 100K_0402_5% IDE_SDIOW# IDE_SDIORDY INT_IRQ15 IDE_SDA1 IDE_SDA0 IDE_SDCS1# SHDD_LED# 16 IDE_SDIORDY 16 INT_IRQ15 R300 +5VS 8.2K_0402_5% SHDD_LED# 2 28 1 R276 470_0805_5% 2 +5VS 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 INT_CD_R ODD_DET IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_SDDREQ IDE_SDIOR# 1 JP21 24 24 15 INT_CD_R 24 ODD_DET 28 IDE_SDDREQ 16 IDE_SDIOR# 16 IDE_SDDACK# 1 R296 2 IDE_SDA2 100K_0402_5% IDE_SDCS3# IDE_SDDACK# 16 +5VS IDE_SDA2 16 IDE_SDCS3# 16 +5VS 1 2 C476 0.1U_0402_10V6K +5VS SUYIN 200109MA044G243ZR 44P Placea caps. near HDD CONN. +5VS C373 1000P_0402_50V7K 1 R305 IDE_SDD7 2 @ 10K_0402_1% 2 R304 IDE_SDDREQ 1 @ 5.6K_0603_1% 1 2 1 C372 10U_0805_10V4Z 2 1 C366 10U_0805_10V4Z 2 C374 C368 1U_0402_6.3V4Z Compal Secret Data Security Classification Issued Date 0.1U_0402_16V4Z 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Size B Date: Compal Electronics, Inc. IDE/ ODD CONNECTORS Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Sheet 26 Rev 1.0 of 42 1.4A +USB_AS=60 mils +5VALW +USB_AS U6 1 2 28 USB_EN# USB_EN# 1 2 3 4 GND IN IN EN# 8 7 6 5 OUT OUT OUT FLG 1 + C506 0.1U_0402_16V4Z G528_SO8 C294 0.1U_0402_16V4Z 2 C505 150U_D_6.3VM +USB_AS USB CONNECTOR L34 4 2 4 3 3 1 2 3 4 C_USB0C_USB0+ VBUS S_GND DD+ GND S_GND 5 6 TYCO_3-1470859-1 + C395 8 7 6 5 C399 J3 @ JUMP_43X118 C394 2 OUT OUT OUT FLG 1 1 GND IN IN EN# 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 USB_EN# C3 JP23 1 2 WCM2012F2S-900T04_0805 U1 1 2 3 4 G528_SO8 2 +USB_BS=60 mils USBP0USBP0+ USBP0USBP0+ +USB_BS 60 mils 1 +USB_BS 1.4A +5VALW 15 15 1 1 60 mils Keep 20 mils minimum spacing between USB signals and others signals +USB_AS 150U_D_6.3VM 0.1U_0402_16V4Z USB CONNECTOR +USB_BS +USB_BS L35 15 15 1 USBP2USBP2+ USBP2USBP2+ 4 JP13 1 4 2 2 3 3 1 2 3 4 C_USB2C_USB2+ WCM2012F2S-900T04_0805 10 12 L36 VCC VCC D0- D1D0+ D1+ VSS VSS 5 6 7 8 G2 G4 9 11 G1 G3 C_USB4C_USB4+ 2 3 2 3 1 1 4 4 USBP4USBP4+ USBP4- 15 USBP4+ 15 WCM2012F2S-900T04_0805 H24 H_C256D177 H33 H_S236D118 H34 H_S236D118 1 H19 H_C256D177 1 H25 H_C256D165 1 H2 H3 H18 H_C138D138N H_O276X177D276X177N H_C256D177 1 1 H1 H4 H_C118D118N H_S295D110 1 H20 H_S315D118 H10 H_C79D79N 1 1 1 H21 H_S315D118 1 1 H27 H_S315D118 1 1 H15 H_C79D79N H13 H_S315D157 1 1 1 1 1 1 H8 H_C315D118 1 1 1 H28 H16 H11 H7 H23 H14 H_C157D157N H_C118D118N H_C118D118N H_C177D177N H_C177D177N H_C315D118 1 1 CF5 SMD40M80 1 1 H26 H_S315D118 1 1 H31 H30 H_S315D118 H_S315D118 1 1 H5 H6 H22 H_S315D142X118 H_C118D118N H_S315D118 1 H9 H_S315D118 1 1 1 FD3 FIDUCAL H32 H_S315D118 CF7 SMD40M80 1 FD6 FIDUCAL 1 1 FD1 FIDUCAL CF3 SMD40M80 1 CF1 SMD40M80 1 CF13 SMD40M80 CF4 SMD40M80 1 CF6 SMD40M80 1 1 CF8 SMD40M80 1 FD4 FIDUCAL 1 FD5 FIDUCAL 1 1 FD2 FIDUCAL CF16 SMD40M80 1 CF15 SMD40M80 1 CF2 SMD40M80 CF12 SMD40M80 1 CF9 SMD40M80 1 CF14 SMD40M80 1 TYCO_1470748-1 Compal Secret Data Security Classification Issued Date 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Size B Date: Compal Electronics, Inc. USB Conn. Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Rev 1.0 Sheet 27 of 42 5 4 3 2 1 +3VALW +3VALW 2 For EC Tools 2 1 R152 10K_0402_5% C 19,22,23 WLANPME# EC_PME# 19,22,23 LAN_PME# 19,22,23 1394_PME# 30 +3VALW IE_BTN# 2 +3VALW R114 RP18 PSCLK1 PSDAT1 PSCLK2 PSDAT2PS2 PSCLK3 PSDAT3 8 PSCLK1 7 PSDATA1 6 PSCLK2 5 PSDATA2 10K_1206_8P4R_5% 1 2 3 4 31 31 +3VALW RP19 1 2 3 4 MODE# 8 FRD# 7 SELIO# 6 FSEL# 5 100K_1206_8P4R_5% 29,35 29,35 4 4 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 26 15 ODD_DET EC_SCI# 7 12 36 15 ENBKL BKOFF# FSTCHG EC_SMI# +5VALW 1 R375 1 R371 EC_SMB_CK1 2 4.7K_0402_5% EC_SMB_DA1 2 4.7K_0402_5% ** 1 R156 1 R157 B EC_SMB_CK2 2 1.5K_0402_1% EC_SMB_DA2 2 1.5K_0402_1% C333 @ 100P_0402_50V8J 1 R112 23 15 1 1 2 2 EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 163 164 169 170 SCL1 SDA1 SCL2 SDA2 8 20 21 22 27 28 48 62 63 69 70 75 109 118 119 148 149 155 156 162 168 GPIO04 GPIO07 GPIO08 GPIO09 GPIO0D GPIO0E GPIO10 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO2A GPIO2B GPIO2D @ 100P_0402_50V8J C301 2 0.1U_0402_16V4Z 31 1 31 26 2 1 R119 47K_0402_5% ENBKL BKOFF# FSTCHG EC_SMI# W L_OFF# EC_SWI# LID_SW# MODE# SYSON SUSP# VR_ON AMP_MUTE 15 PBTN_OUT# 31 PADS_LED# CAPS_LED# NUM_LED# PHDD_LED# 15 15 PBTN_OUT# PADS_LED# CAPS_LED# NUM_LED# GATEA20 KBRST# 55 54 23 41 19 5 6 31 Interface 1 159 71 72 73 74 77 78 79 80 GPOW0/PWM0 GPOW1/PWM1 FAN2PWM/GPOW2/PWM2 GPOW3/PWM3 Width GPOW4/PWM4 GPOW5/PWM5 GPOW6/PWM6 FAN1PWM/GPOW7/PWM7 32 33 36 37 38 39 40 43 Wake Up GPWU0 GPWU1 GPWU2 GPWU3 Pin GPWU4 GPWU5 TIN1/GPWU6 TIN2/FANFB2/GPWU7 Analog To Digital SMBus Digital To Analog GPIO FnLock#/GPIO12 * CapLock#/GPIO011 * NumLock#/GPIO0A * ScrollLock#/GPIO0F * MISC ECRST# GA20/GPIO02 KBRST#/GPIO03 ECSCI# 49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 153 154 GPIK0/KSI0 GPIK1/KSI1 GPIK2/KSI2 GPIK3/KSI3 GPIK4/KSI4 GPIK5/KSI5 GPIK6/KSI6 GPIK7/KSI7 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 INVT_PWM BEEP# PW R_SUSP_LED ACO FF USB_EN# EC_ON EC_LID_OUT# EC_EAPD 2 26 29 30 44 76 172 176 KSO17 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 KSI[0..7] KSO[0..15] BATT_TEMP SKU_ID1 BATT_OVP GPODA0/DA0 GPODA1/DA1 GPODA2/DA2 GPODA3/DA3 GPODA4/DA4 GPODA5/DA5 GPODA6/DA6 GPODA7/DA7 99 100 101 102 1 42 47 174 DAC_BRIG 30,31 KSO[0..15] 31 30 +3VALW EC_PLAYBTN# 30,31 EC_STOPBTN# 30,31 EC_FRDBTN# 30,31 EC_REVBTN# 30,31 KSI4 31 KSI5 31 KSI6 31 KSI7 31 R91 100K_0402_5% +3VALW INVT_PWM 12 BEEP# 25 PW R_SUSP_LED 30 ACOFF 36 USB_EN# 27 EC_ON 30 EC_LID_OUT# 15 EC_EAPD 25 SKU_ID1 R116 10K_0402_5% 30 C D13 2 KILL_SW# 23,30 PM_SLP_S3# 15 PM_SLP_S5# 15 1 ACIN +3VALW 30,34 CH751H-40_SC76 R459 ALI/MH# @10K_0402_5% ECAGND 2 1 C272 0.01U_0402_16V7K BATT_TEMPA 35 ALI/MH# 1 PW R_LED# HDD_LED# BATT_LOW_LED# BATT_CHGI_LED# EAPD DAC_BRIG 12 R460 10K_0402_5% 0: NO 1: YES 35,36 AD_BID0 IREF EN_DFAN1# H DD_PW RD SKU_ID1 30 BATT_OVP 36 2 100K_0402_5% R93 1 2 C271 0.22U_0603_16V4Z ADP_I 36 IREF 36 EN_DFAN1 32 PW R_LED# 30 WL_BT_LED# 30 HDD_LED# 30 BATT_LOW_LED# 30 BATT_CHGI_LED# 30 EAPD 24 TI_BUG 25 171 12 11 FAN_SPEED1 FAN_SPEED1 32 1 2 R133 1K_0402_5% SPK_SEL 24 Timer PinTOUT2/GPIO2F 175 EC_THRM# E51IT0/GPIO00 E51IT1/GPIO01 E51RXD/GPIO21/ISPCLK E51TXD/GPIO22/ISPDAT 3 4 106 107 E51_RXD E51_TXD XCLKI XCLKO 158 160 C RY2 C RY1 GPIO2E/TOUT1/FANFB1 DPLL_TP/GPIO06/FANFB3 FANTEST_TP/GPIO05/FAN3PWM KSI[0..7] EC_PME# H DD_PW RD 81 82 83 84 87 88 89 90 85 86 91 92 93 94 97 98 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 ON/OFF KILL_SW# GPIAD0/AD0 GPIAD1/AD1 GPIAD2/AD2 GPIAD3/AD3 GPIAD4/AD4 GPIAD5/AD5 GPIAD6/AD6 GPIAD7/AD7 * GPIO18/XIO8CS# * GPIO19/XIO9CS# *GPIO1A/XIOACS# *GPIO1B/XIOBCS# Expanded I/O * GPIO1C/XIOCCS# * GPIO1D/XIODCS# * GPIO1E/XIOECS# * GPIO1F/XIOFCS# B R310 1 2 10K_0402_5% +S1_VCC EC_THRM# 15 EC_RSMRST# 15 SHDD_LED# 26 KB910Q B4_LQFP176 17 35 46 122 137 167 +3VALW ODD_DET EC_SCI# 30 LID_SW# 30 MODE# 30,33 SYSON 24,29,33,38,39 SUSP# 40 VR_ON 25 AMP_MUTE C332 2 ENBKL 100K_0402_5% TP_CLK TP_DATA Pulse GPOK0/KSO0 GPOK1/KSO1 GPOK2/KSO2 GPOK3/KSO3 GPOK4/KSO4 GPOK5/KSO5 GPOK6/KSO6 GPOK7/KSO7 GPOK8/KSO8 GPOK9/KSO9 GPOK10/KSO10 GPOK11/KSO11 GPOK12/KSO12 GPOK13/KSO13 GPOK14/KSO14 GPOK15/KSO15 GPOK16/KSO16 GPOK17/KSO17 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 2 110 111 114 115 116 117 X-BUS Interface +3VALW 2 1 RD# WR# MEMCS# IOCS# D0 D1 D2 D3 D4 D5 D6 D7 A0 A1/XIOP_TP A2 A3 A4/DMRP_TP A5/EMWB_TP A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20/GPIO23 E51CS#/GPIO20/ISPEN 2 2 150 151 173 152 138 139 140 141 144 145 146 147 124 125 126 127 128 131 132 133 143 142 135 134 130 129 121 120 113 112 104 103 108 105 C339 1U_0402_6.3V4Z 1 FRD# FW R# FSEL# @ ACES_85205-0400 1 2 29 29 29 +3VALW E51_RXD E51_TXD 1 FRD# FW R# FSEL# SELIO# ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 IE_BTN# 1 100K_0402_5% PSCLK1 PSDATA1 PSCLK2 PSDATA2 TP_CLK TP_DATA 14,20,29 SERIRQ 14,19,20,22,23 PM_CLKRUN# 1 @10_0402_5% 1 1 2 3 4 D Internal Keyboard 1 2 R125 C306 @22P_0402_50V8J C327 0.1U_0402_16V4Z BATGND E CAGND LAD0 LAD1 LAD2 LAD3 LFRAME# LPC Interface LRST#/GPIO2C LCLK SERIRQ CLKRUN#/GPIO0C * LPCPD#/GPIO0B * VCC VCC VCC VCC VCC VCC VCC 15 14 13 10 9 165 18 7 25 24 14,18 CLK_PCI_LPC 2 1 2 3 4 0.1U_0402_16V4Z 161 U8 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 95 D 14,29 LPC_AD0 14,29 LPC_AD1 14,29 LPC_AD2 14,29 LPC_AD3 14,29 LPC_FRAME# 14,19,20,22,23,29 PCIRST# C290 2 VCCBAT 2 2 0.1U_0402_16V4Z JP6 1 C330 1000P_0402_50V7K 96 2 2 0.1U_0402_16V4Z ECAGND C315 1000P_0402_50V7K 1 1 VCCA L20 1 2 FBM-L11-160808-800LMT_0603 C273 AGND C328 1 2 2 FBM-L11-160808-800LMT_0603 2 0.1U_0402_16V4Z 1 2 ENE-KB910-B4 0.1U_0402_16V4Z 1 1 C292 1 C309 ADB[0..7] 29 16 34 45 123 136 157 166 ADB[0..7] R155 0_0805_5% L23 1 KBA[0..19] 29 GND GND GND GND GND GND KBA[0..19] Analog Board ID definition, Please see page 3. C RY1 1 R150 2 C RY2 @ 20M_0603_5% +5VS +3VALW TP_CLK 2 1 R357 TP_DATA 1 R358 R92 100K_0402_5% A 4 1 IN OUT NC NC 2 2 1 C342 X2 2 10P_0402_50V8J 1 Rb 0.1U_0402_16V4Z R101 1 3 10P_0402_50V8J 2 AD_BID0 1 C284 2 C338 1 Ra 18K_0402_5% A 2 4.7K_0402_5% 2 4.7K_0402_5% +3VALW KBA1 KBA4 KBA5 1 R372 1 R376 1 R377 2 1K_0402_5% 2 1K_0402_5% 2 1K_0402_5% Issued Date 2005/03/01 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 32.768KHZ_12.5P_1TJS125DJ2A073 5 Compal Secret Data Security Classification 4 3 2 Title Compal Electronics, Inc. ENE-KB910 Size Document Number CustomHAZ00/BL10E (LA2861) Date: R ev 1.0 Monday, August 08, 2005 Sheet 1 28 of 42 +5VALW +3VALW 1 +5VALW 14 R145 VCC WP SCL SDA A0 A1 A2 GND 1 2 3 4 2 3 A 1 INT_FLASH_EN# B 2 FSEL# O 1 R176 100K_0402_5% 2 FSEL# 28 22_0402_5% 7 28,35 EC_SMB_CK1 28,35 EC_SMB_DA1 INT_FSEL# 1 2 U11 8 7 6 5 P R178 100K_0402_5% G C324 2 0.1U_0402_16V4Z 1 U12A SN74LVC32APWLE_TSSOP14 AT24C16AN-10SI-2.7_SO8 LPC Debug Port 1 R177 R158 1 100K_0402_5% 2 @ +5VS 0_0402_5% LPC_AD[0..3] 14,28 LPC_AD[0..3] +3VS 2 CLK_PCI_SIO 2 Reserve R4, if U1B is single gate. +3VALW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 +3VALW 1 C341 1 2 R170 100K_0402_5% SUSP# 24,28,33,38,39 A 4 B 5 O U12B SN74LVC32APWLE_TSSOP14 1 3 EC_FLASH# 15 28 KBA[0..19] ADB[0..7] KBA[0..19] 1 CLK_14M_SIO 11 @ 10P_0402_50V8K LPC_AD0 14,28 2 LPC_AD1 14,28 LPC_AD2 14,28 LPC_AD3 14,28 LPC_FRAME# 14,28 LPC_DRQ#1 PCIRST# 14,19,20,22,23,28 CLK_PCI_SIO CLK_PCI_SIO 14,18 SERIRQ 14,20,28 close to Moden Conn. 28 1MB Flash ROM ADB[0..7] +3VALW 1MB ROM Socket U13 28 C658 CLK_14M_SIO LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ1# PCIRST# 1 2 R458 @ 0_0402_5% SERIRQ Q28 2N7002_SOT23 FWR# 28 R457 @ 22_0402_5% @ ACES_85201-2005 7 G 6 S FWE# D P 2 14 2 G 0.1U_0402_16V4Z 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 JP30 FRD# KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19 21 20 19 18 17 16 15 14 8 7 36 6 5 4 3 2 1 40 13 37 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 INT_FSEL# FR D# FWE# 22 24 9 CE# OE# WE# VCC0 VCC1 31 30 D0 D1 D2 D3 D4 D5 D6 D7 25 26 27 28 32 33 34 35 RP# NC READY/BUSY# NC0 NC1 10 11 12 29 38 GND0 GND1 23 39 1 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 RESET# 2 C352 JP8 0.1U_0402_16V4Z SB_INT_FLASH_SEL tie to ATI SB GPIO1 and pull down 1 2 R179 100K_0402_5% +3VALW 15 SB_INT_FLASH_SEL KBA16 KBA15 KBA14 KBA13 KBA12 KBA11 KBA9 KBA8 FWE# RESET# INT_FLASH_EN# SB_INT_FLASH_SEL KBA18 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 KBA17 KBA19 KBA10 ADB7 ADB6 ADB5 ADB4 +3VALW ADB3 ADB2 ADB1 ADB0 FR D# FSEL# KBA0 @ SUYIN_80065AR-040G2T SST39VF080-70_TSOP40 Compal Secret Data Security Classification Issued Date 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title Size B Date: Compal Electronics, Inc. BIOS& I/O PORT Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Rev 1.0 Sheet 29 of 42 5 4 3 2 1 Switch Board Conn. +3VALW 28 28 D SKU_ID1 KSO17 ON/OFFBTN# IEBTN# MODEBTN# EC_PLAYBTN# EC_STOPBTN# EC_FRDBTN# EC_REVBTN# 28,31 EC_PLAYBTN# 28,31 EC_STOPBTN# 28,31 EC_FRDBTN# 28,31 EC_REVBTN# KSO17 ON/OFFBTN# PWR_LED_1# PWR_SUSPLED# IEBTN# MODEBTN# EC_REVBTN# EC_FRDBTN# EC_PLAYBTN# EC_STOPBTN# 1 2 3 4 5 6 7 8 9 10 11 12 C173 1 2 220P_0402_50V7K C179 1 2 220P_0402_50V7K C168 1 2 220P_0402_50V7K C153 1 2 220P_0402_50V7K C160 1 2 220P_0402_50V7K C178 1 2 220P_0402_50V7K C181 1 2 220P_0402_50V7K C169 1 2 220P_0402_50V7K C146 1 2 220P_0402_50V7K C167 1 2 220P_0402_50V7K VR Conn. KILL_SW# 2 R447 1 100K_0402_5% WL_PW 2 R446 1 120_0402_5% LID_PW 2 R445 1 470_0402_5% JP3 PWR_LED_1# PWR_SUSPLED# SKU_ID1 JP28 23,28 28 KILL_SW# WL_PW WL_BT_LED# LID_PW KILL_SW# WL_BT_LED# NBA_PLUG SPKR+ SPKL+ LID_SW# 24,25 NBA_PLUG 25 SPKR+ 25 SPKL+ 28 LID_SW# 24 +AUD_VREF1 R448 2 1 VOL_CTRL2 12.2K_0402_5% 2 VOL_CTRL1 R4431 100K_0402_5% 2 VOL_AMP R444 4.53K_0603_1% VOL_AMP +AUD_VREF +5VS ACES_85201-1205 MIC MIC 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 D ACES_85201-1605 +3VALW +3VALW Power Button 2 +3VALW 28,33 R244 100K_0402_5% 2 G 2 10K 3 PWR_LED# PWR_LED# 28 1 PWR_SUSP_LED 28 Q14 2N7002_SOT23 1 S 3 PWR_SUSP_LED SYSON 47K D 1 S 2 10K D 2 G Q11 DTA114YKA_SC59 3 3 SYSON Q13 2N7002_SOT23 47K SW6 D26 3 1 ON/OFFBTN# R47 1 PWR_LED_1# 2 120_0402_5% C D S 2 G C455 Q38 R247 D24 1 1 EC_ON EC_ON 2 PWR_SUSPLED1# 2 120_0402_5% PWR_LED_0# 28 34 MMGZ5248B_LL34 2 1 Change from 120 to 300 1 2 120_0402_5% 28 51_ON# 1000P_0402_50V7K SMT1-05_4P R49 ON/OFF CHN202U_SC70 1 R50 51_ON# 2 3 PWR_SUSPLED# 3 4 2 R48 Change from 300 to 120 1 2 120_0402_5% 2 1 6 5 SUSPLEDS# C 1 PWR_LEDS 1 Q12 DTA114YKA_SC59 2N7002_SOT23 1 4.7K_0402_5% 2 +3VALW 1 R246 100K_0402_5% B IEBTN# 2 1 3 MODEBTN# D27 DAN202U_SC70 2 1 3 MODE# 51_ON# 28 51_ON# 34 D16 PWR_SUSPLED1# D25 DAN202U_SC70 2 1 D35 HT-191UD_AMBER_0603 PWR_LED_0# AC IN LED +3VALW B POWER/ON LED IE_BTN# 28 51_ON# 2 1 HT-191UYG-DT_GRN_0603 D15 2 1 120_0402_5% HT-191UYG-DT_GRN_0603 28,34 ACIN 1 R194 2 D 3 1 S 2N7002_SOT23 Q50 2 G HDD LED +3VS D18 1 R195 2 120_0402_5% BATTERY CHG 2 1 HDD_LED# 28 HT-191UYG-DT_GRN_0603 A A +3VALW BATT_LOW_LED# 1 HT-191UD_AMBER_0603 1 R192 2 2 120_0402_5% D17 BATT_LOW_LED# 28 D36 1 R193 2 120_0402_5% 2 1 BATT_CHGI_LED# BATT_CHGI_LED# 28 HT-191UYG-DT_GRN_0603 Compal Secret Data Security Classification 2005/03/01 Issued Date 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. Kill SW/ Sub Conn./LEDS Size Document Number CustomHAZ00/BL10E (LA2861) Date: Thursday, August 04, 2005 Sheet 1 30 R ev 1.0 of 42 5 4 3 2 KSI[0..7] KSI[0..7] KSO[0..15] 1 28,30 KSO[0..15] 28 INT_KBD CONN. D D JP5 TP CONN. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 +5VS JP4 28 28 TP_DATA TP_CLK 4 3 2 1 TP_DATA TP_CLK C183 0.1U_0402_16V4Z ACES_87151-0405 Touchpad mount direction: Standard: N/A, Reverse: Stuff C 1 2 1 2 TP_CLK D10 @ DAN217_SC59 2 1 3 C259 @ 180P_0402_50V8J TP_DATA C258 @ 180P_0402_50V8J +5VS KSO15 KSO14 KSO10 KSO11 KSO8 KSO9 KSO13 KSI7 KSO3 KSO7 KSO12 KSI4 KSI6 KSI5 KSO6 KSO5 KSI3 KSI0 KSO0 KSO1 KSI1 KSI2 KSO2 KSO4 NUM_LED# 28 PADS_LED# 28 CAPS_LED# 28 1 2 300_0402_5% R297 +3VS C 1 300_0402_5% 2 1 300_0402_5% 2 +3VS R298 +3VS R299 ACES_88170-3400 2 1 3 D9 @ DAN217_SC59 B KSO7 C241 100P_0402_25V8K KSO15 C250 100P_0402_25V8K KSO6 C236 100P_0402_25V8K KSO14 C249 100P_0402_25V8K KSO5 C235 100P_0402_25V8K KSO13 C244 100P_0402_25V8K KSO4 C227 100P_0402_25V8K KSO12 C240 100P_0402_25V8K KSO3 C242 100P_0402_25V8K KSI0 C233 100P_0402_25V8K KSI4 C239 100P_0402_25V8K KSO11 C247 100P_0402_25V8K KSO2 C228 100P_0402_25V8K KSO10 C248 100P_0402_25V8K KSO1 C231 100P_0402_25V8K KSI1 C230 100P_0402_25V8K KSO0 C232 100P_0402_25V8K KSI2 C229 100P_0402_25V8K KSI5 C237 100P_0402_25V8K KSO9 C245 100P_0402_25V8K KSI6 C238 100P_0402_25V8K KSI3 C234 100P_0402_25V8K KSI7 C243 100P_0402_25V8K PADS_LED# C252 100P_0402_25V8K KSO8 C246 100P_0402_25V8K NUM_LED# C253 100P_0402_25V8K CAPS_LED# C251 100P_0402_25V8K B A A Compal Secret Data Security Classification 2005/03/01 Issued Date 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title Compal Electronics, Inc. KB/Touch Pad& hibernation Size Document Number CustomHAZ00/BL10E (LA2861) Date: Thursday, August 04, 2005 Sheet 1 31 of Rev 1.0 42 A B C D E FAN Conn +5VS +3VALW 8 +12VALW R239 10K_0402_5% 2 R241 100_0402_5% U22B LM358A_SO8 2 B C448 @ 0.1U_0402_16V4Z P 1 D22 1SS355_SOD323 C449 10U_1206_16V4Z 8 A 9 B 10 O 2 8.2K_0402_5% 1 +IN 3 -IN 2 OUT U22A U12C LM358A_SO8 SN74LVC32APWLE_TSSOP14 FAN1 1 JP17 3 2 1 D23 1N4148_SOT23 +3VALW ACES_85205-0300 2 10K_0402_5% 1 11 P R41 +3VS A 12 G 14 2 1 R240 E 2 1 Q36 FMMT619_SOT23 G -IN 1 P EN_FAN1 2 7 G 6 OUT 7 1 C +IN 2 2 5 3 EN_DFAN1 28 EN_DFAN1 1 1 1 1 14 1 2 C446 0.1U_0402_16V4Z 4 +12VALW B 13 O C170 @ 1000P_0402_50V7K 2 2 1 1 7 28 FAN_SPEED1 C171 @ 1000P_0402_50V7K U12D SN74LVC32APWLE_TSSOP14 2 2 MDC CONN. JP27 15,18,24 AC_SDOUT 15,24 AC_SYNC 15 AC_SDIN1 15,24 AC_RST# R183 1 2 22_0402_5% R181 1 R184 1 R185 1 2 22_0402_5% 2 22_0402_5% 2 22_0402_5% TYCO_1-1775149-2~D 2 4 6 8 10 12 GND1 RES0 IAC_SDATA_OUT RES1 GND2 3.3V IAC_SYNC GND3 IAC_SDATA_IN GND4 IAC_RESET# IAC_BITCLK +3VALW +3VALW 1 R186 2 22_0402_5% +3VALW 1 AC_BITCLK 15,24 2 1 C353 0.1U_0402_16V4Z 2 C350 1U_0402_6.3V4Z 3 13 14 15 16 17 18 GND GND GND GND GND GND 3 1 3 5 7 9 11 Connector for MDC Rev1.5 4 4 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Size B Date: Compal Electronics, Inc. FAN & MDC Document Number HAZ00/BL10E (LA2861) Thursday, August 04, 2005 Rev 1.0 Sheet E 32 of 42 A B C D E +1.8VALW TO +1.8VS +5VALW TO +5VS +1.8VS +5VALW 2 G Q17 C607 2 R418 1U_0402_6.3V4Z 1 R417 2 +12VALW 6.8K_0402_5% D 2 C618 S SUSP 2 G Q45 2N7002_SOT23 2 G Q47 1 470_0805_5% 2 1 2 1 2 S 2 D S 2N7002_SOT23 2 G Q18 2N7002_SOT23 SI4800BDY_SO8 1 1 C624 1 S D 1 2 3 4 S S S G 1 SUSP 470_0805_5% +12VALW D D D D 3 2 C222 2 100K_0402_1% D 1 C625 0.1U_0402_16V7K 1 1 1U_0402_6.3V4Z R58 1 8 7 6 5 4.7U_0805_10V4Z 2 1 Q46 2N7002_SOT23 C208 2 1 SI4800BDY_SO8 1 4.7U_0805_10V4Z C225 10U_0805_10V4Z R52 1 1 2 3 4 S S S G 3 4.7U_0805_10V4Z 1 D D D D 0.1U_0402_16V7K 8 7 6 5 +5VS 2 C226 3 1 Q19 3 +1.8V +1.8VALW TO +1.8V +5VALW 2 2 +5VALW +1.8V S SYSON# 2 G Q7 2N7002_SOT23 2 G Q9 S 28,30 SYSON 2 S 1 1 Q16 2N7002_SOT23 3 SYSON# SYSON# D 2 G D 3 1 24,28,29,38,39 SUSP# S Q15 2N7002_SOT23 2 G R53 R54 10K_0402_5% 10K_0402_5% 1 C26 D SUSP SUSP 2 1U_0402_6.3V4Z 1 R18 2 +12VALW 100K_0402_1% 39 1 R24 D 2 R56 10K_0402_5% 1 470_0805_5% 2 1 2 1 2 1 C16 2 R55 10K_0402_5% 4.7U_0805_10V4Z 3 SI4800BDY_SO8 1 1 1 S S S G C24 3 D D D D 1 2 3 4 0.1U_0402_16V7K 4.7U_0805_10V4Z 8 7 6 5 1 C27 2N7002_SOT23 Q4 2 2 +1.8VALW 3 3 +3VALW TO +3VS +1.2VS 2 C611 S SUSP 2 G Q51 2N7002_SOT23 2 G Q49 S SUSP 2 1 D S R60 470_0805_5% 1 @ 470_0805_5% 1 1 2 2 470_0805_5% 1 1 S 2 G Q10 R109 D 2 SUSP G Q25 S 3 D D 3 D 2N7002_SOT23 +12VALW 1 R415 1 1 2 3 2 1U_0402_6.3V4Z 1 R416 2 68K_0402_1% R39 3 1 4.7U_0805_10V4Z 2 C610 1 C622 2 1 3 SI4800BDY_SO8 1 1 2 3 4 2N7002_SOT23 C608 S S S G 0.1U_0402_16V7K 4.7U_0805_10V4Z D D D D 470_0805_5% Q48 8 7 6 5 +1.8VS +0.9VS +3VS 2N7002_SOT23 +3VALW 2 SUSP G Q20 2N7002_SOT23 @ 4 4 Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C D Title Size B Date: Compal Electronics, Inc. DC-DC INTERFACE Document Number HAZ00/BL10E (LA2861) Monday, August 08, 2005 Sheet E Rev 1.0 33 of 42 A B C D VS 7A_24VDC_429007.WRML PC5 1000P_0402_50V7K 20K_0402_1% PACIN PD1 ACIN 28,30 PACIN 36,37 1 1 1 O LM393M_SO8 PC6 0.1U_0402_16V7K PR7 10K_0402_5% RLZ4.3B_LL34 2 2 2 - 4 PR6 2 SINGA_2DW-0005-B03 + 1 1 @ 1 1 2 3 22K_0402_1% 2 PU1A 2 2 PR8 VIN 10K_0402_5% 1 2 1 PR5 1 2 PR4 1K_0402_5% 2 8 PC4 100P_0402_50V8J 1 2 PC3 1000P_0402_50V7K 2 4 84.5K_0402_1% 1 4 PC2 100P_0402_50V8J 2 3 1 3 PR2 5.6K_0402_5% PC1 1000P_0402_50V7K 2 2 2 1M_0402_1% VS PR3 FBM-L18-453215-900LMA90T_1812 1 2 2 1 1 2 1 1 PR1 1 P PJP1 DC_IN_S2 2 G 1 1 DC_IN_S1 DC301000F00 VIN PL1 1 VIN PF1 Vin Detector RTCVREF 3.3V High 18.384 17.901 17.430 Low 17.728 17.257 16.976 PD2 PR9 68_1206_5% 1 PR155 68_1206_5% 2 1N4148_SOD80 2 PD3 2 BATT+ 1 1 1 1N4148_SOD80 VS PQ1 TP0610K-T1-E3_SOT23 1 1 2 1 N3 1N4148_SOD80 1 2 PR12 1K_1206_5% B+ 2 2 2 2 22K_0402_1% 1 2 PR15 1K_1206_5% 1 1 PR14 51_ON# VIN PC8 0.1U_0603_25V7K 2 PC7 0.22U_1206_25V7M 2 100K_0402_1% 30 1 2 PR10 1K_1206_5% PD4 PR13 2 3 1 1 2 PR11 200_0603_5% N1 1 CHGRTCP RTCVREF 1 PR16 200_0603_5% 2 2 2 PR22 PC13 1000P_0402_50V7K 1 VL 34K_0402_1% PR24 66.5K_0402_1% 1 6 PR23 499K_0402_1% PR25 191K_0402_1% PC11 1000P_0402_50V7K 2 PC12 1000P_0402_50V7K 5 - 2 LM393M_SO8 1 RB715F_SOT323 + O 1 3 2 7 1 ACON 1 1 36 PU1B 2 1 PD6 4,15,35,37,38 MAINPWON 8 PD5 RLZ16B_LL34 PC9 1U_0805_25V4Z 2 1 PR19 499K_0402_1% 2 GND PC10 10U_0805_10V4Z P N2 2 1 2.2M_0402_5% G IN 2 PR18 4 560_0603_5% OUT 2 100K_0402_1% 2 3 2 560_0603_5% 2 1 PR17 1 1 2 2 VL 1 1 G920AT24U_SOT89 2 +CHGRTC 3.3V PR21 1 PR20 PU2 3 3 1 1 +3VALW +1.8VALWP 2 2 1 PJ2 2 JUMP_43X118 1 1 (6A,240mils ,Via NO.= 12) (5A,200mils ,Via NO.= 10) PJ3 @ 2 1 1 +1.5VSP (5A,200mils ,Via NO.= 10) PJ5 2 +12VALWP 2 1 1 PJ4 +5VALW JUMP_43X118 2 2 +1.5VS PQ3 DTC115EUA_SC70 2 +5VALWP PJ6 2 2 1 1 +0.9VS @ JUMP_43X118 (2A,80mils ,Via NO.= 4) PJ7 2 1 (0.1A,20mils ,Via NO.=1) +0.9VSP (120mA,40mils ,Via NO.= 2) +1.05VSP 1 PACIN 1 47K_0402_5% S @ JUMP_43X118 +12VALW @ JUMP_43X39 2 Precharge detector 15.97V/14.84V FOR ADAPTOR PQ2 2N7002-7-F_SOT23-3 2 2 PR26 G 3 2 +5VALWP D +1.8VALW @ JUMP_43X118 1 @ 3 PJ1 2 +3VALWP PJ8 1 1 +1.05VS +1.2VSP 2 2 1 1 +1.2VS @ JUMP_43X79 @ JUMP_43X118 (5A,200mils ,Via NO.= 10) (4.5A,180mils ,Via NO.= 9) 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C Title DCIN & DETECTOR Size Date: Document Number R ev 0.3 Thursday, August 04, 2005 D Sheet 34 of 42 A B C D PC16 0.01U_0402_25V 2 PR27 PR31 1 2 13.7K_0402_1% TM_REF1 3 2 + - 1 1 PQ4 DTC115EUA_SC70 PD7 2 1 2 1SS355_SOD323 LM393M_SO8 3 +3VALWP 6.49K_0402_1% 1 2 47K_0402_1% PU3A O 1 PR36 2 1 VL 100K_0402_1% 1 1 2 2 PR39 PC18 1000P_0402_50V7K 2 PR37 PR35 22K_0402_1% PC17 1 0.22U_0805_16V7K 2 1 2 1 ALI/MH# 28,36 MAINPWON 4,15,34,37,38 1 PR29 1 2 PR34 100_0402_5% 1 PR33 100_0402_5% 1 47K_0402_1% 4 PC15 1000P_0402_50V7K VL 8 +3VALWP PC14 0.1U_0603_25V7K P PH1 BATT+ G 2 FBM-L18-453215-900LMA90T_1812 PR30 2 1 47K_0402_5% PR32 1K_0402_5% @ SUYIN_250005MR007G132ZR 1 PL2 1 2 1K_0402_5% 1 PR28 2 ALI/NIMH# AB/I TS_A EC_SMDA EC_SMCA PF2 12A_65VDC_451012 2 1 2 3 4 5 6 7 1 2 ID B/I TS SMD SMC GND BATT_S1 1 1 2 BATT+ 2 PJP2 1 1 VS 1 VL VMB 2 100K_0603_1%_TH11-4H104FT PH1 under CPU botten side : CPU thermal protection at 84 degree C Recovery at 45 degree C PR38 100K_0402_1% 2 2 1K_0402_5% 2 2 PH2 near main Battery CONN : BAT. thermal protection at 79 degree C Recovery at 45 degree C BATT_TEMPA 28 EC_SMB_DA1 28,29 2 VL PR40 47K_0402_1% PR42 5 + 6 - PU3B PD8 O 2 7 4 1 3 1SS355_SOD323 LM393M_SO8 22K_0402_1% 2 0.22U_0805_16V7K 2 10.7K_0402_1% TM_REF1 PR43 2 PC19 1 1 +5VALW 8 1 2 47K_0402_1% 1 3 1 PR41 P 1 2 PH2 3 2 PD21 @ BAS40-04_SOT23 2 3 PD20 BAS40-04_SOT23 G VL @ 100K_0603_1%_TH11-4H104FT 1 1 EC_SMB_CK1 28,29 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C Title BATTERY CONN / OTP Size Date: Document Number R ev 0.3 Thursday, August 04, 2005 D Sheet 35 of 42 A B Iadp=0~3.125A P2 PQ7 AO4407_SO8 B+ PQ5 AO4407_SO8 PR44 2 @ 2 1 1 B++ JUMP_43X118 1 2 4 4 1 8 7 6 5 4 1 0.02_2512_1% PC20 4.7U_1206_25V6K 1 2 PC21 4.7U_1206_25V6K 2 8 7 6 5 1 1 2 3 PJ9 1 1 2 3 1 2 3 2 8 7 6 5 D P3 PQ6 AO4407_SO8 VIN C PC22 4.7U_1206_25V6K 1 200K_0402_1% 4 -INE2 VCC(o) 21 5 FB2 20 1 PC29 0.1U_0402_16V7K PC30 PR54 2 1 2 1K_0402_5% 1000P_0402_50V7K 1 2 2 162K_0402_1% 1 2 PR56 D 28 IREF PQ13 2N7002-7-F_SOT23-3 OUT VH 19 VCC 18 -INE1 RT 17 +INE1 -INE3 16 VREF 7 FB1 8 9 S PR61 2 PR59 1 10 10K_0402_5% 2 100K_0402_1% 11 12 FB3 15 OUTD CTL 14 -INC1 +INC1 13 OUTC1 0.1U_0402_16V7K IREF=1.31*Icharge IREF=0.73~3.3V 1 LX_CHG 1 2 PC28 0.1U_0603_25V7K 1 2 PC31 0.1U_0603_25V7K 2 28 DTC115EUA_SC70 CC=0.5~3.1A CV=16.8V(4/8 CELLS LI-ION) CV=12.6V(6 CELLS LI-ION) 1 PR55 68.1K_0402_1% 2 PL3 PR58 1 2 1 2 16UH_D104C-919AS-160M_3.7A_20% 0.02_2512_1% PC32 1 2 1 2 47K_0402_5% 1500P_0402_50V7K ACON BATT+ 4.7U_1206_25V6K 2 PC33 ACOFF PQ11 PR60 ACON 2 DH_CHG PD10 PC34 EC31QS04 PC35 4.7U_1206_25V6K PC36 4.7U_1206_25V6K 2 3 2 G 1 PACIN 1 2 PR57 3K_0402_1% 1 1 2 ACON PC25 1 2 0.1U_0603_25V7K 1SS355_SOD323 PACIN CS 1 22 2 CS 6 PD9 34 +INE2 PQ9 AO4407_SO8 ACOFF# 4 1 PC27 PR52 1 2 1 2 10K_0402_5% 4700P_0402_25V7K S 34,37 3 PC24 0.022U_0402_16V7K 1 2 2 2 2 2 PR51 30K_0402_1% 10K_0402_1% 2 3 PC26 PR53 150K_0402_1% ACOFF#1 23 1 PR50 1 1 3 1 D PQ12 2N7002-7-F_SOT23-3 GND VIN PR48 10K_0402_5% 2 1 DTC115EUA_SC70 0.1U_0402_16V7K 2 G OUTC2 24 1 PQ10 2 2 +INC2 1 1 100K_0402_1% -INC2 3 1 1 2 PR49 1 3 2 1 ADP_I 5 6 7 8 2 28 2 PU4 1 PC23 0.1U_0603_25V7K 47K PR47 1 2 47K_0402_5% 2 PQ8 DTA144EUA_SC70 2 2 47K 1 PR46 47K_0402_5% 3 1 PR45 MB3387PFV-ERE1_SSOP24~N ISE_CHG+ +3VALWP CS 1 PR62 1 2 PQ14 DTC115EUA_SC70 1 300K_0603_0.1% 1 300K_0603_0.1% VL 2 BATT Type 28,35 ALI/MH# +5VALWP IREF 4 CELL 0V 1.5A 1.572V 8 CELL 0V 3A 3.144V 6 CELL 3.3V 3A 3.144V 3 1 4S1P/4S2P : 17.4V--> BATT_OVP= 1.935V DTC115EUA_SC70 2 OVP voltage : LI Charge Current 2 PQ39 PR66 340K_0402_1% ALI/MH# 3 3 VMB 1 3 PR154 1 2 100K_0402_1% 2 G FSTCHG PR63 2 D 3 PQ15 DTC115EUA_SC70 28 4.2V PQ38 PR65 1 2N7002-7-F_SOT23-3 2 1 S 2 3 1 150K_0603_0.1% 2 PR64 47K_0402_5% 3S2P : 13.05V--> BATT_OVP= 1.45V Triggle Charge 500mA IREF=0.524V 1 (BAT_OVP=0.1111 *VMB) P 3 - 2 PR68 1 1 1 4 + G PU5A LM358A_SO8 1 0 28 BATT_OVP 8 2 PR67 499K_0402_1% PR69 PC37 4 105K_0402_1% PU5B LM358A_SO8 7 0 + 5 - 6 2 2.21K_0402_1% 0.01U_0402_25V 2 2 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C Title CHARGER Size Date: Document Number R ev 0.3 Monday, August 08, 2005 Sheet D 36 of 42 5 4 3 2 1 PC38 N4 2 1 1 PC39 470P_0805_100V7K EC11FS2_SOD106 1 FLYBACK 22_1206_5% 2 PQ16 SI4800DY-T1-E3_SO8 3 PC42 D D D D 1 1 PC41 4.7U_1206_25V6K PD12 DAP202U_SOT323 1 10UH_SDT-1403P-100-120GP_4.5A 2 PC43 B+++ 0.1U_0603_25V7K 1 22 D D D D 1 4 3 2 1 2 5 6 7 8 1 C G S S S 2 4 3 2 1 2 1 ISE_5V+ +2.5VREF PC52 PR81 576_0402_1% 0.47U_0603_16V7K PC55 4.7U_0805_6.3V6K PR84 1 150U_D2E_6.3V_R18 PC58 + PC57 100P_0402_50V8J PD15 SKUL30-02AT_SMA 2 2 1 2 VSE_5V 2 10.2K_0402_1% 1 1 1 +5VALWP MAX1902AEAI_SSOP28 POK PC59 @ 0.1U_0603_25V7K 2 2 1 1 21 DL_5V 1 PR85 10K_0402_1% PR76 2M_0402_1% LX_5V 2 47K_0402_5% PR86 2 1 PR87 220K_0402_5% B VL 2 1 PC56 1000P_0402_50V7K 2 2 2 1 RUN/ON3 1 PR83 VS TIME/ON5 4 5 18 16 17 19 20 14 13 12 15 9 6 11 PC50 47P_0402_50V8J 2 VSE_3V 7 28 DH_5V-2 2 CSH3 CSL3 FB3 SKIP# SHDN# VL 1 2 3 10 23 PR72 1.27K_0402_1% GND 2 PC54 100P_0402_50V8J 1 2 1 2 PR80 10K_0402_5% PACIN 1 2 1 3.32K_0402_1% 34,36 PR82 PD14 SKUL30-02AT_SMA 2 LX3 DL3 0_0402_5% ISE_3V+ PR79 ISE_3V2 1.24K_0402_1% 1 1 150U_D2E_6.3V_R18 + 26 24 PR74 0_0603_5% 1 1 1 2 PQ19 SI4810DY-T1-E3_SO8 12OUT VDD BST5 DH5 LX5 DL5 PGND CSH5 CSL5 FB5 SEQ REF SYNC RST# PQ17 SI4800DY-T1-E3_SO8 2 2 PC45 4.7U_1206_25V6K PC122 1U_0805_25V4Z 1 1 PR77 DH3 8 +3VALWP BST3 27 1 1M_0402_1% 2 2 PR78 C 25 2 2 PU6 0.47U_0603_16V7K V+ PC51 PR75 3.74K_0402_1% PC48 1U_0805_25V4Z DH_5V-1 1 2 2 2 1 1.87K_0402_1% PC44 4.7U_1206_25V6K 2 2 1 2 3 4 DL_3V PR73 2 PL4 10U_LF919AS-100M-P3_4.5A_20% PC47 0.1U_0603_25V7K PC46 4.7U_0805_6.3V6K DH_3V-1 PC49 47P_0402_50V8J 1 1 S S S G 1 PQ18 SI4810DY-T1-E3_SO8 1 1 D D D D 1 1 8 7 6 5 5 6 7 8 +12VALWP 1 VL 1SS355_SOD323 G S S S PD13 D D D D PR71 0_0603_5% DH_3V-2 2 1 1 VS 2 1 2 3 4 S S S G 2 2 4.7U_1206_25V6K LX_3V PC53 D PT1 2 0.1U_0603_25V7K 2 SNB 2 PR70 4.7U_1210_25V 3 B+ BST_5V 8 7 6 5 D BST_3V 4 PC40 1 2 2 FBM-L18-453215-900LMA90T_1812 1 B+++ PL11 1 2 PD11 10K_0402_1% B 2 1 MAINPWON 4,15,34,35,38 PC60 0.47U_0603_16V7K A A 2005/03/01 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title 3V / 5V / 12V Size Date: Document Number R ev 0.3 Thursday, August 04, 2005 Sheet 1 37 of 42 A B C D 22 LGATE2 27 2 PR97 2K_0402_1% 1 2 PR158 4.7_1206_5% PQ23 SI4810DY-T1-E3_SO8 G S S S 18 1 4 3 2 1 OCSET2 PR98 0_0402_5% PC124 680P_0603_50V8J 1 2 PR101 PC77 10K_0402_1% @ 0.1U_0402_16V7K SUSP# PC74 220U_6.3V_M_R13 2 24,28,29,33,39 1 PR102 ISL6227CAZ-T_SSOP28 PR106 100K_0402_1% @ 0_0402_5% PR104 6.49K_0402_1% 2 13 + PR99 2.21K_0402_1% 2 2 PR107 100K_0402_1% 1 VSE_1.2V 1 OCSET1 DL_1.2V 2 11 DDR PC76 2 PR156 @ 0.1U_0402_16V7K 47K_0402_1% 1 20 19 21 16 1 PR105 @ 0_0402_5% VOUT2 VSEN2 EN2 PG2/REF 1 2 10K_0402_1% VOUT1 VSEN1 EN1 PG1 1 +3VALW 2 PR103 2 PR100 47K_0402_1% PGND2 9 10 8 15 2 1 @ 1 1 4,15,34,35,37 MAINPWON PGND1 26 GND VSE_1.8V 3 2 0.01U_0402_25V PC75 1 LGATE1 ISE_1.2V 2 2 ISEN1 1 1 7 +1.2VSP 1 ISEN2 LX_1.2V 2 25 PL6 1.8U_D104C-919AS-1R8N_9.5A_30% 1 2 2 PHASE2 +1.2V DH_1.2V-2 1 PHASE1 1 PR93 2 0_0603_5% 2 UGATE2 DH_1.2V-1 1 UGATE1 24 1 ISE_1.8V 2 2K_0402_1% DL_1.8V D D D D 23 BOOT1 PQ21 SI4800DY-T1-E3_SO8 G S S S BOOT2 PC71 BST_1.2V-2 1 2 2 1 PR91 0.1U_0402_16V7K 2.2_0603_5% PR96 1 5 6 7 8 PC69 2 1 0.01U_0402_25V 4 3 2 1 17 2 1 PC123 680P_0603_50V8J PR95 0_0402_5% 2 1 28 SOFT2 5 6 7 8 S S S G VCC 14 VIN BST_1.8V-1 PC68 PU7 2 1 12 4700P_0402_25V7K SOFT1 PC70 PR90 2 1 1 2BST_1.8V-2 6 0.1U_0402_16V7K PQ22 2.2_0603_5% SI4810DY-T1-E3_SO8 DH_1.8V-1 1 PR92 2 5 0_0603_5% 4 2 2 PR94 10.2K_0402_1% BST_1.2V-1 1 2 3 4 PC73 2 2 1 1 2 1 0.01U_0402_25V 2.2U_0805_10V6K D D D D PR157 4.7_1206_5% PC67 2 2.2_0603_5% 3 2 8 7 6 5 PC72 220U_6.3V_M_R13 2 + 2 1 DH_1.8V-2 2 PR89 2 PC66 0.1U_0603_25V7K LX_1.8V 2 8 7 6 5 1 1 2 3 4 PL5 1.8U_D104C-919AS-1R8N_9.5A_30% D D D D +1.8VALWP PQ20 SI4800DY-T1-E3_SO8 S S S G D D D D +1.8V PC64 4.7U_1206_25V6K 1 1 1 PC65 4.7U_0805_6.3V6K 2 1 PD16 DAP202U_SOT323 +5VALW 2 2 1 1 PL12 B+ 2 FBM-L18-453215-900LMA90T_1812 1 PC63 4.7U_1206_25V6K 1 PR88 0_1206_5% 2 2 4.7U_1206_25V6K 1 PC62 4.7U_1206_25V6K 1 PC61 1 1 3 3 4 4 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A B C Title 1.8V / VGA_CORE Size Date: Document Number R ev 0.3 Thursday, August 04, 2005 D Sheet 38 of 42 5 4 3 2 1 +1.2VS 1 1 +5VS 2 1U_0603_6.3V6M 6 2 VIN 9 +1.05VSP 1 PC85 0.01U_0402_25V 2 PU8 PR112 316_0402_1% APL5912-KAC-TRL_SO8~N 1 4 FB 2 GND EN 1 8 1 @ 150U_D2E_6.3VM_R18 + 2 VOUT PC79 22U_1206_6.3V6M 1 3 PC83 PC80 22U_1206_6.3V6M 2 1 2 PC84 @ 0.1U_0402_16V7K 5 1 0_0402_5% 1 2 24,28,29,33,38 SUSP# VIN VOUT 2 POK VCNTL 7 PR111 D 2 PC78 PJ12 JUMP_43X79 @ 1 2 1 D +1.8V PJ13 @ JUMP_43X118 2 1 1 2 PR113 1K_0402_1% C 2 C VCNTL 6 GND NC 5 3 VREF NC 7 4 VOUT NC 8 TP 9 +3VALWP 1 VIN 2 2 2 PR114 1K_0402_1% 2 PC86 10U_1206_6.3V7K 1 1 1 PU9 PC87 1U_0603_6.3V6M APL5331KAC-TRL_SO8 PJ14 1 +0.9VSP 1 1 2 2 2 PC91 10U_1206_6.3V7K PU10 2 2 PC88 1U_0603_6.3V6M 2 @ JUMP_43X118 1 IN 2 GND 3 SHDN OUT 5 BYP 4 +1.5VSP 1 1 1 +3VALWP S PQ28 2N7002-7-F_SOT23-3 PR116 PC89 1K_0402_1% 0.1U_0402_16V7K 2 G 2 PC92 @ 0.1U_0402_16V7K D 1 0_0402_5% 1 2 1 SUSP 1 33 3 PR115 PC90 1U_0603_6.3V6M B 1 2 G914GF_SOT23-5 B 2 PR117 0_0402_5% 2 1 1 24,28,29,33,38 SUSP# 2 PC93 0.33U_0603_10V7K PC94 @ 0.1U_0402_16V7K A A 2005/03/01 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2006/03/01 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title 1.5V / 1.25V / 1.2V Size Date: Document Number R ev 0.3 Thursday, August 04, 2005 Sheet 1 39 of 42 CPU_B+ +5VS B+ PL8 1 PR121 10_0402_5% 1 5 CPU_VID5 19 D5 PGND 31 25 VROK CMP 37 ISE_CPU1+ VSE_CPU CCI 14 TON BSTS 35 2 470P_0402_50V8J BST_CPU2-1 DH_CPU2-1 LX_CPU2 DLS 32 SUS CSP 40 ISE_CPU2+ 18 SKIP CSN 39 ISE_CPU2- GNDS 13 PR149 10K_0402_1% 5 6 7 8 PQ34 IRF7821PBF_SO8 PR147 2 2 PR143 0_0402_5% PL10 1 2 0.56UH_ETQP4LR56WFC_21A_20% 2 PQ35 PR151 4.7_1206_5% G S S S S 4 3 2 1 2 1 IRF7832PBF_SO8 PQ37 HMBT2222A_SOT23 1 3 1 1DH_CPU2-2 0_0603_5% 2 B E 2 CPU_B+ D D D D 1 1 D RHU002N06_SOT323 3 PQ36 2 G 2 PD19 EP10QY03 BST_CPU2-2 PC119 2 1 2 D D D D 5 6 7 8 1 MAX1532AETL+T_TQFN40 1 PC114 2200P_0402_50V7K D D D D GND RHU002N06_SOT323 PR148 20K_0402_1% 1 2.2_0603_5% 11 2 PR140 2.7K_0402_1% 1 2 OFS 3 PR135 2.7K_0402_1% @ +5VS DL_CPU2 7 909_0402_1% 2 G S S S 34 PC110 1 2 0.47U_0603_16V7K 4 3 2 1 LXS PR132 CCV 2 DHS S 1 12 PR138 1 CPU VCC SENSE PC108 680P_0603_50V8J 2 1 PC117 4.7U_1206_25V6K TIME 1 PC112 2 1 FB 15 1 ILIM D D D D D OAIN- G S S S 16 REF PQ31 PR131 4.7_1206_5% IRF7832PBF_SO8 4 3 2 1 OAIN- 1 2 1 0.56UH_ETQP4LR56WFC_21A_20% 0.001_2512_5% 5 6 7 8 2 1 1 C PSI# SHDN# 9 PR150 100K_0402_1% 5 OAIN+ 6 2 1 +5VS ISE_CPU1- 17 0.22U_0805_16V7K PR146 0_0402_5% 1 2 14 DPRSLPVR 38 OAIN+ 33 3 PQ33 2 G CMN S1 8 27P_0402_50V8J RHU002N06_SOT323 S0 5 2 PC116 1 2 1 1 1 2 PC115 100P_0402_50V8J PR144 10.7K_0402_1% 1 2 1 2 270P_0402_50V7K PC113 S 30.1K_0402_1% 1 4 0.22U_0805_16V7K V CC PR145 VGATE 0_0603_5% 2 DL_CPU1 1 LX_CPU1 29 1000P_0402_50V7K PC109 27 DLM 2 LXM D4 PR128 2 1 D3 20 PL9 499_0402_1% 2 1 21 CPU_VID4 DH_CPU1-2 PR134 CPU_VID3 5 1 499_0402_1% 2 1 5 +CPU_CORE 2 PR126 PR133 2PR124 1 2.2_0603_5% DH_CPU1-1 BST_CPU1-1 1 PC120 680P_0603_50V8J 909_0402_1% 2 1 28 PR152 DHM 909_0402_1% 2 1 D2 2 1 PC118 4.7U_1206_25V6K 22 PQ30 IRF7821PBF_SO8 2 CPU_VID2 PR141 2 68.1K_0402_1% 2 3 4,11,14 CPU_STP# 5 6 7 8 26 5 2 PC100 @ 220U_25V_M G S S S BSTM PR137 2 + 2 4 3 2 1 D1 PC107 2 1 23 0.22U_0805_16V7K CPU_VID1 PR139 200K_0402_1% D BST_CPU1-2 36 5 PC1111 PQ32 2 G 1 30 V+ 1 VSE_CPU 1 0.01U_0402_25V VDD D0 2 PR142 100K_0402_1% PC106 VCC 24 1 1 2 10 CPU_VID0 PR136 0_0402_5% VR_ON PC105 2.2U_0603_6.3V6K 5 16 2 FBM-L18-453215-900LMA90T_1812 1 2 PU12 V CC 28 1 1 PC104 1U_0603_6.3V6M 2 2 2 2 1 PC103 4.7U_1206_25V6K 2 1 PC102 4.7U_1206_25V6K 1 PD18 EP10QY03 1 2 PC121 0.47U_0603_16V7K 909_0402_1% 2 PR153 Issued Date Compal Electronics, Inc. Compal Secret Data Security Classification 2005/03/01 Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Title CPU_CORE Size Date: Document Number Monday, August 08, 2005 R ev 0.3 Sheet 40 of 42 5 0.1==>0.2 Date Page 6/12 6/12 D 6/22 9 10 12 15 24 26 28 29 31 27 2 Purpose Add C642, C643 and C644 Add C645, C646 and C647 Modify JP18 circuit Add @ on R317 Del @ on R436 Del R306 (move to sub board) Add @ on Super I/O circuit Modify pin74 net-name of KB910 Modify D16, D17 Add D35, D36 Add H34, H33 For Increase the DDR bypass capaciotrs For Increase the DDR bypass capaciotrs Making TV out function become correct Metting ATI reference circuit Solving MDC issue and sound slow issue To differentiate between HAZ00 and HTW01 BIOS For DVT build Solving reserve button no function D Change from double colors to signal color LED For Me update new drawing Writed by Timo 8 17 Add C648, C649 and C650 Add C651~C657 Change C585, C587, C566, C533, C560, C573, C536 from 10 to 4.7U 34 Change C225 from 4.7 to 10U For height limited of SB For height limited of SB 25 27 Del R456 Add Q52 Del R449~R454 For insert card bus device beep sound issue. For EMI request 29 23 28 12 22 27 Del Add ADD ADD ADD ADD ADD 7/13 1 Writed by Timo C 7/11 3 Action 0.2==>0.3 7/8 4 0.3==>1.0 Super I/O circuit JP30, R457, C658 JP29, R456 R459, R460 J1, J4 J2 J3 Seperate the AVDD and DVDD for TVout and CRT C For LPC debug port For Port80 Debug card connector For HDD password detect pin For EMI request Writed by Timo B B 7/28 7/30 25 29 Add C662, R461, D37, R462, Q52 Change R101 from 8.2k to 18kohm For Insert card bus device PoPo noise sound For Board ID change 14 17 Change C587, C585, C651, C652, C566, C553, C560, C573, C653, C654, C655, C656, C536, C657 from 4.7U to 1U For avoide the interfere area of HDD Change C288 from 150U fo 470UF Making the capacitors of 1.8VS source blance of SB Add C660, C661 Making the capacitors of 1.8VALW and 3VS sources blance of SB For throttle issue For cost down For EMI issue 4 5 12 Add @ in C261 Add @ in C180 Add L38, L39, L40 A A Compal Electronics, Inc. Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title PIR Size Date: Document Number Monday, August 08, 2005 Rev 1.0 Sheet 1 41 of 42 5 4 3 2 1 EVT page D C Reason for change Modify list 37 12V noise Change PC38 from 4.7u_1206_25V to 4.7u_1210_25V 37 Lead free parts Change PC53,PC58 to NEC lead free parts. 38 Modify 1.8V power sequence for HW requirement Change PR100 from 0_0402_5% to 47K_0402_1% Add 0.1u_0402_16V at PC76 39 Modify 1.05V circuit Delete Change Change Change Change D PQ24,PQ26,PL7,PD17,PC82,PC81,PR109,PQ25,PQ27,PR110 PU8 to APL5912-KAC-TRL PC85 to 0.01u_0402_25V PR112 to 316_0402_1% PR13 to 1K_0402_1% 39 Delete reserved 1.5V circuit Delete PU11,PC95,PR118,PR120,PQ29,PR119,PC99,PC97,PC98,PC96 39 Change 1.5V IC Change PU10 from APL5151 to G914 40 Add snubber for CPU CORE Add 4.7_1206_5% to PR131,PR151 Add 680P_0603_50V to PC108,PC120 Add bead at 3V/5V and 1.2V/1.8V input for EMI requirement Add PL11,PL12 to replace PJ10,PJ11 34 Change VS resistor to 33 ohm Change PR9 from 47_1206_5% to 33_1206_5% 34 Change 1N4148 to lead free P/N Change PD2,PD3,PD4 P/N to SC11N414880 40 Change HMBT2222 to lead free P/N Change PQ37 P/N to SB322220080 38 Raise 1.8V to 1.82V for HW requirement Change PR94 from 10K_0402_1% to 10.2K_0402_1% 34 Change VS resistor to standard part Change PR9 from 33_1206_5% to 68_1206_5% Add 68_1206_5% at PR155 38 Change 1.8VALWP power sequence for HW requirement 37,38 C DVT PVT B B Change 47K_0402_1% from PR100 to PR156 Delete PC76 Change PC68 from 0.01u_0402_25V to 4700P_0402_25V Pre-MP 38 Add BOOST 2.2 ohm and snubber at 1.8V / 1.2V for EMI Add 4.7_1206_5% to PR157,PR158 Add 680P_0603_50V to PC123,PC124 Change PR90,PR91 from 0_0603_5% to 2.2_0603_5% 42 Change CPU CORE mosfet for EMI Change PQ30,PQ34 from AO4408 to IRF7821 Change PQ31,PQ35 from AO4410 to IRF7832 42 Delete CPU VID 0 ohm debug resistor Delete PR122,PR123,PR125,PR127,PR129,PR130 A A Compal Electronics, Inc. Compal Secret Data Security Classification 2005/03/01 Issued Date Deciphered Date 2006/03/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 3 2 Title PIR Size Date: Document Number Thursday, August 04, 2005 Rev 0.3 Sheet 1 42 of 42 www.s-manuals.com
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