Compal LA A791P Schematics. Www.s Manuals.com. R0.2 Schematics

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5

4

3

2

1

ZZZ
ZZZ1
0605 Change P/N for ZEJ00

DAZ@
PCB
DA60012D000
PCB 125 LA-A791P REV0 M/B 3

45@
HDMI
RO0000003HM

D

D

S1

FRAME

EC0MV000200
@

Compal Confidential

S4

FRAME

EC0MV000200

for GLONASS
@

C

C

Schematics Document

ZEJ00
LA-A791P
B

B

2013-05-27
REV:0.2
A

A

2012/11/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2014/11/09

Deciphered Date

Title

Cover Page

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.2

ZEJ00 -LA-A791P

Date:

5

4

3

2

Thursday, August 08, 2013

Sheet
1

1

of

28

5

4

3

2

1

ZEJ00 block diagram
D

D

Max. support VRAM size : 2GB.

switching
Charger P22

DDR3L 1GB (4Gb X16 *2 Pcs)

HDMI
CONN.

Battery
P22

I2C
P6
Battery Input

P7
External Memory Interface

LDO Output

HDMI
LVDS

BUCK Output
RGB

MT8193

LCM
CONN.

USB 2.0

P7

micro USB,OGT
P17

PWM

P7
C

S7300B +
Vibrator CONN

Touch Sensor
Board CONN.

P14

I2C,
EINT

MT8389W/MT8125

P14

I2S, SPI, EINT, I2C

MT6320
PMIC
AUDIO
LDO OUTPUT
BUCK OUTPUT
CHARGER

C

D MIC
MIC

HP R/L

Cortex-A7

KCOL & KROW

Button (Power on/reset)

P23~P25

GPIO POUT

P Sensor

P15
MIPI,I2C

5M Camera

P8

1.2GHz Quad-Core

HP+MIC jack

P10

P Sensor
Conn

YUV,I2C

Front Camera

P16

P8

SIM Card

P8

P18

P10
GPIO

Gyro+ G
sensor
MPU 6050

Speaker R
Speaker

AMP

P12
I2C, EINT

P16
P12

BSI

P12

B

combo JACK

Audio S/W

Speaker L

B

26MHz
I2C, EINT

Debug Port

JTAG
UART1
UART2
UART4

PCM, UART3, EINT

P11
P4,P5

MSDC0

NH520T/NH520*

MSDC3

WIFI
BT4.0
GPS*

WIFI/BT

GPS

MSDC1
P9

micro SD

eMMC
8G/16G

Russian Sku

P17

P13

MT3332

UART1, EINT

GPS

GLONASS
A

A

P21

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

5

4

3

2

Block Diagram
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

2

of

28

5

4

3

2

1

D

D

Voltage Rails
MT6320 Power Plane

C

IDLE

Sleep mode

VCORE_PMU

Function
VCORE switching output

Power Level
0.75 ~ 1.3

ON

Low voltage

VPROC_PMU

VPROC switching output

0.75 ~ 1.3

ON

Low voltage

VTCXO_1_PMU

LDO output for TCXO

2.8V

ON

OFF

VCAMA_PMU

LDO output for camaera analog

2.8V

ON

Gating by SW

VSRAM_PMU

LDO output used for 1.2V SRAM

1.2V

ON

Low voltage

VDD28_6583

LDO output used for 2.8V IO

2.8V

ON

Gating by SW

VGP2_PMU

LDO output for camaera 1.8V

1.8V

ON

Gating by SW

VEMC_3V3_PMU

LDO output for eMMC&P-sensor

3.3V

ON

Gating by SW

VMCH_PMU

LDO output for SD card

3.3V

ON

Gating by SW

VGP5_PMU

LDO output for Touch panel

2.8V

ON

Gating by SW

DDR3VCCIO

LDO output for DDR3L

1.35V

ON

Gating by SW

VDD18_6583

LDO output used for 1.8V IO

1.8V

ON

Gating by SW

VRF18_PMU

LDO output for RF_MT6167

1.8V

ON

Gating by SW

I2C address
Address(7 bit)

Device
Gyro (MPU-6050)
G-sensor (MPU-6050)
Touch screen (S7300B)
Camera 0.3M
Camera 5M
PMIC
Charger
Battery

Address(8bit)
Write

Read

0x68
0x68
0x20
0x21
0x36

0xD0
0xD0
0x40
0x42
0x6C

0xD1
0xD1
0x41
0x43
0x6D

0x6B
0x55

0xD6
0xAA

0xD7
0xAB

C

Gating by SW

Main board ID
MB_ID0

MB_ID1

0
0
1
1

0
1
0
1

BOM structure
Function

Name

B

B

3G@
WIFI_ONLY@
DAZ@
EMC@
NH520@
NH520_EMC@
GLONASS@

EVT
DVT
PVT
MP

3G only
WIFI ONLY
PCB
for EMC request
AW-NH520
GPS EMC
MT3332

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Issued Date

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Title

Notes List

Size
Document Number
Custom
Date:

Rev
0.2

ZEJ00 -LA-A791P

Thursday, August 08, 2013

Sheet
1

3

of

28

5

4

3

2

1

U201
3G@

SA00006SG00

2

C1618

1

2

AVDD28_DAC

AJ11

C1621

1

M16
M15

2

AVDD33_USB_P0
AVDD18_USB_P0
AVSS33_USB_P0

DVDD18_PLLGP

AVDD33_USB_P1
AVDD18_USB_P1
AVSS33_USB_P1

AVDD18_MEMPLL
AVSS18_MEMPLL

C1637

H1
K6
AB28
AD27
AB26
AF29
AC26
AE28

2

C1640

MT8389E1_PCDDR3

8125 footprint

@

C1638

2

1

2

1

VDD18_6583

D

2

R1628
1
2
0_0402_5% -22mil

VUSB_PMU
0_0402_5% -22mil
1
2
1
2
R1653
0_0402_5% @
1
2
R1629
0_0402_5% -22mil
R1652

2

C1641

2
0_0402_5% -22mil

1

C1639
0.1U 10V +-10% X7R 0402

AH19

DVDD18_MIPIIO
DVSS18_MIPIIO

L7
M6

0.1U 10V +-10% X7R 0402

AVDD18_AP
AVSS18_AP
AVSS18_AP

R1627

1
1

C1673
0.1U 10V +-10% X7R 0402

1

AJ12
AD12
AE13

2

DVDD18_MIPIRX
DVSS18_MIPIRX

T3
T2

1U_0402_6.3V6K

0.1U 10V +-10% X7R 0402

C1610

2

DVDD18_MIPITX
DVSS18_MIPITX

AVDD18_MD
AVSS18_MD
AVSS18_MD

0.1U 10V +-10% X7R 0402

2

DVDD18_MD

AH14
AD16
AE17

1U_0402_6.3V6K

0_0402_5% -22mil
R1635
1
2
VTCXO_1_PMU
R1636
1
2
VDD18_6583
0_0402_5% -22mil
R1637
1
2
VDD18_6583
0_0402_5% -22mil

1
C1609
0.1U 10V +-10% X7R 0402

SA00006S510
S IC MT8389WK/A 1.2G FCCSP 515P CPU

1
C1608

0.1U 10V +-10% X7R 0402

D

VA_PMU

U201F
AG17

0.1U 10V +-10% X7R 0402

WIFI_ONLY@

0_0402_5% -22mil
R1632
1
2
R1633
1
2
0_0402_5% -22mil
1
C1607

0.1U 10V +-10% X7R 0402

VDD18_6583

U201

0.1U 10V +-10% X7R 0402

S IC MT8389WK/A 1.2G FCCSP 515P CPU

1

1

VUSB_PMU
VSIM1_PMU
VDD18_6583

2

1.8V IO for DDR
1.2V IO for DDR2
1.5V IO for DDR3
1.35V IO for DDR3L : Default

DDR3VCCIO
U201B

R1639

C

8125 footprint

2

1

2

C447

2

1

0.1U 10V +-10% X7R 0402

0_0402_5% -22mil 1 R1643
0_0402_5% -22mil 1 R1658
0_0402_5% -22mil 1 R1659

2
2
2

VDD18_6583
VDD18_6583
VDD18_6583

0_0402_5% -22mil 1 R1644

2

VDD18_6583

1

0704 ADD C1687 C1686 FOR RF

1
2
@
R1657 0_0402_5%

0.1U 10V +-10% X7R 0402

<23>

EMC@
1 12P_0402_50V8
C1687

EMC@
1 12P_0402_50V8
C1686

2

2

1 R1648

2

33P 50V J NPO 0402
C1756
EMC@

R1655
1
2
0_0402_5% -22mil
DVDD_GPU_R

R1649
0_0603_5%
1
2
@

2

1

2

33P 50V J NPO 0402
VPROC_PMU
C1757

2

EMC@

0_0805_5%

2

C1678

1

R1660
1

2

GND_DVDD_DVFS

<23>

0_0402_5% -22mil
DVDD_SRAM

<23>

R1651
1

1

2

VSRAM_PMU

2
DVDD_SRAM

2

2

2

2

1 EMC@
C1679

1
@
2

2

DVDD_DVFS

1 EMC@ 1
1
C1680
C1681
C1682
@
@

0_0603_5% -35mil

1

2

DVDD_GPU

C451
22UF 6.3V M X5R 0805 H1.25

1

10U_0402_6.3V6M

2

10U_0402_6.3V6M

2

C450

B

<23>

1
1

1

VGPU_PMU

R1650
C449

DVDD

2 EMC@ 1
1
1
1
C1674
C1675
C1676
C1677
@
@
@

<23>

DVDD_DVFS

1
2
C1648 C446

VCORE_PMU

0_0805_5%

C457

0.1U 10V X7R 0402_NC

2

DVDD

0.1U 10V X7R 0402_NC

C455

2

0.1U 10V X7R 0402_NC

2

VEMC_1V8_PMU
VMC_PMU
VDD28_6583
VDD18_6583

0.1U 10V X7R 0402_NC

2

C454

1
10U_0402_6.3V6M

1

1

C1671

2

1
1
1
1

1

22UF 6.3V M X5R 0805 H1.25

2

C1670

2

10U_0402_6.3V6M

2

1

0.1U 10V +-10% X7R 0402

C1667
0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

1

1U_0402_6.3V6K

0.1U 10V +-10% X7R 0402

C448

2
2
2
2

2

1
C1647

2

C1660

C434

0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402
C1643

1
C1646

2

1

1

VM_PMU

R1654
R1640
R1641
R1645

0_0402_5% -22mil
0_0402_5% -22mil
0_0402_5% -22mil
0_0402_5% -22mil

2

2

2
A

EMC@
C1683
12P_0402_50V8

0.1U 10V +-10% X7R 0402

MT8389E1_PCDDR3

1

1
C1645

C1655

2

C453

1

1

2

2
0_0805_5%

0.1U 10V X7R 0402_NC

C1642

2

2

C436

2

C1654

2

C1659

2

1

1

2

1U_0402_6.3V6K

DVDD_SRAM

1
C1644

1

C1658

1

C1664

2

0.1U 10V +-10% X7R 0402

W13
W14

2

2

2

10U_0402_6.3V6M

DVDD_DVFS

C1650

C1653

1

1

C1663

0.1U 10V +-10% X7R 0402

R12
R15
T12
T15
U12
U13
U14
U15
V12
V13
V14
V15
W12
W15

1

1

1

2

0.1U 10V +-10% X7R 0402

C1649

2

C1657

2

0.1U 10V +-10% X7R 0402

DVDD_GPU
T10
U9
U10
V9
V10

C1652
0.1U 10V +-10% X7R 0402

0.1U 10V +-10% X7R 0402

C1651

1

1

1U_0402_6.3V6K

2.2U_0402_6.3VM
1U_0402_6.3V6K

0.1U 10V +-10% X7R 0402

DVDD

A

@

C1656

1

2

1

0.1U 10V X7R 0402_NC

DVDD_SRAM
DVDD_SRAM

2

C1662

10U_0402_6.3V6M

NC
NC
NC
NC

2

1

1U_0402_6.3V6K

VPROC_FB
GND_VPROC_FB

DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS
DVDD_DVFS

C1661

0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

DVDD_GPU
DVDD_GPU
DVDD_GPU
DVDD_GPU
DVDD_GPU

C431

0.1U 10V +-10% X7R 0402
0.1U 10V +-10% X7R 0402

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

1

R24
U1
Y1
AE25
AG23
AJ22
J29
Y24
AF1
F1
W8
N10
N11
N12
N13
N14
N15
N16
N17
P10
P17
P18
P19
P20
R17
R19
T17
T19
U17
U19
U20
V17
V20
W20

C

1
C1665

12P_0402_50V8

A1
A29
AJ1
AJ29

DVDD18_MC0
DVDD33_MC1
DVDD33_MC2
DVDD28_BPI
DVDD28_BSI
DVDD18_BSI
DVDD18_NML1
DVDD28_NML2
DVDD18_NML3
DVDD18_NML4
DVDD18_MC12

H10
H19
H20
J10
J11
J17
J18
J19
J20
K13
K15
K20

12P_0402_50V8

AB11
AD11

DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI
DVDD18_EMI

0.1U 10V +-10% X7R 0402

B

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

12P_0402_50V8

C5
C8
C21
C24
D7
D9
D11
D18
D20
D22
J6
J14
K10
K11
K12
K16
K17
K18
L24
P11
P12
P13
P14
P15
P16
R10
R11
R13
R14
R16
R18
R20
T8
T9
T11
T13
T14
T16
T18
T20
U8
U11
U16
U18
V6
V7
V8
V11
V16
V18
V19
W11
W16
W19
W24
AA6
AD20
AD24

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

5

4

3

2

MT8377 - Power
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

4

of

28

3

2

2

2

2

1

1

2

2

2

R1525
@

R1527
@

R1529
@

100K_0201_5%

100K_0201_5%

100K_0201_5%

100K_0201_5%

VM0
VM1

POUT_1

BSI1C_CLK
BSI1C_DATA

BSI1B_CS0
BSI1B_CLK
BSI1B_DATA

AE20
AH22
AH21
AE21
AG22

1

1

1

1

1

Reserve

<6>
@ PAD TP1390
@ PAD TP1362
@ PAD TP1361

8.06K +-1% 0402
R209

BSI-A_EN
BSI-A_CK
BSI-A_DAT0
BSI-A_DAT1
BSI-A_DAT2

<6>

EVREF

EVREF

AE23
AF23
AE22

8.06K +-1% 0402
R211

MT8389E1_PCDDR3
@

U201D

ED[0..31]

1

2

8125 footprint
0521 DEL X602

1

C205
0.1U 10V +-10% X7R 0402

2

C206

C207
1U 10V K X5R 0402

R220

<6>

URXD4
UTXD4

<11> URXD4
<11> UTXD4

SCL0
SDA0
SCL1
SDA1
SCL2
SDA2
SCL3
SDA3

TP1369PAD @
SCL2
SDA2

<17>

USB_DP

90 Ohm <17> USB_DM
<17> USB_ID
differential
2 R1765 1 0_0402
2 R1766 1 0_0402
0605 Change bom structure
<23> CHD_DP
<23> CHD_DM

USB11_DP
USB11_DM

AE29
AD29
AB25
AA25
B2
C2
C3
E2
E1

<9> DAICLK
<9> DAIPCMIN
<9> DAISYNC
<9> DAIPCMOUT
<9> DAIRST
<7>
<7>
<7>

AG9
AH9
AJ9
AD8

I2S0_CK
I2S0_WS
I2S0_DAT_IN
I2S0_DAT_OUT

AH11
AH10

TP1357PAD @

AF12
AE11
AE12
AG12

MRG_I2S_PCM_CLK
MRG_I2S_PCM_RX
MRG_I2S_PCM_SYNC
MRG_I2S_PCM_TX
DAI_RSTB
I2S_CLK
I2S_WS
I2S_DATA_IN
I2S_DATA_OUT

AUXIN0
AUXIN1

REFP
REFN

DVDD33_MC2

<9> MC3DA3
<9> MC3DA2
<9> MC3DA1
<9> MC3DA0
<9> MC3CLK
<9> MC3CMD
GPIO_6628_GPS_LNA_EN
<9> GPIO_6628_PMU_EN
LCM_RST_2V8
LCM_STBY_2V8

EMC@

H16
H15
H12
H13

DVDD33_MC1

LSCE0B
LSCE1B
LSCK
LSDA
LSA0
LRSTB
LPCE0B
LPCE1B
LPTE
DISP_PWM

L29
M29
M26
M28
L28

PWRAP_SPI0_CSN

K25
K26
K28
M27
L26
L27

EMC@

ADC_CLK <24>
ADC_WS <24>
ADC_DAT_IN <24>
DAC_CLK <24>
DAC_WS <24>
DAC_DAT_OUT <24>

N25
M25
P28
M24
N24
N28

EINT0 : Gyro-Sensor
EINT1 : SIM
EINT2 : G-Sensor
EINT3 : PMU MT6320

0_0402_5%
1 R636
2

<23>

PWRAP_SPI0_MI <23>
PWRAP_SPI0_MO <23>
PWRAP_EVENT <23>

PWRAP_SPI0_CLK

1

2

@ C1736
33P 50V J NPO 0402

<23>

EINT5 : CTP
EINT6 : MT3332
EINT8 : MT6628 BGF
EINT9 : MT6628 WiFi

5/23 ADD FOR RF

T28
T27
T26
R27
R25
AE8
AH8
AG8
AJ8
AF8
AD10
AE10
AF10

<12>

@ PAD TP1378
MB_ID0

AJ3
AJ5
AG4
AH3 MODE4/6 : MD1/2_GPS_SYNC
AE6
AH6
AH4
AF6
AH7
AE7

add GPIO PIN for

GPIO_SW LED_Signal_EN 0522

L4
K4
L3
K3
K2
L2
J4
H4
J3
H3
J2
J1

<10> CMDAT5
<10> CMDAT4

GPIO_SW1 <12>
EINT_PMU <23>
MB_ID0 Change from AH4 to R25
EINT_CTP <14>
MT8389_EINT_MT3332 <21>
LED_Signal_EN <7>
5/22 add LED_Signal EN gpio pin for panel
EINT_6628_BGF <9>
EINT_6628_WIFI <9>
EINT_HP <8>
CHG_TEMP <22>
MT8193_INT <7> 0509 Change
ADD C79 FOR EMI 8/1
<21>
GPIO_CTP_RST
5/10
1
DPI1_CK <7>
C79
GPIO_6628_GPS_SYNC
<9>
EMC@
LED_EN <7>
0.1U 10V +-10% X7R 0402
GNSS_HRST <21>
2
GPIO_HDMI_POWER_EN
<7>
MT8389_GPIO_FRAME_SYNC
<21>
LCM_BL_EN <7>
VDD18_6583
@ PAD TP1360
LCD_PWM <7>

M4
N4
L1
M1
N3
M3
M2
N2
P2
P1

RCP
RCN
RDP0
RDN0
RDP1
RDN1

<10> CMDAT9
<10> CMDAT8
<10> CMVREF
<10> CMHREF
<10> CMDAT7
<10> CMDAT6

UART1: Debug/MT3332
UART2:
UART3: MT6628
UART4: Debug

05/20 Change GPIO from SOC to PMIC
LTE_ON_OFF#
GPS_OFF#
LTE_RESET
EINT_GY

<10>
<10>
<10>
<10>
<10>
<10>

EINT10 : HEADSET

SIM1_SCLK <24>
SIM1_SIO <24>
SIM1_SRST <24> 5/22 gpio change for SW
@ PAD TP1374
Add TP1378 0808

C

B29
D27
H26
F29
J25
E29
H29
N19
N18
E15

8125 footprint

R204
68 +-1% 0402
@

I2C0
I2C1
I2C2
I2C3
I2C4
I2C5
I2C6

: CTP
: Sub Camera
:
: G/GYRO sensor
(PMIC) : Charger IC
(PMIC) :
(PMIC) :

<10> CMDAT3
<10> CMDAT2
MIPI_VRT

R6

TCP
TCN
TDP0
TDN0
TDP1
TDN1
TDP2
TDN2
TDP3
TDN3
RCP
RCN
RDP0
RDN0
RDP1
RDN1
RDP2
RDN2
RDP3
RDN3

DPIVSYNC
DPIHSYNC
DPIDE
DPICK
DPIR0
DPIR1
DPIR2
DPIR3
DPIR4
DPIR5
DPIR6
DPIR7
DPIG0
DPIG1
DPIG2
DPIG3
DPIG4
DPIG5
DPIG6
DPIG7

RCP_A
RCN_A
RDP0_A
RDN0_A
RDP1_A
RDN1_A
RCP_B
RCN_B
RDP0_B
RDN0_B
RDP1_B
RDN1_B
VRT

DPIB0
DPIB1
DPIB2
DPIB3
DPIB4
DPIB5
DPIB6
DPIB7
CMMCLK
CMRST
CMPCLK
CMPDN
CMFLASH

AD1
AC2
AF4
AJ2

DPI_VSYNC
<7>
DPI_HSYNC
<7>
DPI_DE <7>
DPI_PCLK <7>

AE5
AG3
AB2
AD5
AF2
AD2
AC4
AG2
AC1
AB5
AH1
AD3
AD6
AA5
AH2
AA2
AC3
AC5
AG1
AB4
Y5
AE2
AD4
AA1
G3
H2
G4
F2
G2

DPI_R0
DPI_R1
DPI_R2
DPI_R3
DPI_R4
DPI_R5
DPI_R6
DPI_R7

<7>
<7>
<7>
<7>
<7>
<7>
<7>
<7>

DPI_G0
DPI_G1
DPI_G2
DPI_G3
DPI_G4
DPI_G5
DPI_G6
DPI_G7

<7>
<7>
<7>
<7>
<7>
<7>
<7>
<7>

DPI_B0
DPI_B1
DPI_B2
DPI_B3
DPI_B4
DPI_B5
DPI_B6
DPI_B7

<7>
<7>
<7>
<7>
<7>
<7>
<7>
<7>

B

CMMCLK <10>
CMRST <10>
CMPCLK <10>
CMPDN <10>

R203
1.5K_0402_1%

MT8389_GPIO_GPS_EN

MT8389E1_PCDDR3
@

<14>

8125 footprint

I2S :
MSDC0
MSDC1
MSDC2
MSDC3

:
:
:
:

Close to MT6583

eMMC
SD Card
GPIO (2.8V)
MT6628

AH4 NEED CHANGE

MC1INSI

R1869 @
10K_0402_5%

@

R1872
10K_0402_5%

A

GPIO_CTP_RST
EINT_CTP
0603 ADD PULL HIGH
0730 change bom structure for MTK recommend

<17>

MC1CM <17>
MC1CK <17>
MC1DA0 <17>
MC1DA1 <17>
MC1DA2 <17>
MC1DA3 <17>

4

EDCLK <6>
EDCLK_B <6>
EDCLK1 <6>
EDCLK1_B <6>

G25
D28
F28
F25
E26
H25
J28
E28
C29
G28
H28
B28
G27
H27
G26
C28

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

EDQS0 <6>
EDQS1 <6>
EDQS2 <6>
EDQS3 <6>
/EDQS0 <6>
/EDQS1 <6>
/EDQS2 <6>
/EDQS3 <6>

MT8389E1_PCDDR3
@

P8
R7
R3
P3
P4
R4
R1
R2
P7
P6

<11,15,23,7>

SRCLKENAI <9>
SRCLKENA <23,7>
SRCLKENA2 <23>
SRCVOLTEN <23,7>

eMMC_RST <13>
eMMC_CMD <13>
eMMC_CLK <13>
eMMC_DAT0 <13>
eMMC_DAT1 <13>
eMMC_DAT2 <13>
eMMC_DAT3 <13>
eMMC_DAT4 <13>
eMMC_DAT5 <13>
eMMC_DAT6 <13>
eMMC_DAT7 <13>

8125 footprint

<6>
<6>
<6>
<6>

W27
AA29
AA26
AA28
PWM1
PWM2
PWM3
PWM4

AJ6
AF5
AH5
AG5
SPI1_CSN
SPI1_MO
SPI1_MI
SPI1_CLK

AF9
AE9
D2
C1
A2
B1
V29
V28
SCL0
SDA0
SCL1
SDA1
SCL2
SDA2
SCL3
SDA3

Y28
W25

EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
EINT7
EINT8
EINT9
EINT10_AUXIN2
EINT11_AUXIN3
EINT16_AUXIN4

Close to MT6583

<9>

UTXD4
URXD4

V24
W26
V25
W28

F4
B3
UTXD3
URXD3

UTXD2
URXD2
UCTS2
URTS2

Y27
Y26
Y29
Y25
UTXD1
URXD1
UCTS1
URTS1

CHD_DP_P0
CHD_DM_P0

MT8389E1_PCDDR3
@

2

C213
1U 10V K X5R 0402

SIM1_SCLK
SIM1_SIO
SIM1_SRST
SIM2_SCLK
SIM2_SIO
SIM2_SRST

USB_DP_P1
USB_DM_P1

1

AH12
AH13

ADC_CLK
ADC_WS
ADC_DAT_IN
DAC_CLK
DAC_WS
DAC_DAT_OUT

USB_VRT
USB_VBUS
USB_DP_P0
USB_DM_P0
IDDIG

AUX_XP
AUX_XM
AUX_YP
AUX_YM

EDQM0
EDQM1
EDQM2
EDQM3

1

USB11_DP_P
USB11_DM_N

DDR3RSTBREXTDN

2

2

1 R221
2
1M_0402_1%
<18>
<18>

NLD15
NLD14
NLD13
NLD12
NLD11
NLD10
NLD9
NLD8
NLD7
NLD6
NLD5
NLD4
NLD3
NLD2
NLD1
NLD0

A21
C18
A8
C9
F23
E20
E6
F9
E23
F20
F6
E9

2

1 R222
2
4.99M +-1% 0402

VBUS

PWRAP_SPI0_CSN
PWRAP_SPI0_CLK
PWRAP_SPI0_MI
PWRAP_SPI0_MO
PWRAP_EVENT

JTCK
JTDO
JTRST_B
JTDI
JRTCK
JTMS

RCLK0
RCLK0_
RCLK1
RCLK1_

<6>
<6>

/EWR <6>
/ERAS <6>
/ECAS <6>
ECKE <6>

1

AD28
AE27
AC27
AB27
R26

USB_VRT

TESTMODE
FSOURCE_P
WATCHDOG

RDQS0
RDQS1
RDQS2
RDQS3
RDQS0_
RDQS1_
RDQS2_
RDQS3_

RCS0_R
RCS1_R

E16
C14
B15
E13

1

@ PAD TP1358

2

U24
U28
T25
U29
U25
V26

SYSRST_B

AJ21
E5
P26
AF22
P29

1

R28

MSDC0_DAT7
MSDC0_DAT6
MSDC0_DAT5
MSDC0_DAT4
MSDC0_DAT3
MSDC0_DAT2
MSDC0_DAT1
MSDC0_DAT0
MSDC0_CLK
MSDC0_CMD
MSDC0_RSTB

R201
5.11K +-1% 0402
1

MCU_JTCK
MCU_JTDO
MCU_JTRST_B
MCU_JTDI
MCU_JRTCK
MCU_JTMS

R29

D26
B27
A27
A25
D25
B25
C26
B26
C27
A28
E25

2

WATCHDOG_B

<11>
<11>
<11>
<11>
<11>
<11>

RDQM0
RDQM1
RDQM2
RDQM3

F12
E14

U201E
SYSRSTB

VDD28_NML2

EXT_CLK_EN
SRCLKENAI
SRCLKENA
SRCLKENA2
SRCVOLTEN

MSDC1_DAT3
MSDC1_DAT2
MSDC1_DAT1
MSDC1_DAT0
MSDC1_CLK
MSDC1_CMD
MSDC1_SDWPI
MSDC1_INSI

B

<23>

VDD28_NML2

T5
V2
T4
V1
U2
U5
U6
Y2

Close to MT6583

VDD28_NML2

RTC32K_CK

MSDC2_DAT3
MSDC2_DAT2
MSDC2_DAT1
MSDC2_DAT0
MSDC2_CLK
MSDC2_CMD
MSDC2_SDWPI
MSDC2_INSI

L25
D24

CLK26M1
CLK26M2

W5
W2
Y4
V4
W3
W4
V5
Y3

RTC32K1V8

MSDC3_DAT3
MSDC3_DAT2
MSDC3_DAT1
MSDC3_DAT0
MSDC3_CLK
MSDC3_CMD

AJ19
AJ14
P25

<23,7>

CABC_ENABLE0

MB_ID1

D3
D4
B4
A4
C4
D5

<21> URXD1
<21> UTXD1

12P_0402_50V8

URXD1
UTXD1

<10>

RCS_
RCS1_
RWE_
RRAS_
RCAS_
RCKE

RBA2
RBA1
RBA0
RA14
RA13
RA12
RA11
RA10
RA9
NRNB
RA8
NCLE
RA7
NALE
RA6
NWEB
RA5
NREB
RA4
NCEB0
RA3
NCEB1
RA2
RA1
TP_MEMPLL
RA0
TN_MEMPLL

E17

ERESET_

CABC_ENABLE1

GPIO_0

EMC@
1
2 SYSCLK1
R634 0_0402_5%

CLK1_BB_R2

<6>

C1611
GPIO_SUB_CMPDN

GPIO_1
GPIO_2

U201C

<7>

<14,5>
<14,5>
<10,5>
<10,5>
<7>
0509 Change
<7>
<12,5>
<12,5>

VREF
VREF

C15
C12
B14
D12
D17
B13
F16
D14
F17
F18
C17
E18
C16
A13
A15
D13
E12
E11

EBA2
EBA1
EBA0
EA14
EA13
EA12
EA11
EA10
EA9
EA8
EA7
EA6
EA5
EA4
EA3
EA2
EA1
EA0

URXD2
UTXD2

<11> URXD2
<11> UTXD2


Connect to VGP6 (2v0) : w/i EFUSE program
Connect to GND
: w/o EFUSE program

EA[0..14]

TP1366PAD @

<9> URXD3
<9> UTXD3


Connect to VIO18 : Enter Test Mode
Connect to GND
: Normal mode

<6>
<6>
<6>

RDQ31
RDQ30
RDQ29
RDQ28
RDQ27
RDQ26
RDQ25
RDQ24
RDQ23
RDQ22
RDQ21
RDQ20
RDQ19
RDQ18
RDQ17
RDQ16
RDQ15
RDQ14
RDQ13
RDQ12
RDQ11
RDQ10
RDQ9
RDQ8
RDQ7
RDQ6
RDQ5
RDQ4
RDQ3
RDQ2
RDQ1
RDQ0

H14
H18

EVREF

Power by CTP

A

C11
C7
B12
B5
B11
A5
A12
C6
D8
C10
B7
D10
D6
A9
B8
B9
C23
B17
A24
B18
C22
D19
B24
A17
B20
C20
D21
C19
B21
D23
A20
B22

ED31
ED30
ED29
ED28
ED27
ED26
ED25
ED24
ED23
ED22
ED21
ED20
ED19
ED18
ED17
ED16
ED15
ED14
ED13
ED12
ED11
ED10
ED9
ED8
ED7
ED6
ED5
ED4
ED3
ED2
ED1
ED0

DDR3VCCIO

VM0
VM1

2

<8>

AF21
AH23

BSI1A_CS0
BSI1A_CLK
BSI1A_DATA0
BSI1A_DATA1
BSI1A_DATA2

VBIAS
APC1
APC2
TXBPI1

AF28
AH29

D

@ PAD TP1370
BPI1_BUS4
@ PAD TP1371
@ PAD TP1372
BPI1_BUS7
BPI1_BUS8
BPI1_BUS9
BPI1_BUS10
BPI1_BUS11
BPI1_BUS12
BPI1_BUS13

4.7K_0402_5%

1
2

R1523
@

10K_0201_5%

1

SCL0
SDA0

R1521
NH520@

BPI1_BUS0
BPI1_BUS1
BPI1_BUS2

2

DL_I_P2
DL_I_N2
DL_Q_P2
DL_Q_N2

AJ24
AG26
AJ27
AH28
AF27
AG28
AF26
AJ25
AG27
AH26
AH24
AF24
AJ28
AH25
AE26
AH27
AE24

MIPI function only

DL_I_P1
DL_I_N1
DL_Q_P1
DL_Q_N1

DVDD28_BSI

4.7K_0402_5%

1
2

AG18
AG20
AG19
AH20

WG_GGE_PA_VRAMP
TP1359PAD @
DCOC_Flag

R212

Power by CAM_IO

4.7K_0402_5%
2
1

<14,5>
<14,5>

100K_0201_5%

GPIO_2

1

UL_I_P2
UL_I_N2
UL_Q_P2
UL_Q_N2

BPI1_BUS0
BPI1_BUS1
BPI1_BUS2
BPI1_BUS3
BPI1_BUS4
BPI1_BUS5
BPI1_BUS6
BPI1_BUS7
BPI1_BUS8
BPI1_BUS9
BPI1_BUS10
BPI1_BUS11
BPI1_BUS12
BPI1_BUS13
BPI1_BUS16
BPI1_BUS17
BPI1_BUS18

VDD18_6583

C

R1528
@

100K_0201_5%

GPIO_1

2

AG15
AG16
AF15
AF16

RXD_BBIP
RXD_BBIN
RXD_BBQP
RXD_BBQN

SCL1
SDA1

R219

R1526
@

100K_0201_5%

0.1U 10V +-10% X7R 0402

<10,5>
<10,5>

4.7K_0402_5%
2
1

C1754
18P_0402_50V8J
EMC@ 1

R210

R1524
@

GPIO_0

1

AJ16
AH16
AH18
AH17

RX_IP
RX_IN
RX_QP
RX_QN

0531 Change BOM for MTK

UL_I_P1
UL_I_N1
UL_Q_P1
UL_Q_N1

VGP2_PMU

2

VDD18_6583

1 2

R218
4.7K_0402_5%

1
2

4.7K_0402_5%
2
1

SCL2
SDA2

100K_0201_5%

2
AG13
AG14
AF14
AF13

VDD18_6583

R217

VDD18_6583

1

U201A
AF18
AF17
AF19
AF20

TX_IP
TX_IN
TX_QP
TX_QN

SCL3
SDA3

DVDD28_BPI

1
2

1

<12,5>
<12,5>

R1522
@

10K_0201_5%
MB_ID1

R208
4.7K_0402_5%

D

4.7K_0402_5%
2

R207

R1520
GLONASS@

MB_ID0

0530 Update u201 pcb footprint for layout nc -p

1

1

VDD18_6583

VDD18_6583

2

VDD18_6583

2

VDD18_6583

1

4

2

5

3

2

Title
Size
D

MT8377 - Baseband
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Thursday, August 08, 2013

Date:
1

Sheet

5

of

28

5

4

3

2

1

ZZZ

EVREF
1

1

C69
0.1U 10V +-10% X7R 0402

EA0
EA1
EA2
EA3
EA4
EA5
EA6
EA7
EA8
EA9
EA10
EA11
EA12
EA13
EA14

2

EVREF
1

C65
0.1U 10V +-10% X7R 0402

2

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

EDCLK

VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

ED20
ED19
ED22
ED23
ED18
ED21
ED16
ED17

D7
C3
C8
C2
A7
A2
B8
A3

ED30
ED29
ED28
ED25
ED24
ED31
ED26
ED27

<5> EDCLK
<5> EDCLK_B

J7
K7
K9

ECKE

K1
L2
J3
K3
L3

RODT1_R
RCS0_R
/ERAS
/ECAS
/EWR

F3
C7

<5>
<5>

EDQS0
EDQS1

<5>
<5>

EDQM0
EDQM1

<5>
<5>

/EDQS0
/EDQS1

BA0
BA1
BA2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQSL
DQSU

100_0201_5%

NAN 256Mx16@
X76521BOL01
ALT. GROUP PARTS NANYA 1G ZEJ00

R525

ZZZ

DDR3L

2

M8
H1

1

ED8
ED13
ED14
ED15
ED10
ED9
ED12
ED11

EVREF

EVREF

EDCLK_B

EDCLK1
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DDR3VCCIO
M2
N8
M3

EBA0
EBA1
EBA2

HYN 256Mx16@
X76521BOL02
ALT. GROUP PARTS HYNIX 1G ZEJ00

DDR3L

E7
D3
G3
B7

T2

ERESET_
1

L8

DML
DMU

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQSL
DQSU

RESET
ZQ/ZQ0

R526
0605 Change bom X76 Part number
EDCLK1_B

DDR3VCCIO

B2
D9
G7
K2
K8
N1
N9
R1
R9

EBA0
EBA1
EBA2

A1
A8
C1
C9
D2
E9
F1
H2
H9

<5>
<5>

EDQS2
EDQS3

<5>
<5>

EDQM2
EDQM3

<5>
<5>

/EDQS2
/EDQS3

M2
N8
M3

ECKE

J7
K7
K9

RODT2_R
RCS1_R
/ERAS
/ECAS
/EWR

K1
L2
J3
K3
L3

<5> EDCLK1
<5> EDCLK1_B

F3
C7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

E7
D3
G3
B7

ERESET_

2

J1
L1
J9
L9

EBA1
/EWR
ECKE
EBA0
ERESET_
EBA2
/ERAS
/ECAS

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

T2
L8

R71

240_0201_1%

B1
B9
D1
D8
E2
E8
F9
G1
G9

J1
L1
J9
L9

240_0201_1%

96-BALL
SDRAM DDR3
H5TC4G63MFR-PBA 96P
@

BA0
BA1
BA2

CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU

RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

Vendor
NANYA-1G
HYNIX-1G

X76 level

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

U6

@

NANYA-1G

@

SA00006UM10

SA00006UM10

256M16 NT5CC256M16BP-DI

256M16 NT5CC256M16BP-DI
C

U5

U6

@

HYNIX-1G

@

SA00005AV50

SA00005AV50

256M16/1600 H5TC4G63AFR-PBA

256M16/1600 H5TC4G63AFR-PBA

B1
B9
D1
D8
E2
E8
F9
G1
G9

DDR3VCCIO
1

1

2

2

@ R73
1K_0201_1%
RODT2_R

<5>

RCS1_R
R70
@
1K_0402_1%

2

R72
1K_0201_1%
2

R76
1K_0201_1%
2

RCS1_R

1

1

RODT1_R

@

1

RCS0_R

RCS0_R

R77
@
1K_0402_1%

U5 Test Point

B

1

C70

2

DDR3VCCIO

2

C58

0.1U 6.3V K X5R 0201

1

2

1

1

C63

1

DDR3VCCIO
C72

1

2

DDR3VCCIO
C75

1

2

1

0.1U 10V +-10% X7R 0402
2

C1619

DDR3VCCIO
1

DDR3VCCIO
1

C1630

PAD @
PAD @
PAD @

TP06

PAD @

TP13

PAD @

TP18

PAD @

2

2.2U_0402_6.3VM

2

2.2U_0402_6.3VM

DDR3VCCIO
C54

1

2

DDR3VCCIO
C68

1

2

DDR3VCCIO
C59

DDR3VCCIO
1

2

C1620
2.2U_0402_6.3VM

DDR3VCCIO
1

2

C1626
2.2U_0402_6.3VM

DDR3VCCIO

1

1

2

2

C1627

DDR3VCCIO

1

2

2.2U_0402_6.3VM
0.1U 10V +-10% X7R 0402

EBA1

2

1

2

DDR3VCCIO
1

C1629
2.2U_0402_6.3VM

DDR3VCCIO
1

2

1

C1632
2.2U_0402_6.3VM

DDR3VCCIO
1

2

C1633

C57

2.2U_0402_6.3VM

2

DDR3VCCIO

C1636

C76

2.2U_0402_6.3VM

0.1U 6.3V K X5R 0201

DDR3VCCIO
1

C1631

1

2

DDR3VCCIO

C77

ED15

0606 DEL 4 PCS TEST POINT

U6 Test Point
DDR3VCCIO

1

1

2

2

DDR3VCCIO

C1635

EA9

C1669
2.2U_0402_6.3VM

TP19
TP20
TP21

PAD @
PAD @
PAD @

TP23

PAD @

TP34
TP35
TP36

PAD @
PAD @
PAD @

/ERAS
/ECAS
/EWR
EBA0

DDR3VCCIO

1

1

2

2

C1668
A

2.2U_0402_6.3VM

2

2.2U_0402_6.3VM

2

2.2U_0402_6.3VM

0.1U 6.3V K X5R 0201

2.2U_0402_6.3VM
ED21
ED30
ED31

DDR3VCCIO
1

2

Issued Date

2.2U_0402_6.3VM

Compal Electronics, Inc.

Compal Secret Data

Security Classification

C1617

2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

5

B

/ERAS
/ECAS
/EWR

DDR3VCCIO

C1634

DDR3VCCIO

2

DDR3VCCIO

1

TP01
TP02
TP03

C78

0.1U 10V +-10% X7R 0402
2
2
0.1U 10V +-10% X7R 0402

DDR3VCCIO
C64

DDR3VCCIO

C74

0.1U 6.3V K X5R 0201

0.1U 10V +-10% X7R 0402

1

1

2

0.1U 6.3V K X5R 0201

C62

DDR3VCCIO
0.1U 6.3V K X5R 0201

DDR3VCCIO

DDR3VCCIO
C67

0.1U 6.3V K X5R 0201

2

DDR3VCCIO

0.1U 6.3V K X5R 0201

0.1U 10V +-10% X7R 0402
2

1

DDR3VCCIO

C73

A

C60

0.1U 6.3V K X5R 0201

2

1

0.1U 6.3V K X5R 0201

0.1U 10V +-10% X7R 0402
EA0
EA1
EA2
EA3
EA4
EA5
EA6
EA7
EA8
EA9
EA10
EA11
EA12
EA13
EA14

C56

0.1U 6.3V K X5R 0201

EA[0..14]

0.1U 6.3V K X5R 0201

<5>

DDR3VCCIO

1

0.1U 6.3V K X5R 0201

DDR3VCCIO

C71

NAN 256Mx16@
HYN 256Mx16@

DDR3L
R75
0_0201_5%

DDR3VCCIO

BOM structure

X76521BOL01
X76521BOL02

A1
A8
C1
C9
D2
E9
F1
H2
H9

96-BALL
SDRAM DDR3
H5TC4G63MFR-PBA 96P
@

DDR3VCCIO

DDR3L

<5>

D

100_0201_5%

U5

R65

<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>

D7
C3
C8
C2
A7
A2
B8
A3

<5,6>

1

ED[0..31]

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

ED3
ED6
ED2
ED5
ED1
ED4
ED0
ED7

2

<5>

2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

E3
F7
F2
F8
H3
H8
G2
H7

1

C

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

EA0
EA1
EA2
EA3
EA4
EA5
EA6
EA7
EA8
EA9
EA10
EA11
EA12
EA13
EA14

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

2

ED0
ED1
ED2
ED3
ED4
ED5
ED6
ED7
ED8
ED9
ED10
ED11
ED12
ED13
ED14
ED15
ED16
ED17
ED18
ED19
ED20
ED21
ED22
ED23
ED24
ED25
ED26
ED27
ED28
ED29
ED30
ED31

0.1U 6.3V K X5R 0201

C66

1

U6

VREFCA
VREFDQ

2

0.1U 6.3V K X5R 0201

C61

D

M8
H1

EVREF

EVREF

1

U5
<5,6>

4

3

2

Memory (DDR3)
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

6

of

28

5

4

3

2

1

NEED CHECK DEL OR NOT?

VGP6_PMU for LCM 3.3V

LCM_DIMO_R
CABC_ENABLE1 <5>
CABC_ENABLE0 <5>
LVDS_SHUTDOWN_N

Differential Signal !
No Through Hole !
100 ohm - Impedance

0526 Change net name
L3502
VGP1_PMU

VCD_VDD

HDMI_DAT2_P

1

HDMI_DAT2_M

4

DLP11TB800UL2L_4P
2

JP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HTPLG

4

1

L3507

LCM_RIN1+_C

1

LCM_RIN2-_C

4

DLP11TB800UL2L_4P

EMC@

HDMI_DAT1_P

4

3

HDMI_DAT1_M_C
HDMI_DAT0_P_C

HDMI_DAT1_M

1

2

HDMI_DAT0_M_C
HDMI_CK_P_C

HDMI_DAT0_P

1

HDMI_DAT0_M

4

3LCM_RIN1L3501

2LCM_RIN1+

0527 ADD GND FOR Dummy pin
L3505
LCM_RIN0-_C
LCM_RIN0+_C
LCM_RIN1-_C
LCM_RIN1+_C

3LCM_RIN2-

1

LCM_RIN2+_C

LCM_CLKIN-_C

4

LCM_CLKIN+_C

1

L3503

DLP11TB800UL2L_4P

3

3LCM_CLKIN-

C4224
HDMI_CK_P

4

HDMI_CK_M

1

2LCM_CLKIN+
L3508

DLP11TB800UL2L_4P

C4225

2

10U_0603_25V6M

DLP11TB800UL2L_4P

EMC@
5/24 swap for layout
HTPLG
2

+LEDVDD

LED_Signal_EN_R

U1B

L2
M4

MT8193_AVDD28
3.3V_R
VAST_PMU_R

P2
R1
N3

3.3V_R
VAST_PMU_R

R10
R2
N6
M8
M7
R11

3.3V_R

J12

MT8193_DVDDIO18_DPI
MT8193_DVDDIO18_2
MT8193_DVDDIO18_1

A8
A13

1 R5219 2
0_0201_5%

N13

3.3V

AVDD33_HDMI
AVDD12_HDMI_C
AVDD12_HDMI_D
AVSS12_HDMI
AVSS12_HDMI
AVSS12_HDMI

power domain

C1
K3
L1
F4
H3
K4

MT8193_AVDD33_HDMI
VAST_PMU_R
VAST_PMU_R

DVDDIO33_18_NFI

AVDD28
AVSS28
AVDD33_PLLGP
AVDD12_VPLL
AVSS12_VPLL
AVDD33_LVDSA
AVDD12_LVDSA
AVSS12_LVDSA
AVSS12_LVDSA
AVSS12_LVDSA
DVDDIO33_DGO
DVDDIO18_33_DPI
DVDDIO18_33
DVDDIO18_33
EFUSE

DVDD12_1
DVDD12_2
DVDD12_2
DVDD12_2
DVDD12_2
DVDD12_3
DVDD12_4
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12
DVSS12

E4
E7
E8
F8
G8
H10
J9
B7
G5
G6
G7
G9
G12
F5
H7
H8
H9
H11
H12
J6
J7
J8
J11
K6
K7
K8
K9
P10

VAST_PMU_R

0605 Change R5218 P/N FOR LOAD BOM
R5218

1

2

2.49K_0402_1%
HDMI_CK_M
HDMI_CK_P
HDMI_DAT0_M
HDMI_DAT0_P
HDMI_DAT1_M
HDMI_DAT1_P
HDMI_DAT2_M
HDMI_DAT2_P

MT8193

S

D

3

MT8193_AVDD33_HDMI
D815

2
G

3.3V
@
1 R5221 2
47K +-5% 0402

1 R5230 2
47K +-5% 0402
0530 add R5230 and NC R5221 FOR MTK

1

VDD18_6583

D

3

B

S

2
G

1
2
R5225 2
27K +-1% 0402

0521 Change P to 0201

0730 change R5227 bom structure
for MTK recommend
QL1
BSS138W-7-F_SOT323-3

P15
R14
R15
P14

HDMI_HPD
DDC_SD
DDC_SC
HDMI_CEC

0604 Change D815 for ME

3.3V

D1
F2
F1
F3
G3
H1
H2
H4
J4

2

0521 ADD
VDD18_6583

CK_SEL
EN_BB
RESET_N
control
INT
RTC_32K_CK
SCL
SDA

NFI_CPU

C8
D6
D8
D7
A7
E11
E12

R5197
R5193
R5191
R5190
R5187

2
2
2
2
2

1
1
1
1
1

0_0402
0_0402
0_0402
0_0402
0_0402

<5>

MT8193
BGA-150
DPI0

NFRBN
NFCLE
NFALE
NFWEN
NFREN
NFCEN
NFD7
NFD6
NFD5
NFD4
NFD3
NFD2
NFD1
NFD0

DPI0D0
DPI0D1
DPI0D2
DPI0D3
DPI0D4
DPI0D5
DPI0D6
DPI0D7
DPI0D8
DPI0D9
DPI0D10
DPI0D11
DPI0VSYNC
DPI0HSYNC
DPI0CK

A14
C13
B14
D13
B15
A15
C14
E13
E15
E14
G14
F13
H14
G13
H15

DPI_B0
DPI_B1
DPI_B2
DPI_B3
DPI_B4
DPI_B5
DPI_B6
DPI_B7
DPI_G0
DPI_G1
DPI_G2
DPI_G3
DPI_VSYNC
DPI_HSYNC
RGB_CK

HDMI_EXT_RES
CLK_M
CLK_P
CH0_M
CH0_P
CH1_M
HDMI
CH1_P
(analog)
CH2_M
CH2_P

DPI1D0
DPI1D1
DPI1D2
DPI1D3
DPI1D4
DPI1D5
DPI1D6
DPI1D7
DPI1CK

J13
J14
J15
K13
L15
L14
M14
N14
N15

DPI_R0
DPI_R1
DPI_R2
DPI_R3
DPI_R4
DPI_R5
DPI_R6
DPI_R7
DPI1_CLK

I2S

2

LED_Signal_EN_R

BSS138W-7-F_SOT323-3

VEMC_3V3_PMU

1 R5205

2

0_0603_5% -35mil
5V_DDC
R5170

DDC_SC1 R5172 2
0_0201_5%

HDMI_SC

HDMI_SC
HDMI_SD

5V_DDC
R5177

1
1
1

M12 R5220
L13 R5222
L12 R5223

1

Q2

3.3V

0521 Change R to 0201
I2S_BCK
I2S_LRCK
I2S_DATA

C

3

LED_Signal_EN

NFI_NAND

DPI1

05/20 ADD R1754
R1756
10K_0402_5%

R214
100K_0402_5%

SRCLKENA <23,5>
SRCVOLTEN <23,5>
SYSRST_B <11,15,23,5>
MT8193_INT <5>
RTC32K1V8 <23,5>
SCL2 <5>
SDA2 <5>

1

NLD0
NLD1
NLD2
NLD3
NLD4
NLD5
NLD6
NLD7
NREB
NWEB
NALE
NCLE
NRNB

LCM_VDD

VDD18_6583

16V rating

2 0_0201_5%
2 0_0201_5%
2 0_0201_5%

I2S0_CK <5>
I2S0_WS <5>
I2S0_DAT_OUT

R5182
2 HDMI_SD
DDC_SD1
0_0201_5%

D814
TVNST52302AB0 SOT523
@

<5>


AO3413_SOT23-3

Q26
1

B6
C5
B5
A5
C4
B3
A2
B2
A1
B1
C2
D4
C3
D5

0530 Update u1 pcb footprint for layout nc -p

2

D

A3

3.3V_R

D812
TVNST52302AB0 SOT523
@

1

S

B9
D9
B10
C9
A10
D10
B11
D11
A11
D12
B12
C12
B13

C4229
0.1U_0402_25V4Z

2

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

C4226
C4227
1U 6.3V K X5R 04021U 6.3V K X5R 0402
2

G

C

1
1
1
1
1
1
1

1

1

VTCXO_1_PMU
VTCXO_2_PMU

U1A
C4234 2
C4235 2
C4236 2
C4237 2
C4238 2
C4239 2
C4240 2

VBAT

2

1

1 R5178 2
0_0402_5% -22mil
VAST_PMU_R

4

1

2

C4233 1

2

2 0_0201_5%
2 0_0201_5%
2 0_0201_5%

HDMI_HPD
2 R5165

2

1
1
1

0521 Change P to 0201
2
2 0_0201_5%
MT8193_AVDD28 R5175 1
1 0_0201_5%
0.1U_0402_25V4Z
R5176 2
@

C+

0_0402_5% -22mil

5

3

20.1U_0402_25V4Z MT8193_DVDDIO18_1 R5171
20.1U_0402_25V4Z MT8193_DVDDIO18_2 R5173
20.1U_0402_25V4Z MT8193_DVDDIO18_DPI
R5174

VAST_PMU

VIN
VOUT

7
6

1

2

C4230 1
C4231 1
C4232 1

C1755
18P_0402_50V8J
1 EMC@

1U 6.3V K X5R 0402

1

2
C4219

2

2 0_0201_5%

C4228
1U_0603_10V6K

1

TP
C-

GND

3

5V_DDC
VDD18_6583

DEL R FOR Layout 0521

1

SHDN

2

R5169

R5183
10K_0402_5%

1

GPIO_HDMI_POWER_EN

3

1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z

1

U4030

3.3V
C4241 2
MT8193_AVDD33_HDMI C4242 2
C4243 2
C4244 2
C4245 2

1

2 0_0402_5%

1

1 R5194
@

0_0402
R5162

need check GPIO_HDMI_POWER_EN

0_0402_5% -22mil
1 R5192 2

3.3V_R

3.3V

1

D

CONN@
1

2
L3504

EMC@
5/22 ADD L for RF require

2 R5154 1 LCD_PWM_R
0_0402

20
21
22
23

3
0.1U_0402_25V4Z

LED_ID1
LED_ID2

LCM_VDD

2

0_0402_5% -22mil
1 R5150 2

EMC@

EMC@

<5>

R5179
10K_0402_5%

HDMI_SC
HDMI_SD
HDMI_VCC

HP_DET
Utility
D2+
D2_Shield
D2D1+
D1_Shield
D1GND0
D0+
GND1
D0_ShieldGND2
D0GND3
CK+
CK_Shield
CKCEC
DDC/CEC_GND
SCL
SDA
+5V

5V_DDC

LCM_CLKIN-_C
LCM_CLKIN+_C

NEED CHECK LCM_EL_EN

LED_ID1
LED_ID2

HDMI_CK_M_C
HDMI_CEC

DLP11TB800UL2L_4P
2

2LCM_RIN2+
L3506

LCM_RIN2-_C
LCM_RIN2+_C

DLP11TB800UL2L_4P

EMC@

DLP11TB800UL2L_4P

EMC@

1

G1
G2
G3
G4

LCM_RIN1-_C

EMC@

2

31
32
33
34

LCM_VDD

2LCM_RIN0+

1.8K +-1% 0402

D

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1

HDMI_DAT2_M_C
HDMI_DAT1_P_C

1.8K +-1% 0402
2
1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1

JP8

R5132
0_0402_5% -22mil LCM_RIN0+_C

3

1

R5131 @
0_0402_5%

3LCM_RIN0-

2

need check vcom 0513

2

2

HDMI_DAT2_P_C
4

LCM_RIN0-_C

1

RB551V-30_SOD323-2
@
1 R5227 2 100_0201_5%
LCM_RIN0LCM_RIN0+
LCM_RIN1LCM_RIN1+
LCM_RIN2LCM_RIN2+
LCM_CLKINLCM_CLKIN+
LCM_RIN3LCM_RIN3+

P3
P4
R4
N4
N5
P6
R6
N7
N8
R8
P8

HTPLG
HDMI
HDMISD (digital)
HDMISCK
CEC

TP_VPLL
AO0N
AO0P
AO1N
AO1P
AO2N
AO2P
AOCK0N
AOCK0P
AO3N
AO3P

DCXO

LVDS

XTALI
XTALO
CLKBUF1
CLKBUF2
CLKBUF3

G0
B5
B4
B3
B2
B1
B0
VCLK
HSYNC
VSYNC

RGB

N1
N2
L4
L5
M3

MT8193_CLKBUF_1
MT8193_CLKBUF_2
MT8193_CLKBUF_3

0521 Change P to 0201

<5>

1 R5226

CLK1_BB_R2

X605

L10
K11
M10
N10
L11
P11
R13
N11
P13
N12

3

OUT

GND

GND

IN

4

<9>

2

CLK2_WCN_R

2 0_0201_5%

C4248
1

MT8193_CLKBUF_1

B

MT8193_CLKBUF_2

1000P_0402_50V7K
2

1

<24>

1

R5228

SYSCLK_PMU

2 0_0402

MT8193_CLKBUF_3

26MHZ_7.3PF_TZ1689A

0605 Change Q26 QL1 P/N FOR LOAD BOM
0605 DEL R5224

0527 ADD R5229 FOR power consumption measure

@
1

2

0604 Change U8.3 to U8.4

EN(/EN)
GND

C2650

G527ATP1U_TSOT23-6

R1646
100K_0402_5%

R1663

2 0_0402_5%

DPI1_CLK

1 EMC@

2 0_0201_5%

RGB_CK

C2651

1

2

<5>

1
R151

LCD_PWM

2
1K_0402_1%

0627 update u8 and ADD R1656 R1663

5/23 ADD FOR RF
2

DPI_G0
DPI_G1
DPI_G2
DPI_G3
DPI_G4
DPI_G5
DPI_G6
DPI_G7

0704
0704

1

C1615

@ C1748
33P 50V J NPO 0402

3.3V

2.2U_0603_10V6K

2
LED_EN

2

1

0_0402_5%
@
R1638
100K_0402_5%

3

R387
IN
OUT
SHDN

SET

1

5

2
A

GND
4

NCT3705U-33_SOT23-5

0_0603_5%

C1685
2
1
3300P_0402_50V7K

C1616

4.7U_0603_6.3V6K
2

<5>

VCD_VDD

U21
1

TP1394
TP1395
TP1397
TP1300

2
LCD_PWM_R
33_0402_5%

@

R415
@ PAD
@ PAD
@ PAD
@ PAD

1
R205

2
0_0402_5%

R1642

Change C2650 FOR ME
Change U8

1

TP1393

2

@ PAD

6
4
2

VBAT

0605 DEL U8 FOR LOAD BOM
5/22 ADD backlight circuit

1
R5147

VCCA VCCB
A
B
DIR
GND

SN74AVC1T45DCKR_SC70-6
SA000029A00

1

<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>

R5145 1 EMC@

1

5
2

2

FLAG SET

1
3
5

2

A

0526 Change net name

U87

1

1

3
4

LCM_BL_EN

OUT

+LEDVDD

1

<5>

IN

2

DPI_PCLK
DPI_DE
DPI_VSYNC
DPI_HSYNC

2
1
@ R1656 100K_0402_5%
1

1

DPI1_CK

<5>
<5>
<5>
<5>

6

2
<5>

1 R5229 2
0_0402

W=60mils

0.1U_0402_25V6

DPI_R0
DPI_R1
DPI_R2
DPI_R3
DPI_R4
DPI_R5
DPI_R6
DPI_R7

LCM_VDD
VDD18_6583

U8

30K_0402_1%

<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>

Backlight

2
0_0603_5%

R1662
VBAT

10U_0603_25V6M

DPI_B0
DPI_B1
DPI_B2
DPI_B3
DPI_B4
DPI_B5
DPI_B6
DPI_B7

C605
1U_0402_6.3V6K

<5>
<5>
<5>
<5>
<5>
<5>
<5>
<5>

0605 Change U21 PN for LOAD BOM
0605 ADD C1685 DEL R1685
0704 change C1616 and c1685

0606 update R1638 TO @
0613 update R1638
5/22 ADD 3.3v circuit

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Title

LCD

Size
D

Document Number

Date:

Rev
0.2

ZEJ00 -LA-A791P
Thursday, August 08, 2013

1

Sheet

7

of

23

5

4

3

2

1

Earphone RECEIVER
<5>

EINT_HP

VDD18_6583

close to connector
1

close to IC

R1690

<12>

AU_HPL_R
C1701
100P_0402_50V8J

<12>

1

1

2

C1700
33P 50V J NPO 0402
2 HP_MP3L

2

2

2

R1695

1
C1703
33P 50V J NPO 0402

2 R1692
1
0_0603_5% -35mil

1

2

AU_HPR_R

R1691
1
33_0402_5%

1

1
33_0402_5%

2 R1696
1
0_0603_5% -35mil

D

470K_0402_5%
0704

C1702

EMC@

HP_MP3R

1

L843

R1694

100P_0402_50V8J

1
2
47K +-5% 0402

1

EMC@
L845
L846
EMC@

R1693
0_0402_5% -22mil
2
AUDJACK_GND 1
FBMA-L11-160808-700LMT_2P
2
AUDJACK_L
EMC@ FBMA-L11-160808-700LMT_2P
1
2
ADDJACK_DET_R
2 FBMA-L11-160808-700LMT_2P
AUDJACK_R
2 FBMA-L11-160808-700LMT_2P
AUDJACK_MIC

AUDJACK_GND_R
0605 Update JP2 PCB Footprint

L844
1
1

C1704
33P 50V J NPO 0402
2

2

add c6 for EMI

1

JP2
1
4
2

AUDJACK_MIC
AUDJACK_GND_R
AUDJACK_L

EMC@
C6 680P_0402_50V7K

2
1000P_0402_50V7K

1

2 C1705 EMC@

1000P_0402_50V7K

1

2 C1706 EMC@

1000P_0402_50V7K

1

2 C1707 EMC@

Microphone: 6k~13k Ohm
TV: 75 Ohm

3
5

AUDJACK_R
ADDJACK_DET_R

HP_MIC
3

2

C55

<12>
1

2

1

1

D2
EMC@
TVNST52302AB0 SOT523

1

1

@
R2
0_0402_5%

2

2

3

2

ADDJACK_DET_R
@
R1
0_0402_5%

D1
EMC@
TVNST52302AB0 SOT523

0.1U 6.3V K X5R 0201

C1699
33P 50V J NPO 0402

2

D

CONN@
ADD C55 FOR EMI 0807

2

EMC@
L847
FBMA-L11-160808-700LMT_2P
EMC@

C

VDD18_6583

VEMC_3V3_PMU

1

Single via to GND plane
R213
100K_0402_5%

2

VDD18_6583

1

@

05/20 ADD R1754
R1754
10K_0402_5%

G

2

2

@

1

C

need check POUT

POUT

1
2
3
4

1
2
3
4

Q1
2
G1
G2

5
6

POUT

D

JP16
VEMC_3V3_PMU

@
1

3

POUT_1

S

<5>

P-SENSOR CNN

BSS138W-7-F_SOT323-3

1
R8
0_0402_5%

0603 ADD R8
0605 DEL PAD and H1 GND
0606 update H1 PCB Footprint
H1
HOLEA

LTE@

ACES_88460-0401

LTE@
1

0605 Change P/N FOR LOAD BOM
U2
R4
0_0402

1

1
2
3

POUT_R
CTRL

05/20 ADD R1755

6
5
4

C2

2

LTE@
1
R6
0_0402_5%

CAP
2
R7
0_0402

1

VEMC_3V3_PMU

2

LTE@

C4

2

1

1

2

LTE@

B

D3
LTE@
TVNST52302AB0 SOT523

C5

0528 add d3 for EMI

LTE@

2

LTE@

1

1U_0402_6.3V4Z

1

C3

100P_0402_50V8J

1

2

1U_0402_6.3V4Z

R1755
10K_0402_5%

100P_0402_50V8J

MICBIAS1

LTE@

CX
VDDHI
VREG

IQS1280000EBTSR TSOT23 6P
LTE@

2

B

OUT
VSS
CTRL

2

2

1

Earphone MICPHONE

POUT

C1
2P_0402_50V8C

@

R5 LTE@
470_0402_5%
2
1
+3VS_P
P_VREG

3

Pull high R move to MB

1

2

ME@

Close to BB

1K_0402_1%
R1699

Close to MIC

1

AU_VIN1_N

2

AU_VIN1_N1
2

<24>

1

C1708

1

C1711
100P_0402_50V8J

C1713
<24>

1

AU_VIN1_P

C1710
1 33P 50V J NPO 0402 2

GND of C1709(10uF) and headset
should tie together and single via
to GND plane

Close to JP2

1.5K_0402_1%
R1700

<24>

1

0.1U 10V +-10% X7R 0402

C1709
1
2
10U_0603_6.3V6M

2
1K_0402_1%

ACCDET

1 R1701

1

2
C1712
33P 50V J NPO 0402

HP_MIC

tie together and single via to GND plane

1

2

2

HP_MIC
2

A

C1714 @
0.1U_0402_25V4Z
A

0.1U 10V +-10% X7R 0402
releate to MIC Detect

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

5

4

3

2

Audio,I/O,Audio board Conn.
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

8

of

28

4

3

2

GLONASS_RF

2

<21>

1

3
D

GND1
SIG
GND2

1

50 Ohm

C1715 1

50 Ohm

0_0402_5%

1

1

C1718
@
0.1U_0402_10V7K
2

2

2

3

50 Ohm

18P_0402_50V8J

OUT

IN

1

EMC@
C1716
1
2

50 Ohm

RFBPF2012080AM0T62_3P
EMC@
0530 UPDATE U819 FOR RF
0604 UPDATE U819 FOR RF

C1719
@
0.1U_0402_10V7K

2
50 Ohm

3

WIFI_BT_ANT

GND1
SIG
GND2

0605 Change bom structure

1

18P_0402_50V8J
IPEX_20279-001E-01
CONN@

NH520_EMC@
U820
C1717 1

2

4

50 Ohm

NH520_EMC@
1
Input

Output

U822

D

SAFEB1G57KB0F00R14_5

U822

PK29S004M00

PK29S004R00

AW-NH520(MT6228)

AW-NH520T(MT6628T)
GLONASS@
0530 ADD FOR WIFI Vendor
0_0402
R1708
1
2

C1722
1

C1730

OUT

Vcc

GND

GND

1

4
2

1000P_0402_50V7K
NH520@
2

1

1

2

Close to MT6620

C1735
1U_0402_6.3V6K

1

2

1

VRTC_6620

C1731
0.1U_0402_10V7K

U823
3

1U_0402_6.3V6K
1

0_0402
R1710

4.7U_0603_6.3V6K

NH520@
C1732
NH520@
2
1

2

change to SJ000004W00

1
20
17
21
19
18
16

SD1_DAT1_6620
SD1_DAT2_6620
SD1_DAT3_6620
SD1_CMD_6620
SD1_CLK_6620
SD1_DAT0_6620
0_0402
1 R1714
1
R1720
0_0402

<5> UTXD3
<5> URXD3

26MHZ_10PF_7L26002009
NH520@

C1728 2
1U_0402_6.3V6K

2
2

23
22

33

35

40

6
5

15

34

RTCCLK_O

RTCCLK

EEDI

ANTSEL3
ANTSEL2

DVDDIO_SD1

OSC_IN

DAIRST

3

<5>

OSC_EN_6620
C

42

GPIO_6628_GPS_SYNC

<5>

MT6620 module

SD1_DAT1
SD1_DAT2
SD1_DAT3
SD1_CMD
SD1_CLK
SD1_DAT0

BGF_INT_B
WIFI_INT_B
ALL_INT_B
GPS_ANT_P

UART1_URXD
UART1_UTXD

PCM1SYNC
PCM1IN
PCM1OUT
PCM1CLK
RF_I_CAL
AUX_REF

54

39
50
49
48
47
38
37

@ PAD TP1380
EINT_6628_BGF
<5>
EINT_6628_WIFI
<5>
ALL_INT_B
@ PAD TP1381
C1733
50 Ohm 1R1709
2
1
2
NH520_EMC@
6.8NH +-5% LQG15HS6N8J02D 0402 33P_0402_50V8J
PCM1SYNC_6620
NH520_EMC@
PCM1IN_6620
PCM1OUT_6620
PCM1CLK_6620
@
L850

Compal footptint

WIFI_BT_ANT

1

C1726
2
10
55

NH520_EMC@
2

FSOURCE

AW-NH520

TCXO_LDO
DVDDIO28
VRTC

AW-NH520
AWAVE_AW-NH520_60P

1

TLDO

0530 DEL TEST POINT FOR RF

0530 ADD R1714 AND R1720 FOR RF

OSC_EN

.033U 16V K X7R 0402
2
U824
6
5

RF_OUT

@ C1727
33P_0402_50V8J

1

2

SYNC -----> BPI_BUS8

4

C1729

<7>

Vcc

36
41
32

TLDO

SYSRST_B

GPS_SYNC
WF_PA_VDD
DVDDIO18
GND_SMPS

CLK2_WCN_R

6.8NH +-5% LQG15HS6N8J02D 0402
2
1

7
9
13

<21,23>

GLONASS@

I2S_DATA_IN
I2S_DATA_OUT
I2S_CLK
I2S_WS

4.7U_0603_6.3V6K
1

1
R635

43
46
44
45

4.7U_0603_6.3V6K
1

BUCKOUT
WF_PA_LDOOUT

FM_AUIN_R
FM_AUIN_L
FM_AUOUT_R
FM_AUOUT_L

12
8

C

PMU_EN
VBAT
LXB

FM_TX_OUT
FM_RX_N
FM_RX_P

4
14
11

VBAT_6620
LXB_6620

27
26
24
25

GPIO_6628_PMU_EN

2
2.2UH_LQM2HPN2R2MJ0L_1A_20%

29
30
31

<5>

1
L848

GND
GND
GND
GND
GND
GND
GND

EMC@

2
C1725

WiFi_ANT
BT_ANT

C1724

U822

1

change to SH00000RT00

60
59
58
57
56
52
28

@

VBAT
0_0603_5% -35mil
1 R1707 2

RTC32K2V8
@ PAD TP1391
2
0_0402_5%

OSC_IN_6620

C1723

2

2

RTCCLK_O

RF_IN

ENABLE

L849
C1734
1
2
2
1
3
GPS_RF
5.6NH_LQG15HS5N6S02D_5%
470P 50V J NPO 0402
NH520_EMC@
NH520_EMC@

Add offpage.1102.

GND

0.1U_0402_10V7K

2

0.1U_0402_10V7K

1

GND

EMC@

0_0402
R1713

@
@
PAD PAD
TP1384
TP1385

BGU7005_XSON6_1P45X1
NH520_EMC@
1

2

0530 ADD FOR WIFI Vendor

2

MT6620_1V8

53
51

NH520@

OSC_IN_6620

GPS_RF

18P_0402_50V8J

5
3
2

IPEX_20279-001E-01
CONN@

2

JP4_GPS

GND

2

EMC@

0613 change R1704 bom structure
R1704 Change bom structure to EMC@
NH520_EMC@
R1704
R1706
50 Ohm
50 Ohm
1
2
1
2
0_0402_5%
0_0402_5%
EMC@
1
1
C1720
C1721
@
@
0.1U_0402_10V7K
0.1U_0402_10V7K
2
2
1

2

U819
EMC@
R1703
1

JP3_WLAN

05/20 add R1705 and R1706 for RF require
R1705
0_0402_5%

GLONASS@

GND
GND
GND

5

0_0402
R1712
1

2

GPIO_6628_GPS_LNA_EN

<5>

Close to U824
IF GPS have to pass AGPS IOT, recommend to
reserve an external GPS LNA between U824
pin3 and U822 pin39

B

B

OSC_EN_6620

1

R1716 @
2

SRCLKENAI

<5>

2

0_0201_5%

0_0402_5% -22mil
2

VRTC

EEDI

ANTSEL_3

2.8V TCXO or OSC

XTEST
0

0

0

1.8V TCXO or OSC

0

1

0

0

0

1

0

1

1

1

R1715
1

VRTC_6620

R1868
10K_0402_5%

clock setting

XTAL
SD1_CMD_6620

0_0201_5% 1 R1717

2

SD1_DAT3_6620

0_0201_5% 1 R1718

2

SD1_DAT2_6620

0_0201_5% 1 R1719

2

SD1_DAT1_6620

0_0201_5% 1 R1721

2

SD1_DAT0_6620

0_0201_5% 1 R1722

2

SD1_CLK_6620

1 R1711 2
EMC@

<5>

MC3DA3

<5>

MC3DA2

<5>

MC3DA1

<5>

MC3DA0

<5>

MC3CLK

<5>

PCM1CLK_6620
PCM1SYNC_6620
PCM1OUT_6620
PCM1IN_6620

external clock mode
DAICLK

<5>

DAISYNC
DAIPCMIN
DAIPCMOUT

<5>

XTEST

<5>

WIFI host
interface

<5>

1

2

@ C1749
33P 50V J NPO 0402

VDD18_6583

2

1

ANTSEL_1

0

0

0

WIFI :SDIO2

0

0

1

WIFI :SPI

0

1

0

WIFI :reserved

0

1

1

0_0402_5% -22mil

Default

BT/common host
interface

C1737
2.2U_0603_10V6K

XTEST

2012/11/03

Deciphered Date

0

0

SDIO2

0

1

Title
Size
C
Date:

4

3

2

Default

Compal Electronics, Inc.
2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

ANTSEL_0

UART1

Compal Secret Data

Security Classification
Issued Date

A

MT6620_1V8
1

A

ANTSEL_2

WIFI :SDIO1

R1723

2

5/23 ADD FOR RF

0_0201_5%

MC3CMD

Default

BT, FM, GPS, WiFi (MT6628)
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

9

of

28

5

4

3

2

1

Sub Camera

Sub Camera

0531 Change L1 L2 L3 R1731 FOR MTK
2 EMC@ 1
0_0402_5%
R1737
L1
<5>

1

RDP1

EMI1
1
2
3
4

<5> CMDAT8
<5> CMVREF
<5> CMDAT6
<5> CMDAT9

8
7
6
5

SUB_DAT8
SUB_VREF
SUB_DAT6
SUB_DAT9

<5>

@
4

RDN1

05/20 DEL EM12

1
4

<5>
<5>

CMDAT5
CMDAT4

MIPI_D1_N

1
2
3
4

CMPDN
CMRST
SDA1
SCL1

EMI4
8
7
6
5

SUB_PCLK

1
2
3
4

<5> CMDAT7
<5> CMHREF
<5> CMDAT2
<5> CMDAT3

SUB_DAT5
SUB_DAT4

0 +-5% 8P4R 0804
EMC@

SUB_DAT7
SUB_HREF
SUB_DAT2
SUB_DAT3

<5>
<5>

1

RDP0

@
4

RDN0

0 +-5% 8P4R 0804
EMC@

GPIO_MAIN_CMPDN
GPIO_MAIN_CMRST
SENSOR_SDA
SENSOR_SCL

D

1
R1735

EMC@

L2
8
7
6
5

8
7
6
5

0 +-5% 8P4R 0804
EMC@

EMC@

EMI3
1
2
3
4

CMPCLK

EMI10
<5>
<5>
<5>
<5>

CMMI21T-900Y-N_4P
2
1
0_0402_5%
R1736

2
0_0402_5%

<5>

MIPI_D1_P

3

3

0 +-5% 8P4R 0804
EMC@

D

05/20 SWAP FOR Layout
2

2

1

05/20 Change C1745 from 0603 to 0805
2

4

3

2

MIPI_D0_P

3

MIPI_D0_N

CMMI21T-900Y-N_4P
2
0_0402_5%

1
R1734

EMC@

2
0_0402_5%
R1724
AVDD2.8V_CAM

C1738
2.2U_0603_10V6K

<5>

RCP

<5>

RCN

1
4

C1739

4

3

2
0_0402_5%
1

1

<5>
2

@
C1740
2.2U_0603_10V6K

1

0_0402_5% -22mil
C

2

MIPI_CLK_P

3

MIPI_CLK_N

1
R1732

EMC@

DOVDD1.8V_CAM
2

2

VGP2_PMU

2

CMMI21T-900Y-N_4P

R1725

1V8

1

@

0.1U_0402_16V4Z

2
0_0402_5%

CMMCLK

0.1U_0402_16V4Z

1
R1731

SENSOR_MCLK

EMC@

C

C1741

2V8

2 R1727

VCAMA_PMU

1

AVDD2.8V_CAM_5M

0_0402_5% -22mil

2

2

1

2

@

1
R1733

EMC@

47U_0805_6.3V6M
C1745
@

1

0.1U_0402_16V4Z
C1746

1

1

0_0402_5% -22mil

1

2

VCAMA_PMU

2

2V8

L3

Acer reserve

SENSOR_MCLK
SENSOR_SCL
SUB_DAT9
SUB_DAT8
SUB_DAT3
SUB_DAT7
SUB_DAT6
SUB_DAT5
SUB_DAT4
SUB_DAT2
R1726
SUB_PCLK

1

2

SUB_PCLK_R

EMC@
0_0402_5%

1

DOVDD1.8V_CAM_5M

JP5
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

@
C1743
22P_0402_50V8J

2

2

C1744
2.2U_0603_10V6K

0.1U_0402_16V4Z
C1747

DOVDD1.8V_CAM
DOVDD1.8V_CAM
AVDD2.8V_CAM
AVDD2.8V_CAM
SENSOR_SDA
SUB_HREF
0521 Change P1 for ME

GND
GND

SUB_VREF
GPIO_SUB_CMPDN

21
19
17
15
13
11
9
7
5
3
1

<5>

CONN@

B

@

2
1

1 22P_0402_50V8J

2 R5256

VGP2_PMU

0_0402_5% -22mil

0.3M connector

C1742

1

1V8
2

@

SENSOR_SDA
GPIO_MAIN_CMPDN
MIPI_D1_N
MIPI_CLK_P

SP020015H00
0527 change to G1 Camera

1

MIPI_D0_N

21
19
17
15
13
11
9
7
5
3
1
JP7
CONN@

EMI

20
18
16
14
12
10
8
6
4
2

23
22
20
18
16
14
12
10
8
6
4
2

AVDD2.8V_CAM_5M
DOVDD1.8V_CAM_5M
SENSOR_MCLK
GPIO_MAIN_CMRST
SENSOR_SCL
MIPI_D1_P

B

MIPI_CLK_N
MIPI_D0_P

0528 PIN6 Shout to gnd

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

5

4

3

2

Camera
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

10

of

23

5

4

3

2

1

D

D

Common Debug
JP6
<15,23>
<15,23,5,7>
<15,24>
<15,24>

PWRKEY
SYSRST_B
KCOL0
KROW0

R1728

C

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

URXD2 <5>
UTXD2 <5>
C

MCU_JRTCK <5>
MCU_JTDO <5>
MCU_JTMS <5>
MCU_JTDI <5>
MCU_JTRST_B <5>
MCU_JTCK <5>

44
43
42
41

G
G
G
G

<5> URXD4
<5> UTXD4

1
2
0_0402_5% -22mil

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

PANAS_AXT440124
CONN@

B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

SD Card,Debug,USB
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Thursday, August 08, 2013

Sheet
1

11

of

28

5

4

3

2

0_0402_5%
R4902
1

+VDD_GYRO33

0529 2.85V earlier than 1.8V

1

VEMC_1V8_PMU

R4903
0_0402_5% -22mil
1
2

+VDD_GYRO18

8

12

INT
14

RESV/DRDY

6
7

R4918
0_0402_5% -22mil
1
2

GYRO_AD0

9
1
11
15
17

AUX_DA
AUX_CL

VDD18_6583

2
0_0402_5%
1
1

R4912
R4913

U4032

EINT_GY

8

+VDD_GYRO18
0530 DEL R4909 R4911
<5>

2 0_0402_5%
2 0_0402_5%

SDA3
SCL3

7

<12,5>
<12,5>

21

9

GYRO_AD0

10
10

REGOUT
FSYNC

20

CPOUT
CAD1

1

18
25

GND
GND PAD

VDDIO

VDD
SDA / SDI
SCL / SCLK

AUX_CL
AUX_DA

INT
22

+VDD_GYRO18

16
5
4
2

CLKIN

CAD0

I2C_GYRO_SDA
I2C_GYRO_SCL

0513 change
NEED PULL UP??

19
21
22

RESV1
RESV2
RESV3
NC
NC
NC
NC

AD0

1
R4908

GYRO_INT

24
23

SDA
SCL

0529 2.85V earlier than 1.8V

6/20 Update
@
10K_0402_5%
1 R4907 2

13

VDD

VLOGIC

2

0_0402_5%
1 R4901 2
@
C4171
0.01UF_0402_25V7K

1

VDD18_6583
D

RESV/CCS#

MPU-6515

VDD28_6583

C4172
0.1U_0402_10V7K

2

U4029
3

2

1

1

C4175
2.2U_0402_10V6M

1

2

C4176
0.1U_0402_10V7K

@

11
C4177
0.1U_0402_10V7K
19

2

2

20

MPU-6050_QFN24_4X4

nCS
NC17
NC16
NC15
NC14
NC6
NC5
NC4
NC3
NC2
NC1

AD0 / SDO
REGOUT
FSYNC
RESV1

GND

RESV2

GND PAD

13

+VDD_GYRO33

24
23

R4915 1
R4914 1

@

D

2 0_0402_5%
2 0_0402_5%

SDA3
SCL3

@
12

<12,5>
<12,5>

GYRO_INT

17
16
15
14
6
5
4
3
2
1
18
25

05/20 Change GND symbol
MPU-6515_QFN24_3X3
@

C

C

1

VBAT

5V
0_0402_5%
R1241

C1416
AU_SPK1N_R 1

2

0.1U_0402_10V7K

1

C1292
2.2U_0603_6.3V6K

6

SPK_R+

2

SPK_L-

BYPASS

G1
G2

1
11
12

@

1

C1767
+VDD_SPKR

R1266
1K_0402_1%

SW_DET

<16>

SPKR_LEFT#

<16>

SPKR_LEFT

<16>

33P 50V J NPO 0402

1

2

1

2

1

2

1

2

33P 50V J NPO 0402
33P 50V J NPO 0402
33P 50V J NPO 0402

0_0402
2

AMP_GAIN1

R447
0_0402_5%
@

SPKR_LEFT

SPKR_RIGHT

R1277
1K_0402_1%

AMP_GAIN2

A

1 R446
2
0_0402_5%

R1268
1K_0402_1%

@

2

@
0526 swap p9 and p10

NC to COM
COM to NC

ON

H

OFF

A

05/20 Change DGND to AGND

Issued Date

SPKER

Compal Electronics, Inc.

Compal Secret Data

Security Classification

HP
ON

1 R439

0521 ADD CPIO_sW

NO to COM
OFF
COM
to NO

0521 DEL 100K PULL DOWN

L

1 R437
0_0402

2

R1281
1K_0402_1%

05/20 Change DGND to AGND

IN

1 R436
0_0402

2
1

SN74AUP1T08DCKR_SC70-5

1

@

SPKR_LEFT#

SPKR_RIGHT

B

<16>

1

4

2

O
IN2

L859 1
EMC@ 2
FBMA-L11-160808-700LMT_2P
L860 1
EMC@ 2
FBMA-L11-160808-700LMT_2P

SPKR_RIGHT#

2

U3

IN1

2

2

G

1

GPIO_SW1

3

<5>

+VDD_SPKR

P

5

VEMC_3V3_PMU

ADDJACK_DET_R

AMP.

SPKR_RIGHT#

2

1

05/20 Change DGND to AGND
ADD D312 08/02

RB521CM-30TR2
2

1

D312

SPK_L+

L851 1
EMC@ 2
FBMA-L11-160808-700LMT_2P
L852 1
EMC@ 2
FBMA-L11-160808-700LMT_2P

AMP_GAIN1
AMP_GAIN2

ALC105-GR_DFN12_3X3

1

5/22 add gpio pin for control

<8>

4

3

INPUT-L
OUT-LP

3300P_0402_50V7K

R1270
2K_0402_1%

0531 Change BOM FOR U146 and R442~445

OUT-LN

2
8

C1415

OUT-RP
PD#

EMC@

7
10

EMC@

2 ADDJACK_DET
0_0402_5%

SPK_R-

C1773

1
R1267

5

EMC@

SW_DET
Change net name SW_DET 5/22

05/20 Change L and C from p16 to p12
OUT-RN

C1772

<8>

INPUT-R

EMC@

AU_HPR_R

9

PVDD2

C1420

<8>

C1418
10U_0603_25V6M

C1768

AU_HPL_R

PVDD1

2
AU_HPL_R
0_0402_5%
2 AU_SPK1N_R
0_0402_5%
2
AU_HPR_R
0_0402_5%
2 AU_SPK1P_R
0_0402_5%

13

AU_HPR

1
R442
1
R443
1
R444
1
R445

1

AU_HPR

AU_HPL

3300P_0402_50V7K

2

2

<24>

AU_HPL

2

<24>

C1419
1

U143

GND

0.1U_0402_10V7K
2
AU_SPK1P_R 1

C1417

2

1

5/23 ADD R for COST DOWN SW

B

R1269
2K_0402_1%

2

2

8/2 ADD

1

1

2

05/20 Change C1418 from 4.7u to 10u
+VDD_SPKR
0.1U_0402_10V7K

2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Sensors
Size
C
Date:

5

4

3

2

Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

12

of

28

5

4

3

169 ball eMMC

2

1

VEMC_3V3_PMU
R546
1

2
2

0_0402_5% -22mil
C555
1

1

0.1U_0402_16V7K
2

C1751
18P_0402_50V8J
EMC@

U502

AA7
AA10
U10
U7
U6
T5
R5
P10

RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU

RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU

R543
2

eMMC_VCCQ

W5
W6

eMMC_CMD
eMMC_CLK_R

U5
L4

eMMC_RST

0.1U_0402_16V7K

1

2

2

1

C543

K7
K8
K9
K10
K11
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M12
M13
M14
N1
N2
N3
N12
N13
N14
P1
P2
P12
P13
P14
T1
T2
T3
T12
T13
T14
V1
V2
V3
V12
V13
V14
Y1
Y3
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
AE1
AG2
AH4
AH6
AH9
AH11
AG13
AE14

1

0_0402_5% -22mil
C508
4.7U_0603_6.3V6K
@

U502

U502
U502

KIN 8GB@

KIN 16GB@

SA00006MF30

SA00006MG30

Kingston 8G KE4CN3K6A

Kingston 16G KE4CN4K6A

U502

EMMC_SAM_8GB@
KLM8G2FE3B-B001

SA00005KM10

U502

HYN 8GB@

HYN 16GB@

SA00006PW10

SA00006VJ10

HYNIX 8G H26M42002GMR

HYNIX 16G H26M52002EQR
C

U502

U502

SA00006VE10

SA00006Z610

Samsung KLM8G1WE4A-A001

Samsung KLMAG2WE4A-A001

@ PAD TP1389

CLIP1
EMIST_SUL-0815A1_1P

10K_0201_1%
2
R534 1

eMMC_DAT0
eMMC_DAT1
eMMC_DAT2
eMMC_DAT3
eMMC_DAT4
eMMC_DAT5
eMMC_DAT6
eMMC_DAT7

R536
R529
R527
R528
R530
R531
R533
R532

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

CLIP3
EMIST_SUL-0815A1_1P

CLIP4
EMIST_SUL-0815A1_1P

eMMC_VCCQ
47K_0402_5%
47K_0402_5%
47K_0402_5%
47K_0402_5%
47K_0201_5%
47K_0402_5%
47K_0402_5%
47K_0402_5%

CLIP5
EMIST_SUL-0815A1_1P

CLIP6
EMIST_SUL-0815A1_1P

CLIP7
EMIST_SUL-0815A1_1P

CLIP9
EMIST_SUL-0815A1_1P

SCREW HOLE

H6
H7
K5
M5
M8
M9
M10
N10
P3

CLIP8
EMIST_SUL-0815A1_1P

1

eMMC_CMD

CLIP2
EMIST_SUL-0815A1_1P

CLIP11
EMIST_SUL-0815A1_1P

B

CLIP12
EMIST_SUL-0815A1_1P

1

MTK advise to use 27ohm

1

EMC@
2
eMMC_CLK_R 1 R535
27_0201_1%

eMMC_DAT7 <5>
eMMC_DAT6 <5>
eMMC_DAT5 <5>
eMMC_DAT4 <5>
eMMC_DAT3 <5>
eMMC_DAT2 <5>
eMMC_DAT1 <5>
eMMC_DAT0 <5>
eMMC_CLK <5>
eMMC_CMD <5>
eMMC_RST <5>

1

eMMC_DAT7
eMMC_DAT6
eMMC_DAT5
eMMC_DAT4
eMMC_DAT3
eMMC_DAT2
eMMC_DAT1
eMMC_DAT0
eMMC_CLK
eMMC_CMD
eMMC_RST

SAM 16GB@

1

SAM 8GB@

0605 ADD CLIP25
CLIP13
EMIST_SUL-0815A1_1P

CLIP25
EMIST_SUL-0815A1_1P

CLIP15
EMIST_SUL-0815A1_1P

CLIP16
EMIST_SUL-0815A1_1P

H2
HOLEA

H3
HOLEA

H4
HOLEA

1

B

VEMC_1V8_PMU
K6
W4
Y4
AA3
AA5

1

C

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

4.7U_0603_6.3V6K

1

A4
A6
A9
A11
B2
B13
D1
D14
H1
H2
H8
H9
H10
H11
H12
H13
H14
J1
J7
J8
J9
J10
J11
J12
J13
J14
K1
K3
R1
R2
R3
R12
R13
R14
U1
U2
U3
U12
U13
U14
W1
W2
W3
W7
W8
W9
W10
W11
W12
W13
W14
AA1
AA2
AA8
AA9
AA11
AA12
AA13
AA14

VSS
VSS
VSS
VSS

D

1
@

1

2

M7
P5
R10
U8

VSSQ
CMD
VSSQ
CLK
VSSQ
VSSQ
RST# / NC
VSSQ A1 INDEX / NC

C544

1

1
C430
1U_0201_6.3V6K

VDDI

2

eMMC_VCC

1

K4
Y2
Y5
AA4
AA6

VCCQ
VCCQ
VCCQ
VCCQ
VCCQ

M6
N5
T10
U9

1

K2

VCC
VCC
VCC
VCC

1

EMMC_VDDI

DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7

1

Close to
Memory

eMMC_DAT0 H3
eMMC_DAT1 H4
eMMC_DAT2 H5
eMMC_DAT3 J2
eMMC_DAT4 J3
eMMC_DAT5 J4
eMMC_DAT6 J5
eMMC_DAT7 J6

1

D

CLIP17
EMIST_SUL-0815A1_1P

1

1

SDIN4E2-16G-T_TFBGA_169P-P

1

169 ball eMMC
CLIP18
EMIST_SUL-0815A1_1P

CLIP19
EMIST_SUL-0815A1_1P

CLIP20
EMIST_SUL-0815A1_1P

FD4

1
CLIP24
EMIST_SUL-0815A1_1P

1

FD3
1

CLIP23
EMIST_SUL-0815A1_1P

1

FD2
1

CLIP22
EMIST_SUL-0815A1_1P

1

FD1
1

1

CLIP21
EMIST_SUL-0815A1_1P

1

1

1

@
Compal
footptint

1
S3
TP

CLIP14
EMIST_SUL-0815A1_1P

@

A

0528 Update clip for ME

1

1

0524 Change H6 H7 for ME

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

5

4

3

A

0524 ADD CLIP FOR ME
1

H7
H_1P7X2P2N

1

H6
H_1P7N

0530 del S2 FOR EMI

2

eMMC, SCREW HOLE
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

13

of

28

5

4

3

Change PIN FOR JP10 0522
0530 Change pin for small board

D

GND1
GND2

1
2
3
4
5
6
7
8
9
10

0_0402_5% -22mil
2 R5135 1
2 R5134 1
0_0402_5% -22mil
SCL0
SDA0

1

0603 Update

JP10
1
2
3
4
5
6
7
8
9
10

2

SCL0 <5>
SDA0 <5>
GPIO_CTP_RST

VGP5_PMU
VBAT
D

<5>

EINT_CTP <5>
VIBR_PMU
0530 del R/C for small board

11
12

ACES_50506-01041-P01
ME@

C

C

B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Touch Panel
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Thursday, August 08, 2013

Sheet
1

14

of

28

5

D

4

3

2

1

D

Power-on Button

Compal GND

MTK comment don't pull up R on PWRKEY.1101.

MTK GND

SW1
1
2

PWRKEY

VDD18_6583

<11,23>

2

3
4
5
6
7

RESET

R1753
10K_0402_5%

2

MTK advise don't need

1

3

@

3

1
4
5
6
7

TVNST52302AB0 SOT523
@

2

C1759

<11,23,5,7>

2

1

2

add D806 for EMI
SYSRST_B

2

EMC@
1U_0402_10V6K

0704

1
3

C1758

SW2

D805

1

1U_0402_10V6K

D806

C

C

1

EMC@
TVNST52302AB0 SOT523

SWITCH BOARD
JP13
B

<11,24>
<11,24>
<24>

KCOL0
KROW0
KCOL1

1
2
3
4

B

1
2
3 G1
4 G2

5
6

ACES_51512-0040N-P01
CONN@

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Button
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Thursday, August 08, 2013

Sheet
1

15

of

28

5

4

3

2

1

Digital MIC Conn.
VDD18_6583 MICBIAS0
2

0527 change local netname

MTK GND

D

0_0402_5% -22mil
0531 Change for MTK Check list
R1730

R1729
0_0402_5% @

SPM0423HD4H-WB-2_6P

AU_VIN0_N
AU_VIN0_P

AU_VIN0_N
AU_VIN0_P

<24>
<24>

2

6
5
4

3

MIC1
1
VDD
2 GND
3 LEFT/RIGHT DATA
GND
CLOCK

1

1

05/20 Update MIC1 PCB Footprint

Compal GND

2

D

1

D57
TVNST52302AB0 SOT523
EMC@

AU_VIN0_P
AU_VIN0_N

0605 Change BOM Structure

DM_CLK
DM_DATAR

C

C

Vibrator

SPAKER
JP9

B

5
6

G1
G2

1
2
3
4

B

1
2
3
4

SPKR_RIGHT# <12>
SPKR_RIGHT <12>
SPKR_LEFT# <12>
SPKR_LEFT <12>

ACES_88266-04001

ME@

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Connector(MIC/SPK/HP)
Document Number

Rev
0.2

ZEJ00 -LA-A791P
Thursday, August 08, 2013

Sheet
1

16

of

28

5

4

3

2

1

FOR RF request
If mini-A connector insert => CID < 0V => Low
If mini-B connector insert => CID > 1.2V => High

Micro-USB

USB_DM_R

TP1364PAD @

USB_DP_R

TP1365PAD @

IDPULLUP pin is replaced by 1.2V power source.
VIN

D

D

Compal GND

JP11
1

EMC@

VBUS

L853
<5>
<5>

4

USB_DM

3

1

USB_DP

USB_DM_R

2

USB_DP_R

3

USBUSB+

2
<5>

OCE2012120YZF_4P

4

USB_ID

6
7
8
9

GND
ACON_MUE41-531200
CONN@

2

EMC@ D809
1

1

2

1U_0402_6.3V6K

2

10U_0603_25V6M

C1769

EMC@
D7
C4270
TVNST52302AB0 SOT523
0530 add D7FOR MTK

1

TVNST52302AB0 SOT523

3

3

2

GND
GND
GND
GND

ID

5

1

MTK GND

0527 ADD C4270 FOR USB OTG
0527 change 10u

C

C

VSD

C1684
VMCH_PMU

SD card

VSD

1

EMC@

2
12P_0402_50V8

R1761
1

C1770

2
2

1

0_0603_5% -35mil
B

B

4.7U_0603_6.3V6K

JP12

<5>

R1762 EMC@
1
2
0_0402_5%

MC1CK
2

MC1CM
MC1DA0
MC1DA1
MC1DA2
MC1DA3

SD_CLK

2
C1771
1

<5>
<5>

<5>
MC1DA3
MC1DA2

@

2

@

2

@

1

2

DET TERM (GND)
SWITCH TERM CD
DAT1
DAT0
VSS
G1
CLK
G2
VDD
G3
CMD
G4
CD/DAT3
G5
DAT2

11
12
13
14
15

SW:
H: Card remove
L: Card insert

10P_0201_50V8J

2

1

10P_0201_50V8J
C13

@

1

10P_0201_50V8J
C12

2

1

10P_0201_50V8J
C11

C9
@

1

MC1CM

10
9
8
7
6
5
4
3
2
1

PROCO_879S-N010-03A0
CONN@

EMI
10P_0201_50V8J
C10

A

@

12P_0402_50V8

1

@
C1905
10P 50V J NPO 0402

<5> MC1INSI
<5> MC1DA1
<5> MC1DA0

SD_CLK

for RF request
close U201 side

A

2012/11/03

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/11/03

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

Connector-2(SD card/G-se)

4

3

2

Rev
0.2

ZEJ00 -LA-A791P

Thursday, August 08, 2013

Sheet
1

17

of

28

5

4

3

2

1

0605 Change bom structure
VBAT

3G

2

Compal GND

PJ1
JUMP_43X79
1
2
1

+VBATA_MODEM

@

MTK GND

USB11_DP_P

3

close to module
LTE@ LTE@

USB_LTE_N

1

0_0201_5%
<24>

R5262
2

LTE_RESET

1

1

LTE@

1.8V GPIO
C4257
0.1U_0402_10V7K

2

USB_LTE_P
USB_LTE_N

0_0201_5%
0_0201_5%

1

2

R5273
LTE@
10K_0201_5%
R5270
1M_0402_1%

LTE@

PAD TP1407

<24>

R5269 10K_0201_5%
2
LTE@

Wake_ON

2 LTE@
2
LTE@

1 R5265
1 R5267

USB2_3G_DP_R
USB2_3G_DN_R
PAD TP1402

BodySAR_N

0_0201_5%
0_0201_5%

LTE_RESET_N
ADD R5271 AND R5272 FOR WAKE UP 07/30

2 LTE@
2
LTE@
R5271
R5268

1
1

1
LTE@
2

USIM_DATA

USIM_DETECT
2

USIM_CLK
2

Change D4 for LAYOUT 5/22

3

USIM_RST
3

C

LTE_RESET_N
PAD

TP1417 @

PAD

TP1419 @

DM2 LTE@
TVNST52302AB0_SOT523-3

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
GND2

R5261
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68

@
1

1

2

+
2

+
2

LTE@
L857

+

D

Ferrite bead

1

2

+VBATA_MODEM
2 BLM18PG121SN1D_0603

0524 change c4264 c4265 for RF

0604 add C4271 FOR RF

R_0201
2

LTE_ON_OFF_N#
LTE_DISABLE

@ TP1401 PAD
0527 change

GPS_DISABLE# R5264 1

2 0_0201_5%

GPS_OFF#

LTE@
USIM_RST
USIM_CLK
USIM_DATA
USIM_VCC

<24>

GPS_OFF# LTE_ON_OFF# Reset pin VIH=1.24V

3.3V GPIO

LTE_ON_OFF_N#

1

2

R5266

LTE_ON_OFF#

<24>

1.8V GPIO

0_0201_5%

C

USIM_DETECT

BELLW_80149-1721

R5260
2
1 USIM_VCC
0_0201_5%

USIM_PWR

LTE@

1

1

DM1 LTE@
TVNST52302AB0_SOT523-3

@

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69

2

1

1

C4265
100U_A1_6.3V_R70M

J3G1

@
VDD18_6583

1

1

LTE@

100U_A1_6.3V_R70M

VDD18_6583

2

LTE@

C4271

Config 1,2,3 define =GND
Config 0 define = NC

1

LTE@

100U_A1_6.3V_R70M

2

LTE@

C4264

1

WCM-2012HS-900T_0805

LTE@

C4263 10U_0402_6.3V6M

3

2

C4262 4.7U_0402_6.3V6M

4

USB_LTE_P

2

C4261 0.1U_0402_10V7K

4

USB11_DM_N

2

1 LTE@
C4255

C4260 100P_0402_50V8J

<5>

2

2

2

1 LTE@
C4254

4.7U_0402_6.3V6M

<5>

1 LTE@
C4253

68P_0402_50V8J

D

L858 LTE@
1
1

1

4.7U_0402_6.3V6M

LTE@
C4252
33P 50V J NPO 0402

SCA00001W00

SCA00001W00

1008 Intel Review update

VDD18_6583
@

2

5/22 chang bom structure to @ for RF
2
R5272

1
4.7K_0201_5%

100K_0201_5%
R5294

1

@

JSIM

10
12
14
16
18

CLK

GND

RST

NC

VCC

GND

GND

GND

GND

GND

GND

GND

GND

T-SOL_159-1000302602
LTE@
0528 add GND for PIN8

1

USIM_DETECT
B

3
5

USIM_CLK

7

USIM_RST

9

USIM_PWR

11
13
15
17

1

2

LTE@

1

1

C4267
33P_0201_25V8J

2

VPP

8
C4269
33P_0201_25V8J
LTE@

NC

C4268
33P_0201_25V8J

1

DETECT

I/O

C4258
0.1U_0201_10V6K

6

NC

C4259
4.7U_0402_6.3V6M
2
1

4

USIM_DATA

C4266
33P_0201_25V8J

2
B

1
LTE@
2

0527 del mos

2
LTE@

2
LTE@

LTE@

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

SIM
Size
C
Date:

5

4

3

2

Document Number

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

18

of

28

A

B

C

D

E

1

1

2

2

3

3

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/09

Deciphered Date

2014/11/09

Title

RF_TX_ASM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.2

ZEJ00 -LA-A791P

Date:
A

B

C

D

Thursday, August 08, 2013
E

Sheet

19

of

28

A

B

C

D

E

1

1

2

2

3

3

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/09

Deciphered Date

2014/11/09

Title

RF_TX_ASM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.2

ZEJ00 -LA-A791P

Date:

A

B

C

D

Thursday, August 08, 2013
E

Sheet

20

of

28

5

4

3

2

1

GNSS_VTCXO_SW

1
05/20 del JP15 R1857 C1878 C1879 for RF require

GLONASS@
C1874
0.033U_0201_6.3V

2

GLONASS@

C1875

GLONASS_RF

1

2 50 Ohm 1

Input

Output

2

1

GLONASS@
L854
5.6NH_LQG15HS5N6S02D_5%

1

3

2

4

GLONASS@
C1876
1000P_0201_16V7K

4

Vcc

<9>

RF_IN

18P_0201_50V8J

1

MT3332_GPS_RF
D

1

@
C1880
1U_0201_6.3V6K

2

1

2

5

2
3
5

GND

GLONASS@
C1877
18P_0201_50V8J

6

ENABLE

GND
GND
GND

D

GLONASS@
U1913
BGU7005_XSON6_1P45X1

RF_OUT

GND

U1912
SAFFB1G58KA0F0AR14_5P

GLONASS@

2

GNSS_VTCXO_SW

MT3332 on-chip LNA
Matching

GLONASS@

2

C1881

1

5
3

C1883
1.2P_0201_50V8C
1
2

MT3332_GPS_RF

3.3V LDO

1000P_0201_16V7K
2
4

1

GLONASS@
L855
3.3NH_LQG15HS3N3S02D_300MA_.3NH

@
C1882
C_0201

1

2

U1914

6
VCC
2
NC
1
GND
NC
26MHZ_10PF_1XXB26000CTP
GLONASS@

GNSS_VTCXO_SW

OUT
NC

1

2

GLONASS@
C1885
4.7U_0402_6.3V6M

3

2

VIN

VOUT

5

GLONASS@
R1859
1

1

VSS
EN

NC

4

0_0402_5%

2

C

GNSS_VGNSS_MAIN

GLONASS@
C1886
4.7U_0402_6.3V6M

U1907
GLONASS@

2

SA00006M400

XC6215B332MR-G_SOT-25-5
GLONASS@
<5>

S IC MT3332N QFN 48P GPS

MT8389_GPIO_GPS_EN

GLONASS@

2

1

C1887
4700P_0201_6.3V6K

GLONASS@

2

GNSS_DCV_1V8

1
1

GNSS_DCV_1V8

U1915

C

GPS_RFIN

VBAT

GLONASS@
C1884
1U_0201_6.3V6K

2

GLONASS@

C1902
4700P_0201_6.3V6K

1

1.8V / 2.8V IO Voltage Selection

、、42
need change to GNSS_VTLDO
42 (IO voltage is SMPS_1V8)

49

3

4

MAIN_GND

T1N

DVDD28_IO1
DVDD28_IO2

JDO/GIO9
SCS1#/GIO5/F_SCS

SCK1/GIO4/F_SCK/EE_SC L

RX2/GIO2/F_SI/EE_SDA

TX2/GIO3/F_SO

RX1/GIO0/H_SCK

TX1/GIO1/TXIND

RX0/H_SI/I2C_CK

JRCK/GIO10

IF[1]/JDI/GIO8/SYNC
IF_CLK/JCK/GIO6
IF[0]/JMS/GIO7/PPS

JRST_/GIO11/H_SCS

R_0201

2

GNSS_HRST

<5>

44

Reserved for GPS HRST from host,
connect to Host (MT62xx) GPIO pin

45
36

24

GNSS_CORE_1V1

43
GLONASS@
C1890 1
2 2.2U_0402_10V6M

6

30

GNSS_DCV_1V8
GLONASS@
2 0.1U 6.3V K X5R 0201
C1892 1

42

B

29
34
@
R1862
R_0201

39
33

1

GNSS_FRAME_SYNC

2

MT8389_GPIO_FRAME_SYNC

<5>

26

Reserved for improving GNSS Hot-Start performance.

40
38

MT3332N_QFN48_6X6

41

31

32

28

27

23

2

25

DCV_FB

GLONASS@
C1895
4.7U_0402_6.3V6M

35

DCV

TX0/H_SO/I2C_DA

AVSS43_DCV

37

L856

1

AVDD43_DCV

XOUT

GNSS_DCV_1V8

DVDD11_CORE1

GND

XIN

pin14 connet to C1894 GND net first,
then connect to reference GND

GNSS_VGNSS_MAIN
GLONASS@
C1893
1U_0201_6.3V6M
1 GLONASS@
C1894
4.7U_0402_6.3V6M
16
2
14
GLONASS@
1
2
15
GNSS_DCV
1UH_LQM2MPN1R0NG0L_30%
17

@

1

47
46

AVDD11_CLDO

20

2

AVDD28_CLDO

FORCE_ON

1

C1893 is close to pin11

5

MT3332
QFN-48pins

AVSS43_MISC

32K_OUT

13

GNSS_CORE_1V1

AVDD18_CM

DVDD11_CORE3

22

12

2

DVDD11_CORE2

AVDD28_TLDO

B

GNSS_DCV_1V8

T1P

AVDD_TCXO_SW

21

8
GLONASS@
C1891
1U_0201_6.3V6M

IF[2]/EINT0/GIO12

EINT2/GIO14

AVDD11_RTC

2

XTEST

IF[3]/EINT1/GIO13

18

11

R1860

HRST_B

VREF

AVDD43_RTC

10

GNSS_VTLDO

AVDD43_VBAT

19

7

GNSS_VTCXO_SW

1

C1891 is close to pin11

9

OSC

U1907
GNSS_VGNSS_MAIN
GLONASS@
C1888
1U_0201_6.3V6M
2
1
C1889
GLONASS@
1U_0201_6.3V6M
2
1 GNSS_VREF

AVDD18_RXFE

RF_IN

@

Connect to Host GPIO Pin

U1906 without output high-speed discharge function, then
tdrop-down (2.7V-to-0.5V) > 50ms.
Please use MTK qualified LDOs, such as Torex XC6215/XC6221.

1

48

2.8V IO : U1907 pin30
1.8V IO : U1907 pin30

RTC Voltage (2.8V)

VDD28_6583

R1870

GLONASS@
1
2 0_0402_5%

VRTC

R1871

1

AVDDRTC

1

GLONASS@
R1864
10K_0201_1%

Reference Frequency Selection
16.368MHZ TCXO : R1864 = NC , PIN_41 = NC
26MHZ TCXO : R1864 = 10K , PIN_41 = NC
26MHZ XTAL : R1864 = 10K , PIN_41 contact 10K

2

2

GNSS_HOST_32K

1

MT3332 QFN (48 Pins, 0.4mm pitch)
@
R1863
R_0201

@

<23,9>

RTC32K2V8

MT8389_EINT_MT3332

2 0_0402_5%
GLONASS@
R1867 1

RTC32K2V8

2 0_0402_5%

UTXD1

<5>

URXD1

<5>

<5>

A

A

As EINT to Host

Connect GNSS_HOST_VRTC to always alive voltage source, and keep the
voltage swing of GNSS_HOST_32K RTC clock same as GNSS_HOST_VRTC.

Connect to HOST UART (TX/RX) interface

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/09

Deciphered Date

2014/11/09

Title

MT3332

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.2

ZEJ00 -LA-A791P

Date:

5

4

3

2

Thursday, August 08, 2013
1

Sheet

21

of

28

5

4

3

2

1

VIN

Charger

close USB connector

6
<24>

SDA4

1

EINT_CHG_STAT
@

PR30 0_0201_5%

VBAT

7

CHARGER_INT1

8
9

GPIO_CHG_EN
2

<24>

PR37 10K_0201_1%
2
1

VBUS

PR38 10K_0201_1%
2
1
BQ24196_REGN

PR36
10K_0201_1%

2
22

PGND_1

SDA
INT

BAT_1

OTG

BAT_2

/CE
PSEL
REGN

PU3

1

PGND_2

ILIM
TS2
TS1

VCDT

1

1
2

RB551VM-30TE-17 SOD-323

VCDT rating: 1.268V

2
1

<23>
D

2

R1822
39K_0402_1%
R1823

2

2

16
17

C1828
1U_0603_25V6K

SYS_2

SCL

PC24
2.2U_0603_6.3V6K

/PG

@1

BQ24196_REGN 2

1

25V rating

80mil

3.3K_0402_1%

PC28
1U_0402_10V6K

2

1

CHR_LDO

18
13

<23>

VBAT_SUPPLY

14
PR31
10

1

2

270_0201_1%

12
BATT_TEMP
11

VBAT_SUPPLY
@
1
R1826

4mil

2
0_0402_5%

ISENSE

<23>

BATSNS

<23>

25

1
2
<24>

5
SCL4

15

1

2

3
TP1398
<24>

SYS_1

PD11

21

2

TP1367
PR39
10K_0201_1%

STAT

R1821
330K_0402_1%
VBAT

PC26
4.7U_0603_6.3V6K

VDD18_6583

BTST

PC142
0.047U_0402_16V7K

1

4

PMID

20

2

23

SW2

CHARGER_SW

PC25
2.2U_0603_6.3V6K

CHARGER_PMID

VBUS_2

19

PL4
2.2UH_PH041H-2R2MS_3A_20%
1
2

1

2

SW1

1

1

24

VBUS_1

2

1
PC31
10U_0603_10V6M

THERMAL PAD

PC20
1U_0603_16V6K

1
2

1
2

VIN

@

PC21
2
1
10U_0603_10V6M

D

OVP: 12V

VBUS

PC143
100P_0402_50V8J

PC144
10P_0402_50V8J
2
1

PL5
HCB2012KF-221T30_2P
1
2

BQ24196RGER_QFN24_4X4

VBAT
BQ24196_REGN

4mil

@
1
R1829

2
0_0402_5%

1

VDD18_6583

1

PR48
10K_0201_1%
2

PR51
15K_0402_1%

1

BATT_TEMP

2

C

<5>

C

Add BAT CONN.1102.
R384

2

PH1

BATTERY CONNECTOR

PR49
10K_0201_1%

1

CHG_TEMP

39K_0402_1%

2

10K_0402_1%_TSM0A103F34D1RZ

B value:3370K±1%

1

VBAT_SUPPLY

2

VA_PMU

R1837
80mil

1K_0402_1%
BAT_NTC

2
1
2 0_0402_5%
1
PR33
PR32 0_0402_5%
@
@

<24>
<24>

@ PR50
10K_0201_1%

ACES_50496-00701-001

2

1

2

BATON
TREF

<23>
<23>

2

@ R1838
24K_0402_1%
D810 @
TVNST52302AB0 SOT523

Rfg
SDA6
SCL6

1

40mil

R1840
FGN

4

1

3

2

1

1
2
3
4
5
6
7
8
9

1

1
2
3
4
5
6
7
GND
GND

3

JP14

40mil

FGP_IC

<23>

Compal Part

2

0.02_1206_1%

@

FGN_IC

FGN_IC

<23>

B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

5

4

3

2

Charger
Document Number

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013

1

22

Rev
0.2
of

28

3

VM
VM
VM_FB
VSRAM

SPI_CLK
SPI_CSN
SPI_MOSI
SPI_MISO

VSRAM_FB

WRAP_EVENT
INT

VPA
VPA_FB

1

C

VBAT

1
1 @

TVNST52302AB0 SOT523

1 @

2
R321
0_0402_5%
2
R322
0_0402_5%
2
R323
0_0402_5%

A13
A14
A11
A12
A17
A18
B16
A10

1 @

2
R324
0_0402_5%
1 @
2
R325
1
2
R326
0_0402_5%
@
0_0402_5%
1
2
R327
R328
@ 0_0402_5%
0_0402_5%
1
2

G1
D1
E1
F1
P18
N18
K18
D18
H17
G18

VRF18_1

PMU_EN
VBAT INPUT

VRF18_FB
VRF18_2
VRF18_2_FB
VIO18
VIO18_FB

VA
VRF28_1
VRF28_2
VTCXO_1
VTCXO_2
VCAMA
VAST
VIO28
VUSB
VMC
VMCH
VEMC_3V3
VEMC_1V8
VGP1
VGP2
VGP3
VGP4
VGP5
VGP6
VSIM1
VSIM2

VBAT_LDOS1
VBAT_LDOS2
VBAT_LDOS3
VBAT_LDOS4
VBAT_LDOS5
VBAT_LDOS6

42

1200

30

VM

VM

1.2/1.25/1.35/1.5

1100

10

VSRAM

Memory

0.7~1.25 (DC/DC)

600

10

VPA

3GPA

0.5~3.4 (100mV/step)

600

2.2+2.2

VRF18

1st RF

1.825

450

4.7

VRF18_2

2nd RF
GPU OD
IO App.

1.825
1.05~1.25 (50mV/step)
1.8

450

10

600

4.7

1.8/2.5

100

2 C315

2 C314

1 C312

2
0.1U_0402_25V6

2
0.1U_0402_25V6

<5>

<22>

<22>

VA
Analog
LDO

VRF28_1

MDSYS

2.85

200

VRF28_2

General

1.8/2.85

200

2.2

VTCXO_1

MDSYS

2.8

40

1

VTCXO_2

MDSYS

1.8/2.8

VCAMA

VCAMA

VIO28
VAST
Digital
LDO

A

RTC

40

1

1.5/1.8/2.5/2.8

200

2.2

2.8

400

2.2

0.9/1.0/1.1/1.2

300

2.2

3.3

200

1

VMC

T-Card

1.8/3.3

200

1

VMCH

T-Card

3.0/3.3

800

4.7

VEMC_3V3

eMMC (Core)

3.0/3.3

800

4.7

VEMC_1V8

eMMC

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

2.2

VGP1

VCAMD

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

400

2.2

VGP2

VCAM_IO

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

VGP3

VCAM_AF

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

VIBR

CS_P
CS_N

U18

VREF

CHD_DM

E10
F10
J10
K10
F9
G9
J9
K9
E11
F11
J11
K11
F8
J6
K8
H8
H7
H5
J8

FGP_IC

FGN_IC

@ PR41

PR40 @
0_0402_5%

0_0402_5%

CHG_DP
AVDD33_RTC
CHG_DM
GND_VPROC
GND_VPROC
GND_VPROC
GND_VPROC
GND_VCORE
GND_VCORE
GND_VCORE
GND_VCORE
GND_VM
GND_VM
GND_VM
GND_VM
GND_VSRAM
GND_VPA
GND_VPA
GND_VRF18
GND_VRF18_2
GND_VIO18
GND_VIO18

VM_PMU
C335 4.7U_0603_6.3V6K
2
1

L304
1
B10VSRAM_SW

1UH_VLS252010ET-1R0N_30%
2

VSRAM_PMU

D13
3G@

1
H2 VPA_SW
3G@ L305
D2

D311
1

DVDD_SRAM

RB521CM-30TR2
2

2
2.2UH_PHI25201B-2R2MS_20%

<4>

3G@

3G@ L306
1
2
E2 VRF18_1_SW
2.2UH_PHI25201B-2R2MS_20%
E3

CTP/CMMB

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

CTP/CMMB

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

CTP/CMMB

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

VSIM1

VSIM1

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

Security Classification

VSIM2

VSIM2

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

Issued Date

VIBR

Vibrator

1.2/1.3/1.5/1.8/2.5/2.8/3.0/3.3

200

1

VRTC

RTC Block

2.8

2

1~22

VPA_PMU
C337
2.2U_0603_10V7K
1
2

VPA_PMU

VRF18_PMU
3G@C338 4.7U_0603_6.3V6K
3G@C338
1
2

1
2
F2 VRF18_2_SW
2.2UH_PHI25201B-2R2MS_20%
E4
DVDD_GPU_R

@C342
@
C342
2

<4>

VRF18_PMU

L308
1
2
G2
VIO18_SW
2.2UH_PHI25201B-2R2MS_20%
F4

VGPU_PMU
4.7U_0603_6.3V6K
1

VGPU_PMU

1
C343
2

2
R329
0_0402_5%

4.7U_0603_6.3V6K
1

VDD18_6583
C

XIN
XOUT
RTC_XOSC32_ENB
RTC_GPIO
RTC_32K1V8
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_IO
GND_IO
GND_DIG
GND_DRV
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO

T17
R16
P17
R15
N15
P14
T14
H18
L18
L17
L13
K12
E18
L15
L16
M16
N16
D16
F15
G16
G17

VA_PMU
VTCXO_1_PMU
VTCXO_2_PMU
VCAMA_PMU
VAST_PMU
VDD28_6583
VUSB_PMU
VMC_PMU
VMCH_PMU
VEMC_3V3_PMU
VEMC_1V8_PMU
VGP1_PMU
VGP2_PMU

1

C340
1U_0402_6.3V6K

V14

2
1U_0402_6.3V6K

2

1

VIBR_PMU
C1750 C346 @
1U_0402_6.3V6K
18P_0402_50V8J

C344 @
1U_0402_6.3V6K

C345 @
1U_0402_6.3V6K

RF@

V2

VRTC

W1
V1
U2
U3
A9
L10
A1
L11
L8
L9
M10
E6
M6
F6
E15
M11
M8
M9
P11
T8
V6
W18

RF@
C1752
18P_0402_50V8J

TP1375
TP1376

M15

1
V15
C328

2

VGP5_PMU
VGP6_PMU
VSIM1_PMU
VSIM2_PMU

RTC32K2V8 <21,9>
RTC32K1V8 <5,7>

<24>

R1855
0_0402_5%

@

32K_OUT

<24>

32K_IN

B

@

VRTC

Compal Electronics, Inc.

Compal Secret Data
2012/11/03

Deciphered Date

2013/11/03

Title

MT6329 PMIC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

4

VSRAM_PMU

C336
4.7U_0603_6.3V6K
2
1

A

VGP6

5

VM_PMU

DDR3VCCIO

MT6320GA-A_TFBGA_216P

VGP5

VGP4

Vibrator

MT6168

VUSB

2.2

V18

CHD_DP

1

VIO18

DVDD18_DIG

BC 1.1
<5>

GND_DCDC

2000

0.7~1.25 (DC/DC)

DVDD18_IO
DVDD18_IO

GND_VREF

2

0.7~1.25 (DC/DC)

MDSYS/Infra

1
1U_0402_6.3V6K

CPU

VCORE

1
1U_0402_6.3V6K

VPROC

Iout (mA)

V17
U17

2

Buck

Application

B1

1

B

Cap Value (uF)

Symbol

A6
M1

AVDD18_LDO

GAS GAUGE

GND_DCDC

Vout (V)

1 C313

1 C307

T18

2.2U_0402_6.3V6M2

1 C305

1 C306
2.2U_0402_6.3V6M2

2.2U_0402_6.3V6M2

1 C303

1 C302

1 C304
2
4.7U_0603_6.3V6K

2
4.7U_0603_6.3V6K

1 C301

GND_DCDC

2
4.7U_0603_6.3V6K

2
R338
0_0402_5%

2
4.7U_0603_6.3V6K

1

0.68UH_VLS252010ET-R68N_30%
2
D310 RB521CM-30TR2
1
2

C15

VCORE_PMU

<4>

LDO OUTPUT

@

VDD18_6583

C334 4.7U_0603_6.3V6K
2
1

<4>

L307 @

VBAT_VPROC
VBAT_VPROC
VBAT_VCORE
VBAT_VCORE
VBAT_VM
VBAT_VM
VBAT_VM
VBAT_VSRAM
VBAT_VPA
VBAT_VRF18
VBAT_VRF18_2
VBAT_VIO18

L303
A15 VM_SW 1
A16

VCORE_PMU

DVDD

2

C341
2
1

2

D302

3

VBAT

22U_0603_6.3V6M

@

HOMEKEY

D

DVDD_DVFS
<4>
GND_DVDD_DVFS

L302 0.68UH_VLS252010ET-R68N_30%
B11 VCORE_SW
1
2
B12
D309 RB521CM-30TR2
1
2
D14

1

B3
H13

VPROC_PMU

C318
1U_0402_10V6K

1

@ R315 1K_0402_1%

VPROC_PMU
C333 4.7U_0603_6.3V6K
2
1

1

2

TP1379

0.68UH_VLS252010ET-R68N_30%
2

E13
F13

2

B8
C3

PWRAP_EVENT
<5> EINT_PMU

VCORE_FB

SRCLKEN_PERI
SRCLKEN_MD2
SRCVOLTEN
PWRKEY
PMU_TESTMODE
RESETB
SYSRSTB
FSOURCE

L301
B13VPROC_SW1
B14

C638 1000P_0402_50V7K
1
2

C320
1U_0402_6.3V6K

A7
B7
B6
D5

PWRAP_SPI0_CLK
PWRAP_SPI0_CSN
PWRAP_SPI0_MO
PWRAP_SPI0_MI

<5>

C635 1000P_0402_50V7K
1
2

2

C4
A2
A4
G15
T16
G13
A3
C9

2
R339
0_0402_5%

<5>
<5>
<5>
<5>

VM_SW

1

WATCHDOG_B

C646 1000P_0402_50V7K
1
2

2

1
@

VCORE_SW

3G@

1

1U_0402_10V6K

2

C317

1

1

SYSRST_B
<5>

VCORE
VCORE
CONTROL SIGNAL

<5,7> SRCLKENA
<5> SRCLKENA2
1<5,7> SRCVOLTEN
R316 2 1K_0402_1%

PWRKEY

C647 1000P_0402_50V7K
1
2

VPA_SW

RB521CM-30TR2
2

C324 22P_0402_50V8J
1
2

<11,15,5,7>

@

TP1377

VPROC_FB
GND_VPROC_FB

D308

1

2

<11,15>

2

BATON
TREF
C316
1U_0402_10V6K

<22>
<22>

BUCK OUTPUTVPROC
VPROC

E14
D15

1

TP1368

KPLED
FLASH

1

CHR_LDO

D

CHARGER
VCDT
AVDD28_CHRLDO
VDRV
ISENSE
BATSNS
BATON
TREF
PCH_DET

C17
C18
B18

0_0402_5%

W17
U16
K15
W15
W16
V16
U15
J16

ISINK0
ISINK1
ISINK2

2

VCDT

DRIVER

PWM
VMSEL1
VMSEL2

R314

ISENSE
BATSNS

C1
C2
B2

2

<22>
<22>
<22>

VPROC_SW

U301A

@R330
@
R330 4.7K_0402_1%
2
1
2
1
R331 4.7K_0402_1%

VDD18_6583
<22>

H
H

1

H
L

1

L
H

2

VMSEL1

DDR3/1.5V

2

L
L

VMSEL2

DDR3L/1.35V

1

DDR3U/1.25V

1

TP321

LPDDR2/1.2V

PMIC

2

C319 22P_0402_50V8J

4

TP320

5

3

2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013

1

23

Rev
0.2
of

28

5

4

3

2

1

PMIC

D

D

VDD18_6583

Digital
U301B

EINT_CHG_STAT
BAT_ID

0801 ADD

@2
@2

1
1

R319 0_0201_5%
R320 0_0201_5%

K6
L6
L4
L5

SCL4

<22,24>

SDA4

SCL5
SDA5
@
@

2 R317
2
R318

1 0_0201_5%
1
0_0201_5%

SCL6
SDA6

SCL6
SDA6

<22>
<22>

<5>
<5>
<5>

SIM1_SCLK
SIM1_SIO
SIM1_SRST

VSIM2_PMU

J1
D8
M3
B4
H1
E7
M2
B5

R312 0_0402_5% -22mil
2

W10
B9
D7
F7
C6
D6
C7

ADC_DAT_IN
ADC_CLK
ADC_WS
DAC_DAT_OUT
DAC_CLK
DAC_WS

SPK_P

VBAT_AUD

AVDD28_AUD
AVSS28_AUD
AVSS28_AUD

ADC_DAT
ADC_CK
ADC_WS
DAC_DAT
DAC_CK
DAC_WS

AVDD18_AUD
AVSS18_AUD
AVSS12N_AUD

W2

@ PAD TP1363

W3

DVDD_VSIMLS1
SIM1_AP_SCLK SIMLS1_SCLK
SIM1_AP_SIO
SIMLS1_SIO
SIM1_AP_SRST SIMLS1_SRST

J3
L3
J2

DVDD_VSIMLS2
SIM2_AP_SCLK SIMLS2_SCLK
SIM2_AP_SIO
SIMLS2_SIO
SIM2_AP_SRST SIMLS2_SRST

K2
L2
L1

SIM1_CLK
SIM1_DATA
SIM1_RST

SCL5

MICBIAS0
2
@

C1753
18P_0402_50V8J
EMC@ 1

MICBIAS1

<16> AU_VIN0_P
<16> AU_VIN0_N
<8> AU_VIN1_P
<8> AU_VIN1_N

TP327

SDA5

V13
W13

AU_MICBIAS0
AU_MICBIAS1

AU_FLYP

R12
T12
V12
V11
U12
U11

AU_FLYN
AU_VIN0_P
AU_VIN0_N
AU_VIN1_P
AU_VIN1_N
AU_VIN2_P
AU_VIN2_N

ACCDET
HSN
HSP

TP328

V7
W7
W6

MT6320GA-A_TFBGA_216P
@

HPR
HPL

AU_REFN
AU_FMINL
AU_FMINR

CLK_26M

Change 0510

@ PAD TP1373

C325 1U_0402_10V6K
1
R11 2
T11
W12

P8
R8

C326
1
0_0402_5% -22mil
1
2

W9

AU_FLYP

U9

AU_FLYN

2
C

2.2U_0402_6.3V6M

ACCDET

U13
U8
T9

2.2U_0402_6.3V6M
2

VDD18_6583

R313

1

V5

C323

@

VSIM1_PMU

<5>
<5>
<5>
<5>
<5>
<5>

VDD18_6583

0528 Update for power
ADD R317 R318 for power 08/02

KP_ROW0
KP_ROW1
KP_ROW2
KP_ROW3
KP_ROW4
KP_ROW5
KP_ROW6
KP_ROW7

1

VBAT

SPK_N

1
2
C327
1U_0402_10V6K

<22>

SCL6
SDA6

N2
N1
R1
R3
T3
M4
M5
P2

SCL_2
SDA_2

<22,24>
<22,24><22,24>

2

C

KROW0

SCL_1
SDA_1

SCL4
SDA4

U301C
R311 0_0402_5% -22mil
2
W4
C322 2.2U_0402_6.3V6M VBAT_SPK
1
2
U4
GND_SPK

1

<11,15>
TP326

SCL_0
SDA_0

1

VBAT

C442
1U_0402_10V6K

<18> LTE_ON_OFF#
<18> Wake_ON
<22> GPIO_CHG_EN

KP_COL0
KP_COL1
KP_COL2
KP_COL3
KP_COL4
KP_COL5
KP_COL6
KP_COL7

R304 4.7K_0201_5%
2
1

<11,15> KCOL0
<15> KCOL1
<18> LTE_RESET
<18> GPS_OFF#

K5
K4

R303 4.7K_0201_5%
2
1

U1
R2
T1
T2
R4
N5
P4
P5

R302 4.7K_0201_5%
2
1

R301 4.7K_0201_5%
2
1

Audio

<8>

@
0_0402_5% 0702 ADD
2 R416
1
2
1
R417
0_0402_5% @

T7
V8

R10

SYSCLK_PMU

AU_HPR

<12>

AU_HPL

<12>

<7>

MT6320GA-A_TFBGA_216P

VDD18_6583

B

100K_0201_5%
1

100K_0201_5%
1

R305
2

R306
2

@

0528 Update for power

0521 DEL X604

SCL6

TP324

SDA6

TP325

B

X301

1
<23>

2

32K_IN

32K_OUT

<23>

32.768KHZ_12.5P_1TJF125DP1A000D

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

Deciphered Date

2013/11/03

Title

MT6329 PMIC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
0.2

ZEJ00 -LA-A791P
Sheet

Thursday, August 08, 2013
1

24

of

28

5

4

3

2

1

D

D

C

C

B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/11/03

2013/11/03

Deciphered Date

Title

LED Backlight Driver

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
0.2

ZEJ00 -LA-A791P

Thursday, August 08, 2013

Sheet
1

25

of

28

5

4

3

2

1

5V Adapter

VBUS

0

PWR Key
VBAT_SUPPLY

2710mAh
Battery 1S1P

BQ24196
Charger

2

0

VBAT

VBAT_VPROC

D

U201

MT6320

VCORE

VBAT_VSRAM

VSRAM

VBAT_VM

VM

BUCK

VIO18

7

VPROC

VBAT_VCORE

3
8
9
4

VIO18

VRF18_PMU

VBAT_VRF18-2

VRF18-2

VGPU_PMU

VBAT_VPA

VPA

VA
VRF28_1

VRF28_1_PMU

VRF28_2

VTCXO_2_PMU

VCAMA

VCAMA_PMU

6

VAST

5

VIO28

10

VUSB

11

VMC

11

VMCH

LDOs

VBAT_LDOS3
C

10

VEMC_3V3

10

VEMC_1V8

VBAT_LDOS4

VGP1

VBAT_LDOS5

200 mA

VGP4

200 mA

VSIM1

VRTC

1.8

DVDD18_PLLGP

R1637

1.8

AVDD18_MEMPLL

200 mA

R1627

1.8

DVDD18_MIPITX

1.8

DVDD18_MIPIRX

1.8

DVDD18_MIPIIO

1.8

AVDD18_USB_P0

1.8

AVDD18_USB_P1

1.8

DVDD28_BPI

1.8

DVDD28_BSI

R1629

R1645

R1643

1.8

DVDD18_BSI

200 mA

R1658

1.8

DVDD18_NML1

VEMC_1V8_PMU

400 mA

R1659

1.8

DVDD28_NML2

R5260
3.3

(+VBATA_MODEM)

1.8

DVDD28_NML3

1.8

DVDD18_MC12

R1644

1.8

DVDD18_NML4

R1633

1.8/2.5

ADVDD18_MD

1.8/2.5

ADVDD18_AP

2.8

ADVDD28_DAC

3.3

ADVDD33_USB_P0

3.3

ADVDD33_USB_P1

1.35

DVDD18_EMI

200 mA

200 mA
200 mA

200 mA
200 mA

R1635

2 mA

VRTC

R1628
R1652
R1639

PJ1

小小)

USIM VCC
P-Sensor

VDD

3.3

MICBIAS1

JP8

Audio jack
VDD

200 mA

R1654
U1(

D

C

LTE NGFF Card

JSIM1
VCC

VEMC_3V3_PMU

VIBR_PMU

1

AU_MICBIAS0

800 mA

VSIM2_PMU

VIBR

R1636

800 mA

VMCH_PMU

VSIM1_PMU

VSIM2

600 mA

100 mA

200 mA

VMC_PMU

VGP6_PMU

DVDD18_MD

200 mA

VUSB_PMU

VGP6

AMP

VBAT_AUD

400 mA

VDD28_6583

VGP5_PMU

1.8

300 mA

VAST_PMU

VGP5

R1632

200 mA

VGP2_PMU

VGP3

R312

450 mA

40 mA

VGP1_PMU

VGP2

VBAT_LDOS6

DVDD_SRAM

MT6320
VBAT_SPK

40 mA

VTCXO_1_PMU

VTCXO_2

0.7~1.25 (DC/DC)

1.825 /
DVDD_GPU
1.05~1.25 (50mV/step)

200 mA

VRF28_2_PMU

12

VTCXO_1

VBAT_LDOS2

VA_PMU

R311

R1655

450 mA

VPA_PMU

5

DVDD

AU_MICBIAS1

600 mA

VDD18_6583

DVDD_DVFS

0.7~1.25 (DC/DC)

R1651

1100 mA

VM_PMU

MT8389

0.7~1.25 (DC/DC)

VBAT

R1648

600 mA

VSRAM_PMU

VRF18-1

R1650

1200 mA

VCORE_PMU

VBAT_VRF18-1

VBAT_LDOS1

2000 mA

VPROC_PMU

R1640
R1766

1.2/1.3/1.5/1.8/2.5
/2.8/3.0/3.3

DVDD18_MC0

1.8/3.3

DVDD33_MC1
3.3V

R1641

DVDD33_MC2

JP5/JP7 CAM(5M/3M)
B

U2(

大小)

VDD

P-Sensor

DVDD1.8

3.3

U8

AVDD2.8 1.5/1.8/2.5/2.8

G5243T

U21

JP8

LCD

Backlight

3.2~4.2

LCD

RP11N33

U4030

1.2/1.3/1.5/1.8
/2.5/2.8/3.0/3.3

3.3

3M
5M
R1725/R5256

U5/U6

DDR3L

3M
5M
R1724/R1727

1.35

VDD

1.35

VDDQ

U146
VDD

R546

3.3

JP1

HDMI

JP10

VDD

5V

VDD1,.8

LDO
LDO

VDD
VLOGIC

VCC

1.8

VCCQ

U1

MTK8193

3.3

AVDD33

VDDTX

Touch Board
1.8

R5205

3.3

R5178
R1683

U4029

EMMC

3.3

HP SWITCH

R543

G5910

U502

1.2

AVDD12

1.8

DVDDIO18

G-Sensor+GYRO
2.8
1.8

R4902
R1723

R4901

A

R1720
R1715

U822

WLAN

1.8

DVDDIO18

2.8

DVDDIO_SD1

2.8

VRTC

VCC

JP12

SD

VDD

3.3

A

VBAT

R1707

JP10

B

R1761

Vibrator

U143

AMP

VDD

5V

Security Classification
Issued Date

R1760

2.8

Compal Electronics, Inc.

Compal Secret Data
2012/11/03

Deciphered Date

2013/11/03

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
A1

POWER TREE
Document Number

5

4

3

2

Rev
0.2

ZEJ00 -LA-A791P
Thursday, August 08, 2013

Date:
1

Sheet

26

of

28

5

4

3

2

1

DVT-Phase
2013/7/8
Add C1752,C1750 for RF request
change PD11 reserve
change PC31 0805 to 0603 for ME request.

D

PVT_Phase
2013/8/6
PR30, R339, R321, R322, R323, R324, R325, R326,
R327,R338, R1855, R329 change short pad.
PR31 change 270 ohm. setting input current limit 1.8A

D

C

C

B

B

A

A

2012/11/03

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/11/03

Deciphered Date

POWER PIR

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
0.2

@+02''6

Thursday, August 08, 2013

Sheet
1

27

of

28

5

P4
P5
P6
P7
D

P8
P12
P13
P15
P17
P23
P24

4

3

2

1

ADD C1757 C1756 C1686 C1687 FOR RF requirement.
ADD C1611 C1754 FOR RF requirement.
DEL Test point for RF -- TP04 TP05 TP07 TP08 TP09 TP10 TP11 TP12 TP1374 TP14 TP15 TP16 TP17 TP24 TP26 TP27 TP28 TP31 TP32 TP33
ADD C1755 FOR RF requirement.
Change U8 /C2650 Package for ME requirement.
ADD C6 for EMI/ESD requirement.
ADD MPU-6515(U4032)/C4177/R4915/R4914 FOR reserve MPU-6515
ADD C1751 FOR RF requirement.
ADD D806 FOR SW2 (ESD requirement.)
ADD C1684 FOR RF requirement.
ADD C1750 C1752 FOR RF requirement.
ADD C1753 FOR RF requirement.

D

Q1 Q2 QL1 Change BOM from SB000002X00 to SB00000S700
C1890 C4175 Change PN From SE00000V600 to SE00000V680
C

C

C TEST
P5 DEL R1872 ADN R1869
P5 ADD TP1378
P7 Change R5227 BOM Structure to @
P8 ADD C55 FOR EMI ESD
B

P12 ADD D312 R1269 R1270 C1416 C1420 FOR Audio

B

P15 Change SW1 SW2 PCB Footprint
P18 ADD R5271 AND R5272 FOR WAKE UP

A

A

2012/11/03

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/11/03

Deciphered Date

HW PIR

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev


ZEJ00 -LA-A791P

Thursday, August 08, 2013

Sheet
1

28

of

28

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