Quanta R63 Schematics. Www.s Manuals.com. R1a Schematics
User Manual: Motherboard Quanta R63 Intel - Schematics. Free.
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1 2 3 4 5 6 AMD PG.36 +1.05V PG.37 ϭϲϬϬDdͬƐ SODIMM1 CPU Core DDR3 L Channel A Max. 4GB PG.12 PG.40~41 DDR3L ϭϲϬϬDdͬƐ SODIMM2 PG.38 DDR3 L Channel B Max. 4GB PG.13 Charge INTEL Haswell WƌŽĐĞƐƐŽƌ͗ĂƵůͬYƵĂĚŽƌĞ WŽǁĞƌ͗ϯϳͬϰϳ;tĂƚƚͿ WĂĐŬĂŐĞ͗ƌW'ϵϰϳ ^ŝnjĞ͗ϯϳ͘ϱdžϯϳ͘ϱ;ŵŵͿ FDI Dis-Charge A PCI-E x8 Mars / SUN XT ĞW;ϱ͘ϰ'ďͬƐͿ PP;PP 7'3:: PG.14~20 /;ϱ͘ϰ'ďͬƐͿ DDR3 900MHz VRAM 128Mx16x8,128bit PG.2~5 PG.35 B 8 R63 INTEL SYSTEM DIAGRAM +3V/+5V S5 A 7 PG.21~22 DMI B PG.39 +VGACORE PG.33 ODD PG.33 PG.42 +1.5 VGA PG.43 SATA1 Lynx Point 3&,([ LANE2 RTL8166EH 10/100 WLAN BT COMBO PG.30 DP Port B PG.25 USB 2.0 WĂĐŬĂŐĞ͗&'ϲϵϱ USB 3.0 PORT10 PG.34 ^ŝnjĞ͗ϮϬdžϮϬ;ŵŵͿ PORT0,1 PG.29 RTS5237 PG.27 LPC KBC EnE KB3940QF A1 Speaker AUDIO CODEC PG.31 D TPPG.32 Stackup TOP GND IN1 IN2 VCC BOT USB2.0 Ports PG.6~11 Card Reader SMBUS KB PG.32 C PG.25 PORT4 PORT1,2 USB 2.0 LANE3 PG.34 CRT USB3.0 Ports Webcam X2 PG.29 3&,([ Accelerometer HDMI CRT WŽǁĞƌ͗ϯ͘ϱtĂƚƚ LANE1 LAN C INTEL PCH LVDS PG.26 +1.0V/+1.8/ +3 VGA PG.44 ZdϮϭϯϲ^ͬZ >s^/ŶƚĞƌĨĂĐĞ WƚŽ>s^ŽŶǀĞƌƚĞƌ PG.25 W'Ϯϯ eDP SATA0 HDD ROM FANPG.32 PG.31 HP/MIC PG.28 PG.29 ALC 3227 PG.28 Analog MIC 352-(&75 4XDQWD&RPSXWHU,QF PG.29 1% Size Custom Document Number 2 3 4 5 6 7 Rev 1A BLOCK DIAGRAM Date: Friday, December 21, 2012 1 D Sheet 1 8 of 44 4 Haswell 3 2 Processor (DMI,PEG,FDI) 1 U24A U24B Host CLK: Trace length < 11000 MILS Trace spacing = 15 ,20 MILS, Impendence 90 ohm PEG_COMP 6 *0_4/S FDI_CSYNC_R H29 R71 FDI_CSYNC J29 FDI_INT DPB_LANE0_N DPB_LANE1_N DPB_LANE2_N DPB_LANE3_N DPB_LANE0_P DPB_LANE1_P DPB_LANE2_P DPB_LANE3_P 26 IN_D2# 26 IN_D1# 26 IN_D0# 26 IN_CLK# 26 IN_D2 26 IN_D1 26 IN_D0 26 IN_CLK T28 T30 U29 U31 U28 U30 V29 V31 T34 U35 U32 U33 U34 V35 T32 V33 C FDI_CSYNC & FDI_INT Trace length < 10000 Mils Impendance = 50 ohm P29 N28 P31 N30 R29 P28 R31 P30 eDP_RCOMP 6,24,25 R59 *0_4 INT_eDP_HPD_Q EDP_DISP_UTIL 24 24 24 24 E24 R27 P27 EDP_AUXP N27 EDP_AUXN M27 EDP_AUXP EDP_AUXN EDP_TXP0 R35 EDP_TXP1 P34 EDP_TXP0 EDP_TXP1 FDI_INT FDI_CSYNC DDIB_TX#[0] DDIB_TX#[1] DDIB_TX#[2] DDIB_TX#[3] DDIB_TX[0] DDIB_TX[1] DDIB_TX[2] DDIB_TX[3] DDIC_TX#[0] DDIC_TX#[1] DDIC_TX#[2] DDIC_TX#[3] DDIC_TX[0] DDIC_TX[1] DDIC_TX[2] DDIC_TX[3] DDID_TX#[0] DDID_TX#[1] DDID_TX#[2] DDID_TX#[3] DDID_TX[0] DDID_TX[1] DDID_TX[2] DDID_TX[3] eDP_RCOMP EDP_DISP_UTIL eDP_HPD eDP_AUX eDP_AUX# eDP_TX[0] eDP_TX[1] B 24 24 EDP_TXN0 P35 EDP_TXN1 N34 EDP_TXN0 EDP_TXN1 eDP_TX#[0] eDP_TX#[1] PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15] PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 R537 EC_PECI C770 AR27 31,40 R263 H_PROCHOT# C38 Cb J35 G34 H33 G32 H31 H30 B33 A32 C31 B30 C29 B28 C27 B26 C25 B24 C_PEG_TX0 C_PEG_TX1 C_PEG_TX2 C_PEG_TX3 C_PEG_TX4 C_PEG_TX5 C_PEG_TX6 C_PEG_TX7 R354 +1.05V PRDY# PREQ# AT28 PM_SYNC_R *0_4/S C729 *0.1U/10V_4 10K_4 AC10 R531 R532 *750/F_4 HSW_RPGA_EDS_PGA +3VS5 PM_DRAM_PWRGD_C (50ohm) Trace Length: < 1 inches R75 100K_4 10/22: SI modify R66 100K_4 C44 0.1U/10V_4 12,13 +1.35V_CPU R80 8 1.8K/F_4 U2 4PM_DRAM_PWRGD_C R65 *0_4/S 0.047U/10V_4 R78 R79 3.3K_4 *MEK500V-40 3 INT_eDP_HPD_Q 2 Q12 1 A EDP_HPD 24,25 PEG_TX[0..7] 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 14 PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 C_PEG_TX#0 C_PEG_TX#1 C_PEG_TX#2 C_PEG_TX#3 C_PEG_TX#4 C_PEG_TX#5 C_PEG_TX#6 C_PEG_TX#7 C697 C707 C703 C714 C704 C700 C716 C733 PM_DRAM_PWRGD_R (50ohm) Trace Length: 0.5~1 inches PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 R138 DBR# BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7] ME2N7002E 0.22uF AC coupling Caps for PCIE GEN1/2/3 AP3 AR3 AP2 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 R132 AR29 AT29 XDP_PRDY# XDP_PREQ# AM34 AN33 AM33 XDP_TCLK XDP_TMS XDP_TRST# AM31 AL33 XDP_TDI_R XDP_TDO 31 R250 R526 R525 D 100/F_4 75/F_4 100/F_4 CPU XDP TP36 TP39 XDP_DBRST# AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28 XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7 *1K_4 +3V XDP_DBRST# C 6 TP101 TP53 TP59 TP99 TP95 TP56 TP97 TP58 R471 *1K_4 R785 *0_4/S 3 CPU_DRAMRST#_R DRAMRST_CNTRL_PCH *0_4 R468 DRAMRST_CNTRL_EC *0_4 R467 *0_4/S 1 CPU_DRAMRST# Q29 *ME2N7002E B R464 *4.99K/F_4 C628 *0.047U/10V_4 DRAMRST_CNTRL_DDR 0529 remove R825 pull hi due to EC is output pin +VCCIO_OUT 4,40 +VCCIOA_OUT 4 +1.05V 4,9,10,11,31,34,37 +1.35V_CPU 3,4,12,13,38 +1.35VSUS 3,4,12,13,38 +3VS5 6,7,9,10,34,36,38,39,42,44 +3V 6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 XDP_TDO XDP_TMS XDP_TDI_R XDP_PREQ# XDP_TCLK XDP_TRST# 62_4 *10K_4 *10K_4 +VCCIO_OUT R234 R239 R226 R269 R246 R519 51_4 *51_4 *51_4 *51_4 51_4 51_4 +1.05V A check 24.9/F_4 PEG_COMP 352-(&75 4XDQWD&RPSXWHU,QF 1% 3 8 8 DDR3 DRAM RESET H_PROCHOT# R257 CLK_DPLL_SSCLKP R128 CLK_DPLL_SSCLKN R129 0.22uF AC coupling Caps for PCIE GEN1/2/3 4 8 8 TP42 TP41 TP94 Size Custom Document Number 2 Rev 1A SNB 1/4 (PCIE&DMI&FDI) Date: Friday, December 21, 2012 5 CLK_DPLL_NSCCLKP CLK_DPLL_NSCCLKN TP100 TP57 AP33 R472 DDR3_DRAMRST# PEG_RCOMP Trace length < 400 MILS Trace width = 12 MILS Trace spacing = 15 MILS R219 100K_4 CPU_DRAMRST# CLK_DPLL_SSCLKP CLK_DPLL_SSCLKN 24.9/F_4 eDP_RCOMP eDP_RCOMP Trace length < 100 Mils Trace Width 20 Mils Trace Spacing 25 Mils +VCCIOA_OUT AN3 8 8 Processor pull-up (CPU) PEG_TX#[0..7] 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 0.22U/10V_4 CLK_DPLL_NSCCLKP CLK_DPLL_NSCCLKN DG 498556 -> 3.3K 10/15: SI Del +VCCIOA_OUT CLK_DPLL_SSCLKP CLK_DPLL_SSCLKN FOR DS3 C930 *0.047U/10V_4 DP & PEG Compensation +VCCIO_OUT 14 PM_DRAM_PWRGD_R 3,12,13 74AHC1G09GW PM_DRAM_PWRGD (50ohm) Trace Length: 2~7 inches PEG x8 disable (UMA only remove) 0_4 1 D15 E27 F27 H28 G28 10/18: SI modify DG 498556 -> 1.8K 2 51216PG CLK_CPU_BCLKP CLK_CPU_BCLKN R524 To change the resistor values in the DRAMPWROK logic to reduce the Trace Length < 6 inches +1.35VSUS leakage on VDDPWRGOOD C929 C688 C705 C698 C708 C699 C690 C715 C730 TDI TDO DDR3_DRAMRST#_R (50ohm) SM_DRAMPWROK Processor Input. 38 C_PEG_TX0 C_PEG_TX1 C_PEG_TX2 C_PEG_TX3 C_PEG_TX4 C_PEG_TX5 C_PEG_TX6 C_PEG_TX7 RESET# *1.5K/F_4 7/26: DB phase modify 10/12: SI modify R218 10K_4 SM_DRAMPW ROK CPU_PLTRST#R CPU_PLTRST# (50ohm) Trace Length: 10~17 inches HSW_RPGA_EDS_PGA 4/30 CRB V1.0 -> 10K UNCOREPW RGOOD AT26 PLTRST# TCK TMS TRST# PM_SYNC AL34 *0_4/S H_PWRGOOD_R PM_DRAM_PWRGD_R 9,31 CLK_CPU_BCLKP CLK_CPU_BCLKN SM_RCOMP[0] W:12mils/S:15mils/L: 500mils, SM_RCOMP[1] W:12mils/S:15mils/L: 500mils, SM_RCOMP[2] W:12mils/S:15mils/L: 500mils, *100/F_4 R533 R503 CPU RESET# SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] Rb R502 H_PWRGOOD THERMTRIP# PM_THRMTRIP#_R PM_THRMTRIP#R H_PWRGOOD (50ohm) Trace Length: 1~11.25 inches 8,14,27,30,31,34 PROCHOT# AM35 47P/50V_4 Rb need placment near PCH 4/30 CRB 1.0 Add 9 AM30 56.2/F_4 H_PROCHOT#_R SM_DRAMRST# FC_AK31 Cb need placment near VR THERMTRIP# (50ohm) Trace Length: 1.1~12 inches 9,31 PECI AK31 +VCCST PM_SYNC (50ohm) 6 PM_SYNC Trace Length: 1~11.25 inches C_PEG_TX#0 C_PEG_TX#1 C_PEG_TX#2 C_PEG_TX#3 C_PEG_TX#4 C_PEG_TX#5 C_PEG_TX#6 C_PEG_TX#7 CATERR# DPLL_REF_CLK DPLL_REF_CLK# E26 D26 *47P/50V_4 4/30 CRB 1.0 Add PROCHOT# (50ohm) Trace Length <11 inches H35 H34 J33 H32 J31 G30 C33 B32 B31 A30 B29 A28 B27 A26 B25 A24 43_4 Ca CLOCKS L29 L28 L31 K30 L33 K32 L35 K34 F29 E28 F31 E30 F35 E34 F33 D32 9,31 14 AN32 H_PECI SSC_DPLL_REF_CLK SSC_DPLL_REF_CLK# DDR3 MISC FDI_TX#[0] FDI_TX#[1] FDI_TX[0] FDI_TX[1] HPECI Ra,Ca need placement close to EC. Ra PEG_RX[0..7] SKTOCC# TP_CATERR# TP46 BCLK BCLK# JTAG & BPM 6 P33 N32 R33 P32 AP32 SKTOCC# MISC FDI_TXN0 FDI_TXN1 FDI_TXP0 FDI_TXP1 DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3] H_PECI (50ohm) Route on microstrip only TP50 Spacing > 18 mils Trace Length: 15 inch THERMAL 6 6 6 6 D17 C18 B18 A18 14 PWR MANAGEMENT DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 5 6 6 6 6 D18 C17 B17 A17 DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] M29 K28 M31 L30 M33 L32 M35 L34 E29 D28 E31 D30 E35 D34 E33 E32 3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 E23 PEG_RX#[0..7] PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] PCI EXPRESS* - GRAPHICS 6 6 6 6 D20 C20 B20 A20 PEG_RCOMPO DMI DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] FDI 6 6 6 6 D21 C21 B21 A21 Intel(R) DDI DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 eDP D 6 6 6 6 Haswell Processor (CLK,MISC,JTAG) 2 5 1 Sheet 2 of 44 5 4 3 2 1 Haswell Processor (DDR3) U24C U24D D D M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 C B 12 12 12 12 12 12 AR15 AT14 AM14 AN14 AT15 AR14 AN15 AM15 AM9 AN9 AM8 AN8 AR9 AT9 AR8 AT8 AJ9 AK9 AJ6 AK6 AJ10 AK10 AJ7 AK7 AF4 AF5 AF1 AF2 AG4 AG5 AG1 AG2 J1 J2 J5 H5 H2 H1 J4 H4 F2 F1 D2 D3 D1 F3 C3 B3 B5 E6 A5 D6 D5 E5 B6 A6 E12 D12 B11 A11 E11 D11 B12 A12 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] V5 U5 AD1 M_A_BS#0 M_A_BS#1 M_A_BS#2 RSVD_V10 must be grounded SA_CLK[2] SA_CLK#[2] SA_CKE[2] SA_CLK[3] SA_CLK#[3] SA_CKE[3] SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3] SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3] SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] SA_CAS# SA_RAS# SA_W E# AC7 V10 TP16 SA_CLK[1] SA_CLK#[1] SA_CKE[1] SA_BS[0] SA_BS[1] SA_BS[2] U8 U6 U7 M_A_CAS# M_A_RAS# M_A_WE# SA_CLK[0] SA_CLK#[0] SA_CKE[0] SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ RSCD_AC7 RSCD_V10 V4 U4 AD9 M_A_CLKP0 12 M_A_CLKN0 12 M_A_CKE0 12 V3 U3 AC9 13 M_B_DQ[63:0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 M_A_CLKP1 12 M_A_CLKN1 12 M_A_CKE1 12 V2 U2 AD8 V1 U1 AC8 M7 L9 M9 M10 M8 L7 L8 L10 AP15 AP8 AJ8 AF3 J3 E2 C5 C11 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 AP14 AP9 AK8 AG3 H3 E3 C6 C12 M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 V8 AC6 V9 U9 AC5 AC4 AD6 AC3 AD5 AC2 V6 AC1 AD4 V7 AD3 AD2 AM3 F16 F13 HSW_RPGA_EDS_PGA M_A_CS#0 M_A_CS#1 12 12 M_A_ODT0 M_A_ODT1 12 12 M_A_DQSN[7:0] 12 M_A_DQSP[7:0] M_A_A[15:0] M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 12 12 13 13 13 13 13 13 +SM_VREF SMDDR_VREF_DQ0_M3 SMDDR_VREF_DQ1_M3 *1K_4 R470 *1K_4 R469 SMDDR_VREF_DQ0_M3 SMDDR_VREF_DQ1_M3 M_B_BS#0 M_B_BS#1 M_B_BS#2 R7 P8 AA9 P7 R6 P6 M_B_CAS# M_B_RAS# M_B_WE# TP30 12 13 AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11 AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6 AJ4 AK4 AJ1 AJ2 AM1 AN1 AK2 AK1 L2 M2 L4 M4 L1 M1 L5 M5 G7 J8 G8 G9 J7 J9 G10 J10 A8 B8 A9 B9 D8 E8 D9 E9 E15 D15 A15 B15 E14 D14 A14 B14 AG8 R10 RSVD_R10 must be grounded SB_CLK[0] SB_CLK#[0] SB_CKE[0] SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] SB_CLK[1] SB_CLK#[1] SB_CKE[1] SB_CLK[2] SB_CLK#[2] SB_CKE[2] SB_CLK[3] SB_CLK#[3] SB_CKE[3] SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3] AA4 Y4 AF10 M_B_CLKP0 13 M_B_CLKN0 13 M_B_CKE0 13 AA3 Y3 AG10 M_B_CLKP1 13 M_B_CLKN1 13 M_B_CKE1 13 AA2 Y2 AG9 AA1 Y1 AF9 P4 R2 P3 P1 M_B_CS#0 M_B_CS#1 13 13 M_B_ODT0 M_B_ODT1 13 13 C DDR SYSTEM MEMORY B M_A_DQ[63:0] DDR SYSTEM MEMORY A 12 SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3] SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] SB_BS[0] SB_BS[1] SB_BS[2] SB_CAS# SB_RAS# SB_W E# R4 R3 R1 P2 AP18 AP11 AP5 AJ3 L3 H9 C8 C14 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7 AP17 AP12 AP6 AK3 M3 H8 C9 C15 M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN[7:0] 13 M_B_DQSP[7:0] 13 B R8 Y5 Y10 AA5 Y7 AA6 Y6 AA7 Y8 AA10 R9 Y9 AF7 P9 AA8 AG7 M_B_A[15:0] M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 13 RSVD_AG8 RSVD_R10 HSW_RPGA_EDS_PGA +1.35V_CPU CPU SM_VREF 8/31: Intel suggestion A R285 R283 A *0_6 *0_6/S R278 *1K/F_4 *0_6/S 1 R282 *1K_4 3 +VREF_CA_CPU +SM_VREF R261 1 *0_6 Q16 *ME2N7002E C400 R279 3 2 R260 2 +SM_VREF MAIND *0.1U/10V_4 DRAMRST_CNTRL DRAMRST_CNTRL_DDR *1K/F_4 DDR_VTTREF 12,38 352-(&75 4XDQWD&RPSXWHU,QF Q17 *ME2N7002E MAIND 10,39 +1.35V_CPU 2,4,12,13,38 +VREF_CA_CPU 12 2,12,13 1% Size Custom Document Number 5 4 3 2 Rev 1A SNB 2/4 (DDR3 I/F) Date: Friday, December 21, 2012 1 Sheet 3 of 44 5 4 3 2 1 Haswell Processor (POWER) POWER VDDQ Output Decoupling Recommendations +1.35V_CPU 4.2A +VCC_CORE C C695 22U/6.3VS_8 C667 22U/6.3VS_8 C271 22U/6.3VS_8 C666 *22U/6.3VS_8 C710 22U/6.3VS_8 C158 22U/6.3VS_8 C196 22U/6.3VS_8 C195 *22U/6.3VS_8 C713 22U/6.3VS_8 C269 22U/6.3VS_8 C683 22U/6.3VS_8 C645 22U/6.3VS_8 B C682 22U/6.3VS_8 C649 10U/6.3V_8 C159 22U/6.3VS_8 C694 10U/6.3V_8 C681 10U/6.3V_8 C712 10U/6.3V_8 VCC Output Decoupling Recommendations 470uFx4 7343 TOP socket side 22uFx8 0805 4 on TOP, 4 on BOT near socket edge 22uFx11 0805 TOP, inside socket cavity 10uFx11 0805 BOT, inside socket cavity A Y25 Y26 Y27 Y28 Y29 Y30 Y31 Y32 Y33 Y34 Y35 K26 F25 C648 22U/6.3VS_8 C161 22U/6.3VS_8 7343 BOT socket side 22uFx11 0805 5 onTOP, 6 on BOT inside socket cavity 10uFx10 0805 5 onTOP, 5 on BOT inside socket cavity +VCCIOA_OUT 2 +VCCIO_OUT 2,40 +VCCIO_PCH 10 +1.5V 6,7,8,10,28,34,38,44 +1.35V_CPU 2,3,12,13,38 +1.05V 2,9,10,11,31,34,37 +VCC_CORE 40,41 +VCCST 2 +1.35VSUS 2,3,12,13,38 C647 22U/6.3VS_8 C198 22U/6.3VS_8 For 65 degree, 1.8v limit, (SW) C643 22U/6.3VS_8 R774 16.5K/F_4 31 2 THRM_MOINTOR C160 22U/6.3VS_8 C692 22U/6.3VS_8 C62 0.1U/10V_4 1 C642 22U/6.3VS_8 R775 3.3K/F_4 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD C693 22U/6.3VS_8 K27 L27 T27 V27 N26 AL27 AK27 E17 W 32 AL16 AL13 J27 C221 22U/6.3VS_8 For 75 degree, 1.2v limit, (HW) C274 10U/6.3V_8 THRM_MOINTOR1 R776 C665 10U/6.3V_8 C197 10U/6.3V_8 C691 10U/6.3V_8 C272 10U/6.3V_8 C680 10U/6.3V_8 31 C54 0.1U/10V_4 C C243 10U/6.3V_8 4/30: CRB 1.0 add +1.05V C679 10U/6.3V_8 C664 10U/6.3V_8 C162 10U/6.3V_8 + C231 *330U/2V_7343 +VCCST R256 *0_8 C392 *22U/6.3VS_8 VCCIO_OUT VCCIO2PCH VCOMP_OUT VSS_AP35 AN35 +VCCIO_OUT_R *0_1206/S R513 +VCCIO_OUT 300mA A23 +VCCIO_PCH_R *0/F_1206 R466 +VCCIO_PCH 300mA F22 +VCCIOA_OUT_R *0_1206/S R87 +VCCIOA_OUT C381 *22U/6.3VS_8 Power Test Propose AP35 +1.05V VIDALERT# VIDSCLK VIDSOUT PW R_DEBUG VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP AM28 AM29 AL28 H27 H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT PWR_DEBUG_R AP34 AT34 AL22 AT33 AM21 AM25 AM22 AM20 AM24 AL19 AM23 AT32 VSS_SENSE VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 VCC101 VCC102 VCC103 VCC104 +VCCIO_OUT R510 4/30: DG 498550 0_4 R61 0_4 R518 Haswell PWR_DEBUG requires a 150-Ohm pull-up resistor to PCH 1.05-V VCC Core when routed to XDP TP1 R60 150/F_4 C753 10U/6.3V_6 +1.05V 0_6 CRB 1.0 stuff Layout note: It is recommended to shield VIDSOUT signal by routing it in between the VIDSCLK and VIDALERT# signals. AT35 AR35 AR32 AL26 AL35 AK35 R222 VR_SVID_CLK +VCC_CORE VCC_SENSE 40 VSS_SENSE 40 +VCCIO_OUT Place PU resistor close to CPU 100_4 Sense resistor should be placed within 2 inches (50.8 mm) of the processor socket Trace Impendence 50 ohm +1.35VSUS 40 Placement close to CPU. 7/26: DB sch modify, Del R23 SVID DATA Place PU resistor close to VR DG V0.7 -> 110 Ohm SCH V0.7 -> 130 Ohm R253 130/F_4 C235 0.1U/10V_4 C225 *0.1U/10V_4 Note: please keep plane is enough for VDDQ 4.2A A H_CPU_SVIDDAT VR_SVID_DATA Place PU resistor close to CPU The VIDALERT# signal must have a damping resistor to prevent overshoot C337 +VCCIO_OUT H_CPU_SVIDALRT# 3 C631 *4.7U/6.3V_6 CPU VDDQ SVID CLK +1.35V_CPU 100_4 B +VCCIO_PCH R462 0.1U/10V_4 R247 75/F_4 R248 43_4 40 P 352-(&75 4XDQWD&RPSXWHU,QF SVID ALERT DG V0.7 -> 44 Ohm SCH V0.7 -> 43 Ohm VR_SVID_ALERT# 40 1% Size Custom Document Number 2 Rev 1A SNB 3/4 (POWER) Date: Friday, December 21, 2012 4 *0_8 PWR_DEBUG_R H_CPU_SVIDCLK VCC_SENSE +1.05V R62 *10K_4 R223 HSW_RPGA_EDS_PGA 5 D IO Thrm Protect +3VPCU C273 22U/6.3VS_8 2 C646 22U/6.3VS_8 AB11 AB2 AB5 AB8 AE11 AE2 AE5 AE8 AH11 K11 N11 N8 T11 T2 T5 T8 W 11 W2 W5 W8 330uFx2 100K_4 NTC C285 22U/6.3VS_8 C270 22U/6.3VS_8 PEG AND DDR C644 22U/6.3VS_8 C194 22U/6.3VS_8 C284 22U/6.3VS_8 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 SVID C651 22U/6.3VS_8 C711 22U/6.3VS_8 C668 22U/6.3VS_8 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 SENSE LINES C286 22U/6.3VS_8 C709 22U/6.3VS_8 AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25 U25 U26 V25 V26 W 26 W 27 CORE SUPPLY C650 22U/6.3VS_8 D +1.35V_CPU 1 U24F +VCCIN 95A 1 Sheet 4 of 44 4 3 2 Haswell Processor (GND) D C B U24H VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 U24E TP98 TP96 AK34 AK5 AL1 AL10 AL11 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 E22 AL3 W9 AL4 AL5 AL6 AL7 AL8 AL9 AM10 AM13 AM16 AM19 E25 AM32 AM4 AM7 AN10 AN13 AN16 AN19 AN2 AN21 AN24 AN27 AN30 AN34 AN4 AN7 AP1 AP10 AP13 AP16 AP19 AP4 AP7 W 25 Y11 AR13 AR16 AR19 AR2 AR22 AR25 AR28 AR31 AR34 AR4 AR7 AT10 AT13 AT16 AT19 AT21 AT24 AT27 AT3 AT30 AT4 AT7 B10 B13 B16 B19 B2 B22 B34 B4 B7 C1 C10 C13 C16 C19 C2 C22 C24 C26 C28 C30 C32 C34 C4 C7 D10 D13 D16 D19 D22 D25 D27 D29 D31 D33 D35 D4 D7 E1 E10 E13 E16 E4 E7 F10 F11 F12 F14 F15 F17 F18 F20 F21 F23 F24 F26 F28 F30 F32 F34 F4 F6 F7 F8 F9 G1 G11 G2 G27 G29 G3 G31 G33 G35 G4 G5 H10 H26 H6 H7 J11 J26 J30 J32 J34 J6 K1 HSW_RPGA_EDS_PGA VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 RSVD K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 TP55 R786 *1K_4 12/11: Intel suggestion WW39 CPU date code can remove 49.9/F_4 R280 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG_RCOMP AT31 AT1 AT2 AD10 TP51 TP54 TP24 A34 A35 TP88 49.9/F_4 RSVD30 R124 AT20 AR20 AP20 AP22 AT22 AN22 AT25 AN23 AR24 AT23 AN20 AP24 AP26 AN25 AN26 AP25 AR21 AP21 AR23 AP23 W 29 W 28 G26 W 33 AL30 AL29 C35 B35 AL25 For CPU debug. TP9 TP10 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W 10 W3 W 35 W4 W6 W7 AR10 J28 H11 AL24 F19 T26 R201 49.9/F_4 RSVD38 RSVD39 W 30 W 31 TESTLO W 34 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] CFG[18] CFG[19] RSVD_TP RSVD_TP RSVD_TP RSVD_TP FC_G6 CFG_RCOMP RSVD RSVD RSVD RSVD RSVD RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD_TP RSVD_TP RSVD_TP RSVD_TP TESTLO_G26 RSVD RSVD RSVD RSVD_TP RSVD_TP RSVD_TP CFG4 (DP Presence Strap) CFG7 (PEG Defer Training) RSVD RSVD RSVD RSVD TESTLO R131 *6.04K_4 G6 AR33 AM27 AM26 F5 AM2 K6 E18 R130 *2.67K_4 ϭϬͬϭϮ͗^/ŵŽĚŝĨLJ ŶĞĂƌƚŚĞWƌŽĐĞƐƐŽƌƉŝŶ;ǁŝƚŚŝŶΕϭ͘ϱΗͿ U10 P10 B1 A2 AR1 E21 E20 C TP7 TP8 AP27 AR26 AL31 AL32 0 Enable; SET DFX ENABLED BIT IN DEBUG 1 , Disable; R272 *1K_4 CFG[6:5] (PCIE Port Bifurcation Straps) 11: 10: 01: 00: (Default) x16 - Device 1 functions 1 and 2 disabled x8, x8 - Device 1 function 1 enabled ; function 2 disabled Reserved - (Device 1 function 1 disabled ; function 2 enabled) x8,x4,x4 - Device 1 functions 1 and 2 enabled A Lane Reversed Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP PEG wait for BIOS training CFG2 R275 *1K_4 CFG4 R271 1K_4 CFG7 R273 *1K_4 CFG5 R274 1K_4 CFG6 R270 *1K_4 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 4 3 2 Rev 1A SNB 4/4 (GND) Date: Friday, December 21, 2012 5 6,31 CFG[3] (PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)) AK33 0 PEG train immediately following xxRESETB de assertion RSVD_TP RSVD_TP D EC_PWROK HSW_RPGA_EDS_PGA The CFG signals have a default value of '1' if not terminated on the board. CFG2 (PEG Static Lane Reversal) Normal Operation A NC RSVD RSVD_TP TP87 TP86 RSVD_TP RSVD_TP CFG3 1 RSVD C23 B23 D24 D23 B HSW_RPGA_EDS_PGA Processor Strapping Haswell Processor (RESERVED, CFG) RESERVED U24G A10 A13 A16 A19 A22 A25 A27 A29 A3 A31 A33 A4 A7 AA11 AA25 AA27 AA31 AA29 AB1 AB10 AA33 AA35 AB3 AC25 AC27 AB4 AB6 AB7 AB9 AC11 AD11 AC29 AC31 AC33 AC35 AD7 AE1 AE10 AE25 AE29 AE3 AE27 AE35 AE4 AE6 AE7 AE9 AF11 AF6 AF8 AG11 AG25 AE31 AG31 AE33 AG6 AH1 AH10 AH2 AG27 AG29 AH3 AG33 AG35 AH4 AH5 AH6 AH7 AH8 AH9 AJ11 AJ5 AK11 AK25 AK26 AK28 AK29 AK30 AK32 E19 1 CFG 5 1 Sheet 5 of 44 5 4 Lynx Point 3 2 (DMI,FDI,PM) 1 Lynx Point U33C DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 2 2 2 2 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_IREF *0_4/S 7.5K/F_4 DMI_COMP R672 R671 +1.5V BB21 BC20 BB17 BC18 BE16 AY17 AW 17 AV17 FDI_CSYNC FDI_INT DMI0TXN DMI1TXN DMI2TXN DMI3TXN FDI_IREF FDI_RCOMP DMI0TXP DMI1TXP DMI2TXP DMI3TXP TP16 TP5 TP15 TP10 TP17 TP13 DMI_IREF DMI_IRCOMP C 2 *0_4 R387 0_4 R606 0_4 XDP_DBRST# SYS_PWROK 6,40 IMVP_PWRGD 5,31 EC_PWROK EC_PWROK_R R651 31 SUSWARN#EC SYS_PWROK_R AD7 R612 R634 *0_4 0_4 EC_PWROK_R F10 R640 0_4 5/16 for DS3 31 B R604 R603 DNBSWON# AC_PRESENT AM1 0_4 RSMRST# 5/16 for DS3 31 XDP_DBRST#1 R573 12/17 PV modify 31 DSW VRMEN R6 SUSACK# R565 AB7 APWROK_R PM_DRAM_PWRGD H3 RSMRST# J2 0_4 SUSWARN# J4 0_4 DNBSWON#_R K1 0_4 E6 AC_PRESENT_R PM_BATLOW# K7 PM_RI# N4 SYS_PWROK_R TP75 C827 *0.1U/10V_4 AB10 25 AL39 FDI_CSYNC AL40 FDI_INT AT45 R714 *0_4/S AR44 R713 7.5K/F_4 SUSACK# SYS_RESET# SYS_PW ROK PW ROK APW ROK DRAMPW ROK RSMRST# DPW ROK W AKE# (+3V) CLKRUN# (+3VS5) SUS_STAT# / GPIO61 (SUS) (+3VS5) SUSCLK / GPIO62 (SUS) (+3VS5) SLP_S5# / GPIO63 ( SUS) SLP_S4# SUSW ARN#/SUSPW RDNACK/GPIO30 (SUS) SLP_S3# (+3VS5) PW RBTN# SLP_A# ACPRESENT / GPIO31(DSW ) SLP_SUS# BATLOW # / GPIO72 (SUS) TP21 G36 DISP_ON N36 DPST_PWM EDP_BKLTEN EDP_VDD_EN D EDP_BKLTCTL 2 DDPB_CTRLCLK DDPB_CTRLDATA +1.5V AV43 AY45 AV45 AW 44 AU42 AU44 C8 L13 PCH to Res routeing 37.5 ohm Impedance. Res to connector filter routeing 50ohm Impedance. for DS3 DSWVREN DPWROK PCIE_WAKE# AN7 CLKRUN# U7 SUS_STAT# R627 0_4 R661 *0_4 DPWROK_EC PCIE_WAKE# CLKRUN# 27,30,31,34 31 23 CRT_B 23 CRT_G 23 CRT_R 31 RSMRST# R430 150/F_4 R431 150/F_4 R432 150/F_4 M43 M45 R719 R717 DG V0.7 -> 33 ohm 23 HSYNC_COM SCH V0.7 -> 0 ohm 23 VSYNC_COM 0_4 PCH_SUSCLK CRT_DDC_CLK CRT_DDC_DATA R662 0_4 SUSC# 31 H1 R607 0_4 SUSB# 31 DAC_IREF U40 U39 CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRTN Reserve from EMI request CRT_B TP71 0_4 649/F_4 DAC_IREF (50ohm) Trace length < 500 MILS Trace spacing = 30 MILS TP72 C6 R663 PCH_HSYNC_R N42 PCH_VSYNC_R N44 7,31 TP107 F3 33_4 33_4 CRT_BLUE CRT_GREEN CRT_RED TP66 PCH_SUSCLK_L R599 Y7 T45 U44 V45 23 DDCCLK 23 DDCDATA R716 F1 H45 H43 K40 DDPB_AUXN DDPB_AUXP DDPB_HPD SDVO_CLK 26 SDVO_DATA 26 DPB_HPD_Q PD Res place close to PCH K3 Y6 R40 R39 R35 R36 DDPC_CTRLCLK DDPC_CTRLDATA K43 K45 K38 DDPC_AUXN DDPC_AUXP DDPC_HPD C N40 N38 DDPD_CTRLCLK DDPD_CTRLDATA J42 J44 H39 DDPD_AUXN DDPD_AUXP DDPD_HPD CRT_G CRT_R 5/16 for DS3 SLP_SUS#EC 31 LPT_PCH_M_EDS/BGA (DSW) RI# DSW K36 LVDS_BLON 2,24,25 2 TP12 TP7 System Power Management SUSWARN# SUSACK#EC 2 2 2 2 25 DMI0RXP DMI1RXP DMI2RXP DMI3RXP 5/16 for DS3 31 FDI_TXN0 FDI_TXN1 FDI_TXP0 FDI_TXP1 INT. HDMI 2 2 2 2 BD21 BE20 BD17 BE18 AJ35 AL35 AJ36 AL36 Digital Display Interface AY22 AP20 AR17 AW 20 FDI_RXN0 FDI_RXN1 FDI_RXP0 FDI_RXP1 LVDS DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMI0RXN DMI1RXN DMI2RXN DMI3RXN CRT 2 2 2 2 AW 22 AR20 AP17 AV20 FDI DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI D 2 2 2 2 ( DDI) U33D PMSYNCH (+3VS5) SLP_LAN# SLP_W LAN#/ GPIO29 ( DSW ) AY3 PM_SYNC G5 2 SLP_LAN# C577 C578 C579 *5.6P/16V_4 *5.6P/16V_4 *5.6P/16V_4 B D2 +3V_DEEP_SUS 7,8,9,10,39 +3V_RTC 7,10,11 +1.05V 2,4,9,10,11,31,34,37 +3VPCU 4,7,9,11,25,31,32,34,35,36 +3VS5 2,7,9,10,34,36,38,39,42,44 +3V 2,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +5V 7,23,26,28,29,32,33,34,39 LPT_PCH_M_EDS/BGA Reserve for power on sequence PCH Pull-high/low(CLG) +3V_DEEP_SUS System PWR_OK(CLG) for DS3 PM_DRAM_PWRGD R806 PM_RI# R624 *200/F_4 10K_4 SUS_STAT# R803 *10K_4 PCIE_WAKE# SLP_LAN# SUSACK# SUSWARN# R625 R579 R605 R626 *1K_4 *10K_4 *10K_4 *10K_4 PCIE_WAKE# PM_BATLOW# DNBSWON#_R AC_PRESENT_R R798 R586 R660 R580 1K_4 8.2K_4 *10K_4 10K_4 R566 *100K_4 ϭϬͬϭϰ͗^/ƉŚĂƐĞŵŽĚŝĨLJ R608 R794 SYS_PWROK +3VS5 R585 IMVP_PWRGD IMVP_PWRGD 6,40 EC_PWROK *0_4 R635 10K_4 A 100K/F_4 +3V CLKRUN# R633 10K_4 XDP_DBRST# R590 1K_4 R614 *1K_4 R643 10K_4 RSMRST# *0_4/S ϭϬͬϭϮ͗^/ƉŚĂƐĞŵŽĚŝĨLJ A DPWROK 7/26 DB Modify 7/26 DB Modify +3V_RTC INT HDMI Detect Function DPB_HPD_Q R721 *0_4/S R665 330K_4 10/17: SI Modify change to 10 Kohm 352-(&75 4XDQWD&RPSXWHU,QF DSWVREN On Die DSW VR Enable HDMI_HPD_CON 26 High = Enable (Default) Low = Disable 1% Size Custom Document Number 5 4 3 2 Rev 1A PCH 1/6 (DMI/FDI/VIDEO) Date: Monday, December 24, 2012 1 Sheet 6 of 44 4 U33A C849 *10P/50V_4 TP74 28 ACZ_SPKR 28 ACZ_BCLK B25 ACZ_SYNC A22 ACZ_SPKR AL10 ACZ_RST# C24 L22 ACZ_SDIN0 K22 TP79 G22 F22 INTRUDER# (+3V) INTVRMEN A24 ACZ_SDOUT +3V_DEEP_SUS 31 SIO_EXT_SCI# 10K_4 B17 GPIO33 C22 SIO_EXT_SCI# SERIRQ SATA0RXN SATA0RXP SATA0TXN SATA0TXP HDA_BCLK HDA_SYNC SPKR SATA1RXN SATA1RXP SATA1TXN SATA1TXP HDA_RST# HDA_SDIN0 HDA_SDIN1 HDA_SDIN3 HDA_SDO (+3V) HDA_DOCK_EN# / GPIO33 (+3VS5) HDA_DOCK_RST# / GPIO13 JTAG_TCK SATA5RXN / PERN2 SATA5RXP / PERP2 SATA5TXN / PETN2 SATA5TXP / PETP2 TP113 PCH_JTAG_TMS AD1 PCH_JTAG_TDI_R AE2 PCH_JTAG_TDO_R R391 0_4 TP68 AD3 F8 C26 AB6 PCH_SPI_CLK AJ11 PCH_SPI_CS0# AJ7 PCH_SPI_CS1# AL7 AJ10 TP111 JTAG_TMS SATA_RCOMP TP108 PCH_SPI_SI check B PCH_SPI_SO AH3 PCH_SPI_IO2 PCH_SPI_IO3 AJ4 AJ2 PCH Strap Table PCH_DRQ#0 PCH_DRQ#1 AL11 SERIRQ SPI_MOSI SATA0GP / GPIO21 (+3V) (+3V) SPI_MISO SPI_IO2 SPI_IO3 SATA1GP / GPIO19 TP9 TP8 RTC Circuitry(RTC) R739 RTC_RST# 20K/F_4 ϭϬͬϭϭ͗^/ĐŚĂŶŐĞĨŽŽƚƉƌŝŶƚ DG recommended that AC coupling capacitors should be close to the connector (<100 mils) for optimal signal quality. BC12 BE12 AR13 AT13 C905 1U/6.3V_4 SATA_RXN0 33 SATA_RXP0 33 SATA_TXN0 33 SATA_TXP0 33 SRTC_RST# 20K/F_4 +3V_RTC_1 *1K_4 CN20 BAT_CONN DFHD02MS119 85204-0200-2p-l HDD0 (SATA3 6.0Gb/s) ϭϭͬϮϵ͗WƌĞWsŵŽĚŝĨLJ BC14 BE14 AP15 AR15 R736 +3V_RTC_0 R735 +3V_RTC_0 BD13 BB13 AV15 AW 15 J2 *SOLDERJUMPER-2 +3V_RTC_2 +3VPCU D13 *BAT54C C904 1U/6.3V_4 C903 1U/6.3V_4 J1 *SOLDERJUMPER-2 C RTC Power trace width 20mils. AY5 SATA_RCOMP R368 7.5K/F_4 +1.5V SATA_RCOMP Impedance = 50 ohm Trace length < 500 mils Trace spacing = 15 mils BD4 SATA_IREF AP3 AT1 AU2 DGT_STOP# BBS_BIT0 BA2 BB2 Sampled +3VS5 BIT_CLK_AUDIO R697 33_4 ACZ_BCLK ACZ_RST#_AUDIO R688 33_4 ACZ_RST# ACZ_SDOUT_AUDIO R691 33_4 ACZ_SDOUT 28 EMI R372 *0_4/S R584 10K_4 R611 0_4 R629 DGT_STOP# PCH JTAG Debug(CLG) HDA Bus(CLG) +1.5V 28 C855 *33P/50V_4 28 +5V DGPU_HOLD_RST# R407 9,14 28 *10K_4 R596 *210/F_4 32 +3V *10K_4 33_4 1 R398 ACZ_SYNC_AUDIO 10K_4 12/13: PV modify 9/21 Install for Intel DG +3V R401 *1M_4 R654 *210/F_4 R656 *210/F_4 PCH_JTAG_TMS PCH_JTAG_TDI_R PCH_JTAG_TDO_R PCH_JTAG_TCK_R 3 ACZ_SYNC +3V R587 Configuration PWROK 0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode GNT3# / GPIO55 Top-Block Swap Override PWROK 0 = "top-block swap" mode 1 = Default (Int PU) ALWAYS 0 = Disable 1 = Enable PWROK 0 = Override 1 = Default (weak pull-up 20K) INTVRMEN Integrated 1.05V VRM enable HDA_DOCK_EN#/GPIO33 Flash Descriptor Security Only for Interposer GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GPIO19 Boot BIOS Selection 0 [bit-0] PWROK On-Die PLL VR Voltage Select Flash Descriptor Security Circuit ACZ_SPKR R563 PCH_INVRMEN GNT1# GNT0# 1 0 1 0 Boot Location GPIO33 R569 R389 R811 Q23 *2N7002K 0_4 R595 *100/F_4 R617 *100/F_4 SPI LPC R613 R390 0 = Support by 1.8V (weak pull-down) 1 = Support by 1.5V +VCC_HDA_IO PWROK 0 = Security Effect (Int PD) 1 = Can be Overridden 31 R684 TP106 TP103 TP104 TP102 PCH_SPI_CS1# PCH_SPI_CS0# 10/18: SI *0_4 0_4 Modify ACZ_SDOUT GPIO33_E RSMRST# Internel PU R621 On-die PLL Voltage Regulator RSMRST# 0 = Disable 1 = Enable (Int PU) R619 *100/F_4 R657 *51_4 R571 SPI_MOSI iTPM function Disable APWROK 0 = Default (weak pull-down 20K) 1 = Enable *1K_4 BT_OFF# *1K_4 R374 *1K_4 R564 *1K_4 C788 *22P/50V_4 R556 R544 R542 R554 1 6 5 2 33_4 0_4 0_4 CE# SCK SI SO VDD +3VS5 +3V HOLD# W P# VSS 8 7 R550 R548 3.3K_4 3.3K_4 4 C793 0.1U/10V_4 EN25QH32-104HIP PCH_SPI_IO3 +VCC_HDA_IO 9,34 PLL_ODVR_EN 9 R592 BIOS_WP# R591 0_4 0_4 TP105 Vender Size EON 4MB AKE39ZN0Q03 EON EN25QH32-104HIP AMIC 4MB AKE39ZN0800 AMIC A25QE32M-F (QE) Socket P/N A DFHS08FS023 +3V PCH_SUSCLK 352-(&75 4XDQWD&RPSXWHU,QF 6,31 1% Size Custom Document Number 3 2 Rev 1A PCH 2/6 (SATA/HDA/SPI) Date: Monday, December 24, 2012 4 *0_4 *0_4/S 12/13: PV modify 10/18: Del R350 , R344 PCH_SPI_SI PCH_SPI_CS0#R PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO 8 ACZ_SYNC +SPI_PWR R552 U31 +SPI_PWR BBS_BIT0 R693 *1K_4 C792 *22P/50V_4 3 BBS_BIT1 *1K_4 R562 R561 PCH_SPI_IO2 RSVD RSMRST# +3V *1K_4 *1K_4 If EC support embedded flash , SPI power must be used S5_0N power rail for EC load code. 8 +3V_RTC *0_4 2 [Need external pull-down for LPC BIOS] Default weak pull-up on GNT0/1# RSMRST 0 = Disable 1 = Enable (Int PU) 330K_4 R680 1 PCH SPI ROM(CLG) +3V PCI_GNT3# GPIO8 PLL On-Die Voltage Regulator Enable *1K_4 *1K_4 GPIO28 5 RTC_X2 *0_4 30mils BB9 BD9 AY13 AW 13 No reboot mode setting GPIO62 / SUSCLK D RTC_X2_1 R779 +3V_RTC SPKR HDA_SDO R382 *10M_4 ODD (SATA2 3Gb/s) ϭϭͬϮϵ͗WƌĞWsŵŽĚŝĨLJ BC10 BE10 AV10 AW 10 SATA_LED# SATALED# RTC_X1 *0_4 31 SATA_RXN4 33 SATA_RXP4 33 SATA_TXN4 33 SATA_TXP4 33 SPI_CS0# SPI_CS1# SPI_CS2# *18P/50V_4 R778 B Strap description HDA_SYNC +3V SERIRQ BIT_CLK_AUDIO SATA_IREF C536 RTC_X1_1 Y3 *32.768KHZ 8.2K_4 DG V0.7 -> 750 ohm SCH V0.7 -> 0 ohm SPI_CLK *18P/50V_4 TP115 TP78 R581 BC8 BE8 AW 8 AY8 JTAG_TDI JTAG_TDO TP25 TP22 TP20 C530 31,34 LPT_PCH_M_EDS/BGA Pin Name A AH1 D21 G20 JTAG AB3 SPI PCH_JTAG_TCK_R SATA3RXN SATA3RXP SATA3TXN SATA3TXP SATA4RXN / PERN1 SATA4RXP / PERP1 SATA4TXN / PETN1 SATA4TXP / PETP1 C TP112 SATA2RXN SATA2RXP SATA2TXN SATA2TXP HDA_SDIN2 for DS3 R686 LDRQ0# LDRQ1# / GPIO23 LFRAME# 1 Reserve for EMI SRTCRST# B21 2 G10 PCH_INVRMEN LFRAME# RTC Clock 32.768KHz 1 A8 SM_INTRUDER# 1M_4 RTCRST# 31,34 31,34 31,34 31,34 2 1 B9 LAD0 LAD1 LAD2 LAD3 ϭϬͬϭϴ͗^/DŽĚŝĨLJ 1 D9 SRTC_RST# LAD0 LAD1 LAD2 LAD3 RTCX2 A20 C20 A18 C18 1 2 RTC_RST# RTCX1 LPC R668 +3V_RTC D B4 6G TP114 RTC_X2 SATA 0_4 B5 RTC R760 CLKGEN_RTC_X1 RTC_X1 IHDA TP69 11 2 +1.05V 2,4,9,10,11,31,34,37 +3V_RTC 6,10,11 +3VPCU 4,9,11,25,31,32,34,35,36 +3V 2,6,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V_DEEP_SUS 6,8,9,10,39 +3VS5 2,6,9,10,34,36,38,39,42,44 +5V 23,26,28,29,32,33,34,39 +3V_RTC_0 11 2 TP65 3 (HDA,JTAG,SATA) 3 4 Lynx Point 2 5 1 Sheet 7 of 44 5 4 PCI/USBOC# Pull-up(CLG) Lynx Point 3 (PCI,USB,NVRAM) 2 1 Lynx Point (PCI-E,SMBUS,CLK) +3V U33B U33E BE44 RP5 D EDID_SELECT# LCD_BK 1 2 3 4 5 ACC_LED# ACCEL_INTH# BT_COMBO_EN# DGPU_SELECT# 8.2K_4 10K_10P8R_6 BE43 R710 PCH_TP26 AY43 for DS3 +3V_DEEP_SUS TP2 LAN TP3 TP4 TD_IREF ϰͬϯϬ͗Zϭ͘ϬсхƌĞŶĂŵĞW,ͺdWϮϲ Cardreader CL_CLK1 CL_DATA1 RP3 10 9 8 7 6 USB_OC4# USB_OC1# USB_OC2# USB_OC3# 1 2 3 4 5 PCIE_TXN1_C PCIE_TXP1_C 30 PCIE_RXN2_LAN 30 PCIE_RXP2_LAN 30 PCIE_TXN2_LAN 30 PCIE_TXP2_LAN C851 C857 0.1U/10V_4 0.1U/10V_4 PCIE_TXN2_LAN_C PCIE_TXP2_LAN_C CL_RST1# USB_OC6# USB_OC0# PCH_AOCS# USB_OC5# 27 PCIE_RXN3_CARD 27 PCIE_RXP3_CARD 27 PCIE_TXN3_CARD 27 PCIE_TXP3_CARD C864 C865 0.1U/10V_4 0.1U/10V_4 PCIE_TXN3_CARD_C PCIE_TXP3_CARD_C AF7 AW36 AV36 BD37 BB37 29 29 USB30_TX1USB30_TX2- 29 29 34 USB30_TX1+ USB30_TX2+ BT_COMBO_EN# 7 32 7 25 34 LCD_BK ACCEL_INTH# BBS_BIT1 ACC_LED# PCI_GNT3# R810 R809 12,13 *0_4 0_4 PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# H20 L20 K17 M20 BT_COMBO_EN# DGPU_SELECT# EDID_SELECT# A12 B13 C12 BBS_BIT1 ACC_LED# PCI_GNT3# C10 A10 AL6 MPC_PWR_CTRL# G17 F17 L15 M15 PM_EXTTS#0 13 EXTTS#1 AD10 PCI_PME# TP76 Y11 PLTRST# B PIRQA# PIRQB# PIRQC# PIRQD# GPIO50 GPIO52 GPIO54 (+3V) (+3V) (+3V) GPIO51 GPIO53 GPIO55 (+3V) (+3V) (+3V) PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5 R396 USBP0USBP0+ USBP1USBP1+ 29 29 29 29 USB2.0 USB2.0/USB3.0 COMBO 1st USB2.0 USB2.0/USB3.0 COMBO 2nd R692 +1.5V USBP4USBP4+ USBP5USBP5+ 25 25 29 29 *0_4/S R687 PCIE_IREF 7.5K/F_4 PCIE_RCOMP Webcam Touch screen USBRBIAS# USBRBIAS (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) (+3VS5) OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43 OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14 K24 K26 ϭϮͬϭϭ͗WsŵŽĚŝĨLJ USBP9- 30 USBP9+ 30 USBP10- 34 USBP10+ 34 Right_USB WLAN CLK_PCH_SRC0N CLK_PCH_SRC0P Y43 Y45 CLK_PCIE_REQ0# AB1 CLK_PCH_SRC2N CLK_PCH_SRC2P AA44 AA42 CLK_PCIE_REQ1# AF1 27 27 CLK_PCIE_CARDN CLK_PCIE_CARDP CLK_PCH_CARD2N CLK_PCH_CARD2P 27 CLK_PCIE_REQ2# CLK_PCIE_REQ2# CLK_PCIE_REQ4# R400 22.6/F_4 USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# PCH_AOCS# 9 T3 V3 AA2 BOARD_ID0 AB40 AB39 9 PCH_AOCS# AE4 BOARD_ID1 AJ44 AJ42 34 LPT_PCH_M_EDS/BGA SMBCLK PERN2/ USB3RN4 PERP2/ USB3RP4 PETN2/ USB3TN4 PETP2/ USB3TP4 SMBDATA (+3VS5) SML0ALERT# / GPIO60 PERN3 PERP3 PETN3 PETP3 SML0CLK SML0DATA PERN4 PERP4 PETN4 PETP4 (+3VS5) PERN5 PERP5 PETN5 PETP5 SML1ALERT# / PCHHOT# / GPIO74 (+3VS5) SML1CLK / GPIO58 (+3VS5) SML1DATA / GPIO75 9 Y3 BOARD_ID2 PERN6 PERP6 PETN6 PETP6 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8 PCIE_IREF CLKOUT_PEG_B_N CLKOUT_PEG_B_P PEG_B_CLKRQ# / GPIO56 SMBus/Pull-up(CLG) 7/26 DB modify PLTRST# 13,24,31 MBCLK2 4 5 R352 3 SMB_ME1_CLK 2 MBDATA2 1 6 2.2K_4 2N7002DW Q22 A SMB_RUN_DAT 3 12,13,24 4 PEG Clock detect (SG only) R356 4.7K_4 2 R355 6 4.7K_4 +3V 1 7/26 DB modify 2N7002DW CLK_PCIE_REQ0# CLK_PCIE_REQ3# CLK_PCIE_REQ4# R658 R623 R659 10K_4 10K_4 10K_4 CLK_PEGB_REQ# CLK_PEGA_REQ# CLK_PEGA_REQ# R602 Ra R598 Rb R597 10K_4 *10K_4 10K_4 7/26 DB modify 5 SMB_PCH_CLK AD39 AD38 for DS3 SMB_PCH_CLK 32 SMB_PCH_DAT SMB_PCH_DAT 32 N8 DRAMRST_CNTRL_PCH DRAMRST_CNTRL_PCH U8 SMB_ME0_CLK R7 SMB_ME0_DAT H6 SML1ALERT#_R K6 SMB_ME1_CLK N11 SMB_ME1_DAT CLKOUT_DPNS_N CLKOUT_DPNS_P CLKOUT_DP_N CLKOUT_DP_P PCIE_RCOMP CLKOUT_DMI_N CLKOUT_DMI_P TP11 TP6 CLKOUT_PCIE0N CLKOUT_PCIE0P CLKIN_GND1_N CLKIN_GND1_P PCIECLKRQ0# / GPIO73 SMB_RUN_CLK 12,13,24 CLK_BUF_BCLK_N CLK_BUF_BCLK_P CLK_BUF_PCIE_3GPLL# CLK_BUF_PCIE_3GPLL CLK_BUF_DREFCLK# CLK_BUF_DREFCLK CLK_BUF_DREFSSCLK# CLK_BUF_DREFSSCLK CLK_PCH_14M 34 SG : Rb ; UMA : Ra R406 R405 10K_4 10K_4 R399 R402 R409 R408 R669 R670 R708 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 34 34 CLKOUT_PCIE1N CLKOUT_PCIE1P CLKIN_DOT_96N CLKIN_DOT_96P PCIECLKRQ1# / GPIO18 CLKOUT_PCIE2N CLKOUT_PCIE2P (+3V) CLKIN_SATA_N CLKIN_SATA_P (+3V) PCIECLKRQ2# / GPIO20/ SMI# CLKOUT_PCIE3N CLKOUT_PCIE3P PCIECLKRQ3# / GPIO25 REFCLK14IN CLKIN_PCILOOPBACK (+3VS5) XTAL25_IN XTAL25_OUT ICLK_IREF DIFFCLK_BIASREF CLKOUT_PCIE4N CLKOUT_PCIE4P PCIECLKRQ4# / GPIO26 (+3VS5) CLKOUT_33MHZ0 CLKOUT_PCIE5N CLKOUT_PCIE5P CLKOUT_33MHZ1 PCIECLKRQ5# / GPIO44 (+3VS5) CLKOUT_33MHZ2 CLKOUT_PCIE6N CLKOUT_PCIE6P CLKOUT_33MHZ3 PCIECLKRQ6# / GPIO45 (+3VS5) CLKOUT_33MHZ4 TP67 CLK_PCH_14M RF Y39 Y38 U4 CLK_PEGB_REQ# AH43 AH45 CLK_PCH_ITPN CLK_PCH_ITPP TP85 TP84 TP64 CLK_33M_KBC TP118 AF35 AF36 CLK_DPLL_NSCCLKN CLK_DPLL_NSCCLKP AJ40 AJ39 CLK_DPLL_SSCLKN CLK_DPLL_SSCLKP AF39 AF40 CLK_CPU_BCLKN CLK_CPU_BCLKP AY24 AW24 CLK_BUF_PCIE_3GPLL# CLK_BUF_PCIE_3GPLL AR24 AT24 CLK_BUF_BCLK_N CLK_BUF_BCLK_P H33 G33 CLK_BUF_DREFCLK# CLK_BUF_DREFCLK BE6 BC6 CLK_BUF_DREFSSCLK# CLK_BUF_DREFSSCLK F45 D17 CLK_PCH_14M CLK_PCI_FB AM43 AL44 XTAL25_IN XTAL25_OUT AM45 AN44 ICLK_IREF ICLK_BIAS PCIECLKRQ7# / GPIO46 (+3VS5) (+3V) CLKOUTFLEX1 /(+3V) GPIO65 CLKOUT_PEG_A_N CLKOUT_PEG_A_P 30 30 LAN 30 (+3VS5) PEG_A_CLKRQ# / GPIO47 TP19 TP18 CLKOUTFLEX2 / GPIO66 (+3V) CLKOUTFLEX3 / GPIO67 GPU 14 CLK_PCIE_VGA# 14 CLK_PCIE_VGA R780 C *0_4 XTAL25_IN_1 R620 *0_4/S R361 *0_4/S CLK_PCIE_REQ0# CLK_PCH_SRC2P CLK_PCH_SRC2N 1 3 0_4 PCH_XTAL25_IN C890 *33P/50V_4 R718 *1M_4 R781 *0_4 XTAL25_OUT_1 Y4 *25MHZ C891 change 25M to small size R715 R711 R712 *0_4/S *7.5K/F_4 7.5K/F_4 +1.5V E44 CLK_PCI_CARD_R TP116 B42 CLK_PCH_PCI2 22_4 R681 F41 CLK_PCH_PCI3 22_4 R709 CLK_33M_DEBUG A40 CLK_PCH_PCI4 22_4 R700 CLK_33M_KBC CLK_FLEX1 F36 CLK_FLEX2 TP80 F39 CLK_FLEX3 TP82 CLK_PCI_FB 3 B 34 31 CLK_PCI_FB_R CLK_PCI_LPC_R CLK_PCI_EC_R TP81 F38 +VCCAXCK_VRM CLK_FLEX1_48M 30 SMBus/Pull-up(CLG) +3V_DEEP_SUS R351 R628 R381 R380 R384 R383 R386 1K_4 10K_4 2.2K_4 2.2K_4 2.2K_4 2.2K_4 10K_4 DRAMRST_CNTRL_PCH SMBALERT# SMB_PCH_CLK SMB_PCH_DAT SMB_ME0_CLK SMB_ME0_DAT SML1ALERT#_R CLK_PCIE_REQ1# 1% 2 A 352-(&75 4XDQWD&RPSXWHU,QF CLK_PCH_PEGAN CLK_PCH_PEGAP Size Custom Document Number Rev 1A PCH 3/6 (PCIE/USB/CLK) Date: Monday, December 24, 2012 4 ϭϬͬϭϴ͗^/ŵŽĚŝĨLJ *33P/50V_4 TP83 C40 CLK_FLEX0 11 +1.05V 2,4,9,10,11,31,34,37 +1.5V 6,7,10,28,34,38,44 +3VS5 2,6,7,9,10,34,36,38,39,42,44 +3V 2,6,7,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V_DEEP_SUS 6,7,9,10,39 Remove for UMA only. CLOCK TERMINATION for FCIM 5 C861 *22P/50V_4 ϭϬͬϭϮ͗^/ŵŽĚŝĨLJ 2 2 D44 CLK_PCI_TPM_R for DS3 2 RP4 0_4P2R_4 4 2 2 (+3V) CLK_PCH_SRC0N CLK_PCH_SRC0P CLK_PCIE_LANP CLK_PCIE_LANN PCIE_CLKREQ_LAN# C880 *22P/50V_4 2 2 XTAL25_IN R761 CLKOUT_PCIE7N CLKOUT_PCIE7P CLK_PCIE_WLAN# CLK_PCIE_WLAN PCIE_CLKREQ_WLAN# D (+3VS5) PCIE Clock WLAN 2 CLK_33M_DEBUG CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P +3V 10K_4 10K_4 SMB_ME1_DAT for DS3 +3V SMB_PCH_DAT R370 R378 AF6 SMB_PCH_CLK +3V_DEEP_SUS +3V_DEEP_SUS R346 2,14,27,30,31,34 CLK_PCIE_REQ1# CLK_PCIE_REQ2# 2.2K_4 AB35 AB36 R10 U11 LPT_PCH_M_EDS/BGA R349 100K_4 13,24,31 CLK_REQ/Strap Pin(CLG) +3V Q20 12/18 PV modify CLK_PEGA_REQ# CLK_PEGA_REQ# SMBALERT# (+3VS5) CLKOUTFLEX0 / GPIO64 15 N7 C878 *22P/50V_4 *1K_4 PLTRST#(CLG) PLTRST# AF3 AE44 AE42 CLK_PCH_PEGAN CLK_PCH_PEGAP PLTRST# AB43 AB45 USB_BIAS M33 L33 P3 V1 U2 P1 M3 T1 N2 M1 (+3VS5) SMBALERT# / GPIO11 CLKIN_DMI_N CLKIN_DMI_P AF43 AF45 TP24 TP23 PLTRST# BD29 BC30 BB29 CLK_PCIE_REQ3# PME# MPC Switch Control MPC_PWR_CTRL# B37 D37 A38 C38 A36 C36 A34 C34 B33 D33 F31 G31 K31 L31 G29 H29 A32 C32 A30 C30 B29 D29 A28 C28 G26 F26 F24 G24 AY38 AW38 BC38 BE38 AT40 AT39 BE40 BC40 AN38 AN39 BD42 BD41 BE30 AD43 AD45 (+3V) (+3V) (+3V) (+3V) check Low = MPC ON MPC_PWR_CTRL# High = MPC OFF (Default) USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P USB C USB30_RX1+ USB30_RX2+ USB3RXN1 USB3RXN2 USB3RXN5 USB3RXN6 USB3RXP1 USB3RXP2 USB3RXP5 USB3RXP6 USB3TXN1 USB3TXN2 USB3TXN5 USB3TXN6 USB3TXP1 USB3TXP2 USB3TXP5 USB3TXP6 PCI 29 29 h^ϯ͘Ϭ AR26 AW26 AW29 AR29 AP26 AV26 AV29 AP29 BE24 BD25 BE26 BD27 BD23 BC24 BC26 BE28 USB30_RX1USB30_RX2- AW33 AY33 BE34 BC34 AT33 AR33 BE36 BC36 AF11 AF10 10K_10P8R_6 29 29 AT31 AR31 BD33 BB33 PERN1 / USB3RN3 PERP1 / USB3RP3 PETN1 / USB3TN3 PETP1 / USB3TP3 FLEX CLOCKS 10 9 8 7 6 MPC_PWR_CTRL# 0.1U/10V_4 0.1U/10V_4 SMBUS BC45 +3V C850 C846 WLAN TP1 AW31 AY31 BE32 BC32 CLOCKS BA45 34 PCIE_RXN1 34 PCIE_RXP1 34 PCIE_TXN1 34 PCIE_TXP1 PCI-E* 8.2K_4 8.2K_4 8.2K_4 8.2K_4 C- Link R695 R698 R689 R699 Thermal PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# 1 Sheet 8 of 44 5 4 3 2 1 ͽΪΟΩ͑ΠΚΟΥ͙͑͑ͺ͝·΄΄ΐͿʹ΅ͷ͝΄·͵͚ +3V_DEEP_SUS 6,7,8,10,39 +3VS5 2,6,7,10,34,36,38,39,42,44 +3V 2,6,7,8,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +5VS5 23,29,30,34,36,37,38,39,40,41,42,43,44 U33F SIO_EXT_SMI# D 7,34 AT8 S_GPIO 100_4 SIO_EXT_SMI# F13 BOARD_ID4 A14 BOARD_ID5 G15 Y1 BT_OFF# BT_OFF# LAN_DISABLE#_R 34 Reserve 33 7,14 R631 ODD_PRSNT# 31,42,43,44 *0_4 DGPU_PWROK DGPU_HOLD_RST# DGPU_HOLD_RST# 30,31 7 R345 DSW_WAKE# R570 PLL_ODVR_EN R588 +3V R583 AN2 DGPU_PWROK C14 BIOS_REC BB4 *0_4 *0_4/S PLL_ODVR_EN_R 0_4 10/11: SI modify net name C TP109 With Intel LAN: Connect to LANWAKE# pin on the LAN Without Intel LAN: Used to wake event from DSx AD11 GPIO34 AN6 GPIO35 AP1 DGPU_PWR_EN_R AT3 FDI_OVRVLTG AK1 MFG_MODE AT7 DGPU_PRSNT# AM3 TEST_SET_UP GPIO27 Y10 R11 GPIO27 10K_4 DGPU_PR_EN ODD_PRSNT#_R R388 0_4 TP110 9,42,43,44 AB11 RF_OFF# RF_OFF# K13 AN4 GPIO49 AK3 SV_DET U12 BE41 BE5 2 C45 A5 (+3V) (+3V) TACH1 / GPIO1 TACH5 / GPIO69 (+3V) (+3V) TACH2 / GPIO6 TACH6 / GPIO70 (+3V) (+3V) TACH3 / GPIO7 TACH7 / GPIO71 (+3V) 3 C16 GPIO68 R679 10K_4 +3V D13 GPIO69 R673 R674 *1.5K/F_4 10K_4 G13 GPIO70 +3V H15 GPIO71 ϭϬͬϭϱ͗^/ŵŽĚŝĨLJ PCH MISC PU /PD +3V (+3V) GPIO8 (+3VS5) LAN_PHY_PW R_CTRL / GPIO12 DSW GPIO15 TP14 (+3VS5) PECI SATA4GP / GPIO16 RCIN# (+3V) TACH0 / GPIO17 PROCPW RGD (+3V) SCLOCK / GPIO22 (+3V) GPIO24 (+3VS5) GPIO27 (DSW) GPIO28 (+3VS5) GPIO34 THRMTRIP# AN10 EC_A20GATE AY1 AT6 R639 *0_4 EC_PECI EC_RCIN# EC_RCIN# AV3 AV1 R637 390_4 2 PM_THRMTRIP#R R630 *0_4/S PCH_THRMTRIP# R636 *1K_4 D CPU_PLTRST#R for DS3 GPIO Pull-up/Pull-down(CLG) MFG-TEST 2,31 +3V_DEEP_SUS +3V AU4 10K_4 10K_4 31 MFG_MODE PLTRST_PROC# R638 R609 +1.05V 31 H_PWRGOOD PCH_THRMTRIP# EC_A20GATE EC_RCIN# 2,31 2,31 R567 10K_4 R568 *0_4 DGPU_HOLD_RST# R610 *10K_4 BT_OFF# R622 10K_4 GPIO35 SIO_EXT_SMI# R649 R694 10K_4 10K_4 GPIO70 GPIO71 ODD_PRSNT#_R DGPU_PWROK R364 R371 R589 R677 R616 R653 R678 10K_4 10K_4 10K_4 *10K_4 10K_4 *10K_4 *10K_4 R362 R578 *10K_4 10K_4 +3V ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ (+3V) GPIO35 / NMI# (+3V) SATA2GP / GPIO36 (+3V) SATA3GP / GPIO37 (+3V) 0 = SGPIO 1 = Default Swap GPIO SLOAD / GPIO38 (+3V) Power already stuffed. +3V SDATAOUT0 / GPIO39 (+3V) S_GPIO SDATAOUT1 / GPIO48 (+3V) SATA5GP / GPIO49 (+3V) GPIO57 VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 GPIO27 NCTF 1 TACH4 / GPIO68 (+3VS5) +3VPCU DSW_WAKE# BMBUSY# / GPIO0 CPU/MISC 31 R644 PCI_SERR# GPIO 31 Clock Gen Power OK (CLG) Q39 *2N7002K 10/16: SI modify VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NTCF_25 VSS_NCTF_8 VSS_NCTF_12 VSS_NCTF_15 A2 A41 A43 B1 B2 B44 BA1 BC1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4 N10 A44 B45 BD1 R646 R645 GPIO49 DGPU_PWROK C 1K_4 *0_4 ϭϬͬϭϮ͗^/ŵŽĚŝĨLJ LAN_DISABLE#_R +3VS5 GPIO27 ϭϬͬϭϳ͗^/ŵŽĚŝĨLJĞůZϱϳϳ for DS3 +3V_DEEP_SUS RF_OFF# R572 1K_4 R666 BIOS_REC *0_4 R667 10K_4 +3V Intel ME Crypto Transport Layer Security (TLS) cipher suite BIOS RECOVERY High = Disable (Default) Low = Enable Low = Disable (Default) High = Enable +3V BIOS_RESP 5 B 2 9,42,43,44 SV Detect +3V U37 R632 TEST_SET_UP *0_4 R650 10K_4 R574 B *100K_4 4 DGPU_PR_EN 1 DGPU_PWR_EN_R SV_DET 3 SV_SET_UP ϭϮͬϭϭ͗WsDŽĚŝĨLJ 10K_4 +3V_DEEP_SUS for DS3 LPT_PCH_M_EDS/BGA GPIO36 BOARD ID SETTING 8 8 8 BOARD_ID5 R575 High = Strong (Default) *U74AHC1G08G-AL5-R ϭϮͬϬϮ͗WƌĞWsDŽĚŝĨLJ Model ϭϬͬϭϳ͗^/ŵŽĚŝĨLJ 0 = SV Detect 1 = Default BOARD_ID4 BOARD_ID2 BOARD_ID1 BOARD_ID0 BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 Internal PD SATA3GP/GPIO37 DGPU_PWR_EN_R R582 TLS Confidentiality 0 = TLS no confidentiality (Int PD) 1 = TLS with confidentiality +3V +3V FDI_OVRVLTG *1K_4 R594 *1K_4 for DS3 DB R63 UMA 0 0 0 R359 DB R63 DIS 0 0 1 R618 A SI R63 UMA 0 0 0 SI R63 DIS 0 0 1 PV R63 UMA 1 0 0 R600 R63 DIS 1 0 RD1 RD2 *10K_4 BOARD_ID0 R365 10K_4 BOARD_ID1 R655 *10K_4 BOARD_ID2 R647 RU0 RU1 RU2 10K_4 +3V_DEEP_SUS *10K_4 Rb R652 +3V 1 R379 RD4 RD5 10K_4 10K_4 BOARD_ID4 BOARD_ID5 R675 R375 RU4 RU5 A GFX Present 10K_4 ϭϭͬϮϵ͗WƌĞWsDŽĚŝĨLJ R676 PV RD0 *100K_4 DGPU_PRSNT# *10K_4 *10K_4 +3V Ra R615 SG UMA Stuff Ra Rb NC Rb Ra 10K_4 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 5 4 3 2 Rev 1A PCH 4/6 (GPIO/MISC) Date: Monday, December 24, 2012 1 Sheet 9 of 44 5 4 VCCSUS3_3[4] VCCSUS3_3[5] +VCC_AXCK_DCB +1.05V R436 *0_8/S +V1.05S_VCC_AXCK_DCB L44 D VCCSUS3_3[6] AP45 *0_6/S 1.09A (40mils) C583 *10U/6.3V_8 VCCUSBPLL 50mA (10mils) VCC3_3[3] +3V R412 1U/6.3V_4 *0_6/S C564 +V3.3S_VCC_FLEX1 L29 +3V R411 1U/6.3V_4 *0_6/S C553 +V3.3S_VCC_FLEX23 L26 M26 U32 +V3.3S_VCC_ASEPCI *0_6/S C567 V32 VCCCLK3_3[2] 0.3A (20mils) *0_8/S C566 Y32 R416 1U/6.3V_4 AD34 *0_6/S C561 AA30 AA32 +V1.05S_VCC_SSCFF +V1.05S_VCCCLKF100 R421 1U/6.3V_4 VSS C *0_8/S C580 R422 1U/6.3V_4 +1.05V AD35 AG30 AG32 AD36 +V1.05S_VCCCLKF100 AE30 AE32 +V1.05S_VCCSSCF100 DCPSUS2 VCCCLK[1] VCCCLK[2] VCCCLK[3] VCCCLK[4] VCCCLK[5] VCCCLK[6] VCCCLK[7] AW40 VCCVRM[6] *0_6/S 0.1U/10V_4 *0_6/S C581 C537 0.1U/10V_4 C538 0.1U/10V_4 C532 1U/6.3V_4 C556 1U/6.3V_4 C550 R426 10U/6.3VS_6 C547 +V3.3S_VCCAUBG 0.1U/10V_4 C552 R410 *0_8/S +3V U30 V28 V30 Y30 +V1.05S_VCCUSBCORE 1U/6.3V_4 C558 R414 *0_8/S 0.67A (40mils) +1.05V M24 Y35 +V1.05M_VCCDUSBSUS VCCDSW3_3 *1U/6.3V_4 C548 1U/6.3V_4 C549 1U/6.3V_4 VCCIO[15] DCPSST VCC3_3[7] VCC3_3[8] VCCASW[12] VCCASW[13] 22U/6.3V_8 C562 28mA (10mils) R20 0.26A (40mils) +V3.3A_VCCPSUS 1U/6.3V_4 C523 5.11/F_4 +PCH_VCCDSW R348 U14 R22 A16 +VCCPDSW AE14 AF12 AG14 R392 *0_6/S +3VS5 0.1U/10V_4 +V3.3S_VCCPCORE 0.261A (40mils) R363 0.01U/25V_4 AM18 AM20 AM22 AP22 AR22 AT22 3.629A (160mils) +V1.05S_VCC_EXP for DS3 C540 VCC3_3[4] VCC3_3[5] VCC3_3[6] AA18 U18 U20 U22 U24 V18 V20 V24 Y18 Y20 Y22 V22 +V1.05M_VCCASW +1.05V 3.629A (160mils) *0_8/S AJ30 AJ32 +V1.05S_VCCAUX R415 AA14 +VCCSST 0.1U/10V_4 *1U/6.3V_4 *10U/6.3V_6 *0_6/S +1.05V R394 R393 L41 *10uH/100mA_8 R404 *0_8/S *10U/6.3V_8 C546 AK26 AK28 +VCCAPLL_USB3 AK20 +V1.05S_VCC_EXP P18 +V3.3S_VCCPFUSE R397 *0_6/S +3V P20 R395 *0_6 +1.05V 1U/6.3V_4 C545 PCH_VCC_1_1_20 PCH_VCC_1_1_21 AJ26 AJ28 PCH VRM Power C543 +1.05V +1.5V L17 R18 C554 C559 +VCCA_USBSUS *1U/6.3V_4 +V1.05M_VCCSUS C542 +1.05V +1.5V *0_6/S +1.05V *0_6/S +1.05V L43 R433 Y12 98mA (15mils) PCH VRM Power *1uH/25mA_6 *0_8/S +V1.05S_VCCAPLL_FDI *10U/6.3V_8 C584 BB44 AN11 *10uH/100MA_8 *0_8/S *10U/6.3V_8 R358 *0_6/S AN34 AN35 L40 R377 C539 3.629A (160mils) +1.05V +1.5V 4mA (10mils) K8 VCCVRM[1] VCCVRM[2] VCCIO[7] C832 0.1U/10V_4 C541 +VCCRTCEXT V_PROC_IO[1] V_PROC_IO[2] VCCIO[16] AK22 *0_6/S R702 +3V +3V_BG 133mA (20mils) R30 R32 VCC3_3[1] VCC3_3[2] *0_6 +V3.3S_VCC_GIO 0.1U/10V_4 R413 *0_6/S +3V C560 +V1.05S_VCCAPLL_EXP L42 BE22 VCCVRM[4] +1.05V *1uH/25mA_6 R403 *0_8/S *10U/6.3V_8 AK18 VCCIO[10] +1.5V C555 +V1.05S_VCC_EXP 3.629A (160mils) C AD12 VCCSPI R373 *0_6 R367 *0_6/S 1U/6.3V_4 +3VS5 +3V C533 22mA (10mils) VCCVRM[3] If EC support embedded flash , SPI power must be used S5_0N power rail for EC load code. VCCIO[8] VCCIO[9] +V1.05S_VCC_EXP 3.629A (160mils) If have power noise issue then stuff it. +3V 10mA (10mils) VCCSUS3_3[9] +1.5V_LDO P14 P16 VCCRTC 5 VINVOUT 3 C517 *1U/6.3V_4 +VCC_HDA_IO EN 4 GND NC B * G9090-150T11U VCCSUSHDA A26 *0_6/S 0.1U/10V_4 DCPRTC[1] DCPRTC[2] R683 +3V_DEEP_SUS C847 for DS3 PCH band gap Power LPT_PCH_M_EDS/BGA Q36 *ME2N7002E +3VS5 3 +3V_BG +3VS5 1 PCH VCCIO Power +1.05V +1.5V_LDO +V3.3M_VCCPSPI DCPSUS1 2 A6 1U/6.3V_4 *0_8 M31 +V3.3S_ADACBG R704 VCCADACBG3_3 DCPSUS3_3[1] DCPSUS3_3[2] C531 C831 D R729 U21 +3V_RTC 0.1U/10V_4 10U/6.3V_8 0.1U/10V_4 0.01U/25V_4 *0_6 13mA (10mils) VCCSUS3_3[1] VCCSUS3_3[2] 1 +VCCPRTCSUS_3P3 C834 C892 C889 C883 R723 LPT_PCH_M_EDS/BGA AJ12 AJ14 0.1U/10V_4 VSS PCH VRM Power VCCIO[1] VCCIO[2] VCCIO[3] VCCIO[4] VCCIO[5] VCCIO[6] PCH VRM Power +V1.05S_VCC_EXP P45 P43 DCPSUSBYP 0.179A (20mils) +V1.05S_VCCAPLL_SATA3 L58 VCCADAC1_5 +3V C534 +1.5V 70mA (15 mils) HCB1608KF-181T15/1.5A_6 VCCASW[1] VCCASW[2] VCCASW[3] VCCASW[4] VCCASW[5] VCCASW[6] VCCASW[7] VCCASW[8] VCCASW[9] VCCASW[10] VCCASW[11] VCCASW[12] +V3.3A_VCCPSUS +V3.3A_VCCPSUS 0.476A (30mils) U36 VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17] 0.261A (40mils) 1U/6.3V_4 B L24 +V1.05S_VCCAUSB 0.1U/10V_4 C575 15mA (10mils) VCCVRM[7] +V1.05S_VCCPCPU R376 for DS3 +3V_DEEP_SUS AK30 AK32 RTC +VCCIO_PCH +V3.3S_VCCPTS CPU R423 VCCSUS3_3[8] VCC[1] VCC[2] 0.13A (20mils) +3V VCCSUS3_3[7] VCCCLK[9] VCCCLK[10] THERMAL +V1.5S_VCCATS *0_6/S U35 +1.05V *0_8/S VCCCLK[8] 0.15A (20mils) R427 +1.5V 1U/6.3V_4 +VCCA_DAC_1_2 POWER U33G AA24 AA26 AD20 AD22 AD24 AD26 AD28 AE18 AE20 AE22 AE24 AE26 AG18 AG20 AG22 AG24 Y26 U26 VCCCLK3_3[6] +V1.05S_VCCSSCF100 *0_8/S C570 C551 C544 VCCCLK3_3[5] HDA +1.05V VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCCLK3_3[4] +VCCCLKF135 +1.05V 1U/6.3V_4 VCCCLK3_3[3] +V1.05S_VCC_SSCFF R419 1U/6.3V_4 +1.05V +V1.05S_PCH_VCC for DS3 SATA R417 1U/6.3V_4 +3V 1.29A (60mils) C557 R28 VCCCLK3_3[1] USB M29 GPIO/LPC +V3.3S_VCC_FLEX0 FUSE *0_6/S C582 Clock and Miscellaneous R425 1U/6.3V_4 0.1U/10V_4 Lynx Point (POWER) +1.05V +3V_DEEP_SUS VCC[3] C594 1U/6.3V_4 +3V R26 *0_8/S CRT VCCSUS3_3[3] VCCVRM[5] R418 VCC CORE C603 10U/6.3V_8 +V3.3A_VCCPUSB HVCMOS AF34 *0_8/S 0.26A (40mils) R24 VCCMPHY R444 +1.5V POWER U33J *10uH/100MA_8 DMI / PCIE +VCCAXCK_VRM L45 USB3 *1/F_4 1 +VCCIO_PCH 4 +1.05V 2,4,9,11,31,34,37 +1.5V 6,7,8,28,34,38,44 +3VS5 2,6,7,9,34,36,38,39,42,44 SPI +VCCAXCK_VRM_R R439 2 +3V 2,6,7,8,9,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V_DEEP_SUS 6,7,8,9,39 +5VS5 23,29,30,34,36,37,38,39,40,41,42,43,44 +5V 7,23,26,28,29,32,33,34,39 FDI 0.15A (20mils) +1.05V 3 Lynx Point (POWER) +V1.05S_VCC_EXP +3V_DEEP_SUS PCH DS3 PWR R347 2 Near Pin AN34,AN35 3.629A (160mils) 3,39 MAIND U19 C521 4.7U/6.3V_6 5 4 C569 10U/6.3V_8 C571 1U/6.3V_4 C572 1U/6.3V_4 C563 1U/6.3V_4 C565 1U/6.3V_4 C568 1U/6.3V_4 *0_8 PCH VCCSUS 10,31 SLP_SUS_ON R819 SLP_SUS_ON_1 *0_4 3 IN OUT IN GND C936 4.7U/6.3V_6 1 2 ON/OFF +V3.3A_VCCPSUS G5243AT11U +3V_DEEP_SUS for DS3 R353 *0_8/S R357 100K/F_4 39FKDQJHSQ 6,FKDQJHIRU'((36 C526 0.1U/10V_4 SUH39PRGLI\ +3V_DEEP_SUS for DS3 function +3VS5 +3VS5 R823 0_8 A A Q66 R821 AO3413 C932 C933 1 1 1U/6.3V_4 R820 3 C934 6 2 SLP_SUS_ON 22_8 *1U/6.3V_4 2 352-(&75 4XDQWD&RPSXWHU,QF Q67B 2N7002KDW 1 4 10,31 Q67A 2N7002KDW 5 0_4 .1U/10V_4 R822 2 100K/F_4 3 1% Size Custom Document Number 4 3 2 Rev 1A PCH 5/6 (POWER) Date: Monday, December 24, 2012 5 1 Sheet 10 of 44 5 4 3 2 1 Lynx Point D Lynx Point (GND) U33H AL34 AL38 AL8 AM14 AM24 AM26 AM28 AM30 AM32 AM16 AN36 AN40 AN42 AN8 AP13 AP24 AP31 AP43 AR2 AK16 AT10 AT15 AT17 AT20 AT26 AT29 AT36 AT38 D42 AV13 AV22 AV24 AV31 AV33 BB25 AV40 AV6 AW 2 F43 AY10 AY15 AY20 AY26 AY29 AY7 B11 B15 C B (GND) D U33I VSS[0] VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] K39 L2 L44 M17 M22 N12 N35 N39 N6 P22 P24 P26 P28 P30 P32 R12 R14 R16 R2 R34 R38 R44 R8 T43 U10 U16 U28 U34 U38 U42 U6 V14 V16 V26 V43 W2 W 44 Y14 Y16 Y24 Y28 Y34 Y36 Y40 Y8 AA16 AA20 AA22 AA28 AA4 AB12 AB34 AB38 AB8 AC2 AC44 AD14 AD16 AD18 AD30 AD32 AD40 AD6 AD8 AE16 AE28 AF38 AF8 AG16 AG2 AG26 AG28 AG44 AJ16 AJ18 AJ20 AJ22 AJ24 AJ34 AJ38 AJ6 AJ8 AK14 AK24 AK43 AK45 AL12 AL2 BC22 BB42 VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] B19 B23 B27 B31 B35 B39 B7 BA40 BD11 BD15 BD19 AY36 AT43 BD31 BD35 BD39 BD7 D25 AV7 F15 F20 F29 F33 BC16 D4 G2 G38 G44 G8 H10 H13 H17 H22 H24 H26 H31 H36 H40 H7 K10 K15 K20 K29 K33 BC28 C B LPT_PCH_M_EDS/BGA LPT_PCH_M_EDS/BGA 'ƌĞĞŶ><ŝƌĐƵŝƚƌLJ 30 8 7 16 LAN_XTAL25_IN PCH_XTAL25_IN CLKGEN_RTC_X1 CLKGEN_27M +3VLANVCC +1.05V UMA P/N ϭϬͬϭϭ͗^/ŵŽĚŝĨLJ DIS 33_4 0_4 0_4 10/F_4 U36 6 5 9 12 25M_A 25M_B 32Khz 27Mhz/NC 0.1U/10V_4 C915 0.1U/10V_4 C921 0.1U/10V_4 R807 0_4 +V3.3A VDD VBAT GEN_XTAL25_IN 16 GEN_XTAL25_OUT 1 15 2 10 C912 +3V_RTC_0 0.1U/10V_4 +3V_RTC_R R755 C913 VDD_RTC_OUT VDDIO_25M_A VDDIO_25M_B GND VDDIO_27/NC GND GND XTAL_IN GND XTAL_OUT 8 3 11 AL3NB244000 360_4 22U/6.3VS_8 14 MV modify on 0730 +3V_RTC 7 13 4 17 C914 2.2U/6.3V_6 SLG3NB314VTR C920 12P/50V_4 AL000314000 14,18,44 30,39 7 4,7,9,25,31,32,34,35,36 2,4,9,10,31,34,37 GEN_XTAL25_OUT 2 1 A +1.8V_VGA ϮϬŵŝůƐǁŝĚƚŚ;ŵŝŶͿ нϯsͺZdͺϬ͕нϯsͺZdͺZ͕нϯsͺZd͘͘ +3VLANVCC R757 R756 R762 R758 C916 U36 +3VPCU LAN_XTAL25_IN C918 *10P/50V_4 C917 *10P/50V_4 PCH_XTAL25_IN C931 *10P/50V_4 CLKGEN_27M Y5 +3V_VGA +3VLANVCC +3V_RTC_0 +3VPCU +1.05V 4 3 25MHZ +-10PPM C919 A 352-(&75 4XDQWD&RPSXWHU,QF GEN_XTAL25_IN 15P/50V_4 1% Size Custom Document Number 5 4 3 2 Rev 1A PCH 6/6 (GND) Date:Monday, December 24, 2012 1 Sheet 11 of 44 4 D R44 R45 3 3 3 3 3 3 3 3 3 3 3 3 3 3 10K_4 10K_4 8,13,24 8,13,24 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# SMB_RUN_CLK SMB_RUN_DAT 3 3 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 DIMM0_SA0 DIMM0_SA1 SMB_RUN_CLK SMB_RUN_DAT 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 M_A_ODT0 M_A_ODT1 11 28 46 63 136 153 170 187 M_A_DM1 C M_A_DM2 3 3 M_A_DQ[63:0] JDIM1A M_A_A[15:0] M_A_DQSP[7:0] M_A_DQSN[7:0] M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 PC2100 DDR3 SDRAM SO-DIMM (204P) 3 3 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_A_DQ4 M_A_DQ5 M_A_DQ7 M_A_DQ6 M_A_DQ1 M_A_DQ0 M_A_DQ3 M_A_DQ2 M_A_DQ9 M_A_DQ8 M_A_DQ15 M_A_DQ10 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ11 M_A_DQ21 M_A_DQ16 M_A_DQ19 M_A_DQ18 M_A_DQ20 M_A_DQ17 M_A_DQ23 M_A_DQ22 M_A_DQ25 M_A_DQ24 M_A_DQ30 M_A_DQ26 M_A_DQ28 M_A_DQ29 M_A_DQ31 M_A_DQ27 M_A_DQ36 M_A_DQ37 M_A_DQ34 M_A_DQ38 M_A_DQ32 M_A_DQ33 M_A_DQ35 M_A_DQ39 M_A_DQ41 M_A_DQ45 M_A_DQ47 M_A_DQ46 M_A_DQ40 M_A_DQ44 M_A_DQ42 M_A_DQ43 M_A_DQ49 M_A_DQ48 M_A_DQ54 M_A_DQ55 M_A_DQ53 M_A_DQ52 M_A_DQ50 M_A_DQ51 M_A_DQ61 M_A_DQ60 M_A_DQ62 M_A_DQ63 M_A_DQ56 M_A_DQ57 M_A_DQ59 M_A_DQ58 2 3 2.48A 1 JDIM1B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 +3V 2,13 8,13 PM_EXTTS#0 DDR3_DRAMRST# SMDDR_VREF_DQ0_M1 R459 *0_6/S 10K_4 C686 *2.2U/6.3V_6 C657 *2.2U/6.3V_6 VDDSPD 77 122 125 PM_EXTTS#0 198 30 +SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM 1 126 NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 Reseve for RF +1.35VSUS VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 +3V R36 +1.35VSUS VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 PC2100 DDR3 SDRAM SO-DIMM (204P) 5 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 D C VTT1 VTT2 GND GND 203 204 +0.75V_DDR_VTT 205 206 DDR3-DIMM0_H=5.2_STD DDR3-DIMM0_H=5.2_STD +SMDDR_VREF_DIMM 13 +VREF_CA_CPU 3 +0.75V_DDR_VTT 13,38,39 +1.35VSUS 2,3,4,13,38 +3V 2,6,7,8,9,10,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 B Place these Caps near So-Dimm0. +1.35VSUS +VREF_CA_CPU +SMDDR_VREF_DIMM R477 1K/F_4 3,38 DDR_VTTREF R479 R478 *0_6/S +SMDDR_VREF_DIMM *0_6 R476 1K/F_4 C635 0.022U/16V_4 12/18: PV modify R475 24.9/F_4 A VREF DQ0 M1 Solution 8/31: Intel suggestion +0.75V_DDR_VTT +1.35VSUS C215 1U/6.3V_4 C30 1U/6.3V_4 C236 1U/6.3V_4 C25 1U/6.3V_4 C226 1U/6.3V_4 C24 1U/6.3V_4 C204 1U/6.3V_4 C31 1U/6.3V_4 C258 10U/6.3VS_6 C36 10U/6.3V_6 C678 10U/6.3VS_6 C26 *10U/6.3V_6 C653 10U/6.3VS_6 C671 10U/6.3VS_6 C677 10U/6.3VS_6 R22 C685 10U/6.3VS_6 C172 *10U/6.3V_6 C147 10U/6.3V_8 C266 *0_6/S R24 1K/F_4 3 SMDDR_VREF_DQ0_M3 1 SMDDR_VREF_DQ0_M3 3 2 +1.35VSUS SMDDR_VREF_DQ0_M1 Q2 *ME2320D-G R25 1K/F_4 +SMDDR_VREF_DIMM C634 0.1U/10V_4 C633 2.2U/6.3V_6 2,3,13 DRAMRST_CNTRL_DDR +SMDDR_VREF_DQ0 10/17: SI modify C412 0.1U/10V_4 C411 2.2U/6.3V_6 C52 0.1U/10V_4 C46 2.2U/6.3V_6 +SMDDR_VREF_DQ0 C413 A 0.022U/16V_4 R299 24.9/F_4 10U/6.3V_8 352-(&75 4XDQWD&RPSXWHU,QF +3V 4/27: layout modify 1% Size Custom Document Number 4 3 2 Rev 1A DDR3 DIMM0-RVS (5.2H) Date: Friday, December 21, 2012 5 B 1 Sheet 12 of 44 4 8,12,24 8,12,24 DIMM1_SA0 DIMM1_SA1 SMB_RUN_CLK SMB_RUN_DAT 3 3 116 120 M_B_ODT0 M_B_ODT1 C 11 28 46 63 136 153 170 187 M_B_DM1 M_B_DM2 3 3 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 M_B_DQSP[7:0] M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7 M_B_DQSN[7:0] 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 1 +1.35VSUS 3 JDIM2B M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ0 M_B_DQ1 M_B_DQ6 M_B_DQ7 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ10 M_B_DQ8 M_B_DQ9 M_B_DQ11 M_B_DQ15 M_B_DQ20 M_B_DQ21 M_B_DQ18 M_B_DQ22 M_B_DQ17 M_B_DQ16 M_B_DQ19 M_B_DQ23 M_B_DQ25 M_B_DQ29 M_B_DQ27 M_B_DQ26 M_B_DQ28 M_B_DQ24 M_B_DQ31 M_B_DQ30 M_B_DQ36 M_B_DQ37 M_B_DQ35 M_B_DQ34 M_B_DQ33 M_B_DQ32 M_B_DQ39 M_B_DQ38 M_B_DQ44 M_B_DQ40 M_B_DQ42 M_B_DQ43 M_B_DQ45 M_B_DQ41 M_B_DQ46 M_B_DQ47 M_B_DQ49 M_B_DQ48 M_B_DQ54 M_B_DQ55 M_B_DQ52 M_B_DQ53 M_B_DQ50 M_B_DQ51 M_B_DQ61 M_B_DQ56 M_B_DQ62 M_B_DQ63 M_B_DQ57 M_B_DQ60 M_B_DQ59 M_B_DQ58 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 2.48A 199 +3V 77 122 125 2,12 SMDDR_VREF_DQ1_M1 R298 PM_EXTTS#0 198 30 +SMDDR_VREF_DQ1 1 126 DDR3_DRAMRST# *0_6/S +SMDDR_VREF_DIMM 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 D C VTT1 VTT2 GND GND 203 204 +0.75V_DDR_VTT 205 206 DDR3-DIMM1_H=9.2_STD Local Thermal Sensor 12/18 PV Modify C53 *0.01U/25V_4 +3V U1 8,13,24,31 8,13,24,31 +0.75V_DDR_VTT 12,38,39 +1.35VSUS 2,3,4,12,38 +3V 2,6,7,8,9,10,12,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +SMDDR_VREF_DIMM 12 DDR3-DIMM1_H=9.2_STD B MBCLK2 MBDATA2 MBCLK2 R814 *0_4 8 MBDATA2 R815 *0_4 7 6 4 +3V DDR Thermal Sensor R808 *10K_4 SCLK VCC SDA DXP ALERT# DXN OVERT# GND 1 IO_THERMDA_IO 2 IO_THERMDA_L 3 IO_THERMDC_L 3 10K_4 10K_4 M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_CS#0 M_B_CS#1 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1 M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_WE# A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 2 2 C41 *2200P/50V_4 IO_THERMDC_IO 5 Q38 1 +3V R54 R33 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 D 3 3 3 3 3 3 3 3 3 3 3 3 3 3 M_B_DQ[63:0] JDIM2A M_B_A[15:0] PC2100 DDR3 SDRAM SO-DIMM (204P) 3 3 PC2100 DDR3 SDRAM SO-DIMM (204P) 5 B *METR3904-G 'ϳϴϭͲϭWϴ;ϵŚͿ *G781-1P8 VREF DQ1 M1 Solution Place these Caps near So-Dimm1. +1.35VSUS +1.35VSUS MBCLK2 R816 0_4 8 8,13,24,31 MBDATA2 R817 0_4 7 8,12 PM_EXTTS#0 8 EXTTS#1 PM_EXTTS#0 6 EXTTS#1 4 VCC SDA DXP ALERT# DXN OVERT# GND C144 0.1U/10V_4 1U/6.3V_4 C143 2.2U/6.3V_6 C213 1U/6.3V_4 C33 1U/6.3V_4 C230 10U/6.3VS_6 C28 1U/6.3V_4 C228 10U/6.3VS_6 C29 10U/6.3V_6 3 C171 10U/6.3VS_6 C37 *10U/6.3V_6 5 R482 1K/F_4 3 SMDDR_VREF_DQ1_M3 10U/6.3VS_6 C151 10U/6.3VS_6 C153 10U/6.3VS_6 C50 0.1U/10V_4 C238 *10U/6.3V_6 C51 2.2U/6.3V_6 C260 10U/6.3V_8 C257 10U/6.3V_8 SMDDR_VREF_DQ1_M3 1 3 +SMDDR_VREF_DQ1 2,3,12 C237 SMDDR_VREF_DQ1_M1 *0_6/S DRAMRST_CNTRL_DDR Q1 *ME2320D-G DDR_THERMDA 3 10K_4 1U/6.3V_4 C32 1 G781P8 C394 2200P/50V_4 DDR_THERMDC ĚĚƌĞƐƐ͗'ϳϴϭWϴ;ϵϴŚͿ 2 Q15 METR3904-G 1 R277 C27 1U/6.3V_4 2 A +3V 1U/6.3V_4 C202 R480 +3V SCLK C148 R481 1K/F_4 +SMDDR_VREF_DIMM 0.01U/16V_4 U12 8,13,24,31 1U/6.3V_4 2 C345 8/31: INTEL suggestion +0.75V_DDR_VTT C189 +3V C417 0.1U/10V_4 C409 2.2U/6.3V_6 A +SMDDR_VREF_DQ1 C410 0.022U/16V_4 R293 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 4 3 2 Rev 1A DDR3 DIMM1-RVS (9.2H) Date: Friday, December 21, 2012 5 24.9/F_4 1 Sheet 13 of 44 5 4 3 2 1 14 U26A PART 1 0F 9 PEG_TX0 PEG_TX#0 2 2 PEG_TX1 PEG_TX#1 2 2 PEG_TX2 PEG_TX#2 2 2 PEG_TX3 PEG_TX#3 2 2 PEG_TX4 PEG_TX#4 2 2 PEG_TX5 PEG_TX#5 2 2 PEG_TX6 PEG_TX#6 2 2 PEG_TX7 PEG_TX#7 AA38 Y37 PCIE_RX0P PCIE_TX0P PCIE_RX0N PCIE_TX0N Y35 W 36 PCIE_RX1P PCIE_TX1P PCIE_RX1N PCIE_TX1N W 38 V37 PCIE_RX2P PCIE_TX2P PCIE_RX2N PCIE_TX2N V35 U36 PCIE_RX3P PCIE_TX3P PCIE_RX3N PCIE_TX3N U38 T37 PCIE_RX4P PCIE_TX4P PCIE_RX4N PCIE_TX4N T35 R36 PCIE_RX5P PCIE_TX5P PCIE_RX5N PCIE_TX5N R38 P37 PCIE_RX6P PCIE_TX6P PCIE_RX6N PCIE_TX6N P35 N36 PCIE_RX7P PCIE_TX7P PCIE_RX7N PCIE_TX7N N38 M37 PCIE_RX8P PCIE_TX8P PCIE_RX8N PCIE_TX8N M35 L36 PCIE_RX9P L38 K37 PCIE_RX10P K35 J36 PCIE_RX11P PCIE_TX11P PCIE_RX11N PCIE_TX11N J38 H37 PCIE_RX12P PCIE_TX12P PCIE_RX12N PCIE_TX12N H35 G36 PCIE_RX13P PCIE_TX13P PCIE_RX13N PCIE_TX13N G38 F37 PCIE_RX14P PCIE_TX14P PCIE_RX14N PCIE_TX14N F35 E37 PCIE_RX15P PCIE_TX15P PCIE_RX15N PCIE_TX15N D C For Mars /Sun NC pin : PCI EXPRESS INTERFACE 2 2 PCIE_RX9N N38,M37,M35,L36,L38,K37,K35,J36,J38 H37,H35,G36,G38,F37,F35,E37 PCIE_RX10N PCIE_TX9P PCIE_TX9N Y33 Y32 C_PEG_RXP0 C_PEG_RXN0 C748 C745 0.22U/10V_4 0.22U/10V_4 W 33 W 32 C_PEG_RXP1 C_PEG_RXN1 C755 C750 0.22U/10V_4 0.22U/10V_4 U33 U32 C_PEG_RXP2 C_PEG_RXN2 C738 C734 0.22U/10V_4 0.22U/10V_4 U30 U29 C_PEG_RXP3 C_PEG_RXN3 C728 C726 0.22U/10V_4 0.22U/10V_4 T33 T32 C_PEG_RXP4 C_PEG_RXN4 C757 C751 0.22U/10V_4 0.22U/10V_4 T30 T29 C_PEG_RXP5 C_PEG_RXN5 C740 C739 0.22U/10V_4 0.22U/10V_4 P33 P32 C_PEG_RXP6 C_PEG_RXN6 C742 C744 0.22U/10V_4 0.22U/10V_4 P30 P29 C_PEG_RXP7 C_PEG_RXN7 C754 C758 0.22U/10V_4 0.22U/10V_4 PEG_RX0 2 PEG_RX#0 2 D PEG_RX1 2 PEG_RX#1 2 PEG_RX2 2 PEG_RX#2 2 PEG_RX3 2 PEG_RX#3 2 PEG_RX4 2 PEG_RX#4 2 PEG_RX5 2 PEG_RX#5 2 PEG_RX6 2 PEG_RX#6 2 PEG_RX7 2 PEG_RX#7 2 N33 N32 N30 N29 C FOR Mars / Sun NC pin : N33,N32,N30,N29,L33,L32,L30,L29,K33,K32 PCIE_TX10P PCIE_TX10N L33 L32 J33,J32,K30,K29,H33,H32 L30 L29 K33 K32 J33 J32 K30 K29 Mars/ Sun Only : Stuff Ra H33 H32 B R262 Ra 1.69K/F_4 B +1.0V_VGA CLOCK 8 8 CLK_PCIE_VGA CLK_PCIE_VGA# CLK_PCIE_VGA CLK_PCIE_VGA# AB35 AA36 PCIE_REFCLKP PCIE_REFCLKN CALIBRATION R205 1K/F_4 AH16 TEST_PG AA30 PERSTB PCIE_CALR_TX Y30 PCIE_CALRP PCIE_CALR_RX Y29 PCIE_CALRN R255 1K/F_4 Rc PEGX_RST# +1.0V_VGA Install 1k for Mars / Sun SUN_M2_XT SUN_M2_XT +3V R804 *0_4 +3V_VGA R805 0_4 ϭϬͬϭϱ͗^/ŵŽĚŝĨLJ 2,8,27,30,31,34 7,9 2 PLTRST# DGPU_HOLD_RST# A 4 R235 330_4 DGPU_HIN_RST# PEGX_RST# 2,6,7,8,9,10,12,13,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 16,18,19,44 1 U74AHC1G08G-AL5-R 3 A C330 0.1U/10V_4 5 U11 +3V +1.0V_VGA +3V +1.0V_VGA R237 352-(&75 4XDQWD&RPSXWHU,QF 100K_4 1% Size Custom Document Number 5 4 3 2 Rev 1A THAMES_PCIE_Interface Date: Friday, December 21, 2012 1 Sheet 14 of 44 5 4 For Mars / Sun 3 : AR1/AW8/AR3/AR8/AU8: 2 NC pin For Mars / Sun : DP A to D Port: 1 15 all NC pin U26B For Sun only : AD29 /AC29 /AJ21 /AK21: NC pin PART 2 0F 9 MUTI GFX GENLK_CLK GENLK_VSYNC TP38 TP43 AD29 AC29 GENLK_CLK TXCAP_DPA3P GENLK_VSYNC TXCAM_DPA3N AJ21 AK21 SWAPLOCKA TX0P_DPA2P TX0M_DPA2N DPA SWAPLOCKB TX1P_DPA1P TX1M_DPA1N AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12 D For Sun only : AP10 /AV11 /AT11 /AR12 /AW12 / AU12 /AP12 : NC pin +3V_DELAY 10/17: SI modify R194 R180 15,31 15,31 4.7K_4 12/13: PV modify 4.7K_4 R190 R184 DGPUT_CLK DGPUT_DATA R486 R485 +3V_DELAY TX2P_DPA0P DVPCNTL_MVP_1 TX2M_DPA0N DVPCNTL_1 TXCBP_DPB3P DVPCNTL_2 TXCBM_DPB3N TX3P_DPB2P DVPDATA_1 TX3M_DPB2N DPB DVPDATA_2 DVPDATA_3 TX4P_DPB1P DVPDATA_4 TX4M_DPB1N DVPDATA_6 TX5P_DPB0P DVPDATA_7 TX5M_DPB0N DVPDATA_9 TXCCP_DPC3P DVPDATA_10 TXCCM_DPC3N DVPDATA_12 TX0P_DPC2P DVPDATA_13 TX0M_DPC2N DVPDATA_14 DPC DVPDATA_15 TX1P_DPC1P DVPDATA_16 TX1M_DPC1N R236 *10K/F_4 DVPDATA_18 TX2P_DPC0P DVPDATA_19 TX2M_DPC0N R186 100K_4 DVPDATA_21 TXCDP_DPD3P DVPDATA_22 TXCDM_DPD3N GPIO5 DPD SMBCLK TX4P_DPD1P SMBus SMBDATA TX4M_DPD1N R197 10K/F_4 17 10K/F_4 DGPU_TMS R206 10K/F_4 DGPU_TCK 0_4 TP28 TP26 A 3-k external pull up (3.3 V) is required if an external BIOS ROM chip is used. 42 GFX_CORE_CNTRL2 TP13 TP11 8 R763 CLK_PEGA_REQ# GPIO5 GFX_CORE_CNTRL4 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 HDMI_HP2 GFX_CORE_CNTRL1 GFX_CORE_CNTRL3 VGA_ALERT_1 HPD3 TEMP_FAIL GFX_CORE_CNTRL2 GPIO21 GPIO22 GPIO_23_CLKREQb GFX_CORE_CNTRL1 GFX_CORE_CNTRL3 GPIO22 AVSSN#1 GPIO_1 G GPIO_2 *0_4 AH17 AJ17 AK17 AJ13 AH15 AJ16 AK16 AL16 AM16 AM14 AM13 AK14 AG30 AN14 AM17 AL13 AJ14 AK13 AN13 AVSSN#2 GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON AVSSN#3 DAC1 GPIO_8_ROMSO TEMP_FAIL 42 8/24: DB Modify R178 +3V_DELAY 10K/F_4 AU20 AT19 AT21 AR20 AU22 AV21 AT23 AR22 FOR MARS: AD37/ AE38 / AD35 FOR SUN : AD37/ AE38 / AD35 AD39 AD37 R230 DGPU_PROCHOT# TP34 AG32 AG33 AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24 GENERICC TP21 VGA_ALERT_1 *0_4 FOR SUN GPIO NC PIN : AJ19/ AK19 / AK24 / AM14 / AN14 / AJ24/ AH26 / AH24 / AJ20 AVSSN to GND NC pin 8/15 DB Modify AE36 AD35 10/14 SI Modify C R747 R748 R749 AF37 AE38 VSYNC AC36 AC38 RSET AB34 AVDD AD34 AE34 *0_4 R750 AC33 AC34 *0_4 R752 FOR SUN NC PIN : AD34/ AE34 / AC33 / AC34 / AD39 / AE36 NC#9 V13 U13 AC31 AD30 AC32 AD32 AF32 AA29 AG21 NC_TSVSSQ AF33 PS_0 AM34 PS_0 TP89 PS_1 AD31 PS_1 TP40 PS_2 AG31 PS_2 TP27 PS_3 AD33 PS_3 TP37 DDC1CLK AM26 AN26 HSYNC 10/14: SI modify , DEL R751, R753 GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 R233 *499/F_4 GPIO_12 GPIO_13 GPIO_14_HPD2 AVSSQ +1.8V_AVDD_Q +1.8V_AVDD_Q GPIO_15_PWRCNTL_0 GPIO_16 VDD1DI GPIO_17_THERMAL_INT VSS1DI +VDDD1 +VDDD1 GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 NC#1 GPIO_21 NC#2 GPIO_22_ROMCSB NC#3 CLKREQB NC#4 NC#6 *10K/F_4 AT17 AR16 GPIO_0 NC#5 R158 AU16 AV15 I2C SDA B R182 31 GPU_AC_BATT 42 GFX_CORE_CNTRL4 TP124 TP31 TP35 42 GFX_CORE_CNTRL5 TP125 TP128 TP126 TP18 42 42 AH20 AH18 AN16 AT15 AR14 DEL 8/24: DB Modify +3V_DELAY *3.01K/F_4 GPIO0 GPIO1 GPIO2 GPIO0 TP122 TP123 DGPU_TDI R203 R155 SCL GENERAL PURPOSE I/O *511/F_4 R175 DGPU_TRSTB AU14 AV13 DVPDATA_23 R 8/24: DB Modify 10K/F_4 AT33 AU32 DVPDATA_20 DGPU_PROCHOT# C R204 AK26 AJ26 AR32 AT31 DVPDATA_17 TX5P_DPD0P TP29 AV31 AU30 DVPDATA_11 *4.7K_4 *4.7K_4 8/24: DB Modify TP23 *10K/F_4 GPIO_23_CLKREQb D AR30 AT29 DVPDATA_8 TX5M_DPD0N R146 AT27 AR26 DVPDATA_5 TX3M_DPD2N AJ23 AH23 AU26 AV25 DVPCLK DVPDATA_0 TX3P_DPD2P DGPUT_CLK_1 DGPUT_DATA_1 AT25 AR24 DVPCNTL_0 0_4 0_4 Access to SMBBus ans SDA/SCL is mandatory on all designs Add test points on SMBBus and SDA/SCL for debug +3V_DELAY DVPCNTL_MVP_0 AU24 AV23 GPIO_29 NC#7 GPIO_30 NC#8 AF37/ AC36 / AC38 / AB34 / GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 8/15 Modify GENERICF_HPD5 GENERICG_HPD6 AK20/ AH18 / AN16 / AK17 / AK16 / AL16/ AM16 +1.8V_VGA AC30 CEC_1 AK24 HPD1 MLPS Mars: stuff B For Sun Nc: R167, R141, C155 R167 *499/F_4 R141 *249/F_4 +0.6V_VREFG AH13 VREFG AL21 PX_EN AD28 TESTEN BIT5 => BIT1 BACO C155 Thermal Solution(Close to GPU) C306 15,31 15,31 R812 DGPUT_CLK DGPUT_DATA VGA_ALERT_1 +3V_DELAY 31 *0_4 R202 R813 *0.1U/10V_4 TP19 11001 => 00001 PS2 => 00000 PS3 => 11000 B *0.1U/10V_4 U8 *0_4 8 *0_4 7 R177 VGA_ALERT_2 6 *10K/F_4 4 SCLK SDA VCC DXP ALERT# DXN OVERT# GND +3V_DELAY 1 R242 2 DEBUG *5.1K/F_4 DDC/AUX DDC1DATA +3V_DELAY TESTEN TP44 GPU_THERMDA AUX1P R238 1K/F_4 AUX1N C248 *2200P/50V_4 DGPU_TRSTB DGPU_TDI DGPU_TCK DGPU_TMS DGPU_TDO TP20 TP12 TP15 TP14 TP17 *G781P8 AM23 AN23 AK23 AL24 AM24 JTAG_TRSTB DDC2CLK JTAG_TDI DDC2DATA JTAG_TMS AUX2P JTAG_TDO AUX2N DDCCLK_AUX3P DDCDATA_AUX3N THERMAL Reserve for Power Play GPU_THERMDA GPU_THERMDC +1.8V_TSVDD R151 3.01K/F_4 GFX_CORE_CNTRL2 R150 3.01K/F_4 GFX_CORE_CNTRL3 R152 GFX_CORE_CNTRL4 R153 3.01K/F_4 GFX_CORE_CNTRL5 R166 *3.01K/F_4 R161 Rc 3.01K/F_4 Ra 10K_4 AF29 AG29 DPLUS AK32 GPIO_28_FDO DDCCLK_AUX4P 1.8V(8mA TSVDD) DDCDATA_AUX4N L27 GPIO28 GPIO28 DDCCLK_AUX6P C283 C296 TP25 C287 AL31 TS_A AJ32 AJ33 TSVDD DDCDATA_AUX6N DDCVGACLK 10U/6.3V_8 1U/10V_4 0.1U/10V_4 +1.8V_TSVDD L24 VENDOR R231 R232 NA 4.75K R241 8.45K_4 PS_1 R489 2K_4 +1.8V_AVDD_Q *0_6/S AN20 AM20 C292 *10U/6.3VS_6 DDCVGADATA HYNIX 2G C295 C294 1U/6.3V_4 0.1U/10V_4 C684 *0.01U/50V_4 +1.8V_VGA AL30 AM30 MICRON 2G DAC1 Digital Power. VDD1DI : 1.8V @ 117mA AL29 AM29 L22 DDCDATA_AUX5N 17 R488 8.45K_4 PS_0 DAC1 Analog Power PV, change to 0ohm AVDD : 1.8V @ 18mA +1.8V_VGA DMINUS DDCCLK_AUX5P HCB1608KF121T30 +1.8V_VGA AM19 AL19 +1.8V_VGA R240 2K_4 C321 0.68U/6.3V_4 JTAG_TCK ĚĚƌĞƐƐ͗'ϳϴϭͲϭWϴ;ϵŚͿ GFX_CORE_CNTRL1 AM27 AL27 3 5 GPU_THERMDC DGPU_OVT# GFX_CORE_CNTRL5 => PS1 +1.8V_VGA ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ 12/13: PV modify PS0 AN21 AM21 AJ30 AJ31 2K SAM 2G 4.53K 2K HYNIX 1G 6.98K 4.99K C251 *10U/6.3VS_6 C255 C256 1U/6.3V_4 0.1U/10V_4 MICRON 1G 4.53K 4.99K 3.24K 5.62K SAM 1G PV, change to DNI +1.8V_VGA R215 *0_4 *0_6/S PV, change to 0ohm AK30 AK29 +VDDD1 8.45K R231 *8.45K_4 PS_2 PS_3 R214 4.75K/F_4 C280 0.68U/6.3V_4 R232 4.75K/F_4 C307 *0.01U/50V_4 TSVSS +3V_DELAY SUN_M2_XT For Mars: Stuff Ra, Rc=> VDDC 1.1V For Mars / Sun:NC pin AL30, AM30, AL29, AM29, AN21, AM21, AK30, AK29 A A For Sun Only :NC pin AL27, AM27, AM20, AN20, AN26, AM26, AL19, , AM19, AJ30, AJ31 14,16,18,19,44 +1.0V_VGA 11,16,18,19,44 +1.8V_VGA 17,18 +3V_DELAY 352-(&75 4XDQWD&RPSXWHU,QF +1.0V_VGA +1.8V_VGA +3V_DELAY 1% Size Custom Document Number 4 3 2 Rev 1A THAMES_Main & GND Date: Friday, December 21, 2012 5 1 Sheet 15 of 44 5 4 3 2 1 U26F 16 PART 6 0F 9 Fo Mars/ Sun Change La, Lb Bead to 0 ohm Memory Type 27-MHz (± 30 ppm) crystal connected to XTALIN/XTALOUT, or 27-MHz (1.8 V) oscillator connected to XTALIN. DDR3 D +1.8V_DPLL_PVDD La +1.8V_VGA AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39 L23 Display Phase Lock Loop Power DPLL_PVDD : 1.8V @ 75mA *0_6/S 27-MHz (3.3 V) oscillator connected to XO_IN, and 100-MHz (3.3 V) oscillator connected to XO_IN2. (By default, this clock should not be spread since internal spreading is used.) GDDR5 +1.8V_DPLL_PVDD C264 C259 10U/6.3V_8 C265 0.1U/10V_4 1U/6.3V_4 U26I PART 9 0F 9 0_4 R759 CLKGEN_27M 11 +1.0V_DPLL_VDDC +1.0V_DPLL_VDDC *0_6/S C253 C268 10U/6.3V_8 1U/6.3V_4 1.0V(125mA DPLL_VDDC) XTALIN AV33 *0_4 EVGA-XTALI R792 *22P/50V_4 DPLL_VDDC R207 *10M_6 C267 0.1U/10V_4 AN32 Y2 *7A27000010 DPLL_PVSS DPLL_PVSS AU34 *0_4 H7 H8 L35 SPLL_PVDD AN9 AN10 C176 SPLL_VDDC XO_IN2 AW34 AF30 AF31 AW35 ϭϮͬϭϯ͗WsŵŽĚŝĨLJĚĞů TP129 R487 *0_4 NC_XTAL_PVDD CLKTESTB AK10 CLKTESTA AL10 CLKTESTB NC_XTAL_PVSS +1.0V_SPLL_VDDC SPLL_VDDC : 0.935V @ 150mA +1.0V_VGA 1.0V(125mA DPLL_VDDC) C193 *0.1U/10V_4 +1.0V_SPLL_VDDC HCB1608KF-471T10 C181 C222 10U/6.3V_8 1U/6.3V_4 C216 0.1U/10V_4 SUN_M2_XT SPLL_PVSS DPEF_VDD18 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND PCIE_VSS GND Debug only, for clock observation, if not needed, DNI R171 *51.1/F_4 R212 R249 Ra Rb C227 *0.1U/10V_4 R181 *51.1/F_4 *0_4 *0_4 reserve Ra, Rb for future ASIC GND GND SPLL_PVSS CLKTESTA L19 GND PCIE_VSS GND F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 C191 0.1U/10V_4 1U/6.3V_4 GND PCIE_VSS GND +1.8V_SPLL_PVDD FCM1005KF-121T03 C167 10U/6.3V_8 PLLS/XTAL XO_IN SPLL_PVDD : 1.8V @ 75mA L16 GND PCIE_VSS GND MPLL_PVDD +1.8V_SPLL_PVDD +1.8V_VGA PCIE_VSS ϭϭͬϮϵ͗WƌĞWsŵŽĚŝĨLJ MPLL_PVDD C438 0.1U/10V_4 AM10 C GND GND C437 1U/6.3V_4 GND PCIE_VSS C245 EVGA-XTALO R793 MPLL_PVDD : 1.8V @ 150mA C441 10U/6.3V_8 GND PCIE_VSS *22P/50V_4 +1.8V_MPLL_PVDD +1.8V_VGA GND PCIE_VSS GND XTALOUT +1.8V_MPLL_PVDD HCB1608KF-471T10 C244 1 AN31 DPLL_PVDD 2 L21 +1.0V_VGA AM32 DPLL_VDDC : 0.935V @ 140mA Lb PCIE_VSS route 50ohms single-ended/ 100ohms diff and keep short B GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 D AG22 is nc pin C GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13 B GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VSS_MECH GND VSS_MECH GND VSS_MECH A39 AW1 AW39 A A SUN_M2_XT 14,18,19,44 +1.0V_VGA 11,15,18,19,44 +1.8V_VGA 352-(&75 4XDQWD&RPSXWHU,QF +1.0V_VGA 1% +1.8V_VGA Size Custom Document Number Rev 1A THAMES_XTAL Date: Friday, December 21, 2012 5 4 3 2 Sheet 1 16 of 44 5 4 Fo Mars : U26G 3 2 1 17 AF35, AG36: NC pin AN36, AP37: NC pin PART 7 0F 9 VARY_BL LVDS CONTROL DIGON TXCLK_UP_DPF3P TXCLK_UN_DPF3N D TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N TXOUT_U3P LVTMDP TXOUT_U3N TXCLK_LP_DPE3P TXCLK_LN_DPE3N TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N TXOUT_L3P TXOUT_L3N AK27 AJ27 CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET AK35 AL36 STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS AH35 AJ36 MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour 0: Enable MLPS, disable GPIO PINSTRAP 1: Disable MLPS, enable GPIO PINSTRAP TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable 0: 50% Tx output swing 1: Full Tx output swing TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable 0: Tx de-emphasis disabled 1: Tx de-emphasis enabled X BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 0: GEN3 not supported at power-on 1: GEN3 supported at power-on 1 BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0: VGA controller capacity enabled 1: VGA controller capacity disabled (for multi-GPU) 0 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select AG38 AH37 AF35 AG36 AP34 AR34 AW37 AU35 AR37 AU39 AP35 AR35 AN36 AP37 Fo Sun Only : All NC pin SUN_M2_XT C +3V_DELAY 15 GPIO0 GPIO0 Default Setting AJ38 AK37 R133 *10K_4 D X X If GPIO22 = 0, defines memory aperture size If GPIO22 = 1, defines ROM type 100 - 512Kbit M25P05A (ST) 101 - 1Mbit M25P10A (ST) 101 - 2Mbit M25P20 (ST) 101 - 4Mbit M25P40 (ST) 101 - 8Mbit M25P80 (ST) 100 - 512Kbit Pm25LV512 (Chingis) 101 - 1Mbit Pm25LV010 (Chingis) XXX C BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device 0: Disabled 1: Enabled X AUD[1] AUD[0] NA NA HSYNC VSYNC 00 - No audio function 01 - Audio for DP only 10 - Audio for DP and HDMI if dongle is detected 11 - Audio for both DP and HDMI HDMI must only be enabled on systems that are legally entitled. It is the responsibility of the system designer to ensure that the system is entitled to support this feature. XX CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour 0: Disabled 1: Enabled RESERVED RESERVED RESERVED RESERVED PS_1[3] PS_1[2] NA NA GENLK_CLK GPIO8 GPIO21 GENERICC X NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET AUD_PORT_CONN_PINSTRAP[2] AUD_PORT_CONN_PINSTRAP[1] AUD_PORT_CONN_PINSTRAP[0] PS_3[5] PS_3[4] PS_0[5] NA NA NA B 15 GPIO28 GPIO28 Ra R216 Rb *10K_4 R217 10K_4 0 0 0 0 Reserved Reserved Reserved Reserved (for Thames/Whistler/Seymour only) STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS 111 = 0 usable endpoints 110 = 1 usable endpoints 101 = 2 usable endpoints 100 = 3 usable endpoints 011 = 4 usable endpoints 010 = 5 usable endpoints 001 = 6 usable endpoints 000 = all endpoints are usable XXX B Thems : stuff Ra=> disable MLPS , support GPIO only Mars : stuff Rb=> enable MLPS, support MLPS only Memory Aperture size GPIO9 BIOSROM A 0 0 0 0 0 0 0 0 Power Up/Down Sequence GPIO13 GPIO12 GPIO11 ROMIDCFG2 128M 256M 64M 32M 512M 1G 2G 4G 0 0 0 0 1 1 1 1 ROMIDCFG1 0 0 1 1 0 0 1 1 ROMIDCFG0 0 1 0 1 0 1 0 1 +VGA_CORE VDDC +VGA_CORE VDDCI +1.5V_VGA VDDR1 +3.3V_Delay +1.8V_VGA +1.8V_VGA A VDDR3 VDDR4 352-(&75 4XDQWD&RPSXWHU,QF VDD_CT It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0. 20ms 20ms 1% Size Custom Document Number 5 4 3 2 Rev 1A THAMES_LVDS / STRAP Date: Friday, December 21, 2012 1 Sheet 17 of 44 5 4 3 2 1 U26E +1.5V_VGA VDDR1 , 1.5V @ 2A, GDDR5 900MHz 18 8/15 DB modify PART 5 0F 9 MEM I/O C796 10U/6.3VS_6 C783 10U/6.3VS_6 C689 10U/6.3VS_6 C514 10U/6.3VS_6 Reserve for Drop *330u_2.5V_3528 C923 1 C922 C785 *22U/6.3VS_8 1 C205 22U/6.3V_8 + C457 *22U/6.3VS_8 C449 *22U/6.3VS_8 2 C178 22U/6.3V_8 *330u_2.5V_3528 C453 *22U/6.3VS_8 2 C254 22U/6.3V_8 + C826 *22U/6.3VS_8 L49 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_PCIE_VDDR VDDR1 NC_BIF_VDDC VDDR1 NC_BIF_VDDC VDDR1 PCIE_PVDD VDDR1 VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC VDDR1 PCIE_VDDC BACO VDDR1 VDDR1 CORE VDDR1 AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 VDDC VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC LEVEL TRANSLATION VDDC VDD_CT VDDC VDD_CT VDDC VDD_CT VDDC VDD_CT VDDC VDDC VDDC VDDR3 : 3.3V @ 60mA VDDC AF23 AF24 AG23 AG24 VDDC VDDR3 VDDC VDDR3 VDDC VDDR3 VDDC VDDR3 VDDC VDDC DVP C C676 *10U/6.3VS_6 C673 1U/6.3V_4 C240 1U/6.3V_4 AD12 AF11 AF12 AF13 C674 1U/6.3V_4 VDDC VDDR4 L18 VDDC VDDR4 VDDC VDDR4 VDDC VDDC AF15 AG11 AG13 AG15 VDDR4 VDDC VDDR4 VDDC VDDR4 VDDC VDDR4 VDDC For Sun: NC L18, C214, C223,C241, C232, C311, C310 VDDC C214 *10U/6.3VS_6 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ AH22 AH27 AH28 M26 N24 R18 R21 R23 R26 T17 T20 T22 T24 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28 VDDC VDDR4 : 1.8V @ 300mA *0_6 C223 C241 *10U/6.3VS_6 *1U/6.3V_4 C232 C311 C310 *1U/6.3V_4*0.1U/10V_4 *0.1U/10V_4 VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13 VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI ZŽƵƚĞĂƐĚŝĨĨĞƌĞŶƚŝĂůƉĂŝƌĂŶĚĐŽŶŶĞĐƚƚŽƚŚĞs^EĂŶĚZdEƉŝŶƐŽĨƚŚĞsZ ƚŚƌŽƵŐŚĂĚĞĐŽƵƉůŝŶŐĂŶĚƚĞƌŵŝŶĂƚŝŽŶĐŝƌĐƵŝƚ͘ AF28 42 VGPU_CORE_SENSE TP33 VDDCI VOLTAGE SENESE VDDCI ISOLATED CORE I/O B FB_VDDC AG28 FB_VDDCI AH29 FB_GND VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI 42 VSS_GPU_SENSE C361 10U/6.3VS_6 C360 10U/6.3VS_6 0_8 *0_8 +VGA_CORE +VGA_CORE C211 C372 C356 C371 C354 C210 C353 C219 C384 C370 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C313 C656 C652 C355 C369 C341 C314 C315 C180 C352 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C VDDR4 +VDDR4 For Mars: stuff R290 Rb VDDR1 I/O *0_6/S BIF_VDDC Ra D +1.0V_VGA VDDR1 VDDC +3V_DELAY C378 C389 C364 C380 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 BIF_VDDC N27 T27 BIF_VDDC +1.0V_VGA C385 C373 C399 C366 C393 C379 C388 C374 C363 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 R267 VDDR1 C924 10U/6.3VS_6 PCIe Digital Power Supply PCIE_VDDC : 0.935V @ 1.88A (GEN2.0) PCIE_VDDC : 0.935V @ 2.5A (GEN3.0) VDDR1 VDDC AF26 AF27 AG26 AG27 +1.8V_VGA C926 C925 0.1U/10V_4 1U/6.3V_4 VDDR1 VDDC *0_6/S L17 G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28 PCIE_VDDC VDDR1 C672 C660 C661 C655 C654 *10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 0.1U/10V_4 +3V_VGA AA31 AA32 AA33 AA34 W30 Y31 V28 W29 AB37 VDDC VDDC_CT: 1.8V @250mA +1.8V_VDD_CT +1.8V_VGA NC_PCIE_VDDR VDDR1 VDDCI VDDCI VDDCI VDDCI VDDCI C209 C317 C350 C318 C316 C208 C340 C239 C342 C233 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C217 22U/10V_6 C320 22U/10V_6 C224 22U/10V_6 C203 22U/10V_6 C207 22U/10V_6 Reserve for Drop C242 22U/10V_6 C309 22U/10V_6 C234 22U/10V_6 C338 22U/10V_6 + C351 330u_2.5V_3528 D C479 10U/6.3VS_6 VDDR1 1 C401 10U/6.3VS_6 AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7 2 C396 C489 C719 C468 C500 C764 C335 C499 C725 C470 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 PCIE I/O power for the memory interface. ϭϮͬϭϯ͗WsŵŽĚŝĨLJ +VGA_CORE BIF_VDDC C312 C375 C343 C331 C339 C382 C367 C387 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C403 22U/6.3VS_8 C383 22U/10V_6 C386 22U/10V_6 C391 10U/6.3VS_6 B C395 C365 C348 22U/10V_61U/6.3V_4 1U/6.3V_4 20,21,22,34,43 14,16,19,44 11,15,16,19,44 14,44 34,42,44 SUN_M2_XT ^ƵƉƉŽƌƚKDŽĚĞ C390 C404 1U/6.3V_4 1U/6.3V_4 +1.5V_VGA +1.0V_VGA +1.8V_VGA +3V_VGA +VGA_CORE +1.5V_VGA +1.0V_VGA +1.8V_VGA +3V_VGA +VGA_CORE Note1. 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra) PX_EN = 0, for Normal Operation PX_EN = 1, for BACO MODE 2. BACO Support: Refer to the BACO reference schematics/Application note for detail about BIF_VDDC Rail if BACO is Supported (Uninstall Ra) A A 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 5 4 3 2 Rev 1A THAMES_Power & BACO Date: Friday, December 21, 2012 1 Sheet 18 of 44 5 4 3 2 For Mars : L20 1 19 sutff For Sun: L20 , C247 , C246 , C252 NC +1.0V_VGA U26H DPAB_VDD10 PART 8 0F 9 D DP_VDDR L20 D DP_VDDC DP_VDDC DP_VDDC DP_VDDC AN24 AP24 AP25 AP26 AU28 AV29 DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDR DP_VDDC DP_VDDR AP20 AP21 AP22 AP23 AU18 AV19 NC +1.8V_VGA DP_VDDC DP_VDDR DP_VDDC DP_VDDR L26 DP_VDDC C279 C281 C282 *10U/6.3VS_6 *1U/6.3V_4 *0.1U/10V_4 DP_VDDR DP GND DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VDDR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR DP_VSSR CALIBRATION DP_VSSR DP_VSSR B DP_VSSR DPAB_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ DPCD_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR R495 *150/F_4 AM39 +1.0V_VGA L25 DP_VDDR DP_VSSR AW18 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ DP_VDDR DP_VSSR AW28 AL33 AM33 AK33 AK34 DPEF_VDD10 DP_VSSR AH34 AJ34 AF34 AG34 AM37 AL38 *0_6 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ AP13 AT13 AP14 AP15 DP_VDDR DPEF_VDD18 C C247 C246 C252 *0.1U/10V_4 *1U/6.3V_4 *10U/6.3VS_6 DP_VDDR DP_VDDC For Mars : L26 sutff For Sun: L26 , C279 , C281 , C282 AP31 AP32 AN33 AP33 DP_VDDR DP_VDDC ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ *0_6 DP_VDDC DPEF_CALR DP_VSSR DP_VSSR DP_VSSR DP_VSSR For Mars : R495 sutff For Sun : R495 NC AN27 AP27 AP28 AW24 AW26 AN29 AP29 AP30 AW30 AW32 AN17 AP16 AP17 AW14 AW16 AN19 AP18 AP19 AW20 AW22 AN34 AP39 AR39 AU37 AF39 AH39 AK39 AL34 AV27 AR28 AV17 AR18 AN38 AM35 C291 C290 C293 *0.1U/10V_4 *1U/6.3V_4 *10U/6.3VS_6 *0_6 For Mars : L25 sutff For Sun : L25/ C293/C290/C291 NC B ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ>Zϳϱϰ For Mars : R754 sutff For Sun : R754 NC 14,16,18,44 11,15,16,18,44 +1.0V_VGA +1.8V_VGA +1.0V_VGA +1.8V_VGA SUN_M2_XT A A 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 4 3 2 Rev 1A THAMES_DP Powers Date: Friday, December 21, 2012 5 C Sheet 1 19 of 44 VMA_RAS0# VMA_RAS1# 21 21 VMA_CAS0# VMA_CAS1# VMA_CAS0# VMA_CAS1# VMA_WE0# VMA_WE1# VMA_WE0# VMA_WE1# 21 D 21 21 21 VMA_CLK0 21 VMA_CLK0# VMA_CLK0 VMA_CLK0# 21 VMA_CLK1 21 VMA_CLK1# VMA_CLK1 VMA_CLK1# VMA_WDQS[7..0] VMA_WDQS[7..0] VMA_RDQS[7..0] VMA_RDQS[7..0] 21 21 21 VMA_DM[7..0] VMA_DM[7..0] VMA_DQ[63..0] VMA_DQ[63..0] VMA_MA[14..0] VMA_MA[14..0] VMA_BA0 VMA_BA1 VMA_BA2 21 VMA_BA0 21 VMA_BA1 21 VMA_BA2 +1.5V_VGA C R331 *40.2/F_4 R330 C466 *1U/6.3V_4 22 22 22 22 2 *100/F_4 PLACE MVREFD DIVIDERS AND CAPS CLOSE TO ASIC +1.5V_VGA R327 C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5 DQA0_0 MAA0_0/MAA_0 DQA0_1 MAA0_1/MAA_1 DQA0_2 MAA0_2/MAA_2 DQA0_3 MAA0_3/MAA_3 DQA0_4 MAA0_4/MAA_4 DQA0_5 MAA0_5/MAA_5 DQA0_6 MAA0_6/MAA_6 DQA0_7 MAA0_7/MAA_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_BA2 MAA1_6/MAA_BA0 MAA1_7/MAA_BA1 G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1 22 22 22 22 22 22 22 22 VMB_RAS0# VMB_RAS1# VMB_RAS0# VMB_RAS1# VMB_CAS0# VMB_CAS1# VMB_CAS0# VMB_CAS1# VMB_WE0# VMB_WE1# VMB_WE0# VMB_WE1# DQA0_17 WCKA0_0/DQMA_0 DQA0_18 WCKA0B_0/DQMA_1 DQA0_19 WCKA0_1/DQMA_2 DQA0_20 WCKA0B_1/DQMA_3 DQA0_21 WCKA1_0/DQMA_4 DQA0_22 WCKA1B_0/DQMA_5 DQA0_23 WCKA1_1/DQMA_6 DQA0_24 WCKA1B_1/DQMA_7 A32 C32 D23 E22 C14 A14 E10 D9 VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7 DQA0_25 DQA0_26 EDCA0_0/QSA_0 DQA0_27 EDCA0_1/QSA_1 DQA0_28 EDCA0_2/QSA_2 DQA0_29 EDCA0_3/QSA_3 DQA0_30 EDCA1_0/QSA_4 DQA0_31 EDCA1_1/QSA_5 DQA1_0 EDCA1_2/QSA_6 DQA1_1 EDCA1_3/QSA_7 C34 D29 D25 E20 E16 E12 J10 D7 VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7 VMB_CS0# VMB_CS0# VMB_CS1# VMB_CS1# VMB_CKE0 VMB_CKE1 VMB_CKE0 VMB_CKE1 VMB_CLK0 VMB_CLK0# 22 VMB_CLK0 22 VMB_CLK0# DQA0_16 VMB_CLK1 VMB_CLK1# 22 VMB_CLK1 22 VMB_CLK1# 22 VMB_WDQS[7..0] 22 VMB_RDQS[7..0] 22 VMB_WDQS[7..0] VMB_RDQS[7..0] VMB_DM[7..0] VMB_DM[7..0] 22 VMB_DQ[63..0] 22 VMB_MA[14..0] VMB_DQ[63..0] VMB_MA[14..0] VMB_BA0 VMB_BA1 VMB_BA2 22 VMB_BA0 22 VMB_BA1 22 VMB_BA2 DQA1_2 DQA1_3 DDBIA0_0/QSA_0B DQA1_4 DDBIA0_1/QSA_1B DQA1_5 DDBIA0_2/QSA_2B DQA1_6 DDBIA0_3/QSA_3B DQA1_7 DDBIA1_0/QSA_4B DQA1_8 DDBIA1_1/QSA_5B DQA1_9 DDBIA1_2/QSA_6B DQA1_10 DDBIA1_3/QSA_7B A34 E30 E26 C20 C16 C12 J11 F8 VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7 +1.5V_VGA R317 40.2/F_4 DQA1_11 DQA1_12 ADBIA0/ODTA0 DQA1_13 ADBIA1/ODTA1 J21 VMA_ODT0 G19 VMA_ODT1 DQA1_14 DQA1_15 CLKA0 DQA1_16 CLKA0B H27 VMA_CLK0 G27 VMA_CLK0# R321 DQA1_17 DQA1_18 CLKA1 DQA1_19 CLKA1B J14 VMA_CLK1 H14 VMA_CLK1# C440 1U/6.3V_4 100/F_4 DQA1_20 DQA1_21 RASA0B DQA1_22 RASA1B K23 K19 VMA_RAS0# VMA_RAS1# DQA1_23 DQA1_24 CASA0B DQA1_25 CASA1B K20 K17 VMA_CAS0# VMA_CAS1# K24 K27 VMA_CS0# PLACE MVREFD DIVIDERS AND CAPS CLOSE TO ASIC +1.5V_VGA DQA1_26 DQA1_27 CSA0B_0 DQA1_28 CSA0B_1 DQA1_29 DQA1_30 CSA1B_0 DQA1_31 CSA1B_1 1 VMB_ODT0 VMB_ODT1 VMB_ODT0 VMB_ODT1 GDDR5/DDR3 VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63 VMA_CKE0 VMA_CKE1 VMA_CKE0 VMA_CKE1 PIN U26C VMA_CS1# VMA_CS1# 3 For Sun : ALL NC PART 3 0F 9 VMA_CS0# VMA_CS0# PIN MEMORY INTERFACE A VMA_RAS0# VMA_RAS1# 21 21 For Sun : ALL NC 21 21 21 21 21 4 VMA_ODT0 VMA_ODT1 VMA_ODT0 VMA_ODT1 M13 VMA_CS1# K16 R159 *40.2/F_4 20 U26D PART 4 0F 9 VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63 C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5 DQB0_0 GDDR5/DDR3 MAB0_0/MAB_0 DQB0_1 MAB0_1/MAB_1 DQB0_2 MAB0_2/MAB_2 DQB0_3 MAB0_3/MAB_3 DQB0_4 MAB0_4/MAB_4 DQB0_5 MAB0_5/MAB_5 DQB0_6 MAB0_6/MAB_6 DQB0_7 MAB0_7/MAB_7 DQB0_8 MAB1_0/MAB_8 DQB0_9 MAB1_1/MAB_9 DQB0_10 MAB1_2/MAB_10 DQB0_11 MAB1_3/MAB_11 DQB0_12 MAB1_4/MAB_12 DQB0_13 MAB1_5/BA2 DQB0_14 MAB1_6/BA0 DQB0_15 MAB1_7/BA1 DQB0_16 MEMORY INTERFACE B 5 21 21 DQB0_17 DQB0_18 DQB0_19 DQB0_20 DQB0_21 DQB0_22 DQB0_23 DQB0_24 WCKB0_0/DQMB_0 WCKB0B_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0B_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1B_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1B_1/DQMB_7 L18 L20 MVREFDA CKEA0 MVREFSA CKEA1 K21 J20 DQB0_26 EDCB0_0/QSB_0 DQB0_27 EDCB0_1/QSB_1 DQB0_28 EDCB0_2/QSB_2 DQB0_29 EDCB0_3/QSB_3 DQB0_30 EDCB1_0/QSB_4 DQB0_31 EDCB1_1/QSB_5 DQB1_0 EDCB1_2/QSB_6 DQB1_1 EDCB1_3/QSB_7 DQB1_3 DDBIB0_0/QSB_0B DQB1_4 DDBIB0_1/QSB_1B DQB1_5 DDBIB0_2/QSB_2B DQB1_6 DDBIB0_3/QSB_3B DQB1_7 DDBIB1_0/QSB_4B DQB1_8 DDBIB1_1/QSB_5B DQB1_9 DDBIB1_2/QSB_6B DQB1_10 L27 N12 AG12 B C462 *1U/6.3V_4 *100/F_4 R295 120/F_4 M12 M27 AH12 NC_MEM_CALRN0 WEA0B NC_MEM_CALRN1 WEA1B K26 L15 VMB_DM0 VMB_DM1 VMB_DM2 VMB_DM3 VMB_DM4 VMB_DM5 VMB_DM6 VMB_DM7 F6 K3 P3 V5 AB5 AH1 AJ9 AM5 VMB_RDQS0 VMB_RDQS1 VMB_RDQS2 VMB_RDQS3 VMB_RDQS4 VMB_RDQS5 VMB_RDQS6 VMB_RDQS7 G7 K1 P1 W4 AC4 AH3 AJ8 AM3 VMB_WDQS0 VMB_WDQS1 VMB_WDQS2 VMB_WDQS3 VMB_WDQS4 VMB_WDQS5 VMB_WDQS6 VMB_WDQS7 DDBIB1_3/QSB_7B T7 W7 VMB_ODT0 VMB_ODT1 L9 L8 VMB_CLK0 VMB_CLK0# C DQB1_11 DQB1_12 ADBIB0/ODTB0 DQB1_13 ADBIB1/ODTB1 DQB1_14 DQB1_15 CLKB0 DQB1_16 CLKB0B DQB1_17 DQB1_18 CLKB1 DQB1_19 CLKB1B AD8 VMB_CLK1 AD7 VMB_CLK1# DQB1_20 DQB1_21 RASB0B DQB1_22 RASB1B T10 Y10 VMB_RAS0# VMB_RAS1# DQB1_23 DQB1_24 CASB0B DQB1_25 CASB1B W10 VMB_CAS0# AA10 VMB_CAS1# DQB1_26 DQB1_27 CSB0B_0 DQB1_28 CSB0B_1 P10 L10 VMB_CS0# DQB1_29 DQB1_30 CSB1B_0 DQB1_31 CSB1B_1 MVREFDB CKEB1 AD10 VMB_CS1# AC10 U10 VMB_CKE0 AA11 VMB_CKE1 MVREFSB WEB0B R328 H3 H1 T3 T5 AE4 AF5 AK6 AK5 D DQB1_2 CKEB0 Y12 MVREFDB MVREFSB AA12 VMA_CKE0 VMA_CKE1 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_BA2 VMB_BA0 VMB_BA1 DQB0_25 40.2/F_4 MVREFDA MVREFSA P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9 VMA_WE0# VMA_WE1# WEB1B N10 VMB_WE0# AB11 VMB_WE1# need check R145 NC_MEM_CALRN2 NC_MEM_CALRP1 MAA0_8/MAA_13 MEM_CALRP0 MAA1_8/MAA_14 MEM_CALRP2 MAA0_9/MAA_15 MAA1_9/RSVD H23 VMA_MA13 J19 VMA_MA14 M21 TP61 M20 TP60 C157 1U/6.3V_4 MAB0_8/MAB_13 100/F_4 MAB1_8/MAB_14 MAB0_9/MAB_15 MAB1_9/RSVD DRAM_RST For MARS / SUN Re stuff 120 ohm 1% J19 For Mars : MAA_14 For Sun : NC T8 VMB_MA13 W8 VMB_MA14 U12 TP52 V12 TP49 AH11 B DRAM_RST 8/15 Modify 8/15: DB MODIFY SUN_M2_XT SUN_M2_XT M21 For Mars : MAA_15 For Sun : NC M20 For Mars : RSVD For Sun : NC DRAM_RST R162 DRAM_RST_M 10/F_4 R170 DRAM_RST_M 51_4 21,22 8/15: DB MODIFY R163 4.99K/F_4 C177 120P/50V_4 A A 18,21,22,34,43 +1.5V_VGA 352-(&75 4XDQWD&RPSXWHU,QF +1.5V_VGA 1% Size Custom Document Number 5 4 3 2 Rev 1A THAMES_MEM_Interface Date: Friday, December 21, 2012 1 Sheet 20 of 44 5 4 3 2 1 21 CHANNEL A: 256MB/512MB DDR3 VMA_MA[14..0] 20 VMA_MA[14..0] 20 VMA_DM[7..0] D 20 VMA_DQ[63..0] 20 VMA_WDQS[7..0] 20 VMA_RDQS[7..0] U16 D 20 20 20 VREFC_VMA1 VREFD_VMA1 M9 H2 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 M3 N9 M4 VMA_BA0 VMA_BA1 VMA_BA2 J8 K8 K10 20 VMA_CLK0 20 VMA_CLK0# 20 VMA_CKE0 K2 L3 J4 K4 L4 20 VMA_ODT0 20 VMA_CS0# 20 VMA_RAS0# 20 VMA_CAS0# 20 VMA_WE0# C VMA_RDQS0 VMA_RDQS2 F4 C8 VMA_DM0 VMA_DM2 E8 D4 VMA_WDQS0 VMA_WDQS2 20,22 G4 B8 T3 DRAM_RST_M VMA_ZQ1 Should be 240 Ohms +-1% R549 *243/F_4 L9 A1 T1 A11 T11 J2 L2 J10 L10 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 BA0 BA1 BA2 CK CK CKE/CKE0 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQSL DQSU RESET ZQ/ZQ0 NC NC NC NC NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1 VMA_DQ0 VMA_DQ6 VMA_DQ2 VMA_DQ7 VMA_DQ3 VMA_DQ4 VMA_DQ1 VMA_DQ5 D8 C4 C9 C3 A8 A3 B9 A4 M9 H2 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 VMA_BA0 VMA_BA1 VMA_BA2 M3 N9 M4 VMA_DQ20 VMA_DQ19 VMA_DQ23 VMA_DQ17 VMA_DQ22 VMA_DQ16 VMA_DQ21 VMA_DQ18 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10 B3 D10 G8 K3 K9 N2 N10 R2 R10 VMA_CLK0 VMA_CLK0# VMA_CKE0 J8 K8 K10 VMA_DQ11 VMA_DQ12 VMA_DQ15 VMA_DQ10 VMA_DQ14 VMA_DQ8 VMA_DQ13 VMA_DQ9 D8 C4 C9 C3 A8 A3 B9 A4 VMA_DQ27 VMA_DQ29 VMA_DQ26 VMA_DQ28 VMA_DQ25 VMA_DQ30 VMA_DQ24 VMA_DQ31 BA0 BA1 BA2 CK CK CKE/CKE0 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 A2 A9 C2 C10 D3 E10 F2 H3 H10 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0# K2 L3 J4 K4 L4 VMA_RDQS1 VMA_RDQS3 F4 C8 VMA_DM1 VMA_DM3 E8 D4 VMA_WDQS1 VMA_WDQS3 G4 B8 T3 DRAM_RST_M B2 B10 D2 D9 E3 E9 F10 G2 G10 VMA_ZQ2 L9 R341 *243/F_4 A1 T1 A11 T11 Should be 240 Ohms +-1% J2 L2 J10 L10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU DQSL DQSU RESET ZQ/ZQ0 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 NC NC NC NC VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 NC/ODT1 VSSQ#E9 NC/CS1 VSSQ#F10 NC/CE1 VSSQ#G2 NC/ZQ1 VSSQ#G10 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 R338 VMA_BA0 VMA_BA1 VMA_BA2 M3 N9 M4 *40.2/F_4 +1.5V_VGA A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 *0.01U/16V_4 R337 +1.5V_VGA *40.2/F_4 A2 A9 C2 C10 D3 E10 F2 H3 H10 BA0 BA1 BA2 C512 VMA_CLK0_COMM 20 20 20 20 20 VMA_CLK0# VMA_CLK1 J8 K8 K10 20 VMA_CLK1 20 VMA_CLK1# 20 VMA_CKE1 K2 L3 J4 K4 L4 VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1# R540 *40.2/F_4 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E4 F8 F3 F9 H4 H9 G3 H8 VMA_DQ47 VMA_DQ44 VMA_DQ45 VMA_DQ43 VMA_DQ46 VMA_DQ41 VMA_DQ40 VMA_DQ42 D8 C4 C9 C3 A8 A3 B9 A4 VMA_DQ32 VMA_DQ36 VMA_DQ33 VMA_DQ38 VMA_DQ34 VMA_DQ39 VMA_DQ35 VMA_DQ37 U29 C787 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VMA_RDQS5 VMA_RDQS4 F4 C8 VMA_DM5 VMA_DM4 E8 D4 *0.01U/16V_4 R541 *40.2/F_4 VMA_WDQS5 VMA_WDQS4 G4 B8 VMA_CLK1# B2 B10 D2 D9 E3 E9 F10 G2 G10 Should be 240 Ohms +-1% DRAM_RST_M T3 VMA_ZQ3 L9 R333 *243/F_4 A1 T1 A11 T11 J2 L2 J10 L10 R339 *4.99K/F_4 R559 *4.99K/F_4 VREFC_VMA1 VMA_BA0 VMA_BA1 VMA_BA2 M3 N9 M4 +1.5V_VGA CK CK CKE/CKE0 B3 D10 G8 K3 K9 N2 N10 R2 R10 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU DQSL DQSU RESET ZQ/ZQ0 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 B2 B10 D2 D9 E3 E9 F10 G2 G10 NC NC NC NC VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 NC/ODT1 VSSQ#E9 NC/CS1 VSSQ#F10 NC/CE1 VSSQ#G2 NC/ZQ1 VSSQ#G10 VMA_CLK1 VMA_CLK1# VMA_CKE1 J8 K8 K10 VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1# K2 L3 J4 K4 L4 VMA_RDQS6 VMA_RDQS7 F4 C8 VMA_DM6 VMA_DM7 E8 D4 VMA_WDQS6 VMA_WDQS7 G4 B8 +1.5V_VGA T3 DRAM_RST_M Should be 240 Ohms +-1% VMA_ZQ4 L9 R546 *243/F_4 A1 T1 A11 T11 J2 L2 J10 L10 VREFCA VREFDQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VMA_DQ49 VMA_DQ52 VMA_DQ50 VMA_DQ54 VMA_DQ51 VMA_DQ53 VMA_DQ48 VMA_DQ55 D8 C4 C9 C3 A8 A3 B9 A4 VMA_DQ60 VMA_DQ59 VMA_DQ63 VMA_DQ58 VMA_DQ61 VMA_DQ56 VMA_DQ62 VMA_DQ57 +1.5V_VGA BA0 BA1 BA2 CK CK CKE/CKE0 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 DQSL DQSU RESET ZQ/ZQ0 NC NC NC NC VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10 NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1 B3 D10 G8 K3 K9 N2 N10 R2 R10 +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 C A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 B2 B10 D2 D9 E3 E9 F10 G2 G10 100-BALL SDRAM DDR3 *H5TC4G63AFR-11C +1.5V_VGA +1.5V_VGA R332 *4.99K/F_4 C797 *0.1U/10V_4 R560 *4.99K/F_4 VREFD_VMA2 R326 *4.99K/F_4 B +1.5V_VGA R545 *4.99K/F_4 VREFC_VMA3 VREFD_VMA3 R547 *4.99K/F_4 VREFC_VMA4 R558 *4.99K/F_4 R340 *4.99K/F_4 C513 *0.1U/10V_4 C816 *0.1U/10V_4 R336 *4.99K/F_4 R557 *4.99K/F_4 C477 *0.1U/10V_4 C801 *0.1U/10V_4 R329 *4.99K/F_4 R543 *4.99K/F_4 C465 *0.1U/10V_4 VREFD_VMA4 R553 *4.99K/F_4 C791 *0.1U/10V_4 C795 *0.1U/10V_4 +1.5V_VGA +1.5V_VGA C824 *1U/6.3V_4 C823 *1U/6.3V_4 C803 *1U/6.3V_4 C807 *1U/6.3V_4 C817 *1U/6.3V_4 C819 *1U/6.3V_4 +1.5V_VGA C818 *1U/6.3V_4 C516 *10U/6.3VS_6 C505 *1U/6.3V_4 C463 *1U/6.3V_4 C503 *1U/6.3V_4 C504 *1U/6.3V_4 C507 *1U/6.3V_4 C464 *1U/6.3V_4 C506 *1U/6.3V_4 C515 *1U/6.3V_4 C484 *10U/6.3VS_6 C454 *1U/6.3V_4 +1.5V_VGA C450 *1U/6.3V_4 C486 *1U/6.3V_4 C487 *1U/6.3V_4 C502 *1U/6.3V_4 C469 *1U/6.3V_4 C471 *1U/6.3V_4 C492 *1U/6.3V_4 C798 *10U/6.3VS_6 C813 *1U/6.3V_4 C808 *1U/6.3V_4 C497 *1U/6.3V_4 C815 *1U/6.3V_4 C810 *1U/6.3V_4 C811 *1U/6.3V_4 C812 *1U/6.3V_4 C496 *0.1U/10V_4 C809 *0.1U/10V_4 C495 *0.1U/10V_4 C478 *0.1U/10V_4 C786 *0.1U/10V_4 C789 *0.1U/10V_4 C806 *1U/6.3V_4 +1.5V_VGA +1.5V_VGA C802 *0.1U/10V_4 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 E4 F8 F3 F9 H4 H9 G3 H8 VREFD_VMA1 +1.5V_VGA C799 *0.1U/10V_4 VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 100-BALL SDRAM DDR3 *H5TC4G63AFR-11C +1.5V_VGA VREFC_VMA2 C822 *1U/6.3V_4 M9 H2 +1.5V_VGA R551 *4.99K/F_4 C794 *10U/6.3VS_6 VREFC_VMA4 VREFD_VMA4 VMA_CLK1_COMM 100-BALL SDRAM DDR3 *H5TC4G63AFR-11C B +1.5V_VGA VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VREFCA VREFDQ VMA_CLK0 +1.5V_VGA B3 D10 G8 K3 K9 N2 N10 R2 R10 +1.5V_VGA 100-BALL SDRAM DDR3 *H5TC4G63AFR-11C R555 *4.99K/F_4 E4 F8 F3 F9 H4 H9 G3 H8 +1.5V_VGA ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU E4 F8 F3 F9 H4 H9 G3 H8 VREFC_VMA2 VREFD_VMA2 M9 H2 VREFC_VMA3 VREFD_VMA3 U17 U30 C820 *0.1U/10V_4 C821 *0.1U/10V_4 C805 *0.1U/10V_4 C800 *0.1U/10V_4 C825 C804 *0.1U/10V_4 *0.1U/10V_4 C508 *0.1U/10V_4 C510 *0.1U/10V_4 C473 *0.1U/10V_4 C501 *0.1U/10V_4 C494 *0.1U/10V_4 C509 *0.1U/10V_4 C490 C511 *0.1U/10V_4 *0.1U/10V_4 C488 *0.1U/10V_4 C483 *0.1U/10V_4 +1.5V_VGA C491 *0.1U/10V_4 C456 *0.1U/10V_4 C452 *0.1U/10V_4 C493 *0.1U/10V_4 C498 C474 *0.1U/10V_4 *0.1U/10V_4 C814 *0.1U/10V_4 C790 *0.1U/10V_4 A A 18,20,22,34,43 +1.5V_VGA 352-(&75 4XDQWD&RPSXWHU,QF +1.5V_VGA 1% Size Custom Document Number 4 3 2 Rev 3A VRAM-A (DDR3 BGA96) Date: Friday, December 21, 2012 5 1 Sheet 21 of 44 5 4 3 2 1 22 VMB_MA[14..0] 20,22 VMB_MA[14..0] 20 VMB_DM[7..0] 20 VMB_DQ[63..0] 20 VMB_WDQS[7..0] 20 VMB_RDQS[7..0] CHANNEL B: 256MB/512MB DDR3 D D U9 U25 U14 VREFC_VMB1 VREFD_VMB1 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 20,22 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 20 20 20 VMB_BA0 VMB_BA1 VMB_BA2 VREFCA VREFDQ N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 M3 N9 M4 VMB_ODT0 VMB_RDQS0 VMB_RDQS2 VMB_DM0 VMB_DM2 VMB_WDQS0 VMB_WDQS2 20,21,22 F4 C8 E8 D4 DML DMU G4 B8 VMB_ZQ1 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 DQSL DQSU T3 DRAM_RST_M VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 C RESET L9 E4 F8 F3 F9 H4 H9 G3 H8 VMB_DQ4 VMB_DQ0 VMB_DQ6 VMB_DQ1 VMB_DQ5 VMB_DQ3 VMB_DQ7 VMB_DQ2 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ21 VMB_DQ23 VMB_DQ17 VMB_DQ22 VMB_DQ16 VMB_DQ19 VMB_DQ18 VMB_DQ20 U27 +1.5V_VGA CK CK CKE/CKE0 K2 L3 J4 K4 L4 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 BA0 BA1 BA2 J8 K8 K10 20 VMB_CLK0 20 VMB_CLK0# 20 VMB_CKE0 20 VMB_ODT0 20 VMB_CS0# 20 VMB_RAS0# 20 VMB_CAS0# 20 VMB_WE0# M9 H2 ZQ/ZQ0 B3 D10 G8 K3 K9 N2 N10 R2 R10 VREFC_VMB2 VREFD_VMB2 M9 H2 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 M3 N9 M4 VMB_BA0 VMB_BA1 VMB_BA2 J8 K8 K10 VMB_CLK0 VMB_CLK0# VMB_CKE0 +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 20,21,22 VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0# K2 L3 J4 K4 L4 VMB_RDQS1 VMB_RDQS3 F4 C8 VMB_DM1 VMB_DM3 E8 D4 VMB_WDQS1 VMB_WDQS3 G4 B8 T3 DRAM_RST_M L9 VMB_ZQ2 Should be 240 Ohms +-1% R311 243/F_4 A1 T1 A11 T11 NC NC NC NC J2 L2 J10 L10 NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10 B2 B10 D2 D9 E3 E9 F10 G2 G10 VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 BA0 BA1 BA2 CK CK CKE/CKE0 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQSL DQSU RESET ZQ/ZQ0 VMB_DQ11 VMB_DQ14 VMB_DQ9 VMB_DQ12 VMB_DQ10 VMB_DQ15 VMB_DQ8 VMB_DQ13 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ31 VMB_DQ26 VMB_DQ30 VMB_DQ27 VMB_DQ28 VMB_DQ24 VMB_DQ29 VMB_DQ25 M9 H2 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 VMB_BA0 VMB_BA1 VMB_BA2 M3 N9 M4 +1.5V_VGA VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 DML DMU E4 F8 F3 F9 H4 H9 G3 H8 VREFC_VMB3 VREFD_VMB3 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 B3 D10 G8 K3 K9 N2 N10 R2 R10 +1.5V_VGA 20 20 20 20 20 R308 A2 A9 C2 C10 D3 E10 F2 H3 H10 40.2/F_4 C433 VMB_CLK0_COMM A1 T1 A11 T11 R506 243/F_4 J2 L2 J10 L10 100-BALL SDRAM DDR3 H5TC4G63AFR-11C NC NC NC NC NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10 CK CK CKE/CKE0 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ40 VMB_DQ46 VMB_DQ41 VMB_DQ47 VMB_DQ44 VMB_DQ45 VMB_DQ43 VMB_DQ42 VREFC_VMB4 VREFD_VMB4 M9 H2 VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA14 N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8 VMB_BA0 VMB_BA1 VMB_BA2 M3 N9 M4 VREFCA VREFDQ B3 D10 G8 K3 K9 N2 N10 R2 R10 VMB_CLK1 VMB_CLK1# VMB_CKE1 J8 K8 K10 A2 A9 C2 C10 D3 E10 F2 H3 H10 VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1# K2 L3 J4 K4 L4 VMB_RDQS6 VMB_RDQS4 F4 C8 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 VMB_DM6 VMB_DM4 E8 D4 VMB_WDQS6 VMB_WDQS4 G4 B8 +1.5V_VGA DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 +1.5V_VGA VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 F4 C8 VMB_RDQS7 VMB_RDQS5 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VMB_DQ63 VMB_DQ57 VMB_DQ61 VMB_DQ58 VMB_DQ62 VMB_DQ56 VMB_DQ60 VMB_DQ59 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E4 F8 F3 F9 H4 H9 G3 H8 VMB_DQ50 VMB_DQ53 VMB_DQ49 VMB_DQ52 VMB_DQ51 VMB_DQ55 VMB_DQ48 VMB_DQ54 D8 C4 C9 C3 A8 A3 B9 A4 VMB_DQ36 VMB_DQ33 VMB_DQ38 VMB_DQ32 VMB_DQ39 VMB_DQ35 VMB_DQ37 VMB_DQ34 +1.5V_VGA BA0 BA1 BA2 CK CK CKE/CKE0 VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10 ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 B3 D10 G8 K3 K9 N2 N10 R2 R10 +1.5V_VGA A2 A9 C2 C10 D3 E10 F2 H3 H10 C 40.2/F_4 VMB_CLK0# VMB_CLK1 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 R165 40.2/F_4 VMB_DM7 VMB_DM5 E8 D4 VMB_WDQS7 VMB_WDQS5 G4 B8 DML DMU VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 DQSL DQSU C168 VMB_CLK1_COMM 20,21,22 T3 DRAM_RST_M VMB_ZQ3 0.01U/16V_4 R164 Should be 240 Ohms +-1% 40.2/F_4 VMB_CLK1# Should be 240 Ohms +-1% BA0 BA1 BA2 K2 L3 J4 K4 L4 VMB_ODT1 VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1# 0.01U/16V_4 R307 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 J8 K8 K10 20 VMB_CLK1 20 VMB_CLK1# 20 VMB_CKE1 VMB_CLK0 VREFCA VREFDQ E4 F8 F3 F9 H4 H9 G3 H8 R229 243/F_4 B2 B10 D2 D9 E3 E9 F10 G2 G10 RESET L9 ZQ/ZQ0 A1 T1 A11 T11 NC NC NC NC J2 L2 J10 L10 NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10 20,21,22 DRAM_RST_M VMB_ZQ4 R140 243/F_4 RESET L9 ZQ/ZQ0 A1 T1 A11 T11 NC NC NC NC J2 L2 J10 L10 100-BALL SDRAM DDR3 H5TC4G63AFR-11C VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 DQSL DQSU T3 Should be 240 Ohms +-1% B2 B10 D2 D9 E3 E9 F10 G2 G10 DML DMU VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10 NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1 A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10 B2 B10 D2 D9 E3 E9 F10 G2 G10 100-BALL SDRAM DDR3 H5TC4G63AFR-11C 100-BALL SDRAM DDR3 H5TC4G63AFR-11C B B +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA R309 4.99K/F_4 +1.5V_VGA R508 4.99K/F_4 R244 4.99K/F_4 R227 4.99K/F_4 R539 4.99K/F_4 R144 4.99K/F_4 VREFC_VMB3 VREFC_VMB2 VREFC_VMB1 R310 4.99K/F_4 C427 0.1U/10V_4 VREFC_VMB4 R507 4.99K/F_4 C329 1U/6.3V_4 C424 0.1U/10V_4 C332 0.1U/10V_4 R228 4.99K/F_4 R538 4.99K/F_4 C773 0.1U/10V_4 +1.5V_VGA C328 1U/6.3V_4 C326 1U/6.3V_4 C426 1U/6.3V_4 C325 1U/6.3V_4 C334 1U/6.3V_4 C336 1U/6.3V_4 +1.5V_VGA A C735 0.1U/10V_4 C324 0.1U/10V_4 +1.5V_VGA C436 10U/6.3VS_6 C277 1U/6.3V_4 C768 10U/6.3VS_6 C736 1U/6.3V_4 C423 0.1U/10V_4 C425 0.1U/10V_4 C333 0.1U/10V_4 C301 C432 0.1U/10V_4 0.1U/10V_4 C737 0.1U/10V_4 C721 0.1U/10V_4 C302 0.1U/10V_4 R149 4.99K/F_4 C163 0.1U/10V_4 R139 4.99K/F_4 +1.5V_VGA C775 1U/6.3V_4 C781 1U/6.3V_4 C414 1U/6.3V_4 C782 1U/6.3V_4 C780 1U/6.3V_4 C778 1U/6.3V_4 C776 1U/6.3V_4 C179 10U/6.3VS_6 +1.5V_VGA C327 0.1U/10V_4 R498 4.99K/F_4 VREFD_VMB3 VREFD_VMB2 VREFD_VMB1 R243 4.99K/F_4 +1.5V_VGA R143 4.99K/F_4 C175 1U/6.3V_4 C779 0.1U/10V_4 C777 0.1U/10V_4 C418 0.1U/10V_4 C765 C774 0.1U/10V_4 0.1U/10V_4 C218 0.1U/10V_4 C166 0.1U/10V_4 VREFD_VMB4 R500 4.99K/F_4 C305 1U/6.3V_4 C299 1U/6.3V_4 C185 1U/6.3V_4 C192 1U/6.3V_4 C304 1U/6.3V_4 C398 1U/6.3V_4 C298 1U/6.3V_4 C706 10U/6.3VS_6 C724 1U/6.3V_4 C720 1U/6.3V_4 C722 1U/6.3V_4 C723 1U/6.3V_4 C188 1U/6.3V_4 C702 1U/6.3V_4 C303 0.1U/10V_4 C297 0.1U/10V_4 C300 0.1U/10V_4 C182 0.1U/10V_4 C184 C183 0.1U/10V_4 0.1U/10V_4 C762 0.1U/10V_4 18,20,21,22,34,43 +1.5V_VGA 18,20,21,22,34,43 +1.5V_VGA C760 0.1U/10V_4 C696 0.1U/10V_4 C756 0.1U/10V_4 C164 0.1U/10V_4 C187 0.1U/10V_4 C186 C687 0.1U/10V_4 0.1U/10V_4 3 C165 1U/6.3V_4 2 A 352-(&75 4XDQWD&RPSXWHU,QF +1.5V_VGA +1.5V_VGA Size Custom Document Number Rev 1A VRAM-B (DDR3 BGA96) Date: Friday, December 21, 2012 4 C746 1U/6.3V_4 +1.5V_VGA 1% 5 C718 0.1U/10V_4 +1.5V_VGA +1.5V_VGA C749 0.1U/10V_4 C154 0.1U/10V_4 1 Sheet 22 of 44 1 2 3 4 5 6 7 7,26,28,29,32,33,34,39 2,6,7,8,9,10,12,13,14,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 29,30,34,36,37,38,39,40,41,42,43,44 26 23 ϭϬͬϮϰ͗^/ŵŽĚŝĨLJ CRT PORT 6 CRT_R 6 CRT_G 6 CRT_B 16 ϭϮͬϭϯ͗WsŵŽĚŝĨLJ A 8 +5V +3V +5VS5 +5V_HDMIC CRT_R L15 BLM18BB470 CRT_R1 CRT_G L14 BLM18BB470 CRT_G1 L13 BLM18BB470 CRT_B1 CRT_B 6 1 7 2 8 3 +5V_HDMIC 9 4 10 5 R112R104R100 C115 22P/50V_4 C125 22P/50V_4 C101 C102 22P/50V_4 22P/50V_4 A 12 CRTDDCDAT2 13 CRTHSYNC C199 10P/50V_4 14 CRTVSYNC C200 10P/50V_4 15 CRTDDCCLK2 C170 *470P/50V_4 C174 *470P/50V_4 C138 22P/50V_4 17 150/F_4 150/F_4 150/F_4 C131 22P/50V_4 11 CRT CONN CN9 EMI DFDS15FR362 6 6 6 6 HSYNC_COM VSYNC_COM DDCCLK DDCDATA HSYNC_COM VSYNC_COM DDCCLK DDCDATA dsub-dsd-15atxb-15p +5V U7 C134 B 0.22U/25V_6 +5V_CRT2 1 CRT_BYP 7 8 2 +3V 3 4 5 CRT_R1 CRT_G1 CRT_B1 6 VCC_SYNC SYNC_OUT2 SYNC_OUT1 VCC_DDC BYP SYNC_IN2 VCC_VIDEO SYNC_IN1 VIDEO_1 VIDEO_2 VIDEO_3 DDC_IN1 DDC_IN2 DDC_OUT1 DDC_OUT2 GND 16 14 15 13 10 11 9 12 CRT_VSYNC1 CRT_HSYNC1 R157 R156 CRTVSYNC CRTHSYNC 22_4 22_4 VSYNC_COM HSYNC_COM +5V_CRT2 B R148 2.2K_4 DDCCLK DDCDATA R160 2.2K_4 VGA_DDC_CLK_RT VGA_DDC_DAT_RT CRTDDCCLK2 CRTDDCDAT2 TPD7S019 9/29 EMI request +5VS5 +3V DDCCLK DDCDATA C609 C64 +5V_HDMIC C71 2 +5V_HDMIC MEK500V-40 0.1U/10V_4 0.1U/10V_4 1 R168 R169 2.7K_4 2.7K_4 +5V_CRT2 D3 C146 0.1U/10V_4 0.1U/10V_4 9/27 EMI request C C &EŚŽůĞ HOLE H2 *O-LX9-1 W,ϭϬϬϭϬϭϬ H9 h-tc177bc276ic162d122p2 ϭϮͬϮϬ͗WsĂĚĚ H20 1 1 2 1 1 1 H4 *h-c354ic150d110p2 1 H6 *h-c354ic150d110p2 1 H5 *h-c354ic150d110p2 1 1 H16 *h-tc354bc315ic150d110p2 1 H27 *spad-r63-8np 1 4 3 H24 *h-e315x278d110p2 H25 *spad-re197x79np 352-(&75 4XDQWD&RPSXWHU,QF 1 ϭϮͬϭϯ͗WsŵŽĚŝĨLJ,ϮϲĞůŐŶĚ 1 ϭϭͬϯϬ͗WƌĞWsŵŽĚŝĨLJĂĚĚ,Ϯϲ ϭϬͬϭϳ͗^/ŵŽĚŝĨLJĂĚĚ,Ϯϱ Size Custom 1% Document Number 1 2 3 4 5 6 7 Rev 1A CRT,Hole Date: Friday, December 21, 2012 Sheet 23 8 of 44 5 4 3 2 1 24 RTD2136S Power Up Sequence +3.3V_2136_A ZĞƐĞƌǀĞĨŽƌĐŽůĂLJŽƵƚWKE͕WŽŶůLJƉůĞĂƐĞƐƚƵĨĨ 25 25 25 25 25 25 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 7 8 9 10 13 14 SCL1_2136 SDA1_2136 8,12,13 8,12,13 SMB_RUN_CLK SMB_RUN_DAT C R95 *0_4 R94 *0_4 25 25 EDIDDATA_2136 EDIDCLK_2136 SDAT_2136 SCLK_2136 45 46 47 48 49 ZĞƐĞƌǀĞ 5 18 22 DP_V33 SWR_VDD PVCC LANE0P LANE0N LANE1P LANE1N RTD2136R CIICSCL1 CIICSDA1 MIICSDA1 MIICSCL1 MIICSDA0 MIICSCL0 NC IC⸽ ⸽悐暨㍍GND PWMOUT PANEL_VCC PWMIN C120 C121 C122 C123 HPD 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 TXO0TXO0+ TXO1TXO1+ TXO2TXO2+ TXOCTXOC+ TXO3TXO3+ TXE0TXE0+ TXE1TXE1+ TXE2TXE2+ TXECTXEC+ TXE3TXE3+ TXLOUT0-_2136 25 TXLOUT0+_2136 25 TXLOUT1-_2136 25 TXLOUT1+_2136 25 TXLOUT2- 25 TXLOUT2+ 25 TXLCLKOUT- 25 TXLCLKOUT+ 25 TXUOUT0- 25 TXUOUT0+ 25 TXUOUT1- 25 TXUOUT1+ 25 TXUOUT2- 25 TXUOUT2+ 25 TXUCLKOUT- 25 TXUCLKOUT+ 25 44 BL_EN <=100ms LVDS_BLON_2136 Reserve R88 R103 0_4 12K_4 +3V U6 ϭϮͬϭϯ͗WsŵŽĚŝĨLJ LVDS_BLON_2136 SDAT_2136 SCLK_2136 25 7 R125 R126 WP 5 6 *0_4 *0_4 SDA SCL GND VCC A2 A1 A0 4 8 3 2 1 C *M24C64 19 20 21 EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 DP_REXT EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 12 EDP_AUXN EDP_AUXP 2 2 2 2 DP_HPD TESTMODE AUX-CH_N AUX-CH_P DP_GND 2 2 EDP_AUXN_2136 EDP_AUXP_2136 TP6 EDP_TXP0_2136 EDP_TXN0_2136 EDP_TXP1_2136 EDP_TXN1_2136 6 1 2 3 4 TP5 0.1U/10V_4 0.1U/10V_4 11 15 43 U4 DP_V12 SWR_VCCK VCCK 17 100k/F_4 EDP_HPD_2136 C119 C118 D DP2LVDS VCC R113 EDP_AUXN EDP_AUXP EDDID EEPROM VCC +SWR_LX SWR_LX EDP_AUXN_R EDP_AUXP_R EDP_TXP0_R EDP_TXN0_R EDP_TXP1_R EDP_TXN1_R GND EDP_AUXN_R EDP_AUXP_R EDP_TXP0_R EDP_TXN0_R EDP_TXP1_R EDP_TXN1_R *0_4 *0_4 *0_4 *0_4 *0_4 *0_4 +3.3V_2136_D 16 R106 R105 R107 R108 R109 R110 D WŝŶĞϭϴ͗ŬĞĞƉϴϬDŝůĞdƌĂĐĞ +1.2V_2136 RTD2136 Dual Channel only EDIDDATA_2136 EDIDCLK_2136 DISP_ON_2136 DPST_PWM_2136 R123 R127 C150 0.1U/10V_4 *0_4 *0_4 DISP_ON_2136 25 DPST_PWM_2136 25 Use 1% Res on R2178 R115 8,13,31 MBCLK2 8,13,31 MBDATA2 R114 R73 *0_4/S R76 100K/F_4 DPST_PWM 2,6,25 SCL1_2136 0_4 SDA1_2136 0_4 ĞĨĂƵůƚ +3V B R118 4.7K_4 SCLK_2136 R119 *4.7K_4 SDAT_2136 R122 B R121 *4.7K_4 4.7K_4 Reserve 2,25 EDP_HPD EDP_HPD R101 1K/F_4 EDP_HPD_2136 2,6,7,8,9,10,12,13,14,23,25,26,27,28,29,30,31,32,33,34,39,40,42,44 L8: need use CV-4709MN00 +SWR_LX +3V for Vendor suggestion +1.2V_2136 L8 Close to Pin11 ŬĞĞƉϴϬDŝůĞdƌĂĐĞ +3V 4.7UH_1A +3.3V_2136_D +3V +3.3V_2136_D L5 C85 +3.3V_2136_A R86 C95 C100 *0_8 0.1U/10V/X7R_4 L12 22U/6.3VS_8 PBY160808T-600Y-N(60,3A) C79 0.1U/10V/X7R_4 0.1U/10V/X7R_4 PBY160808T-600Y-N(60,3A) USING 60R 2A C40 C55 USING 60R 1A C47 A C75 10U/6.3V_8 C68 0.1U/10V/X7R_4 0.1U/10V/X7R_4 CLOSE TO Pin22 0.1U/10V/X7R_4 C105 Close to Pin43 C124 A Close to Pin17 C137 10U/6.3V_8 0.1U/10V/X7R_4 0.1U/10V/X7R_4 22U/6.3VS_8 Close to Pin18 C2142 close to IC side Close to Pin5 ^tZDK >KDK ^ƚƵĨĨ>ϴ ^ƚƵĨĨZϴϲ 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 5 4 3 2 Rev 1A RTD2136 Date: Friday, December 21, 2012 1 Sheet 24 of 44 4 LID Switch C8 31 R67 EMU_LID PN_BLON D1 0_4 BLON_CON MEK500V-40 22P/50V_4 R1 100K/F_4 5 24 TXUCLKOUT24 TXUCLKOUT+ 24 TXUOUT0+ 24 TXUOUT024 TXUOUT1+ 24 TXUOUT124 TXUOUT2+ 24 TXUOUT2- TXUCLKOUTTXUCLKOUT+ TXUOUT0+ TXUOUT0TXUOUT1+ TXUOUT1TXUOUT2+ TXUOUT2- 24 TXLCLKOUT+ 24 TXLCLKOUT- TXLCLKOUT+ TXLCLKOUT- LVDS_BLON1 R26 D2 C22 *10P/50V_4 31,32 Close to EC 2 LCD_BK EMI request C58 100P/50V_4 1 25 C19 *10P/50V_4 +3VLCD_CON +VIN_BLIGHT LID_EC# *MEK500V-40 3 RF +3VPCU 1K/F_4 Q3 *DRC5144E0L 8 47K_4 +3V R21 ZĂ R20 A *0_6 Zď 0_6 EDIDCLK EDIDDATA C23 TXLOUT01000P/50V_4 TXLOUT0+ TXLOUT1TXLOUT1+ &Žƌ>s^KŶůLJ͗^ƚƵĨĨZď TXLOUT2TXLOUT2+ &ŽƌWKŶůLJ͗^ƚƵĨĨZĂ LVDS_BLON1 R37 TXLCLKOUTTXLCLKOUT+ 100K/F_4 TXUOUT0TXUOUT0+ &Žƌ>s^KŶůLJ͗^ƚƵĨĨZĐ &ŽƌWKŶůLJ͗^ƚƵĨĨZĚ 100mA 2,24 +VIN_BLIGHT TXUOUT1TXUOUT1+ ZĐR8 ZĚ R9 EDP_HPD 0_4 TXUOUT2TXUOUT2+ *0_4 EDP_HPD_R TXUCLKOUTTXUCLKOUT+ B L2 +VIN +VIN_BLIGHT *0_8/S L1 28 DIGITAL_D1 28 DIGITAL_CLK L4 TB160808U301N000 *0_8/S C3 C4 0.1U/25V_4 0.01U/25V_4 C14 *10P/50V_4 C13 *10P/50V_4 8 8 +VIN C10 4.7U/25V_8 C1 0.1U/25V_4 C6 0.1U/25V_4 C620 0.1U/25V_4 DIGITAL_CLK_L +3V_CAM 1 2 USBP4-_R USBP44 3 USBP4+_R USBP4+ L3 MCM2012B900GBE VADJ1 BLON_CON +VIN_BLIGHT C7 0.1U/25V_4 C17 24 EDP_TXP0_R 24 TXLOUT0+_2136 24 TXLOUT0-_2136 24 EDP_TXN0_R +VIN C5 4.7U/25V_8 C2 0.1U/25V_4 24 24 R12 R13 24 EDP_TXP1_R TXLOUT1+_2136 TXLOUT1-_2136 24 EDP_TXN1_R R10 R11 TXLOUT0+ TXLOUT0C18 *0.1U/10V_4 C15 *0.1U/10V_4 C16 *0.1U/10V_4 C20 *0.1U/10V_4 ϭϮͬϭϳ͗WsŵŽĚŝĨLJƉŶĨŽƌϬ͘ϴϱŚĞŝŐŚƚ 24 EDP_AUXN_R 24 EDIDDATA_2136 24 EDIDCLK_2136 24 EDP_AUXP_R BRIGHT R5 1K/F_4 C9 33P/50V_4 R16 R17 C21 *0.1U/10V_4 R83 C59 4.7U/6.3V_6 R85 100K/F_4 ϭϬͬϭϵ͗^/ŵŽĚŝĨLJ +3VLCD_CON 3 IN GND *TI160808U600 2 ON/OFF B G_4 R7 +3V_CAM *0_4/S C EDIDDATA EDIDCLK 0_4 0_4 C11 *0.01U/16V_4 C12 *4.7U/6.3V_6 C93 C94 *0.01U/16V_4 *0.1U/10V_4 100K/F_4 R3 ZĂ 0_4 BRIGHT 24 LVDS_BLON_2136 R69 Zď 0_4 LVDS_BLON1 24 DISP_ON_2136 R74 ZĐ 0_8 &ŽƌWKŶůLJ͗ƐƚƵĨĨZĚ͕ZĞ͕ZĨ EDP_DISP_UTIL C91 *10U/6.3V_8 *10_4 BRIGHT 2,6,24 DPST_PWM 6 LVDS_BLON R63 ZĞ *0_4 LVDS_BLON1 R82 ZĨ *0_4 DISP_ON_L DISP_ON +3V R14 R18 ZĚ R4 6 &ŽƌWKŶůLJ͗ƐƚƵĨĨ DISP_ON_L ϴͬϮϯDK/&z 1 1 2 DISP_ON_L OUT 1 4 D IN 2 5 2,6,24 L10 1 1U/6.3V_4 U3 2 C42 G_3 TXLOUT1+ TXLOUT1- 0_4 0_4 DPST_PWM_2136 24 0_8 +3V G_2 &Žƌ>s^KŶůLJ͗ƐƚƵĨĨZĂ͕Zď͕ZĐ +3VLCD_CON ϴϬŵŝůĞƚƌĂĐĞ G_1 &ŽƌWKŶůLJ͗ƐƚƵĨĨĂƉ &Žƌ>s^ŽŶůLJƐƚƵĨĨZĞƐŝƐƚŽƌ VADJ1 R2 WŽǁĞƌ^ǁŝƚĐŚZĞƐĞƌǀĞ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 CN1 GS12401-1011-9H DFHS40FS050 GS12407-11141-9H-40P-R *0.1U/10V_4 0_4 0_4 +3V C 8 EDIDCLK EDIDDATA 4.7K_4 4.7K_4 C34*0.047U/10V_4 1 2 R64 7 &Žƌ>s^KŶůLJ͗ R19 R15 TXLOUT2+ TXLOUT2- 24 TXLOUT2+ 24 TXLOUT2- A 6 +3V G_0 3 G_5 2 C35*0.047U/10V_4 1 2 1 *100K_4 *100K_4 EDIDDATA EDIDCLK +3V R6 R48 *1K_4 *1K_4 *AP2821KTR-G1 BRIGHT LVDS_BLON1 352-(&75 4XDQWD&RPSXWHU,QF 2,6,7,8,9,10,12,13,14,23,24,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V 4,7,9,11,31,32,34,35,36 +3VPCU 7,23,26,28,29,32,33,34,39 +5V 34,35,36,37,38,39,40,42,43,44 +VIN Size Custom 1% Document Number 2 3 4 5 6 7 Rev 1A LCD CONN/LID/CAM Date: Friday, December 21, 2012 1 D Sheet 25 8 of 44 1 2 3 4 5 6 7 8 7,23,28,29,32,33,34,39 +5V 23 +5V_HDMIC 2,6,7,8,9,10,12,13,14,23,24,25,27,28,29,30,31,32,33,34,39,40,42,44 +3V EMI request +5V_HDMIC +5V_HDMIC +3V C276 0.1U/10V_4 A C261 220P/50V_4 C229 0.1U/10V_4 A ϭϬͬϭϰ͗^/ĨŽƌD/ƌĞƋƵĞƐƚ B B C_TX2_HDMI+ R292 120/F_4 C_TX2_HDMI- C_TX1_HDMI+ R276 120/F_4 C_TX1_HDMI- C_TX0_HDMI+ R284 120/F_4 C_TX0_HDMI- 120/F_4 C_TXC_HDMI- C_TXC_HDMI+ close to HDMI conn 2 2 2 2 2 2 2 2 IN_CLK# IN_CLK IN_D0# IN_D0 IN_D1# IN_D1 IN_D2# IN_D2 IN_CLK# IN_CLK IN_D0# IN_D0 IN_D1# IN_D1 IN_D2# IN_D2 C346 C347 C397 C402 C357 C358 C405 C408 C_TXC_HDMIC_TXC_HDMI+ C_TX0_HDMIC_TX0_HDMI+ C_TX1_HDMIC_TX1_HDMI+ C_TX2_HDMIC_TX2_HDMI+ 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 R266 Close to HDMI Connector +3V C_TX2_HDMI+ C_TX2_HDMI- R198 +3V Q7 2.2K_4 C_TX1_HDMI+ C_TX1_HDMI- 5 4 SDVO_CLK 3 CN14 1 3 4 6 7 9 C_TX2_HDMI+ C_TX2_HDMIC_TX1_HDMI+ C_TX1_HDMI- HDMI_SCLK C_TX0_HDMI+ C_TX0_HDMI- C_TX0_HDMI+ C_TX0_HDMI- SHELL1 SHELL2 SHELL2 SHELL2 D2+ D2D1+ D1D0+ D0- D2 Shield D1 Shield D0 Shield CK Shield GND 2 6 6 6 SDVO_CLK SDVO_DATA SDVO_CLK SDVO_DATA HDMI_HPD_CON HDMI_HPD_CON 1 SDVO_DATA R183 +3V 2.2K_4 6 C_TXC_HDMI+ C_TXC_HDMI- HDMI_SDATA C_TXC_HDMI+ C_TXC_HDMI- 2N7002DW 15 16 HDMI_SCLK HDMI_SDATA C 1A CK+ CK- DDC CLK CE Remote DDC DATA NC 2 5 8 11 17 13 14 C +5V_HDMIC KMC3S110RY 2 1 F1 +5V 10 12 20 21 22 23 18 +5V L52 0_6 HDMI_HPD HDMI_HPD_L VC1 TVM0G5R5M220R HDMI CONN VC5 *TVM0G5R5M220R DFHD19MR203 hdmi-2he1624-000111f-19p +5V_HDMIC +5V_HDMIC 2 +5V HP DET 2 C701 220P/50V_4 19 +3V D R312 1 680_4/F C_TX2_HDMI+ R291 680_4/F C_TX2_HDMI- R265 680_4/F C_TX1_HDMI+ R264 680_4/F C_TX1_HDMI- R287 680_4/F C_TX0_HDMI+ R281 680_4/F C_TX0_HDMI- R259 680_4/F C_TXC_HDMI+ R258 680_4/F C_TXC_HDMI- D5 MEK500V-40 R188 1M_4 D4 MEK500V-40 1 R294 1 HDMI_HPD_CON 1 *0_4/S Q18 2N7002K 2 3 R315 8/31: Intel suggestion 1 *TVM0G5R5M220R 2 VC2 Q8 ME2N7002E 3 R213 2.2K_4 HDMI_HPD R200 20K/F_4 R209 2.2K_4 D HDMI_SCLK HDMI_SDATA 2 100K_4 C422 352-(&75 4XDQWD&RPSXWHU,QF 0.1U/10V_4 1% Size Custom Document Number 2 3 4 5 6 7 Rev 1A HDMI CONN Date: Friday, December 21, 2012 1 Sheet 8 26 of 44 5 8 4 CLK_PCIE_REQ2# CLK_PCIE_REQ2# R446 3 *0_4/S CLK_PCIE_REQ2#_R R450 PCIE_WAKE# 0_4 Zdiff = 100 ohm 8 8 8 8 1 2 3 4 5 6 7 8 R447 0_4 CLK_PCIE_REQ2#_R PLTRST# PCIE_TXP3_CARD PCIE_TXN3_CARD CLK_PCIE_CARDP CLK_PCIE_CARDN PCIE_RXP3_CARD PCIE_RXN3_CARD C598 C597 0.1U/10V_4 0.1U/10V_4 PCIE_RXP3_CARD_C PCIE_RXN3_CARD_C WůĞĂƐĞĂĚĚϵ'Es/Ɛ ĐŽŶŶĞĐƚŝŽŶǁŝƚŚƚŚĞƌŵĂůW PERST# CLKREQ# HSIP HSIN REFCLKP REFCLKN HSOP HSON GND RTS5237 R435 6.2K/F_4 RTS5227_RREF 1 2 C589 *100P/50V_4 0.1U/10V_4 RTS5227_DV12S ZϯϱϳŶĞĞĚĐŽůƐĞƚŽŚŝƉ C RTS5227_AV12 9 10 11 12 13 14 15 16 33 R448 *0_6/S +3V 0.1U/10V_4 C612 4.7U/6.3V_6 C611 WAKE# MS_INS# SD_CD# SP7 GPIO 3V3aux NC NC U22 8 8 +3V 1 SP1 SP2 SP3 SP4 SP5 SP6 SD_D1 SD_D0 SD_CLK SD_CMD SD_D3 SD_D2 MS_D1 MS_D0 MS_D2 MS_D3 MS_CLK SP7 SD_WP MS_BS 27 D Share Pin 32 31 30 29 28 27 26 25 6,30,31,34 RREF AV12 3V3_IN CARD_3V3 NC DV12S SP1 SP2 D 10K_4 SD_CD# SD_WP RTS5227_GPIO RTS5227_3Vaux R449 2,8,14,30,31,34 2 NC NC NC SP6 SP5 SP4 DV33_18 SP3 24 23 22 21 20 19 18 17 Close to chip pin SD_D2_R SD_D3_R SD_CMD_R DV33_18 SD_CLK_R R445 R443 R442 1U/10V_4 R441 12/13: PV modify 22_4 SD_D2 22_4 SD_D3 0_4 SD_CMD C602 22_4 SD_CLK C600 5.6P/16V_4 RTS5237 SD_D0_R R438 22_4 SD_D0 C 12/13: PV modify SD_D1_R R437 22_4 SD_D1 C590 +3V Close to chip pin C591 C588 0.1U/10V_4 4.7U/6.3V_6 12/13: PV modify C587 C593 10U/6.3V_8 0.1U/10V_4 +3VCARD SD_D0 SD_D1 SD_D2 SD_D3 C596 C586 C610 C605 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 5.6P/16V_4 ϴͬϮϭDŽĚŝĨLJ RTS5227_AV12 R764 *0_4/S RTS5227_DV12S B B SD / MMC CARD READER CN8 C866 SD_D0 SD_D1 SD_D2 SD_WP SD_CD# C854 SD_CLK DAT3 CMD VSS1 VDD CLK VSS2 DAT0 DAT1 DAT2 W /P C/D GND GND GND GND 0.1U/10V_4 +3VCARD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 *0.1U/10V_4 +3VCARD SD_D3 SD_CMD CLOSE CONN C844 10U/6.3V_8 CARDREADER CONN Change footprint to sdcard-psdbtc-09glbs1nn4h3-11p A 2,6,7,9,10,34,36,38,39,42,44 2,6,7,8,9,10,12,13,14,23,24,25,26,28,29,30,31,32,33,34,39,40,42,44 +3VS5 +3V +3VCARD A 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 5 4 3 2 Rev 1A RTS5229 & CR SOCKET Date: Friday, December 21, 2012 1 Sheet 27 of 44 A B C D +5V_AVDD 2 C848 1U/6.3V_4 C860 10U/6.3VS_6 L56 R701 DIGITAL_CLK R703 *0_4/S 100_4 C869 DMIC0 2 DMIC_CLK_R 3 DVDD GPIO1 / DMIC-CLK 10P/50V_4 ACZ_SDOUT_AUDIO BIT_CLK_AUDIO 5 HD_BCLK 6 *10P/50V_4 0_4 10U/6.3VS_6 R707 ACZ_SDIN0 Close to Pin 9 HPOUT-R (PORT I) SYNC 11 C939 RESETB PCBEEP 34 *0.1U/10V_4 LINE2-L LINE2-R CPVEE LINE1-L (PORTC) LINE1-R (PORTC) MIC1-R (PORTB) MIC1-L (PORTB) AMP_BEEP 1U/6.3V_4 35 CAP- 37 CBN 36 CPVDD CAP+ MIC2-R (PORTF) MIC2-L (PORTF) +3V_DVDD 42 SPK-L+ SPK-RSPK-R+ 1 49 NC R_SPK+ +5V_DVDD C908 *2.2U/6.3V_6 MONO-OUT 0.1U/10V_4 10U/6.3VS_6 C853 0.1U/10V_4 C859 10U/6.3VS_6 C852 Close to Pin 41 C875 C863 10U/6.3VS_6 10U/6.3VS_6 AGND AGND C870 0.1U/10V_4 C874 2.2U/6.3V_6 32 HPOUT_L 33 HPOUT_R 24 23 EN 3 C909 *0.1U/10V_4 AGND AGND *10K_4 R746 +5V Close to PIN28 AGND HPOUT_L 29 AGND SHIELD 72+HDGSKRQHMDFN HPOUT_R 29 AGND SHIELD ϭϬͬϱ͗^/ĨŽƌůŝďƌĂƌLJŵŽĚŝĨLJ R706 VREFOUT_C EXT_MIC_R 2.2K_4 C877 *1U/6.3V_4 AGND SHIELD AGND 22 21 20 19 31 30 R726 18 17 MIC_R1 MIC_L1 29 VREFOUT_C *0_4/S C928 C893 MUTE_LED_CNTL *2.2U/6.3V_6 2.2U/6.3V_6 R722 1K/F_4 32 72$XGLR-DFN0,& EXT_MIC_R 29 +5V_AVDD 72,QWHUQDO6SHDNHUV ϭϬͬϭϭ͗^/ĨŽƌƌĞƐĞƌǀĞ 16 R732 10K_4 C895 0.1U/10V_4 AMP_BEEP_L AMP_BEEP C897 0.1U/10V_4 check value R728 100K/F_4 20K/F_4 1 AMP_BEEP_R2 ALC3227 x QFN48 R725 R727 10K_4 2 ACZ_SPKR 7 ME2N7002E Q37 AGND 39.2K/F_4 SENSE_A 29 AGND Close to Pin 13 Close to Pin 46 GND * TLV702475DBVR Vset=1.242V 28 SENSE_A_1 R724 +5V_DVDD Vin BYP AGND 27 39 C896 0.01U/25V_4 C858 Vout 1 1 HCB1608KF-181T15_6 2 C911 *1U/6.3V_4 AGND +5V_DVDD L55 +5V MIC2-VREFO SPDIF-OUT/GPIO2 SPK-L- 45 PDB 44 R_SPK- PVDD2 43 L_SPK- 47 L_SPK+ PVDD1 Close to Pin 34,35,36 48 C885 46 4.7U/6.3V_6 41 +3V_DVDD 4 Close to PIN40 JDREF 1U/6.3V_4 MIC1-VREFO-L MIC1-VREFO-R CBP C845 SenseB C842 25 38 DVDD-IO 12 ACZ_RST#_AUDIO HPOUT-L (PORT I) 15 7 VREF SenseA ACZ_SYNC_AUDIO ϭϮͬϭϯ͗WsĂĚĚ SDATA-IN 10 *0_4/S *10P/50V_4 AGND LDO3-CAP Digital 7 LDO1-CAP LDO2-CAP C882 HD_SYNC R720 C888 BCLK 7 9 +3V_DVDD 0.1U/10V_4 SDATA-OUT 8 HD_SDIN0 33_4 DVSS 14 7 C876 AVSS1 AVSS2 13 7 C873 R705 HD_SDOUT 26 40 U35 5 GPIO0/ DMIC-DATA 4 7 AVDD1 AVDD2 +5V +5V_AVDD 3 DIGITAL_D1 25 1 10P/50V_4 ϭϬͬϭϴ͗ŚĂŶŐĞWEĨŽƌ,WƌĞƋƵĞƐƚ +1.5V HCB1608KF-181T15_6 C856 10U/6.3VS_6 Analog 25 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ AGND U34 C867 AZ5125-01H D14 Close to PIN26 C862 0.1U/10V_4 +1.5V_AVDD 72'LJLWDO0,& 1 HCB1608KF-181T15_6 C887 0.1U/10V_4 C886 10U/6.3VS_6 28 7,23,26,29,32,33,34,39 +5V 2,6,7,8,9,10,12,13,14,23,24,25,26,27,29,30,31,32,33,34,39,40,42,44 +3V 6,7,8,10,34,38,44 +1.5V >40mils trace Close to PIN1 +3V_DVDD L57 HCB1608KF-181T15_6 +3V E +5V L59 COMBO_GPI Check layout mount location AGND 29 PD# C830 +3V_DVDD D12 1 ACZ_RST#_AUDIO Close to CODEC R696 1K/F_4 *MEK500V-40 2 L_SPK+ L_SPKR_SPKR_SPK+ PD# 31 1 VOLMUTE# D11 2 MEK500V-40 ^ƉĞĂŬĞƌϰŽŚŵ͗ϰϬŵŝůƐ <ĞĞƉ>ͺ^W<нͬͲ͕ĂŶĚZͺ^W<нͬͲ ƚƌĂĐĞǁŝĚƚŚϰϬŵŝůůĞĂƐƚ R690 10K_4 L11 L9 L7 L6 TI160808U600 TI160808U600 TI160808U600 TI160808U600 0.1U/25V_4 C839 *0.1U/25V_4 C894 0.1U/25V_4 C841 0.1U/25V_4 INT SPEAKER CONN L_SPK+_R 1 2 3 4 CN3 DFHD04MR236 3800-X04N-00X-4P-L L_SPK-_R R_SPK-_R R_SPK+_R C98 C88 1000P/50V_4 1000P/50V_4 BIT_CLK_AUDIO 0.1U/25V_4 C599 AGND Close to CODEC ƉůĂĐĞƚŽŶĞĂƌhϯϳŽƌƵŶĚĞƌhϯϳ͘ R420 *0_8/S C70 C56 1000P/50V_4 1000P/50V_4 ACZ_SDIN0 AGND C872 *33P/50V_4 C881 *33P/50V_4 352-(&75 4XDQWD&RPSXWHU,QF FOR EMI 1% Size Custom Document Number Date: Friday, December 21, 2012 A B C D Rev 1A Azalia ALC3227 E Sheet 28 of 44 2 USBP0-_C USB30_TX1-_C C482 1 2 C485 1 2 3 4 R741 *0_4 1 2 4 1 8 USBP08 USBP0+ *Clamp-Diode 3 2 USB30_RX1-_C USB30_RX1+_C *Clamp-Diode R342 USB30_RX1-_C C520 1 2 *Clamp-Diode 8 8 A USB30_RX1+_C C519 1 2 1 4 USB30_RX1USB30_RX1+ *MCM2012B900GBE 2 3 L60 R343 *Clamp-Diode *0_4/S 1 2 3 4 5 6 7 8 9 29 VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+ USB3.0 X 2/USB2.0 COMBO 13 12 11 10 2 A *0_4/S R335 1 4 0.1U/10V_4 USB30_TX1-_R USB30_TX1+_R 0.1U/10V_4 C481 C476 USB30_TX1USB30_TX1+ 30,31 2 1 2 R743 *0_4 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ *Clamp-Diode *Clamp-Diode C448 1 2 4 1 8 USBP18 USBP1+ *Clamp-Diode 3 2 MCM2012B900GBE R744 *0_4 USB30_RX2-_C USB30_RX2+_C R325 USB30_TX2-_C USB30_TX2+_C *Clamp-Diode USB30_RX2-_C C455 1 2 *Clamp-Diode 8 8 USB30_RX2+_C C451 1 2 1 4 USB30_RX2USB30_RX2+ *MCM2012B900GBE 2 3 L61 R324 *Clamp-Diode R322 8 8 B C444 C445 USB30_TX2USB30_TX2+ USB30_TX2-_R USB30_TX2+_R 0.1U/10V_4 0.1U/10V_4 1 4 *0_4/S +5V_USBP0 C461 C460 C459 C784 470P/50V_4 0.1U/10V_4 470P/50V_4 ϭϬͬϭϮ͗^/ŵŽĚŝĨLJ 330U/6.3V C467 AP2820GMMTR-G1 1U/6.3V_4 VC3 TVM0G5R5M220R CN15 USB3.0 CONN 1 2 3 4 5 6 7 8 9 USBP1-_C USBP1+_C 8 7 6 5 TVM0G5R5M220R USB 3.0 C431 1000P/50V_4 1A +5V_USBP0 L36 USBP1+_C USB30_TX2+_C C439 2 OUT3 OUT2 OUT1 OC 1 2 3 4 5 6 7 8 9 VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+ 13 12 11 10 1 1 *0_4/S VIN1 VIN2 EN GND 13 12 11 10 USB30_TX2-_C C442 C447 2 3 4 1 USBPW_ON# VC4 R334 +5V_USBP0 U18 *0_4/S *MCM2012B900GBE 2 USB30_TX1-_C 3 USB30_TX1+_C L62 USBP1-_C 160 mils (Iout=3.7A) +5VS5 8 8 8 13 12 11 10 1 7 CN16 USB3.0 CONN 1 2 3 4 5 6 7 8 9 USBP0-_C USBP0+_C MCM2012B900GBE R742 *0_4 USB30_TX1+_C C472 C458 1000P/50V_4 1A +5V_USBP0 L37 C518 6 USB 3.0 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ *Clamp-Diode *Clamp-Diode USBP0+_C 5 + 1 *0_4/S *0_4/S *MCM2012B900GBE 2 3 L63 R319 B *0_4/S COMBO JACK 12/13: PV add L54 28 28 EXT_MIC_R EXT_MIC_R EXT_MIC_1 HCB1608KF-601T10 R664 COMBO_GPI C835 22K/F_4 4.7U/6.3V_6 R641 22K/F_4 AGND AGND AVLC5S_4 28 AGND SHIELD C 28 AGND SHIELD HPOUT_L HPOUT_R AGND AGND C525 100P/50V_4 AGND HPOUT_L R369 30/F_4 HPOUT_L1 L38 TB160808U301N000 EARP_L1 HPOUT_R R385 30/F_4 HPOUT_R1 L39 TB160808U301N000 EARP_R1 AGND AGND VC13 AGND AGND AGND SHIELD VC10 AVLC5S_4 C829 100P/50V_4 C833 *1000P/50V_4 C535 *1000P/50V_4 C529 3 6 1 CN17 2 4 5 AJAK0017-P001A C wait PN 100P/50V_4 VC12 12/13: PV add AGND SENSE_A AVLC5S_4 28 VC11 AVLC5S_4 12/18: PV add AGND AGND 12/11: PV add Touch Screen Connector +3V +5V R824 *0_4 close to 14" TS connector(CN21). EC30 R831 *0_6 USBP5USBP5+ 8 USBP58 USBP5+ +TS TS_ON_R R830 *0_6 4 1 *DLP11SN900HL2L 3 2 USBN5-_R USBP5+_R R825 *0_6 R826 *0_4 EC31 *100P/50V_4 U41 C937 *1U/10V_4 5 4 31 3 TS_ON IN IN OUT GND 1 CN21 1 2 3 4 5 6 TS_ON_R RP6 R827 *0_4 D *0.1U/10V_4 +TS *Touch screen 15 C938 *1U/10V_4 D 2 ON/OFF R828 *IC(5P) G5243AT11U *100K/F_4 23,30,34,36,37,38,39,40,41,42,43,44 +5VS5 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,30,31,32,33,34,39,40,42,44 +3V 11,30,39 +3VLANVCC 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 2 3 4 5 6 7 Rev 1A USB/BT/Audio JacK Date: Friday, December 21, 2012 1 Sheet 8 29 of 44 5 4 3 2 1 For EMI 0 ~ 22 ohm 2LAN_XTAL2 R784 *0_4 *22_4 LAN_XTAL25_IN 11 CLK_FLEX1_48M 8 R70 R765 ZĂ MDI0+ MDI0VDD10 MDI1+ MDI1MDI2+ MDI2VDD10 * Place Ce , Cf close to each VDD10 pin-- 8, 30 only, >60mil L46 +1.05V_LAN +1.05V_LAN *4.7UH,+-20%,650MA_1210 >Ă Ă ď C622 *0.1U/10V_4 Đ C624 *4.7U/6.3V_6 Ě C621 *0.1U/10V_4 ISOLATEB LAN_GLED# 0_4 Ğ C117 *0.1U/10V_4 C63 0.1U/10V_4 Ĩ C74 0.1U/10V_4 Ő Ĩ C623 *1U/6.3V_4 C130 *1U/6.3V_4 1 2 3 4 5 6 7 8 MDIP0 MDIN0 AVDD10(NC) MDIP1 RTL MDIN1 MDIP2(NC) MDIN2(NC) AVDD10 D R99 1 REGOUT(NC) VDDREG(VDD33) DVDD10(NC) AKEB 8161GSH LANW ISOLATEB PERSTB HSON HSOP 24 23 22 21 20 19 18 17 MDIP3(NC) MDIN3(NC) AVDD33(NC) CLKREQB HSIP HSIN REFCLK_P REFCLK_N +1.05V_LAN Ğ C927 0.1U/10V_4 GND WůĞĂƐĞĂĚĚϵ'Es/Ɛ ĐŽŶŶĞĐƚŝŽŶǁŝƚŚƚŚĞƌŵĂůW For 10/100 NA Ce,Cf 0_8 R791 32 31 30 29 28 27 26 25 U5 33 close to each VDD10 pin-- 3, 22, 8 , 30 >60mil R98 1K_4 &KZϴϭϲϲ͗^ƚƵĨĨZϳϵϭ͕EZϳϵϬ &KZϴϭϲϭ͗^ƚƵĨĨZϳϵϬ͕EZϳϵϭ 15K/F_4 * Place Cc,Cd,Ce,Cf Power trace Layout ⮔ ⹎ > 60mil LAN_GLED# >ϭ͗ RSET VDD10 XTAL2 XTAL1 LED0 LED1 C80 *27P/50V_4 10/18: SI modify Trace<30 mil Width > 60 mil LAN_YLED# R790 *0_4 +3V_LAN For GbE +1.05V_LAN_REGOUT LANRSET 2.49K/F_4 if ISOLATEB pin pull-low,the LAN chip will not drive it's PCI-E outputs ( excluding PCIE_WAKE# pin ) AVDD33 RSET AVDD10 CKXTAL2 CKXTAL1 LED0 LED1/GPO LED2(LED1) C92 *27P/50V_4 0_4 R89 XTAL2 *25MHz D R53 +3V TP3 2 Y1 1 30 +1.05V_LAN 'ƌĞĞŶůŬ XTAL1 RTL8161GSH +1.05V_LAN_REGOUT +1.05V_LAN_REGOUT DVDDL +3V_LAN VDD10 +1.05V_LAN PCIE_WAKE# R789 0_4 PCIE_WAKE# 6,27,31,34 ISOLATEB R787 *0_4 DSW_WAKE# 9,31 3 PLTRST# 2,8,14,27,31,34 C106 0.1U/10V_4 /PCIE_RXN2_LAN_L PCIE_RXN2_LAN PCIE_RXP2_LAN_L C103 0.1U/10V_4 PCIE_RXP2_LAN 7 5 6 7 &KZ'/'͗ϴϭϲϭ'^,͗>ϬϬϴϭϲϭϬϬϰ 8 8 &KZϭϬͬϭϬϬ͗ϴϭϲϲ,͗>ϬϬϴϭϲϲϬϬϭ 9 10 11 12 13 14 15 16 R92 *10_4 LAN_XTAL1 MDI3+ MDI3- Stuff La, Ca ,Cb For GbE +3V_LAN * Place Cf close to each VDD10 pin-- 22 (reserve) For 10/100 NA: La, Ca ,Cb 8 PCIE_CLKREQ_LAN# R90 PCIE_CLKREQ_LAN# *0_4/S LAN_CLKRQ ƌĞƐĞƌǀĞĨŽƌĐŽůĂLJ For GbE C C CLK_PCIE_LANN CLK_PCIE_LANP PCIE_TXN2_LAN PCIE_TXP2_LAN CLK_PCIE_LANN CLK_PCIE_LANP PCIE_TXN2_LAN PCIE_TXP2_LAN 8 8 8 8 For 10/100 STUFF : Ra, Ce * Place Cg close to each VDD10 pin-- 30 (reserve) For 10/100 only R766 0_4 LAN conn L64 For 10/100 MDI0+ MDI0- * Stuff Cb and Ce only, close to each VDD33 pin-- 23, 32 4 1 3 2 MDI0+_1 MDI0-_1 MDI3-_1 MDI3+_1 MDI2-_1 MDI2+_1 *MCM2012B900GBE R767 0_4 For GIGA R768 * Stuff Ca and Cb only, close to each VDD33 pin-- 11, 32 MDI1+ MDI1- MDI1-_1 MDI1+_1 MDI0-_1 MDI0+_1 0_4 4 1 3 2 MDI1+_1 MDI1-_1 LAN_YLED# +3VLANVCC *MCM2012B900GBE R769 0_4 +3VLANVCC C66 C127 Ă 0.1U/10V_4 ď LAN_GLED# +5VS5 29,31 C77 C57 R770 *0.1U/10V_4 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 L65 +3V_LAN B LAN CONN CN2 Right SIDE USBX1 *0_4 0.1U/10V_4 3 2 8 USBP98 USBP9+ 0.1U/10V_4 Ğ 4 1 USBPW_ON# USBPW_ON# USBP9-_R USBP9+_R MCM2012B900GBE ƌĞƐĞƌǀĞĨŽƌĐŽůĂLJ L66 MDI2+ MDI2- 4 1 B L47 3 2 MDI2+_1 MDI2-_1 C107 USBPW_ON# 220P/50V_4 *MCM2012B900GBE R772 * Place Cc and Cd close to each VDD33 pin-- 23 C108 *4.7U/6.3V_6 Đ C69 *0.1U/10V_4 Ě *0_4 C43 C39 For GIGA R771 Stuff Cc ,Cd *0_4 LAN_YLED# 1000P/50V_4 LAN_GLED# 1000P/50V_4 EMI request L67 MDI3+ MDI3- For 10/100 4 1 3 2 MDI3+_1 MDI3-_1 C45 0.1U/10V_4 +3V 9/27 EMI request *MCM2012B900GBE Remove For Not Using SWR mode NA: Cc, Cd &Žƌ'ŝ' A R773 *0_4 Kd͗'^dϱϬϬϵ>&͕ϬϬϲ>EϬϬ A &͗E^ϴϵϮϰϬϳ͕Ϭ>>ϭ>EϬϬ &ŽƌϭϬͬϭϬϬ 352-(&75 4XDQWD&RPSXWHU,QF Kd͗d^dϭϮϴϰZ>&Ϭ>ϱ>EϬϬ &͗E^ϴϵϮϰϬϴ͕Ϭ&ϳ>EϬϭ 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,31,32,33,34,39,40,42,44 11,39 +3V +3VLANVCC 1% Size Custom Document Number 5 4 3 2 Rev 1A RTL 8105E/RJ45 Date: Friday, December 21, 2012 1 Sheet 30 of 44 1 2 3 4 5 6 7 8 31 3920_RST# +3VPCU B For GPU thermal 15 For Gsensor 12/12: PV 15 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17 DGPUT_CLK DGPUT_DATA 34 MBCLK3 34 MBDATA3 32 TPCLK 32 TPDATA 9 TS_ON 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82 DGPUT_CLK DGPUT_DATA 83 84 85 86 87 88 BIOS_RD# BIOS_WR# BIOS_CS# PCI_SERR# 35,39 ACIN TP63 R829 *0_4 6 7 6 GPIO33_E 6 2,9 SUSWARN#EC 34 RF_LINK# SLP_SUS#EC ACIN THRM_ALERT_HW# EC_GPXD1 D9 DPWROK_EC EC_PECI USBPW_ON# 38,39 SUSON 34,37,38,39 MAINON 10 SLP_SUS_ON 36 S5_ON 4 THRM_MOINTOR1 31,35 SYS_I C 32 32 97 98 99 100 101 102 103 104 105 106 107 108 USBPW_ON# SUSON MAINON 29,30 10/17: SI MEK500V-40 0_4 *0_4 119 120 128 89 76 109 110 112 114 115 116 117 118 R300 R305 THRM_ALERT_HW#1 FB_CLAMP ModifyTP48 35 MBATLED0# 35 AC_LED_ON# WIRELESS_ON WIRELESS_OFF 1 +3VPCU C727 AD_TYPE R501 10K_4 3 R301 R499 100/F_4 AD_ID 0_4 A THRM_ALERT_HW#1 Open Drain need pu high 35 4.7U/6.3V_6 SCI/GPIOE GA20/GPIO0 KBRST/GPIO1 ECRST AD0/GPI38 AD1/GPI39 AD2/GPI3A AD3/GPI3B KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 DA0/GPO3C DA1/GPO3D DA2/GPO3E DA3/GPO3F PWM1/GPIOE PWM2/GPIO10 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49 FANPWM1/GPIO12 FANPWM2/GPIO13 FANFB1/GPIO14 FANFB2/GPIO15 SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47 63 64 65 66 68 70 71 72 TEMP_MBAT AD_TYPE AD_AIR SYS_I TEMP_MBAT C731 R788 3 R509 12.1K/F_4 C717 100P/50V_4 0.1U/10V_4 DRAMRST_CNTRL_EC DSW_WAKE# 9,30 0_4 26 27 28 29 FAN_PWM FB_CLAMP_TGL_REQ# FAN1SIG 77 78 79 80 MBCLK MBDATA MBCLK2 MBDATA2 Q13 2 3 33 TP45 33 33 DGPU_OVT# 15 DGPU_PWROK R818 R740 FAN_PWM FAN1SIG ODD_PD 1 Q34 *2N7002 LAN_POWER 39 GPU_AC_BATT 15 BATSHIP 35 PCIE_WAKE# 6,27,30,34 GPU_AC_BATT BATSHIP PCH_PCIE_WAKE# 21 23 35 AD_AIR 35 SYS_I 31,35 *0_4 4.7K_4 +1.05V C262 220P/50V_4 9,31,42,43,44 CPU_PLTRST#R 1 PM_THRMTRIP#R 2,9 2,9 *METR3904-G MBCLK 35 for MBDATA 35 MBCLK2 8,13,24 MBDATA2 8,13,24 Socket: adapter select for EC DFHS08FS023 2M byte SPI EC ROM Battery charge/charge and cap board +3VPCU for CPU thermal GPIO42 10K/F_4 R511 R512 EON *10K/F_4 AKE38ZN0802 EN25QH16-104HIP AMIC AKE38ZN0Q00 A25LQ16M-F/Q Hi ==> DIS/SG +3VPCU Low ==>UMA GPIO4 GPIO7 GPIO8 PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D PSCLK3/GPIO4E PSDAT3/GPIO4F RD WR SELMEM/SPICS SELIO/GPIO50 SELIO2/GPIO43 D0/GPXD0 D1/GPXD1 D2/GPXD2 D3/GPXD3 D4/GPXD4 D5/GPXD5 D6/GPXD6 D7/GPXD7 GPIOA GPIOB GPIOC GPIOD GPIO11 GPIO16 GPIO17 GPIO18 GPIO19 GPIO1A 6 SUSB# 14 15 HWPG 16 17 18 19 25 30 31 32 SUSC# KBSMI#1 34 36 VRON TPLED# SUSB# 6 HWPG 36,37,38 C443 U15 +3VPCU SUSC# 6 SUSACK#EC 6 EC_AOCS# 34 NBSWON1# 32 EMU_LID 25 EC_DEBUG1 34 EJECT# 33 R505 *0_4/S VRON TP127 R516 10K/F_4 NBSWON1# R515 R517 4.7K_4 4.7K_4 MBCLK MBDATA 1 6 5 2 BIOS_CS# BIOS_SPI_CLK_I BIOS_WR# BIOS_RD# H_PROCHOT#_EC NBSWON1# 0.1U/10V_4 +3VPCU SPI_3P3 R313 10K/F_4 CE# SCK SI SO VDD HOLD# WP# VSS B 8 7 SPI_7P R320 10K/F_4 4 AKE38ZN0802 SOIC8-8-1_27 Reserve for ENE timing issue H_PROCHOT# MBCLK2 MBDATA2 40 PROCHOT control 2,40 10/17: SI Modify CIR_RX/GPIO40 GPIO41 GPIO42 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59 A0/GPXA0 A1/GPXA1 A2/GPXA2 A3/GPXA3 A4/GPXA4 A5/GPXA5 A6/GPXA6 A7/GPXA7 A8/GPXA8 A9/GPXA9 A10/GPXA10 A11/GPXA11 XCLKO XCLKI GND1 GND2 GND3 GND4 GND5 AGND V18R 2 124 C421 0.1U/10V_4 0.1U/10V_4 2 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17 10K/F_4 D7 1SS355 2 55 56 57 58 59 60 61 62 TPCLK TPDATA Modify 10/17: SI Modify 29 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 R527 +3VPCU_EC C732 +3V 1 EC_PWROK MEK500V-40 Change to 1SS355 as Current loss 2 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 20 1 2 37 +3VPCU L53 TB160808B470N001 4.7K_4 2 D8 3 32 32 32 32 32 32 32 32 SCI1# GATEA20 RCIN# 3920_RST# 9 22 33 96 111 125 67 R211 C420 4.7U/6.3V_6 73 74 75 90 91 92 93 95 121 126 127 EC_PCIE_WAKE# THRM_MOINTOR GPIO42 DNBSWON#1 CAPSLED# PWR_LED# EC_PWROK RSMRST# VOLMUTE# BIOS_SPI_CLK LID_EC# 123 CRY2 122 CRY1 11 24 35 94 113 69 L68 EC_PCIE_WAKE# THRM_MOINTOR CAPSLED# 32 PWR_LED# 32 EC_PWROK 5,6 RSMRST# 6 VOLMUTE# 28 LID_EC# C771 R306 C743 *10P/50V_4 34 4 C752 *10P/50V_4 H_PROCHOT#_EC 2 Q33 2N7002K R520 100K_4 1 EC_A20GATE 9 EC_RCIN# VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 AVCC Q35 *METR3904-G 2 OVT_DETC +3VPCU 2 9 CLKRUN# SERIRQ LFRAME LAD0 LAD1 LAD2 LAD3 PCICLK PCIRST/GPIO5 CLKRUN +3VPCU_EC 1 A 3 4 10 8 7 5 12 13 38 SERIRQ LFRAME# LAD0 LAD1 LAD2 LAD3 7 SERIRQ LFRAME# 7,34 LAD0 7,34 LAD1 7,34 LAD2 7,34 LAD3 8 CLK_33M_KBC 2,8,14,27,30,34 PLTRST# 6 CLKRUN# 7,34 adapter Type check 500mA 1 U13 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1 C747 C766 C761 C419 C407 C767 C289 C772 C741 L32 BLM15AG700SS1D(70,0.5A) BIOS_SPI_CLK_I 25,32 R316 33_4 22P/50V_4 0_4 AC_PRESENT If use PCH SUSCLK should change to 20P. 6 C C759 0.1U/10V_4 HWPG C435 22P/50V_4 SCI1# R521 *0_4/S DNBSWON#1 R286 *0_4/S KBSMI#1 R504 *0_4/S SIO_EXT_SCI# DNBSWON# 7 6 SIO_EXT_SMI# 9 0_6 KB3940QF A1 12/19: PV add For +VIN noise 3920_RST# R534 CRY2 *0_4/S PCH_SUSCLK 6,7 2 +3VPCU FOR SG/DIS 9,31,42,43,44 DGPU_PWROK R302 *0_4/S +3V R536 100K_4 EC_GPXD1 1 D C416 0.1U/10V_4 1 2 1 4.7K_4 MBCLK2 R522 4.7K_4 MBDATA2 R535 *10K_4 GPIO33_E 47K_4 C263 C763 *15P/50V_4 R523 C415 0.1U/10V_4 10/14: SI add BOM ID R799 *0_4 R800 *0_4 2,4,9,10,11,34,37 +1.05V 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,32,33,34,39,40,42,44 +3V 4,7,9,11,25,32,34,35,36 +3VPCU 35,36 +5VPCU *33_4 D CLK_33M_KBC 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 2 3 4 5 6 7 Rev 1A EC (KB3940 A1)/ROM Date: Friday, December 21, 2012 1 0.1U/10V_4 ϭϬͬϭϰ͗^/ŵŽĚŝĨLJ 2 THRM_MOINTOR THRM_MOINTOR1 R514 R210 Sheet 8 31 of 44 1 2 3 4 KEYBOARD Con. 31 KB CONN 31 MX1 MX7 MX6 MY9 MX4 MX5 MY0 MX2 MX3 MY5 MY1 MX0 MY2 MY4 MY7 MY8 MY6 MY3 MY12 MY13 MY14 MY11 MY10 MY15 MY16 MY17 MY[0..17] MY[0..17] MX[0..7] MX[0..7] SATA_LED C902 A 7 SATA_LED# 8 ACC_LED# SATA_LED# *AVLC 5S R734 1 SATA_R_LED1 LED2 LED 3P WHITE/AMBER 2 3 1 39_6 2 +3V R733 200/F_6 (Amber) C899 *AVLC 5S R185 2 R191 2 CAPSLED# +3V 1 200/F_6 1 200/F_6 CAPSLED#_R MUTE_LED_CNTL_R WIRELESS_ON_R WIRELESS_OFF_R 3 31 +3V 2 MUTE_LED_CNTL 6 7 8 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 MY5 MY6 MY3 MY7 C109 C142 C145 C140 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 MY8 MY9 MY10 MY11 C141 C76 C173 C169 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 MY1 MY2 MY4 MY0 C128 C136 C139 C96 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 MX4 MX6 MX3 MX2 C82 C73 C104 C97 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 MX7 MX0 MX5 MX1 C67 C133 C90 C61 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 MY12 MY13 MY14 MY15 MY16 MY17 C149 C152 C156 C190 C201 C206 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 *220P/50V_4 32 .(<%2$5'38//83 +3VPCU MY6 MY3 MY12 MY13 10 9 8 7 6 RP2 1 2 3 4 5 MY15 MY10 MY11 MY14 A *10P8R-8.2K +3VPCU MY9 MY0 MY5 MY1 10 9 8 7 6 RP1 1 2 3 4 5 MY8 MY7 MY4 MY2 *10P8R-8.2K +3VPCU *8.2K_4 MY16 *8.2K_4 MY17 R173 R176 CN6 Q6 2N7002K R147 10K/F_4 1 28 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5 50698-03201-001-32p-l DFFC32FR035 EC KB3930 has included K/B pull-up resistor and function +5V +3V 1 C601 PWR_LED R195 2 1 *200/F_6 31 1 TOUCH PAD Con. R116 *0_4/S +3VSUS R304 R303 4.7K_4 4.7K_4 6. GND PWR BTN CONN 31 TPCLK 31 TPDATA C429 10P/50V_4 C428 TB160808B470N001 TB160808B470N001 10P/50V_4 L34 L33 PWR BTN CONN TPCLK-1 TPDATA-1 25 mils +3VSUS 8 6 SMB_PCH_DAT 8 *2N7002DW 6 5 4 3 2 1 PV , HP request Image sensor SMBUS reserve to PCH CN7 C430 0.1U/10V_4 31,32 PWR_LED# 3 DEEP_PWRLED# Q5 DRC5144E0L for EC into Deep Sleep in S3 Mode 2 D C135 0.1U/10V_4 1 C111 NBSWON1# 0.1U/10V_4 1 SMB_PCH_CLK 2 5. PWRLED# R120 10K/F_4 C112 TP_SMB_DATA C 3 88513-0601-6P-L-SMT DFFC06MR001 +3VPCU D 4 TPCLK TPDATA TP_SMB_DATA TP_SMB_CLK PWR_LED# *0.1U/10V_4 LID_EC# 0.1U/10V_4 TP_SMB_CLK close conn 4.POWERON# DFFC06MR001 88513-0601-6P-L-SMT C110 +3VSUS TP_SMB_CLK TP_SMB_DATA 5 3. LIDSWITCH 1 2 3 4 5 6 *0_4 DEEP_PWRLED# R117 4.7K_4 4.7K_4 change to +3VSUS 2. +3VPCU(LIDSWITCH PWR) 0.1U/10V_4 25,31 LID_EC# 31 NBSWON1# PWR_LED# R318 R323 Q19 1. +3VPCU(LIDSWITCH PWR) 1U/10V_4 +3VPCU 31,32 2 WIRELESS_OFF *4.7U/6.3V_6 CN4 C113 WIRELESS_OFF_R Q9 DRC5144E0L 2 WIRELESS_ON SATA_LED# 1000P/50V_4 DEEP_PWRLED# 1000P/50V_4 100mA C114 1 *200/F_6 3 Q10 DRC5144E0L +3VSUS C R208 2 DEEP_PWRLED# *AVLC 5S POWER BOTTON CONNECT C116 R199 1K/F_4 WIRELESS_ON_R 31 C604 B R777 *200/F_6 2 LED1 2 3P WHITE LED 12/20 PV modify C607 R196 1K/F_4 1 39_6 2 9/15 SI for H/W. 3 R440 1 +3VPCU 1 +5V SI, add Mute LED feature B 4,7,9,11,25,31,34,35,36 +3VPCU 7,23,26,28,29,33,34,39 +5V 39 +3VSUS 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,33,34,39,40,42,44 +3V 352-(&75 4XDQWD&RPSXWHU,QF Size Custom 1% Document Number 1 2 3 4 5 6 7 Rev 1A LED/KB/SW/TP Date: Friday, December 21, 2012 Sheet 32 8 of 44 1 2 3 4 5 6 7 8 33 SATA HDD CONNECTOR +5V 9/27 EMI request CPU FAN C617 *2.2U/6.3V_6 C613 0.1U/10V_4 C615 0.1U/10V_4 C616 0.1U/10V_4 Bypass CAP close conn CN18 +5V 31 CN10 15 2 3 46 FAN_PWM FAN_PWM 1 A 5 6 Main HDD FAN Connect +3V DFHD04MR155 R451 4.7K_4 FAN1SIG FAN1SIG SATA_TXP0_C SATA_TXN0_C C884 C879 0.01U/25V_4 0.01U/25V_4 SATA_RXN0_C SATA_RXP0_C C871 C868 0.01U/25V_4 0.01U/25V_4 A SATA_TXP0 7 SATA_TXN0 7 SATA_RXN0 7 SATA_RXP0 7 +3V +5V +5V 19 31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 C614 *0.1U/10V_4 SATA HDD(1ST) DFHS13FS019 sata-ah534-00-13p-r C840 10U/6.3V_8 C837 4.7U/6.3V_6 C836 0.1U/10V_4 C838 10U/6.3V_8 B B SATA ODD CONNECTOR Bypass CAP close conn CN19 SATA_TXP4_C SATA_TXN4_C SATA_RXN4_C SATA_RXP4_C R429 1K/F_4 2 1 C608 C606 0.01U/25V_4 0.01U/25V_4 C595 C592 0.01U/25V_4 0.01U/25V_4 SATA_TXP4 7 SATA_TXN4 7 follow INTEL DG change eject PU to +3V. SATA_RXN4 7 SATA_RXP4 7 ODD_PRSNT# 9 +3V +5V_ODD ODD_EJECT# +5V +12VALW C574 10K/F_4 R434 R424 ODD_EJECT# *0_8 *0_4/S R731 EJECT# AO3404 ID current 5.8A 330K_6 31 Q25 AO3404 0.1U/10V_4 3 +5V 2 R730 +5V_ODD 1 1 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 C +5V_ODD 19 2 3 1 High : ODD power down Low : ODD power on SATA ODD R428 1 DFHS13FS019 sata-ah534-00-13p-r 1 3 C585 0.022U/25V_4 1 Q26 ME2N7002E 2 ODD_PD 2 22_8 31 2 2 120 mils Q24 ME2N7002E C898 C576 10U/6.3V_8 0.1U/10V_4 C573 0.1U/10V_4 C900 0.1U/10V_4 1 +5V_ODD C901 0.1U/10V_4 D D 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,34,39,40,42,44 4,7,9,11,25,31,32,34,35,36 7,23,26,28,29,32,34,39 35,39,44 352-(&75 4XDQWD&RPSXWHU,QF +3V +3VPCU +5V +12VALW Size Custom 1% Document Number 1 2 3 4 5 6 7 Rev 1A HDD/ODD/FAN Date: Friday, December 21, 2012 Sheet 33 8 of 44 1 2 3 4 5 6 Mini PCI-E Card 1 WLAN 7,9 D6 BT_OFF# +1.5V C126 0.01U/16V_4 4.7K_4 +1.5V *0_6 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 +MINIEC_5V EC debug pin 31 8 8 PCIE_TXP1 PCIE_TXN1 PCIE_TXP1 PCIE_TXN1 8 8 PCIE_RXP1 PCIE_RXN1 PCIE_RXP1 PCIE_RXN1 8 8 8 EC_DEBUG1 CLK_33M_DEBUG PLTRST# 15 13 11 9 7 5 3 1 CLK_PCIE_WLAN CLK_PCIE_WLAN# CLK_PCIE_WLAN CLK_PCIE_WLAN# PCIE_CLKREQ_WLAN# 8 BT_COMBO_EN# R461 *0_4 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved BT_COMBO_EN_R# MINICAR_PME# BT_DATA,BT_CHCLK,CLKREQ# internal pull-DOWN 100k ohm GND REFCLK+ REFCLKGND CLKREQ# BT_CHCLK BT_DATA WAKE# R96 +3.3V GND +1.5V LED_WPAN# LED_WLAN# LED_WWAN# GND USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux PERST# W_DISABLE# GND Reserved Reserved Reserved Reserved Reserved +1.5V GND +3.3V C129 0.1U/10V_4 C132 10U/6.3VS_6 C86 0.1U/10V_4 C632 0.1U/10V_4 C639 0.1U/10V_4 C638 10U/6.3VS_6 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 *4.7K_4 R111 MINI_BLED RF_LINK# 0_4 +3V_AOAC RF_LINK# A +3V_AOAC 10/12: SI reserve R801 0_4 R97 RF_LINK# 4.7K_4 31 7/26 DB modify +3V_AOAC USBP10+ 8 USBP10- 8 2 R463 34 +3V 7/26 DB modify CN13 8 0_8 +3V_AOAC FOR KBC DEBUG +5V A R473 INTEL WLAN CARD PIN 20 W_DISABLE# have internal pull-up 110k ohm 10/12: SI reserve R802 16 14 12 10 8 6 4 2 PLTRST# RF_OFF# 0_4 LAD0 LAD1 LAD2 LAD3 LFRAME# MINI PCIE H=11 DFHS52FR097 MIPCI-C-1759513-52P-LDV-SMT 2,8,14,27,30,31 9 6,27,30,31 3 PCIE_WAKE# R474 +3VPCU +3VS5 31 +3V_AOAC 3 EC_PCIE_WAKE# *10K/F_4 1 *DRC5144E0L Q30 1 Reserve for AOAC function C935 *0.022U/25V_4 12/21: PV modify B 1 2 R68 *10K/F_4 MINICAR_PME# +3V_AOAC LAD0 7,31 LAD1 7,31 LAD2 7,31 LAD3 7,31 LFRAME# 7,31 B 1 *DRC5144E0L Q31 2 R465 +3V_AOAC 8 MEK500V-40 +3V_AOAC 7/26 DB modify 7 Q28 *ME2303T1 CLK_33M_DEBUG R84 *51_4 C78 *15P/50V_4 R456 2 *100K/F_4 ϭϬͬϭϰ͗^/ĨŽƌD/ƌĞƋƵĞƐƚ 3 3 24mil Q27 R457 PCH_AOCS# C81 C87 *10U/6.3V_8 *.1U/10V_4 2 *0_4 3 8 +3V_AOAC *ME2N7002E Q68 EC_AOCS# *0_4 1 31 R458 6,7,8,10,28,34,38,44 +1.5V 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 +3V 4,7,9,11,25,31,32,35,36 +3VPCU 7,23,26,28,29,32,33,39 +5V 2,6,7,9,10,36,38,39,42,44 +3VS5 *2N7002E MAINON 1 31,37,38,39 2 +3VS5 Accelerometer Sensor +3V 9/27 EMI request C625 0.1U/10V_4 C R245 *0_6/S +3V C524 0.1U/10V_4 R225 *0_6 +3V_AOAC C319 0.1U/10V_4 C308 0.1U/10V_4 C640 0.1U/10V_4 C522 0.1U/10V_4 C83 0.1U/10V_4 C84 0.1U/10V_4 1 14 Vdd_IO VDD NC NC ACCEL_INTH# 1 ACCEL_INTH#1 MEK500V-40TP22 R224 31 31 R221 11 9 7 6 4 *0_4/S MBDATA3 MBCLK3 +G_SEN_PW 8 *0_4/S RESERVED RESERVED RESERVED RESERVED INT1 INT2 SDO SDA SCL GND GND 10 13 15 16 +5VS5 SI for +VIN noise issue ACCEL_INTH#1 R496 R497 C636 0.1U/10V_4 C637 0.1U/10V_4 +VIN +3VPCU +5VS5 5 12 CS EC4 0.01U/50V_4 EC2 0.01U/50V_4 EC3 0.01U/50V_4 EC5 0.01U/50V_4 C627 0.1U/10V_4 C629 0.1U/10V_4 *0.01U/25V_4 EC25 C446 *0.1U/10V_4 +3V MBDATA3 C323 33P/50V_4 MBCLK3 C322 *33P/50V_4 EC18 0.01U/50V_4 EC1 0.01U/50V_4 EC13 0.01U/50V_4 220P/50V_4 C49 0.1U/10V_4 C48 0.1U/10V_4 +5V EC7 0.01U/50V_4 +3V +3V EC22 0.01U/50V_4 *0.1U/25V_4 EC29 +1.5V_VGA +5V EC6 0.01U/50V_4 +5VS5 +1.05V EC9 0.01U/50V_4 +5VS5 +3V EC8 0.01U/50V_4 +1.05V *0.1U/25V_4 +5VS5 +VGA_CORE C480 0.1U/10V_4 352-(&75 4XDQWD&RPSXWHU,QF C406 0.1U/10V_4 +3V +3VSUS +1.5V +5VS5 1% Size Custom Document Number 3 4 5 6 7 Rev 1A MINI PCIE CONN & G-sensor Date: Friday, December 21, 2012 2 D *0.01U/25V_4 +VIN C475 0.1U/10V_4 2,6,7,8,9,10,12,13,14,23,24,25,26,27,28,29,30,31,32,33,34,39,40,42,44 32,39 6,7,8,10,28,34,38,44 23,29,30,36,37,38,39,40,41,42,43,44 +5V EC27 +VIN C288 22P/50V_4 1 C EC28 +VIN *0.01U/25V_4 EC26 4.7K_4 4.7K_4 ϭϬ͘ϭϰ͗^/ŵŽĚŝĨLJ͘ *0.01U/25V_4 EC24 AL003DC2A00 +G_SEN_PW D C527 0.1U/10V_4 2 3 EC23 8 C626 0.1U/10V_4 U10 HP3DC2TR +G_SEN_PW 2 D10 C630 0.1U/10V_4 C641 0.1U/10V_4 Sheet 8 34 of 44 5 4 3 EC19 1000P/50V_4 PC51 0.47U/25V_6 PR201 75K/F_4 PR26 MBDATA AD_AIR BQDATA *0_4/S PR25 MBCLK BQCLK 8 9 *0_4/S PC130 0.1U/10V_4 SDA SCL SRN 6 Place this cap close to EC BATDRV BQPHASE 15 BQLODRV PC54 0.047U/25V_4 0.1U/25V_4 PDZ5.6B 0.01U/25V_4 *100P/50V_4 1000P/50V_4 0.1U/25V_4 EC11 EC10 EC20 10U/25V_8 10U/25V_8 *10U/25V_8 PR181 RC1206-R020 F3_2X1_65-2_8 PR180 *0_2/S 4 12 BQSRN Place this cap close to EC EC17 1 TEMP_MBAT 31 PC129 0.01U/25V_4 1 1 2 PDZ5.6B PC20 EC21 PL11 8681LR 4.7uH/5.5A(EM-47AM05V08) PC24 13 BQSRP 8 1K/F_4 PC23 PC19 C +BATCHG 2 PR178 4.7_6 14 21 22 23 24 25 PR44 PR45 0_4 PC182 1000P/50V_4 PC192 PC184 PC178 PC179 PD6 SX34 CSOP CSON PC32 PC25 PR179 *0_2/S PQ29 EMB20N03V 0.1U/25V_4 0_4 11 BQBATDRV B 0.1U/25V_4 BQIOUT PR202 12.4K/F_4 SRP 19 7 0.1U/25V_4 VCC IOUT 20 7 BQVCC 22_8 ILIM PR80 BAS316/DG GND GND GND GND GND GND 10 2 LODRV BQ24738 100K/F_4 ACDET 1 +VAD PC59 PD2 0.1U/25V_4 PR39 +VA PD9 0.1U/25V_4 S 2 PU5 ACPRES PC61 REGN6V RB501V-40 8 10U/25V_8 ACIN 5 PD3 BQB_1 PR67 17 BQB_2 0_6 6 9 PR21 200K_4 10U/25V_8 BTST 7 PMPCR2-08MNBS2ZZ4H0 DFHD08MR155 PR28 330_4 2200P/50V_4 ACDRV 2 9 5 D 10 MBCLK PC60 4 1 PHASE ACIN B_TEMP_MBAT6 4 PR20 4.7U/25V_8 8 7 6 5 HIDRV BQHIDRV 1 1 3 10 5 MBDATA PD1 PQ32 EMB20N03V 18 2 10U/25V_8 31,39 PR50 PR22 SYS_I 10/F_4 PC26 PC131 31 +BATCHG PR193 470_8 Place this cap close to EC 2 1M_4 31 PQ3 2N7002K BATSHIP 2 1 1 PR51 1M_4 PR35 +3VPCU MIN. BATV=7.2V +PRWSRC +VA +VH28 39 +VAD 39 +3VPCU 4,7,9,11,25,31,32,34,36 +5VPCU 36 +BATCHG PR24 3 PC34 0.01U/50V_4 3 PR19 88.7K/F_4 100P/50V_4 PR34 69.8K/F_4 ACDET=13V 100K/F_4 430K/F_4 *100K/F_4 PR23 +VAD *0.1U/50V_6 31 0.1U/25V_4 2 CMSRC PR48 100K/F_4 B D *10U/25V_8 1U/10V_4 REGN6V +VA_AIR 31 3 2 1 2 PC52 4 10U/25V_8 4 BQACDRV PQ11 LTC044 PC49 SMC CN11 8 7 6 5 3 31 ACN ACP 0.1U/25V_4 0.1U/25V_4 +5VPCU 3 PC44 2 PR72 BQCMSRC MBATLED0# PC186 REGN6V PC42 2 1 *10U/25V_8 +VA 3 2 1 1K_6 2.43K/F_6 PC62 *0.1U/25V_4 *10U/25V_8 1 MMDT2907A 16 PR90 220K_4 1M_4 3 bat-bp02081-b82d5-7h-8p-l-v 31 PC187 PR89 REGN 1 0.1U/25V_4 2 2 SMD +3VPCU PR27 330_4 PR199 *0_2/S CSIP 220K_4 PR84 PR49 4.02K/F4 PC39 CSIN 6 PR196 2K/F4 PC193 2 BQACN 5 Q1 2 3 PR83 PR91 1M_4 PR197 *0_2/S BATT+ 80/5A Place this ZVS close to Far-Far away +VIN 1 PQ8 2N7002K 3 1 80/5A PL9 PC189 2200P/50V_4 +VIN PR198 RC1206-R010 1 1 3 3 Q2 4 31 PQ9 LTC044 1M_4 PL10 3 2 1 *100P/50V_4 BATDIS_G +VAD PQ10 +12VALW +BATCHG BATDIS_ID_DOD 2K/F4 PD7 P4SMAJ20A MBATLED0# PR65 BQBATDRVPR192 PC194 0.022U/50V_6 PC196 *2200P/50V_4 +5VPCU AC_LED_ON# PQ26 LTC044 5 PR172 3 2 PQ35 TPCA8064-H 1 2.43K/F_6 PC181 EC15 BQACP 1 EC12 0.1U/25V_4 3 PQ22 2N7002K 2 1M_4 1 PQ30 P0603BDG 4 3 PQ25 LTC044 PR174 +12VALW *0.1U/25V_4 PC180 0.1U/25V_4 PC174 0.1U/25V_4 2 AC_LED_ON# C +VAD 2 P4SMAJ20A 4 PC173 DC-IN CONN To PWR LED 1 EC16 4 80/5A 1 2 3 IDEA_G LED2 GND GND LED1 0.1U/25V_4 3 4 5 6 7 8 PD8 EC14 G PC206 7 PQ27 EMB20P03V 80/5A PL15 GND 8 Place this ZVS close to Diode away +VIN +VA PL16 *10U/25V_8 +VA_AC 0.1U/25V_4 6 D 1 2 VDD VDD 35 Do Not add test pad on BATDIS_G signal 31 5 AD_ID CN12 1 +PRWSRC AD_ID 1 DC_JACK 90W 2 PQ34 2N7002K A 3 A AD_AIR PR57 2 PQ4 METR3904-G 1M_4 1 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 5 4 3 2 Rev 1A Charger (OZ8681) Date:Friday, December 21, 2012 1 Sheet 35 of 44 5 4 3 2 1 DC/DC +3VS5/+5VS5 36 +3VPCU +VIN_3VS5 PU9 13 EN VOUT PC233 PC236 PC241 PC239 PC238 PC240 *22U/6.3V_8 *22U/6.3V_8 7 NB670VOUT C PC224 *0.1U/10V_4 PC99 *0.1U/10V_4 NB670 +5 Volt +/- 5% Countinue current:4A Peak current:6A OCP minimum:7.5A +5VPCU +VIN_5VS5 4 NB671PG *0_4/S BST 10 NB671BST PC216 PR220 PC234 8 NB671SW 9 15 16 S5_ON + PR226 *0_2/S PC232 *2200P/50V_4 VOUT 13 +VIN PR222 *2.2_6 VCC 1U/6.3V_4 31,36 NB671EN EN FB 7 NB671VOUT 12 NB671FB PC117 *0.1U/10V_4 Reserve PL24 0.1U/25V_4 1.5uH/9A(EM-15AM05V03) PC228 S5_ON PR149 0_4/P B PJP4 *POWER_JP/S +5VS5_S NB671BST_S 0_6 PGOOD +5VS5 2 NC SW SW SW SW 11 2 PC109 0.1U/25V_4 PGND PC221 2200P/50V_4 5 NC PC226 1 PR217 3 *0_8/S PC102 1 HWPG 10U/6.3V_6 Reserve for NB670 5V version. AGND 1 14 4.7U/25V_8 VIN 4.7U/25V_8 NC PC229 PL21 0.1U/25V_4 6 0_4/P B +VIN PU10 PR219 PC237 PC242 PC1 PC2 PC3 PC4 *0.1U/25V_4 NB670EN PC235 *0.1U/25V_4 S5_ON PR132 0_4/P 2 1 PC222 *BAT54C PC230 0.1U/25V_4 S5_ON 0.1U/25V_4 +5VS5 *22U/6.3V_8 ENLDO 220P/50V_4 31,36 + PR221 *0_2/S +5VPCU PC215 1U/6.3V_4 C PR215 *2.2_6 PD10 11 *22U/6.3V_8 *330K/F_4 1.5uH/9A(EM-15AM05V03) 0.1U/10V_4 NB670ENLDO 12 VCC PL22 0.1U/25V_4 2 PR139 0_6 8 NB670SW 9 15 16 +5VALW *22U/6.3V_8 *665K/F_4 NB670BST_S *22U/6.3V_8 SW SW SW SW PJP3 *POWER_JP/S +3.3VS5_S PC223 PR209 PGOOD PR142 +VIN 10 NB670BST 0.1U/10V_4 BST D +3VS5 330U/6.3V_6X5.8 *0_4/S 2 PC208 2,6,7,9,10,34,38,39,42,44 23,29,30,34,37,38,39,40,41,42,43,44 1 HWPG PGND CLK PC213 2 31,37,38 4 NB670PG NC PC214 +3VS5 +5VS5 330U/6.3V_6X5.8 PR208 HWPG 5 PC209 *2200P/50V_4 PR207 10K/F_4 +3VS5 3 *0_8/S PC207 2200P/50V_4 10U/6.3V_6 AGND 1 14 4.7U/25V_8 VIN 4.7U/25V_8 LDO PC219 PL19 0.1U/25V_4 6 D +3.3 Volt +/- 5% Countinue current:4A Peak current:6A OCP minimum:7.5A +VIN PR218 *82K/F_4 PR216 *330K/F_4 NB669 A +VIN A PR213 *665K/F_4 352-(&75 4XDQWD&RPSXWHU,QF Reserve for NB670 5V version. 1% Size Custom Document Number 5 4 3 2 Rev 1A 3/5VPCU(RT8243A) Date:Friday, December 21, 2012 1 Sheet 36 of 44 5 4 3 2 1 37 D D PR256 100K/F_4 +VIN_1.05V 6 SS FB 2 0.1U/25V_4 10 1237LX 11 16 17 18 1 1uH/11A(EM-10AM05V06) PR168 *2.2_6 PR259 1237FBPCH_S PC155 PC150 PC152 PC148 PC149 PC154 PC151 22U/6.3V_8 5 1237FBPCH PC153 *2200P/50V_4 PC286 *22U/6.3V_8 + PR253 *0_2/S 12 13 14 15 19 4 *22U/6.3V_8 EN PGND PGND PGND PGND PGND AGND PJP7 *POWER_JP/S PL30 0.1U/25V_4 PFM PC292 *0.1U/10V_4 23 1237SSPCH +1.05V_S2 PC287 1237BSTPCH_S 22U/6.3V_8 0_4/P 2 1237ENPCH 0_6 22U/6.3V_8 3 *0_2/S 1237PFMPCH LX LX LX LX LX PR254 +1.05V 22U/6.3V_8 C MAINON MAINON PR257 PGOOD PC157 0.1U/10V_4 PR258 31,34,38,39 1 1237PGPCH *0_4/S PC158 1 PR255 HWPG PC289 2 HWPG PC156 *390U/2.5V_5X5.8ESR10 31,36,38 20 1237BSTPCH PC290 2200P/50V_4 VCC 4.7U/25V_8 *0_8/S PC288 1U/6.3V_4 BST +VIN PL7 8 9 22 4.7U/25V_8 IN IN IN 0.1U/25V_4 21 AIN TON PU14 7 +5VS5 +1.05V Volt +/- 5% Countinue current:4A Peak current:7.7A OCP minimum:9A C 2.4K/F_4 0.1U/10V_4 PC291 AOZ1237QI-02 PR260 7.68K/F_4 B B A A +1.05V 352-(&75 4XDQWD&RPSXWHU,QF 2,4,9,10,11,31,34 1% Size Custom Document Number 5 4 3 2 Rev 1A 1.05V(RT8228BZ) Date:Friday, December 21, 2012 1 Sheet 37 of 44 1 2 3 4 5 38 +1.35VSUS 2,3,4,12,13 +1.5V 6,7,8,10,28,34,44 +VIN_DDR ( VTT/2A ) +0.75V_DDR_VTT *0_8/S PR261 5 VTTREF SW 1 DRVL PGND 51216S3 17 2 0_4 31,39 SUSON 31,36,37 HWPG SUSON PR111 *0_4/S 51216S5 16 HWPG *0_4 PC83 *0.1U/10V_4 PR110 VDDQSNS S5 51216PG 20 PR112 PGOOD 51216TRIP 18 REFIN 8 51216PG 51216PG 0.1U/25V_4 PC212 PR94 10K/F_4 B 51216REFIN PC66 PR92 31.6K/F_4 0.01U/16V_4 1 PC211 V5IN 1U/6.3V_4 PD11 PC195 *2200P/50V_4 Rds(on) 14m ohm G5316RZ1D 2 51216VDDQSNS 6 PC76 HWPG PQ36 AON7702A MODE 12 + PR203 *0_2/S 4 PC67 0.1U/10V_4 47K/F_4 +5VS5 9 TRIP 120K/F_4 PR109 51216MODE19 PR195 *2.2_6 DQ 10 +1.8VREF VREF DR B PJP2 *POWER_JP/S +1.35VSUS_S PL17 0.82uH/13A(EM-82BM05V04) 11 51216DRVL S3 *BAS316 PR122 PQ37 EMB20N03V 0.1U/25V_4 13 51216SW 0.1U/10V_4 MAINON PC79 51216VBST_S 2.2_6 +1.35VSUS 1 PC71 0.22U/10V_4 PD5 MAINON PR101 A 8 7 6 5 *100/F_4 PC294 *0.1U/10V_4 31,34,37,38,39 15 51216VBST 4 2 DDR_VTTREF VBST GND PC210 390U/2.5V_5X5.8ESR10 3,12 GND PC74 2 7 21 14 51216DRVH PC204 1 DRVH PC205 2200P/50V_4 VTTGND PC75 4.7U/25V_8 4 8 7 6 5 *10U/6.3V_6 VTTSNS PC80 10U/6.3V_6 ( 3mA ) 2 3 2 1 1 VLDOIN 4.7U/25V_8 PC78 VTT 0.1U/25V_4 PU7 3 A 3 2 1 +0.675V_DDR_VTT +1.35V +/- 5% Countinue current:6A/8A Peak current:10A/12A OCP minimum:12A/15A +VIN PL18 +1.35VSUS Location 2 BAS316 Value P/N OCP AON7702A BAM77020001 12A AON7202 BAM72020001 15A Value P/N OCP 120K CS41202FB17 12A 76.8K CS37682FB00 15A DQ Location DR C C +1.5V +/- 5% Countinue current:0.3A Peak current:0.75A OCP current:1.2A PR33 *0_6/S +3VS5 4 4.7U/6.3V_6 PC30 +1.5V 5 *0_4/S 1 MAINON 0_4/P EN GND 3 8008LX1.5V 2.2uH/1.3A_2520 2 *0_2/S SY8002BABC 6 *0.1U/10V_4 PC7 D LX R1 8008VFB1.5V PR31 PC28 PC170 0.1U/10V_4 31,34,37,38,39 PG PR29 PR9 10U/6.3V_6 PR30 PL3 FB HWPG VIN PU1 15K/F_4 R2 D PR32 10K/F_4 VO=(0.6(R1+R2)/R2) 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 1 2 3 4 Rev 1A DDR3L(APW8819) Date:Friday, December 21, 2012 5 Sheet 38 of 44 5 4 3 2 1 +VH28 +5V 7,23,26,28,29,32,33,34 +VIN 25,34,35,36,37,38,40,42,43,44 +1.5V 6,7,8,10,28,34,38,44 +VAD PR66 *0_4 PR68 22_6 LAN_POWER 0.47U/25V_6 16 17 D_CAP VOUT CN ACIN PC56 CP 19 G5934CN 20 VIN 31 1 PC53 1U/35V_6 G5934CP 0.1U/25V_4 PC57 18 PC55 0.1U/25V_4 D +3VS5 2,6,7,9,10,34,36,38,42,44 +5VS5 23,29,30,34,36,37,38,40,41,42,43,44 +VH28 +VAD 35 +3VSUS 32 +12VALW 33,35,44 ON1 PR81 *0_4 31,35 D +3VLANVCC 11,30 +0.75V_DDR_VTT 12,13,38 +VAD 15 G5934PG PG PR85 *750K/F_4 31,34,37,38 2 MAINON MAINON ON2 VSENSE ON3 REG 14 G5934VSENSE +12VALW 31,38 3 SUSON PR88 *100K/F_4 13 PC65 1U/16V_4 ON4 DISC3 6 G5934DISC2 PR97 *0_4/S +5V 5 6 7 8 21 8 7 6 5 PC147 0.1U/10V_4 +VIN 4 MAIND $ 3 2 1 PR54 *22_8 PR56 *1M_4 +5V +3VS5 PC63 0.1U/10V_4 +3V PC64 *10U/6.3V_6 1 2 5 6 PC185 0.1U/10V_4 1 +3VS5 2 $ 4 PC198 2200P/50V_4 *10U/6.3V_6 +3VLANVCC MAIND PR55 *1M_4 PQ6 *2N7002K 3,10 MAIN_ONG +3VSUS 4 R314 3 PQ33 EMB32N03K SUSD PC200 *10U/6.3V_6 +3V_DEEP_SUS $ 6 5 2 1 PC188 IRUWRXFKSDGUHVHUYH PC199 0.1U/10V_4 B 0.1U/10V_4 B PC220 PQ31 EMB32N03K 1 LAN_ON 3 PR185 0_4 PC225 0.1U/10V_4 PQ5 *2N7002K 2 MAIND3.3V PC217 2200P/50V_4 +0.75V_DDR_VTT 3 0.1U/10V_4 4 C +5VS5 PU6 SLG55448VTR GND DRIVER2 10 DISC4 *0_4/S +3VSUS PQ21 EMB20N03V PR99 *0_4/S PQ38 EMB20N03V 1 2 3 +3V PR98 PC72 2200P/50V_4 PC227 $ 9 11 12 +3VS5 DRIVER1 DISC2 DRIVER4 DISC1 G5934DISC4 8 5 G5934DISC1 *0_4/S DRIVER3 PR93 +3VLANVCC C 7 G5934DISC3 3 4 MAINON PC70 2200P/50V_4 PC197 PC201 0.1U/10V_4 *10U/6.3V_6 *0_4 A A 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 5 4 3 2 Rev 1A Dis-charge IC (G5934) Date:Friday, December 21, 2012 1 Sheet 39 of 44 4 3 2 1 CSREF Dummy Rc For 2 phase Ca Dummy Ra and Ca For 2 phase PC6 *0.047U/25V_4 Rc PR8 SWN2 SWN2 PR10 CSP2 40,41 220K_6 NTC 5G CPU 81103GND 165K/F_4 CS34322FB00 47W 66.5K CS36652FB16 CSREF 40,41 5 6 5 6 1000P/50V_4 PC46 PC183 PC45 PC176 PC177 Ra Ca Rb Rc Rd Re 37W Dummy Dummy POP Dummy CS34322FB00 CS29092FB27 CH733RY8802 Dummy Page 41 47W POP POP Dummy POP CS36652FB16 CS31472FB14 CH756RM8802 POP Page 41 PC128 PR18 1 PR184 *0_2/S PR87 4 0.1U/25V_4 1 10/F_4 CSREF PC128 2 2 *330u_2.5V_7343 2 *330U/2.5V_6X4.5ESR12 + PC68 CSREF SWN1 For 37W CPU ; PC128 Placed 330uF_9 mohm For 47W CPU ; PC128 Placed 560uF_4.5 mohm PUT COLSE TO VCORE HOT SPOT CPU 3& 37W CH733RY8802 40,41 47W CH756RM8802 3 40 A 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 2 Rev 1A CPUCORE (NCP81103) Date:Friday, December 21, 2012 5 + PC191 *330U/2.5V_6X4.5ESR12 2 *390U/2.5V_5X5.8ESR10 *0_2/S 1 1 1 1 1000P/50V_4 1 CPU 2 A PR188 + PC190 PR190 TH05-3L104FR 8.25K/F_4 PR194 PR14 B +VCC_CORE + PQ7 *RJK03S3 PR189 0_4/P PR8 40 SV 37W CPU VID1=1.8V IccMax=55A Icc_Dyn=35A Icc_TDC=26A R_LL=1.5m ohm OCP~60A PC203 2 PR176 4.7_6 5 6 5 6 S2 S2 8 + S2 PQ28 RJK03P3 0.24uH/24A_7X7X4 G2 S2 S2 S2 G2 10K/F_4 S1/D2 81103SW1 9 PC172 PR4 2 SWN3 2200P/50V_4 D1 D1 D1 9 PR64 25.5K/F_4 81103LG1 PC6 CSREF 10/F_4 81103SW1 TSENSE PR10 C PL14 81103GND 81103GND R63 Location PC9 470U/25V_EC_10H 2200P/50V_4 PR86 0.1U/25V_4 2 1 81103HG1_G G1 PC50 0.1U/10V_4 2 1 2 3 4 5 6 7 8 9 81103EN VR_HOT# SDIO ALERT# SCLK VR_RDY 81103ROSC TSENSE VBOOT 0.1U/25V_4 4.7U/25V_8 2 1 2 1 7 CSCOMP CSSUM CSREF CSP3 CSP2 CSP1 DRON PWM2/IMAX HG3 S2 EN VRHOT# SDIO ALERT# SCLK VR_RDY ROSC TSENSE VBOOT D1 *0_2/S 81103HG1_G S1/D2 IMVP_PWRGD *0_2/S PR182 1_6 D1 *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S S2 PR73 D1 PR60 PR61 PR62 PR63 PR58 PR186 +VIN_VCC_CORE PR82 *75/F_4 H_PROCHOT# PR79 PC35 2.2U/6.3V_6 D1 +3V +5VS5 G1 +VCCIO_OUT 2,31 H_PROCHOT# 4 VR_SVID_DATA 4 VR_SVID_ALERT# 4 VR_SVID_CLK 6 IMVP_PWRGD PR75 D1 VRON S2 31 *0_4/S 81103LG3 81103LG1 15 45.3K/F_4 PR59 + PC202 PC175 13 LG1 PC161 PR177 4.7_6 81103SW1 0.22U/25V_6 PVCC PC160 0.24uH/24A_7X7X4 PC41 10 12 BST1 SW 1 81103GND 81103GND PC166 81103SW3 G2 PC47 2.2U/6.3V_6 B 81103HG1 PQ1 *RJK03S3 PC15 PL12 S1/D2 PR170 *0_4/S PQ23 RJK03P3 D1 2.2_6 81103LG3 G1 PR74 GND 81103SW3 S2 +5VS5 37 0.22U/25V_6 16 14 11 LG3 PGND HG1 D1 2200P/50V_4 0_4 17 SW 3 81103SW3 9 S2 PR71 81103GND PC43 PC48 1000P/50V_4 4 VSS_SENSE 4 VCC_SENSE 9 S2 1K/F_4 ILIM IOUT VRMP COMP FB DIFFOUT VSN VSP VCC PC18 G2 470P/50V_4 PR53 28 81103ILIM 29 81103IOUT 81103VRAMP 30 81103COMP 31 32 81103FB 81103DIFFOUT33 34 81103VSN 35 81103VSP 36 81103VCC PU4 NCP81103 19 BST3 S1/D2 PC22 81103GND 81103HG3_G 1_6 22.1K/F_4 PR43 0_4 81103HG3_G D1 81103HG3 PR17 PR70 41 PC165 PR173 PR18 9.09K/F_4 81103GND 5.9K/F_4 PL2 *0_8/S D1 PC38 1K/F_4 81103_PWM Rd PR14 41 43.2K/F_4 Re 10P/50V_4 +VIN *0_8/S CSCOMP PC29 0.01U/50V_4 PL1 +VIN_VCC_CORE CSP1 PR36 1K/F_4 PC40 330P/50V_4 40 PR13 5.11K/F_4 G1 C SWN1 PR11 *20K/F_4 CSP1 DRON PC58 0.1U/10V_4 SDIO ALERT# SCLK PR47 PC13 0.047U/25V_4 8 PR78 54.9/F_4 40 CSP2 27 26 25 24 23 22 21 20 18 PR77 *75/F_4 SWN3 4.7U/25V_8 CSSUM *330P/50V_4 +VIN_VCC_CORE PR52 CSREF 5.11K/F_4 CSP3 +VCCIO_OUT 49.9/F_4 CSP3 43.2K PC14 PR1 35 37W PC17 1000P/50V_4 CSREF D POP Rb for 2 phase 4.7U/25V_8 1200P/50V_4 PR2 *20K/F_4 4.7U/25V_8 PR6 75K/F_4 PR76 130/F_4 PC5 0.047U/25V_4 40 4.7U/25V_8 PR5 PC10 SWN1 4.7U/25V_8 CS31472FB14 SWN1 147K/F_6 2 7 14.7K PR191 1 8 CS29092FB27 CSP2 1 47W 9.09K PR4 0_4 Rb CSREF 40 7 37W SWN3 7 D SWN3 147K/F_6 PR12 PUT COLSE TO VCORE Phase 1 Inductor 8 35 40,41 *5.11K/F_4 PR3 5H 4,41 Ra SWN2 *147K/F_6 CPU +VCC_CORE +5VS5 PR7 *20K/F_4 3300u_2V_7343 5 1 Sheet 40 of 44 5 4 3 2 1 D D +VIN_VCC_CORE HG2 PR38 XE 47W CPU VID1=1.8V IccMax=85A Icc_Dyn=60A Icc_TDC=33A R_LL=1.5m ohm OCP~95A HG2_G PC164 PC159 PC162 *4.7U/25V_8 *0.1U/25V_4 *2200P/50V_4 1 2 D1 D1 D1 G1 D1 +VCC_CORE PL13 1 + PC69 2 PR171 *4.7_6 9 PC21 PC167 *1000P/50V_4 LG2 B PR187 *0_2/S PR183 *0_2/S PR69 *10/F_4 *330u_2.5V_7343 5 6 7 8 5 6 7 8 S2 S2 PQ2 *RJK03S3 S2 PQ24 *RJK03S3 G2 5 LG2 S2 LG PAD *2.2U/6.3V_6 C SW2 *0.24uH/24A_7X7X4 GND 6 EN VCC 9 SW2 S1/D2 9 S2 4 *0.22U/25V_6 S2 3 *2K/F_4 +5VS5 7 SW2 G2 DRON D1 PR37 40 SW PWM 1 S1/D2 2 PC8 PC33 BST 81103_PWM PC163 *NCP81151 8 HG 40 D1 G1 PU3 2 1 HG2_G *4.7U/25V_8 C *4.7U/25V_8 *1_6 B CSREF SWN2 40 40 For 37W CPU Dummy these components A A +VCC_CORE 352-(&75 4XDQWD&RPSXWHU,QF 4,40 1% Size Custom Document Number 5 4 3 2 Rev 1A NCP81151 Date: Friday, December 21, 2012 Sheet 1 41 of 44 2 3 4 5 GPIO12 GPIO16 VGA Core 1 1 0 1 0 1 1 1 0 0 0.9V 1 0 1 0.875V V-CORE 1 1 1.125V 0 0 0 1.100V 0 0 1 1.075V 0 0 1 0 1.050V 0 0 1 1 1.025V 1 0 1 0 0 1.000V 1 0 1 0 1 0.975V 1 0 1 1 0 0.950V Default A +VIN_GPU 0.850V 1 0 1 1 0.825V 1 1 1 0 0 0.800V PC84 2.2U/6.3V_6 12 PR211 *0_4/S 0.1U/25V_4 2200P/50V_4 4.7U/25V_8 4.7U/25V_8 2 +VGA_CORE 49 DGPU_PROCHOT# DGPU_PWROK PQ16 RJK03P3 9,31,43,44 PR137 *2.2_6 PR214 *0_2/S AGND DRVH1 AGND BST1 PR224 *0_2/S PC108 PC218 PC103 *2200P/50V_4 PR212 *0_4/S + PC121 PR225 10/F_4 B 35 3212_DRVH1 36 3212_BS1 3 15 1 3212_VCC 37 1 // P9$ + PR124 10K/F_4 S2 0 PR146 649K/F_4 S2 1 9 PR102 10_6 S2 0 2&3PLQLPXP$ PL23 G2 B 1 3HDNFXUUHQW$ 5 0.875V &RXQWLQXHFXUUHQW$ PC81 0.36uH/24A_7X7X3 6 1 PC82 3212_SW1 7 0 PC88 +3V PR106 *0_4/S 8 0 PC89 PWRGD 1 PC120 1000P/50V_4 38 3212_PH1 1 0DUV : +VIN DCR_1.4m ohm 2 0.900V 39 3212_PH0 0 PH1 0 PH0 0 PR107 *0_4 16 1 +5VS5 RAMP 1 PR155 1K/F_4 VCC 0.925V 1_6 PC85 D1 1 3212_DRVH1S1 D1 1 PR135 +5VS5 D1 1 +VIN_GPU S1/D2 0 PL4 *0_8/S 9*$B&25( PC86 G1 1 1 42 Default 1 1 1.0V 2 0 0 18,34,44 *330u_2.5V_7343 PWRCNTL3 PWRCNTL2 PWRCNTL1 1 1 PWRCNTL4 0 GPIO15 Mars XT 2 PWRCNTL5 +VGA_CORE V-CORE *330u_2.5V_7343 GPIO16 GPIO20 8 0.1U/10V_4 GPIO12 7 2200P/50V_4 A PWRCNTL4 PWRCNTL3 PWRCNTL1 GPIO10 6 GPIO15 Thames XT 220P/50V_4 1 38 SW1 2 PQ39B 2N7002KDW PR113 40 DPRSLPVR_R *0_2/S 4 EN DRVL2 DPRSLPVR PGND 24 3212_FB SWFB2 6 28 3218_SWFB2 PR133 100/F_4 3212_CS_PH2 33 3218_SWFB1 PR125 100/F_4 PWM3 SWFB1 SWFB3 3212_CS_PH1 4.7U/25V_8 2200P/50V_4 0.1U/25V_4 1 1 2 2 PR150 226K/F_4 &ORVHWR 3KDVH,QGXFWRU FB PC115 470P/50V_4 17 IMON 13 3218_IREF PR120 0_4 PR121 100/F_4 CSREF FBRTN RT 3 20 3212_CSCOMP ILIM 21 PR154 73.2K/F_4 PR156 226K/F_4 165K/F_4 PR223 220K_6 NTC PR151 20K/F_4 PR148 1K/F_4 D PR147 20K/F_4 18 5 LLINE IREF PC93 1000P/50V_4 CSCOMP RPM 3212_IMON PR127 *4.7K/F_4 COMP 3218_RT15 7 PR153 PC110 1000P/50V_4 PC97 39P/50V_4 PR136 26.1K/F_4 14 3218_RPM PC96 220P/50V_4 PR126 1.65K/F_4 PR152 3218_CSREF *0_4/S 352-(&75 4XDQWD&RPSXWHU,QF VSS_GPU_SENSE VGPU_CORE_SENSE 47.5K/F_4 PR143 80.6K/F_4 18 162K/F_4 PR144 PR145 +VGA_CORE PC112 1U/6.3V_4 1% 18 Size Custom Date: 1 C 6KRUWHVWWKH QHWWUDFH 19 3218_CCSUM PC92 150P/50V_4 PR118 100/F_4 PR210 10/F_4 30 OD3# CSSUM PR119 0_4 PC231 CLK_EN# 2 22 *0_4 23 D PR205 *0_4/S PC107 1 PR298 PR128 100K/F_4 PC87 *2200P/50V_4 29 3212_DRVL2 + + PC126 390U/2.5V_5X5.8ESR10 PQ15 RJK03P3 PR206 *0_2/S 330u_2.5V_7343 27 3212_SW2 PR204 *0_2/S PR108 *2.2_6 0.1U/10V_4 9 PC101 0.22U/25V_6 3 1 +VGA_CORE 1 PC90 0.33U/6.3V_4 SW2 25 3212_BS2 +3V 4 6 20K/F_4 PQ39A 2N7002KDW DCR_1.4m ohm 0.36uH/24A_7X7X3 S2 5 PC119 3212_SW2 S2 100K/F_4 PC111 D1 DGPU_PR_EN BOOT2 26 3212_DRVH2 S2 PR115 44 DRVH2 PR297 PR296 100K/F_4 D1 +3V *10K/F_4 PC98 PL20 VID0 VID1 VID2 VID3 VID4 VID5 VID6 G2 PR116 2 *BAS316/DG GPU_VID6 PC104 S1/D2 1 C *0_4/S 48 47 46 45 44 43 42 D1 PD4 PR104 *0_4/S 32 G1 7KLV17&&ORVH WR3KDVH026)(7 GFX_CORE_CNTRL1 GFX_CORE_CNTRL2 GFX_CORE_CNTRL3 GFX_CORE_CNTRL4 GFX_CORE_CNTRL5 +3VS5 1_6 PC94 4.7U/6.3V_6 VARFR 3212_DRVH2S1 4.7U/25V_8 PR200 +5VS5 PVCC PR103 15 15 15 15 15 31 3212_DRVL1 TRDET# 2 9 PC105 0.01U/25V_4 DRVL1 TTSNS 1 PR114 220K_6 NTC 8 5 2 PR134 5.1K/F_4 +5VS5 1 3212_TTSNS 11 7.32K/F_4 +VIN_GPU 1&3* VR_TT PR138 +5VS5 PC91 0.22U/25V_6 34 3212_SW1 6 3212_VRTT 10 PSI# 7 10K/F_4 PQ18 2N7002K 1 41 +3V 2 8 PR105 2 3 4 5 6 7 Document Number Rev 1A +VGACORE NCP3218G) Friday, December 21, 2012 Sheet 42 8 of 44 5 4 3 2 1 43 +VDDCI +1.5V_VGA 18,20,21,22,34 D D PR163 3 2 30K/F_4 0.47U/6.3V_4 10 1237LX1.5V 11 16 17 18 EN SS PGND PGND PGND PGND PGND AGND FB 1 2 PR164 *0_2/S 12 13 14 15 19 4 PC253 *2200P/50V_4 5 1237FB1.5V 1 1uH/11A(EM-10AM05V06) PR235 *2.2_6 PFM PC249 23 1237SS1.5V LX LX LX LX LX PC255 PR239 PC254 PC269 PC264 PC261 PC138 PC137 PC257 *22U/6.3V_8 DGPU_PR_EN 1237PFM1.5V PR231 PGOOD PL26 0.1U/25V_4 + PJP5 *POWER_JP/S +1.5VVGA_S2 *22U/6.3V_8 9,42,44 *0_2/S 1 1237PG1.5V PC252 1237BST1.5V_S *22U/6.3V_8 PR241 DGPU_PR_EN *0_4/S 0_6 22U/6.3V_8 PR232 DGPU_PWROK PR229 +1.5V_VGA *22U/6.3V_8 9,31,42,44 PC140 22U/6.3V_8 C 20 1237BST1.5V PC265 0.1U/10V_4 BST PC139 220P/50V_4 PC251 1U/6.3V_4 PC270 2200P/50V_4 *0_8/S PC266 2 6 IN IN IN VCC 4.7U/25V_8 AIN +1.5V Volt +/- 5% Countinue current:6A Peak current:8A OCP minimum:12A +VIN PL28 4.7U/25V_8 21 +VIN_1.5VGA 8 9 22 0.1U/25V_4 +5VS5 TON 7 *390U/2.5V_5X5.8ESR10 120K/F_4 PU12 C 1237FB1.5V_S 6.98K/F_4 0.01U/25V_4 PC250 AOZ1237QI-02 PR240 8.06K/F_4 B B A A 352-(&75 4XDQWD&RPSXWHU,QF 1% Size Custom Document Number 5 4 3 2 Rev A нs'WKtZ Date:Friday, December 21, 2012 1 Sheet 43 of 44 1 2 3 4 5 R2 Value VGA TYPE P/N 6 Thems 10K CS31002FB26 1.0V MARS 11.3K CS31132FB07 0.95V 8 +0.95V +/- 3% Countinue current:2A Peak current:3A OCP minimum:4A +1.0V_VGA PC271 7 1.0V_VGA +0.95V_VGA +5VS5 For reserve 2 PR248 A *2.2_6 A +1.0V_VGA_S2 PR249 *POWER_JP/S PC273 10U/6.3V_6 11 7 SVIN FB GND EN 6 R1 554NC_1.0V PC145 *68P/50V_4 554FB_1.0V 9,42,43 1 PC143 PC295 PC275 PC274 5 R2 PR251 DGPU_PR_EN PR250 *0_2/S PR165 6.65K/F_4 PC144 PC142 V0=0.6*(R1+R2)/R2 +3VS5 PR166 11.3K/F_4 10K_4 1.8V +/- 3% Countinue current:2A Peak current:3A OCP minimum:4A PC278 0.47U/6.3V_4 PC77 +1.8V_VGA B PC12 PC141 *1U/6.3V_4 LX NC PC277 1U/6.3V_4 PC272 0.01U/50V_4 10_6 PC146 *22P/50V_4 3 PC285 PC284 B 2 PR15 PC73 *1U/6.3V_4 554SVIN_1.0V 8 PL29 554LX_1.0V 1uH/11A(EM-10AM05V06) 554FB_1.0V_S 2 *0.1U/10V_4 PVIN RT8068A PR252 1 *0.1U/10V_4 LX *0.01U/25V_4 NC PVIN *0.01U/25V_4 10 PJP6 *POWER_JP/S PG *1000P/50V_4 554PVIN_1.0V 9 1 10U/6.3V_6 2 +5VS5 *22U/6.3V_8 554PG_1.0V 4 PR167 *0_4/S DGPU_PWROK 0.1U/10V_4 9,31,42,43 *1000P/50V_4 *2200P/50V_4 PU13 *2.2_6 +1.8V_L PR175 *POWER_JP/S LX RT8068A PR16 554SVIN_1.8V 8 10_6 10U/6.3V_6 FB GND EN PC37 *22P/50V_4 3 7 6 554NC_1.8V PC31 *68P/50V_4 554FB_1.8V 5 554EN_1.8V R1 1 PR41 20K/F_4 PC171 PC169 PC168 PR46 69.8K/F_4 PC27 R2 PC36 0.47U/6.3V_4 1U/6.3V_4 PC11 0.01U/50V_4 PC16 SVIN 11 NC 2 PC123 PR40 10K/F_4 V0=0.6*(R1+R2)/R2 PC124 PC127 PC125 *1U/6.3V_4 LX PVIN *0.1U/10V_4 PVIN *0.01U/25V_4 10 +1.8V_VGA PR169 *0_2/S 10U/6.3V_6 554PVIN_1.8V 9 1 PJP1 *POWER_JP/S NC *22U/6.3V_8 2 PG PL8 554LX_1.8V 1uH/11A(EM-10AM05V06) 554FB_1.8V_S 1 0.1U/10V_4 +5VS5 554PG_1.8V 4 PR42 *0_4/S *1000P/50V_4 *2200P/50V_4 PU2 DGPU_PWROK +3V DGPU_PR_EN PC106 PC276 *1U/6.3V_4 *1000P/50V_4 PC100 *0.1U/10V_4 C PC279 *0.01U/25V_4 C +12VALW +3V_VGA +VGA_CORE +3VS5 +1.5V +VIN 1 2 5 6 PQ14 2N7002K PC116 *10U/6.3V_6 1 1 PC113 0.1U/10V_4 PC293 *0.47U/6.3V_4 1 0_4/P D PC281 +3V_VGA 3VGFX_ONG PC282 PC280 D +1.8V_VGA +1.0V_VGA +3V_VGA 352-(&75 4XDQWD&RPSXWHU,QF 11,15,16,18,19 14,16,18,19 14,18 1% Size Custom Document Number 2 3 4 5 6 7 Rev +VGACORE (RT8208/1.8V) Date:Friday, December 21, 2012 1 PC283 *1U/6.3V_4 $ 2 *0.1U/10V_4 PC114 0.1U/10V_4 3 PQ17 EMB32N03K *0.01U/25V_4 PQ13 2N7002K *1000P/50V_4 3 3 PQ19 *2N7002K PC95 2200P/50V_4 PR131 1M_4 2 2 1 3 DGPU_PR_EN 3 3VGFX_OND PQ12 *2N7002K 2 PR123 PR130 1M_4 PR157 *22_8 4 PR141 *22_8 PR129 1M_4 Sheet 44 8 1A of 44 www.s-manuals.com
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File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.5 Linearized : No XMP Toolkit : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39 Producer : Acrobat Distiller 9.0.0 (Windows) Modify Date : 2014:06:11 12:07:31+03:00 Create Date : 2014:05:11 01:03:30+07:00 Creator Tool : PDFCreator Version 0.9.5 Metadata Date : 2014:06:11 12:07:31+03:00 Document ID : 4a33210d-4fe8-11e2-0000-e74d06fb237b Instance ID : uuid:8d1c677e-97de-494d-8ac8-6c05b812e862 Format : application/pdf Title : Quanta R63 - Schematics. www.s-manuals.com. Creator : Description : Subject : Quanta R63 - Schematics. www.s-manuals.com. Page Count : 45 Keywords : Quanta, R63, -, Schematics., www.s-manuals.com. Warning : [Minor] Ignored duplicate Info dictionaryEXIF Metadata provided by EXIF.tools