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Preliminary Datasheet

R2J20656ANP

R07DS0201EJ0100
Rev.1.00
Jan 25, 2011

Integrated Driver - MOS FET (DrMOS)
Description

The R2J20656ANP multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver
in a single QFN package. The on and off timing of the power MOS FET is optimized by the built-in driver, making this
device suitable for large-current buck converters. The chip also incorporates a high-side bootstrap switch, eliminating
the need for an external SBD for this purpose.

Features
















Compliant with Intel 6  6 DrMOS Specification.
Built-in power MOS FET suitable for Notebook, Desktop, Server application.
Low-side MOS FET with built-in SBD for lower loss and reduced ringing.
Built-in driver circuit which matches the power MOS FET
Built-in tri-state input function which can support a number of PWM controllers
High-frequency operation (above 1 MHz) possible
VIN operating-voltage range: 27 Vmax
Large average output current (Max.35 A)
Achieve low power dissipation
Controllable driver: Remote on/off
Zero current detection for a diode emulation operation
Double thermal protection: Thermal Warning & Thermal Shutdown
Built-in bootstrapping Switch
Small package: QFN40 (6 mm  6 mm  0.95 mm)
Pb-free/Halogen-Free

Outline

Integrated Driver-MOS FET (DrMOS)
QFN40 package 6 mm × 6 mm
VCIN BOOT

VIN

10
11

40
THWN

Driver
Pad

High-side
MOS Pad

DISBL#
VSWH

MOS FET Driver
ZCD_EN#

Low-side MOS Pad
PWM
31
CGND VDRV

PGND

20
30

21
(Bottom view)

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 1 of 15

R2J20656ANP

Preliminary

Block Diagram
Driver Chip
VCIN

THWN

VDRV

BOOT

Boot
SW

THDN

VIN

DISBL#
High Side
MOS FET

2 μA

UVL

CGND

Level Shifter
20 k

CGND
VCIN

160 k Zero

Current
Det.

ZCD_EN#

VSWH
Overlap
Protection.
& Logic

Input Logic
(TTL Level)
(3 state in)

PWM

Low Side
MOS FET

VDRV

VCIN

35 k

PGND

CGND

Notes: 1. Truth table for the DISBL# pin
DISBL# Input
Driver Chip Status
"L"
"Open"
"H"

Shutdown (GL, GH = "L")
Shutdown (GL, GH = "L")
Enable (GL, GH = "Active")

3. Output signal from the UVL block
UVL output
Logic Level

4. Output signal from the THWN block
For active

"H"
For shutdown
"L"

VCIN
VL

2. Truth table for the ZCD_EN# pin
ZCD_EN# Input
Driver Chip Status
"L"
"Diode Emulation Mode"
"Open"
"Continuous Conduction
Mode"
"H"
"Continuous Conduction
Mode"

"H"
Thermal Warning
Logic Level
"L"

Normal
operating

Thermal
Warning
TIC(°C)

TwarnL TwarnH

5. Truth table for the THDN block
Driver IC Temp.
Driver Chip Status
< 150°C
Enable (GL, GH = "Active")
> 150°C
Shutdown (GL, GH = "L")
(latch-off)

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 2 of 15

R2J20656ANP

Preliminary

VIN

VSWH

CGND

BOOT

VDRV

VCIN

ZCD_EN#

Pin Arrangement

VIN

PWM

VIN

DISBL#

VIN

THWN

VIN

CGND

VSWH

PGND

VSWH

PGND

VSWH

PGND

VSWH

PGND

VSWH

PGND

VSWH

VIN

CGND

VSWH

PGND

VSWH

PGND

21 22 23 24 25 26 27 28 29 30

(Top view)

Note:

All die-pads (three pads in total) should be soldered to PCB.

Pin Description
Pin Name
ZCD_EN#

Pin No.

Description
Zero current detection enable

VCIN
VDRV
BOOT
CGND
GH
VIN
VSWH
PGND
GL
THWN

2
3
4
5, 37, Pad
6
8 to 14, Pad
7, 15, 29 to 35, Pad
16 to 28
36
38

Control input voltage (+5 V input)
Gate supply voltage (+5 V input)
Bootstrap voltage pin
Control signal ground
High-side gate signal
Input voltage
Phase output/Switch output
Power ground
Low-side gate signal
Thermal warning

DISBL#

Signal disable

PWM

PWM drive logic input

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Remarks
When asserted "L" signal, zero crossing
detection is enabled
Driver Vcc input
5 V gate drive
To be supplied +5 V through internal switch
Should be connected to PGND externally
Pin for monitor

Pin for monitor
Thermal warning when over 115°C
Disabled when DISBL# is "L".
This Pin is pulled low when internal IC over the
thermal shutdown level, 150°C.
5 V logic input

Page 3 of 15

R2J20656ANP

Preliminary

Absolute Maximum Ratings
(Ta = 25°C)
Item
Power dissipation
Average output current
Input voltage
Supply voltage & Drive voltage
Switch node voltage
BOOT voltage
I/O voltage
THWN/THDN current
Operating junction temperature
Storage temperature
Notes: 1.
2.
3.
4.
5.

Symbol
Pt(25)
Pt(110)
Iout
VIN(DC)
VIN(AC)
VCIN & VDRV
VSWH(DC)
VSWH(AC)
VBOOT(DC)
VBOOT(AC)

Rating
25
8
35
–0.3 to +27
30
–0.3 to +6
27
30
32
36

Units
W

Vpwm, Vdisble,
Vlsdbl, Vthwn
Ithwn, Ithdn
Tj-opr
Tstg

–0.3 to VCIN + 0.3

0 to 1.0
–40 to +150
–55 to +150

mA
°C
°C

A
V
V
V
V

Note
1

2
2, 4
2
2
2, 4
2
2, 4
2, 5

Pt(25) represents a PCB temperature of 25°C, and Pt(110) represents 110C.
Rated voltages are relative to voltages on the CGND and PGND pins.
For rated current, (+) indicates inflow.
The specification values indicated "AC" are limited within 10 ns.
VCIN + 0.3 V < 6 V

Safe Operating Area

Average Output Current (A)

45
40
35
30
25
20
VOUT = 1.3 V
VIN = 12 V
VCIN = 5 V
L = 0.45 μH
Fsw = 1 MHz

15
10
5
0

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

75
100
125
PCB Temperature (°C)

150

175

Page 4 of 15

R2J20656ANP

Preliminary

Recommended Operating Condition
Item
Input voltage
Supply voltage & Drive voltage

Symbol
VIN
VCIN & VDRV

Rating
4.5 to 22
4.5 to 5.5

Units
V
V

Note

Electrical Characteristics
(Ta = 25°C, VCIN = 5 V, VDRV = 5 V, VSWH = 0 V, unless otherwise specified)
Supply

PWM
input

DISBL#
input

ZCD_EN#

Thermal
warning

Thermal
shutdown
Note:

Item
VCIN start threshold
VCIN shutdown threshold
UVLO hysteresis
VCIN operating current

Symbol
VH
VL
dUVL
ICIN

Min
4.1
3.6
—
—

Typ
4.3
3.8
0.5
49

Max
4.5
4.0
—
—

Units
V
V
V
mA

VCIN disable current

ICIN-DISBL

—

150

A

PWM input high level

VH-PWM

4.0

—

PWM input low level
PWM input resistance

VL-PWM
RIN-PWM

—
6.5

—
12.5

0.8
25

V
k

1.5
—
2.0
—
—
0.2
2.0
—
–52
100
—
0.2
—
130

—
150
—
—
2.0
0.5
—
—
–25
115
15
0.5
—
150

3.2
—
—
0.8
5.0
1.0
—
0.8
–12
130
—
1.0
1.0
—

V
ns
V
V
A
k
V
V
A
°C
°C
k
A
°C

PWM input tri-state range

VIN-tri

Shutdown hold-off time
Enable level
Disable level
Input current
THDN on resistance
ZCD disable level
ZCD enable level
Input current
Warning temperature
Temperature hysteresis
THWN on resistance

tHOLD-OFF *
VENBL
VDISBL
IDISBL
1
RTHDN *
Vzcddisbl
Vzcden
Izcden
TTHWN *1
THYS *1
RTHWN *1

THWN leakage current
Shutdown temperature

ILEAK
1
Tstdn *

Test Conditions

VH – VL
fPWM = 1 MHz,
Ton_pwm = 120 ns
DISBL# = 0 V,
PWM = ZCD_EN# = Open
5.0 V PWM interface
PWM = 1 V
5.0 V PWM interface

DISBL# = 1 V
DISBL# = 0.2 V

ZCD_EN# = 1 V
Driver IC temperature
THWN = 0.2 V
THWN = 5 V
Driver IC temperature

1. Reference values for design. Not 100% tested in production.

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 5 of 15

R2J20656ANP

Preliminary

Typical Application
4.5 to 22 V
+5 V

VCIN

VDRV BOOT

THWN
DISBL#

GH
VIN

R2J20656
ANP

VSWH

ZCD_EN#
PGND
PWM
CGND

VCIN

VDRV BOOT

THWN
DISBL#

GH
VIN

R2J20656
ANP

VSWH

ZCD_EN#
PGND
PWM
CGND

PWM1

+1.3 V

PWM
Control
Circuit

PWM2

PWM3
VDRV BOOT

VCIN

PWM4
VIN

THWN
DISBL#

R2J20656
ANP

VSWH
Power GND

ZCD_EN#

Signal GND

PGND
PWM
CGND

VDRV BOOT

VCIN

VIN

THWN
DISBL#

R2J20656
ANP

VSWH

ZCD_EN#
PGND
PWM
CGND

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 6 of 15

R2J20656ANP

Preliminary

Pin Connection
+5 V

0.1 μF
0 to 10 Ω

1.0 μF

VIN
(4.5 to 22 V)

CGND
ZCD_EN#able Signal INPUT

VDRV

VCIN

ZCD_EN#

VIN
PAD

CGND
PAD

14 VIN
15 VSWH
16 PGND

18
19
20

PWM

PWM INPUT

DISBL#
THWN
10 kΩ

CGND 37

R2J20656ANP

+5 V

GL 36
VSWH 35

10 kΩ
+5 V

VSWH
PAD

PGND

VSWH

PGND

BOOT

CGND

10 μF × 4

VSWH

VIN

CGND

21 22 23 24 25 26 27 28 29 30

Thermal Shutdown

32
31

Thermal Warning
0.45 μH
Vout

PGND

Power GND

Signal GND

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

PGND

Page 7 of 15

R2J20656ANP

Preliminary

Test Circuit
Vinput

IIN
V VIN

Vcont

ICIN
VCIN V
VCIN

BOOT

DISBL#

VIN

R2J20656ANP
VDRV

VSWH

ZCD_EN#

5 V pulse

PWM
CGND

Note: PIN = IIN × VIN + ICIN × VCIN
POUT = IO × VO
Efficiency = POUT / PIN
PLOSS(DrMOS) = PIN – POUT
Ta = 27°C

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

PGND
GH

Electric
load

Average Output Voltage
Averaging
V
VO
circuit

Page 8 of 15

R2J20656ANP

Preliminary

Typical Data
Power Loss vs. Output Current

Power Loss vs. Input Voltage

1.7
VCIN = VDRV = 5 V

VIN = 12 V

8 VCIN = VDRV = 5 V

1.6 VOUT = 1.3 V
fPWM = 600 kHz

VOUT = 1.3 V

Normalized Power Loss
@ VIN = 12 V

Power Loss (W)

7 fPWM = 600 kHz
L = 0.45 μH

6
5
4
3
2
1
0

1.5 L = 0.45 μH

IOUT = 25 A

1.4
1.3
1.2
1.1
1.0
0.9

0.8

Output Current (A)

Input Voltage (V)

Power Loss vs. Switching Frequency

Power Loss vs. Output Voltage
1.7

1.7
VIN = 12 V

VIN = 12 V

1.6 VCIN = VDRV = 5 V

1.6 VCIN = VDRV = 5 V
VOUT = 1.3 V

1.5 L = 0.45 μH

IOUT = 25 A

1.4
1.3
1.2
1.1
1.0

Normalized Power Loss
@ fPWM = 600 kHz

fPWM = 600 kHz

Normalized Power Loss
@ VOUT = 1.3 V

1.5 L = 0.45 μH
IOUT = 25 A

1.4
1.3
1.2
1.1
1.0

0.9

0.8
0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4

0.8
250

Output Voltage (V)

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

500

750

1000

1250

Switching Frequency (kHz)

Page 9 of 15

R2J20656ANP

Preliminary
Power Loss vs. Output Inductance

Power Loss vs. VCIN

1.7

1.7
VIN = 12 V

VIN = 12 V

1.6 VCIN = VDRV = 5 V

1.6 VOUT = 1.3 V
fPWM = 600 kHz

Normalized Power Loss
@ VCIN = VDRV = 5 V

Normalized Power Loss
@ L = 0.45 μH

VOUT = 1.3 V

1.5 fPWM = 600 kHz
IOUT = 25 A

1.4
1.3
1.2
1.1
1.0

1.5 L = 0.45 μH

IOUT = 25 A

1.4
1.3
1.2
1.1
1.0

0.9

0.8
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

0.8
4.5

Output Inductance (μH)

5.0

5.5

6.0

VCIN = VDRV (V)

Average ICIN vs. Switching Frequency
70

Average ICIN (mA)

VIN = 12 V
VCIN = VDRV = 5 V
VOUT = 1.3 V
L = 0.45 μH
IOUT = 0 A

50
40
30
20
10
250

500

750

1000

1250

Switching Frequency (kHz)

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 10 of 15

R2J20656ANP

Preliminary

Description of Operation
The DrMOS multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a
single QFN package. Since the parasitic inductance between each chip is extremely small, the module is highly suitable
for use in buck converters to be operated at high frequencies. The control timing between the high-side MOS FET, lowside MOS FET, and driver is optimized so that high efficiency can be obtained at low output-voltage.

VCIN & DISBL#
The VCIN pin is connected to the UVL (under-voltage lockout) module, so that the driver is disabled as long as VCIN
is 4.3 V or less. On cancellation of UVL, the driver remains enabled until the UVL input is driven to 3.8 V or less. The
signal on pin DISBL# also enables or disables the circuit.
Voltages from –0.3 V to VCIN can be applied to the DISBL# pin, so on/off control by a logic IC or the use of a resistor,
etc., to pull the DISBL# line up to VCIN are both possible.
VCIN
L
H
H
H

DISBL#

L
H
Open

Driver State
Disable (GL, GH = L)
Disable (GL, GH = L)
Active
Disable (GL, GH = L)

The pulled-down MOS FET, which is turned on when internal IC temperature becomes over thermal shutdown level, is
connected to the DISBL# pin. The detailed function is described in THDN section.

PWM & ZCD_EN#
The PWM pin is the signal input pin for the driver chip. The input-voltage range is –0.3 V to (VCIN + 0.3 V). When the
PWM input is high, the gate of the high-side MOS FET (GH) is high and the gate of the low-side MOS FET (GL) is
low.
PWM
L
H

GH
L
H

GL
H
L

The ZCD_EN# pin is the Zero Current Detection Operation Enable pin for "Diode Emulation Mode (DEM)" when
ZCD_EN# is low. This function improves light load efficiency by preventing negative inductor current from output
capacitor. Driver IC monitors inductor current and when inductor current crosses zero, driver IC turn off Low side MOS
FET automatically.
Figure 1.1 shows the Typical high side and low side gate switching and Inductor current (IL) during Continuous
Conduction Mode (CCM), and figure 1.2 shows DEM when asserting Zero Current Detection Enable signal.
ZCD_EN# pin is internally pulled up to VCIN with 160 k resistor. When Zero current detection function is not used,
keep this pin open or pulled up to VCIN.
CCM Operation (ZCD_EN# = "H" or Open mode)
IL
PWM
GH
GL

Figure 1.1 Typical Signals during CCM

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 11 of 15

R2J20656ANP

Preliminary

DEM Operation (ZCD_EN# = "L" in Light load condition)
IL

PWM
GH
GL

Figure 1.2 Typical Signals during DEM
The PWM input is TTL level and has hysteresis. When the signal route from the control IC is high impedance, the tristate function turns off the high- and low-side MOS FETs. This function operates when the PWM input signal stays in
the input hysteresis window for 150 ns (typ.). After the tri-state mode has been entered and GH and GL have become
low, a PWM input voltage of 4.0 V or more is required to make the circuit return to normal operation.
150 ns (tHOLD-OFF)

150 ns (tHOLD-OFF)

3.2 V

PWM 1.5 V

150 ns (tHOLD-OFF)

3.2 V

PWM 1.5 V

Figure 2 PWM Shutdown-Hold Time Signal

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 12 of 15

R2J20656ANP

Preliminary

The equivalent circuit for the PWM-pin input is shown in the next figure. M1 is in the ON state during normal
operation; after the PWM input signal has stayed in the hysteresis window for 150 ns (typ.) and the tri-state detection
signal has been driven high, the transistor M1 is turned off.
When VCIN is powered up, M1 is started in the OFF state regardless of PWM Low or Open state. After PWM is
asserted high signal, M1 becomes ON and shifts to normal operation.
VCIN
M1
14.5 k
PWM Pin

Tri-state
detection signal

Input
Logic

To internal control
12.5 k

Figure 3 Equivalent Circuit for the PWM-pin Input

THWN & THDN
This device has two level thermal detection, one is thermal warning and the other is thermal shutdown function.
This Thermal Warning feature is the indication of the high temperature status.
THWN is an open drain logic output signal and need to connect a pull-up resistor (ex.51 k) to THWN for Systems
with the thermal warning implementation.
When the chip temperature of the internal driver IC becomes over 115°C, Thermal warning function operates.
This signal is only indication for the system controller and does not disable DrMOS operation.
When thermal warning function is not used, keep this pin open.

"H"
THWN output
Logic Level
"L"

Thermal
warning

Normal
operating

100

115

TIC (°C)

Figure 4 THWN Trigger Temperature

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 13 of 15

R2J20656ANP

Preliminary

THDN is an internal thermal shutdown signal when driver IC becomes over 150°C.
This function makes High Side MOS FET and Low Side MOS FET turn off for the device protection from abnormal
high temperature situation and at the same time DISBL# pin is pulled low internally to give notice to the system
controller. Once thermal shutdown function operates, driver IC keeps DISBL# pin pulled low until VCIN becomes
under UVL level (3.8 V).
Figure 5 shows the example of two types of DISBL# connection with the system controller signal.
Driver IC Temp.
< 150°C
> 150°C

Driver Chip Status
Enable (GL, GH = "Active")
Shutdown (GL, GH = "L")

5V
To Internal
Logic

10 k
DISBL#
2 μA

To shutdown signal

To Internal
Logic

10 k DISBL#
2 μA

Thermal
Shutdown
Detection

Figure 5.1 THDN Signal to the System Controller

ON/OFF signal

Thermal
Shutdown
Detection

Figure 5.2 ON/OFF Signal from the System Controller

MOS FET
The MOS FETs incorporated in R2J20656ANP are highly suitable for synchronous-rectification buck conversion. For
the high-side MOS FET, the drain is connected to the VIN pin and the source is connected to the VSWH pin. For the
low-side MOS FET, the drain is connected to the VSWH pin and the source is connected to the PGND pin.

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Page 14 of 15

R2J20656ANP

Preliminary

Package Dimensions
JEITA Package Code
P-HVQFN40-p-0606-0.50

RENESAS Code
PVQN0040KE-A

Previous Code
—

MASS[Typ.]
—

.1
39
)

HE
E

1pin
40

2.2
C0.3

1.95

E /2

INDEX

1.95

4-C0.50

1pin

2.2

D /2

2.2

HD/2

0.2
0.2

HD
D

0.7
0.2
Reference
Symbol

2.05

X4
f S AB

20°

S AB

y1 S

A
A2
0.69

20°

2.05

t S AB

1.95

2.2

HE/2

CAV No.
Die No.

1.95

2-A section

y S

Dimension in Millimeters

Min Nom Max
D
5.95 6.00 6.05
5.95 6.00 6.05
E
A2 0.87 0.89 0.91
f
—
— 0.20
A 0.865 0.91 0.95
A1 0.005 0.02 0.04
b
0.17 0.22 0.27
b1 0.16 0.20 0.24
— 0.50 —
e
Lp 0.40 0.50 0.60
x
—
— 0.05
y
—
— 0.05
y1
—
— 0.20
t
—
— 0.20
HD 6.15 6.20 6.25
HE 6.15 6.20 6.25
ZD
— 0.75 —
ZE
— 0.75 —
L1 0.06 0.10 0.14
c1 0.17 0.20 0.23
c2 0.17 0.22 0.27

Ordering Information
Part Name
R2J20656ANP#G0

R07DS0201EJ0100 Rev.1.00
Jan 25, 2011

Quantity
2500 pcs

Shipping Container
Taping Reel

Page 15 of 15

Notice
1.

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Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to
be disclosed by Renesas Electronics such as that disclosed through our website.

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others.

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assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.

depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas
Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for
which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the
use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics.
The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc.
"Standard":

Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools;
personal electronic equipment; and industrial robots.

"High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically
designed for life support.
"Specific":

Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical
implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.

You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage
range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the
use of Renesas Electronics products beyond such specified ranges.

Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and
malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the
possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to
redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult,
please evaluate the safety of the final products or system manufactured by you.

10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics
products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes
no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.
11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries.
(Note 1)

"Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries.

(Note 2)

"Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.

http://www.renesas.com

SALES OFFICES
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc.
2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A.
Tel: +1-408-588-6000, Fax: +1-408-588-6130
Renesas Electronics Canada Limited
1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada
Tel: +1-905-898-5441, Fax: +1-905-898-3220
Renesas Electronics Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K
Tel: +44-1628-585-100, Fax: +44-1628-585-900
Renesas Electronics Europe GmbH
Arcadiastrasse 10, 40472 Düsseldorf, Germany
Tel: +49-211-65030, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd.
7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China
Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd.
Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China
Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898
Renesas Electronics Hong Kong Limited
Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong
Tel: +852-2886-9318, Fax: +852 2886-9022/9044
Renesas Electronics Taiwan Co., Ltd.
7F, No. 363 Fu Shing North Road Taipei, Taiwan
Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd.
1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632
Tel: +65-6213-0200, Fax: +65-6278-8001
Renesas Electronics Malaysia Sdn.Bhd.
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics Korea Co., Ltd.
11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea
Tel: +82-2-558-3737, Fax: +82-2-558-5141

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