Samsung Canterbury Springfield Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Samsung Canterbury Springfield - Schematics. Free.

Open the PDF directly: View PDF .
Page Count: 45

Download
Open PDF In Browser	View PDF

8-1
1

2

3

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

Table of Contents

D

Model Name
PCB Part No

B

Dev. Step
Revision
T.R. Date
DRAW

: CANTERBURY
SPRINGFIELD
: BA41-01122A
BA41-01123A
BA41-01124A
BA41-01125A

(GCE)
(NY)
(HST)
(TRI)

: PR1
: 1.0
: 2009.07.13
CHECK

COVER
OPERATION BLOCK DIAGRAM
POWER SEQUENCE
CLOCK DISTRIBUTION
BOARD INFORMATION
CLOCK GENERATOR (CK-505M)
DIAMONDVILLE (N270)
THERMAL MONITOR
CALISTOGA (INTEL945GSE)
DDR2 ON BOARD
DDR2 TERMINATION
DDR2 SODIMM
ICH7-M
BIOS CODE
LCD(LVDS) CONN.
CRT CONN.
HDD CONNECTOR (SATA)
MICOM
LAN (GIGABIT)
USB
MINI-CARD (Wireless)
CARDBUS CONTROLLER (AU6371)
3IN1 SUB
AUDIO CODEC (ALC262-GR)
AMP & SPEAKER & MIC
KBD CONN & DEBUG PORT
CHARGER
P3.3V_AUX & P5V_AUX
DDR2 POWER
CHIPSET POWER (P 1.05V & P 1.5V)
CPU VRM POWER (VCC_CORE)
SWITCHED POWER
POWER DISCHARGER
LED FPC CONNECTOR POWER S/W
TRANSMITTER
MOUNT HOLE
TEST POINTS

g
n
l
u
a
i
s
t
m
n
a
e
S fid
n
o
C

: INTEL DIAMONDVILLE
CPU
Chip Set : INTEL 945GSE
Remarks :

C

Page. 1
Page. 2
Page. 3
Page. 4
Page. 5
Page. 6
Page. 7~8
Page. 9
Page. 10~13
Page. 14~15
Page. 16
Page. 17
Page. 18~21
Page. 22
Page. 23
Page. 24
Page. 25
Page. 26
Page. 27~29
Page. 30
Page. 31
Page. 32~33
Page. 34
Page. 35
Page. 36
Page. 37
Page. 38
Page. 39
Page. 40
Page. 41
Page. 42
Page. 43
Page. 44
Page. 45
Page. 46
Page. 47
Page. 49~50

APPROVAL

C

B

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

CANTERBURY
SPRINGFIELD

D

2

3

1

OPERATION BLOCK DIAGRAM
437 uFCBGA Type

CPU

DIAMONDVILLE

TFT_LCD
10.1" WIDE

LVDS

CRT

EMC2102

Page8(block)

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

Page26

Page8(block)

CPU2_THERMDA/DC

Page11~12

VGA

533MHz FSB

998 uFCBGA Type

GMCH

945GSE

Page8(block)

533 MHz

200P

DDR2-SODIMM
MAX 1 GB
Page9(block)

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

Page 13~16

C

P3

P0

P4

P5

HDD
2.5inch

SATA

652 FCBGA Type

P7

ICH

USB2.0

P1

ICH7-M
82801 GBM
Page 17~20

High Definition Audio
B

Aud.

AMP

PCI_ EXP1

PCI_ EXP

HDAUDIO

Audio

RTC
Batt.

ALC272

Page 22~25

P2

P6

PCI_ EXP2

option

2P

Page

2P 2P

SPKR

R

SPKR

L

PCI_ EXP3

Power S/W

LPC

MICOM
H8S-2110B

Module

USB (1):debug port
USB (2)

LAN CONTROLLER
88E8040

1.3M Camera

CardBus

3in1 B’d

AU6371

MINI CARD1

Wireless LAN

Page9(block)

MINI CARD2

B

SIMM Card

HSDPA/Wibro
Page9(block)
Page 21

LAN
Transformer

SYNAPTICS

P/S2

TOUCHPAD

A

SAMSUNG

Space bar

ELECTRONICS

KEYBOARD

4

C

USB (3)

SPI

SPI ROM

HP
MIC-IN

option
Bluetooth

3

2

1

8-2

CLOCK
GENERATOR
CK-505

D

THERMAL
MONITOR

RJ45

D

A

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-3
4

BOARD INFORMATION

SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
PCI Devices
Devices

IDSEL#

USB
Hub to PCI
LPC Bridge/IDE/AC97/SMBUS
Internal MAC

AD29(internal)
AD30(internal)
AD31(internal)
AD24(internal)

REQ/GNT#

Programable

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

Devices

Address

ICH7M
CK-505M (Clock Generator)
SODIMM0
CPU Thermal Sensor

Master
1101 001X
1010 000X
0111 101X

ASSIGNED TO
USB PORT
3-IN-1
Wireless LAN
BLUETOOTH

B

PCI Express Assign
Port Number
1
2
3

ASSIGNED TO
Mini Card 1(Wireless LAN)
Mini Card 2 (HSDPA/Wibro)
LOM

Power Rail
PRTC_BAT
VDC
P1.05V(VCCP)
P3.3V_MICOM
P1.5V
P1.8V_AUX
P0.9V
P5V_AUX
P3.3V_AUX
P5V
P3.3V
CPU_CORE

Bus

D2h
A0h
7Ah

SMBUS Master
Clock, Unused Clock Output Disable
Thermal Sensor

Port Number
4
UHCI_2
5
6
UHCI_3 7

Descriptions
3.3V (can drop to 2.0V min. in G3 state) supply for the RTC well.
Primary DC system power supply (9 to 19V)
VTT for CPU, Calistoga & ICH7-M
3.3V always power rail(for Micom)
1.5V switched power rail (off in S3-S5)
1.8V power rail for DDR (off in S4-S5)
0.9V power rail for DDR (off in S4-S5)
5.0V power rail (off in S4-S5)
3.3V power rail (off in S4-S5)
5.0V switched power rail (off in S3-S5)
3.3V switched power rail (off in S3-S5)
Core voltage for Atom CPU

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

Hex

USB PORT Assign
Port Number
0
UHCI_0
1
2
UHCI_1 3

D

Voltage Rails

Interrupts

I2C / SMB Address
C

1

C

ASSIGNED TO
USB PORT
USB PORT
HSDPA
CAMERA

B

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

D

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

2

3

1

POWER DIAGRAM
(CHP3_SLPS3*)

AC Adapter
P1.05V

VDC

C

DIAMONDVILLE
CALISTOGA
ICH7-M

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

P3.3V_MICOM

P1.8V_AUX

SODIMM (DDR III)
CALISTOGA

P0.9V

DDR II-Termination

P5.0V

P5V_AUX

VCCP3_PWRGD

ICH7-M
USB
CRT
MICOM

CPU_CORE

D

DIAMONDVILLE

C

HDD
M_PCI
FAN CIRCUIT
AUX DISPLAY

MICOM

P1.5V

CRESTLINE
ICH8-M

P3.3V

Thermal Sensor
ICH7-M
SPI
LCD
M_PCI

P2.5V

ICH7-M

P3.3V_AUX

ICH7-M LAN
MDC
BT

P5.0V_ALW

B

P1.2V_LAN

P12.0V_ALW

MICOM
SODIMM
PCMCIA
LEDs

B

LAN

P1.8V_LAN
P2.5V_LAN

Power On/Off Table by S-state
Rail
S0

S3

S4

S5

ON

ON

ON

ON

+V*LAN

ON

ON

+1.8V_AUX
+0.9V

ON

ON

+V*AUX

ON

ON

+V

ON

+V* (CORE)

ON

State
+V*A(LWS)

A

LAN

S5-S4

S3

S0
A

SAMSUNG
ELECTRONICS

4

3

2

1

8-4

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

Battery DC

Rev 0.1

KBC3_PWRON

KBC3_SUSPWR
(CHP3_S4_STATE*)

D

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-5
4

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1

POWER RAILS ANALYSIS

220V

Rev. 0.6 (060920)

Adapter

Battery

MICOM 3V ( TBD A )

1.05V
CPU CORE
1.05V (VCCP)
1.5V

3.3V
1.8V_AUX

2.2 A
2.5 A
0.13 A

ITP

Diamondville
( 2.5 W )

3.3V

3.72 A
0.14 A
0.78 A

Calistoga
GMCH
(4 W )

0.16 A

3.3V

3.3V

1.05V
1.5V
3.3V
3.3V_AUX
5V
5V_AUX
RTC_Battery
1.8V_AUX

1.8V_AUX
0.9V

B

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
0.1 A (TBD)

0.95 A
1.6A
0.421 A
0.209 A (TBD)
0.001 A (TBD)
0.001 A (TBD)
0.006 A (TBD)

3.3V (LCD 3V)

P5.0V_LED (VDC INV)

0.08 A (TBD)
0.29 A (TBD)
0.15 A (TBD)

Thermal
Sensor

MICOM 3V
3.3V

0.08 A (TBD)
0.08 A (TBD)

0.1 A (TBD)

KBC
PWR LED

CLOCK

0.2 A (TBD)

KeyBoard

3.3V_AUX

0.01 A (TBD)

KBD LED

3.3V_AUX

3.3V

( 1.5 W )

3.3V

0.015 A (TBD)

3.3V
5V

0.06 A (TBD)
0.07 A (TBD)

HD Audio

0.22 A (TBD)

SATA HDD

C

0.6 A (TBD)

LAN

0.1 A (TBD)

SD Card

1.5 A (TBD)
0.5 A (TBD)
0.75A (TBD)

Mini Card X 2

SPI

1.5A

DDR-2

3.1 A (TBD)
1 A (TBD)

5V

3.3V
3.3V_AUX
1.5V

B

( ~ 5.0 W )

LCD

0.35 A
0.6 A

5V

5V

LAN (88E8057)

0.25 A (TBD)

ICH7-M

5V

P3.3V_AUX
P1.2V_LAN
P1.8V/2.5V_LAN

0.75 A (TBD)

MICOM 3V

1.05V (MCH CORE)
2.5V
1.5V

VDC INV ( TBD A )
PEX IO (TBD A)
VGA CORE (TBD A)
RTC_Battery

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

CPU CORE ( TBD A )
1.05V ( TBD A )
1.5V ( TBD A )
2.5V ( TBD A )
3.3V ( TBD A )
5.0V ( TBD A )
1.8V_AUX ( TBD A )
0.9V( TBD A )

C

D

5V

0.16 A (TBD)

1.5 A (TBD)

2 A (TBD)

0.2 A (TBD)

FAN

Audio AMP
USB (x 3)

Touch Pad

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

5.0V_AUX ( TBD A )

3.3V_AUX ( TBD A )

D

2

3

1

POWER SEQUENCE BLOCK DIAGRAM
CLOCK
CHIP

PAGE 18

1-0) PRTC_BAT
D
P5V_AUX & P3V_AUX

2-0) VDC

4-0) KBC3_SUSPWR

PAGE 39

3-0) KBC3_CHKPWRSW*

D

1-1) CHP3_RTCRST

15-0) KBC3_VRON

18-0) VRM3_CPU_PWRGD

16-0) VCCP_PWRGD

17-1) VCC_CORE

CPU VRM
SC454

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
VRMPWRGD

LAN_RESET*

22-0) PLT3_RST*
23-0) KBC3_CPURST*

25-0) INIT#

24-0) A20M#/IGNNE#/INTR/NMI

24-0) A20M#/IGNNE#/INTR/NMI

21-0) CPU1_PWRGDCPU

21-0) CPU1_PWRGDCPU
15-2) VCCP

ICH7-M

12-0) KBC3_PWRBTN*
8-1) P3.3V_AUX

14-2) P1.5V

22-0) PLT3_RST*

RCIN*

12-1) CHP3_SLPS5*/S3*

25-0) INIT#

C

14-1) P3.3V

15-1) P2.5V

15-1) P2.5V

15-0) KBC3_PWRON

CPU
26-0) CPU BIST

14-2) P1.5V

14-2) P1.5V

23-0) PLT3_RST*

15-0) KBC3_VRON

P1.5V_AUX & VCCP

Thermal
Monitor

PAGE 26

SC415

PAGE 9

4-0) KBC3_SUSPWR
4-1) P3.3V_LAN
B

P5V_AUX & P3V_AUX

TPS51120
(2)

8-3) P1.5V

14-3) P0.9V

15-2) VCCP

15-2) VCCP

GMCH

16-0) VCCP_PWRGD

PAGE 41

5-1)P5V_AUX

DDR2 POWER

2-1) P5.0V_ALW

SC486

PAGE 40

8-2) P1.8V_AUX

8-2) P1.8V_AUX

13-1) P0.9V

14-3) P0.9V

13-1) MEM_VREF

13-1) MEM_VREF

DDR2
Memory

B

PAGE 40

6-1) P5V_AUX

14-0) KBC3_PWRON
5-1) P3.3V_AUX

4-1) P3.3V_AUX

14-0) KBC3_PWRON

4-3) P1.2V_LAN

88E8057

BCP69-16
PAGE 28
GIGABIT TRANSFORMER

PAGE 27

4-2) P1.8V_P2.5V_LAN

LFE9261

SI3433

SI3433

14-1)P5V

22-0) PLT3_RST#
14-2) P3.3V
14-2) P1.5V

PAGE 44

MINI PCIE
Devices

14-2) P3.3V

AUDIO
AMP

14-1)P5V

PAGE 44

5-1) P3.3V_AUX

15-0) KBC3_PWRON
15-2) 1.5V_PWRGD

MIC5219

PAGE 44

15-1) P2.5V

14-2) P5.0V

HDD

PAGE 29

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-6

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

PAGE 6

PAGE 43

20-0) KBC3_CPUPWRGD_D
19-0) VRM3_CPU_PWRGD

KBC

18-0) VRM3_CPU_PWRGD

19-0) VRM3_CPU_PWRGD

TPS51120
Battery Mode
5-0) AUX5_PWRGD
(1)

4-2) P3.3_AUX

PAGE 44

C

VDC
11.1V

RTC
Battery

23-0) CPU1_CPURST*

2-1) MICOM_P3V

POWER
S/W

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-7
4

1205-002574

CLOCK DISTRIBUTION
133 MHz

CK-505M
IDTCV179BNLG

CLOCK GENERATOR

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

CPU

96 MHz

133 MHz

CLK1_PCIEICH
CLK1_PCIEICH#

133 MHz

B

CLK0_HCLK0
CLK0_HCLK0#
CLK0_HCLK1
CLK0_HCLK1#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_DREFCLK
CLK1_DREFCLK#

133 MHz
133 MHz

C

CLK3_SMBCLK

D

CLK1_MCLK0/0#

SODIMM

CLK1_MCLK1/1#

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
GMCH

100 MHz

CLK3_USB48
CLK1_SATA
CLK1_SATA#

100 MHz

CLK1_MINIPCIE
CLK1_MINIPCIE#

100 MHz

CLK1_MIN3PCIE
CLK1_MIN3PCIE#

533 MHz

HDA3_AUD_BCLK
12.288 MHz

33 MHz
CLK3_PCLKICH
14.318 MHz CLK3_ICH14

33 MHz

ICH

SMB3_CLK

AUDIO CODEC
C

RTC Clock
32.786KHz

RTC Clock
12 MHz

AU6371

MINI PCIE(WLAN)
MINI PCIE(HSDPA)

CLK3_PCLKMICOM

KBC5_TCLK

32.768KHz

A

1

KBC

100 MHz
100 MHz

CLK1_PCIELOM
CLK1_PCIELOM#

33 MHz

CLK3_PCLKCB

CARDBUS
CONTROLLER

33 MHz

CLK3_PCLKMIN

MINIPCI

KBC3_SMCLK

B

TOUCHPAD

BATTERY

88E8057

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

D

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

2

3

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

THERMAL SENSOR & FAN CONTROL

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

100nF
10V

C

1
16
19
9

P3.3V_AUX
R78

10K

17
18
20

FAN5_VDD
FAN3_FDBACK#

10

THM3_SHDN_SEL_MN
THM3_TRIP_SET_MN

0

R77

nostuff

R76

2.49K
1%

Check if PU is doubled to Micom Side.

THM3_VDD_3V_MN

100nF
10V

1%

6
7

U8
EMC2112-BP-TR
VDD_3V
VDD_5V_1
VDD_5V_2
RESET#

SMDATA
SMCLK

ALERT#
SYS_SHDN#
DN1
DP1

FAN_1
FAN_2
TACH

DP3_DN2
DN3_DP2

14
15

THM3_ALERT#
THM3_STP#

2
3

C54

2.2nF

4 THM3_THERMDN_MN
5 THM3_THERMDP_MN

ADDR_SEL
SHDN_SEL
TRIP_SET

C

KBC3_THERM_SMDATA
KBC3_THERM_SMCLK

12
8

CPU2_THERMDC

50V

CPU2_THERMDA

10mil width and 10mil spacing.
For Intel 45nm(From penryn)

2

CLK

GND
THERMAL_PAD

C55

11

2.2nF
50V

13
21

1

3

MMBT3904
Q8

Opposite side of CPU.

1209-001887

TRIP_SET 1500 : 95 degree
SMBUS Address 7Ah

B

B

P3.3V

Line Width = 20 mil

SHDN_SEL MODE
0
HIGH Z
1

INTEL TR MODE

FAN5_VDD

AMD CPU/DIODE MODE
EXT.DIODE 2 MODE

FAN3_FDBACK#

10000nF-X5R
6.3V

0
HIGH Z

A

1

10K
1%

J505
HDR-4P-1R-SMD

8-C3
8-C3

C73

ADDRESSS_SEL MODE

R79

5
6

1
2
3
4
MNT1
MNT2

M1
HEAD
DIA
LENGTH

BA61-01090A

3711-000456

M2
HEAD
DIA
LENGTH

BA61-01090A

To support heatsink

0101 111xb
0111 101xb (7A)
0101 110xb

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-8

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

10000nF-X5R
6.3V

C56

10K 1%

49.9
1%

C53

R75

R80

C74

D

P3.3V_AUX

P3.3V

P3.3V_AUX

10K 1%
10K 1%
10K 1%

P5.0V

R73
R74
R72

D

8-9
4

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1

DIAMONDVILLE (N270)

D D

D
P1.05V

R138R150
1K
nostuff
nostuff

CPU1_ADSTB1#

B

1K

R177
R175
R176
R174

1K
1K
1K
1K

U18
T16
J4
R16
T15
R15
U17

CPU1_A20M#
CPU1_FERR#
CPU1_IGNNE#
CPU1_STPCLK#
CPU1_INTR
CPU1_NMI
CPU1_SMI#

D6
G6
H6
K4
K5
M15
L16

NC1
NC2
NC3
NC4
NC5
NC6
NC7
0902-002366

LOCK#

HIT#
HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
BR1#
PROCHOT#
THRMDA
THRMDC
THERMTRIP#
BCLK0
BCLK1

T21
T19
Y18
T20

TP18068

F16
V16

R136

CPU1_BREQ#

1K

1%

CPU1_INIT#

W20

CPU1_LOCK#

D15
W18
Y17
U20
W19

CPU1_CPURST#
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_TRDY#
CPU1_DSTBN0#
CPU1_HIT# CPU1_DSTBP0#
CPU1_HITM# CPU1_DBI0#

AA17
V20

K17
J18
H15
J15
K18
J16
M17
N16
M16
L17
K16
V15
G17
E4
E5

CPU1_D#(31:16)

Near the CPU

P1.05V

R152
R157
R151

54.9
54.9
54.9

1%
1%
1%

R154
R156

54.9
54.9

1%
1%

R173

0

P1.05V

CPU2_THERMDA
CPU2_THERMDC

H17

CPU1_THRMTRIP#

V11
V12

CLK0_HCLK0
CLK0_HCLK0#

RSVD3
RSVD2
RSVD1

C21
C1
A3

R155

56.2

ITP3_DBRRESET#

nostuff

1%

1%

2K
1%

C157

100nF
10V

1K
1%

2K
1%

C127
100nF
10V

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

1K

R148

R149

USE PROCHOT*
56ohm --> 68ohm

P1.05V
CPU1_DSTBN1#
CPU1_DSTBP1#
R170CPU1_DBI1#

R169

P1.05V

NC

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

CPU1_DEFER#
CPU1_DRDY#
CPU1_DBSY#

CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2

R134
R133

1K
1K

nostuff
nostuff

Y11
W10
Y12
AA14
AA11
W12
AA16
Y10
Y9
Y13
W15
AA13
Y16
W13
AA9
W9
Y14
Y15
W16
V9

U505-2
N270

AA5
Y8
W3
U1
W7
W6
Y7
AA6
Y3
W2
V3
U2
T3
AA8
V2
W4
Y4
Y5
Y6
R4

A7
1%
U5
V5
1%
T17
R6
M6
N15
N6
P17
T6
J6
H5
G5

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#
DP#0

2/4

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#
DP#1

GTLREF
ACLKPH
DCLKPH
BINIT#
EDM
EXTBGREF
FORCEPR#
HPPLL
MCERR#
RSP#
BSEL0
BSEL1
BSEL2

DATA GRP2

IERR#
INIT#

RESET#
RS0#
RS1#
RS2#
TRDY#

A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#

CPU1_ADS#
CPU1_BNR#
CPU1_BPRI# CPU1_D#(15:0)

DATA GRP0

CONTROL

BR0#

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#
AP#1

R137

330
nostuff

DATA GRP3

P1.05V

C19
F19
E21
A16
D19
C14
C18
C20
E20
D20
B18
C15
B16
B17
C16
A17
B14
B15
A14
B19
M18

1%

DATA GRP1

P1.05V

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

R153

56.2
V19
Y19
U21

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

DEFER#
DRDY#
DBSY#

XDP/ITP SIGNALS

CPU1_A#(31:17)

ADS#
BNR#
BPRI#

THERM

0
1
2
3
4

1/4

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#
AP#0
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

HCLK

MISC

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
DP#2
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
DP#3
COMP0
COMP1
COMP2
COMP3

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
CORE_DET
CMREF

R3
R2
P1
N1
M2
P2
J3
N3
G3
H2
N2
L2
M3
J2
H1
J1
K2
K3
L1
M4

48
C2
49
G2
50
F1
51
D3
52
B4
53
E1
54
A5
55
C3
56
A6
57
F2
58
C6
59
B6
60
B3
61
C4
62
C7
63
D2
E2
F3 TP18106
C5 TP18105
D4 TP18104
TP18103
T1
1% 27.4
T2
1% 54.9
F20
1% 27.4
F21
1% 54.9
R18
R17
U4
V17
N18
A13
B7

0902-002366

C

CPU1_DSTBN2#
CPU1_DSTBP2#
CPU1_DBI2#
CPU1_D#(63:48)

COMP0/2 (COMP1/3) should be
connected with Zo=27.4ohm(55ohm)
trace shorter than 0.5" to their
respective Banias socket pins.
COMP0/2 : Stripline=14mils / Microstrip=18mils
COMP1/3 : Stripline=4mils / Microstrip=5mils

CPU1_DSTBN3#
CPU1_DSTBP3#
CPU1_DBI3#

R130
R132
R158
R159

B
CPU1_DPRSTP#
CPU1_DPSLP#
CPU1_DPWR#
CPU1_PWRGDCPU
CPU1_SLP#

P1.05V

R168

GTLREF : Keep the Voltage divider within 0.5"
of the First GTLREF0 with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net
GTLREF : Keep the Voltage divider within 0.5"
of the First EXTBGREF with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net

CPU1_D#(47:32)

32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47

1K
1%

C154
100nF
10V

R167
2K
1%

GTLREF : Keep the Voltage divider within 0.5"
of the First CMREF with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

CPU1_REQ#(4:0)

U505-1
N270

ADDR GROUP0

CPU1_ADSTB0#

C

P21
H20
N20
R20
J19
N19
G20
M19
H21
L20
M20
K19
J20
L21
K20
D17
N21
J21
G19
P20
R19

3
4
5
6
7
8
9
10
11
12
13
14
15
16

ADDR GROUP1

CPU1_A#(16:3)

P1.05V

2

3

P1.05V
V10
A9
B9
A10
A11
A12
B10
B11
B12
C10
C11
C12
D10
D11
D12
E10
E11
E12
F10
F11
F12
G10
G11
G12
H10
H11
H12
J10
J11
J12
K10
K11
K12
L10
L11
L12
M10
M11
M12
N10
N11
N12
P10
P11
P12
R10
R11
R12

C

B

U505-3
N270
VCCF
VCCQ1
VCCQ2
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
VCCP26
VCCP27
VCCP28
VCCP29
VCCP30
VCCP31
VCCP32
VCCP33
VCCP34
VCCP35
VCCP36
VCCP37
VCCP38
VCCP39
VCCP40
VCCP41
VCCP42
VCCP43
VCCP44
VCCP45
0902-002366

C142

C140

C141

C167

3/4
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32

C9
D9
E9
F8
F9
G8
G14
H8
H14
J8
J14
K8
K14
L8
L14
M8
M14
N8
N14
P8
P14
R8
R14
T8
T14
U8
U9
U10
U11
U12
U13
U14

A2
A4
A8
A15
A18
A19
A20
B1
B2
B5
B8
B13
B20
B21
C8
C17
D1
D5
D8
D14
D18
D21
E3
E6
E7
E8
E15
E16
E19
F4
F5
F6
F7
F17
F18
G1
G4
G7
G9
G13
G21
H3
H4
H7
H9
H13
H16
H18
H19
J5
J7
J9
J13
J17
K1
K6
K7
K9
K13
K15
K21
L3
L4
L5
L6
L7
L9
L13
L15
L18
L19
M1
M5

U505-4
N270
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
VCCP_C6_4
VCCP_C6_3
VCCP_C6_2
VCCP_C6_1
VCCA
VID0
VID1
VID2
VID3
VID4
VID5
VID6

VCCSENSE

VSSSENSE

C168

P1.05V

C144
100nF
10V

C128
100nF
10V

C129
1000nF
6.3V

C145
1000nF
6.3V

F14
F13
E14
E13

P1.5V

D7

CPU1_VID(6:0)

F15
D16
E18
G15
G16
E17
G18

C155
100nF
10V

C153

10000nF-X5R
10V

Placed as close as
possible to VCCA pins.

C13

CPU1_VCCSENSE

D13

CPU1_VSSSENSE

C170

C169

C166

C164

C165

10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R 10000nF-X5R
10V
10V
10V
10V
10V
10V
10V
10V
10V
10V
10V
10V

nostuff

nostuff

nostuff

nostuff

nostuff

4/4
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74

AA20
AA19
AA18
AA15
AA12
AA10
AA7
AA4
AA3
AA2
Y21
Y20
Y2
Y1
W21
W17
W14
W11
W8
W5
W1
V21
V18
V14
V13
V8
V7
V6
V4
V1
U19
U16
U15
U7
U6
U3
T18
T13
T12
T11
T10
T9
T7
T5
T4
R21
R13
R9
R7
R5
R1
P19
P18
P16
P15
P13
P9
P7
P6
P5
P4
P3
N17
N13
N9
N7
N5
N4
M21
M13
M9
M7

D

C

B

0902-002366

CPU_CORE

20mils

C139

C130

1000nF
6.3V

1000nF
6.3V

C137

C133

C132

C161

1000nF
6.3V

1000nF
6.3V

C158

C131

C163
1000nF
6.3V

C162
1000nF
6.3V

C160

R172

100

1%

CPU1_VCCSENSE

R171

100

1%

CPU1_VSSSENSE

C159

1000nF
6.3V

1000nF
6.3V

C136

C135

A A

A
1000nF
6.3V

nostuff

4

1000nF
6.3V

nostuff

1000nF
6.3V

nostuff

1000nF
6.3V

nostuff

C134
1000nF
6.3V

nostuff

C138
1000nF
6.3V

nostuff

1000nF
6.3V

nostuff

SAMSUNG

1000nF
6.3V

ELECTRONICS

nostuff

3

2

1

8-10

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

C109
100nF
10V
CPU_CORE

C143

1

DIAMONDVILLE (N270)

D

C110

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-11
4

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

6.3V

4700nF-X7R

C19

C523

0.1nF

100nF

C504

100nF

100nF

C529

C526

4700nF-X7R

6.3V

100nF

10V

D

C528

10V

50V

VDD_PLL3 VDD_SRC VDD_CPU
10V

VDD_PCI

C506

10V

VDD_48

10V

VDD_REF

100nF

10000nF-X5R6.3V

nostuff

C521

100nF

C522

C519

B502
BLM18PG181SN1

10000nF-X5R6.3V

C501

6.3V

10V

100nF

C530

10V
10000nF

10V
100nF

B504
BLM18PG181SN1

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
nostuff

nostuff

VDD_IO

C18

C517

VDD_CPU_IO VDD_PLL3_IO

C524

10000nF-X5R6.3V

266 MHz
333 MHz
200 MHz
400 MHz
133 MHz
100 MHz
166 MHz
RSVD

0
1
0
1
0
1
0
1

50V
0.1nF

C502

50V

50V
0.1nF

0
0
1
1
0
0
1
1

VDD_SRC_IO

HOST CLK

0.1nF

FSC

BSEL0 BSEL1 BSEL2

0
0
0
0
1
1
1
1

P3.3V

C503

D

FSB

P1.5V

B501
BLM18PG181SN1

C505

FSA

P3.3V

1

nostuff

nostuff

P3.3V

For EMI

10K

5%

33

5%

55

CLK3_48MHZ_R

17
64
5

CLK3_14MHZ_R

CHP3_CPUSTP#
CHP3_PCISTP#

44
45
63

VRM3_CPU_PWRGD
CLK3_PCLKICH

R518

22

5%

CLK3_PCIF_R

14

CLK3_DBGLPC

R519

22

5%

CLK3_PCI4_R

13
12

CLK3_PCLKMICOM
MCH3_CLKREQ#
CHP3_SATACLKREQ#

R520

22

R521

475

1%

R522

475

1%

11

CLK3_PCI2_R

10

CLK3_PCI1_R_MN

CLK3_PCI0_R_MN

8
7
6

SMB3_CLK_S
SMB3_DATA_S

C531

0.018nF
50V

C532

0.018nF
50V

5%

5%

10K

10K

R548

50V

18
59
22
15
26
1
30
36
49

R517

0.033nF

0.033nF

C565

Y500
14.31818MHz

C527

2801-004667

C566

2

For EMI

0.033nF

50V

B

50V

3
2

VDD_REF
VDD_48
VDD_PCI
VDD_PLL3
VDD_SRC
VDD_CPU

NC

PCI_4_SEL_LCDCLK#

SRC8_ITP
SRC8#_ITP#

PCI_2

SRC7_CLKREQF#
SRC7#_CLKREQE#

PCI_1_CLKREQ_B#
PCI_0_CLKREQ_A#

SRC6
SRC6#

SCL
SDA

SRC4
SRC4#

XTAL_IN
XTAL_OUT

SRC3_CLKREQC#
SRC3#_CLKREQD#

VSS_48
VSS_CPU
VSS_IO
VSS_PCI
VSS_PLL3
VSS_REF
VSS_SRC1
VSS_SRC2
VSS_SRC3

SRC2
SRC2#

SRC8

SEL_LCDCLK*

Pin 20/21

LOW

DOT_96/DOT_96#

HIGH

SRC_0/SRC_0#

4

56
1%
56
1%
56
1%

R509
R29
R552

CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
Pin 24/25

0
0
0
nostuff
nostuff
nostuff

PEG_CLK/PEG_CLK#
27M & 27M_SS

3

C

61
60

CLK0_HCLK0
CLK0_HCLK0#

58
57
40
39

R504

475

1%

CLK0_HCLK1
CLK0_HCLK1#
nostuff

LOM3_CLKREQ#

41
42
37
38
54
53
51
50

CLK3_CLKREQF#_R_MN
CLK3_CLKREQE#_R_MN

R505
R506

475
475

48
47

34
35
31
32

28
29
24
25
20
21

1%
1%

CLK1_PCIELOM
CLK1_PCIELOM#
CLK1_MINI3PCIE
CLK1_MINI3PCIE#
EXP3_CLKREQ#
MIN3_CLKREQ#
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#

B

CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_SATA
CLK1_SATA#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_DREFCLK
CLK1_DREFCLK#

This part is 64pin QFN package.

R513
R30
R524

1K
1K
1K

MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2

CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2
nostuff

0

SRC6

HSDPA

R550

SRC4

WIRELESS LAN

CLK REQ F

SRC0_DOT96
SRC0#_DOT96#

46
62

CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2

0
5%
0

GMCH

CLK REQ E

LCDCLK_27M
LCDCLK#_27M_SS

nostuff
nostuff

R32

SRC2

SRC9
SRC9#

PCI_3

R512

A

SATA

SRC10
SRC10#

PCIF_5_ITP_EN

R551

CLK REQ B

SRC PORT

R31

CLK REQ A

DEVICE

SRC11_CLKREQH#
SRC11#_CLKREQG#

CLKPWRGD_PWRDN#

1205-003159
VOLTAGE

R511

CLK REQ

CPU1_MCH
CPU1_MCH#

CPUSTOP#
PCISTOP#

P1.05V

Place 14.318MHz within
500mils of CK-505

CPU0
CPU0#

USB_FS_A
FSB_TESTMODE
REF_FS_C_TEST_SEL

4
16
9
23

A

SAMSUNG
ELECTRONICS

2

1

N130

R523
R525

VDD_IO
VDD_SRC_IO1
VDD_SRC_IO2
VDD_SRC_IO3
VDD_CPU_IO
VDD_PLL3_IO

THERM_GND

5%

1%

33
2.2K

1%

R516
R514

U501
IDTCV179BNLG

19
33
43
52
56
27

65

CLK3_ICH14

33

10K

CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2

R515

nostuff
nostuff

10K

C

1

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

CLK3_FM48
CLK3_USB48

nostuff

R549

0.012nF
50V

0.012nF
50V

R547

C525

C520

3

2

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

CALISTOGA (945GSE)
D

D
P1.05V

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

C

B

P1.05V

MCH1_HXSWING
MCH1_HYSWING

A

CPU1_RS0#
CPU1_RS1#
CPU1_RS2#

R131
R124
R135
R127

54.9
54.9
24.9
24.9

1%
1%
1%
1%

width: 10mil, within 20mil

C4
F6
H9
H6
F7
E3
C2
C3
K9
F5
J7
K7
H8
E5
K8
J8
J2
J3
N1
M5
K5
J5
H3
J4
N3
M4
M3
N8
N6
K3
N9
M1
V8
V9
R6
T8
R2
N5
N2
R5
U7
R8
T4
T7
R3
T5
V6
V3
W2
W1
V2
W4
W7
W5
V5
AB4
AB8
W8
AA9
AA8
AB1
AB7
AA2
AB5
C15
H1
A6
K1
A10
J1
A5
B6
G10

U504-1
945GSE
HD0*
HD1*
HD2*
HD3*
HD4*
HD5*
HD6*
HD7*
HD8*
HD9*
HD10*
HD11*
HD12*
HD13*
HD14*
HD15*
HD16*
HD17*
HD18*
HD19*
HD20*
HD21*
HD22*
HD23*
HD24*
HD25*
HD26*
HD27*
HD28*
HD29*
HD30*
HD31*
HD32*
HD33*
HD34*
HD35*
HD36*
HD37*
HD38*
HD39*
HD40*
HD41*
HD42*
HD43*
HD44*
HD45*
HD46*
HD47*
HD48*
HD49*
HD50*
HD51*
HD52*
HD53*
HD54*
HD55*
HD56*
HD57*
HD58*
HD59*
HD60*
HD61*
HD62*
HD63*

HA3*
HA4*
HA5*
HA6*
HA7*
HA8*
HA9*
HA10*
HA11*
HA12*
HA13*
HA14*
HA15*
HA16*
HA17*
HA18*
HA19*
HA20*
HA21*
HA22*
HA23*
HA24*
HA25*
HA26*
HA27*
HA28*
HA29*
HA30*
HA31*

3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

221
1%

G9
E9
G12
B8
F12

0
1
2
3
4

MCH1_HYSWING
C107

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

HXSWING
HYSWING
HXSCOMP
HYSCOMP
HXRCOMP
HYRCOMP
HRS0*
HRS1*
HRS2*

R128
CPU1_A#(31:3)
F8
D12
C13
A8
E13
E12
J12
B13
A13
G13
A12
D14
F14
J13
E17
H15
G15
G14
A15
B18
B15
E14
H13
C14
A17
E15
H17
D17
G17

1/5

0904-002420

HREQ0*
HREQ1*
HREQ2*
HREQ3*
HREQ4*

HADSTB0*
HADSTB1*

HVREF0

HVREF1
HVREF2
HCLKN
HCLKP

HDINV0*
HDINV1*
HDINV2*
HDINV3*

HDSTBN0*
HDSTBN1*
HDSTBN2*
HDSTBN3*
HDSTBP0*
HDSTBP1*
HDSTBP2*
HDSTBP3*

HADS*
HBNR*
HBPRI*
HBREQ0*
HDBSY*
HDEFER*
HDRDY*
HHIT*
HHITM*
HLOCK*
HTRDY*

HDPWR*
HCPURST*
HSLPCPU*

C12
H16
E1
E2

AA6
AA5

100nF
10V

0.327V

R126
100
1%

within 20mil

P1.05V
R122
221
1%

MCH1_HXSWING

C83

100nF

10V

7-C4

CPU1_ADSTB0#
CPU1_ADSTB1#

MCH1_HVREF

F3
M8
T1
AA3
F4
M7
T2
AB3

CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#

F10
B9
C7
G8

CPU1_ADS#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#

C10
C6
E6
C8
B4
C5
E10

CPU1_DBSY#
CPU1_DEFER#
CPU1_DRDY#
CPU1_HIT#
CPU1_HITM#
CPU1_LOCK#
CPU1_TRDY#

G7
B10
E8

CPU1_DPWR#
CPU1_CPURST#
CPU1_SLP#

P1.05V
R129

100
1%

MCH1_HVREF

CLK0_HCLK1#
CLK0_HCLK1
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#

100
1%

within 20mil

CPU1_REQ#(4:0)

H5
J6
T9
U6

C

0.327V

R123

nearby Pin J13

Layout Note

C106

100nF
10V

R125

0.7V

200
1%

Place 100nF
within 100mils
near HVREF pin

B

A

HSLPCPU* - GMCH : Enhanced mode (def.)
HSLPCPU* - ICH : Legacy mode

SAMSUNG
ELECTRONICS

4

3

2

1

8-12

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

CPU1_D#(63:0)

8-13
4

A27
A26
J33
H33

CLK1_DREFCLK#
CLK1_DREFCLK
CLK1_DREFSSCLK#
CLK1_DREFSSCLK

Y26
AA26

CLK1_MCH3GPLL#
CLK1_MCH3GPLL

P1.5V

0.022nF 5%50V
0.022nF 5%50V
0.022nF 5%50V

R113
R112

C

40.2 MCH1_VSYNC_R_MN
1%
40.2 MCH1_HSYNC_R_MN
1%

R626
R625
R624

150
150
150

1%

R107

249

1%

1%
1%

C621
C620
C619

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

CRT3_DDCCLK
CRT3_DDCDATA
CRT3_VSYNC
CRT3_HSYNC
CRT3_RED
CRT3_GREEN
CRT3_BLUE

A21
C20
E20
G23
B21
C21
D21
G26
J26
H20
H22
F27
D27
C25
E25
A24
D25
F25
A23
H25
J27
H27
T30
T29
M30
N30
P30
R30
N28
P28
M32
N32
P33
P32

P3.3V
nostuff
nostuff

R109 R111
10K

B

10K

T32
R32
H30
G29
K30
F28
E28

LCD3_BRIT
MCH3_LCD_BKLTEN
MCH3_LCD_VDDEN

D30
C30
G31
H31
F32
G32
D31
C31

LCD1_ACLK#
LCD1_ACLK
LCD1_ADATA0#
LCD1_ADATA0
LCD1_ADATA1#
LCD1_ADATA1
LCD1_ADATA2#
LCD1_ADATA2

A30
A29
F33
D33
F30
E33
D32
F29

R114
1.5K

K27
J29
J30
K29

1%

G28
H28

LCD3_EDID_CLK
LCD3_EDID_DATA

A

CALISTOGA (945GSE)

P1.5V

U504-2
945GSE
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP

R115
EXP_ACOMPI
EXP_AICOMPO
DMI_RXN0
DMI_RXN1
DMI_RXP0
DMI_RXP1
DMI_TXN0
DMI_TXN1
DMI_TXP0
DMI_TXP1

GCLKN
GCLKP
TVDACA_OUT
TVDACB_OUT
TVDACC_OUT
TV_IREF_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
TV_DCONSEL0
TV_DCONSEL1

0904-002420
CRT_DDCCLK
CRT_DDCDATA
CRT_VSYNC
CRT_HSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_RED*
CRT_GREEN*
CRT_BLUE*
CRT_IREF

SDVOB_INT
SDVOB_INT*
SDVOB_RED
SDVOB_RED*
SDVOB_GREEN
SDVOB_GREEN*
SDVOB_BLUE
SDVOB_BLUE*
SDVOB_CLKN
SDVOB_CLKP
L_BKLTCRTL
L_BKLTEN
L_VDDEN
L_CTLA_CLK
L_CTLB_DATA
LA_CLKN
LA_CLKP
LA_DATAN0
LA_DATAP0
LA_DATAN1
LA_DATAP1
LA_DATAN2
LA_DATAP2
LB_CLKN
LB_CLKP
LB_DATAN_0
LB_DATAN_1
LB_DATAN_2
LB_DATAP_0
LB_DATAP_1
LB_DATAP_2
L_IBG
L_VBG
L_VREFH
L_VREFL
LDDC_CLK
LDDC_DATA

24.9
1%

MEM1_ADM(7:0)

Y29
Y32
Y28
Y31
V28
V31
V29
V32

DMI1_TXN0
DMI1_TXN1
DMI1_TXP0
DMI1_TXP1
DMI1_RXN0
DMI1_RXN1
DMI1_RXP0
DMI1_RXP1

AF33
AG33
AG1
AF1
AJ1
AK1
AM30
AN30

CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#

AN21
AN22
AF26
AF25

MEM1_CKE0
MEM1_CKE1

AG14
AF12
AK14
AH12

MEM1_CS0#
MEM1_CS1#

MEM1_ADQS(7:0)

0
1
2
3
4
5
6
7

AB30
AL31
AF30
AK26
AL9
AG7
AK5
AH3

0
1
2
3
4
5
6
7

AC28
AJ30
AK33
AL25
AN9
AH8
AM2
AE3

0
1
2
3
4
5
6
7

AC29
AK30
AJ33
AM25
AN8
AJ8
AM3
AE2

U504-3
945GSE
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

MEM1_ADQ(63:0)
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

2/5

SDVO_CTRLCLK
SDVO_CTRLDATA
SDVO_FLDSTALL
SDVO_FLDSTALL*
SDVO_TVCLKIN
SDVO_TVCLKIN*

R28
M28

1

SM_CLK0
SM_CLK0*
SM_CLK1
SM_CLK1*
SM_CLK2
SM_CLK2*
SM_CLK3
SM_CLK3*
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0*
SM_CS1*
SM_CS2*
SM_CS3*

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMOCDCOMP0
SMOCDCOMP1
SMVREF0
SMVREF1

RSTIN*
PWROK
PM_BMBUSY*
PM_THRMTRIP*
PM_EXTTS*_0
PM_EXTTS*_1
ICHSYNC*
CLKREQ*
CFG0
CFG1
CFG2
CFG3
CFG5
CFG6
CFG19

RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_17
RSVD_18
RSVD_19

AE12
AF14
AJ14
AJ12

AN12
AN14
AJ21
AF11
AA33
AE1

MEM1_ODT0
MEM1_ODT1

MCH1_SMRCOMPN_R_MN R164
MCH1_SMRCOMPP_R_MN R163

C126
C116

W27 MCH1_RSTIN_R_MN
AB29
G21
J15
F26
H26

80.6
80.6

MEM1_ADQS#(7:0)

MEM1_ABS0
MEM1_ABS1
MEM1_ABS2

AK12
AH11
AG17

MEM1_ACAS#
MEM1_ARAS#
MEM1_AWE#
P1.8V_AUX

AJ17
AK18
AH17

1%

P1.8V_AUX

100nF
100nF

R147

10V
10V

100 1%

PLT3_RST#
KBC3_PWRGD
MCH3_BMBUSY#
CPU1_THRMTRIP#
MCH3_EXTTS0#
MCH3_EXTTS1#

E31
J22

MCH3_ICHSYNC#
MCH3_CLKREQ#

C18
E18
G20
G18
J20
J18
K28

MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2

Internal P.U. P3.3V
1K
R116
1%

K25
K26
K32
K31
R24
T24
M10
A18
AB10
AA10
C17
A33
K22
J17
K23
K17
K12
K13
K16

nostuff

R121

2.2K

R165
10K
1%

R166

10K
1%

AN20
AL21
AK21
AK22
AL22
AH22
AG22
AF21
AM21
AE21
AL20
AE22
AE26
AE20

R119

2.2K

CFG[0:2] = BSEL[0:2] = "100"

Page 6

MCH_CFG5 : LOW=DIMX2
HIGH=DIMX4

CFG(5)
CFG(6)
CFG(19)

AJ15
AM17
AM15
AH15
AK15
AN15
AJ18
AF19
AN17
AL17
AG16
AL18
AG18
AL14

AG19
AG21
AG20

nostuff

CFG#

0
1
2
3
4
5
6
7
8
9
10
11
12
13

AH21
AJ20
AE27

2.2K nostuff

R120

VSS_NCTF

AN28
AM28

MEM1_AMA(13:0)

1%

AB18
AB15
AB13
AB12
AB17
F18

Current Setting (def. : default Option)
Low
High

DMIx2 (default)
DMIx4
Reserved
DMI Lane Normal DMI Lane Reversal

3/5

0904-002420

SA_DQS0*
SA_DQS1*
SA_DQS2*
SA_DQS3*
SA_DQS4*
SA_DQS5*
SA_DQS6*
SA_DQS7*
SA_BS0
SA_BS1
SA_BS2

SA_CAS*
SA_RAS*
SA_WE*

SA_RCVENIN*
SA_RCVENOUT*

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SB_BS0
SB_BS1
SB_BS2

SB_CAS*
SB_RAS*
SB_WE*

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
RSVD_37
RSVD_38
RSVD_39
RSVD_40
RSVD_41
RSVD_42

RSVD_20
RSVD_21
RSVD_22
RSVD_23
RSVD_24
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35
RSVD_36

AC31
AB28
AE33
AF32
AC33
AB32
AB31
AE31
AH31
AK31
AL28
AK27
AH30
AL32
AJ28
AJ27
AH32
AF31
AH27
AF28
AJ32
AG31
AG28
AG27
AN27
AM26
AJ26
AJ25
AL27
AN26
AH25
AG26
AM12
AL11
AH9
AK9
AM11
AK11
AM8
AK8
AG9
AF9
AF8
AK6
AF7
AG11
AJ6
AH6
AN6
AM6
AK3
AL2
AM5
AL5
AJ3
AJ2
AG2
AF3
AE7
AF6
AH5
AG3
AG5
AF5

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

D

C

B

K15
K21
K19
K20
K24
Y25
Y24
AB22
AB21
AB19
AB16
AB14
AA12
W24
AA24
AB24
AB20

A

P3.3V

4

R117

10K

R110

10K

R118

10K

SAMSUNG

MCH3_EXTTS0#
MCH3_EXTTS1#
MCH3_CLKREQ#

3

MCH3_EXTTS1#

R108

0

ELECTRONICS
CHP3_DPRSLPVR

nostuff

2

1

N130

D

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

P1.05V
270uF * 2ea
C124

C125

6.3V

6.3V

D

C120
100nF

10000nF

10V

C122
100nF
10V

C634

10000nF

6.3V

C

C104
100nF
10V

C84

P1.5V

P1.5V

BLM18PG181SN1
B510

BLM18PG181SN1
B509
C647

10000nF

C648

10000nF
6.3V

6.3V

C646
100nF

C633

C649

10000nF
6.3V

10V

C631
100nF

10000nF
6.3V

nostuff

10V

nostuff

B
P1.5V

B506
BLM18PG181SN1

EC502
220uF
2.5V AD

C79
100nF

6.3V

P1.05V

C118
100nF

10V

P1.8V_AUX

VCCSM_1
VCCSM_2
VCCSM_3
VCCSM_4
VCCSM_5
VCCSM_6
VCCSM_7
VCCSM_8
VCCSM_9
VCCSM_10
VCCSM_11
VCCSM_12
VCCSM_13
VCCSM_14
VCCSM_15
VCCSM_16
VCCSM_17
VCCSM_18
VCCSM_19
VCCSM_20
VCCSM_21
VCCSM_22
VCCSM_23
VCCSM_24
VCCSM_25
VCCSM_26
VCCSM_27
VCCSM_28
VCCSM_29
VCCSM_30
VCCSM_31
VCCSM_32
VCCSM_33
VCCSM_34
VCCSM_35
VCCSM_36
VCCSM_37
VCCSM_38
VCCSM_39
VCCSM_40
VCCSM_41
VCCSM_42
VCCSM_43
VCCSM_44
VCCSM_45
VCCSM_46
VCCSM_47
VCCSM_48
VCCSM_49
VCCSM_50
VCCSM_51
VCCSM_52

4/5

10V

100nF
10V

100nF
10V

C24
B24
B25
J23

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46

VCCD_HMPLL_1
VCCD_HMPLL_2
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_3GPLL

Y10
W33
AM33
AL33
C33
B33
AN32
A32
W10
AN31
W28
V27
W25
V24
U24
W29
V10
J24
H24
W32
G24
F24
E24
D24
K33
U10
A31
E21
C23
AN19
AM19
AL19
AK19
AJ19
AH19
AN3

AN33
AA25
V25
U25
AA22
AA21
AA20
AA19
AA18
AA17

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10

0904-002420

NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72

VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19

Y9
J19
H19
G19
F19
E19
D19
C19
B19
A19
Y8
K18
G16
F16
E16
D16
C16
B16
AN2
A16
Y7
AM4
AF4
AD4
AL4
AK4
W31
AJ4
AH4
AG4
AE4
AM1
W30
Y6
AL1
Y5

AA16
AA15
AA14
AA13
A4
A3
B2
AN1
C1

VCCHV_1
VCCHV_2
VCCHV_3

VCCDLVDS_1
VCCDLVDS_2
VCCDLVDS_3
VCCA_LVDS
VSSA_LVDS

VCCTX_LVDS_1
VCCTX_LVDS_2
VCCA_TVDACA_1
VCCA_TVDACA_2
VCCA_TVDACB_1
VCCA_TVDACB_2
VCCA_TVDACC_1
VCCA_TVDACC_2
VCCDTVDAC
VCCDQTVDAC
VCCA_TVBG
VSSA_TVBG

VCCA_CRTDAC_1
VCCA_CRTDAC_2
VSSA_CRTDAC
VCC_SYNC

VCC3G_1
VCC3G_2
VCCA_3GBG
VSSA_3GBG

P2.5V

VOLTAGE
1

100nF

A14
D10
P9
L9
D9
P8
L8
D8
P7
L7
D7
A7
P6
L6
G6
D6
U5
P5
L5
G5
D5
Y4
U4
P4
L4
G4
D4
Y3
U3
P3
L3
G3
D3
Y2
U2
P2
L2
G2
D2
AA1
Y1
U1
P1
L1
G1
F1

AE5
AD5
AD2
AD1
B26
J32
V26

10000nF

A

C632

C105

C250

10V

10V

C123
100nF

P1.5V

P1.5V

100nF

10V

C108

B507
BLM18PG181SN1

8. Block Diagram and Schematic

2.5V AD

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22

CALISTOGA (945GSE)

3

R101

BAT54
D8

1%

C81
100nF

10V

C82

EC1
47uF

6.3V AD

P1.8V_AUX
C117
6.3V
C148 1000nF-X5R
6.3V
1000nF-X5R

EC2
220uF

2.5V
AD

C151

C175
C152

C149

C174

10V

C102
100nF
10V

C101
100nF
10V

C96

10000nF
6.3V

C

C78

10000nF
6.3V

P2.5V

C98
10nF
25V

C100
100nF
10V

6.3V

1000nF-X5R
1000nF-X5R

P2.5V

6.3V

E26
D26
C26

C99
100nF

10V

C28
B28
A28
B31
B32

D29
C29
B20
A20
B22
A22
D22
C22

C77
4700nF
6.3V

nostuff

B

P1.5V

F20
F22
D23
E23

U33
T33
N33
M33

P1.5V

P2.5V

C643

10000nF
6.3V

C644

10000nF
6.3V

EC504
220uF
2.5V
AD

B508
BLM18PG181SN1

A

nostuff

C103
22nF

SAMSUNG

50V

ELECTRONICS

SHORT4

INSTPAR

4

D

P1.5V

10000nF
6.3V

nostuff

P3.3V

6.3V

10V

C80
100nF

C150

4700nF
6.3V

10000nF-X5R
6.3V

1000nF-X7R
6.3V

1000nF-X5R

C97
100nF

B8 BLM18PG181SN1

10

AB33
AM32
AN29
AM29
AL29
AK29
AJ29
AH29
AG29
AF29
AE29
AN24
AM24
AL24
AK24
AJ24
AH24
AG24
AF24
AE24
AN18
AN16
AM16
AL16
AK16
AJ16
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AN10
AM10
AL10
AK10
AJ10
AH10
AG10
AF10
AE10
AN7
AM7
AL7
AK7
AJ7
AH7
AN4
AH1

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
P1.05V

EC503
220uF

C121
100nF

10V

T26
R26
P26
N26
M26
V19
U19
T19
W18
V18
T18
R18
W17
U17
R17
W16
V16
T16
R16
V15
U15
T15

U504-4
945GSE

1

3

2

1

8-14

10000nF

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

2

3

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-15
4

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

2

CALISTOGA (945GSE)
U504-5
945GSE

P1.5V

D

C119
100nF
10%

10V

AD33
AD32
AD31
AD30
AD29
AD28
AD27
AC27
AD26
AC26
AB26
AE19
AE18
AF17
AE17
AF16
AE16
AF15
AE15
J14
J10
H10
AE9
AD9
U9
AD8
AD7
AD6

AE6
AB6
W6
T6
M6
K6
AN5
AJ5
B5
AA4
V4
R4
N4
K4
H4
E4
AL3

A

AH33
Y33
V33
R33
G33
AK32
AG32
AE32
AC32
AA32
U32
H32
E32
C32
AM31
AJ31
AA31
U31
T31
R31
P31
N31
M31
J31
F31
AL30
AG30
AE30
AC30
AA30
Y30
V30
U30
G30
E30
B30
AA29
U29
R29
P29
N29
M29
H29
E29
B29
AK28
AH28
AE28
AA28
U28
T28
J28
D28
AM27
AF27
AB27
AA27
Y27
U27
T27
R27
P27
N27
M27
G27
E27
C27
B27
AL26
AH26
W26
U26
AN25
AK25
AG25
AE25
J25

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77

VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154

G25
A25
H23
F23
B23
AM22
AJ22
AF22
G22
E22
J21
H21
F21
AM20
AK20
AH20
AF20
D20
W19
R19
AM18
AH18
AF18
U18
H18
D18
AK17
V17
T17
F17
B17
AH16
U16
J16
AL15
AG15
W15
R15
F15
D15
AM14
AH14
AE14
H14
B14
F13
D13
AL12
AG12
H12
B12
AN11
AJ11
AE11
AM9
AJ9
AB9
W9
R9
M9
J9
F9
C9
A9
AL8
AG8
AE8
U8
AA7
V7
R7
N7
H7
E7
B7
AL6
AG6

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VCC_NCTF_51
VCC_NCTF_52
VCC_NCTF_53
VCC_NCTF_54
VCC_NCTF_55
VCC_NCTF_56
VCC_NCTF_57
VCC_NCTF_58
VCC_NCTF_59
VCC_NCTF_60
VCC_NCTF_61
VCC_NCTF_62
VCC_NCTF_63
VCC_NCTF_64

T25
R25
P25
N25
M25
P24
N24
M24
Y22
W22
V22
U22
T22
R22
P22
N22
M22
Y21
W21
V21
U21
T21
R21
P21
N21
M21
Y20
W20
V20
U20
T20
R20
P20
N20
M20
Y19
P19
N19
M19
Y18
P18
N18
M18
Y17
P17
N17
M17
Y16
P16
N16
M16
Y15
P15
N15
M15
Y14
W14
V14
U14
T14
R14
P14
N14
M14

D

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

AD25
AC25
AB25
AD24
AC24
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
K14
AD13
Y13
W13
V13
U13
T13
R13
P13
N13
M13
AD12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
AD11
AD10
K10

B

VCCAUX_1
VCCAUX_2
VCCAUX_3
VCCAUX_4
VCCAUX_5
VCCAUX_6
VCCAUX_7
VCCAUX_8
VCCAUX_9
VCCAUX_10
VCCAUX_11
VCCAUX_12
VCCAUX_13
VCCAUX_14
VCCAUX_15
VCCAUX_16
VCCAUX_17
VCCAUX_18
VCCAUX_19
VCCAUX_20
VCCAUX_21
VCCAUX_22
VCCAUX_23
VCCAUX_24
VCCAUX_25
VCCAUX_26
VCCAUX_27
VCCAUX_28

P1.05V

VCCAUX_NCTF_1
VCCAUX_NCTF_2
VCCAUX_NCTF_3
VCCAUX_NCTF_4
VCCAUX_NCTF_5
VCCAUX_NCTF_6
VCCAUX_NCTF_7
VCCAUX_NCTF_8
VCCAUX_NCTF_9
VCCAUX_NCTF_10
VCCAUX_NCTF_11
VCCAUX_NCTF_12
VCCAUX_NCTF_13
VCCAUX_NCTF_14
VCCAUX_NCTF_15
VCCAUX_NCTF_16
VCCAUX_NCTF_17
VCCAUX_NCTF_18
VCCAUX_NCTF_19
VCCAUX_NCTF_20
VCCAUX_NCTF_21
VCCAUX_NCTF_22
VCCAUX_NCTF_23
VCCAUX_NCTF_24
VCCAUX_NCTF_25
VCCAUX_NCTF_26
VCCAUX_NCTF_27
VCCAUX_NCTF_28
VCCAUX_NCTF_29
VCCAUX_NCTF_30
VCCAUX_NCTF_31
VCCAUX_NCTF_32
VCCAUX_NCTF_33
VCCAUX_NCTF_34
VCCAUX_NCTF_35
VCCAUX_NCTF_36
VCCAUX_NCTF_37
VCCAUX_NCTF_38

VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171

5/5

0904-002420

VTT_NCTF_1
VTT_NCTF_2
VTT_NCTF_3
VTT_NCTF_4
VTT_NCTF_5
VTT_NCTF_6

VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185

C

B

P1.05V

T10
R10
P10
N10
L10
D1

AD3
W3
T3
B3
AK2
AH2
AF2
AB2
M2
K2
H2
F2
V1
R1

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

P1.5V

C

1

3

2

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1

DDR SO-DIMM #0

D

D

MEM1_ADQ(63:0)

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
ME POWER RAIL UNDER ME ENABLE

P1.8V_AUX

DDR500-1
DDR2-SODIMM-200P-RVS

C

0
1
2
3
4
5
6
7
8
9
10
11
12
13

MEM1_ABS2

107
106

MEM1_ABS0
MEM1_ABS1

**NOTE AMT MODEL
SMB3_CLK/DATA_M

B

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

MEM1_CS0#
MEM1_CS1#

110
115

CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
MEM1_CKE0
MEM1_CKE1

30
32
164
166
79
80
113
108
109

MEM1_ACAS#
MEM1_ARAS#
MEM1_AWE#

R692

10K 1%

SMB3_CLK_S
SMB3_DATA_S
MEM1_ODT0
MEM1_ODT1
MEM1_ADM(7:0)

MEM1_ADQS(7:0)

MEM1_ADQS#(7:0)

A

198
200
197
195
114
119

0
1
2
3
4
5
6
7

10
26
52
67
130
147
170
185

0
1
2
3
4
5
6
7

13
31
51
70
131
148
169
188

0
1
2
3
4
5
6
7

11
29
49
68
129
146
167
186

1/2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16_BA2
BA0
BA1
S0*
S1*
CK0
CK0*
CK1
CK1*
CKE0
CKE1
CAS*
RAS*
WE*
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS*0
DQS*1
DQS*2
DQS*3
DQS*4
DQS*5
DQS*6
DQS*7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DDR500-2
DDR2-SODIMM-200P-RVS

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

P3.3V_M for AMT
P3.3V

112
111
117
96
95
118
81
82
87
103
88
104
199

C675

C674

100nF
10V

2200nF
10V

nostuff

nostuff

MCH3_EXTTS0#

P1.8V_AUX

R243

10K
1%

R242
10K
1%

83
120
50
69
163
1

C217

100nF
10V

C218

2200nF
10V

nostuff

201
202

47
133
183
77
12
48
184
78
71
72
121
122
196
193
8

2/2

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12

VDDSPD
NC1
NC2
NC3
NC4
NCTEST
VREF

GND0
GND1

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57

18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162

C

B

3709-001327

ME POWER RAIL UNDER ME ENABLE

Place near SO-DIMM0

P1.8V_AUX

EC6
220uF

C224

2200nF
10V

2.5V
AD

nostuff

C225

2200nF
10V

nostuff

C221

2200nF
10V

C223

10000nF-X5R
6.3V

C222

10000nF-X5R
6.3V

C685
100nF
10V

C682
100nF
10V

C683

100nF
10V

C684
100nF
10V

nostuff

A

SAMSUNG
ELECTRONICS

3709-001327

4

3

2

1

8-16

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

MEM1_AMA(13:0)

8-17
4

2

3

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

ICH7-M

D

Enable Pull up
(VccSus1_05 : NC)
Disable

680K

R533
1M

LPC3_LAD(3:0)

1%

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
AB1
AB2

R507

10M

AA3

CHP3_RTCRST#

Y5
W4

0.032768MHz
1

C514

4

2

3

W1
Y1
Y2
W3

C513

Y502

0.007nF

V3

C8

0.022nF
50V

P3.3V

PD

1x2 / 2x1

STUFF

NO_STUFF

4x1

NO_STUFF

STUFF

HDA3_AUD_BCLK
HDA3_AUD_SYNC

HDA3_AUD_RST#
R562

U7
V6
V7

R11
R535

33
33

R536

33

5%

HDA3_AUD_BCLK_R_MN U1

5%

HDA3_AUD_SYNC_R_MN R6

5%

HDA3_AUD_RST#_R_MN R5

T2
T3
T1

HDA3_AUD_SDI0

10K

nostuff

U5
V4
T5

FOR EMI

R13

HDA3_AUD_SDO

33

5%

HDA3_AUD_SDO_R_MN

AF18

CHP3_SATALED#
SAT1_RXN0
SAT1_RXP0
SAT1_TXN0
SAT1_TXP0

C542

10nF

C512

10nF

25V

SAT1_RXN0_C_MN

C541

10nF

C511

10nF

25V

25V

25V

SAT1_RXP0_C_MN
SAT1_TXN0_C_MN
SAT1_TXP0_C_MN

AF3
AE3
AG2
AH2

AF7
AE7
AG6
AH6

B

AF1
AE1

CLK1_SATA#
CLK1_SATA

AH10
AG10

P3.3V

P3.3V_MICOM

R55
R56

PRTC_BAT

C220
1
3711-000541

MNT2
MNT1
2
1

4
3

R215

HDR-2P-SMD
J2

4

1%

24.9
1%

R214

LAD0
LAD1
LAD2
LAD3

RTCRST*

INTRUDER*
INTVRMEN

LDRQ0*
LDRQ1*_GPIO23

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

A20GATE
A20M*

LAN_CLK

CPUSLP*

LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST*

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

ACZ_SDOUT

LFRAME*

TP1_DPRSTP*
TP2_DPSLP*
FERR*

GPIO49_CPUPWRGD

ICH1-1
82801GBM
1/5

IGNNE*
INIT3_3V*
INIT*
INTR
RCIN*
NMI
SMI*

STPCLK*

THERMTRIP*

SATALED*

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA_CLKN
SATA_CLKP

SATARBIASN
SATARBIASP
DIOR*
DIOW*
DDACK*
IDEIRQ
IORDY
DDREQ

DA0
DA1
DA2

DCS1*
DCS3*

AA6
AB5
AC4
Y6

0
1
2
3

AC3
AA5
AB3

LPC3_LFRAME#

AE22
AH28

KBC3_A20G
CPU1_A20M#

ICH_CPUSLP_R_MN

AG27

AF24
AH25

R86

0

P1.05V

CPU1_SLP#

nostuff

R87

CPU1_DPRSTP#
CPU1_DPSLP#

56.2
1%

AG26
AG24
AG22
AG21
AF22
AF25

C

CPU1_IGNNE#

KBC3_CPURST#

AH24
AF23

P1.05V

CPU1_NMI
CPU1_SMI#

AH22

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

CPU1_FERR#

CPU1_INIT#
CPU1_INTR

AG23

AF26

7-B3
49-C3

CPU1_PWRGDCPU

CPU1_STPCLK#

ICH_THERMTRIP_R_MN

R85

R81
56.2
1%

27.4

CPU1_THRMTRIP#

1%

*Layout Note
27.4ohm resistor needs
to placed within 2" of ICH7-M
56.2ohm must be placed
to placed within 2" of 27.4ohm w/o stub

B

AH17
AE17
AF17
AE16
AD16

0904-002053

Place near to the ICH7

20K
1%

CHP3_RTCRST#

1K
1%

C219
1000nF-X5R R671

RTC Battery
BA39-00534A
BA39-00598A (New)

10K
4.7K

AF15
AH15
AF16
AH16
AG16
AE15

R58

1000nF

3

VOLTAGE

D9
BAT54C

RIGHT ANGLE

A

T4

RTXC1
RTCX2

25V

1M

nostuff

A

CMOS
RESET

SAMSUNG

PLACE TO BOTTOM
ARROUND WIBRO DOOR

ELECTRONICS

3

2

1

N130

PU

1
0

ACZ_SYNC PORT X Line

2

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

U3

C

x1 / x2 Docking

D

nostuff

R534

Pull down

1%

0.007nF

B0 Stepping : QK65

PRTC_BAT

Internal VR Strap

P3.3V

ICH7-M

R545

10K

E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6

C

A3
B4
C5
B5

PCI3_INTA#
PCI3_INTB#
PCI3_INTC#
PCI3_INTD#

AE5
AD5
AG4
AH4
AD9
AE9
AG8
AH8

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

SPI BOOT

REQ0*
GNT0*
REQ1*
GNT1*
REQ2*
GNT2*
REQ3*
GNT3*
GPIO22_REQ4*
GPIO48_GNT4*
GPIO1_REQ5*
GPIO17_GNT5*
C_BE0*
C_BE1*
C_BE2*
C_BE3*

ICH1-2
82801GBM
2/5

IRDY*
PAR
PCIRST*
DEVSEL*
PERR*
PLOCK*
SERR*
STOP*
TRDY*
FRAME*

0904-002053

PLTRST*
PCICLK
PME*
TP3

PIRQA*
PIRQB*
PIRQC*
PIRQD*

GPIO2_PIRQE*
GPIO3_PIRQF*
GPIO4_PIRQG*
GPIO5_PIRQH*

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

MCH_SYNC*

P3.3V_AUX

P3.3V_AUX

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

PCI3_REQ0#

PCI3_REQ2#

A19
A27
A22
AB18
B23

AC20
AF21

P3.3V_AUX

B21
E23

AG18

PCI3_CLKRUN#
R568

AC19
U2

1K

PLT3_RST#
CLK3_PCLKICH

F20
AH21
AF20

CHP3_SERIRQ
THM3_ALERT#

AD22

VRM3_CPU_PWRGD

PCI3_INTE#
PCI3_INTF#
PCI3_INTG#
FFS3_INT

CLK3_ICH14
CLK3_USB48

Internallly ANDed with the PWROK input

CHP3_SLPS3#
CHP3_SLPS4#
CHP3_SLPS5#

AH20

AC1
B2
C20

MCH3_ICHSYNC#

B24
D23
F22

KBC3_PWRGD

R9

P3.3V_AUX

R602

PLT3_RST#

10K

R574

R601

KBC3_PWRBTN#

SPI PCI LPC
0
1
1
1
0
1

Default : LPC Boot

10K

R564
10K
1%

R10

4

1

Y4

AC21
AC18
E21
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
R2
P6
P1

P2
P5

SMB3_CLK_S

N130
10V
10V

PERN2
PERP2
PETN2
PETP2

H26
H25
G28 ICH_PETN2_C_MN
C600
G27 ICH_PETP2_C_MN
C599

100nF
100nF

10V
10V

PERN3
PERP3
PETN3
PETP3

K26
K25
J28 ICH_PETN3_C_MN
C598
J27 ICH_PETP3_C_MN
C597

100nF
100nF

10V
10V

HSDPA

RI*

GIGABIT LAN

SPKR
SUS_STAT*
SYS_RST*

GPIO0_BM_BUSY*

PERN4
PERP4
PETN4
PETP4

GPIO18_STPPCI*
GPIO20_STPCPU*

ICH1-3
82801GBM
3/5

GPIO26

GPIO27
GPIO28

GPIO32_CLKRUN*

GPIO33_AZ_DOCK_EN*
GPIO34_AZ_DOCK_RST*
WAKE*
SERIRQ
THRM*

VRMPWRGD

CLK14
CLK48

SUSCLK

SLP_S3*
SLP_S4*
SLP_S5*
PWROK

GPIO16_DPRSLPVR

TP0_BATLOW*
PWRBTN*

LAN_RST*

RSMRST*

GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25 BIOS RESET
GPIO35_SATACLKREQ*
GPIO38
GPIO39
SPI_CLK
SPI_CS*
SPI_ARB

SPI_MISO
SPI_MOSI

0904-002053

PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

OC0*
OC1*
OC2*
OC3*
OC4*
GPIO29_OC5*
GPIO30_OC6*
GPIO31_OC7*

V26
V25
U28
U27

DMI1_RXN0
DMI1_RXP0
DMI1_TXN0
DMI1_TXP0

Y26
Y25
W28
W27
AB26
AB25
AA28
AA27
AD25
AD24
AC28
AC27
AE28
AE27
C25
D25
D3
C4
D5
D4
E5
C3
A2
B3

R600

CLK1_PCIEICH#
CLK1_PCIEICH
P1.5V_PCIE
24.9
1%

P3.3V_AUX
R546

1K

5%

R510

1K

5%

B

F1

USB3_P0USB3_P0+
USB3_MINIPCIE1USB3_MINIPCIE1+
USB3_P2USB3_P2+
USB3_MINIPCIE2USB3_MINIPCIE2+
USB3_MMCUSB3_MMC+
USB3_BLUETOOTHUSB3_BLUETOOTH+
USB3_P6USB3_P6+
USB3_CAMERAUSB3_CAMERA+

G4
H1

K1
L4

BLUETOOTH USBP5P L5

M1

M2
USB PORT-3 USBP6N
USBP6P
N4
CAMERA USBP7N N3
USBP7P

USBRBIAS*
USBRBIAS

C

DMI1_RXN1
DMI1_RXP1
DMI1_TXN1
DMI1_TXP1

MMC USBP4P K2
USBP5N

PEX1_LAN_RXN3
PEX1_LAN_RXP3
PEX1_LAN_TXN3
PEX1_LAN_TXP3

T25
T24
R28
R27

USB PORT-2 USBP2P H2
J4
USBP3N
WIMAX USBP3P J3
USBP4N

D2
D1

USB CONFIG.
USB 0 : PORT#1
USB 1 : WIRELESS LAN
USB 2 : PORT#2
USB 3 : WIMAX
USB 4 : MMC
USB 5 : BLUETOOTH
USB 6 : PORT#3
USB 7 : CAMERA

R508

P3.3V

2

3
VOLTAGE

CHP3_PCISTP#
CHP3_CPUSTP#

3

R565

10K

R563

10K

D

P26
P25
N28
N27

Wireless LAN USBP1P G3
USBP2N

PEX1_MINRXN2
PEX1_MINRXP2
PEX1_MINTXN2
PEX1_MINTXP2

M26
M25
L28
L27

USBP0N
USB PORT-1 USBP0P F2
USBP1N

PEX1_MINIRXN1
PEX1_MINIRXP1
PEX1_MINITXN1
PEX1_MINITXP1

1

SMB3_DATA_S

S

D

G

100nF
100nF

PETP1

SMBCLK
SMBDATA
LINKALERT*
SMLINK0
SMLINK1

SMBALERT*_GPIO11

F26
F25

WIRELESS LAN PETN1 E28 ICH_PETN1_C_MN
C602
E27 ICH_PETP1_C_MN
C601

22.6
1%

Q507
RHU002N06

0
0

5%

nostuff

HST3_SPI3_DO
HST3_SPI3_DI

S

G

R578
R603

PERN1
PERP1

GPIO21_SATA0GP
GPIO19_SATA1GP
GPIO36_SATA2GP
GPIO37_SATA3GP

2.2K

2

D

3
VOLTAGE

SMB3_DATA

1K

HST3_SPI3_CLK
HST3_SPI3_CS#

R579 R606

SMB3_CLK

100K 1%

10K

CHP3_SATACLKREQ#
CHP3_RFOFF#
CHP3_3GOFF#

A

C23

KBC3_WAKESCI#

R573

C21

C19

R572

2.2K

1K

0

KBC3_RSMRST#

AA4

AC22

ICH_PWRBTN_R_MN

P3.3V P3.3V_AUX
KBC3_RUNSCI#
KBC3_EXTSMI#

(0 : Pull Down / 1 : Default)

P3.3V

A28

A21

PCI3_DEVSEL#
PCI3_PERR#
PCI3_PLOCK#
PCI3_SERR#
PCI3_STOP#
PCI3_TRDY#
PCI3_FRAME#

G8
F7
F8
G7

AF19
AH18
AH19
AE19

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
PCI3_IRDY#

GNT5*
GNT4*

P3.3V

5%

CHP3_PCISTP#
CHP3_CPUSTP#

ICH7 BOOT BIOS SELECT

B

10K

SMB3_ALERT#

5%

C26
A9
B19
F21

10K
10K
10K
10K

MCH3_BMBUSY#

1K

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

AC caps : PCIE need to be within 250mils of the driver
Resistor for Test : Place Stuffing Option to minimize stubs

AUD3_SPKR
CHP3_SUSSTAT#
ITP3_DBRRESET#

R543

B15
C12
D12
C15

R560
R52
R57
R561

R605

10K

PCI3_REQ3#
PCI3_GNT3#
CHP3_BIOSWP#

1

nostuff
nostuff
nostuff
nostuff

C22
B22
A26
B25
A25

SMB3_CLK
SMB3_DATA
SMB3_LINKALERT#
CHP3_SMLINK0
CHP3_SMLINK1
R576

PCI3_REQ1#

CHP3_DPRSLPVR

Q502
RHU002N06

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

D

2

3
P3.3V

A

SAMSUNG
ELECTRONICS

2

1

8-18

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-19
4

AD17
G10
F6

P5.0V_AUX P3.3V_AUX
VOLTAGE

R27

10
1%

1
3

nearby F6

P5.0V

P3.3V
VOLTAGE

R537

D1
BAT54

100
1%

C557

1
3

C558

nearby G10

100nF
10V

P1.5V

D501
BAT54

100nF
10V

P1.5V_PCIE
B505
BLM18PG181SN1
C580

C577

C604

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

10000nF-X5R
100nF
6.3V
10V

100nF
10V

100nF
10V

P3.3V

within 100 mils

P1.5V
R82
R83

2.2
2.2

B7
BLM18PG181SN1
C76

10000nF
6.3V

B

within 100 mils
nearby AG28
C75

P3.3V

C547

100nF
10V

C515
100nF
10V

A1
AB10
AB17
AB7
AB8
AB9
AC10
AC17
AC6
AD2
AA7

P1.5V

within 100 mils
nearby AC10

C545
P3.3V_AUX

100nF
10V

P1.5V

within 100 mils

within 100 mils

C562

A5
AG28

10nF
25V

C546

1000nF-X7R 100nF
6.3V
10V

AC7
AC8
AD10
AD6
AE10
AE6
AF10
AF5
AF6
P7

within 100 mils

A

C553
100nF
10V

C1

P1.5V

AA2
Y7

within 100 mils

VCC1_5_B_1
VCC1_5_B_2
VCC1_5_B_3
VCC1_5_B_4
VCC1_5_B_5
VCC1_5_B_6
VCC1_5_B_7
VCC1_5_B_8
VCC1_5_B_9
VCC1_5_B_10
VCC1_5_B_11
VCC1_5_B_12
VCC1_5_B_13
VCC1_5_B_14
VCC1_5_B_15
VCC1_5_B_16
VCC1_5_B_17
VCC1_5_B_18
VCC1_5_B_19
VCC1_5_B_20
VCC1_5_B_21
VCC1_5_B_22
VCC1_5_B_23
VCC1_5_B_24
VCC1_5_B_25
VCC1_5_B_26
VCC1_5_B_27
VCC1_5_B_28
VCC1_5_B_29
VCC1_5_B_30
VCC1_5_B_31
VCC1_5_B_32
VCC1_5_B_33
VCC1_5_B_34
VCC1_5_B_35
VCC1_5_B_36
VCC1_5_B_37
VCC1_5_B_38
VCC1_5_B_39
VCC1_5_B_40
VCC1_5_B_41
VCC1_5_B_42
VCC1_5_B_43
VCC1_5_B_44
VCC1_5_B_45
VCC1_5_B_46
VCC1_5_B_47
VCC1_5_B_48
VCC1_5_B_49
VCC1_5_B_50
VCC1_5_B_51
VCC1_5_B_52
VCC1_5_B_53

ICH7-M

VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4
VCC1_05_5
VCC1_05_6
VCC1_05_7
VCC1_05_8
VCC1_05_9
VCC1_05_10
VCC1_05_11
VCC1_05_12
VCC1_05_13
VCC1_05_14
VCC1_05_15
VCC1_05_16
VCC1_05_17
VCC1_05_18
VCC1_05_19
VCC1_05_20

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

P1.05V

C579
100nF
10V

C582

C578

1000nF

100nF
10V

6.3V

EC500
220uF

C516

VCC3_3_1
VCCDMIPLL

VCC1_5_A_1
VCC1_5_A_2
VCC1_5_A_3
VCC1_5_A_4
VCC1_5_A_5
VCC1_5_A_6
VCC1_5_A_7
VCC1_5_A_8
VCC1_5_A_9

VCCSATAPLL
VCC3_3_2

VCC1_5_A_10
VCC1_5_A_11
VCC1_5_A_12
VCC1_5_A_13
VCC1_5_A_14
VCC1_5_A_15
VCC1_5_A_16
VCC1_5_A_17
VCC1_5_A_18

VCCSUS3_3_19

VCCUSBPLL
VCCSUS1_05_VCCLAN1_05_1
VCCSUS1_05_VCCLAN1_05_2

ICH1-4
82801GBM
4/5

0904-002053

VCCSUS3_3_VCCLAN3_3_1
VCCSUS3_3_VCCLAN3_3_2
VCCSUS3_3_VCCLAN3_3_3
VCCSUS3_3_VCCLAN3_3_4

VCCSUS3_3_VCCSUSHDA
VCC3_3_VCCHDA
V_CPU_IO_1
V_CPU_IO_2
V_CPU_IO_3

VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
VCCRTC

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12
VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCC1_5_A_19
VCC1_5_A_20
VCC1_5_A_21
VCC1_5_A_22
VCC1_5_A_23
VCC1_5_A_24
VCC1_5_A_25

VCCSUS1_05_1
VCCSUS1_05_2
VCCSUS1_05_3
VCC1_5_A_26
VCC1_5_A_27
VCC1_5_A_28
VCC1_5_A_29
VCC1_5_A_30

V1
V5
W2
W7

D

2.5V
AD

within 100 mils
nearby Pin M18, U18

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
C575

within 100mils
nearby D28, T28, AD28

C

AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23

V5REF_1
V5REF_2
V5REF_SUS

1

P3.3V

C551 within 100 mils
100nF
nearby Pin V5
10V

P3.3V_AUX P3.3V

R7
U6

P1.05V

AE23
AE26
AH26

AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
AH11
B13
B16
B27
B7
C10
D15
F9
G11
G12
G16

C58

100nF
10V

C574
100nF
10V

C585

100nF
10V

C560

100nF
10V

nostuff

100nF
10V

C550
100nF
10V

4700nF
6.3V

within 100 mils
nearby Pin AE23, AH26

nostuff

C552

C57

C

P3.3V

C561
100nF
10V

C7

100nF
10V

C544
100nF
10V

Distribute in PCI section

PRTC_BAT

W5

A24
C24
D19
D22
E3
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

AF9
AG5
AG9
AH5
AH9
F17
G17
C28
G20
K7

H6
H7
J6
J7
T7

C548
100nF
10V

C549
100nF
10V

P3.3V_AUX

C603

100nF
10V

C583
100nF
10V

C555

100nF
10V

C554
100nF
10V

B

within 100 mils
nearby Pin C24, G19, K5, M6

nostuff

P1.5V

C543
100nF
10V

C584 within 100 mils
100nF
nearby Pin AG9, F17
10V

P1.5V

C556 within 100 mils
100nF
nearby Pin J7
10V

A

100nF
10V

SAMSUNG
ELECTRONICS

4

3

2

1

N130

D

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

H27
H28
H3
H4
H5
J1
J2
J24
J25
J26
J5
K24
K27
K28
L13
L15
L24
L25
L26
M12
M13
M14
M15
M16
M17
M24
A23
A4
AA1
AA24
AA25
AA26
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AB4
AB6
AC11
AC2
AC5
AC9
AD1
AD11
AD15
AD19
AD23
AD3
AD4
AD7
AD8
AE11
AE13
AE18
AE2
AE21
AE24
AE25
AE4
AE8
AF11
AF2
AF27
AF28
AF4
AF8
AG1
AG11
AG14
AG17
AG20
AG25
AG3
AG7
AH1
AH12
AH23
AH27
AH3
AH7
B1
B11
B14
B17
B20
B26
B28
B8
C2
C27
C6
D10
D13

D
P3.3V_AUX
R91
R90

Function

Default

No Reboot
Safe Mode

No Stuff
TBD

P3.3V

R60
R12

10K

R604
R575

2.2K
2.2K

SMB3_ALERT#
SMB3_DATA
SMB3_CLK

1K 1%
10K

AUD3_SPKR
HDA3_AUD_SDO

R611

1K 1%

PEX3_WAKE#

Wake on PCI-E, OD, Pull-up to ALWAYS power

nostuff

C

P3.3V

R89

B

10K

SMB3_LINKALERT#

R54

10K

PCI3_CLKRUN#

R48
R567
R47
R571
R570
R43
R46
R569

10K
10K
10K
10K
10K
10K
10K
10K

R28
R44
R42
R45

10K
10K
10K
10K

R540
R541
R539
R538

10K
10K
10K
10K

R544
R59
R61
R542

10K
10K
10K
10K

R53

10K

R84
R272

10K
10K

R566

1K

PCI3_PERR#
PCI3_PLOCK#
PCI3_DEVSEL#
PCI3_FRAME#
PCI3_STOP#
PCI3_SERR#
PCI3_IRDY#
PCI3_TRDY#
PCI3_INTA#
PCI3_INTB#
PCI3_INTC#
PCI3_INTD#

PCI3_INTE#
PCI3_INTF#
PCI3_INTG#
FFS3_INT

PCI3_REQ0#
PCI3_REQ1#
PCI3_REQ2#
PCI3_REQ3#

CHP3_SERIRQ

KBC3_CPURST#
KBC3_A20G

ICH1-5
82801GBM
5/5
0904-002053

VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194

M27
M28
M3
M4
M5
N1
N11
N12
N13
N14
N15
N16
N17
N18
N2
N24
N25
N26
N5
N6
P12
P13
P14
P15
P16
P17
P24
P27
P28
P3
P4
R1
R11
R12
R13
R14
R15
R16
R17
R18
T12
T13
T14
T15
T16
T17
T6
U12
U13
U14
U15
U16
U17
U24
U25
U26
U4
V13
V15
V2
V24
V27
V28
W24
W25
W26
W6
Y24
Y27
Y28
Y3

D

C

B

D18
D21
D24
E1
E15
E2
E4
E8
F12
F27
F28
F3
F4
F5
G1
G14
G18
G2
G21
G24
G25
G26
G5
G6
G9
H24

PCI3_GNT3#

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-20

8. Block Diagram and Schematic

CHP3_SMLINK0
CHP3_SMLINK1

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
R88

P3.3V_AUX

nostuff

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

10K
10K

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71

VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97

CHP3_SPKR
AC97_SDOUT

1

ICH7-M

ICH7-M Options

N130

2

3

VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-21
4

SPI_BIOS_ROM
02
03
04
06
08
09
0A
0B
0C
OE
0F
10
11
13

D

16MBit

CHP3_BIOSWP#

B

10K

1
2
3
4

SPI3_WP#_MN

22-B3

3

1

34-B3
34-B4

R49

U5
MX25L1605D
CE*
SO
WP*
VSS

VDD
HOLD*
SCK
SI

1107-001709

10K

10K

SPI3_HOLD#_MN

34-B4
34-B4

C44

80H DECODER CONNECTOR

P3.3V

J510
HDR-10P-1R-SMD
PLT3_RST#
CLK3_DBGLPC
LPC3_LFRAME#
LPC3_LAD(3)
LPC3_LAD(2)
LPC3_LAD(1)
LPC3_LAD(0)

1
2
3
4
5
6
7
8
9
10

1%

R51

8
7
6
5

100nF
10V

2

66
6A
6C
6E
70
72
74
76
7C
7E
80
82
84
86
88
8A
8C
9A
9C
9E
A0
A4
A8
AA
AC
AE
B0
B2
B4
B6
B7
BA
BE
C0
D0
D2
D4
D6
D8
DA
DC
89
90
91
92
94
96
98

CONFIGURE ADVANCE CACHE REG.
DISPLAY EXTERNAL CACHE SIZE
DISPLAY SHADOW MESSAGE
DISPLAY NON-DISPOSABLE SEGMENT
DISPLAY ERROR MESSAGE
CHECK FOR CONFIGURATION ERROR
TEST REAL-TIME CLOCK
CHECK FOR KEYBOARD EERROR
SETUP HARDWARE INTERRUPT VECTOR
TEST COPROCESSER IF PRESENT
DISABLE ON-BOARD I/O PORT
DETECT AND INSTALL EXT.RS232C
DETECT AND INSTALL EXT.PARALLEL
RE-INIT. ON-BOARD I/O PORT
INIT. BIOS DATA ROM
INIT.EXTENDED BIOS DATA AREA
INIT. FDD CONTROLLER
SHADOW OPTION ROMS
SETUP POWER MANAGEMENT
ENABLE H/W INTERRUPT
SET TIME OF DAY
INIT. TYPEMATIC RATE
ERASE F2 PROMPT
SCAN FOR F2 KEY STROKE
ENTER SETUP
CLEAR IN POST FLAG
CHECK FOR ERRORS
POST DONE-PREPARE TO BOOT O/S
ONE BEEP
CHECK PASSWORD (OPTION)
ACPI INIT
DMI INIT
CLEAR SCREEN
TRY BOOT WITH INT19
INTERRUPT HANDLER ERROR
UNKNOWN INTERRUPT ERROR
PENDING INTERRUPT ERROR
SHUTDOWN 5
SHUTDOWN ERROR
EXTENDED BLOCK MOVE
SHUTDOWN 10
ENABLE NMI
INIT. HDD CONTROLLER
INIT. LOCAL BUS HDD CONTROLLER
JUMP TO USER PATCH 2
DISABLE A20 ADDRESS LINE
CLEAR HUGE ES SEGMENT REG.
SEARCH FOR OPTION ROMS

D

11 MNT1
12
MNT2

KBC3_SPI_CLK
KBC3_SPI_DO

14
16
18
1A
1C
20
22
24
26
28
32
34
38
3A
3C
3D
42
44
46
47
48
49
4A
4C
50
52
54
56
58
5A
5C
60
62
64

C

B

3711-000386

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

C

D5
BAT54C

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

R50
nostuff

34-A4

VERIFY REAL MODE
DISABLE NMI
GET CPU TYPE
INIT. SYSTEM H/W
INIT. CHIPSET REG.
SET IN POST FLAG
INIT CPU.REG
CPU CACHE ON
INIT.CACHE TO POST
INIT. I/O VALUE
ENABLE THE L-BUS IDE
INIT. POWER MANAGER
LOAD ALTERNATE REG.
PCI BUS MASTER RESET
WITH INITIAL POST VALUE
INIT. KEYBOARD CONTROLLER
CHECK CHECKSUM
8254 TIMER INIT.
8237 DMA CONTROLLER INIT.
RESET INTERRUP CONTROLLER
TEST DRAM REFRESH
TEST 8742 KEYBOARD CONTROLLER
SET ES SEGMENT REG. TO 4GB
ENABLE A20
AUTO SIZING DRAM
COMPUTE THE CPU SPEED
TESET CMOS RAM
SHADOW SYSTEM BIOS ROM
AUTO SIZING CACHE
CONFIGURE ADVANCED CHIPSET REG.
LOAD ALTER REG. WITH CMOS VALUE
INIT. INTERRUPT VECTOR
INIT. BIOS INTERRUPT
CHECK ROM COPYRIGHT NOTICE
INIT. I20 SUPPORT IF INSTALLED
CHECK VIDEO CONFIGURE AGAINST CMOS
INIT. PCI BUS AND DEVICE
INIT. ALL VIDEO BIOS ROM
SHADOW VIDEO BIOS ROM
DISPLAY CPU TYPE AND SPEED
TEST KEYBOARD
SET KEYCLICK IF ENABLED
ENABLE KEYBOARD
TEST FOR UNEXPECTED INTERRUPTS
DISPLAY " PRESS ...... SETUP"
TEST RAM GETWEEN 512K AND 640K
TEST EXTENDED MEMORY
TEST EXTENDED MEMORY ADDRESS LINE
JUMP TO USER PATCH 1

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
P3.3V_MICOM_SW

P3.3V_MICOM_SW

KBC3_SPI_CS#
KBC3_SPI_DI
KBC3_SPI_WP#

1

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

3

N130

4

SAMSUNG PROPRIETARY

1

2

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

100nF
10V

C13

100nF
10V

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

P3.3V

1

KBC3_BKLTON

J500
SOCK-30P-2R-SMD-MNT

LCD1_ADATA2
LCD1_ADATA2#
LCD1_ADATA0
LCD1_ADATA0#
LCD3_EDID_CLK
LCD3_EDID_DATA

100K
1%

LCD3_BKLTON

4

U1
7SZ08

C

For EBL.
P3.3V_AUX

P5.0V_ALW
R2

LCD_VDD3.3V

Q2
SI2315BDS-T1

200K
1%

31
32

-

R1

51.1K

1%

2

LCD1_ACLK
LCD1_ACLK#
LCD1_ADATA1
LCD1_ADATA1#

R17

C1

C5

330nF
10V

100nF

3710-002498

MCH3_LCD_VDDEN

S

2

R3

Q1
RHU002N06

100K
1%

VDC

nostuff

B500
ACM2012-900-2P-T

B

Must be changed to AO3409

R26

150K
1%

R25

51.1K

1%

Q6
SI2307BDS-T1-E3

C17

3

3

4

3

D

1

1

2

2

B

USB3_CAMERA-_B_MN
USB3_CAMERA+_B_MN

D

G

S

USB3_CAMERAUSB3_CAMERA+

0
0

10K
1%

1

R8
R7

R4

VDC_LED

C15

G

100nF
25V

100nF
25V

C16

100nF
25V

R14

43.2K
1%

LCD3_BKLTON

R15

10K

D

3

S

2

1%
G
1

Q3
RHU002N06

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-22

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

LCD3_BRIT

C

100K
1%

MCH3_LCD_BKLTEN

+

3

S

2
1
3
4
5
6
7
8
9
10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
MNT1
MNT2

R16

5

2

3

C14

D

100nF
10V

D

P5.0V

1

C6

P3.3V

R6
R5

100nF
10V

P3.3V

VDC_LED

G

C4

P3.3V

2.2K
2.2K

LCD_VDD3.3V

B18
BLM18PG181SN1

D

8-23
4

3

SAMSUNG PROPRIETARY

1

2

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D

D
VCC_CRT

P5.0V

D4
MMBD4148
VOLTAGE
3

1

C34

100nF
10V

U3
SN74AHCT1G125DCKR
2

CRT3_HSYNC

5

OE*
1

R39

+
4
3

40.2

5%

C
C35

U4
SN74AHCT1G125DCKR
2

CRT3_VSYNC

OE*
1

100nF
10V

5
+
4
3

R37

40.2 5%

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

CRT5_VSYNC

C

P5.0V

VOLTAGE

MMBD4148
D500

1
3

BLM18PG181SN1
B503

nostuff
nostuff
nostuff

2
1
VOLTAGE

PGB1010603NR
D505

2
1
VOLTAGE

PGB1010603NR
D506

150

2
1
VOLTAGE

PGB1010603NR
D507

1%

150

J504
DSUB-15-3R-F

B
16
17

3701-001403

270pF

0.1nF

0.1nF

C31

C32

50V 50V 50V

270pF

50V

CRT3_BLUE_L_MN

R555

1%

1%

150

R556

50V 50V 50V

R557

0.022nF
50V

0.022nF

C572

CRT5_DDCDATA
CRT5_DDCCLK
CRT5_HSYNC
CRT5_VSYNC

CRT5_DDCCLK

1
6
11
2
7
12
3
8
13
4
9
14
5
10
15

CRT3_GREEN_L_MN

C568

82nH

0.022nF

82nH

L502

C30

D

RHU002N06
Q5

3

2

L501

100nF
10V

CRT3_RED_L_MN

C33

R23

2.2K

0.022nF
50V

82nH

C570

VCC_CRT

C571

L503

0.022nF

D

VOLTAGE

C573

0.022nF
50V

P3.3V

S

CRT3_DDCCLK

CRT3_GREEN

CRT5_DDCDATA

RHU002N06
Q7

R24

2.2K

CRT3_RED

CRT3_BLUE

G

P3.3V

1

B

C534

CRT CONNECTOR

C569

G

R38

2.2K
3

1

VCC_CRT

S

R40

2.2K

CRT3_DDCDATA

P3.3V

2

P3.3V

VOLTAGE

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

VCC_CRT

CRT5_HSYNC

2

3

1

AUdio Codec (ALC269)

D

D

P3.3V

Codec Pin9 Setting
S/B with Low Voltage IO

S/B without Low Voltage IO
Pin9 : 3.3V
C725

C720

10000nF-X5R
10V

100nF
10V

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

SMD_A : 3711-000922
SMD_S : 3711-000456

P3.3V

C719

C52

1000nF-X5R 6.3V

AUD3_SPKR_C_MN

1

75V

R66

3 R69

15K 1%

AUD3_SPKR_D_MN

R68

4.7K
1%

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

10K
1%

C70

HDA3_AUD_SDO
HDA3_AUD_BCLK
HDA3_AUD_SDI0
HDA3_AUD_SYNC
HDA3_AUD_RST#

4.7nF
25V

nostuff

C

R712

AUD3_SPKR_R_MN

G_AUD

C69

AUD3_SPKR_RC_MN

1000nF-X5R 6.3V

R705

P5.0V_AUD

KBC3_SPKMUTE_R_MN

2.2K

AUD5_SENS_MIC#
AUD5_SENS_HP#

AUD5_JDREF_R_MN

20K

R98
R67

29-D2

100nF
10V

C91

JDREF

SENSE_A
SENSE_B

39
46
42
43

100nF
10V

7

P4.75V_AUD
C90

B

EAPD_SPDIF02
SPDIF01

13
18

AUD5_SENS_A_MN

C94

PD#

47
48
19

1%

20K 1%
39.2K 1%

100nF
10V

100nF
10V

CBN
CBP

MIC1_R_B
MIC1_L_B

MIC1_VREFO_R
MIC1_VREFO_L
MIC2_R_F
MIC2_L_F

MIC2_VREFO
LINE1_R_C
LINE1_L_C

PVSS1
PVSS2

LINE2_R_E
LINE2_L_E

MONO_OUT

AVDD1
AVDD2

26
37

CPVEE

PVDD1
PVDD2

DVSS

25
38

C717

HPOUT_L_I
HPOUT_R_I

GPIO0_DMIC_DATA
GPIO1_DMIC_CLK

4

R711

29-C2

SPK_OUT_LSPK_OUT_L+

BEEP

2
3

KBC3_SPKMUTE#

SPK_OUT_RSPK_OUT_R+

SDATA_OUT
BCLK
SDATA_IN
SYNC
RESET#

12

AVSS1
AVSS2

VREF

CPVREF

THERMAL

44
45

SPK5_R_M_MN
SPK5_R_P_MN

B17
B16

BLM18PG181SN1
BLM18PG181SN1

41
40

SPK5_L_M_MN
SPK5_L_P_MN

B15
B14

BLM18PG181SN1
BLM18PG181SN1

32
33
35
36

P5.0V_AUD

RGND-SHORT

SHORT2

RGND-SHORT

2200nF-X5R10V C68
AUD5_CPVEE_MN
22 AUD5_MIC1_RIGHT_C_MN
21 AUD5_MIC1_LEFT_C_MN

30 AUD5_MIC1_VREFO_R_MN
28 AUD5_MIC1_VREFO_L_MN

C724

10000nF-X5R
10V

A

1
2
3

C93

100nF
10V

SHORT5

R1608-SHORT

SHORT6

R1608-SHORT

IN
OUT
GND
EN BYPASS

CANTERBURY

1000nF-X5R
1000nF-X5R

6.3V
6.3V

C256
1nF
50V

CANTERBURY

2203-006399|n_c1005-h0055

C255
1nF
50V

C254
1nF
50V

C253

1nF
50V
CANTERBURY

29-C2
29-C2

AUD5_MIC1_RIGHT
AUD5_MIC1_LEFT

29-B4

AUD5_MIC2_INT

29-C3

AUD5_MIC2_VREF

2203-006399|n_c1005-h0055

Do not make a testpoint in these nets

29

5
6

1
2
3
4
MNT1
MNT2
3711-000922

C

CANTERBURY

24
23
15
14

G_AUD

20
27

AUD5_VREF_MN

31

C716

49

4700nF-X5R
10V

B

C718
100nF
10V

G_AUD G_AUD

R281

0

R282

0

SHORT506
INSTPAR

5

4 AUD5_LDO_BYPASS_MN

C721

100nF
10V

1203-005579

2nd Vendor : 1203-003344
(MIC5252-4.75BM)

SHORT507

C723

10000nF-X5R
10V

INSTPAR

G_AUD

A

C87

1000nF-X5R

nostuff

6.3V

G_AUD

4

C50
C51

17 AUD5_MIC2_RIGHT_C_MN
16 AUD5_MIC2_LEFT_C_MN

B9
BLM18PG181SN1

U510
G916-475T1UF

2200nF-X5R10V

Do not make a testpoint in these nets
R702 1K
2203-006399|n_c1005-h0055
1000nF-X5R 6.3V
C714
1000nF-X5R 6.3V
C715
2203-006399|n_c1005-h0055
1K
R703
4.7K
1%
R710
1%
4.7K
R709

34

P4.75V_AUD

G_AUD

AUD5_HP_O_LEFT
AUD5_HP_O_RIGHT

C722

AUD5_CBN_MN
AUD5_CBP_MN

SPK5_R_M_B_MN
SPK5_R_P_B_MN
SPK5_L_M_B_MN
SPK5_L_P_B_MN

CANTERBURY

29-D3
29-D3

1205-003769

SHORT3

J513
HDR-4P-SMD

CANTERBURY

DVDD
DVDD_IO

5
6
HDA3_AUD_SDI0_R_MN 8
10
11

22

G_AUD

22-B3

1
9

100nF
10V

D6
MMBD4148

U511
ALC269Q-GR

nostuff

G_AUD

3

SAMSUNG
ELECTRONICS

G_AUD

2

1

8-24

Pin9 : 1.5V

AUD3_SPKR

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-25
4

2

3

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

HEADPHONE

D

56

AUD5_HP_LEFT_R_MN

28-C3

5

B522

BLM18PG181SN1

B521

BLM18PG181SN1

4
3
6
2
1
G4
G3
G2
G1

AUD5_HP_RIGHT_B_MN
AUD5_HP_LEFT_B_MN

50V

AUD5_HP_RIGHT_R_MN

50V

R706

28-C2

56

0.1nF

0.1nF

0.1nF

C252

C654

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
C251

AUD5_HP_O_LEFT

R707

28-C2

50V

AUD5_SENS_HP#
AUD5_HP_O_RIGHT

D

JACK-PHONE-6P

3722-002903

J509

R
L

nostuff

G_AUD

C

C

MIC JACK

3722-002903

AUD5_MIC1_RIGHT

B520

BLM18PG181SN1

AUD5_MIC1_RIGHT_J_MN

AUD5_MIC1_LEFT

B519

BLM18PG181SN1

AUD5_MIC1_LEFT_J_MN

B

0.1nF

0.1nF

0.1nF

J507

C249

C639

50V

AUD5_MIC1_LEFT

50V

AUD5_MIC1_RIGHT

50V

AUD5_SENS_MIC#

C248

nostuff

JACK-PHONE-6P
5

4
3
6
2
1
G4
G3
G2
G1

R
L

B

G_AUD

28-C1

R681

4.7K
1%

AUD5_MIC2_INT

R682

28-C1

47nF
50V

nostuff
G_AUD

Mono Mic Ass’y : Place inside Audio Analog Plane

AUD5_MIC2_INT_J_MN

1K
AUD5_MIC2_INT_B_MN

C681

Connect to Mount-hole.

AUD5_MIC2_VREF

B518
BLM18PG181SN1

1
2

C699

MIC1
SOM4013SL-G443-C1033
MIC_SIG
GND

C712

3003-001158|mic-2p-2side-1a

0.1nF
50V

C700

10nF

10nF

25V

C146

10nF

25V

C711

10nF

25V

25V

G_AUD

G_AUD

G_AUD

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

Connect to Mount-hole.

2

3

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1

LAN Controller (RTL8103EL)

D

D

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
P1.2V_LAN

100nF

P3.3V_AUX

100nF

1%

C2

2.49K

TD+
TX+
TDCT TXCT
TXTD-

2603-000099

10
11
9

LAN1_TXP_MN
LAN1_TXCT_MN
LAN1_TXN_MN

9
10

1%

7
6
8

LAN1_RXP_MN
LAN1_RXCT_MN
LAN1_RXN_MN

1%

30-B4

16
14
15

1%

30-B4

RD+
RX+
RDCT RXCT
RXRD-

8
7
6
5
4
3
2
1

J518
JACK-LAN-8P
TRD4TRD4+
TRD2TRD3TRD3+
TRD2+
TRD1TRD1+
MNT1
MNT2

C

3722-002914

75
75
75
75

LAN1_MDI0P

LAN1_MDI0N

10V

LAN1_MDI1N

1
3
2

C3

R41

C500

C9

C38

100nF
10V

P3.3V_AUX

C535

100nF
10V

100nF
10V

1nF
3KV

C536
100nF
10V

LAN1_MDI0P
LAN1_MDI0N

30-C2
30-C2

LAN1_MDI1P
LAN1_MDI1N

30-C2
30-C2

B
P1.2V_LAN

C510 C12
100nF
10V

100nF
10V

1
2
3
4
5
6
7
8
9
10
11
12

AVDD33
MDIP0
MDIN0
NC_1
MDIP1
MDIN1
GND_1
NC_2
NC_3
DVDD12_1
NC_4
NC_5

DVDD12_4
LED1_EESK
LED2_EEDI_AUX
U502
LED3_EEDO
RTL8103EL-GR
EECS
GND_3
1205-003798
DVDD12_3
VDD33_1
ISOLATE#
PERST#
LANWAKE#
CLKREQ#

DVDD12_2
GND_2
HSIP
HSIN
REFCLK_P
REFCLK_N
VDDTX
HSOP
HSON
GNDTX
NC_6
NC_7

100nF
10V

VCTRL12A
GND_4
RSET
VCTR12
NC_11
NC_10
CKTAL2
CKTAL1
NC_9
NC_8
LED0
VDD33_2

48
47
46
45
44
43
42
41
40
39
38
37

P3.3V_AUX

C10

13
14
15
16
17
18
19
20
21
22
23
24

36
35
34
33
32
31
30
29
28
27
26
25

21-A4
21-A4
12-B1
12-B1
21-B4
21-B4

C540
C539

100nF 10V
100nF 10V

PEX1_LAN_RXP3_C_MN
PEX1_LAN_RXN3_C_MN

Place AC coupling capacitors
close to LAN chip.
C538

1000nF-X5R
6.3V

A

R528
10K
1%

R529

34-B3

1K

C537

R531

1K
1%

1%

25-A4,32-C3 14-B1,21-C1
34-C3 22-C4,32-D4

P3.3V_AUX

B

C41

PLT3_RST#
PEX3_WAKE#

100nF
10V

R530

R558 10K

nostuff
nostuff

PEX1_LAN_TXP3
PEX1_LAN_TXN3
CLK1_PCIELOM
CLK1_PCIELOM#
PEX1_LAN_RXP3
PEX1_LAN_RXN3

P3.3V

1%

12-B1

R532

15K
1%

P3.3V

LOM3_CLKREQ#

0

Place close to pin19.

1000nF-X5R
6.3V

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-26

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

100nF
10V

0.015nF
50V

30-B4

30-B4

LT1
LFE8423

R500
R503
R501
R502

0.015nF
50V

C39

C

C36

C37

LAN1_MDI1P

10V

P1.2V_LAN

1

2

Y501
25MHz

1%

Place crystal within 0.75inches from LAN chip.

8-27
4

2

3

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D

D

MMC

P3.3V
C703

C

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

C694
100nF
10V

C690

100nF
10V

15
26
35

P5.0V

25

C691

C692

2200nF-X5R
10V

UPDATE AS EMI/SI REQUEST
5% 33
R683

MCD3_SDCLK

0.01nF
0.5pF
50V

nostuff

C687

0.022nF
50V

48
47
46

MCD3_SDCLK_R_MN

20
19
21
22
39
13
14

C704
0.01nF
0.5pF
50V

MMC3_PDMOD_MN

R693

P3.3V

nostuff

R684

B

7
8

USB3_MMCUSB3_MMC+

MCD3_SD_SPD
MCD3_CLK_IN

CLK3_FM48
C686

100nF
10V

C676

10K

R685
10K

2200nF
10V

nostuff

C688

100nF
10V

0

2
17

5
9
12
16
27
34

MMC_TESTMOD_MN

DVDD_1
DVDD_2
DVDD_3
VDD5V
DM
DP

GPIO1
GPIO2
GPIO3
CS
SK
DO
DI

CLK
X1
X2

PDMOD
TESTMOD
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6

AVDD_1
AVDD_2
PMOSO

VDD180
D0
D1
D2
D3
D4
D5
D6
D7

SD_CMD
SD_CDZ
SD_WP
MS_BS
MS_INS

XD_CDZ
XD_RBZ
XD_CE
XD_WEZ
XD_WPZ

RREF
EXTRSRZ

10000nF-X5R
6.3V

100nF
10V

6
11

40mil pattern
C

P3.3V_MCD

36

MMC_VDD180_C_MN

4 C701

100nF

10V

40
43
37
29
28
30
32
38

MCD3_SDDAT0
MCD3_SDDAT1
MCD3_SDDAT2
MCD3_SDDAT3

41
23
3

MCD3_SDCMD
MCD3_SDCD#
MCD3_SDWP

MCD3_SDDAT3
MCD3_SDCMD

31-C3
31-C3

MCD3_SDCLK

31-B3

MCD3_SDDAT0
MCD3_SDDAT1
MCD3_SDDAT2
MCD3_SDCD#
MCD3_SDWP

31-C3
31-C3
31-C3
31-C3
31-C3

R667

R661
R660
R668

49.9

1%

49.9
49.9
49.9

1%

MCD3_SDDATA3_MN

1%

1%

MCD3_SDDATA0_MN
MCD3_SDDATA1_MN
MCD3_SDDATA2_MN

1
44
31
42
45

MMC_RREF_MN

10
18

R686
C693

1%
715

100nF
10V

1
2
3
4
5
6
7
8
9
10
11
12
13

33
24

J515
EDGE-SD-9P
CD_DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
DAT2
CARD_DETECT
WRITE_PROTECT
MNT1
MNT2
3709-001492

B

3-in-1 Socket
Support : SD/MMC/SDHC

0233665400

R688

0

PLT3_RST#

P3.3V

R689

Power Down Mode
PU : No Stuff, PD : Stuff
PU : Stuff, PD : No Stuff

100nF
10V

C689

C702

U16
GL827S

C677

827S-05 and later
Power Saving Mode Enable
Remote Wake Up Enable

P3.3V

MCD3_SD_SPD

10K

R687

R690

R691

MCD3_SD_SPD
MCD3_CLK_IN

10K

PU / PD : No Stuff
PU : Stuff, PD : No Stuff

MCD3_CLK_IN

10K

10K

SD v1.0 Clock Option
24 MHz (default)
15 MHz

827S Clock Source option

PU : X, PD : X
PU : No Stuff, PD : Stuff

12MHz, fixed S/N
12MHz, no S/N

PU : Stuff, PD : No Stuff

48MHz

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

10000nF-X5R
6.3V

P3.3V

P3.3V_MCD

2

3

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D

D

WLAN, 5.2mm
P3.3V

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
P3.3V

P3.3V

P3.3V

CLK1_MINIPCIE#
CLK1_MINIPCIE

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

PEX1_MINIRXN1
PEX1_MINIRXP1
PEX1_MINITXN1
PEX1_MINITXP1

SIM_RSVD_C8
SIM_RSVD_C4
GND_5
PERN0
PERP0
GND_7
GND_8
PETN0
PETP0
GND_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_17
RSVD_18

P3.3V_1
GND_1
P1.5V_1
SIM_VCC_C1
SIM_DATAIO_C7
SIM_CLK_C3
SIM_RESET_C2
SIM_VPP_C6
GND_4
W_DISABLE*
PERST*
P3.3V_AUX
GND_6
P1.5V_2
SMB_CLK
SMB_DATA
GND_9
USB_DUSB_D+
GND_11
LED_WWAN*
LED_WLAN*
LED_WPAN*
P1.5V_3
GND_12
P3.3V_2
MNT1
MNT2

B
3709-001470

2
4
6
8
10
12
14
16

C624

P3.3V

C611

10000nF
6.3V

nostuff

100nF

C247

C608

10000nF
6.3V

100nF

C

C609
100nF

nostuff

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

R714

0

CHP3_RFOFF#
PLT3_RST#

USB3_MINIPCIE1USB3_MINIPCIE1+

53
54

WLON_LED#

Mini PCI Express Card
30.00 mm

50.95 mm

MIN3_CLKREQ#

WAKE*
RSVD_1
RSVD_2
CLKREQ*
GND_2
REFCLKREFCLK+
GND_3

P3.3V

R613

C

J506
MINICARD-52P

10K

Top

Pin 1

CHP3_RFOFF#

D

3

S

2

G

1

Q508
RHU002N06
VOLTAGE

B

Odd Pins : Top side
Even Pins : Bottom Side

M500
HEAD
DIA
LENGTH

BA61-01102A|screw-118-1_b

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-28

8. Block Diagram and Schematic

1
3
5
7
9
11
13
15

48.05 mm

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

10K
1%

1%

R627

8-29
4

2

3

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

HSDPA / WIBRO, 5.2mm
P3.3V

D

P1.5V P3.3V

1
3
5
7
9
11
13
15

3709-001401

GND_4
W_DISABLE*
PERST*
P3.3V_AUX
GND_6
P1.5V_2
SMB_CLK
SMB_DATA
GND_9
USB_DUSB_D+
GND_11
LED_WWAN*
LED_WLAN*
LED_WPAN*
P1.5V_3
GND_12
P3.3V_2

10K

HSDPA

B

C1
C2
C3

SIM3_C1VCC
SIM3_C2RST
SIM3_C3CLK

C4
C8

SIM3_C4DET

50V

0.01nF 0.5pF

0.01nF 0.5pF

C564

0

R239

HSDPA

0

CHP3_3GOFF#
PLT3_RST#

HSDPA

SMB3_CLK
SMB3_DATA

USB3_MINIPCIE2USB3_MINIPCIE2+

Mini PCI Express Card

SIM3_C4DET

53
54

C

30.00 mm

Top

Pin 1

Odd Pins : Top side
Even Pins : Bottom Side

HSDPA

C1
C2
C3

C5
C6
C7

CD_U
CD_L

MNT1
MNT2

HSDPA

C5
C6
C7

B

SIM3_C6VPP
SIM3_C7DATA

1
2

C586
0.01nF
0.5pF
50V

nostuff
nostuff

nostuff

HSDPA
HSDPA
HSDPA

PGB1010603NR
D504
PGB1010603NR
D509

50V
1000nF-X5R 6.3V

C563

2
1
VOLTAGE

C559

2
1
VOLTAGE

R241

J501
EDGE-SIM-8P-MNT

3709-001478

2
1
VOLTAGE

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

HSDPA

A

PGB1010603NR
D508
PGB1010603NR
D502
PGB1010603NR
D503

A

4

SAMSUNG
ELECTRONICS

3

2

1

N130

R577

M501
HEAD
DIA
LENGTH

SIM3_C1VCC
SIM3_C7DATA
SIM3_C3CLK
SIM3_C2RST
SIM3_C6VPP

50.95 mm

SIM_RSVD_C8
SIM_RSVD_C4
GND_5
PERN0
PERP0
GND_7
GND_8
PETN0
PETP0
GND_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_17
RSVD_18

MNT1
MNT2

P3.3V

BA61-01090A

10K

2
1
VOLTAGE

C

nostuff

R240

2
4
6
8
10
12
14
16

48.05 mm

8. Block Diagram and Schematic

PEX1_MINTXN2
PEX1_MINTXP2

100nF

HSDPA

P3.3V_1
GND_1
P1.5V_1
SIM_VCC_C1
SIM_DATAIO_C7
SIM_CLK_C3
SIM_RESET_C2
SIM_VPP_C6

WAKE*
RSVD_1
RSVD_2
CLKREQ*
GND_2
REFCLKREFCLK+
GND_3

100nF

C660

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

PEX1_MINRXN2
PEX1_MINRXP2

J511
EDGE-MINIPCI-E-52P

2
1
VOLTAGE

CLK1_MINI3PCIE#
CLK1_MINI3PCIE

C240

10000nF
6.3V

10K

EXP3_CLKREQ#

HSDPA

C189

R672

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

HSDPA

P3.3V

P3.3V

nostuff
nostuff
nostuff

D

P3.3V

3

2

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D

D

SATA I/F CONN

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
S1
S2
S3
S4
S5
S6
S7

SAT1_TXP0
SAT1_TXN0

SAT1_RXN0
SAT1_RXP0

P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15

P3.3V

nostuff

C616

C618

10000nF
6.3V

1nF
50V

nostuff

C617
100nF
10V

nostuff

P5.0V

B

C596

100nF
10V

C594

10000nF
6.3V

nostuff

C593

10000nF
6.3V

C595
100nF
10V

C592

100nF
10V

M1
M2

nostuff

C

JHDD500
HDD-22P-SMD
GND1
TX+
TXGND2
RXRX+
GND3

SIGNAL

C

3.3V_1
3.3V_2
3.3V_3
GND4
GND5
GND6
5V_1
5V_2
5V_3
GND7
RESERVE
GND8
12V_1
12V_2
12V_3

POWER

B

MNT1
MNT2

3710-002736

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-30

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

SATA HDD CONN

8-31
4

2

3

SAMSUNG PROPRIETARY

MICOM_MEC1308

P3.3V_MICOM
P3.3V

P3.3V_MICOM_SW

MICOM RESET

nostuff
nostuff
C588

C60

C43

10V

10V

100nF

100nF
10V

100nF

C610

34-B2,40-D2

D

C587

Q504
RHU002N06

100nF
10V

100nF
10V

LPC3_LAD(0:3)

46
48
50
51
52
53
54
55
57
59

0
1
2
3

LPC3_LFRAME#
PLT3_RST#
CLK3_PCLKMICOM
PCI3_CLKRUN#
CHP3_SERIRQ

B

76

KBC3_RUNSCI#
HST3_SPI3_CLK
HST3_SPI3_DO
HST3_SPI3_DI
HST3_SPI3_CS#

R590

22

R594

22

R589

KBC3_SPI_CLK
KBC3_SPI_DI
KBC3_SPI_DO
KBC3_SPI_CS#

2
94
127
96
31
3
95
128
97
32

22

R591

22

41
42
43
44
38

VRM3_CPU_PWRGD
CHP3_SLPS5#
CHP3_SLPS4#
CHP3_SUSSTAT#
CLK3_MICOM_XTAL1_MN

R92

1M

70
71

1%

nostuff

C623

0.022nF
50V

1

4

2

3

Y503
0.032768MHz

4

C622

0.022nF
50V

HSTCLK_GPIO41
HSTDATAIN_GPIO43 (MISO)
HSTDATAOUT_GPIO45 (MOSI)
HSTCS0#_GPIO44
HSTCS1#_GPIO42
FLCLK
FLDATAIN
FLDATAOUT
FLCS0#
FLCS1#
ADC3_GPIO23
ADC2_GPIO40
ADC1_GPIO46
ADC0_GPIO47
GPIO19

XTAL2

S

2

P3.3V_AUX

G

AB1A_DATA
AB1A_CLK
AB1B_DATA
AB1B_CLK

TEST_PIN
PWRGD
VCC1_RST#
GPIO10
NBAT_LED
NPWR_LED_8051TX
NFDD_LED_8051RX

124
125
123
122
121
120
118

KBC3_LED_ACIN#

107
79
80
60
85
86
87

KBC3_CHGEN
KBC3_PRECHG
KBC3_CHG4.2V
THM3_ALERT#

3

THM3_STP#_R_MN

2

D

S
G1

R583

8-C2

100K
1%

THM3_STP#

10kohm pull-up to P3.3V_AUX
should be at the thermal sensor side.

KBC3_EXTSMI#
KBC3_CPURST#
KBC3_WAKESCI#

KBC3_LED_POWER#

P3.3V P3.3V_AUX

103
105
75
73
74
93
98
99
100
126
65
64
63
1
34
33
30

ADT3_SEL#
PEX3_WAKE#
CHP3_SLPS3#

R95

KBC3_CHG2000
KBC3_VRON
KBC3_A20G

C61

300K
1%

KBC3_EXTSMI#
KBC3_WAKESCI#

KBC3_DETECT#

R93

R587
R592

10K
10K

P5.0V_STB

nostuff
nostuff

R553
200K
1%

10nF
25V

KBC3_CAPSLED#

D

KBC3_PWRON
KBC3_USBCHG

KBC3_USBPWRON#

KBC3_SMDATA#
KBC3_SMCLK#
KBC3_THERM_SMDATA
KBC3_THERM_SMCLK

P3.3V

R94

10K

0

KBC3_LED_CHARGE#
KBC3_TX
KBC3_RX

R595

KBC5_TCLK
KBC5_TDATA
KBC5_KCLK
KBC5_KDATA
KBC5_MCLK
KBC5_MDATA

10K
1%

KBC3_PWRSW#

KBC3_TX
KBC3_RX

1
2
3
4

0

C567

VOLTAGE

100nF

Q501
SI2315BDS-T1

2

KBC3_TX
KBC3_RX
KBC3_LED_ACIN#
KBC3_LED_CHARGE#

P3.3V_MICOM_SW

Q505
RHU002N06

C
R554

VOLTAGE

S

KBC3_SMDATA#
KBC3_SMCLK#

LID3_SWITCH#
PLT3_RST#
KBC3_SPI_WP#

111
112
109
110

1

nostuff
nostuff
nostuff

KBC3_BKLTON
KBC3_RSMRST#
KBC3_PWRBTN#
KBC3_SPKMUTE#

3

G

KBC3_RST#

P3.3V_MICOM_SW

P3.3V_MICOM

3

KBC3_RUNSCI#

10K

D

P3.3V_MICOM_SW

88
89
90
91
92
101
102

69
78
77
116
113
115
114 R588

R582

4.7K
1%

BSS84
Q503

40

1

AVCC

VCC2

49

14
39
58
84
106
119

VCC0

NEC_SCI

CLK3_MICOM_XTAL2_MN

A

GPIO20_PS2CLK
GPIO21_PS2DAT
32KHZ_OUT_GPIO22_WK_SE01
GPIO25
GPIO27_WK_SE05
GPIO28
GPIO29_BC_CLK
GPIO30_BC_DAT
GPIO31_BC_INT#
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37_CIR_LED
GPIO38_CIR_IN
GPIO39

LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCI_CLK
CLKRUN#
SER_IRQ
NC_TEST_CLK

XTAL1

GPIO01
GPIO02
GPIO03
NRESET_OUT_GPIO06
GPIO07_PWM3
GPIO08_RXD
GPIO09_TXD

GPIO11_AB2A_DATA
GPIO12_AB2A_CLK
GPIO13_AB2B_DATA
GPIO14_AB2B_CLK
GPIO15_FAN_TACH1
GPIO16_FAN_TACH2
GPIO17_A20M

IMCLK
IMDAT
KCLK
KDAT
EMCLK
EMDAT

3

P3.3V_MICOM_SW
R596
R593

4.7K
4.7K

R585
R584
R586
R597

10K
10K
10K
10K

1%
1%

B
P5.0V

R580
R581
R608
R607
R610
R609

10K
10K
10K
10K
10K
10K

1%
1%
1%
1%
1%
1%

TP2000

MODE0
TX
RX
GND

CAP

KBC5_TCLK
KBC5_TDATA
KBC5_KCLK
KBC5_KDATA
KBC5_MCLK
KBC5_MDATA

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
OUT0_SCI
OUT1
OUT7_NSMI
OUT8_KBRST
OUT9_PWM2
OUT10_PWM0
PWM1_OUT11

MICOM Crisis Update

15

35
36
61
62
66
67

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7

29
28
27
26
25
24
23
22

0
1
2
3
4
5
6
7

U6
MEC1308-NU

11
37
47
56
82
104
117

KBC3_SUSPWR
KBC3_PWRGD
KBC5_KSI(0:7)

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12_GPIO00_KBRST
KSO13_GPIO18
GPIO04_KSO14
BA09-00021A
GPIO05_KSO15
GPIO24_KSO16
GPIO26_KSO17

AVSS
AGND

C

21
20
19
18
17
16
13
12
10
9
8
7
6
5
81
83
4
108

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

45
72

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

KBC5_KSO(0:15)

VCC1_1
VCC1_2
VCC1_3
VCC1_4
VCC1_5
VCC1_6

68

THM3_STP#_Q_MN

D

2

100nF
10V

S

C85

KBC3_RST#

C42

A

SAMSUNG

Condition: P90=P91=P92=High(MICOM_P3V)
MD0=MD1=Low(0V)
Serial Port: P84 & P85

4700nF-X5R
10V

3

2

ELECTRONICS

1

N130

0

D

1

R102

1

G

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

2

3

N130

4

SAMSUNG PROPRIETARY

1

Micom Glue Logic

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D

D

Power Switch Button

KEYBOARD

TOUCHPAD
2

1

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

P5.0V

KBC5_KSI(0:7)

KBC3_TX

1%
1%
1%
1%
1%
1%
1%
1%

26
27

10K
10K
10K
10K
10K
10K
10K
10K

P3.3V_MICOM

R694
R695
R696
R697
R698
R699
R700
R701

B

nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff

3708-002166

C679

3

100nF
10V

P3.3V_MICOM

8 7 6 5

4

KBC3_PWRSW#

3

1

2

VOLTAGE

BAV99LT1
D510

MNT1
MNT2
MNT3
MNT4

nostuff

J516
CONN-6P-FPC

T_L_BUTTON#

T_R_BUTTON#
KBC5_TDATA
KBC5_TCLK

C680
0.1nF
50V

nostuff

C678
0.1nF
50V

nostuff

C695

7
8

C696

0.1nF
50V

0.01nF
0.5pF
50V

nostuff

nostuff

1
2
3
4
5
6
MNT1
MNT2

C

3708-002402

LID_SWITCH

P3.3V_MICOM

C47

1000nF-X5R
6.3V

1

3

U7
A3212ELH/HED55XXU12
SUPPLY
OUTPUT
GND

2

3

2

P5.0V
3

4

3404-001311

1

2

R63
20K
1%

SW2
SW-TACT-4P

1

T_R_BUTTON#

P3.3V_MICOM

B

VOLTAGE

nostuff

LID3_SWITCH#

BAV99LT1
D12

1009-001010

SW1
SW-TACT-4P

1

T_L_BUTTON#

3

2

P5.0V
3
2

1

4

3404-001311

VOLTAGE

nostuff

BAV99LT1
D11

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-32

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

C

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
MNT1
MNT2

PU TO P3.3V_MICOM IS at micom logic side.

SW3
SSS-12LG-V-T/R

J1
FPC-KBD-25P

KBC5_KSO(0:15)

8-33
4

3

SAMSUNG PROPRIETARY

2

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D

D

C

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

C

ADAPTERIN/CHARGING LED

FUNCTION KEY LED

P3.3V_MICOM

P3.3V

LED4
LTST-C195KGJRKT

KBC3_LED_ACIN#

LED1
LTST-C193TBKT-AC

KBC3_LED_CHARGE#

R675

B

1

34-C3

2

KBC3_CAPSLED#

KBC3_CAPSLED#_LED_MN

KBC3_LED_ACIN#_R_MN

3

G 1

R679

475

1%

4

R 2

R279

475

1%

KBC3_LED_CHARGE#_R_MN

475
1%

B

P3.3V_AUX

1

20-B3

2

LED2
LTST-C193TBKT-AC
CHP3_SATALED#

R676

475
1%

R677

475
1%

CHP3_SATALED#_LED_MN

WLON_LED#

32-D1

1

LED3
LTST-C193TBKT-AC
2

WLON_LED#_LED_MN

2

KBC3_LED_POWER#

LED5
LTST-C193TBKT-AC

1

R280

KBC3_LED_POWER#_R_MN

475
1%

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

LEDs

2

3

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1 PORT USB CONNECTOR
D

D

P5.0V_ALW

100nF

10V

C713

2
8
5

CANTERBURY

KBC3_USBCHG#
KBC3_USBPWRON#

R708

3

0

4

R213

0

U17
TPS2062ADRBR
IN

OC2#

Need 2A Routing

1

GND

OC1#

6

OUT2

100nF
10V

9

1205-003683

SPRINGFIELD

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
C257

EN1#
EN2# T_GND

nostuff
nostuff

P5.OV_AUX_USBPWR_P0_MN

7

OUT1

EC506
100uF C672
100nF
10V

16V
AS

C671

0.033nF
50V

J512
JACK-USB-4P

R670
R669

C

1

2

USB3_P0+_B_MN

5
6
7
8

4

3

B516
ACM2012-900-2P-T

nostuff

P5.0V_AUX

C215
100nF

2
8
5
3

KBC3_USBPWRON#

4

U509
TPS2062ADRBR
IN
OC1#

OUT1

OC2#

OUT2

7
6

EN1#
9

EN2# T_GND

nostuff
nostuff

C213
100nF
10V

EC509
100uF C214
16V
AS

100nF
10V

P3.3V_MICOM

C216

0.033nF
50V

R212

R277
R278

B

200K
1%

J514
JACK-USB-4P

USB3_P2USB3_P2+

C

P5.0V_AUX_USBPWR_P2_MN

1205-003683

B

MNT1
MNT2
MNT3
MNT4

CHARGABLE USB IN CANTERBURY

3722-002002

Need 4A Routing

1

GND

PWR
DD+
GND

USB3_P0-_B_MN

10V

0
0

1

4

nostuff
2

PWR
DD+
GND

USB3_P2-_R_MN
USB3_P2+_R_MN

3

B517
ACM2012-900-2P-T

5
6
7
8

KBC3_USBCHG

D

3

S

2

G

1

KBC3_USBCHG#

Q18
RHU002N06
VOLTAGE

MNT1
MNT2
MNT3
MNT4

3722-002002

J508
JACK-USB-4P

USB3_P6USB3_P6+

R276
R275
1

0
0
4

A

5
6
7
8

nostuff
2

3

B511
ACM2012-900-2P-T

4

PWR
DD+
GND

USB3_P6-_R_MN
USB3_P6+_R_MN

A

MNT1
MNT2
MNT3
MNT4

SAMSUNG

3722-002002

3

ELECTRONICS

2

1

8-34

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

USB3_P0USB3_P0+

0
0

8-35
4

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1

USB I/F Devices

D

D

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

C

C

P3.3V

CANTERBURY
CANTERBURY

C698
100nF
10V

C697
100nF
10V

J517
HDR-4P-SMD

USB3_BLUETOOTHUSB3_BLUETOOTH+

5
6

1
2
3
4
MNT1
MNT2

3711-000922

CANTERBURY

J519
SOCK-4P-1R-SMD

B

5
6

1
2
3
4
MNT1
MNT2

B

0245201200

nostuff

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

Bluetooth Interface

3

CHARGER & POWER MANAGEMENT

C22

D2

1 30V

D1 7

CHGVR_SGATE_RQ_MN

R34

100K
1%

100nF

25V

2.2

P3.3V_MICOM

R20

C612

43.2K
1%

EC501
R619 68uF
22

100nF

25V
AL
nostuff

1
2
3

C591

C46

1nF
50V

C45

3

R18

D

10K

1

S

CHGVR_P3.3V_MICOM_RQ_MN

Q4
RHU002N06

ADT3_SEL#

Q506-1
AP4232GM

D2

SIQ1048-R100
2703-003654

7
9
8
5

CHGVR_VADJ_MN

CHGVR_ACLIM_MN

10K
1%

CHGVR_CHLIM_RQ_MN

CHGVR_ICM_MN

P2.39V_VREF

Q510
RHU002N06 D 3

P2.39V_VREF

R644

2

S

470K

nostuff
G_CHG

G_CHG

100K
1%

24.3K
1%

150K
1%

R616

R617

R630

30K
1%

Q511
RHU002N06 D 3

R647

10K

R646

R615
300K
1%

G

1

S

470K

200K
1%

G_CHG

CHGVR_KBC3_CHG2000_RQ_MN

KBC3_CHG2000

R631

13.05V@2.058V
12.594V@1.188V

2

47K
1%

G_CHG

R634
100
1%

C628

6.8nF
50V

C626

100nF
25V

G_CHG

G_CHG

C627
10nF
25V

R635

10K
1%

CHGVR_DCPRN_MN

1

R629

R640

G

CHGVR_VCOMP_RC_MN

10K

CHGVR_ICM_RC_MN

R645

CHLIM
VADJ
ACLIM
ICM

3
4

CHGVR_ICOMP_MN

CHGVR_VCOMP_MN

CHGVR_KBC3_PRECHG_RQ_MN

KBC3_PRECHG

VDDP
VDD

23
24

CSOP
CSON

VREF
EN

ICOMP
VCOMP

CELLS
GND

ACPRN
DCPRN

THERM

A

R96

14
15
16
12
11

PNS_CHGVR_BST_MN
PNS_CHGVR_TG_MN

6
1

10K

High : VCELL to 4.200V
Low : VCELL to 4.350V

D

3

S

2

4700nF-X5R

4700nF-X5R

C507

25V

4700nF-X5R

C28

25V

4700nF-X5R

25V

25V

CHGVR_BAT3_SMCLK#_CBJ_MN

BAT3_SMCLK#
C26

B

0.1nF
50V

2
10

P3.3V_MICOM

R636

1K
1%

29

KBC3_CHGEN

C629

1nF
50V

nostuff

C726
100nF
25V

nostuff

G_CHG

G_CHG G_CHG

P3.3V_MICOM

BAT3_SMCLK#

100 1%

R36

100 1%

R704

BAT3_DETECT#

ADT3_SEL#
(ACTIVE LOW)

R35

KBC3_SMDATA#
KBC3_SMCLK#

100

1%

KBC3_DETECT#

A

INSTPAR

R628

DRAW

Q509
RHU002N06

DATE

DEV. STEP

KIM, MS

G_CHG
APPROVAL

ELECTRONICS

MAIN

1.0

CHARGER (ISL6256A)

PART NO.

BA41-xxxxxx

LAST EDIT

MODULE CODE

undefined

2

SAMSUNG

CANTERBURY

PV
REV

CHUN, YB

3

TITLE

03/11/2009

BAE, SG
CHECK

G_CHG

G_CHG

4

B6
BLM18PG181SN1

CHGVR_EN_MN

1203-005849

SHORT1

1

nostuff

COM-22C-015(1996.6.5) REV. 3

50V

BAT3_SMDATA#

G

470K
1%

BAT3_SMDATA#
0.1nF

P2.39V_VREF

20K
1%

R614

B5
BLM18PG181SN1

C25

PNS_CHGVR_PHASE_MN

ANS_CHGVR_BG_MN

R621

G_CHG

BAT3_DETECT#

C24

0.1nF

PNS_CHGVR_BST_RC_MN

21 CHGVR_CSOP_MN
22 CHGVR_CSON_MN

3711-006037

B4
BLM18PG181SN1

50V

100nF
25V

0

G_CHG

CHGVR_KBC3_CHG4.2V_RQ_MN

KBC3_CHG4.2V

Q506-2
AP4232GM

C62

17

R97

nostuff
G_CHG

100nF
10V

BATT-CONN-5P
J502

June 09, 2009 15:27:15 PM

PAGE

37

OF

44

1
D:/users/canterbury/PV_0609/Canterbury_MAIN

8-36

CHGVR_VDD_MN

CHGVR_CHLIM_MN

R637

nostuff

C613

C

2

13
26

CHGVR_VDDP_MN

10
1%

3

5.1
1%

nostuff
nostuff
nostuff

5
4
3
2
1

1

R623

1nF
50V

70V

25V

1nF
50V

20 CHGVR_CSIN_MN

3.3

BOOT
UGATE
PHASE
LGATE
PGND

R622

10
1%

D511
BAV99LT1

G_CHG

1000nF

CSIN

BGATE

SGATE
DCIN
ACSET
DCSET

C590

3

CHGVR_ACSET_MN

CHGVR_DCSET_MN

B

CSIP

18
25
27
28

R620

PNS_CHGVR_PHASE_RC_MN

2

(1.26V)

2.5A@1.024V
0.268A@0.107V

U503
ISL6255AHRZ-T

3

C589

1

19

CHGVR_DCIN_MN

C615

S

10

C27

1000nF

CHGVR_SGATE_MN

G_CHG

G_CHG

4

10

C508

C63

25V

G_CHG

G

R599 R598

3

27.4K
1%

D2

D3
BAV99LT1

R641

CHGVR_PHASE_RL_MN

6

1

10nF
25V

30K
1%

D7
BAT54A

CHGVR_CSIP_MN

G_CHG

2

300K
1%

15.15V@1.264V

C630

R638

150K
1%

R642

300K
1%

1

D1 5

100nF
25V

3

nostuff
R643

300K
1%

C614

VDC

0.02
1W
1%

1

VDC_ADPT

R639

CHGVR_CHLIM_RQ2_MN

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

BGATE

S

To enhance
DMB performance (060310)
B2
HU-1M2012-121JT B1
HU-1M2012-121JT

R527

CHGVR_BAT3_DETECT#_CBJ_MN

L500
10uH

8

1%

D1 7

100nF 25V

nostuff

CHGVR_BAT3_SMDATA#_CBJ_MN

0

470K

2

G

C29

S

R19

R22

3

2

D

D2
BAV99LT1

Q512
BSS84

2

R633

1nF
50V

4700nF-X5R 4700nF-X5R
25V
25V

25V

G

R632

D
C509

BGATE

2

C

200K
1%

8
7
6
5

G

1

P2.39V_VREF

D1
D2
D3
D4

S1
S2
S3
G

C533 4

100nF
25V

VDC_CHG

Q500
AP4435GM

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

EMI
C23

VCHG=12.597V@2200Cell
VCHG=13.05V@2950Cell
IPRECHG=0.27A
ICHG=1.38A FOR 2200mAh
ICHG=2.56A FOR 5200mAh & 5900mAh

R618

300K
1%

25V

CHGVR_DCJACK_RCQ_MN

0.033
1W
1%

S

R21

1000nF-X5R

3711-007003

R526

ANS_CHGVR_VDC_ADPT_RQ_MN

CHGVR_SGATE_RRQ_MN

100K
1%

VDC

2

R33

10nF

25V

G

C21

100nF
25V

4

C20

5
6

8

6

S

PNS_CHGVR_DCJACK_QB_MN

D2

B3
HU-1M2012-121JT

PNS_CHGVR_DCJACK_MN

3 30V

Q29-2
AO4807L

G

D

1
2
3
4
MNT1
MNT2

1

2

VDC_ADPT
AO4807L
Q29-1
D1 5

J503
HDR-4P-1R

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-37
4

3

SAMSUNG PROPRIETARY

C22

D2

1 30V

D1 7

CHGVR_SGATE_RQ_MN

R34

100K
1%

C23

100nF

25V

2.2

P3.3V_MICOM

R20

C612

43.2K
1%

EC501
R619 68uF
22

100nF

25V
AL
nostuff

C591

100nF
25V

C46

1nF
50V

BGATE

3

D

2

S

R18
10K

1

CHGVR_P3.3V_MICOM_RQ_MN

Q4
RHU002N06

Q506-1
AP4232GM

D2

13
26

CHGVR_VDD_MN

CHGVR_VADJ_MN

R637

B

CHGVR_ACLIM_MN

10K
1%

CHGVR_CHLIM_RQ_MN

CHGVR_ICM_MN

P2.39V_VREF

Q510
RHU002N06 D 3

P2.39V_VREF

R644

2

S

470K

nostuff
G_CHG

G_CHG

100K
1%

13.05V@2.058V
12.594V@1.188V

150K
1%

R616

R617

R630

30K
1%

Q511
RHU002N06 D 3

R647

10K

R646

R615
300K
1%

G

1

S

470K

200K
1%

G_CHG

CHGVR_KBC3_CHG2000_RQ_MN

KBC3_CHG2000

R631

24.3K
1%

2

47K
1%

G_CHG

R634
100
1%

C628

6.8nF
50V

C626

100nF
25V

G_CHG

G_CHG

C627
10nF
25V

R635

10K
1%

CHGVR_DCPRN_MN

1

R629

R640

G

CHGVR_VCOMP_RC_MN

10K

CHGVR_ICM_RC_MN

R645

CHLIM
VADJ
ACLIM
ICM

3
4

CHGVR_ICOMP_MN

CHGVR_VCOMP_MN

CHGVR_KBC3_PRECHG_RQ_MN

KBC3_PRECHG

VDDP
VDD

7
9
8
5

CHGVR_CHLIM_MN

23
24

CSOP
CSON

VREF
EN

ICOMP
VCOMP

CELLS
GND

ACPRN
DCPRN

THERM

PNS_CHGVR_BST_MN
PNS_CHGVR_TG_MN

6
1

10K

High : VCELL to 4.200V
Low : VCELL to 4.350V

D

3

S

2

2
10

25V

4700nF-X5R

CHGVR_BAT3_SMCLK#_CBJ_MN

C507

25V

4700nF-X5R

C28

25V

4700nF-X5R

C27

25V

4700nF-X5R

C508

1%

P3.3V_MICOM

R636

1K
1%

29

KBC3_CHGEN

C629

1nF
50V

nostuff

C726
100nF
25V

nostuff

G_CHG

G_CHG G_CHG

P3.3V_MICOM

BAT3_SMCLK#

R35

100 1%

R36

100 1%

R704

BAT3_DETECT#

ADT3_SEL#
(ACTIVE LOW)

KBC3_SMDATA#
KBC3_SMCLK#

100

1%

KBC3_DETECT#

A
DRAW

Q509
RHU002N06

DATE

CHECK

G_CHG

DEV. STEP

KIM, MS

G_CHG
APPROVAL

ELECTRONICS

MAIN

1.0

CHARGER (ISL6256A)

PART NO.

BA41-xxxxxx

LAST EDIT

MODULE CODE

undefined

2

SAMSUNG

CANTERBURY

PV
REV

CHUN, YB

3

TITLE

03/11/2009

BAE, SG

G_CHG

4

B

50V

INSTPAR

1

nostuff

COM-22C-015(1996.6.5) REV. 3

BAT3_SMCLK#
0.1nF

CHGVR_EN_MN

1203-005849

SHORT1

G

B6
BLM18PG181SN1

C26

BAT3_SMDATA#

R628
470K
1%

50V

P2.39V_VREF

0

G_CHG

CHGVR_KBC3_CHG4.2V_RQ_MN

R614

BAT3_SMDATA#
0.1nF

PNS_CHGVR_PHASE_MN

20K
1%
G_CHG

B5
BLM18PG181SN1

C25

ANS_CHGVR_BG_MN

21 CHGVR_CSOP_MN
22 CHGVR_CSON_MN

BAT3_DETECT#

C24

0.1nF

PNS_CHGVR_BST_RC_MN

R621

G_CHG

KBC3_CHG4.2V

R96

14
15
16
12
11

3711-006037

B4
BLM18PG181SN1

50V

100nF
25V

R97

nostuff

A

Q506-2
AP4232GM

C62

17

BATT-CONN-5P
J502

June 09, 2009 15:27:15 PM

PAGE

37

OF

44

1
D:/users/canterbury/PV_0609/Canterbury_MAIN

N130

CHGVR_VDDP_MN

100nF
10V

C

2

5.1
1%

C613

3

R623

10
1%

5
4
3
2
1

1

25V

nostuff
nostuff
nostuff

70V

G_CHG

1000nF

1nF
50V

nostuff

20 CHGVR_CSIN_MN

3.3

BOOT
UGATE
PHASE
LGATE
PGND

C590

1nF
50V

D511
BAV99LT1

CHGVR_ACSET_MN

CHGVR_DCSET_MN

CSIN

BGATE

SGATE
DCIN
ACSET
DCSET

R622

10
1%

3

(1.26V)

C615
2.5A@1.024V
0.268A@0.107V

CSIP

18
25
27
28

R620

10

2

19

CHGVR_DCIN_MN

10

PNS_CHGVR_PHASE_RC_MN

1

G_CHG

3

3

1000nF

U503
ISL6255AHRZ-T

CHGVR_SGATE_MN

G_CHG

S

C589

2

C63

25V

G_CHG

4

R599 R598

D3
BAV99LT1

27.4K
1%

CHGVR_PHASE_RL_MN

6

D2

G

3

R641

1

1

10nF
25V

30K
1%

D7
BAT54A

CHGVR_CSIP_MN

G_CHG

0.02
1W
1%

1

R638

300K
1%

15.15V@1.264V

C630

100nF
25V

R642

300K
1%

S

D1 5

To enhance
DMB performance (060310)
B2
HU-1M2012-121JT B1
HU-1M2012-121JT

R527

SIQ1048-R100
2703-003654

CHGVR_BAT3_DETECT#_CBJ_MN

L500
10uH

8

100nF 25V

D1 7

470K

nostuff

CHGVR_BAT3_SMDATA#_CBJ_MN

0

C29

2

G

R22

S

R19

2

3

D2
BAV99LT1

D

C614

VDC

nostuff
R643

300K
1%

CHGVR_CHLIM_RQ2_MN

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

VDC_ADPT

R639

150K
1%

1nF
50V

C45

2

BGATE

R633

D
C509

ADT3_SEL#

Q512
BSS84

C

R632

8
7
6
5

4700nF-X5R 4700nF-X5R
25V
25V

25V

G

200K
1%

D1
D2
D3
D4

S1
S2
S3
G

G

1

P2.39V_VREF

VDC_CHG

Q500
AP4435GM

1
2
3
C533 4

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

EMI

VCHG=12.597V@2200Cell
VCHG=13.05V@2950Cell
IPRECHG=0.27A
ICHG=1.38A FOR 2200mAh
ICHG=2.56A FOR 5200mAh & 5900mAh

R618

300K
1%

25V

CHGVR_DCJACK_RCQ_MN

0.033
1W
1%

S

R21

1000nF-X5R

3711-007003

R526

ANS_CHGVR_VDC_ADPT_RQ_MN

CHGVR_SGATE_RRQ_MN

100K
1%

VDC

2

R33

10nF

25V

G

C21

100nF
25V

4

C20

5
6

8

6

D2

D1 5

PNS_CHGVR_DCJACK_QB_MN

S

PNS_CHGVR_DCJACK_MN

VDC_ADPT
AO4807L
Q29-1

G

D

1
2
3
4
MNT1
MNT2

Q29-2
AO4807L

B3
HU-1M2012-121JT

3 30V

J503
HDR-4P-1R

1

2

CHARGER & POWER MANAGEMENT

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

2

3

VDC

EC505
68uF

C209

4700nF-X5R
25V

C210

4700nF-X5R
25V

R271

3.3

100nF
25V

100nF
25V

Q22
AON6912L

SYSVR_VIN_MN

1

S1_D2

6.3V

R209

R210

4.7

100nF
25V

10

nostuff

0.017OHM

PNS_SYSVR_PHASE_P5.0V_ALW_MN

10

2703-003233

C659

2409-001175

PNS_SYSVR_TG_P5.0V_ALW_MN

21

G1

SIQ1048-3R9

EC507
330uF

16

PNS_SYSVR_PHASE_P5.0V_ALW_RC_MN

C188
0.47nF
50V

R257

PNS_SYSVR_BST_P5.0V_ALW_RC_MN
100nF
PNS_SYSVR_BST_P5.0V_ALW_MN

C206

G2

S3 S2 S1

7 6 5

8

VIN

EN

13

Q25-1
AP4232GM

1.19V ~ 1.7V

STUFF@TPS51125

30V

L506
3.9uH

680K
1%

25V

3.3

C186

ANS_SYSVR_BG_P5.0V_ALW_MN

20

22

19

UGATE1

UGATE2

PHASE1

PHASE2

BOOT1

BOOT2

LGATE1

LGATE2

10

PNS_SYSVR_TG_P3.3V_AUX_MN

12 ANS_SYSVR_BG_P3.3V_AUX_MN

D1 5

PNS_SYSVR_BST_P3.3V_AUX_RC_MN

4

S

nostuff

VOUT1

VOUT2

(Vout Fix / Discharge / Switcher over)

7

15K
1%

0.1nF
50V

2

SYSVR_VFB1_P5.0V_ALW_MN

nostuff

R251

FB2

FB1

5

R253

18

REF

NC

G_P3.3V

KBC3_SUSPWR

D

3

S

2

Q27
S 2
RHU002N06

R263SYSVR_KBC3_ALWS_ON_RCQ_MN G
10K

C241

1

1nF
50V

G_P3.3V

nostuff

G_P3.3V

R266

470K
1%

G_P3.3V

Q20
RHU002N06

R232

0

SPRINGFIELD

D

3

S

2

6

R267
200K
1%

VREG3

PGOOD

150K
1%

G_P3.3V

100K
1%

KBC3_USBCHG

R231

D

2

A

3

G

R246
10K

1

VOLTAGE

3

1

0

0.017OHM

RdsOn(Typ 19.5mohm / 26mohm)

C

C242
100nF
25V

nostuff

P5.0V_STB

P3.3V_MICOM

C236

10000nF-X5R
6.3V

C245

10000nF-X5R
6.3V

nostuff

4

SYSVR_ENTRIP1_MN

1

B

R247
0

Ch1 / Ch2 Fsw
P2.0V_REF : 300KHz / 375KHz
P3.3V_MICOM : 400KHZ/500KHZ

SYSVR_TONSEL_MN

P2.0V_REF

P3.3V_MICOM

ENTRIP1

R713

R255
100K
1%

22000nF-X5R
20%
6.3V

P2.0V_REF

0

15

PGND

SKIPSEL

14

SYSVR_SKIPSEL_MN

(PWM Only)

(OOA-Skip)

R260

0

R258

0

nostuff
nostuff

P3.3V : Usonic Mode
GND : Fixed Mode
REF : DEM Mode

G_P3.3V

SHORT505
INSTPAR

A

Q24
RHU002N06
DATE

DRAW

2

BAE, SG

G_P3.3V

04/01/2009

KIM, MS

PV
REV

APPROVAL

CHUN, YB

2

1.0

SAMSUNG

CANTERBURY

ELECTRONICS

MAIN
P3.3V_AUX / P5.0V_AUX

PART NO.

BA41-xxxxxx

LAST EDIT

undefined

3

TITLE

DEV. STEP

CHECK

MODULE CODE

4

2409-001175

100K
1%

0

VOLTAGE

S

R252

nostuff

R248

Stuff@TPS51125

CANTERBURY
CANTERBURY
CANTERBURY
CANTERBURY
CANTERBURY

KBC3_SUSPWR

6.3V

C238

0.47nF
50V

C235

C244

G_P3.3V

G_P3.3V

R229

R250

P3.3V_MICOM

10nF
25V

1203-005735

P5.0V_STB

0.1nF
50V

8

G_P3.3V

OCP Valley : 8.8A@17mohm (150mV)

R254

100nF
25V

17

ENTRIP2

TONSEL

G

1

23

PAD

Q26
RHU002N06

3

SYSVR_PGOOD_MN

SYSVR_ENTRIP2_MN

25

D

EC508
330uF

C670

nostuff

PNS_SYSVR_PHASE_P3.3V_AUX_RC_MN

G_P3.3V

VREG5

nostuff

1

SIQ1048-2R2
2703-003232

C233G_P3.3V

100K
1%

G

10

220nF
10V

R256

100K
1%

3

R261

3

P5.0V_STB

OCP Valley : 5A@26mohm (130mV)

11.8K
1%

17.4K
1%

P2.0V_REF

SYSVR_NC_MN

(3.5A)

C243

R265

SYSVR_VFB2_P3.3V_AUX_MN

10K
1%

P3.3V_AUX

L508
2.2uH

(Separate Routing)

Set : 3.356V

R249

332K
1%

D10
BAT54C

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

24

C232

100nF
25V

SYSVR_P5.0V_STB_ENTRIP2_RQ_MN

4.7

1nF
50V

C231

B

R262

D2

C237

nostuff

R264

6

G

100nF
25V

3.3

1nF
50V

RdsOn(Typ 14mohm / 17mohm)

P5.0V_STB

8

2 Q25-2
1

C246

R268

PNS_SYSVR_BST_P3.3V_AUX_MN

4700nF-X5R
25V

D2

S

AP4232GM

11 PNS_SYSVR_PHASE_P3.3V_AUX_MN
9

D1 7

C212

4700nF-X5R
25V

G

G_P3.3V

nostuff

C

C211

100nF
25V

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

9 4 3 2

(4.5A)

R269

U15
RT8205AGQW

C239

100K
1%

nostuff

C234
D4 D3 D2 D1

P5.0V_ALW

KBC3_RST#

R259

C207

C208

4700nF-X5R
25V

D

300K
1%

9V@1.75V , 19V@3.7V

25V
AL
nostuff

VDC

R270

VDC

June 09, 2009 15:27:15 PM

PAGE

38

OF

44

1
D:/users/canterbury/PV_0609/Canterbury_MAIN

8-38

D

1

P5.0V_ALW & P3.3V_AUX

VDC

N130

4

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

8-39
4

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

1

P1.8V_AUX / P1.5V / P1.05V
VSET:1.8166V

VSET:1.0546V

D

C180

20K
1%

nostuff

R187

C195

24.3K
1%

R221

R189

17.4K
1%

51.1K
1%

1M
1%

1nF
50V

nostuff

R222
470K
1%

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
nostuff

Discharging Path

R223

R188

1nF
50V

D

nostuff

Discharging Path

G_DDR

4700nF-X5R
25V

C200

4700nF-X5R
25V

C198

1nF
50V

R181

R186

100K
1%

100K
1%

VDC

C230

4700nF-X5R
25V

C229

4700nF-X5R
25V

C228

1nF
50V

nostuff

CHSETVR_TONSEL_MN

C

C

R220

6
5
4
3
2
1

100K
1%

C197

D2

G

3

-30V

0.47nF
50V

4

S

C196

1nF
50V

nostuff

nostuff

P1.5V_PWRGD

R185

1K
1%

B
KBC3_PWRON

C178
100nF
10V

R183

VO2
VFB2
TONSEL
GND
VFB1
VO1

CHSETVR_PG1_MN

R218
3.3

CHSETVR_EN1_MN

PNS_CHSETVR_BST1_MN
PNS_CHSETVR_TG1_MN

C193

D1 7

100nF
25V

G

2

PNS_CHSETVR_BST1_RC_MN

PNS_CHSETVR_PHASE1_MN

S

C226

P5.0V_AUX

R216

8

D2

Q23-1
AP4232GM

nostuff

D1 5

4

3.3

1nF
50V

3

6

D2

Q23-2
AP4232GM

R244
10

P1.8V_AUX

L507
3.9uH

R245
4.7

EC510
220uF
2.5V

nostuff

PNS_CHSETVR_PHASE1_RC_MN

EC7
220uF
2.5V
AD

0.035OHM

C227

0.47nF
50V

nostuff

C192

4700nF-X7R
6.3V

1000nF-X7R
6.3V

15K
1%

1

G

C176

R182

S

ANS_CHSETVR_BG1_MN

PGND2
TRIP2
V5FILT
V5IN
TRIP1
PGND1

Q19-2
AP4232GM

24
23
22
21
20
19

10K
1%

0.035OHM

6 5 D1

4.7

PGD1
PGD2
EN2
EN1
VBST2
VBST1
U14
DRVH2
DRVH1
TPS51124RGER LL1
LL2
DRVL2 1203-004708
DRVL1

R219

PNS_CHSETVR_PHASE2_RC_MN

R225

CHSETVR_EN2_MN

PNS_CHSETVR_BST2_MN

PNS_CHSETVR_TG2_MN

THM

10
nostuff

nostuff

2

7
8
9
10
PNS_CHSETVR_PHASE2_MN11
ANS_CHSETVR_BG2_MN12

3.3

PNS_CHSETVR_BST2_RC_MN

25

R224

2.5V

2.5V
AD

1

R184

100nF
25V

G

S

CHSETVR_TRIP2_MN

EC5
220uF

EC4
220uF

C177

8 7 D1

D2

nostuff

13
14
15
16
CHSETVR_TRIP1_MN17
18

-30V

CHSETVR_5VFILT_MN

Q19-1
AP4232GM

L505
3.9uH

INSTPAR

P1.05V

SHORT504

CHP3_SLPS4#

R217

B

C194

15K
1%

100nF
10V

20K
1%

G_DDR

P5.0V_AUX

P1.8V_AUX

C729
1nF
50V

3

U507
RT9018B-15GSP
VIN

VOUT

P1.5V

6

nostuff

C640

C641

10000nF-X5R
6.3V

A

C728

4

1nF
50V

C656

R274
150K
1%

C642

10nF
25V

NC

8

1nF
50V

R650

51.1K
1%

C727
1nF
50V

G_DDR

TONSEL CH1
CH2
FLOAT 300Khz 360Khz
V5FILT 360Khz 420Khz

C655

10000nF-X5R
6.3V

9

A
R162

GND
PAD

56.2K
1%

5

EN

1203-005953

4

ADJ

7

G_DDR

R273

1000nF-X5R
6.3V

2

KBC3_PWRON

VDD

G_DDR

PGOOD

1

100K
1%
nostuff

SAMSUNG

P1.5V_PWRGD

3

ELECTRONICS

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

VCCP5_PWRGD

P5.0V_AUX

CHSETVR_FB1_RC_MN

C199

P5.0V_AUX

CHSETVR_FB2_RC_MN

VDC

2

3

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

CPU VRM POWER

D

P5.0V
C665

C201

1000nF-X5R
6.3V

68
5%

R226

CPUVR_VRHOT#_MN

28

P3.3V

nostuff

13

R106

CHP3_DPRSLPVR

499

1%

6

CPUVR_CLKEN#_MN

KBC3_VRON
VCCP5_PWRGD

0
0

R195

CPUVR_SHDN#_MN

P5.0V

R194

DH

LX

BST

VRHOT#

DL

PGND

V3P3

12

11

PWRGD

CSN

DPRSLPVR

nostuff

8

R199

26

2

R662

C666

24 PNS_CPUVR_BST_MN

PNS_CPUVR_BST_RC_MN

22

3.3

21

5

ANS_CPUVR_BG_MN

C260

100nF
25V

Q12-2
50V

1nF

CPUVR_CSP_MN

R228

56.2K
1%

G_CPU

R227

17.4K
1%

29

1.5V

C173

4700nF-X5R
25V

L504
1.8uH

D2

R193

R192
10
1%

10
1%

SIQ1045-1R8PF

PNS_CPUVR_PHASE_RL_MN

R190

R191

3

CPU_CORE

0.01
1%

1/2W

0

PNS_CPUVR_PHASE_RC_MN

C181

EC3
330uF

C179

2V
AL

2402-001306

1nF
50V

C

C156

100nF
10V

0.006ohm

1nF
50V

C182
0.22nF
50V

4

CPU_CORE

1nF
50V

DPRSTP#

C204

1nF
50V

R237

CLKEN#

G_CPU

SHDN#

FB

3

CPUVR_FB_MN

2

CPUVR_GNDS_MN

R233

G_CPU

10

( 6mV / A )

CPUVR_FB_RR_MN

1K 1%

THRM

C205

R236

10

R235

10

nostuff

CPU1_VCCSENSE
CPU1_VSSSENSE

R234

C203

10

1nF
50V

nostuff

B

G_CPU

PGDIN

PWR

ILIM

PAD

CPUVR_TIME_MN

30

S

G

G_CPU

27

4

6

AP4232GM

1nF
50V

CPUVR_ILIM_MN

D1 5

4700nF-X5R
25V

D2

1 AP4232GM

25 PNS_CPUVR_PHASE_MN

10K
1%

B

S

C171

8

Q12-1

G

PNS_CPUVR_TG_MN

C183

GNDS

CPUVR_THRM_MN

200K
1%

D1 7

D0
D1
D2
D3
D4
D5
D6

CSP

10

7

CPU1_DPRSTP#

R198

VDD

2K
1%

CPUVR_TON_MN

1nF
50V

R197

VRM3_CPU_PWRGD

9

TIME

1203-005832

RSENSE = RTIME : 17.4K / RLIM : 56.2K
I LIMIT : 4.729A
SLEW RATE : 12.14mV / uS

CCV

1

CPUVR_PWR_MN

32 CPUVR_CCV_MN

C202

0.047nF
50V

33

G_CPU

G_CPU

SHORT500
INSTPAR

A

A
G_CPU

SAMSUNG
ELECTRONICS

4

3

2

1

8-40

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

C

TON

C172

23

14
15
16
17
18
19
20

CPU1_VID(0)
CPU1_VID(1)
CPU1_VID(2)
CPU1_VID(3)
CPU1_VID(4)
CPU1_VID(5)
CPU1_VID(6)

VDC

Fsw = 300kHz / 200Kohm

VCC

1000nF-X5R
6.3V

G_CPU

P1.05V

U13
MAX8796GTJ+

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C

R230 CPUVR_VCC_MN 31

1% 10

D

8-41
4

2

3

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

Load Switch Control(P5.0V)
P5.0V_ALW

R657

3

D1 D2 D3 D4

1 2 5 6

INSTPAR

R656

SHORT503

C657

10K
1%
D

R654
G

10K
1%

1

C651

3

Q514
RHU002N06

VOLTAGE
40-A4
S

2

10K
1%

R145

VCCP5_PWRGD

10K
1%

R146

1
5
IN
OUT
3
EN
2
4
GND ADJ

R142
150K
1%

1203-005591

C114

C147

4700nF
6.3V

100nF

nostuff

10V

R143

C113

10000nF-X5R
6.3V

20K
1%

C115
1nF

10nF
25V

C

KBC3_PWRON

50V

nostuff

R144
150K
1%

C

Load Switch Control(P5.0V_AUX)

3

S

C669
100nF

R666
100K
1%

R665

10V

10K
1%
D

R664
KBC3_PWRON

G

10K
1%

1

C667
10nF
25V

3

Q517
RHU002N06

40-CVOLTAGE
4
S

2

R203

10K
1%

D

C668

2200nF
10V

R208

KBC3_SUSPWR

1

C187

3

B

VOLTAGE

C184

CANTERBURY
CANTERBURY
CANTERBURY
CANTERBURY
CANTERBURY
CANTERBURY
CANTERBURY

10000nF-X5R
6.3V

Q17
RHU002N06

G

10K
1%

Q15
AO6409L

1 2 5 6

10V

100K
1%

4

C185
100nF

R205

D1 D2 D3 D4

4

1 2 5 6

D1 D2 D3 D4

-20V

S

P3.3V

Q518
AO6409L

P5.0V_AUX

0
0

3

P3.3V_AUX

R202
R201

G

Load Switch Control(P3.3V)
B

SPRINGFIELD
SPRINGFIELD

P5.0V_ALW

G

VOLTAGE
40-A4

S

2

10nF
16V

nostuff

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

KBC3_PWRON

2200nF
10V

P2.5V

U12
RT9179GB

SHORT501

10V

100K
1%

P3.3V_AUX

INSTPAR

G

C658
100nF

P5.0V_AUD
INSTPAR

SHORT502

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
S

-20V

D

LDO Power (P2.5V)

P5.0V

Q515
AO6409L
4

D

2

3

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D

D

POWER DISCHARGER

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
P5.0V_AUX

P5.0V_STB

R206

R200

R238

nostuff

nostuff

nostuff

D

R207

KBC3_SUSPWR

10K

G

1%

1

nostuff

3

D

Q16
RHU002N06

1

2

nostuff

nostuff

P5.0V_STB

100K
1%

D

R196
nostuff

10K

G

1%

1

3

D

Q13
RHU002N06

1

2

nostuff

nostuff

nostuff

2

nostuff

nostuff

Q513
RHU002N06

S

2

S

2

Q21
RHU002N06

P1.5V

P3.3V

R663

VOLTAGE

3

R180

10
1%

D

3

G

1

nostuff

B

10
1%

nostuff

Q516
RHU002N06

D

3

S

2

G

VOLTAGE

S

C

VOLTAGE

1

R655

3

G

VOLTAGE

S

S

D

G

VOLTAGE

1K
1%

nostuff

KBC3_PWRON

Q14
RHU002N06

P5.0V

R204

B

3

G

VOLTAGE

S

10
1%

1K
1%

1

2

nostuff

Q11
RHU002N06
VOLTAGE

A

A

SAMSUNG
ELECTRONICS

4

3

2

1

8-42

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

100K
1%

C

P3.3V_AUX

8-43
4

D

MT3
RMNT-25-80-1P

MT7
MT9
RMNT-25-80-1P RMNT-25-80-1P

MT4
RMNT-25-90-1P

MT2
RMNT-54-80-1P

MT5
RMNT-25-80-1P

MT10
MT8
RMNT-25-80-1P RMNT-25-60-1P

MT6
RMNT-25-90-1P

MT1
RMNT-54-80-1P

C518

100nF
10V

100nF
10V

P5.0V

P1.5V

VDC

C40

100nF
10V

P1.05V

C11

C261
0.1nF
50V

100nF
10V

P3.3V_AUX

C262

0.1nF
50V

C263

P1.05V

C

U512

0.1nF
50V

10nF
25V

P5.0V

P3.3V

P3.3V

C64

100nF
10V

C576

P3.3V_AUX

C605

B

C581

1nF 50V

P1.5V

P3.3V

1nF 50V

C606

C650

1nF 50V

C607

100nF
10V

100nF
10V

C59

100nF
10V

P1.5V

1nF 50V

B

CAPs FOR EMI

BOTTOM SIDE EMI CLIP

PCB REVISION CONTROL ( ICT )
NO CONNECTION DATE(YY/MM/DD)

REV1
1
2

A

3

1

N.C.

2

1-2

3

2-3

4

3-1

5

1-2-3

6

N.C.

7

1-2

8

2-3

9

3-1

10

1-2-3

REVISION

STEP

EMI1
EMI

CONTACT-PLATE-EMI

EMI2
EMI

CONTACT-PLATE-EMI

nostuff

A

SAMSUNG
ELECTRONICS

4

3

2

1

N130

8. Block Diagram and Schematic

D

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
C111

C

1

P3.3V_AUX

P3.3V

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

2

3

SAMSUNG PROPRIETARY

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

3

2

N130

4

SAMSUNG PROPRIETARY

1

THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.

D
KBC5_KSI(0)
KBC5_KSI(1)
KBC5_KSI(2)
KBC5_KSI(3)
KBC5_KSI(4)
KBC5_KSI(5)
KBC5_KSI(6)
KBC5_KSI(7)
KBC5_KSO(0)
KBC5_KSO(1)
KBC5_KSO(2)
KBC5_KSO(3)
KBC5_KSO(4)
KBC5_KSO(5)
KBC5_KSO(6)
KBC5_KSO(7)
KBC5_KSO(8)
KBC5_KSO(9)
KBC3_BKLTON
KBC3_PRECHG
KBC3_PWRSW#
KBC3_SMCLK#
KBC3_SPI_DI
KBC3_SPI_DO
KBC3_SUSPWR
KBC3_USBCHG
LPC3_LAD(0)
LPC3_LAD(1)
LPC3_LAD(2)
LPC3_LAD(3)
LCD3_BKLTON
CHP3_3GOFF#
CHP3_RFOFF#
CHP3_SLPS3#
CHP3_SLPS4#
CHP3_SLPS5#
KBC5_KSO(10)
KBC5_KSO(11)
KBC5_KSO(12)
KBC5_KSO(13)
KBC5_KSO(14)
KBC5_KSO(15)
KBC3_CHG2000
KBC3_CHG4.2V
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_PWRBTN#
KBC3_RSMRST#
KBC3_RUNSCI#
KBC3_SMDATA#
KBC3_SPI_CLK
KBC3_SPI_CS#
KBC3_SPI_WP#
THM3_ALERT#

C

B

P1.5V_PWRGD
KBC3_CAPSLED#
KBC3_SPKMUTE#
KBC3_WAKESCI#
MCH3_ICHSYNC#
HST3_SPI3_CLK
HST3_SPI3_CS#
SIM3_C1VCC
SIM3_C2RST
SIM3_C3CLK
SIM3_C6VPP
PEX3_WAKE#
SMB3_CLK_S
BAT3_SMCLK#
T_L_BUTTON#
T_R_BUTTON#
SIM3_C7DATA

BAT3_DETECT#
BAT3_SMDATA#
CRT3_DDCDATA
CRT5_DDCDATA
CRT3_DDCCLK
CRT5_DDCCLK
LID3_SWITCH#
HST3_SPI3_DI
HST3_SPI3_DO
CHP3_BIOSWP#
CHP3_RTCRST#
CPU1_PWRGDCPU
SMB3_ALERT#
SMB3_DATA_S
VCCP5_PWRGD
KBC3_LED_ACIN#
KBC3_USBPWRON#
VRM3_CPU_PWRGD
KBC3_LED_POWER#
MCH3_LCD_VDDEN
KBC3_THERM_SMDATA
KBC3_LED_CHARGE#
KBC3_THERM_SMCLK

BGATE

G_AUD

P3.3V_AUX
P3.3V_AUX
P3.3V_AUX
P3.3V_AUX
P3.3V_MCD

g
n
l
u
a
s
i
t
m
n
a
e
S fid
n
o
C
G_CHG

P5.0V_ALW

G_CPU

G_DDR

G_P3.3V

LCD_VDD3.3V
P3.3V
P3.3V
P3.3V
P3.3V
P5.0V
P5.0V
P5.0V
P5.0V

P1.05V
P1.05V
P1.05V
P1.05V

P5.0V_AUD

P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_STB

C

P1.5V_PCIE

P4.75V_AUD

P2.39V_VREF

P3.3V_MICOM_SW

PRTC_BAT

P1.8V_AUX
P1.8V_AUX
P1.8V_AUX
P1.8V_AUX
P2.0V_REF

VCC_CRT

VDC_ADPT
VDC_ADPT
VDC_ADPT
VDC_ADPT

B

A

A

4

3

2

1

8-44

8. Block Diagram and Schematic

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 - This Document can not be used without Samsung's authorization -

D

www.s-manuals.com



---

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.6
Linearized                      : No
Page Mode                       : UseOutlines
XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Instance ID                     : uuid:ad88dc9b-5de8-4775-8f9a-b863fc19c40f
Document ID                     : adobe:docid:indd:0845b3e8-3aa1-11de-8a04-eea6b9e006a8
Rendition Class                 : proof:pdf
Derived From Instance ID        : 728f80c0-2e0b-11de-8314-dc1f0816586d
Derived From Document ID        : adobe:docid:indd:a4cab629-c8c5-11dd-9862-e96d121100ff
Manifest Link Form              : ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream, ReferenceStream
Manifest Placed X Resolution    : 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00
Manifest Placed Y Resolution    : 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00, 72.00
Manifest Placed Resolution Unit : Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches, Inches
Manifest Reference Instance ID  : uuid:0FCF07337877DE11891EBC58CEE82310, uuid:11CF07337877DE11891EBC58CEE82310, uuid:13CF07337877DE11891EBC58CEE82310, uuid:15CF07337877DE11891EBC58CEE82310, uuid:17CF07337877DE11891EBC58CEE82310, uuid:19CF07337877DE11891EBC58CEE82310, uuid:509AEACB7877DE11891EBC58CEE82310, uuid:529AEACB7877DE11891EBC58CEE82310, uuid:549AEACB7877DE11891EBC58CEE82310, uuid:0B56D8D07977DE118264C7EC2A8A8D3D, uuid:0D56D8D07977DE118264C7EC2A8A8D3D, uuid:0F56D8D07977DE118264C7EC2A8A8D3D, uuid:1156D8D07977DE118264C7EC2A8A8D3D, uuid:1356D8D07977DE118264C7EC2A8A8D3D, uuid:BEB1CE337A77DE118264C7EC2A8A8D3D, uuid:C0B1CE337A77DE118264C7EC2A8A8D3D, uuid:C2B1CE337A77DE118264C7EC2A8A8D3D, uuid:C4B1CE337A77DE118264C7EC2A8A8D3D, uuid:C6B1CE337A77DE118264C7EC2A8A8D3D, uuid:E71738997A77DE118264C7EC2A8A8D3D, uuid:E91738997A77DE118264C7EC2A8A8D3D, uuid:EB1738997A77DE118264C7EC2A8A8D3D, uuid:ED1738997A77DE118264C7EC2A8A8D3D, uuid:EF1738997A77DE118264C7EC2A8A8D3D, uuid:F11738997A77DE118264C7EC2A8A8D3D, uuid:0427AD117B77DE118264C7EC2A8A8D3D, uuid:0627AD117B77DE118264C7EC2A8A8D3D, uuid:0827AD117B77DE118264C7EC2A8A8D3D, uuid:0A27AD117B77DE118264C7EC2A8A8D3D, uuid:0C27AD117B77DE118264C7EC2A8A8D3D, uuid:156CE8977B77DE118264C7EC2A8A8D3D, uuid:176CE8977B77DE118264C7EC2A8A8D3D, uuid:196CE8977B77DE118264C7EC2A8A8D3D, uuid:1B6CE8977B77DE118264C7EC2A8A8D3D, uuid:1D6CE8977B77DE118264C7EC2A8A8D3D, uuid:BAFE39057C77DE118264C7EC2A8A8D3D, uuid:BAFE39057C77DE118264C7EC2A8A8D3D, uuid:BCFE39057C77DE118264C7EC2A8A8D3D, uuid:BEFE39057C77DE118264C7EC2A8A8D3D, uuid:C0FE39057C77DE118264C7EC2A8A8D3D, uuid:C2FE39057C77DE118264C7EC2A8A8D3D, uuid:EF08176F7C77DE118264C7EC2A8A8D3D, uuid:F108176F7C77DE118264C7EC2A8A8D3D, uuid:F308176F7C77DE118264C7EC2A8A8D3D
Manifest Reference Document ID  : uuid:61A3D9EC6677DE11891EBC58CEE82310, uuid:10CF07337877DE11891EBC58CEE82310, uuid:12CF07337877DE11891EBC58CEE82310, uuid:14CF07337877DE11891EBC58CEE82310, uuid:16CF07337877DE11891EBC58CEE82310, uuid:18CF07337877DE11891EBC58CEE82310, uuid:4F9AEACB7877DE11891EBC58CEE82310, uuid:519AEACB7877DE11891EBC58CEE82310, uuid:539AEACB7877DE11891EBC58CEE82310, uuid:0A56D8D07977DE118264C7EC2A8A8D3D, uuid:0C56D8D07977DE118264C7EC2A8A8D3D, uuid:0E56D8D07977DE118264C7EC2A8A8D3D, uuid:1056D8D07977DE118264C7EC2A8A8D3D, uuid:1256D8D07977DE118264C7EC2A8A8D3D, uuid:BDB1CE337A77DE118264C7EC2A8A8D3D, uuid:BFB1CE337A77DE118264C7EC2A8A8D3D, uuid:C1B1CE337A77DE118264C7EC2A8A8D3D, uuid:C3B1CE337A77DE118264C7EC2A8A8D3D, uuid:C5B1CE337A77DE118264C7EC2A8A8D3D, uuid:C7B1CE337A77DE118264C7EC2A8A8D3D, uuid:E81738997A77DE118264C7EC2A8A8D3D, uuid:EA1738997A77DE118264C7EC2A8A8D3D, uuid:EC1738997A77DE118264C7EC2A8A8D3D, uuid:EE1738997A77DE118264C7EC2A8A8D3D, uuid:F01738997A77DE118264C7EC2A8A8D3D, uuid:0327AD117B77DE118264C7EC2A8A8D3D, uuid:0527AD117B77DE118264C7EC2A8A8D3D, uuid:0727AD117B77DE118264C7EC2A8A8D3D, uuid:0927AD117B77DE118264C7EC2A8A8D3D, uuid:0B27AD117B77DE118264C7EC2A8A8D3D, uuid:0D27AD117B77DE118264C7EC2A8A8D3D, uuid:166CE8977B77DE118264C7EC2A8A8D3D, uuid:186CE8977B77DE118264C7EC2A8A8D3D, uuid:1A6CE8977B77DE118264C7EC2A8A8D3D, uuid:1C6CE8977B77DE118264C7EC2A8A8D3D, uuid:B9FE39057C77DE118264C7EC2A8A8D3D, uuid:B9FE39057C77DE118264C7EC2A8A8D3D, uuid:BBFE39057C77DE118264C7EC2A8A8D3D, uuid:BDFE39057C77DE118264C7EC2A8A8D3D, uuid:BFFE39057C77DE118264C7EC2A8A8D3D, uuid:C1FE39057C77DE118264C7EC2A8A8D3D, uuid:C3FE39057C77DE118264C7EC2A8A8D3D, uuid:F008176F7C77DE118264C7EC2A8A8D3D, uuid:F208176F7C77DE118264C7EC2A8A8D3D
Create Date                     : 2009:07:27 20:28:15+09:00
Modify Date                     : 2015:11:04 19:47:28+02:00
Metadata Date                   : 2015:11:04 19:47:28+02:00
Creator Tool                    : Adobe InDesign CS2 (4.0.5)
Thumbnail Format                : JPEG
Thumbnail Width                 : 256
Thumbnail Height                : 256
Thumbnail Image                 : (Binary data 7551 bytes, use -b option to extract)
Format                          : application/pdf
Title                           : Samsung Canterbury Springfield - Schematics. www.s-manuals.com.
Creator                         : 
Subject                         : Samsung Canterbury Springfield - Schematics. www.s-manuals.com.
Producer                        : Adobe PDF Library 7.0
Trapped                         : False
Page Count                      : 45
Keywords                        : Samsung, Canterbury, Springfield, -, Schematics., www.s-manuals.com.

EXIF Metadata provided by EXIF.tools