Wistron LA480s Schematics. Www.s Manuals.com. Rsa Schematics
User Manual: Motherboard Wistron LA480s - Schematics. Free.
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5 4 3 2 1 UMA & Optimus Schematics Document D m D .c o IVY Bridge(rPGA989) x Intel PCH(Panther Point) C fi C B Aw w w .c B h in a DY :NotInstalled UMA:UMA platform installed OPS:Optimus HR:Huron River CR:Chief River V: V-Series installed Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Cover Page Size A4 Date: Document Number Rev SA LA480s Tuesday, March 06, 2012 Sheet 1 of 103 A 5 4 ##OnMainBoard 3 2 Block Diagram (UMA/Optimus co-lay) VRAM 2GB/1GB/512MB4 D DDR3 800MHz Intel CPU NVIDIA N13P-GL N13M-GE1 DDRIII 1066/1333/1600 Channel A DDRIII 1066/1333/1600 Channel B 4,5,6,7,8,9,10 RTL8111F PCH Panther Point PCIE x 1/USB2.0 x 1 SATA x 1/USB2.0 x 1 ETHERNET (10/100/1000Mb) 49 B 74 RJ45 CONN 59 31 USB 3.0 x 2 Combo Jack 92 OUTPUTS DCBATOUT 65 VGA_CORE TI CHARGER 40 BQ24737 Mini-Card OUTPUTS INPUTS +DC_IN_S5 +PBATT USB x 2 DCBATOUT SYSTEM DC/DC 47 RT8068A INPUTS USB 2.0 x 2 C VCC_GFXCORE INPUTS 26 ACPI 1.1 USB 2.0 x 1 44 OUTPUTS VGA OUTPUTS 3D3V_S5 USB x 2 1D8V_S0 B LDO 46 RT8207 17,18,19,20,21,22,23,24,25 SATA x 2 INPUTS 26 HDD Azalia CODEC REALTEK ALC269Q-VC2 5V_S5 OUTPUTS 0D75V_S0 PCB LAYER LPC Bus SPI 56 Internal DMIC 0D75V_S0 1D5V_S3 DDR_VREF_S3 TPS51728 66 PCIE ports (8) Finger Print 64 AZALIA Internal DMIC OUTPUTS DCBATOUT High Definition Audio CardReader REALTEK RTS5209 46 RT8207M INPUTS LPC I/F SD/MMC+/MS/ 3D3V_AUX_S5 5V_S5 3D3V_S5 SYSTEM DC/DC Mini-Card WLAN SATA ports (6) Finger Print BD OUTPUTS DCBATOUT GLAN REALTEK PCIE x 1 USB 3.0/2.0 ports (14) CAMERA D 41 TPS51225 INPUTS TPS51640 Intel RGB CRT USB2.0 x 3 1D05V_VTT INPUTS LVDS 63 DCBATOUT DMI x 4 HDMI Bluetooth OUTPUTS SYSTEM DC/DC FDI x 4 x 2 (UMA only) 50 45 INPUTS SYSTEM DC/DC 51 CRT VCC_CORE TPS51219 LPR-1 91.4UH01.001 11284 SA DDRIII Slot 1 1066/1333/1600 15 83.84,85,86,87 49 DCBATOUT DDRIII Slot 0 1066/1333/1600 14 DDRIII: 1066/1333/1600 MHz LCD OUTPUTS DCBATOUT (Discrete only) HDMI INPUTS SYSTEM DC/DC IVY Bridge PCIe x 16 42~43 TPS51640 LA480s Project Code 91.4UG01.001 PCB P/N 11283 Revision SA 88,89,90,91 C 1 CPU DC/DC Flash ROM 8MB 60 L1:Top L2:GND L3:Signal L4:Signal LPC debug port L5:VCC L6:Signal L7:GND L8:Signal 71 29 KBC NUVOTON NPCE885G A SMBus 27 A 2CH SPEAKER Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C G-Sensor 79 Touch PAD 69 Int. KB 69 Thermal EMC2103-2-AP 2528 Fan Title Block Diagram 28 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 2 of 103 5 PCH Strapping Name SPKR D 4 3 Processor Strapping Chief River Schematic Checklist Rev0.72 Schematics Notes Reboot option at power-up Default Mode: Internal weak Pull-down. No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ - 10-kΩ weak pull-up resistor. INIT3_3V# Weak internal pull-up. Leave as "No Connect". GNT3#/GPIO55 GNT2#/GPIO53 GNT1#/GPIO51 GNT[3:0]# functionality is not available on Mobile. Mobile: Used as GPIO only Pull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3power rail. Configuration (Default value for each bit is 1 unless specified otherwise) CFG[2] PCI-Express Static Lane Reversal 1: 0: Disable Danbury:Left floating, no pull-down required. C HAD_DOCK_EN# /GPIO[33] CFG[7] Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. GPIO8 0 11 : x16 - Device 1 functions 1 and 2 disabled 10 : x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01 : Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00 : x8, x4, x4 - Device 1 functions 1 and 2 enabled PEG DEFER TRAINING 1: PEG Train immediately following xxRESETB de assertion 0: PEG Wait for BIOS for training D 11 1 DMI termination voltage. Weak internal pull-up. Do not pull low. Low (0) - Flash Descriptor Security will be overridden. Also, when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features. High (1) - Security measure defined in the Flash Descriptor will be enabled. Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used to tie this signal to GND as required by the functional strap, the signal should be pulled low through a weak pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for strapping functions. HDA_SDO GPIO15 1 15 -> 0, 14 -> 1, ... PCI-Express Port Bifurcation Straps Disable Danbury: Leave floating (internal pull-down) NC_CLE Normal Operation. Lane Numbers Reversed Default Value Disabled - No Physical Display Port attached to 1: Embedded DisplayPort. Enabled - An external Display Port device is 0: connectd to the EMBEDDED display Port CFG[4] CFG[6:5] NV_ALE Chief River Schematic Checklist Rev0.72 Strap Description Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor. Connect to +NVRAM_VCCQ with 8.2-kohm weak pull-up resistor [CRB has it pulled up with 1-kohm no-stuff resistor] 1 Pin Name SPI_MOSI Enable Danbury: 2 Low(0) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality. High(1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality. Note : This is an un-muxed signal. This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. Sampled at rising edge of RSMRST#. CRB has a 1-kohm pull-up on this signal to +3.3VA rail. GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is enabled. Voltage Rails POWER PLANE VOLTAGE 5V_S0 3D3V_S0 1D8V_S0 1D5V_S0 1D05V_VTT 1D0V_S0 VCCSA 0D75V_S0 VCC_CORE VCC_GFXCORE 1D8V_VGA_S0 3D3V_VGA_S0 1V_VGA_S0 5V 3.3V 1.8V 1.5V 1.05V 1.0V 0.9 - 0.675V 0.75V 0.35V to 1.5V 0.4 to 1.25V 1.8V 3.3V 1V DESCRIPTION 5V_USBX_S3 1D5V_S3 DDR_VREF_S3 5V 1.5V 0.75V BT+ DCBATOUT 5V_S5 5V_AUX_S5 3D3V_S5 3D3V_AUX_S5 6V-14.1V 6V-14.1V 5V 5V 3.3V 3.3V 1D05V_LAN 1.05V 3D3V_M 1D05V_M 3.3V 1.05V S0/M0, SX/M3, WOL_EN 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states 3D3V_AUX_S5 3.3V G3, Sx Powered by Li Coin Cell in G3 and 3D3V_S5 in Sx ACTIVE IN C S0 CPU Core Rail Graphics Core Rail S3 All S states AC Brick Mode only S0/M0, SX/M3 ON whenever iAMT is active B B Default = Do not connect (floating) High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails. GPIO27 PCIe Routing LANE1 A X USB Table port9 Pair Device USB3.0 ext port 1 I 2 C / SMBus Addresses 2 USB2.0 ext port 3 Device 3 USB3.0 ext port 2 Card Reader 4 BLUETOOTH (USB1.1) LANE4 LAN 5 Card Reader 6 X LANE5 X 7 X LANE6 X 8 WWAN 9 USB2.0 ext port 4 SATA SMBus ADDRESSES X LANE3 SATA Table Pair 1 WLAN Chief River CRV Ref Des Address Hex Bus EC SMBus 1 Battery CHARGER BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA EC SMBus 2 PCH eDP SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA PCH SMBus SO-DIMMA (SPD) SO-DIMMB (SPD) Digital Pot G-Sensor MINI PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK Device 0 mSATA 1 HDD1 2 N/A 3 N/A 4 ODD 5 N/A A Wistron Corporation LANE7 X 10 FingerPrint LANE8 X 11 WLAN 12 CCD 13 X 5 is debug port 0 LANE2 ON for iAMTLegacy WOL 4 3 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Table of Content Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 3 of 103 5 4 3 2 1 SSID = CPU 1D05V_VTT 1 OF 9 CPU1A 19 DMI_RXN[3:0] 19 DMI_RXP[3:0] 19 FDI_TXN[7:0] B27 B25 A25 B24 DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 B28 B26 A24 B23 DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 G21 E22 F21 D21 DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 G22 D22 F20 C21 DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3 FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 A21 H19 E19 F18 B21 C20 D18 E17 FDI0_TX#0 FDI0_TX#1 FDI0_TX#2 FDI0_TX#3 FDI1_TX#0 FDI1_TX#1 FDI1_TX#2 FDI1_TX#3 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 A22 G19 E20 G18 B20 C19 D19 F17 FDI0_TX0 FDI0_TX1 FDI0_TX2 FDI0_TX3 FDI1_TX0 FDI1_TX1 FDI1_TX2 FDI1_TX3 19 FDI_FSYNC0 19 FDI_FSYNC1 J18 J17 FDI0_FSYNC FDI1_FSYNC 19 FDI_INT H20 FDI_INT 19 FDI_LSYNC0 19 FDI_LSYNC1 J19 H17 FDI0_LSYNC FDI1_LSYNC A18 A17 B16 EDP_COMPIO EDP_ICOMPO EDP_HPD C15 D15 EDP_AUX EDP_AUX# C17 F16 C16 G15 EDP_TX0 EDP_TX1 EDP_TX2 EDP_TX3 C18 E16 D16 F15 EDP_TX#0 EDP_TX#1 EDP_TX#2 EDP_TX#3 C 19 FDI_TXP[7:0] B R402 1 2 24D9R2F-L-GP DP_COMP R403 1 2 10KR2J-3-GP eDP_HPD DY AUBURNF A eDP 1D05V_VTT PCI EXPRESS* - GRAPHICS 19 DMI_TXP[3:0] SANDY DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI 19 DMI_TXN[3:0] Intel(R) FDI D PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO J22 J21 H22 PEG_IRCOMP_R R401 1 24D9R2F-L-GP PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15 K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32 PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0 PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15 J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32 PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0 PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9 PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15 M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25 PEG_C_TXN15 PEG_C_TXN14 PEG_C_TXN13 PEG_C_TXN12 PEG_C_TXN11 PEG_C_TXN10 PEG_C_TXN9 PEG_C_TXN8 PEG_C_TXN7 PEG_C_TXN6 PEG_C_TXN5 PEG_C_TXN4 PEG_C_TXN3 PEG_C_TXN2 PEG_C_TXN1 PEG_C_TXN0 C401 C402 C403 C404 C405 C406 C407 C408 C409 C410 C411 C412 C413 C414 C415 C416 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0 PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15 M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25 PEG_C_TXP15 PEG_C_TXP14 PEG_C_TXP13 PEG_C_TXP12 PEG_C_TXP11 PEG_C_TXP10 PEG_C_TXP9 PEG_C_TXP8 PEG_C_TXP7 PEG_C_TXP6 PEG_C_TXP5 PEG_C_TXP4 PEG_C_TXP3 PEG_C_TXP2 PEG_C_TXP1 PEG_C_TXP0 C417 C418 C419 C420 C421 C422 C423 C424 C425 C426 C427 C428 C429 C430 C431 C432 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS OPS SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP SCD22U10V2KX-1GP PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0 2 D PEG_RXN[0..15] 83 PEG_RXP[0..15] 83 C PEG_TXN[0..15] 83 PEG_TXP[0..15] 83 B SKT-BGA989C468393H184-NF A Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (PCIE/DMI/FDI) Size A3 Document Number Date: Tuesday, March 06, 2012 LA480s Rev SA Sheet 4 of 103 5 4 SSID = CPU 3 TP501 SKTOCC#_R AN34 SKTOCC# 1 C502 SC47P50V2JN-3GP TP502 1 H_CATERR# AL33 CATERR# AN33 PECI BCLK BCLK# A28 A27 DPLL_REF_SSCLK DPLL_REF_SSCLK# A16 A15 CLK_EXP_P CLK_EXP_N 20 20 CLK_DP_P_R CLK_DP_N_R 1D05V_VTT 2 H_PROCHOT#_R 56R2J-4-GP 1 R513 27,42 H_PROCHOT# 22,36 H_THERMTRIP# AL32 PROCHOT# AN32 THERMTRIP# 4 3 SRN1KJ-11-GP-U SM_DRAMRST# DDR3 MISC H_PECI THERMAL 22,27 D RN502 CLK_DP_N_R 1 CLK_DP_P_R 2 SM_DRAMRST# 37 2 D 1 H_PROCHOT# 2 CLOCKS SNB_IVB# MISC C26 1D05V_VTT 1 R501 62R2J-GP 1 SANDY C26: PROC_SELECT# 22 H_SNB_IVB# 2 2 OF 9 CPU1B R8 SM_DRAMRST# 2 R502 1 4K99R2F-L-GP AK1 A5 A4 SM_RCOMP_0 R506 1 SM_RCOMP_1 R507 1 SM_RCOMP_2 R508 1 PRDY# PREQ# AP29 AP27 XDP_PRDY# XDP_PREQ# 1 1 TP511 TP512 TCK TMS TRST# AR26 AR27 AP30 XDP_TCLK XDP_TMS XDP_TRST# 1 TP513 TDI TDO AR28 AP26 XDP_TDI XDP_TDO 1 DBR# AL35 XDP_DBRESET# BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7 AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32 SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 2 140R2F-GP 2 25D5R2F-GP 2 200R2F-L-GP 22,97 H_CPUPW RGD 18,27,31,32,36,65,66,71,77,80,83,97 PLT_RST# 1 R503 C504 SC120P50V2JN-1GP 10KR2J-3-GP V8 37 VDDPW RGOOD 1 R510 1K5R2F-2-GP UNCOREPWRGOOD 2 BUF_CPU_RST# 2 SM_DRAMPWROK AR33 RESET# 1 1 AP33 2 C PM_SYNC 1 R509 750R2F-GP C501 SC220P50V2KX-3GP JTAG & BPM AM34 19 H_PM_SYNC PWR MANAGEMENT 1D05V_VTT XDP_TDO R523 1 2 51R2J-2-GP RN501 XDP_TMS XDP_TDI XDP_TCLK XDP_TRST# TP516 4 3 2 1 5 6 7 8 C SRN51J-1-GP 2 2 DY AUBURNF SKT-BGA989C468393H184-NF 3D3V_S0 19 XDP_DBRESET# 2 1KR2F-3-GP 3D3V_S0 1 1D05V_VTT XDP_DBRESET# 1 R516 IN B VCC 5 2 IN A 3 GND OUT Y 4 DY 74VHC1G09DFT2G-GP BUFO_CPU_RST# B C503 SCD1U10V2KX-5GP DY 1 R514 2 43R2J-GP BUF_CPU_RST# 1 1 2 U501 PLT_RST# R512 75R2J-1-GP 1 DY 2 B DY R515 0R2J-2-GP 2 DY A A Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title CPU (THERMAL/CLOCK/PM ) Size A3 Document Number Date: Tuesday, March 06, 2012 LA480s Sheet Rev SA 5 of 103 5 4 3 2 1 SSID = CPU 3 OF 9 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 D C B 14 14 14 14 14 14 M_A_BS0 M_A_BS1 M_A_BS2 C5 D5 D3 D2 D6 C6 C2 C3 F10 F8 G10 G9 F9 F7 G8 G7 K4 K5 K1 J1 J5 J4 J2 K2 M8 N10 N8 N7 M10 M9 N9 M7 AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8 AP11 AN11 AL12 AM12 AM11 AL11 AP12 AN12 AJ14 AH14 AL15 AK15 AL14 AK14 AJ15 AH15 SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 AE10 AF10 V6 SA_BS0 SA_BS1 SA_BS2 AE8 AD9 AF9 M_A_CAS# M_A_RAS# M_A_W E# SA_CAS# SA_RAS# SA_WE# DDR SYSTEM MEMORY A SANDY 14 M_A_DQ[63:0] 4 OF 9 CPU1D SANDY SA_CLK0 SA_CLK#0 SA_CKE0 AB6 AA6 V9 SA_CLK1 SA_CLK#1 SA_CKE1 AA5 AB5 V10 SA_CLK2 SA_CLK#2 SA_CKE2 AB4 AA4 W9 SA_CLK3 SA_CLK#3 SA_CKE3 AB3 AA3 W10 SA_CS#0 SA_CS#1 SA_CS#2 SA_CS#3 AK3 AL3 AG1 AH1 M_A_DIM0_CS#0 14 M_A_DIM0_CS#1 14 SA_ODT0 SA_ODT1 SA_ODT2 SA_ODT3 AH3 AG3 AG2 AH2 M_A_DIM0_ODT0 14 M_A_DIM0_ODT1 14 M_A_DIM0_CLK_DDR0 14 M_A_DIM0_CLK_DDR#0 14 M_A_DIM0_CKE0 14 15 M_B_DQ[63:0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 M_A_DIM0_CLK_DDR1 14 M_A_DIM0_CLK_DDR#1 14 M_A_DIM0_CKE1 14 SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7 C4 G6 J3 M6 AL6 AM8 AR12 AM15 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7 D4 F6 K3 N6 AL5 AM9 AR11 AM14 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15 AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_DQS#[7:0] 14 M_A_DQS[7:0] 14 M_A_A[15:0] 14 15 15 15 15 15 15 AUBURNF M_B_BS0 M_B_BS1 M_B_BS2 M_B_CAS# M_B_RAS# M_B_W E# C9 A7 D10 C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2 J7 J8 K10 K9 J9 J10 K8 K7 M5 N4 N2 N1 M4 N5 M2 M1 AM5 AM6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT5 AT6 AP6 AN8 AR6 AR5 AR9 AJ11 AT8 AT9 AH11 AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15 AA9 AA7 R6 AA10 AB8 AB9 SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63 DDR SYSTEM MEMORY B CPU1C SB_CLK0 SB_CLK#0 SB_CKE0 AE2 AD2 R9 SB_CLK1 SB_CLK#1 SB_CKE1 AE1 AD1 R10 SB_CLK2 SB_CLK#2 SB_CKE2 AB2 AA2 T9 SB_CLK3 SB_CLK#3 SB_CKE3 AA1 AB1 T10 SB_CS#0 SB_CS#1 SB_CS#2 SB_CS#3 AD3 AE3 AD6 AE6 M_B_DIM0_CS#0 15 M_B_DIM0_CS#1 15 SB_ODT0 SB_ODT1 SB_ODT2 SB_ODT3 AE4 AD4 AD5 AE5 M_B_DIM0_ODT0 15 M_B_DIM0_ODT1 15 M_B_DIM0_CLK_DDR0 15 M_B_DIM0_CLK_DDR#0 15 M_B_DIM0_CKE0 15 D M_B_DIM0_CLK_DDR1 15 M_B_DIM0_CLK_DDR#1 15 M_B_DIM0_CKE1 15 SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7 D7 F3 K6 N3 AN5 AP9 AK12 AP15 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7 C7 G3 J6 M3 AN6 AP8 AK11 AP14 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15 AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 C M_B_DQS#[7:0] 15 M_B_DQS[7:0] 15 B SB_BS0 SB_BS1 SB_BS2 SB_CAS# SB_RAS# SB_WE# M_B_A[15:0] 15 AUBURNF A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 CPU (DDR) Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 6 of 103 4 3 1 1 TP703 1 CFG2 R702 1KR2J-1-GP 2 OPS CFG16 1 1 TP704 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 SANDY RSVD#AT26 RSVD#AM33 RSVD#AJ27 L7 AG7 AE7 AK2 W8 D AT26 AM33 AJ27 CFG7 DY RSVD#T8 RSVD#J16 RSVD#H16 RSVD#G16 T8 J16 H16 G16 CFG5 R703 1KR2J-1-GP RSVD#AJ26 CFG6 1 AJ26 RSVD#AR35 RSVD#AT34 RSVD#AT33 RSVD#AP35 RSVD#AR34 B R706 1 DY 2 H_VCCP_SEL 0R2J-2-GP RSVD#B4 RSVD#D1 F25 F24 F23 D24 G25 G24 E23 D23 C30 A31 B30 B29 D30 B31 A30 C29 RSVD#F25 RSVD#F24 RSVD#F23 RSVD#D24 RSVD#G25 RSVD#G24 RSVD#E23 RSVD#D23 RSVD#C30 RSVD#A31 RSVD#B30 RSVD#B29 RSVD#D30 RSVD#B31 RSVD#A30 RSVD#C29 J20 B18 A19 RSVD#J20 RSVD#B18 RSVD#A19 J15 RSVD#J15 RESERVED B4 D1 12 DDR_WR_VREF01 12 DDR_WR_VREF02 RSVD#B34 RSVD#A33 RSVD#A34 RSVD#B35 RSVD#C35 RSVD#AJ32 RSVD#AK32 R701 DY DY R704 C 1KR2J-1-GP RSVD#AJ31 RSVD#AH31 RSVD#AJ33 RSVD#AH33 2 C AJ31 AH31 AJ33 AH33 AR35 AT34 AT33 AP35 AR34 1KR2J-1-GP 2 DY 45 H_SNB_IVB#_PWRCTRL R705 1KR2J-1-GP 1 CFG4 AK28 AK29 AL26 AL27 AK26 AL29 AL30 AM31 AM32 AM30 AM28 AM26 AN28 AN31 AN26 AM27 AK31 AN29 RSVD#L7 RSVD#AG7 RSVD#AE7 RSVD#AK2 RSVD#W8 2 1 D CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 1 TP717 TP702 1 5 OF 9 CPU1E SSID = CPU 2 2 5 B34 A33 A34 B35 C35 AJ32 AK32 B RSVD#AH27 AH27 TP713 RSVD#AN35 RSVD#AM35 AN35 AM35 CLK_XDP_ITP_P CLK_XDP_ITP_N RSVD#AT2 RSVD#AT1 RSVD#AR1 TP720 1 1 1 TP718 TP719 AT2 AT1 AR1 Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title AUBURNF SKT-BGA989C468393H184-NF Size A4 Document Number CPU (RESERVED) LA480s Date: Tuesday, March 06, 2012 5 4 3 2 Sheet 7 of 1 Rev SA 103 A 4 3 CPU1F VCC_CORE POWER 2 6 OF 9 SANDY VCCIO:8.5A 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 DY 1 C845 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 DY C 1D05V_VTT VR_SVID_ALERT# 42 H_CPU_SVIDCLK 42 H_CPU_SVIDDAT 42 2 130R2F-1-GP 1D05V_VTT 1 1D05V_VTT 1 VCCIO_SENSE VSSIO_SENSE 1 R801 100R2F-L1-GP-U R809 10R2F-L-GP 2 AJ35 AJ34 42 42 2 VCCSENSE VSSSENSE 1 VCC_SENSE VSS_SENSE VCCIO_SENSE VSSIO_SENSE B10 A10 2 R808 10R2F-L-GP VCC_CORE R802 100R2F-L1-GP-U VCCIO_SENSE 45 VSSIO_SENSE 45 2 1 2 1 2 1 2 1 2 1 2 1 2 PEG AND DDR SVID 2 43R2J-GP C844 B 1 R804 SENSE LINES CORE SUPPLY 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 1 D SC10U6D3V5KX-1GP 2 C841 SC10U6D3V5KX-1GP 1 C840 SC10U6D3V5KX-1GP 1 R803 2 75R2F-2-GP C843 SC10U6D3V5KX-1GP H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT C842 SC10U6D3V5KX-1GP 2 C839 SC10U6D3V5KX-1GP C830 SC10U6D3V5KX-1GP 1 C838 SC10U6D3V5KX-1GP C829 SC10U6D3V5KX-1GP AJ29 AJ30 AJ28 C810 SC10U6D3V5KX-1GP C814 1 R807 VIDALERT# VIDSCLK VIDSOUT SC10U6D3V5KX-1GP C813 SC10U6D3V5KX-1GP 2 C809 SC10U6D3V5KX-1GP J23 C808 1D05V_VTT C812 SC10U6D3V5KX-1GP VCCIO C807 SC10U6D3V5KX-1GP A E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 C806 SC10U6D3V5KX-1GP B VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO C805 1D05V_VTT SC10U6D3V5KX-1GP DY VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12 SC10U6D3V5KX-1GP C828 SC10U6D3V5KX-1GP DY C827 SC10U6D3V5KX-1GP C831 SC10U6D3V5KX-1GP DY C826 SC10U6D3V5KX-1GP C832 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP DY SC10U6D3V5KX-1GP C833 C825 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC SC10U6D3V5KX-1GP C824 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP C834 C820 SC10U6D3V5KX-1GP C823 C811 SC10U6D3V5KX-1GP C819 SC10U6D3V5KX-1GP C835 C804 SC10U6D3V5KX-1GP C822 SC10U6D3V5KX-1GP C836 C818 SC10U6D3V5KX-1GP C837 C821 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP C SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP C816 C817 C803 SC10U6D3V5KX-1GP C815 C802 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP 1 C801 AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 1 VCC CORE:53A VCC_CORE D 1 2 5 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number Custom AUBURNF Date: 5 4 3 2 CPU (VCC_CORE) Rev SA LA480s W ednesday, March 07, 2012 Sheet 1 8 of 103 5 4 3 2 1 VCC_GFXCORE HR 10 ohm 1 2 D 1 C914 2 1 2 1 C913 C DY VCCSA 1 2 1 C917 2 1 C915 2 1 2 C912 2 1 C911 2 1 2 1 2 VREF DDR3 -1.5V RAILS SA RAIL TC903 ST330U2VDM-4-GP DY VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA M27 M26 L26 J26 J25 J24 H26 H25 VCCSA_SENSE H23 VCCSA_SENSE 48 FC_C22 VCCSA_VID1 C22 C24 VCCSA_SELECT0 48 VCCSA_SELECT1 48 B 20110103 4 3 1.8V RAIL AUBURNF RN901 SRN1KJ-7-GP BOM Control 1 2 1 2 1 2 1 2 C910 VCCA:6A C916 2 1 1 2 VCCPLL VCCPLL VCCPLL C909 SC10U6D3V5KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP B6 A6 A2 C924 100 ohm 1D5V_S0 VDDQ:5A SC10U6D3V5KX-1GP C922 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1 SC10U6D3V5KX-1GP C923 CRV +V_SM_VREF_CNT 37 SC10U6D3V5KX-1GP VCCPLL C926 AL1 SC10U6D3V5KX-1GP VCCPLL:1.2A SM_VREF SC10U6D3V5KX-1GP R901 0R0805-PAD-1-GP R906/R907 R907 100R2J-2-GP SC10U6D3V5KX-1GP B VCC_AXG_SENSE VSS_AXG_SENSE VCC_AXG_SENSE 42 VSS_AXG_SENSE 42 SC10U6D3V5KX-1GP 1D8V_S0 AK35 AK34 VAXG_SENSE VSSAXG_SENSE SC10U6D3V5KX-1GP C SANDY MISC 1 2 1 2 DY VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG GRAPHICS 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 RC902 SC33P50V2JN-3GP 1 DY C921 SC10U6D3V5KX-1GP AT24 AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17 AL24 AL23 AL21 AL20 AL18 AL17 AK24 AK23 AK21 AK20 AK18 AK17 AJ24 AJ23 AJ21 AJ20 AJ18 AJ17 AH24 AH23 AH21 AH20 AH18 AH17 RC901 SC33P50V2JN-3GP C920 SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP 2 C906 SC10U6D3V5KX-1GP C919 C905 SC10U6D3V5KX-1GP C918 C904 SC10U6D3V5KX-1GP C908 C903 SC10U6D3V5KX-1GP C907 SC10U6D3V5KX-1GP 2 C902 SC10U6D3V5KX-1GP 1 C901 7 OF 9 2 D SENSE LINES CPU1G PROCESSOR VAXG: 24A VCC_GFXCORE BOM Control R906 100R2J-2-GP 1 POWER RN901 10K ohm HR --------------- A 1K ohm CRV A 66.10236.04L Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CPU (VCC_GFXCORE) Size A3 Date: 5 4 3 2 Document Number Rev SA LA480s W ednesday, March 07, 2012 Sheet 1 9 of 103 5 4 3 2 1 SSID = CPU AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10 AT7 AT4 AT3 AR25 AR22 AR19 AR16 AR13 AR10 AR7 AR4 AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10 AP7 AP4 AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10 AN7 AN4 AM29 AM25 AM22 AM19 AM16 AM13 AM10 AM7 AM4 AM3 AM2 AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10 AL7 AL4 AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10 AK7 AK4 AJ25 D C CPU1H 8 OF 9 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS SANDY VSS 9 OF 9 CPU1I AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 P9 P8 P6 P5 P3 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34 L33 L30 L27 L9 L8 L6 L5 L4 L3 L2 L1 K35 K32 K29 K26 J34 J31 H33 H30 H27 H24 H21 H18 H15 H13 H10 H9 H8 H7 H6 H5 H4 H3 H2 H1 G35 G32 G29 G26 G23 G20 G17 G11 F34 F31 F29 AUBURNF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS SANDY VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3 D C AUBURNF B B A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 CPU (VSS) Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 10 of 103 5 4 3 2 1 D D C BLANK C B B Wistron Corporation A 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size A4 Date: Document Number Rev SA LA480s Tuesday, March 06, 2012 Sheet 11 of 103 A 5 4 3 2 1 VREF circuit -M1 (Voltage Driver Network) & M3 (Driven by Processor) Implementation CAD Note: All VREF traces should have 20:20 mil trace geometry. Note that while 20 mil trace width is optimal, short violations is acceptable if required due to tight routing constraints. For CRV 1 R1226 HR DY SB_DIMM_VREFDQ 2 0R2J-2-GP Driven by process (PIN#B4) DDR_W R_VREF01_B4 1 D R1227 1KR2F-3-GP 1 2 2 2 1 2 R1217 1KR2F-3-GP C1203 SCD1U10V2KX-4GP R1213 0R0402-PAD-1-GP C +V_SM_VREF 37 1 2 2 DY 2 TP1201 1 R1218 0R0402-PAD-1-GP 1 2 M_VREF_CA_DIMM0 R1209 0R2J-2-GP R1211 0R0402-PAD-1-GP 1 2 +V_M_VREF_MCH R1216 1KR2F-3-GP 2 2 DY 1 1 1 SODDIM0 M_VREF_DQ_DIMM0 C1206 SCD1U10V2KX-4GP R1212 0R0402-PAD-1-GP 1 2 +V_VREF_PATH6 +V_VREF_PATH4 R1215 1KR2F-3-GP R1214 0R2J-2-GP 1 2 R1203 0R0402-PAD-1-GP 1 2 M3_1D5V_DQ0 1D5V_S3 1 1 1 DDR_VREF_S3 R1204 0R0402-PAD-1-GP DY DY 1 DDR_W R_VREF01_B4 R1206 1KR2F-3-GP 1 C U1202 2N7002BK-GP HR 20,37 DRAMRST_CNTRL_PCH 1D5V_S3 2 R1205 0R2J-2-GP DDR_W R_VREF01_D1 D 2 G DY D 7 DDR_W R_VREF02 U1201 2N7002BK-GP HR 20,37 DRAMRST_CNTRL_PCH DDR_VREF_S3 2 0R2J-2-GP S 2 R1228 1KR2F-3-GP DY Driven by process (PIN#D1) S 7 DDR_W R_VREF01 HR 1 D 1 R1208 G SA_DIMM_VREFDQ DY R1231 1KR2F-3-GP 2 1 1 SODDIM1 2 B DY C1201 SCD1U10V2KX-4GP DY 2 M_VREF_DQ_DIMM1 DY 1 R1234 0R2J-2-GP C1205 SCD1U10V2KX-4GP M_VREF_CA_DIMM1 R1210 0R0402-PAD-1-GP 2 2 2 R1230 1KR2F-3-GP R1232 1KR2F-3-GP DY 2 1 1 M3_1D5V_DQ1 R1207 0R0402-PAD-1-GP 1 2 2 2 1 +V_VREF_VD2 R1225 0R2J-2-GP DY 1 DY R1221 0R2J-2-GP R1233 0R0402-PAD-1-GP DY 1 R1223 1KR2F-3-GP 2+V_VREF_PATH5 1 R1224 0R2J-2-GP 1 2 B 1 DY R1220 0R2J-2-GP 2 R1229 0R2J-2-GP 1D5V_S3 1 DDR_VREF_S3 1 2 1D5V_S3 2 +V_VREF_PATH1 DDR_VREF_S3 1+V_VREF_PATH3 2 R1222 R1219 0R0402-PAD-1-GP 0R0402-PAD-1-GP DDR_W R_VREF01_D1 1 2 +V_VREF_PATH2 <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 M3 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 12 of 103 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title <Title> Size A4 Date: Document Number Rev SA LA480s Tuesday, March 06, 2012 Sheet 13 of 103 A 5 4 30 203 204 0D75V_S0 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 ODT0 ODT1 VREF_CA VREF_DQ RESET# VTT1 VTT2 C1401 SCD1U10V2KX-5GP 1 Thermal EVENT 3D3V_S0 DY TS#_DIMM0_1 1D5V_S3 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 1 R1403 10KR2J-3-GP 2 C 1D5V_S3 0511-CHECK C1410 1 C1409 DY 2 DY 2 2 DY 1 C1408 1 C1407 1 1 C1406 2 1 2 1 2 C1416 C1405 DY C1417 1 C1415 C1404 2 C1414 C1403 1 DY 2 TC1401 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206 1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS C1402 SC2D2U10V3KX-1GP 2 SA0_DIM0 SA1_DIM0 2 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 77 122 125 1 197 201 1 NC#77 NC#122 NC#125/TEST 2 2 1 199 2 1 1 2 1 2 1 2 1 2 2 15,37 DDR3_DRAMRST# 3D3V_S0 TS#_DIMM0_1 15 SC10U6D3V5KX-1GP 126 1 PCH_SMBDATA 15,20,65,66,69 PCH_SMBCLK 15,20,65,66,69 198 SC10U6D3V5KX-1GP 116 120 200 202 SC10U10V5ZY-1GP 6 M_A_DIM0_ODT0 6 M_A_DIM0_ODT1 M_VREF_CA_DIMM0 M_VREF_DQ_DIMM0 M_A_DIM0_CLK_DDR1 6 M_A_DIM0_CLK_DDR#1 6 11 28 46 63 136 153 170 187 SC10U6D3V5KX-1GP 12 29 47 64 137 154 171 188 102 104 SC10U6D3V5KX-1GP M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6 SCD1U10V2KX-5GP 6 6 SA0 SA1 M_A_DIM0_CKE0 M_A_DIM0_CKE1 SCD1U10V2KX-5GP M_A_DQS[7:0] 10 27 45 62 135 152 169 186 VDDSPD 73 74 101 103 SCD1U10V2KX-5GP M_A_DQS#[7:0] M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 SDA SCL EVENT# 6 6 D R1401 R1402 0R0402-PAD-1-GP 0R0402-PAD-1-GP SCD1U10V2KX-5GP SC10U6D3V5KX-1GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP B DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 6 6 SC10U10V5ZY-1GP C1418 DY CK1 CK1# BA0 BA1 M_A_DIM0_CS#0 M_A_DIM0_CS#1 SC10U6D3V5KX-1GP C1422 DY CK0 CK0# 114 121 6 6 6 SC10U6D3V5KX-1GP C1421 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 CKE0 CKE1 M_A_RAS# M_A_WE# M_A_CAS# ST330U2VDM-4-GP 0D75V_S0 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 CS0# CS1# SA1_DIM0 110 113 115 2 C C1420 1 SA0_DIM0 NP1 NP2 1 109 108 NP1 NP2 RAS# WE# CAS# 2 6 M_A_BS2 6 M_A_BS0 6 M_A_BS1 M_A_DQ[63:0] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 1 6 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 79 2 D M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 1 6 2 M_A_A[15:0] DY 2 DIMM1 SSID = MEMORY C1419 3 B DDR3-204P-96-GP-U1 A A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title DDR3-SODIMM1 5 4 3 2 Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 14 of 103 5 4 3 SSID = MEMORY 203 204 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 ODT0 ODT1 VREF_CA VREF_DQ RESET# VTT1 VTT2 1 SA1_DIM1 2 C1502 SC2D2U10V3KX-1GP SA0_DIM1 2 1D5V_S3 R1502 0R0402-PAD-1-GP 1 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 C 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206 1D5V_S3 1 C1510 DY 2 1 C1509 2 1 C1508 DY 2 1 C1507 2 2 1 C1506 1 C1514 2 1 2 C1513 1 1 C1512 C1505 2 C1511 C1504 DY 2 1 C1503 DY 1 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 77 122 125 1 DY 2 C1501 SCD1U10V2KX-5GP 2 1 2 1 2 1 2 1 2 SA0_DIM1 SA1_DIM1 SC10U6D3V5KX-1GP 0D75V_S0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 R1501 10KR2J-3-GP 199 197 201 SC10U6D3V5KX-1GP 30 14,37 DDR3_DRAMRST# NC#1 NC#2 NC#/TEST 3D3V_S0 3D3V_S0 TS#_DIMM0_1 14 SC10U10V5ZY-1GP 126 1 M_VREF_CA_DIMM1 M_VREF_DQ_DIMM1 PCH_SMBDATA 14,20,65,66,69 PCH_SMBCLK 14,20,65,66,69 198 SC10U6D3V5KX-1GP 116 120 6 M_B_DIM0_ODT0 6 M_B_DIM0_ODT1 200 202 SCD1U10V2KX-5GP 12 29 47 64 137 154 171 188 SA0 SA1 M_B_DIM0_CLK_DDR1 6 M_B_DIM0_CLK_DDR#1 6 11 28 46 63 136 153 170 187 SC10U6D3V5KX-1GP M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 VDDSPD M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6 102 104 SCD1U10V2KX-5GP 6 6 SDA SCL EVENT# 101 103 D SCD1U10V2KX-5GP M_B_DQS[7:0] 10 27 45 62 135 152 169 186 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 6 6 SCD1U10V2KX-5GP SC1U6D3V2KX-GP M_B_DQS#[7:0] M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 BA0 BA1 M_B_DIM0_CKE0 M_B_DIM0_CKE1 SC10U6D3V5KX-1GP C1521 CK1 CK1# 6 6 73 74 6 6 6 SC10U10V5ZY-1GP C1520 DY SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP B C1519 CK0 CK0# M_B_DIM0_CS#0 M_B_DIM0_CS#1 SC10U10V5ZY-1GP 0D75V_S0 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 CKE0 CKE1 M_B_RAS# M_B_WE# M_B_CAS# 114 121 2 C M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 CS0# CS1# NP1 NP2 110 113 115 1 109 108 6 M_B_BS0 6 M_B_BS1 M_B_DQ[63:0] NP1 NP2 RAS# WE# CAS# 2 6 M_B_BS2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 1 6 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 79 2 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 6 D C1518 1 DIMM2 M_B_A[15:0] DY 2 B DDR3-204P-144-GP-U1 A A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title DDR3-SODIMM2 5 4 3 2 Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 15 of 103 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title DDR3-SODIMM2 Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 16 of 1 103 A A B C D E 3D3V_S0 RN1701 L_CTRL_DATA L_CTRL_CLK R1703 0R2-PT5-LILY-GP 1 2 4 49 LVDS_VDD_EN L_BKLTEN L_VDD_EN 49 L_BKLT_CTRL P45 L_BKLTCTL 49 LVDS_DDC_CLK_R 49 LVDS_DDC_DATA_R L_CTRL_CLK L_CTRL_DATA L_BKLT_EN LVDS_VDD_EN 3 4 T40 K47 L_DDC_CLK L_DDC_DATA T45 P39 L_CTRL_CLK L_CTRL_DATA LVDS_IBG AF37 AF36 LVD_IBG LVD_VBG LVDS_VREFH LVDS_VREFL AE48 AE47 LVD_VREFH LVD_VREFL 49 LVDSA_CLK# 49 LVDSA_CLK AK39 AK40 LVDSA_CLK# LVDSA_CLK 49 LVDSA_DATA0# 49 LVDSA_DATA1# 49 LVDSA_DATA2# AN48 AM47 AK47 AJ48 LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 AN47 AM49 AK49 AJ47 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 AF40 AF39 LVDSB_CLK# LVDSB_CLK AH45 AH47 AF49 AF45 LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 AH43 AH49 AF47 AF43 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3 1 RN1702 2 1 RN1704 R1701 2K37R2F-GP 2 1 3 4 SRN100KJ-6-GP 2 49 LVDSA_DATA0 49 LVDSA_DATA1 49 LVDSA_DATA2 5 6 7 8 82 CRT_HSYNC 82 CRT_VSYNC DAC_IREF_R 1 1 DY 2 1 2 2 DY 82 CRT_DDC_CLK 82 CRT_DDC_DATA SCD1U50V3KX-GP 2 EC1702 SCD1U50V3KX-GP DY SCD1U50V3KX-GP 1 EC1701 CRT_BLUE CRT_GREEN CRT_RED EC1703 82 CRT_BLUE 82 CRT_GREEN 82 CRT_RED R1702 1KR2D-1-GP N48 P49 T49 CRT_BLUE CRT_GREEN CRT_RED T39 M40 CRT_DDC_CLK CRT_DDC_DATA M47 M49 CRT_HSYNC CRT_VSYNC T43 T42 DAC_IREF CRT_IRTN AP43 AP45 SDVO_STALLN SDVO_STALLP AM42 AM40 SDVO_INTN SDVO_INTP AP39 AP40 3D3V_S0 4 RN1706 SRN2K2J-1-GP P38 M39 DDPB_AUXN DDPB_AUXP DDPB_HPD AT49 AT47 AT40 DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49 DDPC_CTRLCLK DDPC_CTRLDATA PCH_HDMI_CLK 82 PCH_HDMI_DATA 82 HDMI_PCH_DET HDMI_DATA2_R# HDMI_DATA2_R HDMI_DATA1_R# HDMI_DATA1_R HDMI_DATA0_R# HDMI_DATA0_R HDMI_CLK_R# HDMI_CLK_R C1701 C1702 C1703 C1704 C1705 C1706 C1707 C1708 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP 82 HDMI_DATA2_R#_C1 82 HDMI_DATA2_R_C1 82 HDMI_DATA1_R#_C1 82 HDMI_DATA1_R_C1 82 HDMI_DATA0_R#_C1 82 HDMI_DATA0_R_C1 82 HDMI_CLK_R#_C1 82 HDMI_CLK_R_C1 82 P46 P42 3 DDPC_AUXN DDPC_AUXP DDPC_HPD AP47 AP49 AT38 DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49 DDPD_CTRLCLK DDPD_CTRLDATA CRT 4 3 2 1 RN1705 SRN150F-1-GP SDVO_TVCLKINN SDVO_TVCLKINP SDVO_CTRLCLK SDVO_CTRLDATA SRN0J-6-GP CRT_RED CRT_GREEN CRT_BLUE 3 4 OF 10 PCH1D L_BKLT_EN J47 M45 PANEL_BLEN 3 4 27 2 1 SRN2K2J-1-GP Digital Display Interface 4 3 LVDS 1 2 M43 M36 DDPD_AUXN DDPD_AUXP DDPD_HPD AT45 AT43 BH41 DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42 2 2 PANTHER-GP-NF <Core Design> 1 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title A B C D PCH : LVDS/CRT/DDI Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 17 of 103 A B C 4 RN1801 10 9 8 7 6 LCD_PRESENCE# INT_PIRQD# INT_PIRQC# INT_PIRQG# 3D3V_S0 SRN8K2J-2-GP-U 2 1 PCI_GNT3# R1801 DY 4K7R2J-2-GP B21 M20 AY16 BG46 DGPU_HOLD_RST# 1 BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28 AW30 62 USB3_RX1_N R1810 2 62 USB3_RX3_N 10KR2J-L-GP 62 USB3_RX1_P 3 62 USB3_RX3_P 62 USB3_TX1_N 62 USB3_TX3_N 3D3V_S0 62 USB3_TX1_P 2 62 USB3_TX3_P 2 1 DY DGPU_PWR_EN# R1818 INT_PIRQA# 8K2R2J-3-GP INT_PIRQB# 1 2 DY R1815 10KR2F-2-GP 83 DGPU_HOLD_RST# TPAD14-GP TP1805 1 1 93 DGPU_PWR_EN# TP1816 TP1814 49 LCD_PRESENCE# TP1818 TP1815 66 WWAN_IN 2 1 1 TP1813 DY INT_PIRQC# INT_PIRQD# DGPU_HOLD_RST# DGPU_SELECT# DGPU_PWR_EN# BBS_BIT1 DGPU_PWM_SELECT# PCI_GNT3# 1 1 R1817 8K2R2J-3-GP 1 K40 K38 H38 G38 C46 C44 E40 D47 E42 F46 INT_PIRQF# INT_PIRQG# G42 G40 C42 D44 PCI_PME# K10 65,71,77 CLK_PCI_LPC 20 CLK_PCI_FB 27 CLK_PCI_KBC 2 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 USB3RN1 USB3RN2 USB3RN3 USB3RN4 USB3RP1 USB3RP2 USB3RP3 USB3RP4 USB3TN1 USB3TN2 USB3TN3 USB3TN4 USB3TP1 USB3TP2 USB3TP3 USB3TP4 C6 PIRQA# PIRQB# PIRQC# PIRQD# REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54 GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55 PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5 R1804 R1805 R1806 1 1 1 2 22R2J-2-GP 2 22R2J-2-GP 2 22R2J-2-GP CLK_PCI_LPC_R H49 CLK_PCI_FB_R H43 CLK_PCI_KBC_R J48 K42 H40 4 RSVD28 RSVD29 AY7 AV7 AU3 BG4 AT10 BC8 AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6 AV5 AV10 1 DY 1 DY 2 R1802 1KR2J-1-GP 2 R1803 1KR2J-1-GP BBS_BIT1 BBS_BIT0 GNT1#/GPIO51 NV_ALE NV_RCOMP 1 1 SATA1GP/GPIO19 BOOT BIOS Location 0 0 0 1 Reserved 1 0 Reserved LPC 1 1 SPI(Default) TP1817 TP1812 AT8 AY5 BA2 AT12 BF3 Gx8 USB Table Utilize Port 9 for USB debug USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P USBRBIAS# USBRBIAS 21 BOOT BIOS Strap C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32 USB_PN0 USB_PP0 C33 USB_RBIAS 1 1 TP1819 TP1820 Pair USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 62 62 82 82 62 62 63 63 USB_PN8 66 USB_PP8 66 USB_PN9 82 USB_PP9 82 USB_PN10 64 USB_PP10 64 USB_PN11 65 USB_PP11 65 USB_PN12 49 USB_PP12 49 USB3.0 ext port 1 USB2.0 ext port 3 USB3.0 ext port 2 BLUETOOTH WWAN USB2.0 ext port 4 Fingerprint Mini Card1 (WLAN) CAMERA Device 0 X 1 USB3.0, ext port1 2 USB2.0, ext. port 3 3 USB3.0, ext port2 4 Bluetooth 5 X 6 X 7 X 8 3G 9 USB2.0, ext port4 10 Finger Print 11 Mini Card1 (WLAN) 12 CAMERA 13 X 3 1 2 R1811 22D6R2F-L1-GP B33 PME# PLTRST# 1 PCI_PLTRST# DGPU_PWM_SELECT# RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 3D3V_S0 R1814 10KR2F-2-GP 3D3V_S0 TP21 TP22 TP23 TP24 RSVD5 RSVD6 USB 3D3V_S0 1 2 3 4 5 PCI WWAN_IN INT_PIRQB# INT_PIRQF# INT_PIRQA# TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20 RSVD1 RSVD2 RSVD3 RSVD4 RSVD BG26 BJ26 BH25 BJ16 BG16 AH38 AH37 AK43 AK45 C18 N30 H3 AH12 AM4 AM5 Y13 K24 L24 AB46 AB45 E 5 OF 10 PCH1E SSID = PCH D CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4 OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14 A14 K20 B17 C16 L16 A16 D14 C14 USB_OC#0_1 USB_OC#2_3 USB_OC#4_5 USB_OC#6_7 USB_OC#8_9 USB_OC#10_11 USB_OC#12_13 PCH_GPIO14 USB_OC#0_1 USB_OC#2_3 USB_OC#4_5 62 82 62 USB_OC#8_9 82 2 PANTHER-GP-NF RN1802 5,27,31,32,36,65,66,71,77,80,83,97 USB_OC#2_3 PCH_GPIO14 USB_OC#6_7 USB_OC#0_1 R1807 0R2-PT5-LILY-GP 1 2 PCI_PLTRST# PLT_RST# 3D3V_S5 10 9 8 7 6 USB_OC#12_13 USB_OC#8_9 USB_OC#4_5 USB_OC#10_11 3D3V_S5 SRN8K2J-2-GP-U 1 1 R1816 100KR2J-1-GP 1 2 3 4 5 C1801 SC220P50V2KX-3GP DY 2 2 DY 1 1 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title A B C D PCH : PCI/USB/NVRAM/RSVD Size A2 Document Number Date: Tuesday, March 06, 2012 Sheet E Rev SA LA480s 18 of 103 A B C D E SSID = PCH 4 4 3 OF 10 PCH1C 4 1 R1926 DY 1 R1904 2 SYS_PWROK 10KR2J-3-GP 2 PWROK 100KR2J-1-GP 4 DMI_RXP[3:0] DMI_TXN[3:0] DMI_TXP[3:0] DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 BC24 BE20 BG18 BG20 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 BE24 BC20 BJ18 BJ20 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 AW24 AW20 BB18 AV18 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 AY24 AY20 AY18 AU18 DMI0RXN DMI1RXN DMI2RXN DMI3RXN FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 DMI0RXP DMI1RXP DMI2RXP DMI3RXP DMI0TXN DMI1TXN DMI2TXN DMI3TXN DMI0TXP DMI1TXP DMI2TXP DMI3TXP FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 FDI 4 DMI_RXN[3:0] DMI 4 FDI_INT 1D05V_VTT 3D3V_S0 R1905 1 10KR2J-3-GP DY 2 BJ24 SYS_RESET# R1901 2 49D9R2F-GP 1 2 R1902 750R2F-GP 1 DMI_COMP_R BG25 RBIAS_CPY BH21 DMI_ZCOMP FDI_FSYNC0 DMI_IRCOMP FDI_FSYNC1 DMI2RBIAS FDI_LSYNC0 FDI_LSYNC1 3 SUS_PWR_ACK 5 XDP_DBRESET# R1914 0R2-PT5-LILY-GP 1 2 27 S0_PWR_GOOD 1 R1920 2 0R2-PT5-LILY-GP 1 R1927 45 1 MEPWROK R1930 SYS_RESET# C12 K3 P12 36 SYS_PWROK 42,48 D85V_PWRGD SUSACK# 1 DY R1923 2 2 0R2J-2-GP PWROK MEPWROK_C L22 L10 NonSBA 0R2J-2-GP SUSACK# SYS_RESET# SYS_PWROK PWROK APWROK 2 SBA 0R2J-2-GP B13 37 PM_DRAM_PWRGD 27,97 PM_PWRBTN# PM_RSMRST# C21 SUS_PWR_ACK K16 PM_PWRBTN# E20 H20 27 AC_PRESENT BATLOW# E10 PM_RI# A10 DRAMPWROK RSMRST# System Power Management 27 SUS_PWR_ACK DSWVRMEN R1915 0R2-PT5-LILY-GP 1 2 R1916 0R2-PT5-LILY-GP 1 2 DPWROK WAKE# CLKRUN#/GPIO32 SUS_STAT#/GPIO61 SUSCLK/GPIO62 SLP_S5#/GPIO63 SLP_S4# SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PWRBTN# SLP_A# ACPRESENT/GPIO31 SLP_SUS# BATLOW#/GPIO72 PMSYNCH RI# SLP_LAN#/GPIO29 BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9 FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_TXN[7:0] 4 FDI_TXP[7:0] 4 RTC_AUX_S5 AW16 FDI_INT AV12 FDI_FSYNC0 4 BC10 FDI_FSYNC1 4 AV14 FDI_LSYNC0 4 BB10 FDI_LSYNC1 4 A18 DSWODVREN E22 PCH_DPWROK 4 DSWODVREN 2 PCIE_WAKE# N3 PM_CLKRUN# N14 SUS_CLK D10 PM_SLP_S5# 1 TP1901 R1913 0R2-PT5-LILY-GP 1 2 1 TP1902 PCH_SUSCLK_KBC PM_SLP_S4# 27,46,97 PM_SLP_S3# 27,36,37,47 G10 PM_SLP_A# 1 TP1904 PM_SLP_LAN# 1 TP1905 AP14 K14 2 330KR2J-L1-GP R1919 1 3 2 8K2R2J-3-GP 27 F4 PM_SLP_SUS# DY 27,77 H4 G16 1 31,65 PM_CLKRUN# PM_SUS_STAT# R1918 2 330KR2J-L1-GP RTC_AUX_S5 B9 G8 1 3D3V_S0 R1992 0R2-PT5-LILY-GP 1 2 PM_RSMRST# 1 DY R1911 10KR2J-3-GP R1917 27,45 H_PM_SYNC 5 2 2 3D3V_S5 PANTHER-GP-NF RN1901 8 7 6 5 PCIE_WAKE# PM_RI# SUS_PWR_ACK BATLOW# 1 2 3 4 SRN10KJ-6-GP 2 R1922 2 3D3V_AUX_S5 1 10KR2J-3-GP AC_PRESENT 1 10KR2J-3-GP PM_PWRBTN# 2 R1909 R1908 2 10KR2J-3-GP 1 2 R1925 1 100KR2J-1-GP R1924 10KR2J-3-GP 1 DY Q1901 3V_5V_POK_# 4 3 5 2 6 1 PM_RSMRST# PM_RSMRST# 1 R1921 1KR2J-1-GP 2 RSMRST#_KBC 27 3V_5V_POK 41 DMN66D0LDW-7-GP 1 1 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title A B C D PCH : DMI/FDI/PM Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 19 of 103 A B C D 3D3V_S5 SSID = PCH 3D3V_S5 1 R2004 10KR2J-3-GP BE38 BC38 AW38 AY38 Y40 Y39 PCIE_CLK_RQ0# WLAN CLK 65 CLK_PCIE_WLAN# 65 CLK_PCIE_WLAN RN2012 2 1 SRN0J-6-GP CLK_PCH_SRC1_N 3 CLK_PCH_SRC1_P 4 PCIE_CLK_WLAN_REQ# 65 PCIE_CLK_WLAN_REQ# Card Reader CLK 32 CLK_PCIE_CR# 32 CLK_PCIE_CR RN2009 2 1 LAN CLK RN2016 1 2 AB49 AB47 M1 SRN0J-6-GP CLK_PCH_SRC2_N CLK_PCH_SRC2_P AA48 AA47 PCIE_CLK_CR_REQ# V10 SRN0J-6-GP CLK_PCH_SRC3_N 4 CLK_PCH_SRC3_P 3 Y37 Y36 3 4 32 PCIE_CLK_CR_REQ# 31 CLK_PCIE_LAN# 31 CLK_PCIE_LAN J2 PCIE_CLK_LAN_REQ# 31 PCIE_CLK_LAN_REQ# PCIE_CLK_LAN_REQ# A8 1 2 SML1CLK/GPIO58 SML1DATA/GPIO75 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8 CL_CLK1 DRAMRST_CNTRL_PCH C8 SML0_CLK G12 SML0_DATA DRAMRST_CNTRL_PCH L14 RN2007 PCH_GPIO74 E14 SML1_CLK M16 SML1_DATA DY PEG_B_CLKRQ# E6 V40 V42 PCIE_CLK_RQ6# T13 V38 V37 SML1_CLK 27,62 Q2001 SMB_DATA SML1_DATA 27,62 M7 CL_CLK 1 TP2001 T11 CL_DATA 1 TP2002 CLK_PCIE_NEW_REQ# K12 TP2010 TP2011 3D3V_S0 PCIE_CLK_XDP_N PCIE_CLK_XDP_P 1 1 AK14 AK13 CL_RST# M10 PEG_CLKREQ#_R 2 4 3 PCH_SMBDATA 14,15,65,66,69 DMN66D0LDW-7-GP 14,15,65,66,69 SMB_CLK R2003 0R2-PT5-LILY-GP 1 2 PEG_CLKREQ# C2008 SC15P50V2JN-2-GP 2 1 83 CLKIN_DMI_N CLKIN_DMI_P PCIECLKRQ2#/GPIO20 CLK_PCIE_VGA# 83 CLK_PCIE_VGA 83 AV22 AU22 CLKOUT_DMI_N CLKOUT_DMI_P CLKOUT_PCIE2N CLKOUT_PCIE2P CLKOUT_PCIE3N CLKOUT_PCIE3P CLKIN_GND1_N CLKIN_GND1_P 1 4 R2006 1M1R2J-GP 2 3 CLK_EXP_N CLK_EXP_P AM12 AM13 CLK_DP_N CLK_DP_P BF18 BE18 CLK_BUF_EXP_N CLK_BUF_EXP_P BJ30 BG30 CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P G24 E24 CLK_BUF_DOT96_N CLK_BUF_DOT96_P AK7 AK5 CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P XTAL25_OUT 3 CLKIN_DOT_96N CLKIN_DOT_96P CLKOUT_PCIE4N CLKOUT_PCIE4P CLKIN_SATA_N CLKIN_SATA_P PCIECLKRQ4#/GPIO26 CLKOUT_PCIE5N CLKOUT_PCIE5P REFCLK14IN PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK K45 CLK_BUF_REF14 H45 CLK_PCI_FB CLKOUT_PEG_B_N CLKOUT_PEG_B_P XTAL25_IN XTAL25_OUT V47 V49 XTAL25_IN XTAL25_OUT 3D3V_S0 3D3V_S0 R2012 10KR2J-3-GP 2 1 NonSBA 3 4 CLK_PCI_FB 18 2 Y47 XCLK_RCOMP 1 R2007 90D9R2F-1-GP XCLK_RCOMP CLKOUT_PCIE6N CLKOUT_PCIE6P C2007 SC15P50V2JN-2-GP 2 1 R2013 10KR2J-3-GP UMA R2010 10KR2J-3-GP +VCCDIFFCLKN PEG_B_CLKRQ#/GPIO56 XTAL-25MHZ-155-GP 5 5 TP2006 TP2007 1 1 SRN10KJ-5-GP PCIECLKRQ3#/GPIO25 RN2020 CLK_BUF_DOT96_N 1 CLK_BUF_DOT96_P 2 SRN10KJ-5-GP 4 3 RN2021 CLK_BUF_CKSSCD_N 1 CLK_BUF_CKSSCD_P 2 SRN10KJ-5-GP 4 3 RN2019 CLK_BUF_EXP_N 1 CLK_BUF_EXP_P 2 SRN10KJ-5-GP 4 3 SBA CLK_BUF_REF14 1 R2008 10KR2J-3-GP SBA_SUPPORT# DGPU_PRSNT# SBA_SUPPORT# 22 R2011 10KR2J-3-GP OPS 3D3V_S5 RN2001 1 2 3 4 1 2 3 4 2 8 7 6 5 CLK_PCIE_NEW_REQ# PCIE_CLK_LAN_REQ# PCIE_CLK_RQ4# PCIE_CLK_RQ5# 2 SRN10KJ-6-GP RN2002 8 PCIE_CLK_RQ0# 7 PEG_B_CLKRQ# 6 5 EC_SWI# SRN10KJ-6-GP PCIECLKRQ6#/GPIO45 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P 1 5 TP2003 1 AB37 AB38 CLKOUT_PEG_A_N CLKOUT_PEG_A_P CLKOUT_DP_N CLKOUT_DP_P PCIECLKRQ7#/GPIO46 6 XTAL25_IN PCIECLKRQ1#/GPIO18 CLKOUT_PCIE7N CLKOUT_PCIE7P 3 4 SRN2K2J-1-GP X2001 FLEX CLOCKS AB42 AB40 2 R2009 1KR2J-1-GP 12,37 3D3V_S0 C13 P10 CL_RST1# PEG_A_CLKRQ#/GPIO47 CLKOUT_PCIE1N CLKOUT_PCIE1P 4 RN2006 3 SRN10KJ-5-GP 1 PCH_SMBCLK CL_DATA1 CLKOUT_PCIE0N CLKOUT_PCIE0P PCIECLKRQ0#/GPIO73 A12 1 EC2002 2 SCD1U16V2KX-L-GP 1 DY 2 SCD1U16V2KX-L-GP EC2001 L12 V45 V46 PCIE_CLK_WLAN_REQ# PCIE_CLK_RQ5# 2 DRAMRST_CNTRL_PCH RN2008 Y43 Y45 PCIE_CLK_RQ4# PERN6 PERP6 PETN6 PETP6 SML1ALERT#/PCHHOT#/GPIO74 4 SMB_DATA 80 2 1 LAN PERN5 PERP5 PETN5 PETP5 3 RN2005 4 SRN2K2J-1-GP 1 2 2 3 SML0CLK SML0DATA 2 1 PCIE_CLK_RQ6# PCH_GPIO74 1 BG40 BJ40 AY40 BB40 Card Reader SML0ALERT#/GPIO60 SML1_CLK SML1_DATA 1 BJ38 BG38 AU36 AV36 DY 1 RN2004 2 SRN2K2J-1-GP 2 BG37 BH37 AY36 BB36 SMB_DATA WLAN SMBUS PCIE_TXN4_C PCIE_TXP4_C PERN4 PERP4 PETN4 PETP4 C9 4 3 1 2 SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP BF36 BE36 AY34 BB34 PERN3 PERP3 PETN3 PETP3 SMBDATA R2005 10KR2J-3-GP SMB_CLK 80 SML0_DATA SML0_CLK 1 1 1 PCIE_TXN3_C PCIE_TXP3_C BG36 BJ36 AV34 AU34 PERN2 PERP2 PETN2 PETP2 SMB_CLK 1 RN2003 2 SRN2K2J-1-GP 2 C2005 C2006 2 SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP BE34 BF34 BB32 AY32 EC_SWI# H14 4 3 1 PCIE_RXN4 PCIE_RXP4 PCIE_TXN4 PCIE_TXP4 1 1 PCIE_TXN2_C PCIE_TXP2_C E12 2 31 31 31 31 C2003 C2004 2 SCD1U10V2KX-5GP 2 SCD1U10V2KX-5GP Link PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3 1 1 SMBCLK Controller 32 32 32 32 C2016 C2015 WWAN PCI-E* PCIE_RXN2 PCIE_RXP2 PCIE_TXN2 PCIE_TXP2 PEG_CLKREQ#_R SMBALERT#/GPIO11 CLOCKS 65 65 65 65 PERN1 PERP1 PETN1 PETP1 2 2 OF 10 PCH1B BG34 BJ34 AV32 AU32 SMB_CLK SMB_DATA 2 4 E CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67 K43 JTAG_TCK 1 TP2004 F47 CLK_PCH_48M_L 1 TP2008 H47 CLK_27M_VGA_R 1 TP2005 K49 DGPU_PRSNT# RN2018 1 2 4 3 PCIE_CLK_CR_REQ# PCIE_CLK_WLAN_REQ# PANTHER-GP-NF SRN10KJ-5-GP 1 1 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title A B C D PCH : PCIE/SMBUS/CLK Size A2 Document Number Date: Tuesday, March 06, 2012 Sheet E Rev SA LA480s 20 of 103 A B SSID = PCH G22 SM_INTRUDER# 1M1R2J-GP PCH_INTVRMEN 2 330KR2F-L-GP 2 R2104 1 R2105 1 D20 SRTC_RST# 1 HDA_BITCLK HDA_SYNC 82 HDA_CODEC_SYNC 33R2J-2-GP2 82 HDA_CODEC_SDOUT 33R2J-2-GP2 DY 1 R2122 HDA_SYNC 1 R2123 HDA_SDOUT 82 82 HDA_CODEC_RST# 82 HDA_CODEC_BITCLK R2115 R2116 HDA_RST# N34 L34 K34 E34 HDA_SDIN0 G34 2 33R2J-2-GP HDA_RST# 2 33R2J-2-GP HDA_BITCLK 1 1 C17 T10 HDA_SPKR 82 K22 C34 A34 +3VS_+1.5VS_HDA_IO 1 R2102 DY 27 ME_UNLOCK R2107 HDA_SDOUT 2 1KR2J-1-GP 1 HDA_SDOUT 2 1KR2J-1-GP A36 PCH_GPIO33 C36 PCH_GPIO13 N32 TP2105 1 PCH_JTAG_TCK_BUF J3 3D3V_S0 3 1 R2106 HDA_SPKR 2 DY 1KR2J-1-GP R2129 1 2 TP2102 1 PCH_JTAG_TMS H7 TP2103 1 PCH_JTAG_TDI K5 TP2104 1 PCH_JTAG_TDO H1 PCH_GPIO13 10KR2J-3-GP RTCRST# INTRUDER# INTVRMEN HDA_BCLK HDA_SYNC SPKR SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP HDA_RST# HDA_SDIN0 HDA_SDIN2 HDA_SDIN3 HDA_SDO HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO13 JTAG_TMS SATAICOMPO JTAG_TDI JTAG_TDO 27,60 SPI_CS1#_R 27,60 SPI_SI_R +3VS_+1.5VS_HDA_IO Y14 SBA 1 R2110 PCH_SPI_SI 33R2J-2-GP V4 2 T3 T1 U3 27,60 SPI_SO_R SPI_CLK LPC_FRAME# R2128 10KR2J-3-GP 27,65,71,77 4 DY APS_LED 68 INT_SERIRQ APS_LED 27,77 AM3 AM1 AP7 AP5 SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 66 66 66 66 m-SATA AM10 AM8 AP11 AP10 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1 56 56 56 56 HDD1 1D05V_VTT Y11 SATA_COMP Y10 SATAICOMPI R2112 1 2 37D4R2F-GP 3 1D05V_VTT AB12 SATA3RBIAS AB13 SATA3_COMP R2113 1 2 49D9R2F-GP AH1 RBIAS_SATA3 R2114 1 2 750R2F-GP SPI_CS0# SPI_CS1# SPI 27,60 SPI_CS0#_R PCH_SPI_CLK 33R2J-2-GP 2 PCH_SPI_CS0# 33R2J-2-GP 2 PCH_SPI_CS1# 33R2J-2-GP 2 2 22R2F-1-GP Y3 Y1 AB3 AB1 SATA3COMPI 1 R2108 1 R2109 1 R2117 1 APS_LED Y7 Y5 AD3 AD1 SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXP R2121 3D3V_S0 27,65,71,77 AB8 AB10 AF3 AF1 SATA3RXN SATA3RXP SATA3TXN SATA3TXP JTAG_TCK 2 2 2 2 AD7 AD5 AH5 AH4 SATA2RXN SATA2RXP SATA2TXN SATA2TXP HDA_SDIN1 1 1 1 1 V5 SERIRQ SATA3RCOMPO 27,60 SPI_CLK_R 2 1KR2J-1-GP E36 K36 LDRQ0# LDRQ1#/GPIO23 DY R2103 1 D36 LPC_FRAME#_L FWH4/LFRAME# SRTCRST# LPC_AD[0..3] 22R2F-1-GP LPC_AD0 22R2F-1-GP LPC_AD1 22R2F-1-GP LPC_AD2 22R2F-1-GP LPC_AD3 R2111 R2118 R2119 R2120 2 RTCX2 LPC_AD0_TPM LPC_AD1_TPM LPC_AD2_TPM LPC_AD3_TPM C38 A38 B37 C37 1 2 RTC_RST# LPC C20 FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 SATA 6G RTC_X2 RTCX1 RTC 1 A20 IHDA 2 1 G2101 GAP-OPEN RTC_AUX_S5 2 C2104 SC1U6D3V2KX-GP 1 OF 10 PCH1A RTC_X1 C2102 SC10P50V2JN-4GP C10P50V2JN-4GP 4 2 2 1 1 XTAL-32D768KHZ-15-GP C2103 SATA X2101 C2101S E 4 3 RN2104 JTAG 1 2 RTC_X2 2 10MR2J-L-GP SC1U6D3V2KX-GP 2 1 1 D RTC_AUX_S5 SRN20KJ-GP-U RTC_X1 R2101 C SPI_MOSI SPI_MISO SATA_LED# P3 SATALED# P1 SATA1GP/GPIO19 SATA_LED# 68 BBS_BIT0 18 PCH_GPIO21 V14 SATA0GP/GPIO21 HDA_SYNC PANTHER-GP-NF PCH_JTAG_TCK_BUF 1 R2134 2 51R2J-2-GP 3D3V_S0 RN2103 SATA_LED# 22 PCH_SPI_CLK HDA_CODEC_BITCLK HDA_CODEC_SDOUT SPI_CS0#_R EC2102 C2102 EC2103 C2103 EC2101 C2101 S_GPIO 1 2 3 4 PCH_GPIO21 2 8 7 6 5 2 2E 1 DY SC4D7P50V2CN-1GP 2E 1 1 DY SC4D7P50V2CN-1GP DY SC4D7P50V2CN-1GP 1 EC2104 2 SCD1U16V2KX-L-GP 2E SRN10KJ-6-GP DY INT_SERIRQ 1 R2125 2 8K2R2F-1-GP Q2101 2N7002BK-GP HDA_CODEC_SYNC_L S D HDA_SYNC 2 R2127 1MR2F-GP G 1 HDA_CODEC_SYNC 2 1 R2124 33R2J-2-GP 5V_S0 1 1 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title A B C D PCH : HDA/JTAG/SATA Size A2 Document Number Date: Tuesday, March 06, 2012 Sheet E Rev SA LA480s 21 of 103 A B C D E 1D8V_S0 4 1 4 6 OF 10 H_A20GATE H_RCIN# DGPU_HPD_INTR# 27 SRN10KJ-5-GP EC_SCI# EC_SCI# E38 ICC_EN# C10 C4 60 RTC_DET# PCH_GPIO15 K CH751H-40-1-GP R2223 0R2-PT5-LILY-GP 1 2 PCH_GPIO16 U2 1 D40 PCH_GPIO22 T5 PCH_GPIO24 E8 PCH_GPIO27 PCH_GPIO16 PLL_ODVR_EN 63 E16 P8 K1 -BT_DET 1 PCH_GPIO35 K4 DMI_OVRVLTG V8 FDI_OVRVLTG M5 TP2213 3D3V_S0 GPIO38 N2 GFX_CRB_DET M3 3 1 R2220 2 PCH_GPIO48 10KR2J-3-GP PCH_TEMP_ALERT# PCH_TEMP_ALERT# 1 R2222 RN2201 EC_SMI# 1 EC_SCI# 2 DGPU_HPD_INTR# 3 PCH_GPIO22 4 V13 V3 2 10KR2J-3-GP D6 77 -DTPM_PRESENCE 8 7 6 5 1 PCH_NCTF_1 A4 TP2206 A44 A45 1 R2230 2 PCH_GPIO27 1 R2229 2 TACH3/GPIO7 TACH7/GPIO71 10KR2J-3-GP NV_CLE SBA_SUPPORT# 20 1 R1809 2 1KR2J-1-GP H_SNB_IVB# 5 C41 A40 LAN_PHY_PWR_CTRL/GPIO12 GPIO15 A20GATE PECI SATA4GP/GPIO16 TACH0/GPIO17 SCLOCK/GPIO22 GPIO24 GPIO27 GPIO28 PROCPWRGD THRMTRIP# INIT3_3V# DF_TVS TS_VSS1 STP_PCI#/GPIO34 TS_VSS2 GPIO35 TS_VSS3 SATA2GP/GPIO36 TS_VSS4 P4 H_A20GATE AU16 H_PECI_R 1 R2203 P5 H_RCIN# AY11 27 2 DY 0R2J-2-GP H_CPUPWRGD AY10 PCH_THERMTRIP_R T14 INIT3_3V# AY1 NV_CLE 1 H_PECI 5,27 27 1 R2204 390R2J-1-GP TP2201 5,97 2 H_THERMTRIP# 5,36 AH8 AK11 AH10 AK10 TS_VSS R2219 0R0402-PAD-1-GP 1 2 SATA3GP/GPIO37 SLOAD/GPIO38 NC_1 P37 3 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 VSS_NCTF_15#BG2 SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16#BG48 GPIO57 VSS_NCTF_17#BH3 VSS_NCTF_1#A4 VSS_NCTF_2#A44 VSS_NCTF_3#A45 VSS_NCTF_19#BJ4 VSS_NCTF_20#BJ44 VSS_NCTF_21#BJ45 VSS_NCTF_4#A46 VSS_NCTF_22#BJ46 VSS_NCTF_5#A5 VSS_NCTF_23#BJ5 PCH_NCTF_15 1 BG2 TP2214 BG48 PCH_NCTF_16 1 BH3 PCH_NCTF_17 1 BH47 PCH_NCTF_18 1 TP2216 3D3V_S0 TP2217 TP2215 R2207 DY 10KR2J-3-GP BJ4 BJ44 FDI_OVRVLTG R2208 10KR2J-3-GP BJ45 BJ46 2 A46 B41 GPIO8 VSS_NCTF_18#BH47 SRN10KJ-6-GP GPIO38 TACH6/GPIO70 PCH_NCTF_8 B47 TP2212 BD1 BD49 1 PCH_NCTF_2 BE1 1 PCH_NCTF_3 BE49 TP2207 TP2208 PCH_GPIO15 1 R2201 2 PCH_GPIO24 1 R2221 2 BF1 1KR2J-1-GP 1 TP2209 PCH_NCTF_4 BF49 VSS_NCTF_6#A6 VSS_NCTF_7#B3 VSS_NCTF_8#B47 VSS_NCTF_9#BD1 VSS_NCTF_10#BD49 VSS_NCTF_11#BE1 VSS_NCTF_12#BE49 VSS_NCTF_24#BJ6 VSS_NCTF_25#C2 VSS_NCTF_26#C48 VSS_NCTF_27#D1 VSS_NCTF_28#D49 VSS_NCTF_29#E1 VSS_NCTF_30#E49 VSS_NCTF_13#BF1 VSS_NCTF_31#F1 VSS_NCTF_14#BF49 VSS_NCTF_32#F49 BJ6 C2 3D3V_S0 C48 1 B3 1 PCH_NCTF_27 1 D1 TP2211 R2209 DY 10KR2J-3-GP D49 E1 2 A6 3D3V_S5 BJ5 E49 1 10KR2J-3-GP DMI_OVRVLTG R2210 10KR2J-3-GP F1 F49 2 A5 NCTF TEST PIN: A4,A44,A45,A46,A5,A6,B3,B47, BD1,BD49,BE1,BE49,BF1,BF49, BG2,BG48,BH3,BH47,BJ4,BJ44, BJ45,BJ46,BJ5,BJ6,C2,C48,D1, D49,E1,E49,F1,F49 PCH_GPIO48 TACH5/GPIO69 TACH2/GPIO6 RCIN# DGPU_PWROK_C TP2210 R2231 10KR2J-3-GP 1 DY 2 TACH4/GPIO68 TACH1/GPIO1 CPU/MISC 92,93 DGPU_PWROK G2 DY A BMBUSY#/GPIO0 GPIO D2403 H36 NCTF 3 4 1 A42 RN2203 2 1 R1808 2K2R2J-2-GP C40 2 S_GPIO T7 1 21 3D3V_S0 GPIO0 2 PCH1F R2218 1 2 100R2J-2-GP EC_SMI# 10KR2J-3-GP PANTHER-GP-NF 2 2 PLL_ODVR_EN 1 R2234 2 10KR2J-3-GP DY DY ICC_EN# 1 R2211 1KR2J-1-GP 2 1 3D3V_S0 R2205 GFX_CRB_DET PLL_ODVR_EN 1 2 DY 10KR2J-3-GP 1 DY R2212 1KR2J-1-GP 2 2 R2206 100KR2J-1-GP 1 1 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title PCH : GPIO/NTCF/MISC A B C D Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 22 of 103 5 4 3 2 1 SSID = PCH 3D3V_DAC_S0 VCCIO24 AN33 VCCIO25 V34 VCCVRM3 AT16 VCCDMI1 AT20 AN34 VCCCLKDMI AB36 +VCCAFDI_VRM R2308 0R0402-PAD-1-GP 1 2 VCCDFTERM1 VCC3_3_3 VCCDFTERM2 AG17 VCCDFTERM3 AJ16 VCCDFTERM4 AJ17 1 VCCFDIPLL BG6 AP17 1D05V_VTT +1.05VS_VCC_DMI AU20 VCCAFDIPLL VCCIO27 VCCDMI2 R2307 0R0402-PAD-1-GP 1 2 1 2 3 1D05V_VTT DY 1 VCCSPI V1 0.02A PANTHER-GP-NF 5 4 DY C2324 B C2322 SCD1U10V2KX-5GP VCCSPI_3D3V 2 0.042A (Totally current of VCCDMI) 1D8V_S0 0.19A OUT NC#4 AME8818BEEV330Z-GP C2325 C2321 SC1U6D3V2KX-GP IN GND EN DY 2 TP2302 VCCVRM2 FDI AP16 3D3V_DAC_S0 U2302 C2320 SC1U6D3V2KX-GP R2309 0R0402-PAD-1-GP 1 2 3D3V_S5 1 0.159A(Totally current of VCCVRM) +VCCAFDI_VRM 3.3V CRT LDO 5V_S0 1 VCCIO26 DFT / SPI 1 BH29 C2310 SCD1U10V2KX-5GP 1D5V_S0 1D05V_VTT R2306 0R0402-PAD-1-GP 1 2 0.02A AG16 2 B C C2319 SCD1U10V2KX-5GP +1.05VS_VCC_DMI 2 3D3V_S0 2 2 2 VCC3_3_7 +1.05VS_VCC_DMI_CCI 0.266A (Totally VCC3_3 current) 1 1 1 HVCMOS 1 2 1 2 1 2 1 3D3V_S0 0.266A 0.042A DMI VCCIO23 AT24 V33 0.16A VCCIO AP26 VCC3_3_6 SC1U6D3V2KX-GP VCCIO22 C2318 1 AP24 C2316 C2317 SCD01U16V2KX-L1-GP SCD01U16V2KX-L1-GP 2 VCCIO21 +1.8VS_VCCTX_LVDS 1 VCCIO20 AP23 1D8V_S0 R2305 0R0603-PAD-1-GP 1 2 0.06A 2 AP21 3D3V_S0 SC1U10V2KX-1GP VCCIO19 AP37 R2304 0R0603-PAD-1-GP 1 2 1 VCCIO18 AN27 VCCTX_LVDS4 C2326 SC10U6D3V5KX-1GP 2 AN26 AP36 1 VCCIO17 AM38 VCCTX_LVDS3 2 AN21 AM37 VCCTX_LVDS2 1 VCCIO16 VCCTX_LVDS1 BLM18PG181SN1D-GP +3VS_VCCA_LVDS 2 AN17 AK37 1 VCCIO15 C2309 SC1U6D3V2KX-GP 2 C2308 SCD1U10V2KX-5GP 1 C2307 SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V3MX-GP 2 C2306 VSSALVDS 2 VCCAPLLEXP AN16 2.925A(Total current of VCCIO) C AK36 C2315 1 1 2 1 2 CRT LVDS 0.001A VCCALVDS 2 BJ22 C2314 D 3D3V_S0 R2302 0R0402-PAD-1-GP 1 2 SC10U6D3V3MX-GP VCCAPLLEXP 1 VCCIO28 VSSADAC U47 2 SC10U6D3V5KX-1GP TP2301 1D05V_VTT AN19 VCCADAC 1 SCD1U10V2KX-5GP VCCCORE1 VCCCORE2 VCCCORE3 VCCCORE4 VCCCORE5 VCCCORE6 VCCCORE7 VCCCORE8 VCCCORE9 VCCCORE10 VCCCORE11 VCCCORE12 VCCCORE13 VCCCORE14 VCCCORE15 VCCCORE16 VCCCORE17 L2301 U48 +VCCA_DAC_1_2 C2313 SCD01U16V2KX-L1-GP 1 C2303 SCD1U10V2KX-5GP 2 C2304 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC10U6D3V3MX-GP 1 C2302 AA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31 1D05V_VTT C2305 7 OF 10 0.001A C2301 2 POWER 2 0R2J-2-GP 1 PCH1G 1D05V_VTT VCC CORE D 2 1.3A(Total current of VCCCORE) +VCCA_DAC_3V DY 1 R2301 C2323 SC1U6D3V2KX-GP <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title PCH : POWER1 Size A3 Date: 5 4 3 2 Document Number Rev SB LA480s W ednesday, March 07, 2012 Sheet 1 23 of 103 C T16 P26 VCCIO31 P28 1 C2402 SC1U10V2KX-1GP DCPSUSBYP V12 +V3.3S_VCC_CLKF33 T38 DCPSUSBYP VCCIO32 T27 VCCIO33 T29 VCCSUS3_3_7 T23 VCCSUS3_3_8 T24 VCC3_3_5 1D05V_M +VCCAPLL_CPY_PCH BH23 AL29 2 1D05V_VTT TP2402 1 +VCCSUS1 AL24 VCCAPLLDMI2 VCCIO14 DCPSUS3 VCCSUS3_3_9 V23 VCCSUS3_3_10 V24 VCCSUS3_3_6 P24 VCCIO34 T26 V5REF_SUS M26 +5VA_PCH_VCC5REFSUS DCPSUS4 AN23 +VCCA_USBSUS VCCSUS3_3_1 AN24 3D3V_S5 VCCASW7 AC26 VCCASW8 AC27 VCCASW9 AC29 VCCASW10 2 1 2 1 1 2 1 3 1D05V_VTT L2402 0.08A L2403 1 2 IND-10UH-269-GP C2409 SC1U6D3V2KX-GP 2 1 C2443 SC10U6D3V3MX-GP 2 DY 1 +1.05VS_VCCA_A_DPL 1 2 IND-10UH-269-GP VCCASW12 AD31 VCCASW13 W21 VCCASW14 1 C2410 SC1U6D3V2KX-GP W23 VCCASW15 W24 VCCASW16 W26 VCCASW17 W29 VCCASW18 W31 VCCASW19 W33 VCCASW20 N16 DCPRTC V5REF P34 VCCSUS3_3_2 N20 VCCSUS3_3_3 N22 VCCSUS3_3_4 P20 VCCSUS3_3_5 P22 3D3V_S5 D2402 CH751H-40-1-GP 0.001A +5VS_PCH_VCC5REF R2407 1 10R2J-2-GP C2427 SC1U10V2KX-1GP 3D3V_S5 2 3 VCC3_3_1 AA16 VCC3_3_8 W16 VCC3_3_4 T34 VCC3_3_2 AJ2 C2428 SC1U6D3V2KX-GP 3D3V_S0 C2430 SCD1U10V2KX-5GP C2431 SCD1U10V2KX-5GP 3D3V_S0 +VCCRTCEXT 1 0.16A (Totally current of VCCVRM VCCIO13 AH14 VCCIO6 AF14 1D05V_VTT 1 +VCCDIFFCLKN R2406 0R0603-PAD-1-GP 0.055A 1 2 BD47 VCCADPLLA +1.05VS_VCCA_B_DPL BF47 VCCADPLLB 1 AF17 AF33 AF34 AG34 0.095A +V1.05S_SSCVCC AG33 VCCSSC V16 DCPSST T17 V19 DCPSUS1 DCPSUS2 2 1D05V_VTT AK1 +V1.05S_VCCAPLL_SATA3 VCCVRM1 AF11 +VCCAFDI_VRM VCCIO2 AC16 C2434 SC10U6D3V5KX-1GP VCCIO3 AC17 VCCIO4 AD17 1 TP2406 1D05V_VTT R2413 0R0402-PAD-1-GP 2 1 V_PROC_IO C2419 SCD1U10V2KX-5GP CPU 1 BJ8 C2418 SCD1U10V2KX-5GP RTC_AUX_S5 VCCRTC PANTHER-GP-NF HDA A22 T21 VCCASW23 V21 VCCASW21 T19 VCCSUSHDA P32 2 +3VS_+1.5VS_HDA_IO R2409 0.01A B 1 C2433 SCD1U10V2KX-5GP Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. 1 1 2 Title C2422 SCD1U10V2KX-5GP PCH : POWER2 2 1 2 C2421 SCD1U10V2KX-5GP 3D3V_S5 2 0R0603-PAD-1-GP <Core Design> Size A3 Date: A 1 2 6uA C2416 SC1U6D3V2KX-GP VCCASW22 +3VS_+1.5VS_HDA_IO 2 1 2 1 V_PROC_IO_R 1 C2417 SC4D7U6D3V3KX-GP 1 DCPSUS 0.001A 2 2 C2413 SC1U6D3V2KX-GP C2435 SCD1U10V2KX-5GP 1 +V1.05S_SSCVCC 2 R2411 0R3J-0-U-GP 1D05V_VTT 1D05V_M MISC 2 1 +VCCSST C2415 SCD1U10V2KX-5GP RTC R2405 0R0402-PAD-1-GP 2 1 1 1D05V_VTT DY DY 1 C2414 SC1U6D3V2KX-GP VCCIO7 VCCDIFFCLKN1 VCCDIFFCLKN2 VCCDIFFCLKN3 VCCAPLLSATA C2432 SC1U6D3V2KX-GP 2 +1.05VS_VCCA_A_DPL +VCCDIFFCLK 2 2 C2412 SC1U6D3V2KX-GP 1D05V_VTT AH13 1 +VCCDIFFCLK VCCIO12 C2429 SCD1U10V2KX-5GP 2 R2404 0R0402-PAD-1-GP 2 1 1 1D05V_VTT VCCVRM4 SATA 2 Y49 +VCCAFDI_VRM AF13 2 C2411 SCD1U10V2KX-5GP VCCIO5 2 1 2 1 2 DY VCCASW11 AD29 0.08A +1.05VS_VCCA_B_DPL C2444 SC10U6D3V3MX-GP AC31 5V_S0 TP2403 A AA31 3D3V_S0 1 1 VCCASW6 0.001A 2 AA29 2 VCCASW5 C2426 SCD1U10V2KX-5GP 2 1 VCCASW4 AA27 R2408 1 10R2J-2-GP 2 VCCASW3 AA26 1 AA24 4 C2425 SCD1U10V2KX-5GP 1D05V_VTT 2 VCCASW2 PCI/GPIO/LPC VCCASW1 AA21 C2408 SC1U6D3V2KX-GP SC1U6D3V2KX-GP 2 C2407 SC1U6D3V2KX-GP 1 C2406 SC10U6D3V3MX-GP SC10U6D3V3MX-GP 2 1D05V_AMT_PCH C2404 Clock and Miscellaneous 1 AA19 1.01A (Total current of VCCASW) C2403 5V_S5 D2401 CH751H-40-1-GP C2424 SCD1U10V2KX-5GP 1 R2410 0R0603-PAD-1-GP 3D3V_S5 3D3V_S5 1 1 USB TP2404 C2423 SCD1U10V2KX-5GP 0.097A (Totally current of VCCSUS3_3) 2 1 2 4 TP2405 1 +V3.3S_VCC_CLKF33 C2401 SC10U6D3V5KX-1GP VCCIO30 VCCDSW3_3 K +VCCPDSW L2401 1 2 IND-10UH-269-GP VCCIO29 N26 A VCCACLK 1D05V_VTT 10 OF 10 1 POWER 1 AD49 K 3D3V_S0 VCCACLK 2 3D3V_S5 0.002A 1 1 PCH1J TP2401 R2403 0R0603-PAD-1-GP 1 2 E 2 SSID = PCH D 2 B 2 A C D Document Number Rev SA LA480s W ednesday, March 07, 2012 Sheet E 24 of 103 A B C D SSID = PCH PCH1I 4 8 OF 10 PCH1H H5 AA17 AA2 AA3 AA33 AA34 AB11 AB14 AB39 AB4 AB43 AB5 AB7 AC19 AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39 AD4 AD40 AD42 AD43 AD45 AD46 AD8 AE2 AE3 AF10 AF12 AD14 AD16 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38 AF4 AF42 AF46 AF5 AF7 AF8 AG19 AG2 AG31 AG48 AH11 AH3 AH36 AH39 AH40 AH42 AH46 AH7 AJ19 AJ21 AJ24 AJ33 AJ34 AK12 AK3 3 2 AY4 AY42 AY46 AY8 B11 B15 B19 B23 B27 B31 B35 B39 B7 F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38 BB4 BB46 BC14 BC18 BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46 BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28 BD3 BF30 BF38 BF40 BF8 BG17 BG21 BG33 BG44 BG8 BH11 BH15 BH17 BH19 H10 BH27 BH31 BH33 BH35 BH39 BH43 BH7 D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42 D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34 F3 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28 PANTHER-GP-NF 1 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 9 OF 10 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS328 VSS329 VSS330 VSS331 VSS333 VSS334 VSS335 VSS337 VSS338 VSS340 VSS342 VSS343 VSS344 VSS345 VSS346 VSS347 VSS348 VSS349 VSS350 VSS351 VSS352 H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28 B C 4 3 2 <Core Design> 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title PANTHER-GP-NF A E D PCH : VSS Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 25 of 103 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 26 of 1 103 A 5 4 3 2 1 3D3V_AUX_KBC 3D3V_AUX_S5 R2725 0R0805-PAD-1-GP 1 2 SSID = KBC 3D3V_AUX_KBC 3D3V_S0_KBC 79 6 109 14 15 80 17 20 21 26 123 82 83 84 65 AOAC_EN 38 AD_OFF 82 USB_CHG_EN 36,97 S5_ENABLE 82 DCIN_LED 39 BAT_IN# 49 LID_CLOSE# 19 RSMRST#_KBC 19,46,97 PM_SLP_S4# 79 GSENSE_TST 65 PCIE_WLAN_WAKE# 65 WIFI_RF_EN 63,65 BLUETOOTH_EN 19 S0_PWR_GOOD 21,60 SPI_CS0#_R 21,60 SPI_CS1#_R 21,60 SPI_CLK_R 21,60 SPI_SO_R 21,60 SPI_SI_R 69 PAD_DETECT# 1 R2744 33R2J-2-GP 2 33R2J-2-GP 2 33R2J-2-GP 2 0R2-PT5-LILY-GP 2 33R2J-2-GP 2 PAD_DETECT# 1 NonSBA SBA GPIO02 GPIO24 GPIO30/F_WP# GPIO34/CIRRXL GPIO36 GPIO41/F_WP# GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO51/N2TCK GPIO67N2TMS GPIO75 GPIO76 GPIO77 R2738 1 R2736 1 R2719 1 R2737 1 R2722 EC_SPI_CS#_C EC_SPI_CLK_C EC_SPI_DI_C EC_SPI_DO_C 90 92 86 87 91 1 1 1 1 2 RTC_AUX_S5 R2706 100KR2J-1-GP 114 2 DY 1 7 2 3 1 128 127 126 125 8 9 29 124 121 122 GPIO17/SCL1/N2TCK GPIO22/SDA1/N2TMS GPIO73/SCL2 GPIO74/SDA2 GPIO23/SCL3 GPIO31/SDA3 GPIO47/SCL4 GPIO53/SDA4 70 69 67 68 119 120 24 28 LPC_AD[0..3] R2735 1 2 0R2-PT5-LILY-GP LPC_FRAME#_R LPC_AD3_R LPC_AD2_R LPC_AD1_R LPC_AD0_R R2730 R2740 R2741 R2742 R2729 1 1 1 1 1 2 33R2J-2-GP 2 0R2-PT5-LILY-GP 2 0R2-PT5-LILY-GP 2 0R2-PT5-LILY-GP 2 33R2J-2-GP 21,65,71,77 31 63 64 56 -HDD_DTCT 82 USB_AO_SEL0 19,36,37,47 PM_SLP_S3# PLT_RST# 5,18,31,32,36,65,66,71,77,80,83,97 CLK_PCI_KBC 18 LPC_FRAME# 21,65,71,77 LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0 49,68 PWRLED 82 KBC_BEEP 68 PALM_LED 40 STOP_CHG# 31,59 SPEED_100# 68 NUM_LED 68 KBC_NOVO_BTN# 68 CHARGE_LED INT_SERIRQ 21,77 PM_CLKRUN# 19,77 PANEL_BLEN 17 ECSCI#_KBC 3G_EN 66 H_A20GATE 22 H_RCIN# 22 32 118 62 65 22 81 66 16 PALM_LED 23 113 111 21 ME_UNLOCK 66 3G_POWERON 65 E51_TxD 77 30 19 PCH_SUSCLK_KBC 82 AMP_MUTE# BLON_OUT 49 PM_SLP_A# 19,45 GSENSE_ON# 79 CHG_USB_OC# 82 TPDATA 69 TPCLK 69 41 <------ TP BAT_SCL 39,40 BAT_SDA 39,40 SML1_CLK 20,62 SML1_DATA 20,62 LAN_PWR_ON 31 PAD_RESET# 69 PAD_RESET# PROCHOT_EC KCOL[0..15] 2 PLT_RST#_EC 27 25 11 10 71 72 2 0F 2 U2701B DY C2711 SC220P50V2KX-3GP GPIO52/PSDAT3/RDY# GPIO50/PSCLK3/TDO GPIO27/PSDAT2 GPIO26/PSCLK2 GPIO35/PSDAT1 GPIO37/PSCLK1 F_CS0# F_SCK F_SDI&F_SDIO1 F_SDIO&F_SDIO0 GPIO81/F_WP# 40 ECRST# 85 PECI 2 43R2J-GP EC_VTT 2 0R0402-PAD-1-GP 13 12 ECRST# 5,22 H_PECI 1D05V_VTT R2721 R2720 1 1 CHG_ON# <------ BATTERY / CHARGER <------PCH / eDP / THERMER / GPU GPIO56/TA1 GPIO14/TB1 GPIO1/TB2 KBSOUT0/GPOB0/JENK# KBSOUT1/GPIOB1/TCK KBSOUT2/GPIOB2/TMS KBSOUT3/GPIOB3/TDI KBSOUT4/GPOB4/JEN0# KBSOUT5/GPIOB5/TDO KBSOUT6/GPIOB6/RDY# KBSOUT7/GPIOB7 KBSOUT8/GPIOC0 KBSOUT9/GPOC1/SDP_VIS# KBSOUT10&P80_CLK/GPIOC2 KBSOUT11&P80_DAT/GPIOC3 KBSOUT12/GPIO64 KBSOUT13/GPIO63 GPIO46/CIRRXM/TRIST# KBSOUT14/GPIO62 GPIO87/CIRRXM/SIN_CR KBSOUT15/GPIO61/XOR_OUT GP/I/O83/SOUT_CR/TRIST# GPIO60/KBSOUT16 GPIO57/KBSOUT17 GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO32/D_PWM GPIO45/E_PWM GPIO66/G_PWM GPIO33/H_PWM GPIO40/F_PWM GPIO0/EXTCLK GPIO55/CLKOUT/IOX_DIN_DIO KBSIN0/GPIOA0/N2TCK KBSIN1/GPIOA1/N2TMS KBSIN2/GPIOA2 KBSIN3/GPIOA3 KBSIN4/GPIOA4 KBSIN5/GPIOA5 KBSIN6/GPIOA6 KBSIN7/GPIOA7 VCC_POR# PECI VTT 53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33 KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KBD_ID TP4_RESET 54 55 56 57 58 59 60 61 KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 69 KBD_ID 69 TP4_RESET 69 KROW[0..7] 69 3D3V_AUX_KBC 1 0R2-PT5-LILY-GP 2 GPIO94/DA0 GPIO95/DA1 GPIO96/DA2 GPIO97/DA3 3D3V_AUX_KBC 2 0R0402-PAD-1-GP 1 0F 2 LRESET#/GPIOF7 LCLK/GPIOF5 LFRAME#/GPIOF6 LAD3/GPIOF4 LAD2/GPIOF3 LAD1/GPIOF2 LAD0/GPIOF1 SERIRQ/GPIOF0 GPIO11/CLKRUN# GPIO65/SMI# ECSCI#/GPIO54 GPIO10/LPCPD# GPIO85/GA20 KBRST#/GPIO86 GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3 GPIO5/AD4 GPIO4/AD5 GPIO3/AD6 GPIO7/AD7 101 105 106 107 1 AC_IN# R2717 10KR2J-3-GP DY 2 42 VGA_CURRENT 42 CPU_CURRENT 79 GSENSE_X 79 GSENSE_Y 49 CAMERA_EN 66 -MSATA_DET 19 SUS_PWR_ACK 68 CAP_LED 66 GPS_DISABLE# VREF 97 98 99 100 108 96 95 94 PCB_VER_AD ADT_TYPE MODEL_ID_AD R2739 D R2712 0R2-PT5-LILY-GP AC_IN_KBC# 1 2 2 0R0402-PAD-1-GP PM_SLP_A# C2716 NPCE885GA0DX-GP SCD1U16V2KX-L-GP 3D3V_AUX_KBC R2720 and C2716 Need very close to EC 1 DY 2 1 RC2701 SC33P50V2JN-3GP R2714 10KR2J-3-GP 40 2 1 R2743 DY VBKUP 4 VSBY 102 75 2 104 AD_IA C2714 SCD1U10V2KX-5GP DY 1 40 2 C2703 SC2D2U10V3KX-1GP 2 2 2 DY SCD1U10V2KX-5GP R2701 100KR2F-L1-GP VDD C2713 1 1 ADT_TYPE AVCC VCC1 VCC2 VCC3 VCC4 VCC5 2 U2701A 19 46 76 88 115 1 2 1 1 1 1 1 2 2 2 2 1 C2710 SCD1U10V2KX-5GP 2 C2709 SC2D2U10V3KX-1GP 1 C2708 SCD1U10V2KX-5GP 1 C2707 SCD1U10V2KX-5GP DY C2706 SCD1U10V2KX-5GP 2 C2705 SCD1U10V2KX-5GP 2 C2704 SCD1U10V2KX-5GP 1 C2701 SC2D2U10V3KX-1GP SC33P50V2JN-3GP DY R2707 10KR2F-L1-GP 38 1 C2702 SCD1U10V2KX-5GP RC2702 3D3V_AUX_KBC VBAT 2 2 1 2 D 3D3V_S0 R2709 0R0805-PAD-1-GP R2702 0R0603-PAD-1-GP 65W_90W# 90W Adaptor --> ADT_TYPE = 3.3V 65W Adaptor --> ADT_TYPE = 1.7V PSL_OUT_GPIO71# PSL_IN2_GPI06# PSL_IN1_GPI70# 74 93 73 NC_EC_ENABLE 1 KBC_PWRBTN_EC# AC_IN_KBC# TP2705 KBC_NOVO_BTN# EC_SPI_DI_C C 1 GPIO20/TA2/IOX_DIN_DIO GP/I/O84/IOX_SCLK/XORTR# GPO82/IOX_LDSH/TEST# R2773 100KR2J-1-GP R2710 10KR2J-3-GP 2 C2712 SC1U10V3ZY-6GP DY 103 NPCE885GA0DX-GP 18 45 78 89 116 5 2 GND1 GND2 GND3 GND4 GND5 GND6 KBC_VCORF 1 44 1 VCORF 2 117 112 110 19,97 PM_PWRBTN# 19 AC_PRESENT 62,82 USB_PWR_EN AGND C 3D3V_S5 SUS_PWR_ACK EC_AGND R2711 0R0402-PAD-1-GP 1 2 EC_GPIO47 High Active 3D3V_AUX_S5 ECRST# D H_PROCHOT#_EC 1 2 H_PROCHOT# 5,42 28,36,86 PURE_HW_SHUTDOWN# 2 1 ECRST#_B DY B Q2701 CH3906GP-GP-U C R2723 10KR2J-3-GP R2705 10KR2J-3-GP 3D3V_AUX_S5 U2702 DY 2 E R2733 0R2-PT5-LILY-GP S 2 R2732 100KR2J-1-GP 1 1 R2770 1KR2J-1-GP C2715 SC1U6D3V2KX-GP 2 1 AD_OFF Q2702 2N7002BK-GP 2 G 1 PROCHOT_EC 1 PURE_HW_SHUTDOWN# 2 GND VCC 3 RESET# G690L293T73UF-GP 1 R2716 2 DY 0R2J-2-GP D2704 22 1 EC_SCI# B 3D3V_AUX_S5 B ECSCI#_KBC 1 3 2 R2704 10KR2J-3-GP 2 BAS16GP-GP C2717 SC220P50V2KX-3GP 1 1 1 KBC_PWRBTN_EC# R2703 470R2J-2-GP DY 2 R2774 100KR2J-1-GP 2 G2701 GAP-OPEN 1 2 2 68 KBC_PWRBTN# EC GPIO standard PH/PL 3D3V_AUX_KBC RN2701 BAT_SCL BAT_SDA SML1_CLK 3D3V_AUX_KBC 3D3V_S0 SRN10KJ-5-GP 4 3 5 2 6 1 Pull-High Register Voltage V480s UMA 100.0 K 147 K 64.14735.6DL 1.336 V V480s PX 100.0 K 215 K 64.21535.6DL 1.048 V LPR-1 UMA 100.0 K 280 K 64.28035.6DL 0.868 V LPR-1 PX 100.0 K 392 K 64.39235.6DL 0.671 V 3 4 BAT_IN# 4 3 BOM Ctrl DMN66D0LDW-7-GP R2728 100KR2F-L1-GP 1 2 SRN100KJ-6-GP RN2705 S5_ENABLE ECRST# LID_CLOSE# 2 3D3V_S0 2 1 SRN4K7J-8-GP 1 SMBD_THERM 28,86 Pull-Low Register RN2703 R2727 47KR2F-GP SMBC_THERM 28,86 MODEL_ID_AD SML1_DATA MODEL_ID_AD(Pin100) 1 2 1 2 Q2703 3 4 8 7 6 5 1 2 3 4 3D3V_AUX_KBC PCB Version A/D (Pin98) Pull-Low Resistor Pull-High Resistor Voltage (3D3V_AUX_S5) 1 RN48 SMBC_THERM SMBD_THERM R2724 10KR2F-2-GP 2 SRN10KJ-6-GP BOM Ctrl 1 PCB_VER_AD 100.0K 10.0K 3.0V SB 100.0K 20.0K 2.75V SC 100.0K 33.0K 2.48V -1 100.0K 47.0K 2.24V Reserved 100.0K 64.9K 2.0V Reserved 100.0K 76.8K 1.87V Reserved 100.0K 100.0K 1.65V 2 R2726 100KR2F-L1-GP SA A BLUETOOTH_EN 1 A DY2 R2713 10KR2J-3-GP <Core Design> Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title <Title> Size A1 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 27 of 103 5 4 SSID = Thermal 3 2 1 Thermal sensor T8 2200p close to smsc2103 chip Close to SO-DIMM on top side. H_THERMDA 1 C 1 E B Q2803 C2803 SC390P50V2KX-GP C 2 B C2808 SC390P50V2KX-GP C2802 SC2200P50V2KX-2GP 2 1 D E 3 1 2 SA 0905 change to 390p D H_THERMDC MMBT3904W T1G-GP Q2802 MMBT3904W T1G-GP CPU backside or inside the socket 2200p close to smsc2103 chip REMOTE2- C 2 B 1 C2804 SC390P50V2KX-GP DY C2805 SC2200P50V2KX-2GP 2 1 E 2 Q2804 MMBT3904W T1G-GP REMOTE2+ 5V_S0 between CPU, VGA and DIMM on bottom side 1 1 1 1 C2806 2 2103_VDD 2 SCD1U10V2KX-4GP 3 4 3D3V_S0 SRN10KJ-5-GP 3 H_THERMDA H_THERMDC REMOTE2+ REMOTE2- 1 TP2804 1 RN2801 2 1 U2801 THERM_SYS_SHDN# THERM_SCI# 4 5 TACH PWM 10 11 TRIP_SET SHDN_SEL 14 13 DP1 DN1 DP2/DN3 ND2/DP3 7 6 SYS_SHDN# ALERT# 9 8 27,86 SMBC_THERM 27,86 SMBD_THERM GPIO1 GPIO2 VDD 2 1 16 15 2103_4 2103_5 20100707_EMI TP2802 TP2803 1 1 D2801 FAN_TACH_1 TRIP_SET R2806 1 SHDN_SEL 2 649R2F-GP T8 = 98 A K 2 4 3 2 FAN_PW M_C 1 FAN1 ACES-CON4-41-GP FAN_TACH FAN_PW M CH551H-30GP-GP AFTP2801 AFTP2805 AFTP2806 TRIP_SET: 649 ohm => 87 dgree C SMCLK SMDATA EC2801 2 R2805 68R2-GP EC2802 SC470P50V2KX-3GP 2 FAN_PW M SHDN --> 2N3904 ON External diode 5V_S0_FAN FAN_TACH 1 SC470P50V2KX-3GP THERM_SCI# C 5 3D3V_S0 DY R2804 AFTP2807 0R2-PT5-LILY-GP 1 2 1 SHDN_SEL 2 R2812 10KR2J-3-GP 2 1 R2801 6K8R2J-GP R2802 0R0805-PAD-1-GP 6 3D3V_S0 2 2 1 C R2803 10KR2J-3-GP 3D3V_S0 SC4D7U6D3V3KX-GP 1 C2801 1 1 1 FAN_PW M_C FAN_TACH 5V_S0_FAN 12 17 GND GND B B EMC2103-2-AP-GP 3D3V_AUX_S5 3 3D3V_S0 Q2801 2N7002BK-GP 2 R2808 100KR2J-1-GP 2 D 27,36,86 PURE_HW _SHUTDOW N# S THERM_SYS_SHDN# R2809 10KR2J-3-GP 2 1 DY <Core Design> C2807 SCD1U10V2KX-5GP A 2 DY 2 DY G 1 R2810 10KR2J-3-GP 1 1 A 3D3V_S0 1 D2802 BAT54PT-GP R2811 0R2-PT5-LILY-GP 1 2 IMVP_PW RGD_T Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. IMVP_PW RGD 36,42 Title THERMAL SENSOR SMSC EMC2103 5 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 28 of 103 5 4 3 2 1 D D C C B B <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. A A Title AUDIO CODEC Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 29 of 1 103 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A4 Document Number Reserved Date: Tuesday, March 06, 2012 5 4 3 Rev SA LA480s 2 Sheet 30 of 1 103 A 5 4 3 2 1 25MHz XTAL LAN_XTAL0 X3101 1D05V_LAN_S5 1D05V_LAN_S5 3D3V_LAN_S5 4 1 3 2 3D3V_LAN_S5 LAN_XTAL1 XTAL-25MHZ-155-GP 1 R3136 1KR2J-1-GP 27,59 MDI0+ MDI0- 59 59 MDI1+ MDI1- 59 59 MDI2+ MDI2- 59 59 MDI3+ MDI3- 1 2 3 4 5 6 7 8 9 10 11 12 1D05V_LAN_S5 1D05V_LAN_S5 2 1D05V_LAN_REGOUT 36 35 34 33 32 31 30 29 28 27 26 25 REGOUT VDDREG VDDREG ENSWREG EEDI/SDA LED3/EEDO EECS/SCL DVDD10 LANWAKE# DVDD33 ISOLATE# PERST# LAN_ENSW REG LAN_EEDI LAN_EEDO 1 LAN_EECS RTL_ISOLATE# R3125 3D3V_LAN_S5 0R0402-PAD-1-GP 1 2 TP3102 1D05V_LAN_S5 PCIE_W AKE# 19,65 3D3V_LAN_S5 PLT_RST# DY R3124 0R2J-2-GP 3D3V_LAN_S5 5,18,27,32,36,65,66,71,77,80,83,97 DVDD10 SMBCLK SMBDATA CLKREQ# HSIP HSIN REFCLK_P REFCLK_N EVDD10 HSOP HSON GND 3D3V_LAN_S5 MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 AVDD10 MDIP2 MDIN2 AVDD10 MDIP3 MDIN3 AVDD33 R3119 15KR2J-1-GP 3D3V_LAN_VDDSREG 1 59 59 1D05V_LAN_S5 1 48 47 46 45 44 43 42 41 40 39 38 37 GND C3148 SC15P50V2JN-2-GP 2 2 C3103 SC15P50V2JN-2-GP AVDD33 AVDD33 RSET AVDD10 CKXTAL2 CKXTAL1 AVDD33 DVDD10 LED0 DVDD3 GPO/SMBALERT LED1/EESK 1 U3101 49 2 SPEED_100# RTL_ISOLATE# 2 1M1R2J-GP 1 1 R3130 D LAN_ACT_LED# 59 GPO C 2 LAN_RSET 2 2K49R2F-GP 1 R3123 D LAN_XTAL0 LAN_XTAL1 3D3V_S0 GPO R3120 1 2 1KR2J-1-GP LAN_EECS R3122 1 2 10KR2J-3-GP LAN_EEDI R3126 1 2 10KR2J-3-GP SMB_LAN_DATA R3128 1 2 10KR2J-3-GP C 13 14 15 16 17 18 19 20 21 22 23 24 RTL8111F-CGT-GP 1D05V_LAN_S5 SMB_LAN_DATA LAN_CLKREQ# 1 0R2-PT5-LILY-GP 2 R3121 20 PCIE_CLK_LAN_REQ# 20 PCIE_TXP4 20 PCIE_TXN4 20 CLK_PCIE_LAN 20 CLK_PCIE_LAN# 1D05V_LAN_EVDD10 PCIE_RXP4 20 PCIE_RXN4 C3147 1 SCD1U10V2KX-4GP 2 PCIE_RXP4_C 2 PCIE_RXN4_C 2 3D3V_LAN_S5 20 C3145 1 SCD1U10V2KX-4GP 1 F3101 FUSE-1A32V-3-GP DY 3D3V_S5 1 R3135 1 1 C3150 2 G R3133 100KR2J-1-GP LAN_PW R_ON_T D 2 1 2 D Q3103 AO3419L-GP SC1U10V2KX-1GP SCD1U16V2ZY-2GP SCD1U10V2KX-4GP 2 C3152 B 2 0R5J-5-GP S C3151 1 1 2 1 2 1 2 1 2 1D05V_LAN_EVDD10 C3149 SCD1U16V2ZY-2GP 1 C3128 SC1U10V2KX-1GP 2 C3139 SCD1U16V2ZY-2GP 1 C3138 SCD1U16V2ZY-2GP 2 C3134 SCD1U16V2ZY-2GP 1 C3133 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 1 C3132 SCD1U16V2ZY-2GP 2 C3131 SCD1U16V2ZY-2GP 1 C3130 SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP 2 C3129 2 C3146 L3102 IND-4D7UH-300-GP 1 R3131 0R0603-PAD-1-GP 1 2 2 1 1 2 1D05V_LAN_REGOUT 2 1D05V_LAN_S5 B 27 LAN_PW R_ON S 1 C3137 2 1 1 2 1 2 1 C3136 Q3104 2N7002BK-GP G SC4D7U6D3V3KX-GP 2 3D3V_LAN_VDDSREG SCD1U16V2ZY-2GP 1 C3144 SCD1U16V2ZY-2GP 2 C3143 SCD1U16V2ZY-2GP 1 C3142 SCD1U16V2ZY-2GP 2 C3141 SCD1U16V2ZY-2GP 2 C3140 SCD1U16V2ZY-2GP A SCD1U16V2ZY-2GP 1 C3135 R3134 0R0603-PAD-1-GP 1 2 2 3D3V_LAN_S5 A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. <Core Design> Title LAN RTL8111F 5 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 31 of 103 5 4 3 2 1 From System's PCIE interface 20 PCIE_TXP3 20 PCIE_TXN3 PLT_RST# D PCIE_CLK_CR_REQ# C3202 1 20 PCIE_RXP3 20 PCIE_RXN3 20 CLK_PCIE_CR# 2 3V3_IN 20 PCIE_CLK_CR_REQ# SCD1U10V2KX-L-GP 3D3V_S0 R3218 5,18,27,31,36,65,66,71,77,80,83,97 2 RREF 3V3_IN CLK_REQ# PERST# EEDO EECS EESK GPIO/EEDI MS_INS# SD_CD# SP15 SP14 C3207 1 DV12 2 SCD1U10V2KX-L-GP CARD1_3D3V 2 D C3203 1 2 Q3202 2N7002BK-GP SCD1U10V2KX-L-GP SD_WP# G DV12_S_C GND SD_D2_R R3213 0R0402-PAD-1-GP 1 2 DV12_S 1 2 R3245 0R2-PT5-LILY-GP C3208 1 2 SC4D7U6D3V2MX-GP DY SD_D2 C3214 SC100P50V2JN-3GP XD_CD# DV33_18 GND SP1 SP2 SP3 SP4 SD_D1 SD_D0 SD_CLK SD_CMD SD_D3 36 35 34 33 32 31 30 29 28 27 26 25 C3201 C RTS5209-GR-GP 13 14 15 16 17 18 19 SD_D1_R 0R2-PT5-LILY-GP 1 20 1 0R2-PT5-LILY-GP SD_D0_R 21 1 0R2-PT5-LILY-GP SD_CLK_R 22 1 0R2-PT5-LILY-GP SD_CMD_R 23 1 0R2-PT5-LILY-GP SD_D3_R 24 3D3V_S5 DY 1 SD_CD#_C 2 10KR2J-3-GP R3205 D C3210 10KR2J-3-GP R3206 SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 DV12_S GND SD_D2 DV33_18 GND SC10U10V5KX-2GP 2 1 C SCD1U10V2KX-L-GP 2 1 3V3_IN HSIP HSIN REFCLKP REFCLKN AV12 HSOP HSON GND DV12 CARD1_3V3 3V3_IN CARD2_3V3 2 2 SC4D7U6D3V2MX-GP 2 SCD1U10V2KX-L-GP 2 SCD1U10V2KX-L-GP 1 2 3 4 5 6 7 8 9 10 11 12 1 C3204 1 C3205 1 C3206 1 CLK_PCIE_CR CLK_PCIE_CR# AV12 PCIE_RXP3_R PCIE_RXN3_R S Zdiff = 100 ohm SD_WP#_C 1 U3201 3V3_IN 3D3V_S5 48 47 46 45 44 43 42 41 40 39 38 37 RREF 6K2R2F-GP PCIE_TXP3 PCIE_TXN3 1 R3210 2 0R0402-PAD-1-GP PLT_RST# SD_CD#_C SD_WP#_C 1 PCIE_RXP3 PCIE_RXN3 D 20 CLK_PCIE_CR Q3201 2N7002BK-GP SD_CD# G Close to chip pin C3212 SCD1U10V2KX-L-GP 2 S DY 1 C3211 SC4D7U6D3V2MX-GP 2 Reserved DY C3209 SC100P50V2JN-3GP SD_D1 SD_D0 SD_CLK SD_CMD SD_D3 1 MLVS0402M04-GP R3250 R3253 R3254 R3251 R3255 DV12 1 2 2 1 2 2 2 2 2 L3201 AV12 2 1 Reserved DY C3213 SC5P50V2CN-2GP B B Common Net Reserved SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9 SP10 SP11 SP12 SP13 SP14 SP15 CARD1_3D3V CDR1 C3217 SC10U10V5KX-2GP 1 2 SCD1U10V2KX-L-GP 1 2 5 SD_D0 SD_D1 SD_D2 SD_D3 8 9 1 2 C3215 SD_WP# SD_CD# 10 11 VDD DAT0 DAT1 DAT2 CD/DAT3 CMD CLK NP1 NP2 GND_SW GND_SW WP_SW CD_SW VSS VSS 3 6 NP1 NP2 12 13 SD_CMD SD_CLK SD_D0 EMC3201 1 SD_D1 EMC3202 1 SD_D2 EMC3203 1 SD_D3 EMC3204 1 SD_CMD EMC3212 1 DY2 DY2 DY2 DY2 DY2 SC5P50V2CN-2GP SC5P50V2CN-2GP SC5P50V2CN-2GP SC5P50V2CN-2GP SD_D7 SD_D6 SD_D5 SD_D4 MS_BS MS_D5 MS_D1 MS_D4 MS_D0 MS_D2 MS_D6 MS_D3 MS_D7 SD_WP XD_RDY XD_RE# XD_CE# XD_WE# XD_CLE XD_ALE XD_WP# XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7 SC5P50V2CN-2GP 4 7 SDCARD-11P-GP A A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A2 Date: 5 4 3 2 RTS5209/5139 Document Number Rev LA480s Tuesday, March 06, 2012 1 SA Sheet 32 of 103 A B C D E 4 4 BLANK 3 3 2 2 <Core Design> Wistron Corporation 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Date: A B C Document Number LA480s Tuesday, March 06, 2012 D Rev SA Sheet 33 of E 103 1 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 34 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title USB 3.0 Controller Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 35 of 1 103 A 5 4 3 2 1 C3607 RUN_ENABLE Q3604 NDS0610-G-GP R3626 0R0603-PAD-1-GP 1 2 D C3606 2 2 2 2 2 10KR2J-3-GP Z_12V_D4 G PM_SLP_S3 Q3603 2N7002BK-GP 4 3 5 2 6 1 3D3V_S0 3D3V_S5 1 2 3 4 PM_SLP_S3# D D D D 8 7 6 5 D D D D 8 7 6 5 1D5V_S0 1D5V_S3 1 2 3 4 1 D U3606 S S S G AO4468-GP 2 C3611 SCD01U50V2KX-L-GP U3602 S S S G AO4468-GP DMN66D0LDW -7-GP S 8 7 6 5 D D3602 MMPZ5239BGP-GP Q3605 19,27,37,47 PM_SLP_S3# D D D D AO4468-GP RUN_ENABLE_ALL_G 1 R3612 1 G 1 R3617 100KR2J-1-GP 3D3V_AUX_S5 R3621 330KR2J-L1-GP R3620 10KR2J-3-GP Z_12V_G3 2 330KR2J-L1-GP SCD22U25V3KX-GP 1 R3618 2 DY SCD1U25V3KX-GP U3601 S S S G K S 1 2 3 4 A Z_12V 1 2 10KR2J-3-GP 1 DCBATOUT 1 R3619 5V_S5 5V_S0 Run Power D 1 C C 1 DY 2 R3622 56R2J-4-GP H_THERMTRIP# 5,22 E 1D05V_VTT Q3601 PMBT2222A-1GP B R3632 2K2R2J-2-GP 2 B C 2 1 C3602 SCD1U10V2KX-5GP 1 2 R3616 4K7R2J-2-GP PLT_RST# 1 5,18,27,31,32,65,66,71,77,80,83,97 B 2 3 41 PURE_HW _SHUTDOW N# 27,28,86 D3601 BAS16GP-GP R3602 200KR2J-L1-GP 2 DY 1 R3608 1 R3603 2 3D3V_S5 R3614 CRB : 1K R3614 1 28,42 IMVP_PW RGD 1 Power Sequence 1 3V_5V_EN 2 100KR2J-1-GP 2 2KR2F-3-GP TP3601 PS_S3CNTRL 37,97 S5_ENABLE 27,97 1 SYS_PW ROK 19 D 1 1KR2F-3-GP C3612 DY SCD01U50V2KX-L-GP Q3606 2N7002BK-GP 2 1 19,27,37,47 PM_SLP_S3# 3 G 19,27,37,47 PM_SLP_S3# D3603 <Core Design> A 2 BAS16GP-GP Wistron Corporation S A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 Power Plane Enable Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 36 of 103 5 4 3 2 1 Close to DIMM S3 Power Reduction Circuit SM_DRAMPWROK Close to CPU S3 Power Reduction Circuit Processor VREF_DQ Implementation R3704 220R2J-L2-GP S +V_SM_VREF_CNT 9 Q3708 2N7002BK-GP 1 D G R3705 100KR2J-1-GP 2 C3701 SCD1U10V2KX-4GP D 2 D DY FROM M1/M3 D +V_SM_VREF 1 Q3701 2N7002BK-GP PM_SLP_S3# 19,27,36,47 G Q3702 2N7002BK-GP PS_S3CNTRL DY G S 36,97 PS_S3CNTRL SM_DRAMPWROK must have a maximum of 15ns rise or fall time over VDDQ * 0.55± 200mV and the edge must be monotonic S 12 Q3701_D D Q3702_D 2 DY 2 R3703 22R2J-2-GP DY20R2J-2-GP 1 R3707 1 1D5V_S0 1 0D75V_S0 Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK 3D3V_S5 Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK add 0.1uF 1D5V_S3 1 1 1D5V_S0 3 GND OUT Y 4 1 R3709 VDDPW RGOOD 5 G Q3707 2N7002BK-GP DY D SM_DRAMRST# S D DY R3720 0R2J-2-GP Q3703 2N7002BK-GP DY SM_DRAMRST#_D 1 2 R3712 1KR2F-3-GP C3702 SC100P50V2JN-L-GP DDR3_DRAMRST# 14,15 DRAMRST_CNTRL_PCH 12,20 C3703 SCD047U16V2KX-1-GP 2 S 5 2 36,97 PS_S3CNTRL VDDPWRGOOD_D 2 DY S3 Power Reduction Circuit SM_DRAMRST# 1 R3722 39R2J-L-GP OD AND gate required R3711 0R2-PT5-LILY-GP 1 2SM_DRAMRST#_R 2 0R2J-2-GP 1 74VHC1G09DFT2G-GP VDDPW RGOOD_R 1 2 R3719 130R2F-1-GP 1 DY 2 C3704 SCD1U10V2KX-5GP DY 2 5 2 VCC IN A 2 IN B 2 1 0D75V_EN G U3701 1 C R3706 1KR2F-3-GP R3708 200R2F-L-GP 1 19 PM_DRAM_PW RGD 2 R3715 0R2-PT5-LILY-GP 1 2 PM_DRAM_PW RGD_R 1 R3713 200R2F-L-GP C B B 5 S3 Power Reduction G 36,97 PS_S3CNTRL S D 0D75V_EN 1.05VTT_PW RGD 45,48 1 Q3704 2N7002BK-GP 2 R3710 0R2-PT5-LILY-GP 19,27,36,47 PM_SLP_S3# 1 R3716 2 DY 22R2J-2-GP 0D75V_EN 46 <Core Design> 1 A Wistron Corporation 2 DY A C3705 SCD1U10V2KX-5GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 ADAPTER Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 37 of 103 5 4 3 2 1 Adaptor in to generate DCBATOUT D D PR3806 0R2-PT5-LILY-GP 1 2 ADT_TYPE 27 R3801 270R2J-L-GP K 1 ADT_TYPE_R1 2 PD3802 KDZGTR24B-GP ADT_TYPE_R C A C DC1 AD_JK 2 1 1 1 C PDTA124EU-1-GP PR3802 100KR2J-1-GP C E R2 PDTC124EU-1-GP B E DY PR3805 100KR2J-1-GP 2 R1 B 2 1 A B 8 7 6 5 AO4407AL-GP 2 2 2 1 PQ3802 AD_OFF D D D D PR3801 PC3802 AD_OFF#_1 27 1 1 1 1 1 AD+_2 1 2 3 4 PU3801 S S S G SC1U50V5ZY-1-GP SC1KP50V2KX-1GP 2 1 1 PC3801 SCD1U50V3ZY-1-GP PQ3801 AFTP3805 AFTP3804 AFTP3801 AFTP3802 AFTP3803 PD3801 P6SBMJ27APT-GP 200KR2F-L-GP 2 PC3806 SCD1U50V3ZY-1-GP PC3807 C3802 SCD1U50V3ZY-1-GP SC100P50V2JN-L-GP C3801 K 2 2 1 1 AD_JK_F FUSE-7A24V-5-GP MLX-CONN10G-1-GP-U AD+ F3801 1 2A 3A 4A 5A R1 1A 2B 3B 4B 5B R2 1B B AD_JK_F ADT_TYPE_R GND <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 DCIN_JACK LA480s Size A3 Document Number Date: Tuesday, March 06, 2012 Sheet 1 Rev SA 38 of 103 5 4 3 2 1 BATTERY CONNECTOR BT+ 1 EC3906 SCD1U50V3KX-GP 1 BATT_SENSE 1 PR3901 0R2J-2-GP AFTP3901 2 PC3902 SC2200P50V2KX-2GP 2 2 PC3901 SCD1U50V3KX-GP 1 D 1 D 2 BAT1 11 10 DY BT+ 1 RN3901 2 SC10P50V2JN-4GP 2 DY DY 2 3 4 5 6 7 9 8 C ALP-CON7-31-GP BATA_SDA_1 BATA_SCL_1 BT+ A 1 2 1 K 1 2 DY AFTP3908 1 MLVS0402M04-GP PD3901 MMPZ5232BPT-GP-U 2 MLVS0402M04-GP C PC3905 SC470P50V2KX-3GP 1 PC3904 1 PL3903 1 PL3902 SRN33J-7-GP BATA_SCL_1 BATA_SDA_1 BAT_IN#_1 PC3903 SC10P50V2JN-4GP PL3901 MLVS0402M04-GP 27,40 BAT_SCL 27,40 BAT_SDA 27 BAT_IN# 8 7 6 5 2 1 2 3 4 BAT_IN#_1 AFTP3902 AFTP3903 AFTP3904 AFTP3905 AFTP3906 AFTP3907 1 1 1 1 1 1 BAT2 8 9 BT+ 1 2 BATA_SCL_1 BATA_SDA_1 BAT_IN#_1 BAT_SCL BAT_SDA BAT_IN# B 3 4 5 6 7 B 1 BAV99-8-GP 2 DY D3903 1 2 BAV99-8-GP DY 3 D3902 3 DY 3 10 11 D3901 1 ALP-CON7-32-GP 2 BAV99-8-GP 3D3V_AUX_KBC <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number BATT_CONN LA480s Date: Tuesday, March 06, 2012 5 4 3 2 Sheet Rev SA 39 of 1 103 A 5 4 3 2 1 D D AD+_TO_SYS PU4001 S S S G D D D D 1 2 3 4 1 1 2 2 2 BTST 17 BQ24737_BTST PC4017 SCD047U50V3KX-GP 1 2 GND 1 1 BQ24737_CSOP_1 2 CHG_AGND 3D3V_AUX_S5 1 CHG_AGND BQ24737_CSON_1 1 27 B PC4016 SCD1U50V3KX-GP 2 1 CHG_ON# S G 27 PC4023 SCD1U25V2KX-GP CHG_AGND AD_IA PC4011 SC220P50V2KX-3GP 2 2 D 2 PR4013 0R2J-2-GP 1 2 PR4018 0R0402-PAD-1-GP 1 2 PR4032 100KR2J-1-GP PQ4007 2N7002BK-GP IOUT 1 21 1 ACOK# 14 BQ24737_REGN 5 GND 2 DY DY 2 BQ24737RGRR-GP PR4022 10KR2F-2-GP B 1 PWR_CHG_IOUT 4 2 7 1 2 PR4024 7D5R2F-GP BM# DY S S S 11 PU4005 P2003BEA-GP G SRN BQ24737_REGN_R PR4025 10R2F-L-GP 1 2 1 12 BQ24737_SRN 1 BQ24737_SRP SC10U25V5KX-GP 1 SRP ILIM 2 13 SDA PC4020 PC4021 3 2 1 10 PC4019 2 BQ24737_LODRV SC10U25V5KX-GP 15 D D D D 8 BT+ PR4017 D01R3721F-GP-U 1 2 1 LODRV 5 6 7 8 SCL PL4001 BT+_R 1 2 IND-5D6UH-48-GP-U1 2 9 BAT_SCL BQ24737_PHASE SC10U25V5KX-GP BQ24737_CMPIN BQ24737_HIDRV 19 2 PHASE 1 CMPIN 2 4 BQ24737_ILIM PR4026 33KR2F-GP 1 16 18 1 2 CMPOUT HIDRV PR4020 100KR2J-1-GP 3D3V_AUX_S5 C 1 REGN 3 27,39 BAT_SDA 3D3V_AUX_S5 CHG_AGND 2 1 2 5 6 7 8 PU4004 P2003BEA-GP 4 3 2 1 PWR_CHG_ACN PC4009 2SC1U10V3KX-3GP SCD1U50V3KX-GP PC4022 S ACDET 1 PG4004 GAP-CLOSE-PWR-3-GP 27,39 CHG_AGND VCC A PG4003 GAP-CLOSE-PWR-3-GP CHG_AGND 6 BQ24737_CMPOUT PR4014 120KR2F-L-GP PR4016 3D3MR2J-GP 2 CHG_AGND BQ24737_CMPOUT G 2 PR4008 100KR2F-L1-GP R2 BQ24737_ACDET 1 2 2 1 2 2 D 1 1 1 1 PC4007 SCD01U50V2KX-L-GP PQ4005 2N7002BK-GP 20 PR4011 100KR2J-1-GP PD4003 K CH520S-30GP-GP-U 1 2 1 PR4010 49K9R2F-L-GP STOP_CHG# PR4007 12K4R2F-GP R1 PR4019 0R0402-PAD-1-GP 1 2 S S S STOP_CHG# connects to KBC 1 PU4003 PWR_CHG_ACP 2 CHG_AGND BQ24737_REGN CHG_AGND SCD1U50V3KX-GP G PWR_CHG_IOUT PR4009 10KR2F-2-GP 27 CHG_AGND BQ24737_REGN DCBATOUT PC4004 SCD1U25V3KX-GP D D D D 3D3V_AUX_S5 BQ24737_VCC 2 2 1 2 PR4015 20R5F-1GP PR4006 316KR3F-2-GP PC4001 SC1U25V5KX-1GP 1 C 2 PC4002 SCD1U50V3KX-GP DMN66D0LDW-7-GP 2 6 1 PC4003 1 1 2 2 5 ACN AD_JK 4 2 ACP 100K 3 SCD1U25V2ZY-1GP PC4006 100K 118k 2 FUSE-10A24V-GP PR4005 470KR2J-2-GP PC4005 SC10U25V6KX-L3-GP 60.4k 120w EC4001 SCD1U50V3KX-GP PC4024 SC10U25V6KX-L3-GP 90w PQ4001 AC_IN 1 100K 1 100K 41.2k PG4002 GAP-CLOSE-PWR-3-GP 2 12.4K 80w 1 2 65w 1 1 PR4003 49K9R2F-L-GP 2 R2 PG4001 GAP-CLOSE-PWR-3-GP AD+_G_1 R1 DC_IN_D AD+ total power AD+ BT+ F4001 BT+_FUSE D 8 D 7 D 6 D 5 AO4407AL-GP 2 1 AD+_G_2 PU4002 S S S G 1 2 3 4 PR4002 100KR2J-1-GP AO4407AL-GP PR4001 10KR2F-2-GP PR4007,PR4008 DCBATOUT 1 PR4004 2 D01R3721F-GP-U 1 8 7 6 5 AD+ 1 SSID = Charger CHG_AGND PR4029 100KR2J-1-GP 1 2 3D3V_AUX_S5 PR4030 100KR2J-1-GP 2 AC_IN# D AC_IN AC_IN# AC_IN# PQ4008 2N7002BK-GP G S 27 A A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CHARGER_BQ24737 5 4 3 2 Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 40 of 103 5 4 3 2 1 SSID = PWR.Plane.Regulator_5v3p3v PR4121 0R2-PT5-LILY-GP 2 1 D PWR_5V_EN1 D PR4127 0R2-PT5-LILY-GP PWR_3D3V_EN2 2 1 3V_5V_EN 36 DCBATOUT DCBATOUT DCBATOUT CS1 PWR_5V_CS1 1 1 PR4102 86K6R2F-GP 19 21 PC4127 SC1U10V3KX-3GP 2 1 1 GAP-CLOSE-PWR 4 3 2 1 PR4115 15K4R2F-GP PWR_5V_FB1_R 2 1 2 DY B 1 PC4125 SC18P50V2JN-1-GP PR4120 10KR2F-2-GP PC4126 SC1U10V3KX-3GP 3D3V_PWR_2 3D3V_AUX_S5 PR4116 0R0402-PAD-1-GP 2 1 Close to VFB Pin (pin2) 2 DY DY 2 2 PR4119 100KR2J-1-GP 1 1 2 PR4117 10KR2F-2-GP 13 3 1 3D3V_S5 PR4114 0R2J-2-GP PWR_5V3D3V_VREG3 2 GAP-CLOSE-PWR-3-GP 5V_PWR_2 2 PWR_3D3V_FB2_R PC4124 DYSC18P50V2JN-1-GP 1 1 2 PG4101 1 2 GAP-CLOSE-PWR PG4124 1 2 PC4123 SC560P50V-GP TPS51225CRUKR-GP 3D3V_PWR_2 GAP-CLOSE-PWR PG4123 1 2 2 GND PT4101 1 VREG5 PGOOD VREG3 2 7 2 1 1 DY 2 2 VCLK S 1 1 G PC4120 1 PWR_5V_EN1 PG4117 1 20 PR4111 PU4102 DY 2D2R5F-2-GP SI7716ADN-T1-GE3-GP 2 CS2 PWR_5V_FB1 2 EN1 PWR_5V_VO1 2 5 EN2 14 2 1 PWR_3D3V_CS2 VFB1 GAP-CLOSE-PWR PG4122 1 2 2 6 VFB2 2 5 6 7 8 D 2 PWR_3D3V_EN2 1 1 PL4101 1 2 IND-3D3UH-57GP 1PWR_5V_SNUB 4 PR4101 105KR2F-1-GP DY0R2J-2-GP 2 PWR_5V_DRVL1 5 6 7 8 D D D D PWR_3D3V_FB2 G PR4113 B PWR_5V_LL1 15 S S S G 1 2 3 4 1PWR_3D3V_SNUB S DY PR4112 6K65R2F-GP 16 18 C GAP-CLOSE-PWR PG4121 1 2 5V_PWR 8 7 6 5 1 2 1 2 1 DRVL1 PWR_5V_DRVH1 ST220U6D3VDM-22-GP 2 SW1 DRVL2 PWR_5V_VBST1 SCD1U10V2KX-4GP 1 DRVH1 SW2 17 GAP-CLOSE-PWR PG4120 1 2 GAP-CLOSE-PWR-3-GP 2 DRVH2 VO1 PU4105 SIS412DN-T1-GE3-GP PC4121 SC330P50V3KX-GP GAP-CLOSE-PWR 8 PWR_3D3V_DRVL211 VBST1 PG4119 1 2 S S S S G GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR PG4113 1 2 PR4110 DY 2D2R5F-2-GP PG4116 ST220U6D3VDM-22-GP SCD1U10V2KX-4GP GAP-CLOSE-PWR PG4112 1 2 PT4102 PWR_3D3V_LL2 D VBST2 G 5V_S5 5V_PWR 4 3 2 1 1 2 SCD1U25V3KX-GP PC4118 1 2PWR_5V_VBST1_1 1 2 1D5R2F-GP PR4109 D D D D PC4119 GAP-CLOSE-PWR PG4111 1 2 12 VIN S S S G PL4102 1 2 IND-2D2UH-46-GP-U GAP-CLOSE-PWR PG4110 1 2 2 2 1 2 8 7 6 5 D D D D 1 1 2 2 1 2 3 4 G PR4108 PC4117 1PWR_3D3V_VBST2_1 1 2 PWR_3D3V_VBST29 SCD1U25V3KX-GP 1D5R2F-GP PWR_3D3V_DRVH210 D SC10U25V6KX-L3-GP S 3D3V_PWR GAP-CLOSE-PWR PG4109 1 2 PU4101 SIS412DN-T1-GE3-GP Design Current = 6.2A 9.2A< OCP< 11A PC4115 PC4116 S S S G 3D3V_PWR PG4108 1 2 PU4103 D D D D PU4104 SIS412DN-T1-GE3-GP PC4114 SCD1U50V3KX-GP D SC10U25V6KX-L3-GP DY SCD01U50V2KX-L-GP 3D3V_S5 SC10U25V5KX-GP SC10U25V5KX-GP C SCD1U50V3KX-GP SC10U25V5KX-GP Design Current = 4.2A 6.3A< OCP< 7.5A PC4111 1 PC4112 PC4113 PC4109 PC4110 19 Close to VFB Pin (pin5) 3V_5V_POK 5V_PWR_2 5V_AUX_S5 PR4118 0R0402-PAD-1-GP 2 1 DCBATOUT 1 5V_AUX_S5 R4101 820KR2F-GP DY 5 4 ECRST# VCC HTH GND RESET#/RESET LTH 1 2 3 HTH LTH 1 27 2 U9303 2 DY A R4103 165KR2F-GP DY 2 A R4102 15KR2F-GP DY 2 SCD1U10V2KX-4GP DY G680LT1UF-GP 1 1 C4102 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title TPS51225_5V_3D3V 5 4 3 2 Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 41 of 103 5 4 1 2 2 Close to PWR IC PC4202 Open 3 DY SCD22U10V2KX-1GP D 1D05V_VTT 1 PR4202 2 130R2F-1-GP H_CPU_SVIDDAT 1 PR4203 2 H_CPU_SVIDCLK PW R_CPU_CORE_CCSP2 43 PW R_CPU_CORE_CCSN2 43 PW R_CPU_CORE_CCSN1 43 PW R_CPU_CORE_CCSP1 43 CPU_CURRENT PC4201 1 D 27 2 SCD22U6D3V2KX-1GP PR4204 1 2 1 121KR2F-L-GP PR4201 54D9R2F-L1-GP 1 2 VCORE_AGND 75KR2F-GP VCORE_AGND PC4204 PC4203 1 2 PW R_CPU_CORE_VREF 1 PR4206 DY 2 1 PR4207 2PW R_CPU_CORE_VREF 15K8R2F-GP C 1 PR4211 10KR2J-3-GP 3D3V_S5 19,48 D85V_PW RGD 28,36 IMVP_PW RGD 8 H_CPU_SVIDCLK 8 VR_SVID_ALERT# 8 H_CPU_SVIDDAT 5,27 H_PROCHOT# PR4234 2 1 PR4232 PR4213 PR4233 PR4231 1 1 1 1 2 2 2 2 CF_IMAX VREF V3R3 VR_ON CPGOOD VCLK ALERT# VDIO VR_HOT# SLEWA GPGOOD GF_IMAX GND V5 CDH1 CBST1 CSW1 CDL1 TPS51640ARSLR-GP V5DRV PGND CDL2 CSW2 CBST2 CDH2 VBAT 49 48 47 46 45 44 43 42 41 40 39 38 37 PW R_CPU_CORE_CDH1 43 PW R_CPU_CORE_CBST1 43 5V_S5 PW R_CPU_CORE_CSW 1 43 PW R_CPU_CORE_CDL1 43 1 GGFB GVFB GCOMP GCSN GCSP GIMON GOCP_I GTHERM GSKIP# GPWM CSKIP# CPWM3 PW R_GFX_PW RGD 13 14 15 0R2-PT5-LILY-GP PW R_CPU_CORE_VRON 16 17 0R2-PT5-LILY-GP PW R_CPU_CORE_VCLK 18 0R2-PT5-LILY-GP PW R_CPU_CORE_ALERT# 19 0R2-PT5-LILY-GP PW R_CPU_CORE_VDIO 20 0R2-PT5-LILY-GP PW R_CPU_CORE_VR_HOT# 21 PW R_CPU_CORE_SLEW A 22 23 PW R_CPU_CORE_GF-IMAX 24 2 PW R_CPU_CORE_CF-IMAX PW R_CPU_CORE_VREF PR4210 10R2F-L-GP VCORE_AGND PR4216 PW R_CPU_CORE_CDL2 43 PW R_CPU_CORE_CSW 2 43 PW R_CPU_CORE_CBST2 43 PW R_CPU_CORE_CDH2 43 2 10KR2F-2-GP SC4D7U10V3KX-GP 2 SCD33U6D3V2KX-1-GP PC4206 1 2 2 PC4205 1 CGFB CVFB CCOMP CCSN3 CCSP3 CCSP2 CCSN2 CCSN1 CCSP1 CIMON COCP_I CTHERM 1 1 2 90K9R2F-GP SC1U6D3V2KX-GP C 1 PR4209 1 2 24KR2F-GP VCORE_AGND 12 11 10 9 8 7 6 5 4 3 2 1 PR4208 3D3V_S0 5V_S5 PU4201 SC2D2U10V3KX-1GP PC4207 2 VSSSENSE 1 VCCSENSE 8 SCD1U6D3V1KX-GP 1 2 NTC-100K-1-GP 2 8 12KR2F-L-GP PWR_CPU_CORE_CIMON PWR_CPU_CORE_COCP-I PWR_CPU_CORE_CTHERM 2 3D3V_S5 1 PR4205 PWR_CPU_CORE_CCOMP SC33P50V2JN-3GP PC4208 9 VSS_AXG_SENSE B 9 VCC_AXG_SENSE 1 PR4218 1 1 PW R_CPU_CORE_VREF PR4221 169KR2F-1-GP 2 2 PR4220 200KR2F-L-GP PW R_CPU_CORE_SLEW A 1 1 PW R_CPU_CORE_GF-IMAX 1 PC4209 VCORE_AGND 2 SC33P50V2JN-3GP B 1 2 PW R_CPU_CORE_VREF PR4217100KR2F-L1-GP PW R_CPU_CORE_CSKIP# 1 2 VCORE_AGND PR4219 56KR2F-GP 2 5K6R2F-2-GP 1 PR4222 DY PW R_GFX_GPW M 44 PW R_CPU_CORE_VREF 2 DY 100KR2F-L1-GP 1 PR4223 DY 2 20KR2F-L-GP VCORE_AGND PR4225 150KR2F-L-GP PW R_GFX_GSKIP# 44 1 PR4226 2 2 PR4224 30KR2F-GP 25 26 PWR_CPU_CORE_GCOMP 27 28 29 PWR_CPU_CORE_GIMON 30 PWR_CPU_CORE_GOCP-I 31 PWR_CPU_CORE_GTHERM 32 33 34 35 36 DCBATOUT 2 PW R_CPU_CORE_VREF 15K8R2F-GP 1 PR4227 VCORE_AGND 2 NTC-100K-1-GP 44 PW R_GFX_CORE_GSCN PR4228 44 PW R_GFX_CORE_GSCP 1 2 1 2 PR4229 75KR2F-GP VCORE_AGND 309KR2F-GP PC4210 PR4230 0R0402-PAD-1-GP 1 2 A 1 SCD22U6D3V2KX-1GP PR4239 0R0402-PAD-1-GP 1 2 VCORE_AGND <Core Design> 2 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. VGA_CURRENT 27 Title 5 4 3 A 2 TPS51640_CPU_CORE(1/3) Size Document Number Date: Tuesday, March 06, 2012 Rev LA480s SA Sheet 1 42 of 103 5 4 D 3 Main source 2nd source PU4402 84.03668.037 FDMS3668S 84.00031.037 RJK03P1DPA PU4403 84.03668.037 FDMS3668S 84.00031.037 RJK03P1DPA 2 1 D BOM control 2 3 4 10 1 1 2 2 1 2 DY SC10U25V5KX-GP PC4404 PW R_GFX_CORE_DRVH PC4403 SC10U25V6KX-L3-GP PC4402 SC10U25V6KX-L3-GP PU4402 1 DCBATOUT Countinue current=21.5A 36A<OCP<39A 9 C 7 6 5 8 PW R_GFX_CORE_SW C VCC_GFXCORE PL4401 FDMS3600-02-RJK0215-COLAY-GP 84.07608.037 PU4403 PR4409 2 1 PR4405 1 PT4403 2 1 FDMS3600-02-RJK0215-COLAY-GP 84.07608.037 PT4402 ST330U2VDM-4-GP 8 1 7 6 5 PG4303 PT4401 GAP-CLOSE-PW R-3-GP PR4407 1 2 121KR2F-L-GP 2 PW R_GFX_CORE_DRVL 2 9 ST330U2VDM-4-GP PR4410 18KR2F-GP 2 2 3 4 10 1 2 L-D36UH-1-GP ST330U2VDM-4-GP SC1U25V3KX-1-GP 1 2 2 1 2PW R_GFX_CBST1_11 0R3J-L-GP PC4401 1 PW R_GFX_CORE_BST 1 PR4401 1 2 NTC-100K-1-GP 28KR2F-GP 1 PC4408 B 2 SCD027U25V2KX-GP PW R_GFX_CORE_GSCN 42 B PW R_GFX_CORE_GSCP 42 PU4401 42 PW R_GFX_GSKIP# 42 PW R_GFX_GPW M 1 2 3 4 BST SKIP# PWM GND GND DRVH SW VDD DRVL 9 8 7 6 5 5V_S5 PW R_GFX_CORE_DRVH PW R_GFX_CORE_SW PW R_GFX_CORE_DRVL 1 PW R_GFX_CORE_BST 2 TPS51601DRBR-GP PC4407 SC2D2U10V3KX-1GP <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 TPS51640_CPU_CORE(3/3) Size Document Number Date: Tuesday, March 06, 2012 Rev LA480s SA Sheet 1 44 of 103 A B C D E SSID = PWR.Plane.Regulator_1p5v0p75v DCBATOUT DCBATOUT_1D5V PG4601 1 2 GAP-CLOSE-PWR-3-GP 1D5V_PWR PG4602 1 2 GAP-CLOSE-PWR-3-GP PG4606 1 2 GAP-CLOSE-PWR-3-GP PR4601 4 PWR_1D5V_VCC5 1 PG4603 1 2 GAP-CLOSE-PWR-3-GP 5V_S5 PC4602 SC1U10V2KX-1GP 2 VDD 12 4 3 2 1 5 PWR_1D5V_VDDQ FB 6 PWR_1D5V_FB 4 3 2 1 1 1 PC4616 SC18P50V2JN-1-GP G 2 1 2 1 PC4612 SC10U25V6KX-L3-GP 2 PC4613 SCD1U50V3KX-GP PG4617 1 2 GAP-CLOSE-PWR-3-GP 1 1 2 PG4618 1 2 GAP-CLOSE-PWR-3-GP S PG4619 1 2 GAP-CLOSE-PWR-3-GP RT8207MZQW-GP-U R2 PR4609 30KR2F-GP PG4620 1 2 GAP-CLOSE-PWR-3-GP 2 2 DDR_VREF_S3 PC4619 SCD033U16V2KX-GP 19,27,97 PM_SLP_S4# Vout=0.75*(1+R1/R2) PR4611 0R2-PT5-LILY-GP 1 2 PWR_1D5V_EN 1 PR4610 0R0402-PAD-1-GP 1 2 DY PC4622 SCD1U10V2KX-5GP 2 0D75V_S0 PC4615 SC330P50V2KX-3GP PG4616 1 2 GAP-CLOSE-PWR-3-GP 2 2 DY DY PT4602 SE330U2VDM-L-GP PG4615 1 2 GAP-CLOSE-PWR-3-GP 1 4 VTTREF PR4608 30K9R2F-GP R1 2 1PWR_1D5V_VTTREF GND 3 21 GND VTTSNS VDDQ PWR_1D5V_SW_1 DY EC4601 SCD1U50V3KX-GP 5 6 7 8 1 1 DY 2 1 2 1 2 PC4617 SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP 2 PC4618 VTT PU4603 COIL-1UH-34-GP-U PR4607 2D2R5F-2-GP 2 14 VTTGND DY 1 PGND D 2 PWR_1D5V_LGATE PC4621 SCD1U10V2KX-4GP 15 VLDOIN 3 PG4614 1 2 GAP-CLOSE-PWR-3-GP 2 1 LGATE 1 PG4626 GAP-CLOSE-PWR-3-GP PHASE PWR_1D5V_PHASE SIR460DP-T1-GE3-GP 2 PC4623 PG4613 1 2 GAP-CLOSE-PWR-3-GP 1D5V_PWR 2 S3 16 S S S G 20 PG4612 1 2 GAP-CLOSE-PWR-3-GP Design Current=16A 22A<OCP<24A S5 +0D75V_DDR_P Design Current=1.2A PG4611 1 2 GAP-CLOSE-PWR-3-GP PL4601 D D D D 1 1 5 6 7 8 PWR_1D5V_UGATE 2 PC4610 SC10U6D3V5MX-3GP PG4608 1 2 GAP-CLOSE-PWR-3-GP PG4610 1 2 GAP-CLOSE-PWR-3-GP PC4620 SC4D7U6D3V5KX-3GP 19 1D5V_PWR 17 S 4 PG4609 1 2 GAP-CLOSE-PWR-3-GP 2 0D75V_EN TON G 1 7 UGATE PGOOD PC4608 PR4605 1 2PWR_1D5V_VBST_1 1 2 2D2R3-1-U-GP SCD1U25V3KX-GP 1 8 PWR_1D5V_VBST 2 9 PWR_1D5V_EN VDDP 13 PWR_1D5V_TON 18 1 620KR3J-GP 10 PU4601 BOOT 2 3 37 CS 2 45,47 RUNPWROK PR4606 1 2 S S S G DCBATOUT_1D5V 11 1 PC4607 SC1U10V2KX-1GP SIR172DP-T1-GE3-GP 2 PU4602 D D D D PWR_1D5V_CS PC4611 SC10U25V6KX-L3-GP D 1 1 PR4603 0R0603-PAD-1-GP PWR_1D5V_PVCC5 1 2 5V_S5 3D3V_S0 PR4604 10KR2F-2-GP PG4604 1 2 GAP-CLOSE-PWR-3-GP DCBATOUT_1D5V PR4602 2 PC4601 11K3R2F-2-GP SC1KP50V2KX-1GP 1 2 1 2 5D1R2F-GP 1D5V_S3 PG4605 1 2 GAP-CLOSE-PWR-3-GP +0D75V_DDR_P PG4624 1 2 GAP-CLOSE-PWR-3-GP PG4625 1 2 GAP-CLOSE-PWR-3-GP <Core Design> 1 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title A B C D RT8207M_1D5V_0D75V Size Document Number Date: Tuesday, March 06, 2012 Rev LA480s Sheet E SA 46 of 103 5 4 3 2 1 SSID = PWR.Plane.Regulator_1p8v D RT8068A for 1D8V_S0 3D3V_S5 PG4712 2 PU4701 2 8 SVIN 1 COIL-2D2UH-26-GP EN 4 PGOOD 6 1 FB 11 RT8068AZQW ID-GP-U PW R_1D8V_FB 1 1 PC4704 SC22P50V2GN-GP PR4706 51KR2F-L-GP 2 2 R1 PC4706 PC4708 GAP-CLOSE-PW R PG4705 1 2 GAP-CLOSE-PW R PG4711 1 2 GAP-CLOSE-PW R PC4705 B DY GAP-CLOSE-PW R PG4704 1 2 1D8V_FB_GAP PR4704 102KR2F-GP PG4713 2 R2 SC22P50V2JN-4GP 45,46 RUNPW ROK 1 2 5 GND PR4705 1D8V_S0 2 SC10U6D3V3MX-GP 2 3 7 100KR2F-L1-GP PR4702 0R2-PT5-LILY-GP 1 2 3D3V_S0 LX#3 NC#7 1 SC10U6D3V3MX-GP DY PW R_1D8V_PHASE 1 LX#2 2 PVIN 1 9 1D8V_PW R PL4702 2 1 1 LX#1 PC4702 2 1 PC4703 SC1U6D3V2KX-GP PW R_1D8V_EN SC10U6D3V3MX-GP 19,27,36,37 PM_SLP_S3# PC4707 SC10U6D3V3MX-GP 2 1 2 GAP-CLOSE-PW R PW R_1D8V_SVIN PVIN GAP-CLOSE-PWR-3-GP PG4714 GAP-CLOSE-PW R PG4703 1 2 10 1 PW R_1D8V_PVDD PR4703 1 2 2D2R2F-GP 2 GAP-CLOSE-PW R PG4701 1 2 1 1 C Design Current=2A 3A<OCP 2 C D B Vo=0.6*(1+(R1/R2)) <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 PWM_1D8V_RT8068 Size Document Number Date: Tuesday, March 06, 2012 Rev LA480s SA Sheet 1 47 of 103 5 4 3 2 1 TPS51461 for VCCSA 3D3V_S0 5V_S5 D 1 D 1 DY GAP-CLOSE-PW R PG4804 1 2 VCCSA_SENSE 9 GAP-CLOSE-PW R PG4805 1 2 PC4806 SCD01U50V2KX-L-GP GAP-CLOSE-PW R PG4806 1 2 2 1 1 2 1 1 VID1 L L 0.9V L H 0.8V H L 0.725V H H 0.675V B GAP-CLOSE-PW R PC4817 SC3300P50V3KX-1GP 1 2 2 1 VCCSA PG4801 2 GAP-CLOSE-PW R PG4803 1 2 2 1 2 1 2 1 2 1 2 GND VREF COMP SLEW VOUT MODE 1 2 3 4 5 6 SCD1U25V3KX-GP 2 1 GAP-CLOSE-PW R PG4802 1 2 PWR_VCCSA_COMP_1 VID0 C VCCSA PC4812 SC22U6D3V5MX-2GP DY SC22U6D3V5MX-2GP 0D85V_S0 SC22U6D3V5MX-2GP PW R_VCCSA_SLEW 1 PR4811 2 100R2F-L1-GP-U PR4810 0R0402-PAD-1-GP 1 2 SC22U6D3V5MX-2GP PWR_VCCSA_COMP PWR_VCCSA_VREF PW R_VCCSA_VOUT 0D85V_S0 PL4801 1 2 IND-D35UH-GP PW R_VCCSA_SW TPS51461RGER-GP PR4802 4K99R2F-L-GP B Design Current = 4.8A 5.76A<OCP< 7.2A PC4805 SCD1U25V3KX-GP PR4807 0R0402-PAD-1-GP PW R_VCCSA_BST1 PW R_VCCSA_BST_R 2 1 2 PC4801 12 11 10 9 8 7 PC4804 SC1U6D3V2KX-GP PC4811 BST SW#11 SW#10 SW#9 SW#8 SW#7 DY PC4810 PGND PGND PGND VIN VIN VIN GND DY PC4808 PC4807 19 20 21 22 23 24 25 1.05VTT_PW RGD 37,45 SC22U6D3V5MX-2GP 2 1 2 0R2-PT5-LILY-GP PC4809 2 PC4819 SC10U25V5KX-GP SC10U25V5KX-GP SC4D7U25V5KX-GP SCD1U25V3KX-GP 2 1 PW R_VCCSA_VIN PC4813 PR4801 1 PW R_VCCSA_EN 1 PW R_VCCSA_VIN PC4815 VCCSA_SELECT0 9 2 C DY VCCSA_SELECT1 9 2 0R0402-PAD-1-GP PWR_VCCSA_V5DRV PU4801 PC4803 2 0R0402-PAD-1-GP PR4805 1 1 GAP-CLOSE-PW R PR4804 1 PW R_VCCSA_VID0 18 17 16 15 14 13 GAP-CLOSE-PW R PG4809 1 2 2DY 1KR2F-3-GP PW R_VCCSA_VID1 2 2 2 1 2 PC4816 SC2D2U10V3KX-1GP GAP-CLOSE-PW R PG4808 1 2 D85V_PW RGD 19,42 1 PR4812 PWR_VCCSA_PGOOD PG4807 1 2 2 PC4814 PR4806 1R2F-GP V5DRV V5FILT PGOOD VID1 VID0 EN PW R_VCCSA_VIN SC1U10V2KX-1GP 5V_S5 SCD033U16V2KX-GP 2 1 1 1 PR4809 4K7R2J-2-GP PR4808 0R2-PT5-LILY-GP 1 2 PC4802 SCD22U10V2KX-1GP <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 VCCSA_TPS51461 Size Document Number Date: Tuesday, March 06, 2012 Rev LA480s SA Sheet 1 48 of 103 5 4 3 2 1 D D C C B B <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. A A Title CRT Connector Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 50 of 1 103 5 4 3 2 1 D D C C B B <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. A A Title HDMI Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 51 of 1 103 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title eDP Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 52 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title S-VIDEO Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 53 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 54 of 1 103 A 5 4 3 2 1 SSID = User.Interface D D C C B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title ITP Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 55 of 1 103 A 5 4 2 1 SATA HDD Connector D R5603 0R0805-PAD-1-GP 1 2 D HDD1 3D3V_S0_HDD P7 P8 P9 V5 V5 V5 P13 P14 P15 V12 V12 V12 SATA_TXP1 SATA_TXN1 SATA_TXP1_C SATA_TXN1_C S2 S3 A+ A- 21 SATA_RXP1 21 SATA_RXN1 2 SCD01U16V2KX-L1-GP SATA_RXP1_C 2 SCD01U16V2KX-L1-GP SATA_RXN1_C S6 S5 B+ B- 1 C5606 2 1 2 2 2 V33 V33 V33 SCD1U10V2KX-5GP 21 21 5V_S0 R5606 0R0805-PAD-1-GP 1 2 C5605 SC10U10V5KX-2GP DY SCD1U10V2KX-5GP SC10U6D3V5KX-1GP DY P1 P2 P3 C5601 1 C5604 1 3D3V_S0 C 3 SCD01U16V2KX-L1-GP 2 SCD01U16V2KX-L1-GP 2 C5615 C5616 1 1 5V_S0_HDD 1 C5614 1 C5613 23 24 23 24 NP1 NP2 NP1 NP2 GND GND GND GND GND GND GND GND S1 S4 S7 P4 P5 P6 P10 P12 DAS/DSS P11 C -HDD_DTCT 1 27 TP5607 SKT-SATA7P-15P-101-GP B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A4 HDD/ODD Document Number Rev SA LA480s Date: Tuesday, March 06, 2012 Sheet 56 of 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title E-SATA+USB Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 57 of 1 103 A 5 4 3 2 1 D D C C B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Audio Jack Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 58 of 1 103 A 5 4 3 2 1 GIGA Lan Transformer XF5901 D 31 C5903 SCD01U16V2KX-L1-GP 23 RJ45_7 24 MCT2 22 RJ45_8 31 MDI3- 3 31 MDI2+ 5 2 1 XRF_TDC C5901 value modify to 0.01uF ~ 0.4uF capacitor 20 RJ45_4 21 MCT1 19 RJ45_5 MDI2- 6 31 MDI1+ 8 31 31 MDI1- MDI0- 1CT:1CT 17 RJ45_3 7 18 MCT4 9 16 RJ45_6 1CT:1CT 14 RJ45_1 10 15 MCT3 12 13 RJ45_2 11 MDI0+ 1CT:1CT 4 31 31 1CT:1CT 1 2 MDI3+ D XFORM-24P-19-GP C C D5901 RJ45_6 4 SRV05-4-2-GP 3 RJ45_2 MCT2 MCT1 MCT4 MCT3 LAN Connector RJ45 1 2 EC5901 SCD1U50V3KX-GP 4 SRV05-4-2-GP 3 5 2 RJ45_7 C5904 SC1KP2KV6KX-GP 1 11 12 14 1 RJ45_5 13 R5906 2 D5902 RJ45_4 1 RJ45_1 SPEED_100#_1 B GREEN 2 330R2J-3-GP 15 RJ45_8 6 CHASSIS CHASSIS 1 R5904 LAN_ACT_LED#_1 2 330R2J-3-GP RJ45_8 RJ45_7 RJ45_6 RJ45_5 RJ45_4 RJ45_3 RJ45_2 YELLOW 27,31 SPEED_100# 1 R5903 16 10 9 8 7 6 5 4 3 2 MCT_R 31 LAN_ACT_LED# CHASSIS CHASSIS B R5905 75R2J-1-GP 2 1 RJ45_1 6 R5902 75R2J-1-GP 2 1 1 RJ45_3 R5901 75R2J-1-GP 2 1 2 75R2J-1-GP 2 1 5 3D3V_LAN_S5 RJ45-8P-106-GP close to RJ45 AFTP5901 AFTP5902 AFTP5903 AFTP5904 AFTP5905 AFTP5906 AFTP5907 AFTP5908 AFTP5909 AFTP5910 AFTP5911 AFTP5912 A 5 1 1 1 1 1 1 1 1 1 1 1 1 3D3V_LAN_S5 LAN_ACT_LED#_1 RJ45_8 RJ45_7 RJ45_6 RJ45_5 RJ45_4 RJ45_3 RJ45_2 RJ45_1 SPEED_100#_1 GND <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title RJ45 / Transformer 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 59 of 103 5 4 3 2 1 SSID = Flash.ROM 2 1 3D3V_SPI 3D3V_SPI RN6001 SRN4K7J-8-GP D 3D3V_SPI 3 4 1 R6004 4K7R2J-2-GP SPI_HOLD_0# LILY-BIOS-COLAY-GP-U EC6003 SC4D7P50V2CN-1GP 8 MB 2 33R2J-2-GP 2 33R2J-2-GP 1 1 SPI_CLK_R 21,27 SPI_SI_R 21,27 1 1 2 R6006 R6007 the same page 23 VCCSPI power 1 DY 2 EC6002 SC4D7P50V2CN-1GP DY 9 8 7 6 5 DY DY 2 GND VCC HOLD# C DQ0 1 S# DQ1 W#/VPP VSS 1 1 2 3 4 2 SPI_SO0 SPI_W P# 2 C6002 SCD1U10V2KX-5GP 1 R6001 33R2J-2-GP 3D3V_SPI SPI1 SC10U6D3V5KX-1GP 2 C6001 21,27 SPI_CS0#_R 21,27 SPI_SO_R 3D3V_S5 R6010 0R0402-PAD-1-GP 1 2 2 D EC6001 SC4D7P50V2CN-1GP 3D3V_SPI C 1 C R6005 4K7R2J-2-GP 3D3V_SPI SPI2 DY SPI_HOLD_0# R6008 R6009 LILY-BIOS-COLAY-GP-U 2 EC6004 SC4D7P50V2CN-1GP 9 8 7 6 5 EC6005 SC4D7P50V2CN-1GP 4 MB 1 1 2 33R2J-2-GP 2 33R2J-2-GP SBA SBA SPI_CLK_R 21,27 SPI_SI_R 21,27 1 GND VCC HOLD# C DQ0 1 S# DQ1 W#/VPP VSS DY DY 2 SPI_SO1 SPI_W P# 1 2 R6003 SBA 33R2J-2-GP 1 2 3 4 1 21,27 SPI_CS1#_R 21,27 SPI_SO_R 2 2 SBA EC6006 SC4D7P50V2CN-1GP SSID = RBATT B B RTC_AUX_S5 3D3V_AUX_S5 +RTC_VCC Q6001 2 RTC1 3 3 2 1 1 R6002 2 1KR2J-1-GP +RTC_VCC AFTP6002 AFTP6001 1 2 1 1 +RTC_VCC GND 4 BAS40W CGP-GP-U 1 C6003 SC1U6D3V2KX-GP RTC_PW R ACES-CON2-31-GP 2 DY 2 R6012 1 0R2J-2-GP 1 G R6011 10MR2J-L-GP S D RTC_DET# 22 Q6002 2N7002BK-GP A <Core Design> A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Flash/RTC 5 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 60 of 103 5 4 3 2 1 D D C C B B <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. A A Title USB Connector Size A4 Document Number Date: Tuesday, March 06, 2012 5 4 3 Rev SA LA480s 2 Sheet 61 of 1 103 5 4 3 USB3.0 Port1 USB3.0 Port2 2 D 1 2 3 4 27,82 USB_PWR_EN SCD1U10V2KX-5GP 1 C6205 GND IN EN1# EN2# 9 8 7 6 5 GND OC1# OUT1 OUT2 OC2# at least 80 mil USB_OC#0_1 18 5V_USB1_S3 5V_USB2_S3 USB_OC#4_5 TPS2064DGNR-GP-U USB_PN1_R USB_PP1_R GND_DRAIN 7 DY STDA_SSTXSTDA_SSTX+ GND GND GND CHASSIS#12 CHASSIS#13 10 11 4 1 AFTP6208 1 1 EC6202 2 STDA_SSRXSTDA_SSRX+ 12 13 2 3 1 8 9 DD+ SKT-USB13-65-GP TC6202 ST150U6D3VBM-1-GP 5 6 USB3_TX1_N_R_C USB3_TX1_P_R_C USB3_RX1_N_R_C USB3_RX1_P_R_C USB2 VBUS SCD1U10V2KX-5GP USB3_RX1_N_R_C USB3_RX1_P_R_C USB3_RX3_N_R_C USB3_RX3_P_R_C 5 6 USB3_TX3_N_R_C USB3_TX3_P_R_C 8 9 VBUS DD+ STDA_SSRXSTDA_SSRX+ GND_DRAIN STDA_SSTXSTDA_SSTX+ 12 13 GND GND GND CHASSIS#12 CHASSIS#13 2 3 USB_PN3_R USB_PP3_R USB3_TX1_N_R_C USB3_TX1_P_R_C USB3_RX1_N_R USB3_RX1_P_R 1 2 G1 3 4 L1#1L1#8 L2#2L2#7 GNDGND L3#3L3#6 L4#4L4#5 8 7 G2 6 5 USB3_RX1_N_R_C USB3_RX1_P_R_C USB3_TX3_N_R USB3_TX3_P_R 10 11 4 2 USB3_TX1_N_C SCD1U16V2KX-L-GP USB3_TX1_P_R_C USB3_TX1_N_R_C 1 AFTP6216 USB3_RX3_N_R USB3_RX3_P_R D6201 USB3_RX3_N_R_C USB3_RX3_P_R_C 1 2 G1 3 4 L1#1L1#8 L2#2L2#7 GNDGND L3#3L3#6 L4#4L4#5 8 7 G2 6 5 USB3_RX3_N_R_C USB3_RX3_P_R_C FILTER-130-GP TR6207 USB3_TX1_N_R 1 C6210 18 USB3_TX3_N 2 USB3_TX3_N_C SCD1U16V2KX-L-GP USB3_TX3_N_R_C USB3_TX3_P_R_C 1 2 SRN0J-6-GP 4 3 USB3_RX3_N_R_C USB3_RX3_P_R_C RN6204 3D3V_S5 SCD1U10V2KX-5GP 2 1 FILTER-130-GP TR6205 C6201 DY 3D3V_S5 2 3 DY R6208 0R2-PT5-LILY-GP 1 2 SRN0J-6-GP 4 3 USB3_TX3_P_R DY R6202 0R2-PT5-LILY-GP 1 2 USB3_RX1_N_R_C USB3_RX1_P_R_C USB3_TX3_N_R_C USB3_TX3_P_R_C 1 R6207 0R2-PT5-LILY-GP 1 2 4 2 USB3_TX3_P_C SCD1U16V2KX-L-GP SRN0J-6-GP 4 3 RN6203 10KR2J-3-GP 1 1 C6208 1 C6209 18 USB3_TX3_P 2 3 C 18 USB3_TX1_N USB3_TX1_P_R 1 2 RCLAMP0524P-GP SKT-USB13-65-GP 1 R6201 0R2-PT5-LILY-GP 1 2 4 2 USB3_TX1_P_C SCD1U16V2KX-L-GP 3 4 RN6202 RCLAMP0524P-GP 1 C6206 1 2 USB3_TX1_N_R_C USB3_TX1_P_R_C 7 USB3_TX3_N_R_C USB3_TX3_P_R_C 18 USB3_TX1_P 2 1 D 2 1 TC6201 ST150U6D3VBM-1-GP SCD1U10V2KX-5GP 2 1 RN6201 USB3_TX1_P_R USB3_TX1_N_R D6204 USB1 2 5V_USB2_S3 USB_PN3_R USB_PP3_R USB3_RX3_N_R_C USB3_RX3_P_R_C USB3_TX3_N_R_C USB3_TX3_P_R_C 5V_USB2_S3 1 EC6201 1 1 1 1 1 1 1 SRN0J-6-GP 5V_USB1_S3 DY AFTP6209 AFTP6210 AFTP6211 AFTP6212 AFTP6213 AFTP6214 AFTP6215 18 SCD1U10V2KX-5GP 2 1 5V_USB1_S3 USB_PN1_R USB_PP1_R USB3_RX1_N_R_C USB3_RX1_P_R_C USB3_TX1_N_R_C USB3_TX1_P_R_C 1 1 1 1 1 1 1 1 2A U6201 5V_S5 AFTP6201 AFTP6202 AFTP6203 AFTP6204 AFTP6205 AFTP6206 AFTP6207 2 C6202 DY C 3D3V_S5 U6202 1 13 VCC VCC DY USB3_TX3_N_R R6217 2 17 EQ1 EQ2 TX2TX2+ 23 22 USB3_TX1_N_R_C USB3_TX1_P_R_C 11 12 USB3_RX1_N_R USB3_RX1_P_R 8 9 USB3_TX1_N_R USB3_TX1_P_R 20 19 USB3_RX1_N_R_C USB3_RX1_P_R_C 2 20,27 SML1_DATA TX1TX1+ 2 USB3_RX3_P_C SCD1U16V2KX-L-GP 4 15 R6210 0R2-PT5-LILY-GP USB3_RX3_P_R 1 2 U6202_DE1 10KR2J-3-GP 1 1 C6213 18 USB3_RX3_P 3 16 20,27 SML1_CLK DY 5 14 R6223 OS1 OS2 RX1RX1+ DE1 DE2 RX2RX2+ EN_RXD CM 2 USB3_RX1_N_C SCD1U16V2KX-L-GP R6204 0R2-PT5-LILY-GP 1 2 USB3_RX1_N_R 1 C6212 18 USB3_RX3_N 2 USB3_RX3_N_C SCD1U16V2KX-L-GP R6209 0R2-PT5-LILY-GP 1 2 1 USB3_RX3_N_R 5V_USB2_S3 4 D6202 PRTR5V0U2X-GP D6203 PRTR5V0U2X-GP C6204 DY 2 USB_PN1_R 3 USB_PP3_R 2 USB_PN3_R 3 18 USB_PN1 USB_PN1_R USB_PN3 B C6203 DY 3D3V_S5 U6203 1 13 DY USB_PN3_R R6218 SML1_DATA 2 17 VCC VCC EQ1 EQ2 TX1TX1+ TX2TX2+ 23 22 USB3_TX3_N_R_C USB3_TX3_P_R_C 11 12 USB3_RX3_N_R USB3_RX3_P_R 8 9 USB3_TX3_N_R USB3_TX3_P_R 20 19 USB3_RX3_N_R_C USB3_RX3_P_R_C 4 15 1 10KR2J-3-GP 1 4 TR6202 FILTER-130-GP TR6203 FILTER-130-GP DY DY 3 16 5 14 OS1 OS2 RX1RX1+ DE1 DE2 RX2RX2+ EN_RXD CM 2 R6224 USB_PP1_R 18 USB_PP3 7 24 2 R6206 0R2-PT5-LILY-GP 1 2 USB_PP1 3 2 3 DY 18 U6203_DE1 SML1_CLK 1 4 2 18 R6211 0R2-PT5-LILY-GP 1 2 10KR2J-3-GP 1 3D3V_S5 R6205 0R2-PT5-LILY-GP 1 2 6 10 18 21 25 DY 4 1 USB_PP1_R GND GND GND GND GND 3D3V_S5 5V_USB1_S3 B NC#7 NC#24 SN65LVPE502CPRGER-GP 2 3 FILTER-130-GP TR6206 SCD1U10V2KX-5GP 2 1 1 C6211 DY FILTER-130-GP TR6204 SCD1U10V2KX-5GP 2 1 18 USB3_RX1_N 7 24 DY 2 3 2 1 R6203 0R2-PT5-LILY-GP USB3_RX1_P_R 1 2 4 2 USB3_RX1_P_C SCD1U16V2KX-L-GP 1 1 C6207 4 18 USB3_RX1_P R6212 0R2-PT5-LILY-GP 1 2 NC#7 NC#24 GND GND GND GND GND 6 10 18 21 25 SN65LVPE502CPRGER-GP DY USB_PP3_R A A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title USB 3.0 Port*2 5 4 3 2 Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 62 of 103 5 4 3 2 1 SSID = User.Interface D D Bluetooth conn. 3D3V_BT_S0 3D3V_S0 EC6301 SCD1U16V2KX-3GP 3D3V_BT_S0 1 R6301 DY DY 2 1 1 7 2 3 4 5 6 C 23D3V_BT_OUT 0R3J-0-U-GP 1 2 3 OUT GND OC# IN 5 EN/EN# 4 BLUETOOTH_EN 27,65 SY6288CAAC-GP 1 BT1 C6301 SC4D7U6D3V3KX-GP 2 U6301 DY DY USB_PP4 18 USB_PN4 18 C -BT_DET 22 8 ACES-CON6-49-GP DY B BT CONN. WLAN CONN. BT1 ASM DY R6301 ASM DY U6301 ASM DY C6301 ASM DY AFTP6301 AFTP6302 AFTP6303 AFTP6304 AFTP6305 AFTP6306 1 1 1 1 1 1 BLUETOOTH_EN 3D3V_BT_S0 USB_PP4 USB_PN4 GND -BT_DET B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Bluetooth Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 63 of 1 103 A 5 4 3 2 1 D D LA480s 3D3V_S0 1 3V_FP_S0 2 0R5J-5-GP C6401 SCD1U10V2KX-4GP FP1 7 2 1 R6403 1 18 18 C USB_PP10 USB_PN10 1 R6401 1 R6402 Biometric_USBPP Biometric_USBPN 1 AFTP6401 2 2 0R2J-2-GP 0R2J-2-GP 2 3 4 5 6 C 8 ACES-CON6-37-GP AFTP6402 AFTP6403 AFTP6404 3V_FP_S0 Biometric_USBPN Biometric_USBPP 1 1 1 B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Finger Printer Connector Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 64 of 1 103 A 5 4 3 2 1 SSID = Wireless Mini Card Connector(802.11a/b/g/n) D D 1D5V_S0 +3V_MINI_W LAN 3D3V_S0 1 1 1 2 0R3J-0-U-GP +5V_MINI_DEBUG 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 NP2 R6502 E51_TXD 2 0R2-PT5-LILY-GP 54 2 0R2-PT5-LILY-GP 1 20 20 PCIE_RXN2 PCIE_RXP2 20 20 PCIE_TXN2 PCIE_TXP2 +3V_MINI_W LAN E51_TXD_R +3V_MINI_W LAN 5V_S5 27,63 BLUETOOTH_EN R6503 1 R6529 1 DY W IFI_RF_EN 2 27 1 C6504 SCD1U16V2KX-L-GP 2 1 2 LPC_AD0_C LPC_AD1_C LPC_AD2_C LPC_AD3_C LPC_FRAME#_C +1D5V_MINI_W LAN PLT_RST# 5,18,27,31,32,36,66,71,77,80,83,97 PLT_RST#_W LAN 1 R6510 2 0R2-PT5-LILY-GP C6505 SC10U6D3V5KX-1GP C6506 SCD1U16V2KX-L-GP 1 4 6 8 10 12 14 16 C6503 SC10U6D3V5KX-1GP C6507 SCD1U16V2KX-L-GP C 2 27 1 3 5 7 9 11 13 15 20 CLK_PCIE_W LAN# 20 CLK_PCIE_W LAN C 1 C6502 SCD1U16V2KX-L-GP 2 DY 2 10R2J-2-GP BLUETOOTH_EN_C +3V_MINI_W LAN PCH_SMBCLK 14,15,20,66,69 PCH_SMBDATA 14,15,20,66,69 USB_PN11_C USB_PP11_C R6501 R6505 1 1 2 0R2J-2-GP 2 0R2J-2-GP USB_PN11 18 USB_PP11 18 5V_S5 W LAN_LED# CLK_PCI_LPC_C 1 TP6501 1 DY NP1 2 2 PCIE_W AKE#_1 C6501 SCD1U16V2KX-L-GP 2 27,63 BLUETOOTH_EN 20 PCIE_CLK_W LAN_REQ# W LAN1 53 2 0R2J-2-GP 1 1 R6504 1 +3V_MINI_W LAN 2 19,31 PCIE_W AKE# 2 +1D5V_MINI_W LAN 2 R6511 R6512 0R5J-5-GP DY R6519 10KR2J-3-GP R6514 0R2-PT5-LILY-GP 1 2 27 PCIE_W LAN_W AKE# Place near MINI Card CONN R6516 0R0805-PAD-1-GP 1 +1D5V_MINI_W LAN 3D3V_S5 SKT-MINI52P-57-GP Reserve for AOAC B 7 8 1 2 3 R6515 4 100KR2J-1-GP 2 1 SCD1U10V2KX-5GP 2 1 C6508 6 +3V_MINI_W LAN 5 3D3V_S5 U6501 LPC_AD0_C G6501 1 LPC_AD1_C G6502 1 LPC_AD2_C G6503 1 LPC_AD3_C G6504 1 LPC_FRAME#_C G6505 1 2 GAP-OPEN 2 GAP-OPEN 2 GAP-OPEN 2 GAP-OPEN 2 GAP-OPEN LPC_AD0 21,27,71,77 LPC_AD1 21,27,71,77 LPC_AD2 21,27,71,77 LPC_AD3 21,27,71,77 LPC_FRAME# 21,27,71,77 TPCF8105-GP B G6506~G6511 placememt close close WLAN1 in bottom side R6518 10KR2J-3-GP 27 AOAC_EN B R1 R2 PDTC115EE-1-GP 2 Q6502 C E AOAC_EN_1 R6517 10KR2J-3-GP 2 A R6513 0R2J-2-GP 1 2 1 1 AOAC_EN_2 <Core Design> CLK_PCI_LPC_C G6511 1 2 GAP-OPEN CLK_PCI_LPC A 18,71,77 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title MINICARD(WLAN)/ITP CONN 5 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 65 of 103 5 4 3 SSID = Wireless 2 1 Mini Card Connector(Full Card) D D 1D5V_S0 +3V_MINI_W W AN 1 +1D5V_MINI_W W AN 2 1 R6607 0R0805-PAD-1-GP SIM1 W W AN1 53 NP1 2 +3V_MINI_W W AN 3 5 7 9 11 13 15 4 6 8 10 12 14 16 UIM_PW R UIM_DATA UIM_CLK UIM_RESET UIM_VPP 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 NP2 1 1 2 3 5 6 7 8 9 10 NP1 NP2 UIM_CLK_R TPAD28 TP6601 C 21 21 SATA_RXP0 SATA_RXN0 C6611 C6612 21 21 SATA_TXN0 SATA_TXP0 C6614 C6620 2SCD01U16V2KX-L1-GP SATA_RXP0_C 2SCD01U16V2KX-L1-GP SATA_RXN0_C 1 1 2SCD01U16V2KX-L1-GP SATA_TXN0_C 2SCD01U16V2KX-L1-GP SATA_TXP0_C 1 1 +3V_MINI_W W AN +3V_MINI_W W AN 18 W W AN_IN 27 -MSATA_DET 1 DY 2 200R2F-L-GP VCC RST CLK GND VPP I/O GND GND CD NP1 NP2 CARD-PUSH-7P-3-GP PLT_RST#_W AN 1 2 R6605 PCH_SMBCLK PCH_SMBDATA R6601 R6604 2 0R2J-2-GP 2 0R2J-2-GP 1 1 C Near SIM1 UIM_PW R UIM_DATA UIM_CLK_R UIM_RESET UIM_VPP PCH_SMBCLK 14,15,20,65,69 PCH_SMBDATA 14,15,20,65,69 USB_PN8_C USB_PP8_C 3G_LED# 3G_EN 27 0R2-PT5-LILY-GP PLT_RST# 5,18,27,31,32,36,65,71,77,80,83,97 USB_PN8 18 USB_PP8 18 AFTP6601 AFTP6602 AFTP6603 AFTP6604 AFTP6605 1 1 1 1 1 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP TP6602 1 D35 54 R6603 27 GPS_DISABLE# R6602 1 C6605 SC4D7U10V5KX-1GP 2 +1D5V_MINI_W W AN UIM_DATA 3 2 UIM_PW R 1 UIM_CLK_R SKT-MINI52P-57-GP 2 4 33KR2J-3-GP UIM_RESET 5 FTZ6D8EGT148-GP 3D3V_S0 1 +3V_MINI_W W AN 3D3V_S5 B R6606 0R0805-PAD-1-GP Place near MINI Card CONN 2 2.7A Place near Pin 24 +1D5V_MINI_W W AN 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 C6610 C6608 R6610 10KR2J-3-GP 2 DY Q6602 B 27 3G_POW ERON R1 R2 PDTC115EE-1-GP C DY R6609 10KR2J-3-GP DY <Core Design> A 2 A 1 1 2 8 C6607 SC33P50V2JN-3GP DY C6606 SCD047U16V2KX-1-GP 1 C6604 SCD1U16V2KX-L-GP 2 C6603 SC33P50V2JN-3GP TPCF8105-GP 7 6 5 C6602 SCD047U16V2KX-1-GP 3 C6601 SC33P50V2JN-3GP 4 C6619 SC33P50V2JN-3GP 100KR2J-1-GP 2 1 C6618 SCD047U16V2KX-1-GP R6608 C6609 U6601 SCD047U16V2KX-1-GP C6613 DY SC4D7U6D3V3KX-GP DY +1D5V_MINI_W W AN +3V_MINI_W W AN DY SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP 2 1 +3V_MINI_W W AN 2 B Wistron Corporation E 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title WWAN Connector 5 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 66 of 103 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 67 of 1 103 A 5 4 3 2 SSID = User.Interface 1 5V_S0 LED3 10 CAP_LED_Q NUM_LED_Q SATA_LED#_Q APS_LED#_Q R6812 R6813 R6810 R6811 2 2 0R2-PT5-LILY-GP 2 0R2-PT5-LILY-GP 2 0R2-PT5-LILY-GP 0R2-PT5-LILY-GP 1 2 CAP_LED 27 6 1 D 9 2 EC6812 DMN66D0LDW -7-GP CAP_LED_Q ACES-CON8-15-GP 1 2 2 1 5V_S0 NUM_LED_R CAP_LED_R SATA_LED#_R APS_LED#_R 1 1 1 1 1 AFTP6801 AFTP6803 AFTP6804 AFTP6805 AFTP6806 AFTP6802 SC1KP50V2KX-1GP 5 SC1KP50V2KX-1GP NUM_LED_Q SC1KP50V2KX-1GP NUM_LED 3 SC1KP50V2KX-1GP SC1KP50V2KX-1GP 27 4 2 EC6806 EC6811 EC6807 EC6809 Q6802 8 7 6 5 4 3 2 CAP_LED_R NUM_LED_R SATA_LED#_R APS_LED#_R 2 1 LTC043ZUB-FS8-GP 1 1 1 1 1 2 R2 D CHARGE_LED#_Q 3 R1 1 1 27 CHARGE_LED 1 Q6804 R6824 DY 1 2 0R2J-2-GP Q6803 4 3 APS_LED#_Q 5 2 PW RLED 27,49 Q6810 POWER LED DMN66D0LDW -7-GP C PDTA143ET-GP LED2 PW R_LED#_Q C SATA_LED#_Q E 1 1 B SATA_LED# K PW R_LED#_R R6801 A 2 6 21 R1 APS_LED R2 21 2 100R2J-L-GP 1 EC6808 SC1KP50V2KX-1GP C 5V_S5 LED-G-107-GP-U 1 Charger LED PW R_LED#_R AFTP6815 LED1 K A CHARGE_LED#_R ORANGE CHARGE_LED#_Q 1 R6803 100R2J-L-GP 2 5V_S5 LED-O-36-GP-U Yellow AFTP6808 AFTP6809 AFTP6810 AFTP6812 AFTP6814 1 1 1 KBC_NOVO_BTN#_R KBC_PW RBTN#_R PW RLED 1 1 GND PALM_LED Power button Board for V480s 3D3V_S5 CHARGE_LED#_R Power button Board for LPR-1 PB2 9 B 1 AFTP6816 B 1 PB1 R6809 R6807 2 100R2J-L-GP KBC_NOVO_BTN#_R 2 100R2J-L-GP KBC_PW RBTN#_R 1 1 2 3 4 5 6 7 8 5 1 ACES-CON8-15-GP DY 2 1 2 1 2 1 2 DY EC6805 SCD1U10V2KX-5GP GAP-OPEN 1 2 DY EC6802 SCD1U10V2KX-5GP GAP-OPEN 1 2 1 10 G6802 DY EC6803 SC1KP50V2KX-1GP SC1KP50V2KX-1GP 2 G6801 EC6801 SCD1U10V2KX-5GP DY EC6804 2 3 4 KBC_PW RBTN# 1 27 KBC_NOVO_BTN# 27 KBC_PW RBTN# 27 PALM_LED 6 ACES-CON4-39-GP AFTP6807 AFTP6813 KBC_PW RBTN# GND 1 1 <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title LED Bard/Power Button Size A3 Date: 5 4 3 2 Document Number Rev SA LA480s W ednesday, March 07, 2012 Sheet 1 68 of 103 A B C D E SSID = Touch.Pad SSID = KBC KROW [0..7] 27 KCOL[0..15] 27 KeyBoard Connector LPR-1 5V_S0 5V_S0 KB1 KCOL2 KCOL4 KCOL7 KCOL8 C6913 1DY C6914 1DY C6915 1DY C6916 1DY 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP KROW 4 KROW 5 KCOL0 KROW 2 C6905 1DY C6906 1 C6907 1DY C6908 1DY 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP KCOL6 KCOL3 KCOL12 KCOL13 C6917 1DY C6918 1 C6919 1DY C6920 1DY 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP KROW 3 KCOL5 KCOL1 KROW 0 C6909 1 C6910 1DY C6911 1DY C6912 1DY 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP KCOL14 KCOL11 KCOL10 KCOL15 C6921 1 C6922 1 C6923 1 C6924 1 2 2 2 2 2 100KR2J-1-GP 1 100KR2J-1-GP 1 100KR2J-1-GP 1 100KR2J-1-GP 1 100KR2J-1-GP 1 2 2 1 TP4CLKPAD_R TP4DATAPAD_R 3 4 2 1 TPDATA 27 TPCLK 27 PAD_RESET# 27 PCH_SMBDATA TP4CLKPAD TP4DATAPAD 3 4 RN6902 SRN0J-6-GP NF 1 DY EC6903 2 1 1 DY EC6902 2 CO DY EC6901 ID 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP DY EC6904 AFTP6918 AFTP6914 AFTP6913 AFTP6912 AFTP6911 AFTP6910 AFTP6908 AFTP6915 AFTP6917 AFTP6919 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP 1 1 1 1 1 1 1 1 1 1 PAD_DETECT# TP4DATAPAD_R TP4CLKPAD_R 5V_TP_FUSE PAD_RESET# TPCLK_R TPDATA_R GND TI AL DY TP4LEFT C6925 1DY TP4MIDDLEC6926 1DY TP4RIGHT C6927 1DY KBD_ID C6928 1DY KBD_ID# C6929 1 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP Track Point Connector W 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP 2SC220P50V2KX-3GP TPLED1 ist R6906 1 1KR2F-3-GP 3 Q6901 ro 1 27,68 PALM_LED R1 LA480s PALM_LED_N LTC043ZUB-FS8-GP en o 3D3V_S0 2 4 1 1 1 ACES-CON2-17-GP EL6901 2 PALM_LED_P PALM_LED_N GND 3D3V_S0 1 1 AFTE14P-GP AFTE14P-GP AFTE14P-GP F6903 FUSE-D5A32V-12-GP KBD_ID R6909 1 2 100KR2J-1-GP KBD_ID# R6910 1 2 1KR2J-1-GP 2 2 R6908 10KR2F-2-GP 1 AFTP6951 AFTP6952 3 1 2 PALM_LED_P 2 R2 nt 5V_S0 2 3 4 5 6 7 8 9 10 12 3 3D3V_S5 oL 11 1 PAD_DETECT# 27 PCH_SMBCLK EN 2 TRP1 R6905 RN6901 SRN0J-6-GP ACES-CON10-28-GP 32 C6901 1DY C6902 1 C6903 1 C6904 1DY R6903 1 11 ACES-CON30-8-GP-U KROW 1 KROW 7 KROW 6 KCOL9 R6904 2 27 R6902 MLVS0402M04-GP 1 KBD_ID VO TPDATA_R TPCLK_R 5V_TP_FUSE SCD1U10V2KX-5GP TP4LEFT TP4MIDDLE TP4RIGHT KBD_ID KBD_ID# NO 12 10 9 8 7 6 5 4 3 2 2 LE R6901 CP1 1 KROW 7 KROW 6 KCOL9 KROW 4 KROW 5 KCOL0 KROW 2 KROW 3 KCOL5 KCOL1 KROW 0 KCOL2 KCOL4 KCOL7 KCOL8 KCOL6 KCOL3 KCOL12 KCOL13 KCOL14 KCOL11 KCOL10 KCOL15 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 F6902 FUSE-D5A32V-12-GP SCD1U10V2KX-5GP KROW 7 KROW 6 KCOL9 KROW 4 KROW 5 KCOL0 KROW 2 KROW 3 KCOL5 KCOL1 KROW 0 KCOL2 KCOL4 KCOL7 KCOL8 KCOL6 KCOL3 KCOL12 KCOL13 KCOL14 KCOL11 KCOL10 KCOL15 TP4LEFT TP4MIDDLE TP4RIGHT KBD_ID KBD_ID# SCD1U10V2KX-5GP KROW 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP SCD1U10V2KX-5GP 1 AFTP6948 AFTP6947 AFTP6946 AFTP6945 AFTP6944 AFTP6943 AFTP6942 AFTP6941 AFTP6940 AFTP6939 AFTP6938 AFTP6937 AFTP6936 AFTP6935 AFTP6934 AFTP6933 AFTP6932 AFTP6950 AFTP6929 AFTP6927 AFTP6928 AFTP6931 AFTP6930 AFTP6924 AFTP6922 AFTP6923 AFTP6926 AFTP6925 KROW 1 1 3 AFTP6949 AFTE14P-GP 1 4 31 2 4 CP2 8 TP4DATAPAD TP4_RESET TP4MIDDLE TP4RIGHT TP4LEFT TP4CLKPAD TRP1_PW R 1 TP4_RESET 27 5V_S0 1 R6907 2 0R0402-PAD AFTE14P-GP TP6907 TP6906 TP6905 TP6904 TP6903 TP6902 TP6901 AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP AFTE14P-GP 1 1 1 1 1 1 1 6 5 4 3 2 TRP1_PW R TP4CLKPAD TP4LEFT TP4RIGHT TP4MIDDLE TP4_RESET TP4DATAPAD 1 1 AFTE14P-GP AFTP6916 TPCLK_R TPDATA_R PCH_SMBCLK 14,15,20,65,66 <Core Design> PCH_SMBDATA 14,15,20,65,66 1 7 Wistron Corporation ACES-CON6-37-GP TP6909 PCH_SMBCLK PCH_SMBDATA ACES-CON10-26-GP 1 1 AFTE14P-GP AFTE14P-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. AFTP6954 AFTP6955 Title TOUCH PAD CONNECTOR A B C D Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 69 of 103 5 4 3 2 1 D D C C B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Hall Sensor Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 70 of 1 103 A 5 4 3 2 1 D D 3D3V_S0 DB1 21,27,65,77 LPC_AD0 21,27,65,77 LPC_AD1 21,27,65,77 LPC_AD2 21,27,65,77 LPC_AD3 21,27,65,77 LPC_FRAME# 5,18,27,31,32,36,65,66,77,80,83,97 PLT_RST# 18,65,77 CLK_PCI_LPC C 1 2 3 4 5 6 7 8 9 10 11 12 C MLX-CON10-7-GP DY B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Dubug connector Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 71 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 72 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 73 of 1 103 A 5 4 3 2 1 D D C C B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CARD Reader CONN Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 74 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title New Card Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 75 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 76 of 1 103 A 5 4 3 2 1 D D 3D3V_S0 1 3D3V_S0 1 R7703 10KR2J-3-GP C7701 SCD1U10V2KX-4GP 2 2 U7701 C 1 2 6 9 15 19,27 PM_CLKRUN# VPS VPS GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 3 VNC 7 PP 5 8 12 13 14 19 25 LRESET# 16 PLT_RST# LFRAME# 22 LPC_FRAME# 21,27,65,71 LPCPD# 28 SERIRQ 27 LCLK 21 LAD0 LAD1 LAD2 LAD3 26 23 20 17 GND GND GND 4 11 18 NC#5 NC#8 NC#12 NC#13 NC#14 NC#19 NC#25 5,18,27,31,32,36,65,66,71,80,83,97 INT_SERIRQ 21,27 C CLK_PCI_LPC 18,65,71 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_AD[0..3] 21,27,65,71 3D3V_S5 1 10 24 ST33ZP24AR28PVRC-GP R7701 10KR2J-3-GP DY 2 CRV only B U7701 C7701 R7703 DY DY DY ASM ASM ASM R7701 R7702 ASM DY DY ASM 1 R7702 10KR2J-3-GP 2 NO TPM B -DTPM_PRESENCE 22 ST Micro ST33ZP24AR28PVRC <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 77 of 1 103 A 5 4 3 2 1 D D BLANK C C B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 78 of 1 103 A 5 4 3 2 1 D D 3D3V_S5 APS VCC3_ACC 2 10R3F-GP 1 APS E 2 APS B R1 SCD1U10V2KX-4GP R2 SC10U6D3V5KX-1GP Q7901 PDTA114EE-3-GP-U C7902 1 C7901 C 1 R7901 APS 2 VCC3M_Q34 ANALOG_AGND 1 27 GSENSE_ON# R7902 100KR2J-1-GP C C 14 NC#9 NC#11 11 NC#13 13 NC#16 16 1 R7906 C7904 SCD1U10V2KX-4GP 2 56KR2J-L1-GP C7907 SCD1U10V2KX-4GP APS GSENSE_Y 27 GSENSE_X 27 APS ANALOG_AGND APS GSENSE_X_R 1 R7907 1 9 VOUTX 12 APS GSENSE_Y_R 1 NC#4 10 2 4 RES NC#1 VOUTY APS C7908 SCD1U10V2KX-4GP APS 2 C7905 SCD1U10V2KX-4GP LIS34ALTR-GP B 2 56KR2J-L1-GP 1 ANALOG_AGND B 1 2 2 APS GND GND GND 8 TP7901 TPAD14-GP APS 2 R7904 0R0402-PAD-1-GP 5 6 7 VOUTZ 1 1 R7903 100KR2J-1-GP ST GND GSENSE_Z 2 1 1 27 GSENSE_TST VDD U7901 2 3 15 2 DY ANALOG_AGND <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title G-Sensor Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 79 of 1 103 A 5 4 3 2 1 D D RFID 3D3V_S5 1 3D3V_S0 3D3V_S5 R8001 4K7R2J-2-GP 2 U8001 Q8001 C B R1 C PROT_EEPROM VCC WP SCL SDA 8 7 6 5 C SMB_CLK 20 SMB_DATA 20 C8001 1 NC#1 NC#2 PROT# GND BUL08-1FVJ-WGE2-GP 2 PDTC115TE-GP PLT_RST# 5,18,27,31,32,36,65,66,71,77,83,97 SCD01U16V2KX-L1-GP E 1 2 3 4 B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 80 of 1 103 A 5 4 3 2 1 D D BLANK C C B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 81 of 1 103 A 5 4 3 2 1 D D 5V_S5 5V_S0 5V_S5 5V_S0 3D3V_S0 3D3V_S0 BTB1 B EC8204 SCD1U10V2KX-5GP CRT_RED CRT_GREEN CRT_BLUE 5V_AUX_S5 GND EC8203 SCD1U10V2KX-5GP 1 1 1 1 1 EC8202 SCD1U10V2KX-5GP AFTP8201 AFTP8202 AFTP8203 AFTP8204 AFTP8205 EC8201 SCD1U10V2KX-5GP 2 ACES-CONN60A-3-GP USB_PN9 18 USB_PP9 18 USB_PWR_EN 27,62 USB_OC#8_9 18 USB_OC#2_3 18 CHG_USB_OC# 27 USB_CHG_EN 27 USB_AO_SEL0 27 AUD_DMIC_DATA 49 AUD_DMIC_CLK 49 1 DCIN_LED B C USB_PN2 18 USB_PP2 18 2 2 HDA_CODEC_BITCLK_C 0R2-PT5-LILY-GP CRT_DDC_DATA 17 CRT_DDC_CLK 17 CRT_VSYNC 17 CRT_HSYNC 17 CRT_RED 17 CRT_GREEN 17 CRT_BLUE 17 1 27 1 R8201 5V_AUX_S5 2 21 HDA_CODEC_BITCLK 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 65 66 1 27 KBC_BEEP 21 HDA_SPKR 27 AMP_MUTE# 21 HDA_CODEC_SDOUT 21 HDA_CODEC_RST# 21 HDA_CODEC_SYNC 21 HDA_SDIN0 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 NP2 64 2 HDMI_DATA1_R#_C1 HDMI_DATA1_R_C1 HDMI_DATA0_R_C1 HDMI_DATA0_R#_C1 HDMI_CLK_R_C1 HDMI_CLK_R#_C1 HDMI_DATA2_R#_C1 HDMI_DATA2_R_C1 17 HDMI_PCH_DET 17 PCH_HDMI_DATA 17 PCH_HDMI_CLK 63 62 2 1 C 17 17 17 17 17 17 17 17 61 NP1 1 <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title IO Board Connector Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 82 of 1 103 A 5 2 C8312 2 C8311 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8314 2 C8313 PEG_RXP7 PEG_RXN7 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8316 2 C8315 PEG_RXP8 PEG_RXN8 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8318 2 C8317 PEG_RXP10 PEG_RXN10 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 OPS 1 OPS 1 2 C8320 2 C8319 2 C8322 2 C8321 PEG_TXP2 PEG_TXN2 AP14 AP15 PEG_C_RXP3 PEG_C_RXN3 AL16 AK16 PEG_TXP3 PEG_TXN3 AN15 AM15 PEG_C_RXP4 PEG_C_RXN4 AK17 AJ17 PEG_TXP4 PEG_TXN4 AN17 AM17 PEG_C_RXP5 PEG_C_RXN5 AH17 AG17 PEG_TXP5 PEG_TXN5 AP17 AP18 PEG_C_RXP6 PEG_C_RXN6 AK18 AJ18 PEG_TXP6 PEG_TXN6 AN18 AM18 PEG_C_RXP7 PEG_C_RXN7 AL19 AK19 PEG_TXP7 PEG_TXN7 AN20 AM20 PEG_C_RXP8 PEG_C_RXN8 AK20 AJ20 PEG_TXP8 PEG_TXN8 AP20 AP21 PEG_C_RXP9 PEG_C_RXN9 AH20 AG20 PEG_TXP9 PEG_TXN9 AN21 AM21 PEG_C_RXP10 AK21 PEG_C_RXN10 AJ21 PEG_TXP10 PEG_TXN10 PEG_RXP11 PEG_RXN11 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS OPS 1 1 2 C8324 2 C8323 PEG_TXP11 PEG_TXN11 PEG_RXP12 PEG_RXN12 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8326 2 C8325 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8328 2 C8327 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8330 2 C8329 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8332 2 C8331 AN26 AM26 PEG_C_RXP14 AK24 PEG_C_RXN14 AJ24 PEG_TXP14 PEG_TXN14 PEG_RXP15 PEG_RXN15 AN24 AM24 PEG_C_RXP13 AH23 PEG_C_RXN13 AG23 PEG_TXP13 PEG_TXN13 PEG_RXP14 PEG_RXN14 AP23 AP24 PEG_C_RXP12 AK23 PEG_C_RXN12 AJ23 PEG_TXP12 PEG_TXN12 PEG_RXP13 PEG_RXN13 AN23 AM23 PEG_C_RXP11 AL22 PEG_C_RXN11 AK22 AP26 AP27 PEG_C_RXP15 AL25 PEG_C_RXN15 AK25 PEG_TXP15 PEG_TXN15 AN27 AM27 PEX_RX1 PEX_RX1# PEX_TX2 PEX_TX2# PEX_RX2 PEX_RX2# OPS C8340 C8342 OPS C8341 Under GPU C8343 OPS Near GPU C8344 OPS C8345 OPS SC22U6D3V5MX-2GP 2 1 AK15 AJ15 AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28 SC22U6D3V5MX-2GP 2 1 PEG_C_RXP2 PEG_C_RXN2 OPS PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8 PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14 SC22U6D3V5MX-2GP 2 1 AN14 AM14 PEX_TX1 PEX_TX1# SC22U6D3V5MX-2GP 2 1 PEG_TXP1 PEG_TXN1 PEX_RX0 PEX_RX0# SC10U6D3V5MX-3GP 2 1 AH14 AG14 SC10U6D3V5MX-3GP 2 1 PEG_C_RXP1 PEG_C_RXN1 PEX_TX0 PEX_TX0# SC10U6D3V5MX-3GP 2 1 AN12 AM12 C8346 OPS Midway Between GPU and Power Supply PEX_TX3 PEX_TX3# C PEX_RX3 PEX_RX3# PEX_TX4 PEX_TX4# PEX_RX4 PEX_RX4# 3.3V ±10% 210mA total PEX_TX5 PEX_TX5# PEX_PLL_HVDD PEX_RX5 PEX_RX5# PEX_SVDD_3V3 AG12 OPS PEX_TX6 PEX_TX6# PEX_RX6 PEX_RX6# OPS C8347 PEX_TX7 PEX_TX7# PEX_RX7 PEX_RX7# C8348 PLT_RST# 1 R8310 DY 2 VGA_RST# 0R2J-2-GP C8349 3D3V_S0 U8301 1 18 DGPU_HOLD_RST# PLT_RST# DY 2 3 VGA_CORE 1 R8304 VDD_SENSE dGPU reset 5,18,27,31,32,36,65,66,71,77,80,97 OPS Near GPU PEX_TX8 PEX_TX8# 3D3V_VGA_S0 AH12 B VCC A Y 5 4 VGA_RST# GND 2 OPS 1 OPS 1 2 C8310 2 C8309 PEG_RXP6 PEG_RXN6 PEG_RXP9 PEG_RXN9 B SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8308 2 C8307 PEG_TXP0 PEG_TXN0 PEX_REFCLK PEX_REFCLK# C8339 OPS 74LVC1G08GW-1-GP R8319 10KR2J-3-GP OPS 2 0R2J-2-GP L4 NVVDD_SENSE 92 L5 NVGND_SENSE 92 OPS 1 PEG_RXP5 PEG_RXN5 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8306 2 C8305 AK14 AJ14 C8338 OPS PEX_RX8 PEX_RX8# GND_SENSE PEX_TX9 PEX_TX9# R8305 0R2J-2-GP PEX_RX9 PEX_RX9# DY PEX_TX10 PEX_TX10# NC_3V3AUX B P8 PEX_RX10 PEX_RX10# PEX_TX11 PEX_TX11# PEX_RX11 PEX_RX11# PEX_TX12 PEX_TX12# PEX_TSTCLK_OUT PEX_TSTCLK_OUT# AJ26 AK26 PEX_TSTCLK_OUT R8306 2 PEX_TSTCLK_OUT# OPS 1 200R2F-L-GP 1D05V_VGA_S0 PEX_RX12 PEX_RX12# PEX_TX13 PEX_TX13# 1.05V ±30mV 150mA total PEX_PLLVDD AG26 VCC1R05VIDEO_PEX_PLLVDD PEX_RX13 PEX_RX13# PEX_TX14 PEX_TX14# 3D3V_VGA_S0 TESTMODE AK11 TESTMODE 1 R8307 PEX_TERMP AP29 PEX_TERMP 1 R8309 OPS 2 10KR2J-3-GP PEX_RX14 PEX_RX14# PEX_TX15 PEX_TX15# PEX_RX15 PEX_RX15# 1 R8308 DY L8302 2 2 10KR2J-3-GP OPS C8350 SC4D7U6D3V5KX-3GP 2 1 PEG_RXP4 PEG_RXN4 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8304 2 C8303 PEG_C_RXP0 PEG_C_RXN0 C8337 OPS SC1U10V3KX-3GP 2 1 PEG_RXP3 PEG_RXN3 C SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 2 C8301 2 C8302 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6 OPS SCD1U10V2KX-4GP 2 1 PEG_RXP2 PEG_RXN2 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP OPS 1 OPS 1 PEX_CLKREQ# C8336 SC10U6D3V5MX-3GP 2 1 PEG_RXP1 PEG_RXN1 SCD22U6D3V2KX-1GP SCD22U6D3V2KX-1GP PEX_RST# SC4D7U6D3V3KX-GP 2 1 AL13 AK13 20 CLK_PCIE_VGA 20 CLK_PCIE_VGA# PEG_RXP0 PEG_RXN0 AK12 AG19 AG21 AG22 AG24 AH21 AH25 SC4D7U6D3V3KX-GP 2 1 VGA_RST# AJ12 VGA_PEG_CLKREQ# PEX_WAKE# C8335 OPS C8334 1 AJ11 OPS C8333 2 Q8301 2N7002BK-GP S OPS 1 OF 17 1/17 PCI_EXPRESS SC4D7U6D3V3KX-GP 2 1 VGA1A SC1U6D3V2KX-GP 2 1 R8303 SC1U6D3V2KX-GP 2 1 D DY 2 10KR2J-3-GP 1 2 G R8302 D 1.05V ±30mV 3300mA total OPS 20 PEG_CLKREQ# 1 1D05V_VGA_S0 3D3V_VGA_S0 OPS 3D3V_VGA_S0 2 SC4D7U6D3V3KX-GP 2 1 4 SC1U6D3V2KX-GP 2 1 4 PEG_RXN[0..15] SC1U6D3V2KX-GP 2 1 PEG_RXP[0..15] 4 PEG_TXN[0..15] 3 SCD1U10V2KX-4GP 2 1 4 PEG_TXP[0..15] 10KR2J-3-GP 1 D 4 OPS 1 BLM11A121S-GP CHIP BEAD BLM18AG121SN1D OPS OPS C8351 C8352 OPS 2 2K49R2F-GP Under GPU Near GPU N13P-GS-A1-GP OPS A A <Core Design> Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size A2 Date: 5 4 3 2 N13P_GPU (1/5): PEG Document Number LA480s Wednesday, March 07, 2012 1 Sheet Rev SA 83 of 103 A B C 10 OF 17 VGA1J 5/17 IFPAB LVDS Interface D 1 IFPAB_RSET AJ8 IFPAB_PLLVDD AH8 ALL PINS NC FOR GF117 AN6 AM6 IFPA_TXD0# IFPA_TXD0 AN3 AP3 DVI-DL DVI-SL/HDMI DP IFPAB_PLLVDD R8401 10KR2J-3-GP IFPA_TXD1# IFPA_TXD1 AM5 AN5 IFPA_TXD2# IFPA_TXD2 AK6 AL6 IFPA_TXD3# IFPA_TXD3 AH6 AJ6 IFPB_TXC# IFPB_TXC AH9 AJ9 IFPB_TXD4# IFPB_TXD4 AP5 AP6 IFPB_TXD5# IFPB_TXD5 AL7 AM7 IFPB_TXD6# IFPB_TXD6 AM8 AN8 1 TP8402 IFPEF_PLLVDD AB8 IFPEF_PLLVDD IFPF_REST AD6 IFPEF_RSET IFPE_AUX_I2CY_SDA# IFPE_AUX_I2CY_SCL AB4 AB3 TXC TXC IFPE_L3# IFPE_L3 AC5 AC4 TXD0 TXD0 TXD0 TXD0 IFPE_L2# IFPE_L2 AC3 AC2 TXD1 TXD1 TXD1 TXD1 IFPE_L1# IFPE_L1 AC1 AD1 TXD2 TXD2 TXD2 TXD2 IFPE_L0# IFPE_L0 AD3 AD2 HPD_E HPD_E I2CY_SDA I2CY_SCL I2CY_SDA I2CY_SCL TXC TXC 4 1 1 IFPA_TXC# IFPA_TXC IFPAB_RSET 4 R8403 10KR2J-3-GP OPS 2 2 OPS IFPA_IOVDD AG9 IFPB_IOVDD R8402 10KR2J-3-GP OPS 2 IFPB_TXD7# IFPB_TXD7 IFPE IFPEF_IOVDD AC7 IFPE_IOVDD AC8 IFPF_IOVDD 2 R8404 10KR2J-3-GP GPIO14 IFPAB R1 IFPF_AUX_I2CZ_SDA# IFPF_AUX_I2CZ_SCL AF2 AF3 TXC TXC IFPF_L3# IFPF_L3 AF1 AG1 TXD3 TXD3 TXD0 TXD0 IFPF_L2# IFPF_L2 AD5 AD4 TXD4 TXD4 TXD1 TXD1 IFPF_L1# IFPF_L1 AF5 AF4 TXD5 TXD5 TXD2 TXD2 IFPF_L0# IFPF_L0 AE4 AE3 I2CZ_SDA I2CZ_SCL AL8 AK8 GPIO18 3 1 AG8 1 IFPAB_IOVDD 3 13 OF 17 VGA1M 8/17 IFPEF ALL PINS NC FOR GF117 TP8401 E OPS N4 IFPF N13P-GS-A1-GP OPS HPD_F GPIO19 P3 N13P-GS-A1-GP OPS 2 2 12 OF 17 VGA1L 7/17 IFPD HDMI Interface 11 OF 17 VGA1K 6/17 IFPC ALL PINS NC FOR GF117 ALL PINS NC FOR GF117 1 TP8403 IFPC_RSET AF8 TP8404 IFPC_RSET DVI/HDMI IFPD_RSET 1 IFPC_PLLVDD R8405 10KR2J-3-GP AG2 AG3 TXC TXC IFPC_L3# IFPC_L3 AG4 AG5 TXD0 TXD0 IFPC_L2# IFPC_L2 AH4 AH3 TXD1 TXD1 IFPC_L1# IFPC_L1 AJ2 AJ3 TXD2 TXD2 IFPC_L0# IFPC_L0 AJ1 AK1 IFPC OPS IFPD IFPD_IOVDD AF6 IFPC_IOVDD GPIO15 N13P-GS-A1-GP OPS OPS A AG6 P2 DVI/HDMI DP B IFPD_AUX_I2CX_SDA# IFPD_AUX_I2CX_SCL AK2 AK3 TXC TXC IFPD_L3# IFPD_L3 AK5 AK4 TXD0 TXD0 IFPD_L2# IFPD_L2 AL4 AL3 TXD1 TXD1 IFPD_L1# IFPD_L1 AM4 AM3 TXD2 TXD2 IFPD_L0# IFPD_L0 AM2 AM1 I2CX_SDA I2CX_SCL IFPD_IOVDD GPIO17 M6 <Core Design> N13P-GS-A1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. OPS Title C 1 Wistron Corporation OPS R8408 10KR2J-3-GP 2 R8406 10KR2J-3-GP 2 1 IFPC_IOVDD 1 1 IFPD_PLLVDD R8407 10KR2J-3-GP 2 2 OPS IFPC_AUX_I2CW_SDA# IFPC_AUX_I2CW_SCL I2CW_SDA I2CW_SCL AG7 1 1 AF7 IFPD_RSET DP IFPD_PLLVDD IFPC_PLLVDD AN2 D N13P_GPU (2/5): DIGITALOUT Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 84 of 103 5 VGA1B 2/17 FBA 4 3 2 OF 17 2 1 3 OF 17 VGA1C 3/17 FBB 89 FBA_D[63..0] FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7 M30 H30 E34 M34 AF30 AK31 AM34 AF32 FB_VREF H26 FBA_CMD_RFU0 FBA_CMD_RFU1 89 89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 R32 AC32 FBA_DEBUG0 FBA_DEBUG1 FBA_WCKB1 FBA_WCKB1# FBA_WCKB23 FBA_WCKB23# FBA_WCKB45 FBA_WCKB45# FBA_WCKB67 FBA_WCKB67# FBA_PLL_AVDD R28 R8518 1 AC28 1 R8519 R30 R31 AB31 AC31 DY DY 260D4R2F-GP 2 10KR2J-3-GP FBA_CLK0 FBA_CLK0# FBA_CLK1 FBA_CLK1# 88 88 89 89 K31 L30 H34 J34 AG30 AG31 AJ34 AK34 J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33 66mA U27 FB_PLLVDD E11 E3 A3 C9 F23 F27 C30 A24 FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7 90 90 90 90 91 91 91 91 FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7 D10 D5 C3 B9 E23 E28 B30 A23 90 90 90 90 91 91 91 91 FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7 D9 E4 B2 A9 D22 D28 A30 B23 FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7 FBB_CMD_RFU0 FBB_CMD_RFU1 ( C8517 OPS C8518 C8519 FBB_DEBUG0 FBB_DEBUG1 FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7 FBB_WCK1 FBB_WCK1# FBB_WCK23 FBB_WCK23# FBB_WCK45 FBB_WCK45# FBB_WCK67 FBB_WCK67# FBB_WCKB1 FBB_WCKB1# FBB_WCKB23 FBB_WCKB23# FBB_WCKB45 FBB_WCKB45# FBB_WCKB67 FBB_WCKB67# THE FBB_WCKBxx PINS ARE USED ONLY ON GK107 THEY ARE NC FOR GF108 AND FOR GF117 2 FBB_PLL_AVDD G14 R8520 1 G20 1 R8521 2 60D4R2F-GP 2 10KR2J-3-GP DY DY FBB_CLK0 FBB_CLK0# FBB_CLK1 FBB_CLK1# 90 90 91 91 OPS C8506 C8507 SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 OPS OPS C8508 C8513 C8510 C8514 C8511 C8515 OPS OPS OPS OPS C8512 OPS C8516 C Near GPU FB_CAL_PU_GND FB_CAL_TERM_GND D12 E12 E20 F20 F1 F2 1D5V_VGA_S0 J27 FB_CAL_PD_VDDQ 1 R8501 OPS 2 40D2R2F-GP H27 FB_CAL_PU_GND H25 FB_CAL_TERM_GND OPS N13P-GS-A1-GP F8 E8 A5 A6 D24 D25 B27 C27 R8502 OPS R8503 Default GPU Drive Calibration for DDR3 (DG-05587-001_v03_p.82_Table 17) D6 D7 C6 B6 F26 E26 A26 A27 Memory/PKG FBVDDQ DDR3 1.5V FBCAL_PU_GND FBCAL_PU_VDDQ 42.2Ω FBCAL_TERM_GND 40.2Ω 51.1Ω B *Use only 1% resistors for driver calibration. 66mA FB_PLLVDD H17 OPS N13P-GS-A1-GP OPS C8520 FBCLK Termination placed at each VRAM FBA_CLK1 Near GPU FBA_CLK0 162R2F-GP 2 1 Under GPU C8509 OPS OPS FB_VDDQ_SENSE C12 C20 C8505 BLM18KG300TN1D-GP OPS OPS 91 91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 FB_CAL_PD_VDDQ L8501 1 FBB_ODT1 FBB_CKE1 FBB_A13 FBB_A8 FBB_A6 FBB_A11 FBB_A5 FBB_A3 FBB_BA2 FBB_BA1 FBB_A12 FBB_A10 FBB_RAS# FB_GND_SENSE FBB_CLK0 FBB_CLK0# FBB_CLK1 FBB_CLK1# 1.05V ±30mV 167mA total 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 90,91 91 OPS C8504 Under GPU OPS 1D5V_VGA_S0 FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7 1D05V_VGA_S0 OPS OPS 90 90 90 90 91 91 91 91 90 90 FBB_RST FBB_A9 FBB_A7 FBB_A2 FBB_A0 FBB_A4 FBB_A1 FBB_BA0 FBB_WE# FBB_A15 FBB_CAS# FBB_CS1# OPS C8503 SC4D7U6D3V3KX-GP 2 1 FBA_ODT1 FBA_CKE1 FBA_A13 FBA_A8 FBA_A6 FBA_A11 FBA_A5 FBA_A3 FBA_BA2 FBA_BA1 FBA_A12 FBA_A10 FBA_RAS# ODT CKE A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS# A13 A8 A6 A11 A5 A3 BA2 BA1 A12 A10 RAS# 90 FBB_ODT0 FBB_CKE0 OPS SC10U6D3V5MX-3GP 2 1 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 88,89 89 FBB_CS0# C8502 SC4D7U6D3V3KX-GP 2 1 FBA_RST FBA_A9 FBA_A7 FBA_A2 FBA_A0 FBA_A4 FBA_A1 FBA_BA0 FBA_WE# FBA_A15 FBA_CAS# FBA_CS1# FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 OPS C8501 SC10U6D3V5MX-3GP 2 1 88 88 FB CMD mapping Mode D-N13x D13 E14 F14 A12 B12 C14 B14 G15 F15 E15 D15 A14 D14 A15 B15 C17 D18 E18 F18 A20 B20 C18 B18 G18 G17 F17 D16 A18 D17 A17 B17 E17 OPS FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43 FBVDDQ_44 SC1U6D3V3KX-2GP 2 1 88 FBA_ODT0 FBA_CKE0 A14 RST A9 A7 A2 A0 A4 A1 BA0 WE# A15 CAS# CS0# 1D5V_VGA_S0 FBA_WCK1 FBA_WCK1# FBA_WCK23 FBA_WCK23# FBA_WCK45 FBA_WCK45# FBA_WCK67 FBA_WCK67# N13P-GS-A1-GP FBA_CS0# ODT CKE A14 RST A9 A7 A2 A0 A4 A1 BA0 WE# A15 CAS# AA27 AA30 AB27 AB33 AC27 AD27 AE27 AF27 AG27 B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24 H8 H9 L27 M27 N27 P27 R27 T27 T30 T33 V27 W27 W30 W33 Y27 4 OF 17 SC4D7U6D3V3KX-GP 2 1 FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 U30 T31 U29 R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33 Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33 Y28 Y29 W31 Y30 AA34 Y31 Y34 Y33 V31 CS0# D VGA1D 14/17 FBVDDQ SC1U6D3V3KX-2GP 2 1 FB CMD mapping Mode D-N13x FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7 FB_VREF FBx_CMD0 FBx_CMD1 FBx_CMD2 FBx_CMD3 FBx_CMD4 FBx_CMD5 FBx_CMD6 FBx_CMD7 FBx_CMD8 FBx_CMD9 FBx_CMD10 FBx_CMD11 FBx_CMD12 FBx_CMD13 FBx_CMD14 FBx_CMD15 FBx_CMD16 FBx_CMD17 FBx_CMD18 FBx_CMD19 FBx_CMD20 FBx_CMD21 FBx_CMD22 FBx_CMD23 FBx_CMD24 FBx_CMD25 FBx_CMD26 FBx_CMD27 FBx_CMD28 FBx_CMD29 FBx_CMD30 FBx_CMD31 1D5V_VGA_S0 SC4D7U6D3V3KX-GP 2 1 N13x DDR3 Data Bits Data Bits mode D [31:0] [63:32] FBA_CLK0 FBA_CLK0# FBA_CLK1 FBA_CLK1# THE FBA_WCKBxx PINS ARE USED ONLY ON GK107 THEY ARE NC FOR GF108 AND FOR GF117 1 Mode D Command Mapping (DG-05587-001_v03_p.78_Table 16) FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7 B TP8507 35mA OPS FBA_CLK1# R8504 FBB_CLK1 OPS FBA_CLK0# R8505 FBB_CLK0 OPS R8506 FBB_CLK1# 162R2F-GP 2 1 88 88 88 88 89 89 89 89 FB_PLLVDD K27 FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63 162R2F-GP 2 1 M31 G31 E33 M33 AE31 AK30 AN33 AF33 FB_DLL_AVDD G9 E9 G8 F9 F11 G11 F12 G12 G6 F5 E6 F6 F4 G4 E2 F3 C2 D4 D3 C1 B3 C4 B5 C5 A11 C11 D11 B11 D8 A8 C8 B8 F24 G23 E24 G24 D21 E21 G21 F21 G27 D27 G26 E27 E29 F29 E30 D30 A32 C31 C32 B32 D29 A29 C29 B29 B21 C23 A21 C21 B24 C24 B26 C26 42D2R2F-GP 2 1 FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7 FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63 51D1R2F-GP 2 1 88 88 88 88 89 89 89 89 FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7 90,91 FBB_D[63..0] 2 10KR2J-3-GP DY 162R2F-GP 2 1 P30 F31 F34 M32 AD31 AL29 AM32 AF34 PS_FB_CLAMP 1 R8522 SC22U6D3V5MX-2GP 2 1 FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7 E1 SCD1U10V2KX-5GP 2 1 88 88 88 88 89 89 89 89 FB_CLAMP SCD1U10V2KX-5GP 2 1 C FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63 SCD1U10V2KX-5GP 2 1 D L28 M29 L29 M28 N31 P29 R29 P28 J28 H29 J29 H28 G29 E31 E32 F30 C34 D32 B33 C33 F33 F32 H33 H32 P34 P32 P31 P33 L31 L34 L32 L33 AG28 AF29 AG29 AF28 AD30 AD29 AC29 AD28 AJ29 AK29 AJ30 AK28 AM29 AM31 AN29 AM30 AN31 AN32 AP30 AP32 AM33 AL31 AK33 AK32 AD34 AD32 AC30 AD33 AF31 AG34 AG32 AG33 ( FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63 OPS R8507 FBB_CLK0# Memory ODTx, CKEx and RST Termination R8514 OPS R8515 OPS R8516 10KR2J-3-GP 2 1 R8513 OPS 10KR2J-3-GP 2 1 R8512 OPS 10KR2J-3-GP 2 1 R8511 OPS 10KR2J-3-GP 2 1 R8510 OPS 10KR2J-3-GP 2 1 R8509 OPS 10KR2J-3-GP 2 1 R8508 OPS 10KR2J-3-GP 2 1 OPS 10KR2J-3-GP 2 1 10KR2J-3-GP 2 1 A FBB_CKE0 FBB_CKE1 FBB_RST FBB_ODT0 FBB_ODT1 10KR2J-3-GP 2 1 FBA_CKE0 FBA_CKE1 FBA_RST FBA_ODT0 FBA_ODT1 A OPS R8517 <Core Design> Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title Size A2 Date: 5 4 3 2 N13P_GPU (3/5): VRAM I/F Document Number LA480s Wednesday, March 07, 2012 1 Sheet 85 Rev SA of 103 5 4 3D3V_VGA_S0 3 2 1 3D3V_VGA_S0 4 3 OPS VGA_LBKLT_CTL VGA_LCDVDD_EN VGA_BLEN TP8606 TP8607 TP8608 1 1 1 10KR2J-3-GP 5 3 4 SMBC_THERM 27,28 NV_VID4 NV_VID3 92 92 NV_VID1 NV_VID2 92 92 OPS 4 3 OPS 2 1 R8611 92 NV_VID5 1 2 1 PLLVDD_PWR 2 L8602 BLM18PG181SN1D-GP 1.05V ±30mV 90mA total RN8607 92 SRN10KJ-5-GP NV_VID0 2 DMN66D0LDW-7-GP SMBD_Therm_NV 3D3V_VGA_S0 OPS 1 2 N13P_GPIO12_H7 D SMBD_THERM 27,28 1 -VIDEO_THERM_OVERT -VIDEO_THERM_ALERT SCD1U10V2KX-5GP 6 2 OPS C8603 OPS C8604 OPS C8605 C8606 AD8 AE8 AD7 10KR2J-3-GP GPIO Description (DG-05587-001_v03_p.82_Tale 98) GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPU_VID4 GPU_VID3 LCD_BL_PWM LCD_VCC LCD_BLEN GPU_VID1 GPU_VID2 3D Vision OVERT ALERT MEM_VREF_CTL GPU_VID0 PWR_LEVEL GPU_VID5 HPD_AB HPD_C MEM_VDD_CTL HPD_D HPD_E HPD_F Reserved Reserved I/O Function Description NC VID_PLLVDD O O O O O O O O I/O I/O O O I O I I O I I I GPU Core VDD VID4 GPU Core VDD VID3 Panel Backlught PWM Brightness Control Panel Power Enable panel Backlight Enale GPU Core VDD VID1 GPU Core VDD VID2 3D Vision Left/Right signal Active Low Thermal Catastrophic Over Temperature Active Low Thermal Alert Memory VREF Control GPU Core VDD VID0 AC Power Detect Input. High = AC, Low = Battery GPU Core VDD VID5 Hot Plog Detect for IFPAB Hot Plog Detect for IFPC Memory VDD VID Hot Plog Detect for IFPD Hot Plog Detect for IFPE Hot Plog Detect for IFPF GF117 Under GPU TP8616 VIDEO_CLK_XTAL_SS H1 1 XTAL_SSIN XTAL_OUTBUFF J4 N12P_XTAL_OUTBUFF H2 R8602 10KR2J-3-GP 1 3D3V_VGA_S0 Normal Function PLLVDD SP_PLLVDD GF108/GKx Near GPU GPIO pin Name 15 OF 17 VGA1O 11/17 XTAL_PLL OPS C TP8621 1DACA_RSET AP8 DACA_VREF DACA_RSET I2CA_SCL I2CA_SDA VGA_CRT_DDCCLK VGA_CRT_DDCDATA R4 R5 TSEN_VREF NC NC NC DACA_HSYNC DACA_VSYNC NC DACA_RED NC DACA_GREEN NC DACA_BLUE AM9 AN9 VGA_CRT_HSYNC VGA_CRT_VSYNC 1 1 TP8611 TP8612 AK9 VGA_CRT_RED 1 TP8613 AL10 VGA_CRT_GREEN 1 TP8614 AL9 VGA_CRT_BLUE 1 TP8615 STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 J2 J7 J6 J5 J3 ROM_SI ROM_SO ROM_SCLK STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 2 2 1 X8601_GND 2 2 R8636 0R2J-2-GP 1 1 C8607 SC12P50V2JN-3GP DY OPS C8608 SC12P50V2JN-3GP OPS TABLE NVIDIA N12P-GL DEV ID: 0x0DE9 N12M-GE1 DEV ID: 0x1058 R8617 10Kohm 64.10025.6DL 30Kohm 64.30025.6DL TABLE NVIDIA N12P-GL DEV ID: 0x0DE9 N12M-GE1 DEV ID: 0x1058 C 1 1 H6 H5 H7 H4 R8624 2KR2F-3-GP R8625 10KR2F-2-GP R8626 5K1R2F-2-GP DY DY N13M-GE1 ROM_SI_H5 ROM_SO_H7 ROM_SLK_H4 R8627 15KR2F-GP BUFRST# 27MHZ_OUT_R 3 HARMORY 27MHz 12P 30PPM HSX530G 2 ROM_CS# TP8609 TP8610 1 1 27MHZ_IN 1 4 OPS 1 OPS GF108/GKx TP8617 2 NC NC R8604 0R2-PT5-LILY-GP OPS ROM_SCLK 1 OPS AP9 GF117 NC 1 1DACA_VREF GF117 2 2 TP8620 1 R8629 10KR2J-3-GP DACA_VDD 12/17 MISC2 2 1 GF108/GKx AG10 DY 1MR2J-1-GP 2 X8601 XTAL-27MHZ-46-GP X8601_GND ROM_SO 16 OF 17 VGA1P RN8601 SRN2K2J-1-GP 14 OF 17 VGA1N 4/17 DACA DACA_VDD R8603 3D3V_VGA_S0 3 4 3D3V_VGA_S0 OPS 20PF 5% 50V +/-0.25PF 0402 1 27,28,36 XTAL_OUT 2 PURE_HW_SHUTDOWN# OPS 1 D XTAL_IN 1 R8617 30KR2F-GP R8618 15KR2F-GP OPS N13P-GL R8626 DY R8618 5Kohm 64.51015.6DL 15Kohm 64.15025.6DL 2 S 2 -VIDEO_THERM_OVERT H3 N13P-GS-A1-GP OPS 2 OPS R8601 10KR2J-3-GP 1 G OPS Q8602 2N7002BK-GP 2 3V_VGA_S0_R 0R2J-2-GP OPS 2 2 1 R2813 N13P-GS-A1-GP 1 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO16 GPIO20 GPIO21 OPS 1 2 C8602 1 R8623 P6 M3 L6 P5 P7 L7 M7 N8 M1 M2 L1 M5 N3 M4 R8 P4 P1 SC22U6D3V5MX-2GP Q8601 SMBC_Therm_NV DY 1 OPS 2 R8620 10KR2J-3-GP 4 3 SRN10KJ-5-GP 1 2 OPS 1 2 JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST# 2 OPS N13P_TCK AM10 N13P_TMS AP11 N13P_TDI AM11 N13P_TDO AP12 N13P_TRST AN11 C8601 SCD1U10V2KX-5GP 2 OPS SCD1U10V2KX-5GP 1 RN8603 THERMDP 1 DY 10KR2J-3-GP PLLVDD 2 OPS 1 1 1 1 1 ( L8601 BLM18KG300TN1D-GP 2 K3 R8619 TP8603 TP8604 TP8605 1 OPS SC4D7U6D3V3KX-GP D THERMDN 1.05V ±30mV 60mA I2CA=>CRT, I2CC=>LVDS. RN8605 SRN4K7J-8-GP 1 I2CB_SCL_G3 I2CB_SDA_G2 2 K4 TP8601 I2CB_SCL I2CB_SDA 4 3 I2CC_SCL I2CC_SDA 3D3V_VGA_S0 SC22U6D3V5MX-2GP GPU_LVDS_CLK GPU_LVDS_DATA R7 R6 OPS 1 2 R2 R3 RN8604 SRN2K2J-1-GP 1 2 SMBC_Therm_NV SMBD_Therm_NV 2 1 I2CS_SCL I2CS_SDA T4 T3 RN8606 SRN2K2J-1-GP ( 3 4 1D05V_VGA_S0 17 OF 17 VGA1Q 10/19 MISC1 DY L2 B RN8602 VGA_CRT_BLUE VGA_CRT_RED VGA_CRT_GREEN 1 2 3 4 8 7 6 5 MULTI_STRAP_REF2_GND J1 MULTI_STRAP_REF0_GND CEC L3 TABLE OPS CEC_L3 R8628 SRN75J-1-GP OPS VIDEO MEMORY 3D3V_VGA_S0 R8313 40K2R2F-GP 2 OPS 1 N13P-GS-A1-GP 1 HYNIX 128Mx16 0110 SAMSUNG 128Mx16 0111 HYNIX 64Mx16 0010 Samsung 64Mx16 0011 900MHz 72.52G63.A0U 72.42164.D0U 72.51G63.H0U 72.41646.Q0U ROM_SI PD R8627 34.8Kohm 64.34825.6DL 45.3Kohm 64.45325.6DL 15Kohm 64.15025.6DL 20Kohm 64.20025.6DL 2 10KR2F-2-GP N13P-GL N13P-GS-A1-GP B OPS 3D3V_VGA_S0 TABLE NVIDIA N12P-GL DEV ID: 0x0DE9 N12M-GE1 DEV ID: 0x1058 R8632 DY DY 45Kohm 35Kohm 64.45325.6DL 64.34825.6DL 10Kohm 5Kohm 64.10025.6DL 64.51015.6DL R8314 45K3R2F-L-GP R8316 34K8R2F-1-GP DY STRAP1 DY 2 STRAP0 STRAP1 STRAP2 2 OPS 2 1 1 R8634 10KR2F-2-GP DY 2 1 R8632 34K8R2F-1-GP OPS 2 R8630 45K3R2F-L-GP 1 1 3D3V_VGA_S0 1 1 1 R8635 30KR2F-GP R8315 5K1R2F-2-GP R8317 10KR2F-2-GP DY N13M-GE1 N13M-GE1 STRAP2 STRAP3 A R8634 2 2 DY 2 OPS R8633 2 R8633 45K3R2F-L-GP 2 R8631 2KR2J-1-GP 1 1 STRAP3 STRAP4 STRAP4 R8635 DY DY R8314 DY DY R8315 DY R8316 DY R8317 DY 5Kohm 64.51015.6DL A DY 10Kohm 64.10025.6DL <Core Design> Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title N13P_GPU (4/5): GPIO/STRAP Size A1 Document Number Date: Wednesday, March 07, 2012 Rev LA480sSheet SA 86 of 103 A B C D E VIDEO FRAME BUFFER PORT A 1D5V_VGA_S0 1D5V_VGA_S0 VRAM1 A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VRAM_CH_A_ZQ_1 H1 M8 L8 VREFDQ VREFCA ZQ 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 FBA_A0 FBA_A1 FBA_A2 FBA_A3 FBA_A4 FBA_A5 FBA_A6 FBA_A7 FBA_A8 FBA_A9 FBA_A10 FBA_A11 FBA_A12 FBA_A13 FBA_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,89 85,89 Mode D-N13x 85,89 FBA_BA0 FBA_BA1 FBA_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBA_CLK0 FBA_CLK0# J7 K7 CK CK# 85 FBA_CKE0 K9 CKE FBA_DQM2 FBA_DQM3 D3 E7 DMU DML 85,89 FBA_W E# 85,89 FBA_CAS# 85,89 FBA_RAS# L3 K3 J3 WE# CAS# RAS# 4 243R2F-2-GP 2 1 FBA_VREF_0 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 FBA_D30 FBA_D28 FBA_D26 FBA_D29 FBA_D27 FBA_D31 FBA_D25 FBA_D24 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBA_D19 FBA_D23 FBA_D18 FBA_D22 FBA_D16 FBA_D21 FBA_D17 FBA_D20 DQSU DQSU# C7 B7 DQSL DQSL# F3 G3 ODT K1 OPS R8801 3 85 85 CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 VRAM2 FBA_DQS_W P2 85 FBA_DQS_RN2 85 FBA_DQS_W P3 85 FBA_DQS_RN3 85 FBA_ODT0 FBA_CS0# FBA_RST 85 85 85,89 FBA_VREF_0 243R2F-2-GP 1 VDD VDD VDD VDD VDD VDD VDD VDD VDD 85,89 VRAM_CH_A_ZQ_2 K8 K2 N1 R9 B2 D9 G7 R1 N9 VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ OPS 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 85,89 FBA_A0 FBA_A1 FBA_A2 FBA_A3 FBA_A4 FBA_A5 FBA_A6 FBA_A7 FBA_A8 FBA_A9 FBA_A10 FBA_A11 FBA_A12 FBA_A13 FBA_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,89 85,89 Mode D-N13x 85,89 FBA_BA0 FBA_BA1 FBA_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBA_CLK0 FBA_CLK0# J7 K7 CK CK# 85 FBA_CKE0 K9 CKE FBA_DQM1 FBA_DQM0 D3 E7 DMU DML 85,89 FBA_W E# 85,89 FBA_CAS# 85,89 FBA_RAS# L3 K3 J3 WE# CAS# RAS# 2 K8 K2 N1 R9 B2 D9 G7 R1 N9 FBA_D[63..0] R8802 85 85 FBA_D[63..0] DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D6 FBA_D4 FBA_D5 FBA_D7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBA_D8 FBA_D10 FBA_D11 FBA_D13 FBA_D12 FBA_D14 FBA_D9 FBA_D15 DQSU DQSU# C7 B7 FBA_DQS_W P1 85 FBA_DQS_RN1 85 DQSL DQSL# F3 G3 FBA_DQS_W P0 85 FBA_DQS_RN0 85 ODT K1 FBA_ODT0 85 CS# RESET# L2 T2 FBA_CS0# FBA_RST 85 85,89 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 85,89 4 3 H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP OPS OPS 2 2 OPS C8803 1D5V_VGA_S0 OPS C8804 OPS R8803 2 C8802 1K33R2F-GP 1 OPS SCD1U10V2KX-5GP 2 1 C8801 SCD1U10V2KX-5GP 2 1 OPS SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 1D5V_VGA_S0 C8811 OPS OPS C8812 R8804 SCD01U50V2KX-L-GP 2 1 C8810 1K33R2F-GP 1 C8809 OPS 2 C8808 OPS SC1U6D3V3KX-2GP 2 1 C8807 OPS SC1U6D3V3KX-2GP 2 1 C8806 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 C8805 SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 1 SC1U6D3V3KX-2GP 2 1 FBA_VREF_0 <Core Design> OPS C8813 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CHANNEL-A_VRAM1,2 (1/4) Close to VRAM(For VRAM1 & VRAM2) A B C D Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 88 of 103 A B C D E VIDEO FRAME BUFFER PORT A 1D5V_VGA_S0 1D5V_VGA_S0 VRAM3 FBA_D[63..0] VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VRAM_CH_A_ZQ_3 H1 M8 L8 VREFDQ VREFCA ZQ 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 FBA_A0 FBA_A1 FBA_A2 FBA_A3 FBA_A4 FBA_A5 FBA_A6 FBA_A7 FBA_A8 FBA_A9 FBA_A10 FBA_A11 FBA_A12 FBA_A13 FBA_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,88 85,88 Mode D-N13x 85,88 FBA_BA0 FBA_BA1 FBA_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBA_CLK1 FBA_CLK1# J7 K7 CK CK# 85 FBA_CKE1 K9 CKE FBA_DQM6 FBA_DQM4 D3 E7 DMU DML 85,88 FBA_W E# 85,88 FBA_CAS# 85,88 FBA_RAS# L3 K3 J3 WE# CAS# RAS# 4 243R2F-2-GP 1 FBA_VREF_1 2 R8901 3 85 85 E3 F7 F2 F8 H3 H8 G2 H7 FBA_D35 FBA_D39 FBA_D32 FBA_D36 FBA_D33 FBA_D37 FBA_D34 FBA_D38 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBA_D55 FBA_D51 FBA_D54 FBA_D48 FBA_D52 FBA_D50 FBA_D53 FBA_D49 DQSU DQSU# C7 B7 DQSL DQSL# F3 G3 ODT K1 CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 VRAM4 FBA_DQS_W P6 85 FBA_DQS_RN6 85 FBA_VREF_1 FBA_DQS_W P4 85 FBA_DQS_RN4 85 FBA_ODT1 FBA_CS1# FBA_RST VRAM_CH_A_ZQ_4 K8 K2 N1 R9 B2 D9 G7 R1 N9 VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ OPS 85 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 85,88 FBA_A0 FBA_A1 FBA_A2 FBA_A3 FBA_A4 FBA_A5 FBA_A6 FBA_A7 FBA_A8 FBA_A9 FBA_A10 FBA_A11 FBA_A12 FBA_A13 FBA_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,88 85,88 Mode D-N13x 85,88 FBA_BA0 FBA_BA1 FBA_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBA_CLK1 FBA_CLK1# J7 K7 CK CK# 85 FBA_CKE1 K9 CKE FBA_DQM7 FBA_DQM5 D3 E7 DMU DML 85,88 FBA_W E# 85,88 FBA_CAS# 85,88 FBA_RAS# L3 K3 J3 WE# CAS# RAS# 85 85,88 R8902 2 OPS DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 243R2F-2-GP 1 K8 K2 N1 R9 B2 D9 G7 R1 N9 85,88 85 85 FBA_D[63..0] DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 FBA_D47 FBA_D43 FBA_D42 FBA_D46 FBA_D40 FBA_D44 FBA_D41 FBA_D45 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBA_D61 FBA_D57 FBA_D60 FBA_D56 FBA_D62 FBA_D58 FBA_D63 FBA_D59 DQSU DQSU# C7 B7 FBA_DQS_W P7 85 FBA_DQS_RN7 85 DQSL DQSL# F3 G3 FBA_DQS_W P5 85 FBA_DQS_RN5 85 ODT K1 FBA_ODT1 85 CS# RESET# L2 T2 FBA_CS1# FBA_RST 85 85,88 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 85,88 4 3 H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP OPS OPS 2 2 OPS C8903 1D5V_VGA_S0 OPS C8904 OPS R8903 2 C8902 1K33R2F-GP 1 OPS SCD1U10V2KX-5GP 2 1 C8901 SCD1U10V2KX-5GP 2 1 OPS SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 1D5V_VGA_S0 C8911 OPS OPS C8912 R8904 SCD01U50V2KX-L-GP 2 1 C8910 1K33R2F-GP 1 C8909 OPS 2 C8908 OPS SC1U6D3V3KX-2GP 2 1 C8907 OPS SC1U6D3V3KX-2GP 2 1 C8906 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 C8905 SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 1 SC1U6D3V3KX-2GP 2 1 FBA_VREF_1 <Core Design> OPS C8913 1 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title CHANNEL-A_VRAM3,4 (2/4) Close to VRAM(For VRAM3 & VRAM4) A B C D Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 89 of 103 A B C D VIDEO FRAME BUFFER PORT C VRAM5 VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 4 243R2F-2-GP 1 FBB_VREF_0 H1 M8 L8 VRAM_CH_C_ZQ_1 VREFDQ VREFCA ZQ DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 FBB_D0 FBB_D3 FBB_D2 FBB_D1 FBB_D6 FBB_D5 FBB_D7 FBB_D4 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBB_D13 FBB_D11 FBB_D14 FBB_D10 FBB_D12 FBB_D8 FBB_D15 FBB_D9 DQSU DQSU# C7 B7 DQSL DQSL# F3 G3 ODT K1 FBB_ODT0 85 CS# RESET# L2 T2 FBB_CS0# FBB_RST 85 85,91 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 OPS 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 FBB_A0 FBB_A1 FBB_A2 FBB_A3 FBB_A4 FBB_A5 FBB_A6 FBB_A7 FBB_A8 FBB_A9 FBB_A10 FBB_A11 FBB_A12 FBB_A13 FBB_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,91 85,91 Mode D-N13x 85,91 FBB_BA0 FBB_BA1 FBB_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBB_CLK0 FBB_CLK0# J7 K7 CK CK# 85 FBB_CKE0 K9 2 R9001 3 CKE FBB_DQM1 FBB_DQM0 D3 E7 DMU DML 85,91 FBB_W E# 85,91 FBB_CAS# 85,91 FBB_RAS# L3 K3 J3 WE# CAS# RAS# 85 85 1D5V_VGA_S0 85,91 FBB_DQS_W P1 85 FBB_DQS_RN1 85 FBB_VREF_0 VRAM_CH_C_ZQ_2 FBB_DQS_W P0 85 FBB_DQS_RN0 85 243R2F-2-GP 1 K8 K2 N1 R9 B2 D9 G7 R1 N9 FBB_D[63..0] VRAM6 K8 K2 N1 R9 B2 D9 G7 R1 N9 VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ FBB_D[63..0] OPS 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 85,91 FBB_A0 FBB_A1 FBB_A2 FBB_A3 FBB_A4 FBB_A5 FBB_A6 FBB_A7 FBB_A8 FBB_A9 FBB_A10 FBB_A11 FBB_A12 FBB_A13 FBB_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,91 85,91 Mode D-N13x 85,91 FBB_BA0 FBB_BA1 FBB_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBB_CLK0 FBB_CLK0# J7 K7 CK CK# 85 FBB_CKE0 K9 CKE 85 85 FBB_DQM3 FBB_DQM2 D3 E7 DMU DML 85,91 FBB_W E# 85,91 FBB_CAS# 85,91 FBB_RAS# L3 K3 J3 WE# CAS# RAS# R9002 2 1D5V_VGA_S0 E DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 FBB_D18 FBB_D20 FBB_D16 FBB_D17 FBB_D21 FBB_D22 FBB_D19 FBB_D23 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBB_D24 FBB_D28 FBB_D29 FBB_D25 FBB_D30 FBB_D26 FBB_D31 FBB_D27 DQSU DQSU# C7 B7 FBB_DQS_W P3 85 FBB_DQS_RN3 85 DQSL DQSL# F3 G3 FBB_DQS_W P2 85 FBB_DQS_RN2 85 ODT K1 FBB_ODT0 85 CS# RESET# L2 T2 FBB_CS0# FBB_RST 85 85,91 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 85,91 4 3 H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP OPS OPS 2 2 OPS C9003 1D5V_VGA_S0 OPS C9004 OPS R9003 2 C9002 1K33R2F-GP 1 OPS SCD1U10V2KX-5GP 2 1 C9001 SCD1U10V2KX-5GP 2 1 OPS SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 1D5V_VGA_S0 C9011 OPS OPS C9012 R9004 SCD01U50V2KX-L-GP 2 1 C9010 1K33R2F-GP 1 C9009 OPS 2 C9008 OPS SC1U6D3V3KX-2GP 2 1 C9007 OPS SC1U6D3V3KX-2GP 2 1 C9006 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 C9005 SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 1 SC1U6D3V3KX-2GP 2 1 FBB_VREF_0 <Core Design> OPS C9013 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Close to VRAM(For VRAM5 & VRAM6) A B C 1 D CHANNEL-C_VRAM5,6 (3/4) Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 90 of 103 B 1D5V_VGA_S0 VRAM7 K8 K2 N1 R9 B2 D9 G7 R1 N9 4 243R2F-2-GP 1 FBB_VREF_1 VRAM_CH_C_ZQ_3 FBB_D[63..0] VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ OPS 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 FBB_A0 FBB_A1 FBB_A2 FBB_A3 FBB_A4 FBB_A5 FBB_A6 FBB_A7 FBB_A8 FBB_A9 FBB_A10 FBB_A11 FBB_A12 FBB_A13 FBB_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,90 85,90 Mode D-N13x 85,90 FBB_BA0 FBB_BA1 FBB_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBB_CLK1 FBB_CLK1# J7 K7 CK CK# 85 FBB_CKE1 K9 CKE 2 R9101 3 FBB_DQM6 FBB_DQM4 D3 E7 DMU DML 85,90 FBB_W E# 85,90 FBB_CAS# 85,90 FBB_RAS# L3 K3 J3 WE# CAS# RAS# 85 85 C DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 FBB_D33 FBB_D38 FBB_D35 FBB_D39 FBB_D34 FBB_D37 FBB_D32 FBB_D36 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBB_D53 FBB_D49 FBB_D54 FBB_D51 FBB_D52 FBB_D50 FBB_D55 FBB_D48 DQSU DQSU# C7 B7 FBB_DQS_W P6 85 FBB_DQS_RN6 85 DQSL DQSL# F3 G3 FBB_DQS_W P4 85 FBB_DQS_RN4 85 ODT K1 CS# RESET# L2 T2 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 D 1D5V_VGA_S0 85,90 FBB_ODT1 FBB_CS1# FBB_RST FBB_VREF_1 VRAM_CH_C_ZQ_4 85 FBB_D[63..0] VDD VDD VDD VDD VDD VDD VDD VDD VDD A8 A1 C1 C9 D2 E9 F1 H9 H2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ H1 M8 L8 VREFDQ VREFCA ZQ OPS 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 85,90 FBB_A0 FBB_A1 FBB_A2 FBB_A3 FBB_A4 FBB_A5 FBB_A6 FBB_A7 FBB_A8 FBB_A9 FBB_A10 FBB_A11 FBB_A12 FBB_A13 FBB_A15 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15 FB CMD mapping85,90 85,90 Mode D-N13x 85,90 FBB_BA0 FBB_BA1 FBB_BA2 M2 N8 M3 BA0 BA1 BA2 85 85 FBB_CLK1 FBB_CLK1# J7 K7 CK CK# 85 FBB_CKE1 K9 CKE 85 85 FBB_DQM5 FBB_DQM7 D3 E7 DMU DML 85,90 FBB_W E# 85,90 FBB_CAS# 85,90 FBB_RAS# L3 K3 J3 WE# CAS# RAS# 85 85,90 R9102 E VRAM8 K8 K2 N1 R9 B2 D9 G7 R1 N9 VIDEO FRAME BUFFER PORT C 243R2F-2-GP 2 1 A DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 E3 F7 F2 F8 H3 H8 G2 H7 FBB_D57 FBB_D61 FBB_D56 FBB_D62 FBB_D60 FBB_D63 FBB_D58 FBB_D59 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 D7 C3 C8 C2 A7 A2 B8 A3 FBB_D47 FBB_D41 FBB_D46 FBB_D42 FBB_D45 FBB_D40 FBB_D44 FBB_D43 DQSU DQSU# C7 B7 FBB_DQS_W P5 85 FBB_DQS_RN5 85 DQSL DQSL# F3 G3 FBB_DQS_W P7 85 FBB_DQS_RN7 85 ODT K1 FBB_ODT1 85 CS# RESET# L2 T2 FBB_CS1# FBB_RST 85 85,90 NC#T7 NC#L9 NC#L1 NC#J9 NC#J1 T7 L9 L1 J9 J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ G1 F9 E8 E2 D8 D1 B9 B1 G9 85,90 4 3 H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP OPS OPS 2 2 OPS C9103 1D5V_VGA_S0 OPS C9104 OPS R9103 2 C9102 1K33R2F-GP 1 OPS SCD1U10V2KX-5GP 2 1 C9101 SCD1U10V2KX-5GP 2 1 OPS SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 1D5V_VGA_S0 C9111 OPS OPS C9112 R9104 SCD01U50V2KX-L-GP 2 1 C9110 1K33R2F-GP 1 C9109 OPS 2 C9108 OPS SC1U6D3V3KX-2GP 2 1 C9107 OPS SC1U6D3V3KX-2GP 2 1 C9106 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 C9105 SC1U6D3V3KX-2GP 2 1 OPS SC1U6D3V3KX-2GP 2 1 1 SC1U6D3V3KX-2GP 2 1 FBB_VREF_1 <Core Design> OPS C9113 Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Close to VRAM(For VRAM7 & VRAM8) A B C 1 D CHANNEL-C_VRAM7,8 (4/4) Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 91 of 103 5 4 3 2 1 SSID = PWR.Plane.Regulator_GFX DCBATOUT 2nd source OPS PC9204 PC9205 VGA_CSP1_R 2 1 PR9201 30K9R2F-GP PWR_VGA_CORE_PN1 OPS 2 1 OPS OPS PR9204 NTC-150K-GP 2 3 4 10 9 D VGA_CSN1_R 2 1 SCD012U25V2KX-GP 2 PR9203 76K8R2F-GP PU9202 BOM control PC9201 OPS PR9202 42K2R2F-L-GP 2 OPS 1 1 1 2 2 2 2 SC10U25V6KX-L3-GP 84.00038.A37 RJK03P8DPA SC10U25V6KX-L3-GP 84.03660.037 FDMS3660S PU9206 SC10U25V5KX-GP D 1 OPS PC9203 1 DY PC9202 SCD01U50V2KX-L-GP 84.00038.A37 RJK03P8DPA 1 OPS 1 Main source 84.03660.037 FDMS3660S PU9202 7 6 5 2 8 FDMS3600-02-RJK0215-COLAY-GP 1 84.03606.037 PWR_VGA_CORE_V5FILT PG9213 GAP-CLOSE-PWR-3-GP OPS 2 2 3D3V_VGA_S0 3D3V_VGA_S0 C 1 OPS 1 OPS 1 COIL-D36UH-5-GP DY PC9206 SC1U10V3KX-4GP-U PC9207 SC470P50V2KX-3GP OPS PT9202 2 2 PR9209 2D2R2J-GP 2 PWR_VGA_CORE_TER1 PR9212 2D2R3J-2-GP 2 DY PWR_VGA_CORE_LGATE1 C PWR_VGA_CORE_AGND 2 PR9213 56R2F-1-GP 2 1 PWR_VGA_CORE_V5FILT 1 2 1 2 1 2 1 2 PWR_VGA_CORE_THRM 8 7 6 5 OPS 1 2 COIL-D36UH-5-GP 2 41 OPS TPS51728RHAR-GP 1 PR9244 2 OPS 2 OPS 1 PC9216 SC470P50V2KX-3GP PWR_VGA_CORE_TER2 DY DY PWR_VGA_CORE_THRM_R 2KR2F-3-GP PWR_VGA_CORE_AGND PR9242 2D2R3J-2-GP PT9203 PWR_VGA_CORE_LGATE2 1 PWR_VGA_CORE_AGND PWR_VGA_CORE_AGND 1 OPS PC9220 SC3300P50V2KX-1GP 1 2 PR9250 30K9R2F-GP PWR_VGA_CORE_VREF 1 OPS SCD012U25V2KX-GP OPS 2 2 OPS VGA_VREF_L 76K8R2F-GP 1 1 PC9219 OPS OPS PWR_VGA_CORE_PN2 PR9247 1 42K2R2F-L-GP DY PR9248 9K09R2F-GP PR9246 1 2 PR9254 0R0402-PAD-1-GP PR9251 0R2J-2-GP 2 DY 2 OPS PC9218 2 1 PR9240 2 1 PR9253 124KR2F-GP PWR_VGA_CORE_SLP B VGA_CSN2_R PWR_VGA_CORE_SLEW DYPR9252 0R2J-2-GP OPS 2 PWR_VGA_CORE_VBST2 2 PC9215 SC1U10V3KX-4GP-U 1 GND GND 25 OPS 2VGA_VBST2_R 1 OPS 2D2R2J-GP 2 PR9225 1 1 PGND VGA_CORE PL9202 84.03606.037 1 SLP PCNT EN SLEW 1 DY PC9224 SC330P50V2KX-3GP PWR_VGA_CORE_CSN2 2 1 PC9223 SC330P50V2KX-3GP PWR_VGA_CORE_CSP2 2 1 PC9222 SC330P50V2KX-3GP PWR_VGA_CORE_CSN1 2 1 PR9255 DY 9 1 9 22,93 PWR_VGA_CORE_UGATE2 SC220P50V2KX-3GP DY PU PWR_VGA_CORE_VREF PC9221 SC330P50V2KX-3GP PWR_VGA_CORE_CSP1 2 1 PR9249 0R0402-PAD-1-GP 1 2 PWR_VGA_CORE_LL1 PWR_VGA_CORE_LL2 2 3 4 10 NTC-150K-GP 3D3V_VGA_S0 THRM GFB VFB 12 13 35 37 23 28 DGPU_PWROK PWR_VGA_CORE_DROOP 1 1 OPS LL1 LL2 CSP2 CSN2 7 8 PWR_VGA_CORE_THAL# PWR_VGA_CORE_IMON PWR_VGA_CORE_OSRSEL FDMS3600-02-RJK0215-COLAY-GP CSP1 CSN1 3 4 10 11 32 33 34 39 1 2 OPS PC9225 SCD1U25V3KX-GP 2 B 6 5 THAL# IMON OSRSEL PGD PG# DROOP PU9206 30 27 Design Current = 30A 45A< OCP< 54A SE470U2VDM-6-GP PWR_VGA_CORE_VR_ON 2 10KR2J-3-GP PWR_VGA_CORE_AGND VID0 VID1 VID2 VID3 VID4 VID5 VID6 21 24 OPS PC9213 GAP-CLOSE-PWR-3-GP PWR_VGA_CORE_GFB 2 0R0402-PAD-1-GP PWR_VGA_CORE_VFB 2 0R0402-PAD-1-GP SC3300P50V2KX-1GP OPS2 OPS 2 11K8R2F-GP DRVH2 DRVL2 DY PC9212 2 PWR_VGA_CORE_CSP2 2 0R0402-PAD-1-GP PWR_VGA_CORE_CSN2 2 0R0402-PAD-1-GP 1 1 PR9239 1 PR9241 1 PC9217 1 PR9243 1 DRVH1 DRVL1 VREF OPS PC9210 PC9211 PG9211 PR9256 1 PWR_VGA_CORE_CSP1 2 0R0402-PAD-1-GP PWR_VGA_CORE_CSN1 2 0R0402-PAD-1-GP 1 1 VBST1 VBST2 20 19 18 17 16 15 14 OPS PWR_VGA_CORE_VREF 2 PWR_VGA_CORE_IMON PR9236 PR9237 PWR_VGA_CORE_VID0 PWR_VGA_CORE_VID1 PWR_VGA_CORE_VID2 PWR_VGA_CORE_VID3 PWR_VGA_CORE_VID4 PWR_VGA_CORE_VID5 PWR_VGA_CORE_VID6 OPS 1 83 NVGND_SENSE 83 NVVDD_SENSE 3D3V_VGA_S0 40 31 36 2 VGA_CSP2_R VGA_CSN2_R OPS PR9226 PR9227 22 29 PWR_VGA_CORE_VREF 2 DY VGA_CSP1_R VGA_CSN1_R PR9235 10KR2J-3-GP 2 1 N13M-GE1 PR9234 10KR2J-3-GP 2 1 OPS N13P-GL PR9233 10KR2J-3-GP 2 1 OPS N13M-GE1 PWR_VGA_CORE_VBST1 PWR_VGA_CORE_VBST2 TRIPSEL TONSEL PR9238 OPS PWR_VGA_CORE_AGND 0R0402-PAD-1-GP 0R0402-PAD-1-GP 0R0402-PAD-1-GP 0R0402-PAD-1-GP 0R0402-PAD-1-GP 0R0402-PAD-1-GP PR9232 10KR2J-3-GP 2 1 2 2 2 2 2 2 PR9231 10KR2J-3-GP 2 1 1 1 1 1 1 1 PR9230 10KR2J-3-GP 2 1 PR9221 PR9222 PR9223 PR9224 PR9257 PR9258 PR9229 10KR2J-3-GP 2 1 NV_VID0 NV_VID1 NV_VID2 NV_VID3 NV_VID4 NV_VID5 2 SCD22U10V2KX-1GP V5IN V5FILT NTC-150K-GP OPS PC9214 1 26 PWR_VGA_CORE_V5FILT 38 1 2 SC2D2U10V3KX-1GP 2 SC2D2U10V3KX-1GP PWR_VGA_CORE_PCNT PC9208 1 PC9209 1 2 PR9220 10KR2J-3-GP 2 1 PR9219 10KR2J-3-GP 2 1 PR9218 10KR2J-3-GP 2 1 N13M-GE1 PU9201 OPS DY SC10U25V6KX-L3-GP N13P-GL OPS SC10U25V5KX-GP PR9217 10KR2J-3-GP 2 1 N13P-GL DCBATOUT SC10U25V6KX-L3-GP PR9216 10KR2J-3-GP 2 1 DY 5V_S0 SCD01U50V2KX-L-GP PR9214 10KR2J-3-GP 2 1 DY PR9215 10KR2J-3-GP 2 1 PWR_VGA_CORE_TRIPSEL VID[6..0] N13M-GE1 0110000 = 0.9 86 86 86 86 86 86 2 VGA_VBST1_R 1 1 1 PR9208 0R2J-2-GP DY PR9211 1 2 0R0402-PAD-1-GP 2 PR9207 1 2 PR9210 0R2J-2-GP 1 DY 1 SE470U2VDM-6-GP VID[6..0] N13P-GL 0101100 = 0.95 VGA_CORE PWR_VGA_CORE_UGATE1 PWR_VGA_CORE_VBST1 0R0402-PAD-1-GP PL9201 VGA_CSP2_R OPS OPS 0R0402-PAD-1-GP PWR_VGA_CORE_AGND PWR_VGA_CORE_AGND 3D3V_VGA_S0 A 1 A PR9228 10KR2J-3-GP 2 OPS <Core Design> DGPU_PWROK Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title TPS51728_VGA_CORE Size Document Number Date: Tuesday, March 06, 2012 Rev LA480s 5 4 3 2 Sheet 1 SA 92 of 103 5 4 3 2 +3VS to 3.3V_DELAY Transfer 2 0R5J-5-GP 1D5V_S3 AO4494L-GP 2 G R9302 100KR2J-1-GP 1D05V_VTT check layout 1 TC9301 SE330U2VDM-L-GP OPS 8 7 6 5 C9302 SCD1U16V2KX-L-GP 1D05V_VGA_S0 3.6A U9302 S 1 S 2 S 3 G 4 D D D D D OPS AO4468-GP OPS OPS 2 1 2 3 4 2 1 OPS D D D D 1 C9301 SC10U6D3V3MX-GP OPS U9301 S S S G 2 D 8 7 6 5 1 S 3D3V_S0 1D5V_VGA_S0 3D3V_VGA_S0 Q9302 AO3419L-GP D 1.05V to 1.05V_VGA_S0 Transfer 1D5V_VGA_S0 DY 1 R9301 1 OPS 3.3V_ALW _1 G OPS OPS OPS C9305 SCD1U25V3KX-GP OPS R9307 5K1R2F-2-GP 2 OPS 2 1 C9303 SCD1U25V3KX-GP R9309 29K4R2F-GP 1 2 RUNON_R_2 DIS_EN_1D5_RUN 22,92 DGPU_PW ROK R9310 0R2-PT5-LILY-GP 1 2 Q9304 2N7002BK-GP DGPU_PW ROK_R C Q9307 2N7002BK-GP OPS G 1D5V_VGA_S0 VGA_CORE 1 1 1D05V_VGA_S0 DIS_EN_1D5_RUN 2 4 3 DIS_FBVDD_L 2 Q9308 DMN66D0LDW -7-GP OPS OPS S DIS_EN_1D5_RUN 1 G B OPS 5 6 D Q9712 2N7002BK-GP R9312 110R2F-GP OPS 2 B 1 R9311 110R2F-GP OPS 2 R9712 100KR2J-1-GP 2 DY S C9304 SCD1U10V2KX-4GP OPS S 1 Q9305 2N7002BK-GP OPS G 2 D D 1 DY R9313 0R2J-2-GP D 3D3V_VGA_S0 OPS D9301 OPS OPS RUNON_R DIS_1D05V_NV_L S C9308 SCD1U16V2KX-L-GP 2 DGPU_PWR_EN 18 DGPU_PW R_EN# G C OPS 2 DIS_EN_1D5_RUN_R 330KR2J-L1-GP OPS R9306 100KR2J-1-GP 1 OPS 2 R9308 20KR2F-L-GP 3D3V_S0 1 R9305 Q9303 NDS0610-G-GP 1 3.3V_RUN_VGA_1 R9303 5K1R2F-2-GP 1 2 RUNON_R 1 D 2 S 1 OPS 2DIS_EN_1D5 10KR2J-3-GP 3 2 1 2 OPS 1 R9314 MMPZ5239BGP-GP A K OPS 2 R9304 100R2J-2-GP Q9301 DMN66D0LDW -7-GP 1 4 5 6 1 RUNON_R_1 DCBATOUT <Core Design> A A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title 5 4 3 2 DISCRETE VGA POWER Size A3 Document Number Date: Tuesday, March 06, 2012 Rev LA480s SA Sheet 1 93 of 103 5 4 3 2 1 D D C BLANK C B B <Core Design> Wistron Corporation A 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title <Title> Size A4 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 94 of 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Reserved Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 95 of 1 103 A 5 4 3 2 1 D D C C BLANK B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title TOUCH PANEL Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 96 of 1 103 A 5 4 3 2 CPU Plate MINI PCIE ZZ.SCREW.091 ZZ.SCREW.091 H16 HOLE315R95-GP H17 HOLE315R95-GP H18 HOLE315R95-GP HS1 STF256R89H178-GP HS2 STF256R89H178-GP KN1.PAD.01 KN1.PAD.01 ZZ.00PAD.911 ZZ.00PAD.911 34.4B417.001 34.4B417.001 3D3V_S0 1 AFTP9701 3D3V_AUX_S5 1 AFTP9702 3D3V_S5 1 AFTP9703 5V_S5 1 AFTP9704 1 AFTP9705 1 AFTP9706 1 AFTP9707 1 AFTP9708 1 1 1 1 1 1 1 D 1 1 ZZ.SCREW.091 Check test point H15 HOLE315R95-GP 1 H1 H2 H3 H4 HOLET157B276R134-GP HOLET157B276R134-GP HOLET157B276R134-GP HOLET157B276R134-GP ZZ.SCREW.091 1 19,27 PM_PW RBTN# 5,22 H_CPUPW RGD 27,36 S5_ENABLE H5 H6 H7 HOLET157B276R134-GP HOLET157B276R134-GP HOLET157B276R134-GP H8 HOLE315R95-GP H9 HOLE315R95-GP H10 H11 H12 H13 H14 HOLE315R95-GP HOLE315R95-GP HOLE315R95-GP HOLE315R95-GP HOLE315R95-GP ZZ.SCREW.091 ZZ.00PAD.911 ZZ.00PAD.911 ZZ.00PAD.911 ZZ.00PAD.911 ZZ.00PAD.911 ZZ.00PAD.911 ZZ.00PAD.911 PLT_RST# Test Point放 放放Dimm Door打 打打打打打打 1 1 1 1 1 1 1 1 ZZ.SCREW.091 1 1 ZZ.SCREW.091 5,18,27,31,32,36,65,66,71,77,80,83 CM.PAD.2 CM.PAD.2 CM.PAD.2 CM.PAD.2 CM.PAD.2 H19 HOLE315R95-GP H20 HOLE315R95-GP EDGE13.SCREW.001 EDGE13.SCREW.002 R9704 100R2J-2-GP EC3 DY EC4 Q9704 2N7002BK-GP DY 3D3V_S0 Q9705 2N7002BK-GP DY PS_S3CNTRL DY PS_S3CNTRL G G S DCBATOUT For RF Team C D DY SCD1U10V2KX-5GP 2 1 EC2 SCD1U10V2KX-5GP 2 1 DY SCD1U10V2KX-5GP 2 1 SCD1U10V2KX-5GP 2 1 1 1 1 1 1 1 EC1 DY 3D3V_RUNPWR 5V_S5 C R9705 100R2J-2-GP DY For EMI Team 2 H25 HOLE315R95-GP 5V_RUNPWR H24 HOLE315R95-GP D H23 HOLE315R95-GP S H22 HOLE315R95-GP 2 H21 HOLE315R95-GP 1 5V_S0 1 3D3V_S0 1 D 5V_S5 PS_S3CNTRL G 1D5V_S3_RUNPWR2 DY DY G G <Core Design> A G Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. S S S S PS_S3CNTRL S 36,37 PS_S3CNTRL S 19,27,46 PM_SLP_S4# 1 1 1 Q9711 2N7002BK-GP DY G Q9701 2N7002BK-GP DY D D Q9710 2N7002BK-GP DY R9711 100R2J-2-GP DY PM_SLP_S4 DY PS_S3CNTRL R9710 100KR2J-1-GP B R9701 100R2J-2-GP D DY 1D05V_VTT EC9705 1D5V_S3 2 1 EC9704 2 1 2 1 2 1D8V_RUNPWR 1D05V_RUNPWR 2 DY G 2 1 PS_S3CNTRL G Q9702 2N7002BK-GP D 2 D Q9709 2N7002BK-GP DY S PS_S3CNTRL 1 1 1 2 D DY A DY DY GFX_RUNPWR Q9707 2N7002BK-GP DCBATOUT SCD1U25V2KX-GP DY CORE_RUNPWR Q9706 2N7002BK-GP R9702 100R2J-2-GP R9709 100R2J-2-GP EC9703 SCD1U25V2KX-GP DY DY 3D3V_S5 EC9702 SCD1U25V2KX-GP R9707 100R2J-2-GP EC9 1D8V_S0 VCCSA SCD1U25V2KX-GP R9706 100R2J-2-GP DY For Discharge AD+ VCC_GFXCORE VCC_CORE EC10 2 DY VTT_RUNPWR EC8 D DY 1 EC7 2 DY SCD1U10V2KX-5GP 2 1 EC6 SCD1U10V2KX-5GP 2 1 DY SCD1U10V2KX-5GP 2 1 DY EC5 SCD1U10V2KX-5GP 2 1 RFC9 SCD1U10V2KX-5GP 2 1 DY SCD1U10V2KX-5GP 2 1 DY RFC8 SCD1U10V2KX-5GP 2 1 DY RFC7 SCD1U10V2KX-5GP 2 1 DY DY RFC6 SCD1U10V2KX-5GP 2 1 RFC4 RFC5 SCD1U10V2KX-5GP 2 1 DY SCD1U10V2KX-5GP 2 1 DY RFC3 SCD1U10V2KX-5GP 2 1 DY RFC2 SCD1U10V2KX-5GP 2 1 RFC1 SCD1U10V2KX-5GP 2 1 B SCD1U10V2KX-5GP 2 1 1D05V_VTT Title UNUSED PARTS/EMI Capacitors 5 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 97 of 103 5 4 3 2 1 D D (Blanking) C C B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Change History Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 98 of 1 103 A 5 4 2 1 red word: KBC GPIO red word: PCH / CPU (AC mode) RTC_AUX_S5 3 t01 >9ms RTC_RST# (AC IN) D D DCBATOUT 3D3V_AUX_S5 KBC GPIO34 S5_ENABLE 3D3V_S5 / 5V_S5 3V_5V_POK KBC GPIO43 RSMRST#_KBC >10ms t05 t06 <200ms SUS_PWR_ACK (SUSPWRDNACK) PCH_SUSCLK_KBC (SUSCLK) t07 >5ms AC_PRESENT (ACPRESENT) t08 <90ms >16ms PM_PWRBTN# (PWRBTN #) PM_SLP_S4# (SLP_S4#) C C PM_SLP_S3# (SLP_S3#) t10 >30us USE PM_SLP_S4# TO ENABLE 1D5V_S3 * DDR_VREF_S3 USE PM_SLP_S3# TO ENABLE 5V_S0 3D3V_S0 1D8V_S0 * 1D5V_S0 USE RUNPWROK TO ENABLE 1D05V_VTT USE 1.05VTT_PWRGD TO ENABLE 0D85V_S0 (VCCSA) KBC GPIO77 t14 >99ms When asserted, it indicates to PCH that its CORE well power is stable. It is asserted by EC when all non-CORE power rails are stable and wait >99ms. S0_PWR_GOOD (PWROK) PM_DRAM_PWRGD (DRAMPWROK) H_CPUPWRGD (UNCOREPWRGOOD) t20 >2ms t14 <650ms USE D85V_PWRGD TO ENABLE VCC_CORE (CPU) B B IMVP_PWRGD PLT_RST# (PLTRST # ) t25 <100ms A A <Core Design> Wistron Corporation 21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih, Taipei Hsien 221, Taiwan, R.O.C Title <Title> 5 4 3 2 Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s 1 Sheet 99 of 103 5 4 -4 3 2 1 -3 Adapter DCBATOUT 38 D PU4201 TPS51640RSLR AO4407A 42,43,44 Charger PU4003 BQ24737RGRR PU4501 TPS51219RTER PU4601 RT8207M 45 46 7 VCC_CORE 2 VCC_GFXCORE 2 1D05V_S0 DDR_VREF_S3 2 1D5V_S3 PU9201 TPS51728RHAR F4902 POLY 24V/3A 92 92 PU4801 TPS51461RGER D 92 3 0D75V_S0 VGA_CORE DCBATOUT_LCD 0D85V_S0 +PBATT Battery 39 40 U9305 AO4494L(MOS) U3606 AO4468-GP(MOS) 93 93 5 1D5V_VGA_S0 1D5V_S0 PU4103 TPS51225RUKR 0 41 C -2 3D3V_AUX_S5 5V_AUX_S5 5V_S5 U5703 G5461A2P1UF R2725 27 C -1 3D3V_S5 U6102 UP7534BRA8-15 U2 TPS2541RTER 57 U3601 AO4468(MOS) 36 R6010 93 36 -2 PU4701 RT8068AZQW U3602 AO4468(MOS) 36 1 3D3V_AUX_KBC 5V_USB4_S3 5V_USB1_S3 5V_USB3_S3 5V_S0 3D3V_SPI 1D8V_S0 3D3V_S0 PQ9302 DMP2130L-7(MOS) 5V_USB2_S3 49 U4901 RT9724GB 93 B B 3D3V_VGA_S0 A LCDVDD A <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Power Block Diagram 5 4 3 2 Size A3 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet 1 100 of 103 A B PCH SMBus Block Diagram C 3D3V_S5 3D3V_S0 ‧ ‧ D E KBC SMBus Block Diagram 5V_S0 ‧ 3D3V_S0 SRN2K2J-1-GP SRN2K2J-1-GP ‧ 1 SMBCLK SMB_CLK SMBDATA SMB_DATA DIMM 1 ‧ ‧ ‧PCH_SMBCLK ‧ PCH_SMBDATA SRN10KJ-5-GP 1 TouchPad Conn. SCL SRN100J-3-GP SDA 3D3V_S5 SMBus Address:A0 GPIO35/PSDAT1 TPDATA GPIO37/PSCLK1 TPCLK ‧ ‧ TPDATA TPDATA TPCLK TPCLK 2N7002SPT 3D3V_AUX_KBC ‧ DIMM 2 SRN2K2J-8-GP ‧PCH_SMBCLK ‧ PCH_SMBDATA 3D3V_S5 SML1CLK/GPIO58 SML1_CLK SML1DATA/GPIO75 SML1_DATA ‧ To KBC & eDP ‧ SCL SDA SRN4K7J-8-GP SMBus Address:A4 SRN2K2J-1-GP SML0CLK SML0_CLK SML0DATA SML0_DATA ‧ ‧ PCH_SMBDATA PCH_SMBCLK 3D3V_S0 ‧ PCH SRN2K2J-1-GP PCH_SMBCLK UMA 2 PCH_SMBDATA SDVO_CTRLCLK SDVO_CTRLDATA GPIO17/SCL1/N2TCK BAT_SCL BATA_SCL_1 CLK_SMB GPIO22/SDA1/N2TMS BAT_SDA BATA_SDA_1 DAT_SMB PCH_HDMI_DATA SMBus address:16 SMB_CLK SMB_DATA Minicard W-WAN BQ24737 KBC NPCE855 SDA SCL SMB_CLK SCL SMB_DATA SDA IO Board Connector PCH_HDMI_CLK Battery Conn. SRN33J-7-GP Minicard WLAN SMBus address:12 3D3V_S0 2 PCH ‧ 3D3V_S0 SRN10KJ-5-GP ‧ 3D3V_S0 Thermal IC ‧ ‧ ‧ SMBC_THERM SMCLK SMBD_THERM SMDATA SMBus address:XX SRN2K2J-1-GP UMA L_DDC_CLK L_DDC_DATA CRT_DDC_CLK CRT_DDC_DATA LCD Connector LVDS_DDC_CLK_R LVDS_DDC_DATA_R GPIO73/SCL2 SML1_CLK GPIO74/SDA2 SML1_DATA ‧ DMN66D0LDW-7-GP ‧ IO Board Connector CRT_DDC_CLK CRT_DDC_DATA 3 3 3D3V_VGA_S0 ‧ SRN2K2J-1-GP DIS I2CC_SCL GPU_LVDS_CLK I2CC_SDA GPU_LVDS_DATA VGA 3D3V_VGA_S0 ‧ SRN2K2J-1-GP DIS I2CA_SCL VGA_CRT_DDCCLK I2CA_SDA VGA_CRT_DDCDATA 4 4 <Core Design> Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title SMBUS Block Diagram A B C D Size A2 Document Number Date: Tuesday, March 06, 2012 Rev SA LA480s Sheet E 101 of 103 A B C D Thermal Block Diagram E Audio Block Diagram 1 1 SPKR_PORT_D_LPAGE28 DXP P2800_DXP SPEAKER SPKR_PORT_D_R+ MMBT3904-3-GP SC2200P50V2KX-2GP UMA Thermal P2800 DXN P2800_DXN Codec 92HD79B1 Place near CPU PWM CORE HP OUT HP1_PORT_B_L HP1_PORT_B_R MMBT3904-3-GP GPIO5 PAGE27 KBC NPCE795P GPIO92 2 SYS_THRM TDR CPU_THRM TDL T8 OTZ THERM_SYS_SHDN# 2N7002 PURE_HW_SHUTDOWN# D S Put under CPU(T8 HW shutdown) GPIO4 GPIO94 GPIO56 VGA_THRM EN IMVP_PWRGD G 2 VR TDR MIC IN HP0_PORT_A_L PAGE28 HP0_PORT_A_R P2800_VGA_DXP DXP THRMDA VREFOUT_A_OR_F FAN_TACH1 FAN1_DAC 3V/5V PGOD TACH FAN VGA Thermal P2800 SC2200P50V2KX-2GP SC2200P50V2KX-2GP VGA P2800_VGA_DXN THRMDC DXN Place near GPU(DISCRETE only). MMBT3904-3-GP Digital MIC DMIC_CLK/GPIO1 VIN 5V DMIC0/GPIO2 3 3 PH VIN OTZ VSET VOUT FAN CONTROL P2793 PORTC_L PAGE28 Analog MIC PORTC_R VREFOUT_C <Core Design> 4 4 Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Thermal/Audio Block Diagram Size Custom Date: A B C D Document Number LA480s Tuesday, March 06, 2012 Rev SA Sheet E 102 of 103 5 4 3 2 1 D D C C (Blanking) B B <Core Design> Wistron Corporation A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Change History Size A4 Document Number LA480s Tuesday, March 06, 2012 Date: 5 4 3 2 Rev SA Sheet 103 1 of 103 A www.s-manuals.com </pre><hr>Source Exif Data: <br /><pre>File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.6 Linearized : No XMP Toolkit : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39 Producer : A-PDF Watermark 4.7.6 Modify Date : 2016:02:21 13:20:34+02:00 Create Date : 2012:03:07 14:42:07+08:00 Creator Tool : PDFCreator Version 0.9.6 Metadata Date : 2016:02:21 13:20:34+02:00 Document ID : ae47463c-6a7e-11e1-0000-62edeaa19b69 Instance ID : uuid:610b8060-432c-44f8-be33-cb35d3e34b42 Format : application/pdf Title : Wistron LA480s - Schematics. www.s-manuals.com. Creator : Description : Subject : Wistron LA480s - Schematics. www.s-manuals.com. Chinafix 0020logo : {60A4CF8B-5862-4B1F-B00A-E19E4DA66CFE} Chinafix 3 : {0FF857BB-7E17-40EC-A249-72E257A1795B} Has XFA : No Page Count : 100 Chinafix Logo : {60A4CF8B-5862-4B1F-B00A-E19E4DA66CFE} Keywords : Wistron, LA480s, -, Schematics., www.s-manuals.com. </pre> <small>EXIF Metadata provided by <a href="https://exif.tools/">EXIF.tools</a></small> <div id="ezoic-pub-ad-placeholder-110"> <script async src="//pagead2.googlesyndication.com/pagead/js/adsbygoogle.js"></script> <!-- usermanual link ad --> <ins class="adsbygoogle" style="display:block" data-ad-client="ca-pub-0545639743190253" data-ad-slot="6172135303" data-ad-format="link"></ins> <script> (adsbygoogle = window.adsbygoogle || []).push({}); </script> </div> </div> <div id="catlinks" class="catlinks catlinks-allhidden" data-mw="interface"></div> <div class="visualClear"></div> </div> </div> <div id="mw-navigation"> <h2>Navigation menu</h2> <div id="mw-head"> <div id="p-personal" role="navigation" class="" aria-labelledby="p-personal-label"> <!-- <div id="p-search" role="search"> <form action="https://usermanual.wiki/search.php" id="searchform"> <div id="simpleSearch"> <input type="search" name="search" placeholder="Search UserManual.wiki" title="Search UserManual.wiki [ctrl-option-f]" accesskey="f" id="searchInput" tabindex="1" autocomplete="off"><input type="hidden" value="Special:Search" name="title"><input type="submit" name="go" value="Go" title="Find a User Manual" id="searchButton" class="searchButton"> </div> </form> </div>--> <ul> <li id="pt-mycontris"><a href="https://usermanual.wiki/upload" title="Upload User Manual" accesskey="y">Upload a User Manual</a></li> </ul> </div> <div id="left-navigation"> <div id="p-namespaces" role="navigation" class="vectorTabs" aria-labelledby="p-namespaces-label"> <h3 id="p-namespaces-label">Versions of this User Manual:</h3> <ul> <li id="ca-nstab-main"><span><a href="https://usermanual.wiki/Document/wistronla480srsaschematics.1631895548" title="User Manual Wiki" accesskey="c">Wiki Guide</a></span></li> <li id="ca-nstab-main"><span><a href="https://usermanual.wiki/Document/wistronla480srsaschematics.1631895548/html" title="HTML" accesskey="c">HTML</a></span></li> <li id="ca-nstab-main"><span><a href="https://usermanual.wiki/Document/wistronla480srsaschematics.1631895548/amp" title="Mobile AMP" accesskey="c">Mobile</a></span></li> <li id="ca-nstab-main" class="selected" ><span><a href="https://usermanual.wiki/Document/wistronla480srsaschematics.1631895548/help" title="Discussion / FAQ / Help" accesskey="c">Download & Help</a></span></li> </ul> </div> </div> <div id="right-navigation"> <div id="p-views" role="navigation" class="vectorTabs" aria-labelledby="p-views-label"> <h3 id="p-views-label">Views</h3> <ul> <li id="ca-view"><span><a href="#">User Manual</a></span></li> <li class="selected" id="ca-edit"><span><a href="https://usermanual.wiki/Document/wistronla480srsaschematics.1631895548/help" title="Ask a question" accesskey="e">Discussion / Help</a></span></li> </ul> </div> </div> </div> <div id="mw-panel"> <div id="p-logo" role="banner"><a class="mw-wiki-logo" href="https://usermanual.wiki/Main_Page" title="Visit the main page"></a></div> <div class="portal" role="navigation" id="p-navigation" aria-labelledby="p-navigation-label"> <h3 id="p-navigation-label">Navigation</h3> </div> <div class="portal" role="navigation" id="p-tb" aria-labelledby="p-tb-label"> </div> </div> </div> <div id="footer" role="contentinfo"> <ul id="footer-info"> <li id="footer-info-lastmod">© 2024 UserManual.wiki</li> </ul> <ul id="footer-places"> <li id="footer-places-privacy"><a href="https://usermanual.wiki/ContactUs" title="UserManual.wiki:Contact Us">Contact Us</a></li> <li id="footer-places-about"><a href="https://usermanual.wiki/DMCA" title="UserManual.wiki:DMCA">DMCA</a></li> </ul> <ul id="footer-icons" class="noprint"> <li id="footer-poweredbyico"> </li> </ul> </div> </div></body></html> <script src="/cdn-cgi/scripts/7d0fa10a/cloudflare-static/rocket-loader.min.js" data-cf-settings="afdbd58fd958f6f79900790c-|49" defer></script>