E F Johnson 2425110 242-5110 User Manual 011402 revised 1 Pages 86 to 113 operators manual

E. F. Johnson Company 242-5110 011402 revised 1 Pages 86 to 113 operators manual

011402 revised 1 Pages 86 to 113 operators manual

CIRCUIT DESCRIPTION4-11 September 2001Part No. 001-5100-0014.4.6 UARTThe UART performs parallel to serial and serial to parallel conversion. The serial format used is a 9-bit format with start and stop bits. The serial transmission speed is 19200 bps. The UART appears as eight regis-ters visible in the I/O space of the DSP starting at every multiple of 0008h from 0000h to 07FFh. U11 performs the address decoding by selecting the UART when both IS* and A15 are low. Crystal Y2 along with the internal oscillator of the UART provides the clock required to generate the correct bit rate on the serial output of the UART. When the UART receives a new serial word or is ready to accept a new word to send from the DSP, it generates an interrupt on INTRN. This pin is connected to one of the hardware interrupt lines on the DSP. The DSP responds by reading the status register in the UART and by answering accordingly.4.4.7 ADSICThe ADSIC is a complex custom IC which performs many analog-to-digital, digital-to-analog, and purely digital functions as previously described. The ADSIC has four internal registers accessible by the DSP. They are selected through the use of address lines A15, A14, A13, A2, A1, A0, IS* (IS* needs to be inverted with U4 to be compatible with the logic level required by the ADSIC), RD*, and WR*. Two of these registers are read-only while the two others are write-only. Therefore, they can be accessed as two locations in the I/O spaces. Due to the decoding performed, those locations appear at the following addresses: Fxx0h, Fxx1h, Fxx8h, Fxx9h, Exx0h, Exx1h, Exx8h, and Exx9h.Crystal Y1 along with the internal oscillator in the ADSIC provide a 20 MHz clock. This clock signal is used internally by the ADSIC and is also multiplied by two to provide a 40 MHz clock to the DSP. The frequency of the clock can be electronically shifted a small amount by controlling varicap D1 through the OSCW pin (U3-97). This removes interference created on some channels by the clock.The ADSIC and DSP exchange the sampled receive data and the sampled VCO modulation signal through a serial port. This serial port consists of pins SCKR*, RFS, RxD, TxD, SCKT, and TFS on the ADSIC. U21 and U1 modify the relative phase of TxD and TFS to be compatible with the timing required on the serial port of the DSP.SDO is the output of the internal speaker DAC. MAI is the input of the internal microphone attenuator and is followed by the microphone ADC.The ADSIC is configured partially by the DSP through its data and address bus (see preceding). However, most of the configuring is provided through an SPI compatible serial bus. This SPI serial bus consists of pins SEL*, SPD, and SCLK. The other side of this bus is connected to the controller on the Keypad Board.4.5 KEYPAD BOARD4.5.1 INTRODUCTIONThe Keypad Board contains a microcontroller, LCD Display, Display Driver, Audio circuits, and Power supply. The Keypad Board interfaces with the Digital board via J4, with the Top Control rigid flex circuit via J13, and with the side buttons, PTT switch, and accessory connector through J5.4.5.2 FUNCTIONAL DESCRIPTIONThe microcontroller provides an interface between the hardware and the DSP (on the Digital Board). When the user presses or rotates a control such as the channel selector switch, a side option or PTT switch, or a keypad key, the microcontroller signals the change to the DSP. Conversely, when the DSP needs to change the display or an LED, it signals the microcontroller which then performs the action. The microcontroller also controls peripheral ICs such as the synthesizer, reference oscillator, display, and ADSIC.The microcontroller uses a serial bus to commu-nicate with the DSP and another RS232 bus to communicate with the side port connector. The side connector bus is used for external communication with a computer running the programming or tuning soft-ware. Finally, the microcontroller maintains certain operating parameters in the associated EEPROM which is controlled via a two-wire serial bus.DIGITAL BOARD (CONT’D)

CIRCUIT DESCRIPTION4-12 September 2001Part No. 001-5100-0014.5.3 MICROCONTROLLERThe microcontroller is a Motorola M68HC08XL36 chip. It includes 28K bytes of internal ROM memory and 1K byte of internal SRAM. It does not have an external bus and therefore cannot access any external program memory.The clock to the microcontroller is provided by Y1 and an internal oscillator. The frequency of the clock can be slightly offset by polarizing the base of Q3 through software control. This prevents RF inter-ference on some channels caused by the clock.The microcontroller contains an SPI-compatible synchronous serial bus. This bus consists of pins MISO (U1-53), MOSI (U1-52), SPSCK (U1-50), and a chip enable for each device with which it communi-cates. The devices which communicate with the microcontroller through this bus are as follows:•Top Display driver chip (Top Display board)•Front Display driver chip (Digital board)•ADSIC chip (Digital board)•Reference Oscillator (RF Board)•Front-End DAC (RF Board)•Synthesizer chip (RF Board)•Optional DES board.The microcontroller communicates with the DSP chip (Digital board) through a custom serial bus. This serial port includes pins PTA3 (U1-8), PTA4 (U1-9), PTA5 (U1-10), PTA6 (U1-11), and PTA7 (U1-12).The microcontroller uses its SCI asynchronous serial bus for external communication with a computer running programming or tuning software. The SCI pins RxD (U1-42) and TxD (U1-43) are connected to RS232 driver receiver U5. The other signals of a stan-dard RS232 computer port (DSR, DTR, CTS, RTS) are generated using microcontroller input/outputs. The RS232 driver U5 converts signals from a logic level of 0 and 5 V to a logic level of –10 and +10V. The chip contains an internal charge pump to generate –10V and +10V from the 5V power supply. The RS232 chip can be put in standby mode by leaving the line K/F-RS232* floating. This line is connected to the side connector which allows it to turn on U5 only when a computer is connected to the radio.The keypad interfaces with the microcontroller through eight lines (4 rows x 4 columns). The micro-controller regularly polls these lines to detect a key closure.Serial EEPROM U3 is used to store some impor-tant radio parameters. The EEPROM is read to or written from using I/O lines PTC6 and PTC7 of the microcontroller. PTC6 is used for the Data line, and PTC7 is used as a clock line.Shift register U14 expands the number of I/O lines of the microcontroller. It uses the same data and clock as the EEPROM plus an additional line (U1-45) to control the latch. Other user interface inputs such as the PTT and toggle switches are directly connected to an I/O line of the microcontroller.4.5.4 LOW VOLTAGE DETECTVoltage comparator U4 detects a low voltage condition and communicates this information to the microcontroller through the pin PTC5 (U1-30). The microcontroller can also detect through I/O IRQ2* (U1-62) that a battery is connected.4.5.5 LCD DISPLAYS AND DISPLAY DRIVERSThe radio has two displays which each have eight characters, several icons and a backlight. One display is located on the Keypad Board while the other display is located on the Top Display Board. Each display is driven by its own driver. The drivers are programmed by the microcontroller through the SPI bus. Both display drivers are connected to the common PI bus but are individually addressable so that the displays may show different information at the same time.4.5.6 AUDIO CIRCUITSThe audio circuits on the Keypad/Display Board consist of four op amps, two audio power amplifiers, and an analog switch.In receive mode, the analog receive waveform created by the ADSIC (on the Digital Board) is fed to an op amp summing amplifier (U9B). This amplifier sums in the audio tones that are generated by the microcontroller. The output of the summing amplifier KEYPAD BOARD (CONT’D)

$CIRCUIT DESCRIPTION4-13 September 2001Part No. 001-5100-001is then fed through the volume control potentiometer to a second op amp buffer. The buffer output is routed to a pair of audio power amplifiers: one to drive the internal speaker and another to drive the external speaker. Only one of these audio power amplifiers can be active at a time. The active power amplifier is selected by the OPT SEL 1 line (J5-12). The MUTE line turns the active power amplifier on or off by disconnecting the battery voltage from the audio power amplifier IC using the transistor Q4. Transistors Q8 and Q9 and their associ-ated RC networks remove popping sounds from the speaker audio by delaying the unmuting of the audio amp compared to the unMUTE command.In transmit mode, the audio for transmission can be selected from either an internal or external micro-phone, depending upon the presence of an external microphone and which PTT is pressed. An analog switch is used to route either the internal or external microphone signal to the microphone amplifier. The external microphone signal is buffered by an op amp. The microphone amplifier has a gain of ten, and is equipped with a pair of clipping diodes to prevent the amplified microphone signal from over-driving the A/D input on the ADSIC. 4.5.7 VOLTAGE REGULATION The 5-Volt Digital Supply is produced by switching DC-DC converter U12 which operates off the Unswitched B+ Supply. The switching frequency is around 160 kHz. A switching regulator is used to improve efficiency since the 5-Volt Digital Supply power consumption is a large percentage of the total power consumption of the radio. The peak-to-peak residual ripple on the 5-Volt Digital supply is approxi-mately 50 mV.The DC-DC converter is controlled by a wired AND gate on the Shutdown pin of the device. The two inputs of the wired AND gate are the SW_B+ and the output PTC4 of the microcontroller U1. When either input is high, the DC-DC converter is operating.The DC-DC converter has a soft-start feature (R98, C136) to prevent chattering of the output regu-lated voltage due to “bouncing” of the on/off switch. The converter has current limiting that limits output current to 1.5 A. The under voltage protection turns the converter off if the input (Unswitched B+) voltage drops below 5.45 V.The 5-Volt Analog Supply is produced by a linear regulator running from the Unswitched B+ Supply. The Unswitched B+ input to the regulator is switched on and off by a FET that is turned on by the 5-Volt Digital Supply. The peak-to-peak output ripple of the 5-Volt Analog regulator is less than 10 mV which is appropriate for analog circuits.4.6 TRANSMIT FREQUENCY DETERMINATIONThe operational frequency of the transmitter is determined by the PLL (Phase-Locked-Loop) consisting of synthesizer U204 and VCO circuit Q202/U201. Reference oscillator U203 generates and supplies a reference signal of 16.8 MHz to synthesizer. The synthesizer contains a programmable reference divider, programmable A and B dividers, a program-mable prescaler counter (P), and a programmable frac-tional N divider with two programmable values (N numerator and N denominator). All of these dividers are programmed through the serial interface which connects the synthesizer to the controller microprocessor. The 16.8 MHz reference oscillator frequency is divided down to a synthesizer reference frequency of 2.1, 2.4, or 2.225 MHz. This signal is fed to the phase detector which generates the steering voltage for the VCO. The output of the VCO circuit is coupled back and divided by AP+B and then divided by the fractional divider and fed into the second input of the phase detector. The VCO buffer has two outputs. One input goes to the input of Rx mixer chip U2, and the other is applied to the input of power amplifier module U105.4.7 HARMONIC FILTERThe transmitter harmonic filter consists of C148-C151, L126, L127, and L128.With VHF models only, it also consists of C129 and C130. The circuit is essen-tially a seven-pole low-pass filter. With VHF units only, two additional poles are inserted by C129 and C130 which are series resonant with L126 and L127.KEYPAD BOARD (CONT’D)$