Freescale Semiconductor MPC8377EWLAN Wireless Router User Manual MPC837xE RDS User s Guide

Freescale Semiconductor, Inc. Wireless Router MPC837xE RDS User s Guide

Contents

hardware part

Document Number: MPC837xERDSUGRev. 1.012/2008 Preliminary, Subject to Change without NoticeMPC837xE-RDSReference Design Platform User’s Guide
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Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing 100022  China  +86 10 5879 8000 support.asia@freescale.com  For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or +1-303-675-2140 Fax: +1-303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.comInformation in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Federal Communications Commission Radio Frequency Interference Statement This device complies with Part 15 of the FCC rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference and (2) this device must accept any interference received, including interference that might cause undesired operation. Changes or modifications to this equipment not expressly approved by Freescale could void the user’s authority to operate the equipment.  This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: —Reorient or relocate the receiving antenna. —Increase the separation between the equipment and receiver. —Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. —Consult the dealer or an experienced radio/TV technician for help.  Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners.  © Freescale Semiconductor, Inc. 2009. All rights reserved.  This device has been designed to operate with the attached antennas, and having a maximum gain of 2.5dBi. Antennas not identical as that or having a gain greater than 2.5dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms.To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that permitted for successful communication.Reminding1.  The installed antennas must not be located in a manner that allows exposure of the general population at a distance of less than 23cm. 2.  Mount the antennas in a manner that prevents any personnelfrom entering the area within 23cm from the central position of the antenna.
MPC837xE-RDS, Rev. 1.0Freescale Semiconductor 3 Preliminary, Subject to Change without NoticeContentsAbout This Book Audience  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Organization  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Definitions, Acronyms, and Abbreviations   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Chapters1  Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71.1  Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71.2  Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72  MPC837xE-RDS Board  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.1  Board-Level Functions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.1.1  Reset and Reset Configurations   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.1.2  External Interrupts   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.1.3  Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.1.4  DDR2 SDRAM Controller  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.1.5  Local Bus Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.1.6  Flash Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152.1.7  I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152.1.8  SATA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162.1.9  PCI Express Interface (PCI-E & Mini PCI-E)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162.1.10  10/100/1000 BaseT Interface  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162.1.11  RS-232 Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172.1.12  USB 2.0 Interface  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172.1.13  PCI Subsystem   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182.1.14  COP/JTAG Port   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182.2  MPC837xE-RDS Assembly  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202.3  Connectors   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222.3.1  COP Connector  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222.3.2  RS-232C Connectors   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232.3.3  Serial ATA (SATA) Connector   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232.3.4  Mini PCI Connector  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232.3.5  Power Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242.4  LEDs  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242.4.1  Power-on LED   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242.4.2  RDS Programmable LEDs  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242.4.3  Ethernet LEDs   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252.5  MPC837xE-RDS Board Configuration   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252.5.1  EEPROM   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252.5.2  PCI Operating Frequency  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
MPC837xE-RDS, Rev. 1.04Freescale Semiconductor Preliminary, Subject to Change without Notice2.5.3  Reset Configuration Word   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 262.5.4  Power Supply   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302.5.5  Chip-Select Assignments and Memory Map   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302.6  Specifications  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302.7  Mechanical Data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323  Board Bootup  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323.1  Board Jumper Settings  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.2  External Connections  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344  MPC837xE-RDS Software  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344.1  Application Features for MPC837xE-RDS reference software  . . . . . . . . . . . . . . . . . . . . . . 344.2  Application Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365  Unit Assembly   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375.1  Assembling the Enclosure and Board Assembly  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375.2  Attaching a Wi-Fi Card to the Product  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375.3  Attaching a SATA hard disk to the Product  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
MPC837xE-RDS, Rev. 1.0Freescale Semiconductor 5 Preliminary, Subject to Change without NoticeAbout This BookThis document presents system architecture, board-level functions, external connections, and software features for the MPC837xE-RDS board. It provides guidance of how to operate this product, making it easy for the user to connect with the outside world. The front part of this book focuses primarily on the board and functions. The latter part of the book focuses on the mechanical aspects.AudienceUsers who want to become familiar with the MPC837xE-RDS board, its characteristics, and how to program the device.OrganizationChapter 1, Introduction, describes the features and block diagram for the MPC837xE-RDS board.Chapter 2, MPC837xE-RDS Board, describes the board in terms of its hardware: board-level functions, connectors, configurations, and board mechanical data.Chapter 3, Board Bootup, describes the board settings and physical connections needed to boot the MPC837xE-RDS board.Chapter 4, MPC837xE-RDS Software, describes the main software features for MPC837xE-RDS board.Definitions, Acronyms, and AbbreviationsThe following list defines the acronyms and abbreviations used in this document.NAS Network-Attached StorageRAID Redundant Array of Inexpensive DisksCPU Central Processing UnitPoE Power over EthernetDDR2 SDRAM Double-Data-Rate Two Synchronous Dynamic Random Access MemoryNOR Flash Nor Gate FlasheTSEC Enhanced Three-Speed Ethernet ControllerRGMII Reduced Gigabit Media Independent InterfaceWAN Wide Area NetworkLAN Local Area NetworkUSB Universal Serial BusULPI USB Low-Pin Count InterfaceSATA Serial Advanced Technology Attachment (computer bus)PCI Peripheral Component Interconnect (computer bus)PCI-E Peripheral Component Interconnect Express (computer bus)SDHC Secure Digital High Capacity (SD 2.0 memory card)
MPC837xE-RDS, Rev. 1.06Freescale Semiconductor Preliminary, Subject to Change without NoticeI2C Inter-Integrated Circuit (computer bus)EEPROM Electrically Erasable Programmable Read-Only MemoryJTAG Joint Test Action GroupDHCP Dynamic Host Configuration ProtocolDNS Domain Name SystemVLAN Virtual Local Area NetworksNAT Network Address TranslationPAT Port Address TranslationRIP Routing Information ProtocolVRRP Virtual Router Redundancy ProtocolPPPoE Point-to-Point Protocol over EthernetIGMP Internet Group Management ProtocolUPnP Universal Plug and Play (computer protocol)SNMP Simple Network Management ProtocolQoS Quality of ServiceIPsec Internet Protocol SecurityPPTP Point-to-Point Tunneling ProtocolL2TP Layer 2 Tunneling ProtocolReferencesThe following sources were referenced to produce this book:•MPC8379E PowerQUICC™ II Pro Integrated Host Processor Family Reference Manual (MPC8379ERM)•MPC8379E PowerQUICC II Pro Integrated Host Processor Hardware Specifications (MPC8379EEC•Hardware and Layout Design Considerations for DDR Memory Interfaces (AN2582)
IntroductionMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 7 Preliminary, Subject to Change without Notice1IntroductionThis section presents the features and block diagram for the MPC837xE-RDS board.1.1 OverviewThe MPC837xE-RDS is a reference design based on the MPC8377E PowerQUICCTMII Pro processor. It supports applications of Wi-Fi Router, DMS (Digital Media Server), NAS with RAID, or Office in BOX, etc. The documentation for manufacturing the MPC837xE-RDS—including schematic, Gerber files, reference software, Bill Of Material (BOM)—is on the product CD. With the documentation, original equipment manufacturers (OEMs) and original design manufacturers (ODMs) can accelerate the development process and speed time-to-market for their real product.1.2 FeaturesThis section presents the features, specification, and block diagram of the MPC837xE-RDS board. The features are as follows:•CPU— Freescale MPC8377E @ 667 MHz•Power— PoE power solution based on LM5072 up to 30 W output, designed as one daughter module board— 48 V DC input used as the alternative power source when PoE is not available• Memory subsystem— On-board 512-MByte DDR2 unbuffered SDRAM— 64-MByte NOR Flash• Interfaces— 10/100/1000 BaseT Ethernet ports– eTSEC1– RGMII interface: WAN, 1 x 10/100/1000 BaseT with RJ-45 interface, using RealtekTM RTL8211B single port 10/100/1000 BaseT PHY. This port supports PoE feature– eTSEC 2– RGMII interface: LAN, 1 x 10/100/1000 BaseT with RJ-45 interface, using RealtekTM RTL8211B single port 10/100/1000 BaseT PHY— USB 2.0 Host– ULPI interface: 1 x USB 2.0 Type A Receptacle interface, using SMSCTM USB3300 Hi-Speed USB PHY— Serial ATA Controller
MPC837xE-RDS, Rev. 1.08Freescale Semiconductor Preliminary, Subject to Change without NoticeIntroduction– Two standard External SATA connectors— PCI: 32-bit PCI interface up to 66 Mhz– 2x 32-bit 3.3 V mini PCI slots— PCI Express– Two mini PCI Express Connectors, or– One mini PCI Express connector and one PCI Express x1 connector—SDHC– One SDHC Card Connector—I2C–I2C connected to ST M24256 Serial EEPROM— Board Connectors– One DC power jack– One internal 2 x 5 RS-232 connector– JTAG / COP for debugging— Form factor– Mini ITX form factor (170 mm x 170 mm, or 6693 mils x 6693 mils)• 6-layer PCB (4 layers signals and separate power and ground layers)• Certification—CE/FCC• Lead-Free (RoHS)
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 9 Preliminary, Subject to Change without NoticeFigure 1 shows the MPC837xE-RDS board block diagram.Figure 1. MPC837xE-RDS Board Block Diagram2 MPC837xE-RDS BoardThis section presents the board-level functions, specifications, and mechanical data for the MPC837xE-RDS board.e 300 Core32 KB D-Cache DUARTDual I2CTimersGPIO, SPI  InterruptController  Security      DDRController Local Bus   USBHi-Speed  Host        DevicePHYULPI RGMII RGMIIRTL8211Nor Flash(x 16)PCIDDR2 (x64)I2C1PHYUART1DDR2MPC8377EPCI-ESATAIIeSATAconPCISDminiPCISocketminiPCISocketSDCardClock GenPCI- E 1XJTAG/COPRTL8211 PHY PHYEEPROMminiPCI-ESocketminiPCI-ESocketUSB Type ALM507248V PoE 48V AC/DC1.8 1.5 1.05V 3.3VPoE Card32 KB I-Cache    10/100/1000     EtherneteTSEC1   10/100/1000     EtherneteTSEC2
MPC837xE-RDS, Rev. 1.010 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board2.1 Board-Level FunctionsThe board-level functions discussed in this section are reset, interrupts, clock distribution, and interface specification.2.1.1 Reset and Reset ConfigurationsThe MPC837xE-RDS reset module generates a single reset to reset the MPC837xE and other peripherals on the board. The reset unit provides power-on reset, hard reset, and soft reset signals in compliance with the MPC837xE hardware specification. Figure 2 shows the reset circuitry.Figure 2. Reset Circuitry of the MPC837xE• The COP/JTAG port or the MPC837xE generates the signal for hard reset.• The Maxim MAX6829 device generates the power-on reset. When MR is de-asserted and 3.3 V is ready, the MAX6829 internal timeout guarantees a minimum reset active time of 140 ms before PORESET is de-asserted. This circuitry guarantees a 140 ms PORESET pulse width after 3.3 V reaches the right voltage level, and this meets the specification of the PORESET input of MPC837xE.• The COP/JTAG port reset provides convenient hard-reset capability for a COP/JTAG controller. The RESET line is available at the COP/JTAG port connector. The COP/JTAG controller can directly generate the hard-reset signal by asserting this line low.• The pushbutton reset interfaces the MR signal with a debounce capability to produce a manual master reset of the processor.MAX68293.3 V Push ButtonHRESET from COPSRESET from COPTRST from COPSRESET to MPC837xEPORESET to MPC837xEFLASH10/100/1000 PHYMPC837xETRST to MPC837xEGND1.0 VMRWatchdog Input from MPC837xEPCI-E & Mini PCI-E
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 11 Preliminary, Subject to Change without Notice• The COP/JTAG port also generates the soft reset for the system. Assertion of SRESET causes the MPC837xE to abort all current internal and external transactions and set most registers to their default values.2.1.2 External InterruptsFigure 3 shows the external interrupt circuitry to the MPC837xE.Figure 3. MPC837xE Interrupt CircuitryThe following items describe the interrupt signals shown in Figure 3:• PHY interrupt (TSEC1_IRQ, TSEC2_IRQ). Two RTL8211B GBE PHY interrupts are connected to IRQ1 and IRQ2 of the MPC837xE. The system software can detect the status of the Ethernet link and the PHY internal status. • SD Card Write Protect interrupt (SD_WP). The SD card socket has a mechanical pin that can indicate whether the SD card inserted is write-protected or not. It is connected to IRQ4 of the MPC837xE.• PCI interrupt (PCI_INTA, PCI_INTB). Two mini PCI slots INTA and INTB drive IRQ5 and IRQ6 of the MPC837xE, respectivelyTSEC1_IRQSD_WPPCI_INTAPCI_INTBIRQ1IRQ2IRQ3IRQ4IRQ5IRQ6IRQ7MPC837xEExternal Logic IRQ0TSEC2_IRQ
MPC837xE-RDS, Rev. 1.012 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board2.1.3 Clock DistributionFigure 4 and Table 1 show the clock distribution on the MPC837xE-RDS board.Figure 4. MPC837xE-RDS Clock Distribution DiagramMPC837xELocal Bus CLKDDR2 SDRAMLCLKxMCKxMCKx200 MHz50 MHz to 133 MHzeTSEClocal busDLLDDRDLLPCIDIV66.666 MHzOSCCLKIN33/66 MHz33/66 MHzMini PCI SlotMini PCI SlotOCCR2PCI_SYNC_OUTPCI_SYNC_INSystemPLLCFG_CLKIN_DIVUSB3300GND GND24 MHzCrystal25 MHzOSCRTL8211BRTL8211BM66ENCLK (DDR400)125 MHz25 MHzOSCPI6C557-03PI6C557-03SD_REF_CLKxSD_REF_CLKxPCIE_CLKxPCIE_CLKx100 MHzSerDes Interface100 MHzMini PCI-e or PCI-e x1 Interface
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 13 Preliminary, Subject to Change without Notice2.1.4 DDR2 SDRAM ControllerMPC837xE uses DDR2 SDRAM as the system memory. The DDR2 interface uses the SSTL2 driver/receiver and 1.8 V power. A Vref 1.8V/2 is needed for all SSTL2 receivers in the DDR2 interface. For details on DDR timing design and termination, refer to the Freescale application note entitled Hardware and Layout Design Considerations for DDR Memory Interfaces (AN2582). Figure 5 shows the DDR SDRAM controller connection.Table 1. Clock DistributionClock Frequency Module Generated by Description66.666 MHz MPC837xE CLKIN 66.666 MHz oscillator The MPC837xE uses CLKIN to generate the PCI_SYNC_OUT clock signal, which is fed back to the internal system PLL through the PCI_SYNC_IN signal. From the power-on reset configuration, the internal PLL generates the CSB clock, which is fed to the e300 core PLL for generating the e300 core clock. The PCI M66EN pin is inverted for CFG_CLKIN_DIV configuration input, which selects whether the PCI_SYNC_OUT signal is CLKIN or CLkIN/2.125 MHz MPC837xE eTSEC RTL8211B The gigabit Ethernet PHY (RTL8211B) provides a 125-MHZ clock for eTSEC operation.)200 MHz DDR2 SDRAM MPC837xE The DDR memory controller is configured to use the 1:1 mode CSB to DDR clock for the DDR interface. The local bus clock uses CCB/n clock, where n is configured from the LCRR register.25 MHz GBE PHY (RTL8211B) 25 MHz oscillator The 25 MHz oscillator generates the clock for RTL8211B.33/66 MHz Mini PCI slot MPC837xE The PCI module uses the PCI_SYNC_IN as its clock source. The trace of the PCI_SYNC_IN/ PCI_SYNC_OUT signal is synchronized with all the PCI signals of the PCI slots.24 MHz USB PHY (USB3300) 24 MHz crystal100 MHz SerDes Interface 25 MHz oscillator and PI6C557-03 clock generatorThe SerDes reference clock uses 100 MHz.100 MHz Mini PCI-e and PCI-e x1 Interface25 MHz oscillator and PI6C557-03 clock generator
MPC837xE-RDS, Rev. 1.014 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS BoardFigure 5. DDR2 SDRAM Connection2.1.5 Local Bus ControllerThe MPC837xE local bus controller has a 32-bit LAD[0–31] address that consists of data multiplex bus and control signals. The local bus speed is up to 133 MHz. To interface with the standard memory device, an address latch must provide the address signals. The LALE is used as the latching signal. To reduce the load of the high speed 32-bit local bus interface, there is a data buffer for all low-speed devices attached to the memory controller. The local bus only drives the 64MB NOR Flash menory on the MPC837xE-RDS board:DDR2SDRAMControllerVrefGeneratorVref 0.9 V1.8 V Input VrefMSYNC_OUTMSYNC_INMPC837xEDDR2SDRAMVrefVrefDQ[0:63]DQ[32:47]DQ[0:15]DM[0:7] DM[0,1]DM[4,5]DQS[0:7] DQS[0,1]DQS[4,5]A[0:12], BA[0:2],CTRLMCK[0:3] pairsMCK0MCK2 pairDDR2SDRAMDDR2SDRAMDQ[48:63]DQ[16:31]DM[2,3]DM[6,7]DQS[2,3]DQS[6,7]MCK1 pairMCK3 pairDDR2SDRAMVrefVref1Gb(X16) 1Gb(X16)1Gb(X16) 1Gb(X16) pair
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 15 Preliminary, Subject to Change without NoticeFigure 6 shows the block diagram and connections for the local bus.Figure 6. Local Bus Connections2.1.6 Flash MemoryMPC837xE-RDS provides 64Mbytes NOR Flash memory using general-purpose chip-select machine (GPCM). The NOR Flash is 16-bit port size in the system. It is selected as the boot Flash when J12 pins 2 and 3 are jumpered together.2.1.7 I2CThe MPC837xE has two I2C interfaces. On the MPC837xE-RDS board, the MPC837xE serves as I2C master for both I2C buses (I2C1 and I2C2). I2C1 is connected to the following:• Serial EEPROM M24256 at address 0x50.• PCI-E and mini PCI-E socket.The M24256 serial EEPROM can store the reset configuration word of the MPC837xE, as well as store the configuration registers values if the boot sequencer of MPC837xE is enabled. The I2C address of the M24256 EEPROM on I2C1 bus is 0x50.A[24:0]CSS29GL512NNOR Flash (16-bit)MPC837xELAD[0:31]BADDR[27:30]D[15:0]LALEAddressLE Local Bus LCS0ControlOED[0:15]A[6:30]LCS0 LatchLCS0ControlLAD[6:26]LAD[0:15]Controller GNDControl SignalsLSYNC_OUTLSYNC_INLCKELCLK0LCLK1
MPC837xE-RDS, Rev. 1.016 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board2.1.8 SATA ControllerMPC837xE has a SATA controller for storage applications as shown in Figure 7. There are two SATA channels for MPC8377E. It requires a 100-MHz input clock, which is provided by the clock generator.2.1.9 PCI Express Interface (PCI-E & Mini PCI-E)MPC8377E supports the PCI Express (PCI-E) interface. It can be configured as two mini PCI-E interfaces or one mini PCI-E interface and one 1X PCI-E interface as shown in Figure 7. It also requires a 100-MHz input clock, which is provided by the clock generator.Figure 7. SATA and PCI-E Connections2.1.10 10/100/1000 BaseT InterfaceOn the MPC837xE-RDS board, eTSEC1 and eTSEC2 use RGMII mode. The eTSEC1 and eTSEC2 drive two on-board 10/100/1000 PHYs (RTL8211B), respectively. The I/O voltage is set to 3.3 V RGMII for RTL8211B. The RGMII (1000 BaseT) is a source synchronous bus. For a transmit bus connection, it is synchronous to GTX_CLK from the TSEC module. The receive bus connection is synchronous to RX_CLK generated from the PHY device. The MPC837xE MII management interface also connects to  MPC8377ESATAeSATA ChanneleSATA ChannelPCI-E (1X)Mini PCI-E& PCI-EOrMini PCI-E
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 17 Preliminary, Subject to Change without Noticethe RTL8211B. Figure 8 shows the connection between the MPC837xE eTSEC1 and eTSEC2 to the RTL8211B.Figure 8. RGMII Interface Connection for 10/100/1000 BaseT Ethernet2.1.11 RS-232 PortFigure 9 illustrates the serial port connection using a SP3232 3.3 V RS-232 driver to interface with a 2 x 5 Header. This serial connection runs at up to 115.2 Kbps.Figure 9. UART Debug Port Connection2.1.12 USB 2.0 InterfaceThe MPC837xE has a internal USB modules (dual-role (DR) module). On the MPC837xE-RDS board, it connects to the USB PHY (USB3300) through the 8-bit UTMI low-pin-count interface (ULPI). The RJ-45eTSEC1MPC837xERTL8211BMDIOMDCEC_MDIOEC_MDCRGMII interfacePHY addr = 0x02eTSEC23.3 VLVDD2RJ-45(Enet0, supports PoE)(Enet1)3.3 VLVDD1RGMII interface RTL8211BMDIOMDCPHY addr = 0x03SP3232TXDRXDCTSRXTXTXDODIDIMPC837xERTSRS-232SerialPortRXRXDRTSTXDCTSDOUART046837521910TXDRTS
MPC837xE-RDS, Rev. 1.018 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS BoardUSB3300 PHY connects to a Type A receptacle connector that serves as a host interface. Figure 10 shows the connection of USB.Figure 10. USB Port Connections2.1.13 PCI SubsystemThe MPC837xE has PCI interfaces. It connects to two 32-bit 3.3 V mini PCI slots, as shown in Figure 11.Figure 11. PCI Subsystem2.1.14 COP/JTAG PortThe common on-chip processor (COP) is part of the MPC837xE JTAG module and is implemented as a set of additional instructions and logic. This port can connect to a dedicated emulator for extensive system debugging. Several third-party emulators in the market can connect to the host computer through the MPC837xEULPI_D[7:0]ULPI_STPULPI_NXTULPI_CLKDIRUSB3300D[7:0]STPNXTCLKOUTULPI_DIR VBUSDMID5VDPUSB_TYPE_A_RECEPTACLEMPC837xE32-Bit PCIPCI-AD[0:31]PCI-CBE[0:3]PCI-REQ0 PCI-GNT0 PCI-CTRL 32-Bit 3.3 VMini PCI Slot32-Bit 3.3 VMini PCI SlotPCI-REQ1PCI-GNT1AD15AD14
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 19 Preliminary, Subject to Change without NoticeEthernet port, USB port, parallel port, RS-232, etc. Figure 12 shows a typical setup using a USB port emulator.Figure 12. Connecting the MPC837xE-RDS Board to a Parallel EmulatorThe 16-pin generic header connector carries the COP/JTAG signals and the additional signals for system debugging. Figure 13 shows the connector pinout.Figure 13. MPC837xE-RDS Board COP ConnectorPCMPC837xE-RDSJ4USBEmulatorTDIPull-upTCKTMSSRESETHRESETCKSTP_OUTGNDTRSTPull-upNCNCGND1TDONCNC
MPC837xE-RDS, Rev. 1.020 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board2.2 MPC837xE-RDS AssemblyFigure 14 shows the MPC837xE-RDS board top view, with the references of LEDs, jumpers, headers, and switches.Figure 14. MPC837xE-RDS Top ViewCAUTIONUse 3.3 V mini PCI cards only for mini PCI slots. Power down before insertion or removal.48 V DC PowerJ13J15J14P1 WAN (supports PoE)P2 LANMPC837xEJP1 J4COP ConnectorPin 1J12eSATAJ16SW1ResetJ7J6RS232 COM1P3Mini PCI (Top)P4Mini PCI (Bottom)P5Mini PCI-EP6Mini PCI-EJ10 P7PCI-E (1x)J5USBD7D8D9Pin 1D14D15D11
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 21 Preliminary, Subject to Change without NoticeFigure 15 shows the MPC837xE-RDS board bottom view.Figure 15. MPC837xE-RDS Bottom ViewTable 2 shows references and descriptions of LEDs, jumpers, headers, and switches.Table 2. Lists of Connectors, Jumpers, Switches, and LEDsReference Description ConnectorsJ4 16-pin COP/JTAG connectorJ11SD Socket
MPC837xE-RDS, Rev. 1.022 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board2.3 ConnectorsThis section describes the MPC837xE-RDS connectors and their pin assignments.2.3.1 COP ConnectorThe COP connector (J4) allows the user to connect a COP/JTAG-based debugger to the MPC837xE-RDS board for debugging. Table 3 lists the pin assignments of the COP connector.P3, P4 32-bit 3.3 V mini PCI connector slots. The board supports up to 2 mini PCI devices.J5 USB Type A receptacle (for USB high-speed external device)J13 48 V DC power jack (external power adapter input)J16 Double-eSATA portJ6 COM1 serial port terminal connector (RS-232C) for MPC837xEP5, P6 Mini PCI-E connectorsP7 PCI-E (1X) connectorP1 RJ-45 connector Enet0 (GBit Ethernet port that connects to Ethernet Switch). Enet0 is the WAN connector and supports PoE.P2 RJ-45 connector Enet1 (GBit Ethernet port that connects to external device). Enet1 is the LAN connector. J11 SD Card socketJumpers (Refer to Table 10 )SwitchesSW1 System reset button. Resets the MPC837xE-RDS board.LEDs (See also Section 2.4, LEDs)D11, D14 Controlled by the GPIO pin of MPC837xE.D7, D8, D9 eTSEC1 Eth0 link10, link100, link1000 LEDs (top)eTSEC2 Eth1 lind10, link100, link1000 LEDs (bottom)D15 3.3 V Active (Power is on if lit, and 3.3 V power is good.)Table 3. COP Connector Pin AssignmentsPin Signal Pin Signal1 TDO 2 GND3TDI 4TRST5QREQ 6 VDD_SENSE7 TCK 8 CHKSTOP_INTable 2. Lists of Connectors, Jumpers, Switches, and LEDs (continued)Reference Description
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 23 Preliminary, Subject to Change without Notice2.3.2 RS-232C ConnectorsSerial interface COM1 is available at connector (J6) with pin assignments as shown in Table 4.2.3.3 Serial ATA (SATA) ConnectorThe Double-eSATA connector (J16) connects to the serial ATA hard disks through eSATA cables.2.3.4 Mini PCI ConnectorThe board has two mini-PCI connectors (P3, P4) for plugging in mini PCI cards. Figure 16 shows how to plug a mini PCI card into the board.9TMS 10 NC11 SRESET 12 NC13 HRESET 14 NC15 CHKSTOP_OUT 16 GNDTable 4. COM1 Connector PinsPin Signal1 GND2TXD3RXD4NC5GND6 GND7CTS8RTS9NC10 NCTable 3. COP Connector Pin AssignmentsPin Signal Pin Signal
MPC837xE-RDS, Rev. 1.024 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS BoardFigure 16. Installation of a Mini PCI Card2.3.5 Power ConnectorJ13 is a DC jack for a 48 V power supply to the MPC837xE-RDS board.2.4 LEDsFigure 17 shows 9 LED indicators on the front panel of MPC837xE-RDS.Figure 17. LED Indicators on the Front Panel of MPC837xE-RDS2.4.1 Power-on LEDGreen Power LED (D15): indicates the system is power-on if lit.2.4.2 RDS Programmable LEDsGreen WiFi LED (D14): indicates whether the WiFi Card is inserted and activated (SW not implemented yet). GPIO1[10] controls this LED. Writing 0 turns on the LED, and writing 1 turns off the LED.Red DIAG LED (D11): indicates the status of diagnostics for MPC837xE-RDS board. The LED is flashing when system is going through the diagnostics. It is on if the system finds some problems during the diagnostics. And it is off if the system passes the diagnostics (SW not implemented yet). GPIO1[9] controls this LED. Writing 0 turns on the LED, and writing 1 turns off the LED.Mini PCI Card1. Insert the card2. Press downwardPOWER WiFi DIAGLANWAN1000 100 10
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 25 Preliminary, Subject to Change without Notice2.4.3 Ethernet LEDsGreen Link1000 LEDs (D9): indicate the link speed is 1000M on WAN and LAN. (The top LED for LAN and the bottom one for WAN)Green Link100 LEDs (D8): indicate the link speed is 100M on WAN and LAN. (The top LED for LAN and the bottom one for WAN)Green Link10 LEDs (D7): indicate the link speed is 10M on WAN and LAN. (The top LED for LAN and the bottom one for WAN)2.5 MPC837xE-RDS Board ConfigurationThis section describes the operational mode and configuration options of the MPC837xE-RDS board.2.5.1 EEPROMThe MPC837xE-RDS board has an on-board serial EEPROM. MPC837xE acts as I2C master and it is connected to the M24256 serial EEPROM using I2C1 as shown in Figure 18. Figure 18. I2C EEPROMYou can use the M24256 serial EEPROM to store the reset configuration word of the MPC837xE, as well as store the configuration registers’ values and user program if the boot sequencer of MPC837xE is enabled.For more details about programming the reset configuration word value in I2C EEPROM and the boot sequencer mode, refer to the MPC8379ERM. The I2C address of the M24256 EEPROM on the bus is 0x50.2.5.2 PCI Operating FrequencyAn M66EN input pin determines the AC timing of the PCI interface. On the MPC837xE-RDS board, the PCI agent card—connected to a mini PCI slot—determines the M66EN signal level. If a 33-MHz-only card is inserted, the M66EN signal is driven to 0 by the PCI agent card according to the PCI specification, or it is driven to 1 if it can perform at 66 MHz. A NOT gate inverts the signal and drives the CFG_CLKIN_DIV input pin so the system clock continues at the same frequency. I2C1-SCLI2C EEROMM24256MPC837xESCLSDAI2C1-SDAI2C Address = 0x50
MPC837xE-RDS, Rev. 1.026 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board2.5.3 Reset Configuration WordThe reset configuration word (RCW) controls the clock ratios and other basic device functions, such as PCI host or agent mode, boot location, TSEC modes, and endian mode. The reset configuration word is divided into reset configuration word lower (RCWL) and reset configuration word higher (RCWH) and is loaded from the local bus during the power-on or hard reset flow. The default RCW low-bit setting is 0x0404_0000. The default RCW high-bit setting is 0xA060_6C02.The RCW is located at the lowest 64 bits of the boot Flash memory, which is 0xFC00_0000 on this board.Figure 19 and Figure 20 show the RCW definitions.Table 5.  RCW Configuration in Flash MemoryAddressFC000000: 26262626 26262626 03030303 03030303FC000010: 00000000 00000000 00000000 00000000FC000020: A0A0A0A0 A0A0A0A0 60606060 60606060FC000030: 6C6C6C6C 6C6C6C6C 02020202 020202020 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15Field LBIUCM DDRCM — SPMF — COREPLL16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31Field —Figure 19. Reset Configuration Word Low (RCWL) Bit Settings0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15Field PCIHOST — PCIABR — COREDIS BMS BOOTSEQ SWEN ROMLOC RLEXT — —16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31Field TSEC1M TSEC2M — TLE — LDP —Figure 20. Reset Configuration Word High (RCWH) Bit SettingsTable 6. RCWL Bit DescriptionsBits Name Meaning Description0 LBIUCM Local bus memory controller clock modeLocal Bus Controller Clock: CSB_CLK0: Default ratio 1:11: ratio 2:11 DDRCM DDR SDRAM memory controller clock modeDDR Controller Clock: CSB_CLK0: Default ratio 1:11: ratio 2:1
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 27 Preliminary, Subject to Change without Notice2–3 — Reserved Should be cleared.4–7 SPMF[0–3] System PLL multiplication factor0000 16:10001 Reserved0010 2:10011 3:10100 (default) 4:10101 5:14–7 SPMF[0–3] System PLL multiplication factor0110 6:10111 7:11000 8:11001 9:11010 10:11011 11:11100 12:11101 13:11110 14:11111 15:18 — Reserved Should be cleared.9–15 COREPLL[0–6]Value coreclk: csb_clk VCO dividernn 0000 n PLL bypassed PLL bypassed00 0001 0 1:1 201 0001 0 1:1 410 0001 0 1:1 811 0001 0 1:1 800 0001 1 1.5:1 201 0001 1 1.5:1 410 0001 1 1.5:1 811 0001 1 1.5:1 800 0010 0: Default 2:1 2Table 6. RCWL Bit Descriptions (continued)Bits Name Meaning Description
MPC837xE-RDS, Rev. 1.028 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board9–15 COREPLL[0–6]01 0010 0 2:1 410 0010 0 2:1 811 0010 0 2:1 800 0010 1 2.5:1 201 0010 1 2.5:1 410 0010 1 2.5:1 811 0010 1 2.5:1 800 0011 0 3:1 201 0011 0 3:1 410 0011 0 3:1 811 0011 0 3:1 816–31 — Reserved. Should be cleared.Table 7. Reset Configuration Word High (RCWH) Bit DescriptionsBits Name Meaning Detailed Description0 PCIHOST PCI host mode 0 PCI agent1: Default PCI host1 Reserved — Should be cleared2 PCIARB PCI arbiter 0 PCI arbiter disabled1: Default PCI arbiter enabled3 Reserved — Should be cleared4 COREDIS Core disable mode 0: Default e300 enabled1 e300 disabled5 BMS Boot memory space 0: Default 0x0000_0000–0x007F_FFFF1 0xFF80_0000–0xFFFF_FFFF6–7 BOOTSEQ Boot sequencer configuration00: Default Boot sequencer is disabled01 Boot sequencer load configuration from I2C10 Boot sequencer load configuration from EEPROM11 Reserved8 SWEN Software watchdog enable0: Default Disabled1 EnabledTable 6. RCWL Bit Descriptions (continued)Bits Name Meaning Description
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 29 Preliminary, Subject to Change without Notice9–11 ROMLOC Boot ROM interface location000 DDR SDRAM001 PCI1010 Reserved011 On-chip Boot ROM100 Reserved101 Local bus GPCM, 8 bits 110: Default Local bus GPCM, 16 bits111 Local bus GPCM, 32 bits12–13 RLEXT Boot ROM location extension00: Default Legacy mode01 NAND Flash mode10 Reserved11 Reserved14–15 Reserved — Should be cleared16–18 TSEC1M TSEC1 Mode 000 MII001 RMII010 Reserved011: Default RGMII100 Reserved101 RTBI110 SGMII110 Reserved19–21 TSEC2M TSEC2 Mode 000 MII001 RMII010 Reserved011: Default RGMII100 Reserved101 RTBI110 SGMII110 Reserved22–27 Reserved — Should be cleared28 TLE True little endian 0: Default Big-endian mode1 True little endian mode29 Reserved — Should be clearedTable 7. Reset Configuration Word High (RCWH) Bit Descriptions (continued)Bits Name Meaning Detailed Description
MPC837xE-RDS, Rev. 1.030 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Board2.5.4 Power SupplyThe MPC837xE requires a 48 V power supply from the DC power jack or PoE for normal operation. The 48 V power supply is reduced to 5 V and 3.3 V from the DC-DC circuitry on PoE daughter board. The 1.0 V, 1.5 V, and 1.8 V are all generated from switching regulators. The 1.0 V power is for a CPU core. The 1.5 V and 1.8 V powers are for two GE PHYs and two mini PCI-E connectors. The 1.8 V power is also for the DDR controller.2.5.5 Chip-Select Assignments and Memory MapTable 8 shows an example memory map on the MPC837xE that is used for u-boot in the Flash memory.2.6 SpecificationsTable 9 lists the specifications of the MPC837xE-RDS board..30 LDP LDP/CKSTP pin mux state after reset0 LDP[0:3] = local data parity.1: Default LDP[0:3] = LCS[4:7]31 Reserved — Should be clearedTable 8. Example Memory Map, Local Access Window, and Chip-Select AssignmentsAddress Range Target Interface Chip-Select Line Device Name Port Size (Bits)0x0000_0000–0x1FFF_FFFF DDR MCS0 DDR2 SDRAM (512 Mbyte) 640x8000_0000–0x9FFF_FFFF PCI1 Nil PCI1 memory space (512 Mbyte) 320xE200_0000–0xE2FF_FFFF PCI1 Nil PCI1 I/O space (16 Mbyte) 320xA000_0000–0xBFFF_FFFF PCI2 Nil PCI2 memory space (512 Mbyte)  320xE300_0000–0xE3FF_FFFF PCI2 Nil PCI2 I/O space (16 Mbyte) 320xE000_0000–0xEFFF_FFFF Internal bus Nil IMMR (1 Mbyte) —0xFC00_0000–0xFFFF_FFFF Local bus LCS0 NOR Flash memory (64 Mbyte) 16Table 9. MPC837xE-RDS Board SpecificationsCharacteristics SpecificationsPower requirements: (Without any plugin card and USB device) Typical 5.0 V DC 0.009 A3.3 V DC 1.17 ACommunication processor MPC8377E running @ up to 667 MHzTable 7. Reset Configuration Word High (RCWH) Bit Descriptions (continued)Bits Name Meaning Detailed Description
MPC837xE-RDS BoardMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 31 Preliminary, Subject to Change without NoticeAddressing: Total address range Flash memory (local bus)DDR SDRAM4 Gbyte (32 address lines)64 Mbyte NOR Flash512 Mbyte DDR2 SDRAM at DDR400Operating temperature  0oC to 70oC (room temperature)Storage temperature –25oC to 85oCRelative humidity 5% to 90% (noncondensing)PCB dimensions:LengthWidthThickness6693 mil6693 mil67 milTable 9. MPC837xE-RDS Board Specifications (continued)Characteristics Specifications
MPC837xE-RDS, Rev. 1.032 Freescale Semiconductor Preliminary, Subject to Change without NoticeBoard Bootup2.7 Mechanical DataFigure 21 shows the MPC837xE-RDS dimensions (in mil). The board dimensions are 170 mm × 170 mm (6693 mils × 6693 mils) for integration in a mini ITX chassis with a small footprint.Figure 21. Dimensions of the MPC837xE-RDS Board3 Board BootupThis section describes how to boot up the MPC837xE-RDS board. The factory has preloaded a Flash image onto the on-board Flash memory. Before powering up the board, set the on-board jumpers according to the settings listed in Section 3.1, Board Jumper Settings.6693.006693.002060.00 2590.001360.00mounting holetyp 4
Board BootupMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 33 Preliminary, Subject to Change without NoticeCAUTIONAvoid touching areas of circuitry and connectors; static discharge can damage circuits.3.1 Board Jumper SettingsFigure 22 shows a partial top view of the MPC837xE-RDS with red outlines at jumper designators J7, J10, and J12. A square pad indicates pin 1 of the part. Table 10 shows the default jumper settings.Figure 22. Partial MPC837xE-RDS Top ViewTable 10. Default Jumper SettingsReference Default Jumper Setting √ = Jumper× = No Jumper DescriptionJ7 ×Watchdog input for MAX6829. Default is no jumper.J10 ×12V external power input for optional connector---X1 PCI Express.J12 2–3 √Select the reset configuration source (RST-CFG-SRC) for the MPC837xE. Jumper 2-3 (default): 0000 Reset configuration word is loaded from NOR Flash. Jumper 1-2: 1111 Hard-coded option 7. Reset configuration word is not loaded.
MPC837xE-RDS, Rev. 1.034 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Software3.2 External ConnectionsFigure 23shows the external connections.Figure 23. External ConnectionsNOTEStrong electromagnetic interference might disturb the normal function of the product. If so, simply reset the product to resume normal operation by following the steps in the software user guide. If normal function does not return, please move the product to another location.4 MPC837xE-RDS SoftwareThe MPC837xE-RDS comes with a pre-installed reference design software package. This package consists of a bootloader (u-boot), a generic PPC Linux-based system, and a suite of Wi-Fi router applications. The software all resides in the on-board Flash memory. Upon powerup, the Linux system and the applications run on the MPC837xE-RDS.The MPC837xE-RDS reference software takes advantage of a tool called OpenWRT, a Linux platform for embedded devices. Instead of trying to create a single, static firmware, OpenWrt provides a fully writable file system with package management. This frees you from the application selection and configuration, allowing you to customize the device through the use of packages to suit any application.4.1 Application Features for MPC837xE-RDS reference softwareThe pre-installed reference design software supports the application of the Wi-Fi router, including the following:• 802.11 a/b/g/n• IPv4 and IPv6• DHCP• DNS•VLAN• NAT and PAT• Static routing• RIP v1, v2•VRRP48V Power WAN(Support PoE)LAN eSATA Reset USBSD Card
MPC837xE-RDS SoftwareMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 35 Preliminary, Subject to Change without Notice• PPPoE•IGMP•UPnP•SNMP•QoSWireless Security:• Pre-Shared Key (PSK)• Wi-Fi Protected Access 2 (WPA2)• 802.11i AES-CCMP• Wired Equivalent Privacy (WEP), 128/256-bit• 802.11i EAP authentication with RADIUSNetwork Security:• Access control• Stateful packet inspection firewall• Intrusion detection• Content filteringVirtual Private Network (VPN):•IPSec• PPTP• L2TP
MPC837xE-RDS, Rev. 1.036 Freescale Semiconductor Preliminary, Subject to Change without NoticeMPC837xE-RDS Software4.2 Application ConnectionsFigure 24 shows application connections for MPC837xE-RDS board.Figure 24. MPC837xE-RDS Application ConnectionsConfigure the MPC837xE-RDS board by using a web browser. Connect your PC to the LAN port of the board (either directly or through a hub), then use a web browser to configure. TCP/IP settings must be correct. The TCP/IP setting should be on the IP subnet of the MPC837xE-RDS.• Set up the IP Address automatically:— MPC837xE-RDS incorporates a DHCP server. The easiest method is to set your PC to get its IP address automatically and correctly obtain the correct IP address, gateway, and DNS.• Set up the IP Address manually:— The default IP address of MPC837xR-RDS reference board is 192.168.1.1/24. Set the IP address of the PC as 192.168.1.xxx/24, where xxx can be any number between 2 and 254, and the set the default gateway to 192.168.1.1.After setting the IP address, open a web browser and type address http://192.168.1.1. At the login window, type admin for both User name and Password. You will then arrive at the MPC837xR-RDS main page. After that, you can review and modify the configuration as needed. For more information, refer to the software user guide.Besides acting as one Wi-Fi router, MPC837xE-RDS platform can also support other utilities and applications. For details of different applications for MPC837xE-RDS, contact your local Freescale sales office.
Unit AssemblyMPC837xE-RDS, Rev. 1.0Freescale Semiconductor 37 Preliminary, Subject to Change without Notice5 Unit AssemblyThe assembled unit is composed of the board assembly, an enclosure, screws, and other parts. The instructions in this section apply if you need to assemble or reassemble the product or add peripherals mentioned. 5.1 Assembling the Enclosure and Board AssemblyAssembling the board into the enclosure requires screwing the board onto the base, then screwing the top and base together.1. Place the base on a flat surface.2. Set the board assembly in the base so the connectors and LEDs fit perfectly and the board’s mounting holes align with the base’s mating holes.3. With four screws and washers, screw the board to the base.4. Align the top with the base, with the Freescale logo nearest the rear panel (connector side).5. Screw the parts together from the bottom side of the base using four screws.5.2 Attaching a Wi-Fi Card to the ProductAttaching the Wi-Fi card to the product requires separating the top of the enclosure from the unit, plugging a Wi-Fi card into a mini PCI slot, installing the antenna cable into the Wi-Fi card, then reassembling the the product.CAUTIONUse a 3.3 V mini PCI card only. Power down before insertion or removal.1. From the bottom of the assembled unit, remove the four screws.2. Turn the unit right side up, plug in the Wi-Fi card, then latch it. See Figure 16 for positioning depiction.3. Install the antenna cable into the Wi-Fi card connector, then select the proper holes on the panel (4 on rear panel and 2 on front panel) to position the antenna.4. Re-assemble using Steps 4 and 5 of Section 5.1, Assembling the Enclosure and Board Assembly.5.3 Attaching a SATA hard disk to the ProductAttaching a SATA hard disk to the product requires disassembling the unit into the enclosure top and bottom and the board assembly, inserting the hard disk, installing the cable, then re-assembling the product.1. Disassemble the entire unit.2. Plug the SATA cable to J11 at the bottom side of PCBA.3. Release the hard disk tray on the enclosure base, then position the hard disk in it.4. Plug the other end of the SATA cable to hard disk, then position the tray in the base.
MPC837xE-RDS, Rev. 1.038 Freescale Semiconductor Preliminary, Subject to Change without NoticeUnit Assembly5. Re-assemble using Steps 2 through 5 of Section 5.1, Assembling the Enclosure and Board Assembly.

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