NXP Laboratories UK JN5142M0 JN5142-001-M00 IEEE802.15.4 Wireless Module User Manual JN DS JN5142 x01 Myy
NXP Laboratories UK Ltd JN5142-001-M00 IEEE802.15.4 Wireless Module JN DS JN5142 x01 Myy
Contents
- 1. Datasheet
- 2. User Datasheet
- 3. Antenna Datasheet
User Datasheet
Data Sheet: JN5142-x01-Myy JenNet-IP,RF4CE and IEEE802.15.4 Module Overview The JN5142-x01-Myy family is a range of ultra low power, high performance surface mount modules targeted at JenNet-IP and RF4CE networking applications, enabling users to realise products with minimum time to market and at the lowest cost. They remove the need for expensive and lengthy development of custom RF board designs and test suites. The modules use NXP‟s JN5142 wireless microcontroller to provide a comprehensive solution with large memory, high CPU and radio performance and all RF components included. All that is required to develop and manufacture wireless control or sensing products is to connect a power supply and peripherals such as switches, actuators and sensors, considerably simplifying product development. Features: Module 2.4GHz IEEE802.15.4, JenNet-IP and RF4CE compatible Sleep current (with active sleep timer) 0.73µA JN5142-x01-M00/03 up to 1km range (Ext antenna) M00: integral antenna 18x32mm M03: uFl connector 18x30mm o TX power +2.5dBm o Receiver sensitivity –95dBm o TX current 15mA o RX current 17.5mA o 2.3-3.6V operation Two module variants are available: JN5142-x01-M00 with an integrated antenna and the JN5142-x01-M03 with antenna connector. The modules can implement networking stacks such as JenNet-IP and RF4CE, as well as customer applications. Module Block Diagram Features: Microcontroller 128kB Serial Flash Memory XTAL Matching Integrated Antenna M00 Option 2.4GHz 2.4GHz Watchdog Watchdog RAM ROM Timer Timer 32KB 128KB Voltage Supply Monitor uFl Connector Low power operation Variable instruction width for high coding efficiency Multi-stage instruction pipeline 128KB ROM and 32KB RAM for bootloaded program code Master/Slave I2C interface. 3xPWM and Application timer/counter Timer RISC CPU O - QPSK Matching 32-bit RISC CPU, 1-32MHz clock speed 32-bit Radio Radio External Antenna SPI 2-Wire Serial (Master) UART Modem M03 Option 29-byte OTP eFuse 2-Wire Serial (Slave) IEEE802.15.4 Sleep Counter MAC UART 4-Chan 8-bit ADC SPI port with 3 selects Battery & , Temp sensors Supply Voltage Monitor with 8 programmable thresholds 4-input 8-bit ADC Comparator Accelerator Power 128-bit AES Encryption Management Accelerator Power Benefits Applications Battery and temperature sensors Single chip optimized for simple applications Watchdog timer and Power-onReset (with brown-out) circuit Very low current solution for long battery life – over 10 yrs Robust and secure low power wireless applications using RF4CE Up to 18 DIO Remote Control Toys and gaming peripherals Industrial temp (-40°C to +125°C) 6x6mm 40-lead Punched QFN Active RFID tags Point-to-point or star networks using IEEE802.15.4 Energy harvesting, for example self powered light switch Highly featured 32-bit RISC CPU for high performance and low power System BOM is low in component count and cost FCC part 15.247 rules, IC Canada RSS 210e and ETSI EN 300-328 v 1.7 compliant JN-DS-JN5142-x01-Myy 1v0 Lead-free and RoHS compliant © NXP Laboratories UK 2012 Contents 1. Introduction 1.1. 1.2. Variants Regulatory Approvals 2. Specifications 3. Product Development 3.1. JN5142 Single Chip Wireless Microcontroller 4. Pin Configurations 4.1. 4.2. 4.2.1 4.2.2 Pin Assignment Pin Descriptions Power Supplies SPI Memory Connections 5. Electrical Characteristics 5.1. Maximum Ratings 5.2. Operating Conditions Appendix A Additional Information A.1 Outline Drawing A.2 Module PCB Footprint A.3 Manufacturing A.3.1 Reflow Profile A.3.2 Soldering Paste and Cleaning A.4 Ordering Information A.5 Tape and Reel Information: A.5.1 Tape Orientation and dimensions A.5.2 Cover tape details A.5.3 Leader and Trailer A.5.4 Reel Dimensions: A.6 Related Documents A.7 Federal Communication Commission Interference Statement A.7.1 Antennas approved by FCC for use with JN5142 modules A.7.2 FCC End Product Labelling A.8 Industry Canada Statement A.8.1 Industry Canada End Product Labelling A.9 European R & TTE Directive 1999/5/EC Statement A.10 RoHS Compliance A.11 Status Information A.12 Disclaimers Version Control ii JN-DS-JN5142-x01-Myy 1v0 10 10 12 13 13 13 14 15 15 15 16 16 16 17 18 18 18 18 19 19 19 20 20 © NXP Laboratories UK 2012 1. Introduction The JN5142-x01-Myy module family provides designers with a ready-made component that provides a fully integrated solution for applications using the IEEE802.15.4 standard in the 2.4 - 2.5GHz ISM frequency band [1], including RF4CE. A later version of the JN5142 will provide support for JenNet-IP “Smart Device” applications such as lighting. Applications that transfer data wirelessly tend to be more complex than wired ones. Wireless protocols make stringent demands on frequencies, data formats, timing of data transfers, security and other issues. Application development must consider the requirements of the wireless network in addition to the product functionality and user interfaces. To minimise this complexity, NXP provides a series of software libraries and interfaces that control the transceiver and peripherals of the JN5142. These libraries and interfaces remove the need for the developer to understand wireless protocols and greatly simplifies the programming complexities of power modes, interrupts and hardware functionality. In view of the above, it is not necessary to provide the register details of the JN5142 in the datasheet. The device includes a Wireless Transceiver, RISC CPU, on chip memory and an extensive range of peripherals. The modules integrate all of the RF components required, removing the need to perform expensive RF design and test. Products can be designed by simply connecting sensors and switches to the module IO pins. The modules use an NXP single chip IEEE802.15.4 Wireless Microcontroller, allowing designers to make use of the extensive chip development support material. Hence, this range of modules allows designers to bring wireless applications to market in the minimum time with significantly reduced development effort and cost. Two variants are available: JN5142-x01-M00 (standard module with integral antenna) and the JN5142-x01-M03 (standard module with uFL connector for use with external antennae). All modules have FCC modular approvals and are compliant with EU regulations. The variants available are described below. 1.1. Variants Variant JN5142-001-M00 JN5142-J01-M00 JN5142-001-M03 JN5142-J01-M03 Description Standard Power, integrated antenna, IEEE802.15.4 stack Standard Power, integrated antenna, Jennet IP stack Standard Power, uFl connector, IEEE802.15.4 stack Standard Power, uFl connector, Jennet IP stack FCCID Industry Canada ID TYOJN5142M0 IC: 7438A-CYO5142M0 TYOJN5142M0 IC: 7438A-CYO5142M0 TYOJN5142M3 IC: 7438A-CYO5142M3 TYOJN5142M3 IC: 7438A-CYO5142M3 1.2. Regulatory Approvals All module types have been tested against the requirements of European standard EN 300 328 v1.7.1 and a Notified Body statement of opinion for this standard is available on request. Additionally, all module types have received FCC “Modular Approvals”, in compliance with CFR 47 FCC part 15 regulations and in accordance to FCC Public notice DA00-1407, appendix A.7 contains details on the conditions applying to this modular approval. The modules are approved for use with a range of different antennas; further details of which can be found in section Appendix A.7.1. The modular approvals notice and test reports are available on request. In addition, all modules have Industry Canada modular approval and RSS210e Issue 7 (June 2007) certification. © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 2. Specifications Most specification parameters for the modules are specified in the chip datasheet - JN-DS-JN5142 Wireless Microcontroller Datasheet, [2]. Where there are differences, the parameters are defined here. VDD=3.0V @ +25°C Typical DC Characteristics Notes JN5142-x01M00/03 Deep sleep current 100nA Sleep current 0.73uA With active sleep timer Radio transmit current 14.8mA CPU in doze, radio transmitting Radio receive current 16.5mA CPU in doze, radio receiving Centre frequency accuracy +/-25ppm Additional +/-15ppm allowance for temperature and ageing Typical RF Characteristics Notes Receive sensitivity -95dBm Nominal for 1% PER, as per 802.15.4 section 6.5.3.3 (Note 1) Maximum Transmit power +2.5dBm Nominal (Note 1) Maximum input signal +10dBm For 1% PER, measured as sensitivity RSSI range -95 to -10 dBm RF Port impedance – uFl connector VSWR (max) 50 ohm 2.4 - 2.5GHz 2:1 2.4 - 2.5GHz Peripherals Notes Master SPI port 3 selects 250kHz - 16MHz Slave SPI port 250kHz - 8MHz UART 16550 compatible Two-wire serial I/F (compatible with SMbus & I C) Up to 400kHz Two programmable Timer/Counters with capture/compare facility, Tick timer Two programmable Sleep Timers Digital IO lines (multiplexed with UARTs, timers and SPI selects) 18 Four channel Analogue-to-Digital converter Programmable analogue comparator Internal temperature sensor and battery monitor 16MHz clock 32kHz clock 8-bit, up to 100ks/s Ultra low power mode for sleep The performance of all peripherals is defined in the JN-DS-JN5142 Wireless Microcontroller Datasheet [2] Note 1: Sensitivity is defined for conducted measurements on connectorised modules. Modules with an integrated antenna have approximately 3 dB less e.i.r.p and reciprocal receive sensitivity. JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 3. Product Development NXP supplies all the development tools and networking stacks needed to enable end-product development to occur quickly and efficiently. These are all freely available from www.nxp.com/jennic. A range of evaluation/developer kits is also available, allowing products to be quickly bread boarded. Efficient development of software applications is enabled by the provision of a complete, unlimited, software developer kit. Together with the available libraries for the IEEE802.15.4 MAC and the JenNet-IP and RF4CE network stacks, this package provides everything required to develop application code and to trial it with hardware representative of the final module. The modules can be user programmed both in development and in production using software supplied by NXP. Access to the on-chip peripherals, MAC and network stack software is provided through specific APIs. This information is available on the NXP/Jennic support website, together with many example applications, user guides, reference manuals and application notes. 3.1. JN5142 Single Chip Wireless Microcontroller The JN5142-x01-Myy series is constructed around the JN5142-x01 single chip wireless microcontroller, which includes the radio system, a 32-bit RISC CPU, ROM and RAM memory and a range of analogue and digital peripherals. The chip is described fully in JN-DS-JN5142 Wireless Microcontroller Datasheet [2]. The module also includes a 1Mbit serial flash memory, which holds the application code that is loaded into the JN5142 during the boot sequence and provides static data storage, required by the application. © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 4. Pin Configurations ADC1 NC 41 40 NC NC NC SPICLK SPIMISO SPIMOSI SPISSZ DIO0 39 38 37 36 35 34 DIO1 DIO2 SPISSM SPISWP DIO3 33 10 32 11 31 12 30 13 29 14 28 15 27 NC ADC2 NC NC NC NC NC NC DIO17 DIO16 DIO15 DIO14 RESETN DIO13 DIO12 VDD GND VSSA DIO10 DIO11 DIO4 DIO5 DIO6 DIO7 DIO8 DIO9 16 17 18 19 20 21 22 23 24 25 26 Figure 1: Pin Configuration (top view) Note that the same basic pin configuration applies for all module designs. JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 Pin Assignment Pin No Pin Functions Primary ADC1 NC NC NC Signal Type Alternate Functions 3.3V Description Analogue to Digital Input NC SPICLK CMOS SPI Clock Output SPIMISO CMOS SPI Master In Slave Out Input SPIMOSI CMOS SPI Master Out Slave In Output SPISSZ CMSO SPI Select From Module – SS0 Output 10 DIO0 SPISEL1 ADC3 CMOS DIO0 or SPI Slave Select Output 1 or ADC input 3 11 DIO1 SPISEL2 ADC4 CMOS DIO1, SPI Slave Select Output 2, ADC input 4 or Pulse Counter0 Input 12 DIO2 TIM0CK_GT RFRX CMOS DIO2, Timer0 Clock/Gate Input or Radio Receive Control Output PC0 13 SPISSM CMOS SPI Select to FLASH (Input) 14 SPISWP CMOS FLASH Write Protect (Input) 15 DIO3 TIM0CAP RFTX CMOS DIO3, Timer0 Capture Input or Radio Transmit Control Output 16 DIO4 CTS0 JTAG_TCK TIM0OUT CMOS DIO4, UART 0 Clear To Send Input, JTAG CLK or Timer0 PWM Output 17 DIO5 RTS0 JTAG_TMS PWM1 CMOS DIO5, UART 0 Request To Send Output, JTAG Mode Select, PWM1 Output or Pulse Counter 1 Input 18 DIO6 TXD0 JTAG_TDO PWM2 CMOS DIO6, UART 0 Transmit Data Output, JTAG Data Output or PWM2 Output 19 DIO7 RXD0 JTAG_TDI PWM3 CMOS DIO7, UART 0 Receive Data Input, JTAG Data Input or PWM 3 Output 20 DIO8 TIM0CK_GT PC1 CMOS DIO8, Timer0 Clock/Gate Input or Pulse Counter1 Input 21 DIO9 TIM0CAP 32KXTALIN CMOS DIO9, Timer0 Capture Input or 32K External Crystal Input 22 DIO10 TIM0OUT 32KXTALOUT CMOS DIO10, Timer0 PWM Output or 32K External Crystal Output 23 DIO11 PWM1 CMOS DIO11 or PWM1 Output 24 VDD 3.3V Supply Voltage 25 GND 0V Digital Ground 26 VSSA 0V Analogue Ground 27 DIO12 PWM2 CTS0 JTAG_TCK AD0 CMOS DIO12, PWM2 Output, UART 0 Clear To Send Input, JTAG CLK or Antenna Diversity Odd 28 DIO13 PWM3 RTS0 JTAG_TMS ADE CMOS DIO13, PWM3 Output, UART 0 Request To Send Output, JTAG Mode Select or Antenna Diversity Even 29 RESETN CMOS Reset input © NXP Laboratories UK 2012 PC1 JN-DS-JN5142-x01-Myy 1v0 30 DIO14 SIF_CLK TXD0 JTAG_TDO SPISEL1 CMOS DIO14, Serial Interface Clock, UART 0 Transmit Data Output, JTAG Data Output or SPI Slave Select Output 1 31 DIO15 SIF_D RXD0 JTAG_TDI SPISEL2 CMOS DIO15, Serial Interface Data, UART 0 Receive Data Input, JTAG Data Input or SPI Slave Select Output 2 32 DIO16 COMP1P SIF_CLK CMOS DIO16, Comparator Positive Input or Serial Interface clock 33 DIO17 COMP1M SIF_D CMOS DIO17, Comparator Negative Input or Serial Interface Data 34 NC 35 NC 36 NC 37 NC 38 NC 39 NC 40 ADC2 41 NC VREF 3.3V Analogue peripheral reference voltage or ADC input 2 4.2. Pin Descriptions All pins behave as described in the JN-DS-JN5142 Wireless Microcontroller Datasheet [2], with the exception of the following: 4.2.1 Power Supplies A single power supply pin, VDD is provided. Separate analogue (VSSA) and digital (GND) grounds are provided. These should be connected together at the module pins. 4.2.2 SPI Memory Connections SPISWP is a write protect pin for the serial flash memory. This should be held low to inhibit writes to the flash device. SPISSZ is connected to SPI Slave Select 0 on the JN5142. SPISSM is connected to the Slave Select pin on the memory. This configuration allows the flash memory device to be programmed using an external SPI programmer if required. For programming in this mode, the JN5142 should be held in reset by taking RESETN low. Two suggested flash 1Mbit memory devices that may be used in the module are, the Micron M25P10A and the Winbond W25X10B. The memory can also be programmed over the UART by using the flash programmer software provided by NXP. This is available as part of the Software Developer kit and libraries available from www.nxp.com/jennic. To enter this programming mode, SPIMISO (pin 7) should be held low whilst the chip is reset. Once programming has finished, the chip should be reset, when it will execute the new code downloaded. For normal operation of the module and programming over the UART, SPISSZ should be connected to SPISSM. JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 5. Electrical Characteristics In most cases, the Electrical Characteristics are the same for both module and chip. They are described in detail in the chip datasheet. Where there are differences, they are detailed below. 5.1. Maximum Ratings Exceeding these conditions will result in damage to the device. Parameter Min Max Device supply voltage VDD -0.3V 3.6V Voltage on analogue pins ADC1-2 -0.3V VDD + 0.3V Voltage on 5v tolerant digital pins DIO0-DIO8 & DIO11-17, RESETN -0.3V Lower of (VDD + 2V) and 5.5V Voltage on 3v tolerant digital pins DIO9, DIO10, SPISSM, SPISWP, SPICLK, SPIMOSI, SPIMISO, SPISSZ -0.3V VDD + 0.3V Storage temperature -40ºC 150ºC 5.2. Operating Conditions Supply Min Max VDD 2.3V 3.6V Ambient temperature range -40ºC 125ºC © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 Appendix A Additional Information A.1 Outline Drawing 18mm 32.2mm 1.27 mm 2.54 mm 2.54 mm 2.76 mm Thickness: 3.5mm Figure 2 JN5142-x01-M00 Outline Drawing 10 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 18mm 9.76mm 6.58 mm 30mm 1.27 mm 2.54 mm 2.54 mm 2.76 mm Thickness: 3.5mm Figure 3 JN5142-x01-M03 Outline Drawing © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 11 A.2 Module PCB Footprint All dimensions are in mm. Note: All modules have the same footprint. Figure 4 Module PCB footprint RF note for –M00 modules with integral antenna: No components, ground plane or tracks on any layer of the mother board should be placed within 20mm of the 3 free sides of the antenna. Tracks etc may be placed adjacent to the can, but should not extend past the can towards the antenna end of the module for 20mm from the antenna. 12 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 A.3 Manufacturing A.3.1 Reflow Profile For reflow soldering, it is recommended to follow the reflow profile in figure 6 as a guide, as well as the paste manufacturers guidelines on peak flow temperature, soak times, time above liquidus and ramp rates. Temperature Target Time (s) 25~160 ºC 160~190 ºC > 220º C 230~Pk. Pk. Temp (235ºC) 90~130 30~60 20~50 10~15 150~270 Figure 5: Recommended solder reflow profile A.3.2 Soldering Paste and Cleaning NXP would not recommend use of a solder paste that requires the module and pcb assembly to be cleaned (rinsed in water) for the following reasons: Solder flux residues and water can be trapped by the pcb, can or components and result in short circuits. The module label could be damaged or removed. NXP recommends use of a 'no clean' solder paste for all its module products. © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 13 A.4 Ordering Information Ordering Code Format: JN5142 - x01 – M / Y1Y2 Y3 Shipping Tape Mounted 500-piece reel Module Type 00 Standard Power, Integral antenna 03 Standard Power, uFl connector Where this Data Sheet is denoted as “Advanced” or “Preliminary”, devices will be either Engineering Samples or Prototypes. Devices of this status have an Rx suffix after the module type to identify qualification status during these product phases - for example, JN5142-X01-M00R1T. Part Number Ordering Code Description JN5142-x01-M00T JN5142-x01-M/00T JN5142 module, variant as detailed above JN5142-x01-M03T JN5142-x01-M/03T Label line 1: IC ID Number Label line 2: FCC ID Number Label line 3: Part Number Label line 4: Barcode Label Label line 5: YYWWTNNNNN (see below) Identifier YY WW NNNNN Description Year Week Module type Serial Number Format 06 (example) 45 (example) IC: 7438A CYO5142M0 FCC ID: TYOJN5142M0 M0 JN51XX-XXX-XXX NXP YYWWTNNNNN Figure 7: Example module labelling for FCC approved modules FCC ID: TYOJN5139M0 Part Name YYWWTNNNNN 14 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 A.5 Tape and Reel Information: A.5.1 Tape Orientation and dimensions All dimensions are in mm Module type: P0 P1 P2 Cover Tape width (W) JN5142-x01-M00 18.4 32.6 44 20.2 1.75 4.0 2.0 24.0 3.4 37.5 JN5142-x01-M03 18.4 30.4 44 20.2 1.75 4.0 2.0 24.0 3.4 37.5 Tolerance ±0.1 ±0.1 ±0.3 ±0.1 +0.1 ±0.1 ±0.1 ±0.1 ±0.1 ±0.1 A.5.2 Cover tape details Thickness (T) 0.061mm Surface resistivity (component side) 10 to 10 Ohms/sq Surface resistivity (component side) Non-conductive Backing type: Polyester Adhesive type: PSA Sealing: Room ambient © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 15 A.5.3 Leader and Trailer 300 MM 300 MM A.5.4 Reel Dimensions: All dimensions are in mm. Module type: W (min) JN5142-x01-M00/03 330 ±1.0 2.2±0.5 13 ±0.2 100 +0.1 44.5 ±0.3 A.6 Related Documents [1] IEEE Std 802.15.4-2003 IEEE Standard for Information Technology – Part 15.4 Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (LR-WPANs) [2] JN-DS-JN5142 Wireless Microcontroller Datasheet 16 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 A.7 Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures: - Reorient or relocate the receiving antenna. - Increase the separation between the equipment and receiver. - Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. - Consult the dealer or an experienced radio/TV technician for help. This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. FCC Caution: Any changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. WARNING! FCC Radiation Exposure Statement: This portable equipment with its antenna complies with FCC‟s RF radiation exposure limits set forth for an uncontrolled environment. To maintain compliance follow the instructions below; 1. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. 2. Avoid direct contact to the antenna, or keep it to a minimum while using this equipment. This transmitter module is authorized to be used in other devices only by OEM integrators under the following condition: The transmitter module must not be co-located with any other antenna or transmitter. As long as the above condition is met, further transmitter testing will not be required. However, the OEM integrator is still responsible for testing their end product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 17 A.7.1 Antennas approved by FCC for use with JN5142 modules Brand Model Number Description Gain (dBi) Connector type Antenna Factor ANT-2.4-CW-RCT-RP Vertical - knuckle antenna 2.2 RP-SMA Antennova 2010B6090-01 Vertical - knuckle antenna 2.2 RP-SMA Hyperlink Technology HG2402RD-RSF Vertical - knuckle antenna 2.2 RP-SMA Aveslink Technology, Inc E-0005-AC Vertical- flying lead RP-SMA Aveslink Technology, Inc E-2411-GC Vertical - swivel RP-SMA Aveslink Technology, Inc E-2410-CA Vertical - bulkhead- flying lead uFL Aveslink Technology, Inc E-2410-GC Vertical - swivel RP-SMA Aveslink Technology, Inc E-2820-CA Vertical - bulkhead- flying lead uFL Aveslink Technology, Inc E-2820-GC Vertical - swivel RP-SMA 10 Aveslink Technology, Inc E-0903-AX Embedded - nickel silver strip None 11 Aveslink Technology, Inc E-0904-AX Embedded - nickel silver strip None 12 Embedded Antenna Design FBKR35068-RS-KR Vertical - knuckle antenna RP-SMA 13 Nearson S131CL-L-PX-2450S Vertical - knuckle-flying lead uFL 14 Laird Technologies WRR2400-IP04 Vertical - knuckle-flying lead 1.5 uFL 15 Laird Technologies WRR2400-RPSMA Vertical - knuckle-flying lead 1.3 RP-SMA 16 Aveslink Technology, Inc E-6170-DA Vertical - right angle uFL 17 Laird Technologies WCR2400-SMRP Vertical - knuckle antenna RP-SMA These antennae or versions with alternative connectors may be used to meet European regulations. This device has been designed to operate with the antennas listed above, and having a maximum gain of 2.2 dBi. Antennas not included in this list or having a gain greater than 2.2 dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms. A.7.2 FCC End Product Labelling The final „end product‟ should be labelled in a visible area with the following: “Contains TX FCC ID: TYOJN5142M0 or TYOJN5142M3” to reflect the version of the module being used inside the product. A.8 Industry Canada Statement To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that permitted for successful communication. These modules have been designed to operate with antennas having a maximum gain of 2.2 dBi. Antennas having a gain greater than 2.2 dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms. As long as the above condition is met, further transmitter testing will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc). A.8.1 Industry Canada End Product Labelling For Industry Canada purposes the following should be used. “Contains Industry Canada ID IC: 7438A-CYO5142M0 or IC: 7438A-CYO5142M3” to reflect the version of the module being used inside the product. 18 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012 A.9 European R & TTE Directive 1999/5/EC Statement All modules listed in this datasheet are compliant with ETSI EN 300 328V1.7.1 (2006/05) and are subject to a Notified Body Opinion. The modules are approved for use with the antennas listed in the following table. Brand Model Number Description Gain (dBi) Connector type Antenna Factor ANT-2.4-CW-RCT-RP Vertical - knuckle antenna 2.2 RP-SMA Antennova 2010B6090-01 Vertical - knuckle antenna 2.2 RP-SMA Hyperlink Technology HG2402RD-RSF Vertical - knuckle antenna 2.2 RP-SMA Aveslink Technology, Inc E-0005-AC Vertical- flying lead RP-SMA Aveslink Technology, Inc E-2411-GC Vertical - swivel RP-SMA Aveslink Technology, Inc E-2410-CA Vertical - bulkhead- flying lead uFL Aveslink Technology, Inc E-2410-GC Vertical - swivel RP-SMA Aveslink Technology, Inc E-2820-CA Vertical - bulkhead- flying lead uFL Aveslink Technology, Inc E-2820-GC Vertical - swivel RP-SMA 10 Aveslink Technology, Inc E-0903-AX Embedded - nickel silver strip None 11 Aveslink Technology, Inc E-0904-AX Embedded - nickel silver strip None 12 Embedded Antenna Design FBKR35068-RS-KR Vertical - knuckle antenna RP-SMA 13 Nearson S131CL-L-PX-2450S Vertical - knuckle-flying lead uFL 14 Laird Technologies WRR2400-IP04 Vertical - knuckle-flying lead 1.5 uFL 15 Laird Technologies WRR2400-RPSMA Vertical - knuckle-flying lead 1.3 RP-SMA 16 Aveslink Technology, Inc E-6170-DA Vertical - right angle uFL 17 Laird Technologies WCR2400-SMRP Vertical - knuckle antenna RP-SMA A.10 RoHS Compliance JN5142-x01-Myy devices meet the requirements of Directive 2002/95/EC of the European Parliament and of the Council on the Restriction of Hazardous Substance (RoHS). The JN5142-x01-M00 and M03 modules meet the requirements of Chinese RoHS requirements SJ/T11363-2006. Full data can be found at www.nxp.com/jennic. A.11 Status Information The status of this Data Sheet is Preliminary. NXP products progress according to the following format: Advanced The Data Sheet shows the specification of a product in planning or in development. The functionality and electrical performance specifications are target values and may be used as a guide to the final specification. NXP reserves the right to make changes to the product specification at anytime without notice. © NXP Laboratories UK 2012 JN-DS-JN5142-x01-Myy 1v0 19 Preliminary The Data Sheet shows the specification of a product that is commercially available, but is not yet fully qualified. The functionality of the product is final. The electrical performance specifications are target values and may be used as a guide to the final specification. Modules are identified with an Rx suffix, for example JN5142-x01-M00R2. NXP reserves the right to make changes to the product specification at anytime without notice. Production This is the production Data Sheet for the product. All functional and electrical performance specifications, where included, including min and max values are derived from detailed product characterization. This Data Sheet supersedes all previous document versions. NXP reserves the right to make changes to the product specification at anytime. A.12 Disclaimers The contents of this document are subject to change without notice. NXP reserves the right to make changes, without notice, in the products, including circuits and/or software, described or contained therein. Information contained in this document regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. NXP warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with NXP‟s standard warranty. Testing and other quality control techniques are used to the extent NXP deems necessary to support this warranty. Except where mandatory by government requirements, testing of all parameters of each product is not necessarily performed. NXP assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work infringement, unless otherwise specified. NXP products are not intended for use in life support systems, appliances or systems where malfunction of these products can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify NXP for any damages resulting from such use. All products are sold subject to NXP's terms and conditions of sale supplied at the time of order acknowledgment. All trademarks are the property of their respective owners. Version Control Version Notes 1.0 1st Issue of Preliminary Datasheet NXP Laboratories UK Ltd Furnival Street Sheffield S1 4QT United Kingdom Tel: +44 (0)114 281 2655 Fax: +44 (0) 114 281 2951 For the contact details of your local NXP office or distributor, refer to the NXP web site: www.nxp.com/jennic 20 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.5 Linearized : No Page Count : 20 Language : en-GB Tagged PDF : Yes Title : JN-DS-JN5142-x01-Myy Author : NXP Laboratories UK Ltd Creator : Microsoft® Office Word 2007 Create Date : 2012:02:02 15:20:56 Modify Date : 2012:02:02 15:20:56 Producer : Microsoft® Office Word 2007EXIF Metadata provided by EXIF.tools