SPU2 Overview Manual

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SPU2 Overview

Copyright © 2002 Sony Computer Entertainment Inc.
All Rights Reserved.
SCE Confidential

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SPU2 Overview Version 6.0

© 2002 Sony Computer Entertainment Inc.
Publication date: April 2002
Sony Computer Entertainment Inc.
1-1, Akasaka 7-chome, Minato-ku
Tokyo 107-0052 Japan
Sony Computer Entertainment America
919 East Hillsdale Blvd.
Foster City, CA 94404, U.S.A.
Sony Computer Entertainment Europe
30 Golden Square
London W1F 9LD, U.K.
The SPU2 Overview is supplied pursuant to and subject to the terms of the Sony Computer Entertainment
PlayStation® license agreements.
The SPU2 Overview is intended for distribution to and use by only Sony Computer Entertainment licensed
Developers and Publishers in accordance with the PlayStation® license agreements.
Unauthorized reproduction, distribution, lending, rental or disclosure to any third party, in whole or in part, of
this book is expressly prohibited by law and by the terms of the Sony Computer Entertainment PlayStation®
license agreements.
Ownership of the physical property of the book is retained by and reserved by Sony Computer Entertainment.
Alteration to or deletion, in whole or in part, of the book, its presentation, or its contents is prohibited.
The information in the SPU2 Overview is subject to change without notice. The content of this book is
Confidential Information of Sony Computer Entertainment.
and PlayStation® are registered trademarks, and GRAPHICS SYNTHESIZERTM and
TM
EMOTION ENGINE are trademarks of Sony Computer Entertainment Inc. All other trademarks are property
of their respective owners and/or their licensors.
®

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About This Manual
The "SPU2 Overview" describes the functions, configuration, and sound generation mechanisms of the SPU2,
the sound processor for the PlayStation 2.
- Chapter 1 "Overview of SPU2" describes the configuration and main functions of the SPU2 and the format
of waveform data used as a sound source.
- Chapter 2 "Sound Generation" describes voice generation using waveform data as a sound source, sound
data stream input/output, mixing, and effects.
- Chapter 3 "Register List" describes the registers that control the SPU2.
- Chapter 4 "Appendix" shows the volume variation rates for values of the envelope rate parameters.
Changes Since Release of 5th Edition
Since release of the 5th Edition of the SPU2 Overview Manual, the following changes have been made.
Note that each of these changes is indicated by a revision bar in the margin of the affected page.
Ch. 2: Sound Generation
• Section 2.2.6. Monaural Output, has been added on page 29.
• A correction has been made to the description following Figure 2-12 Sound Data Output on page 31.
Ch. 4: Appendix
• A correction has been made to the “Time” heading in the Exponential Decrement Mode table on page
76.
• A correction has been made to the “0.1110” row in the Linear Decrement Mode table on page 78.

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Glossary
Term
EE
EE Core
COP0
COP1
COP2
GS
GIF
IOP
SBUS
VPU (VPU0/VPU1)
VU (VU0/VU1)
VIF (VIF0/VIF1)
VIFcode
SPR
IPU
word
qword
Slice
Packet
Transfer list
Tag
DMAtag
GS primitive
Context
GIFtag
Display list

Definition
Emotion Engine. CPU of the PlayStation 2.
Generalized computation and control unit of EE. Core of the CPU.
EE Core system control coprocessor.
EE Core floating-point operation coprocessor. Also referred to as FPU.
Vector operation unit coupled as a coprocessor of EE Core. VPU0.
Graphics Synthesizer.
Graphics processor connected to EE.
EE Interface unit to GS.
Processor connected to EE for controlling input/output devices.
Bus connecting EE to IOP.
Vector operation unit.
EE contains 2 VPUs: VPU0 and VPU1.
VPU core operation unit.
VPU data decompression unit.
Instruction code for VIF.
Quick-access data memory built into EE Core (Scratchpad memory).
EE Image processor unit.
Unit of data length: 32 bits
Unit of data length: 128 bits
Physical unit of DMA transfer: 8 qwords or less
Data to be handled as a logical unit for transfer processing.
A group of packets transferred in serial DMA transfer processing.
Additional data indicating data size and other attributes of packets.
Tag positioned first in DMA packet to indicate address/size of data and address
of the following packet.
Data to indicate image elements such as point and triangle.
A set of drawing information (e.g. texture, distant fog color, and dither matrix)
applied to two or more primitives uniformly. Also referred to as the drawing
environment.
Additional data to indicate attributes of GS primitives.
A group of GS primitives to indicate batches of images.

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Contents
1. Overview of SPU2................................................................................................................................................................... 9
1.1. Features of SPU2 ........................................................................................................................................................... 10
1.1.1. Core.......................................................................................................................................................................... 10
1.1.2. Sound Data Input Function.................................................................................................................................. 10
1.1.3. Voice Processing Function ................................................................................................................................... 10
1.1.4. Sound Data Output Function............................................................................................................................... 11
1.1.5. Digital Effect Processing....................................................................................................................................... 11
1.1.6. Local Memory......................................................................................................................................................... 11
1.1.7. External Output...................................................................................................................................................... 12
1.2. Local Memory ................................................................................................................................................................ 13
1.2.1. Data Allocated in Local Memory ......................................................................................................................... 13
1.2.2. Addressing in Local Memory................................................................................................................................ 14
1.2.3. Interrupt by Access ................................................................................................................................................ 14
1.3. Waveform Data Format................................................................................................................................................ 15
1.3.1. Waveform Data Block ........................................................................................................................................... 15
1.3.2. Endpoint.................................................................................................................................................................. 15
1.3.3. Loop Processing ..................................................................................................................................................... 16
1.4. Reset ................................................................................................................................................................................ 17
2. Sound Generation ................................................................................................................................................................. 19
2.1. Voice Processing ............................................................................................................................................................ 20
2.1.1. Sound Sources......................................................................................................................................................... 20
2.1.2. Pitch Transformation............................................................................................................................................. 22
2.1.3. Pitch Modulation.................................................................................................................................................... 23
2.1.4. Envelope.................................................................................................................................................................. 24
2.1.5. Volume .................................................................................................................................................................... 25
2.1.6. Key-On/Key-Off................................................................................................................................................... 26
2.1.7. Mixing Switch ......................................................................................................................................................... 27
2.2. Sound Data Input Processing....................................................................................................................................... 28
2.2.1. Sound Data Input Area ......................................................................................................................................... 28
2.2.2. Volume Processing................................................................................................................................................. 28
2.2.3. Mixing with Voice Output .................................................................................................................................... 29
2.2.4. Bypass Processing (CORE0) ................................................................................................................................ 29
2.2.5. 32-bit Sound Data Input (CORE1) ..................................................................................................................... 29
2.2.6. Monaural Output.................................................................................................................................................... 29
2.3. Sound Data Output Processing ................................................................................................................................... 30
2.4. Mixing.............................................................................................................................................................................. 32
2.5. Digital Effect Processing .............................................................................................................................................. 33
2.5.1. Signal Flow for Digital Effect Processing........................................................................................................... 33
2.5.2. Work Area for Digital Effect Processing ............................................................................................................ 33
2.5.3. Effect Volume ........................................................................................................................................................ 34
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2.6. Master Volume ...............................................................................................................................................................35
2.7. Interrupt Processing.......................................................................................................................................................36
3. Register List ............................................................................................................................................................................39
3.1. Classification of Registers..............................................................................................................................................40
3.2. Registers in Pairs.............................................................................................................................................................41
VOLL / VOLR : Voice volume......................................................................................................................................42
PITCH : Pitch when sound is generated........................................................................................................................44
ADSR1 / ADSR2 : Envelope..........................................................................................................................................45
ENVX : Current value of envelope ................................................................................................................................46
VOLXL / VOLXR : Current value of volume.............................................................................................................47
PMON0 / PMON1 : Pitch modulation specification..................................................................................................48
NON0 / NON1 : Voice allocation to noise generator................................................................................................49
VMIX* : Mixing specification of voice output .............................................................................................................50
MMIX : Output specification after voice mixing..........................................................................................................51
IRQAH / IRQAL : Interrupt address specification.....................................................................................................52
KON0 / KON1 : Key-on specification.........................................................................................................................53
KOF0 / KOF1 : Key-off specification..........................................................................................................................54
TSAH / TSAL : Transfer start address..........................................................................................................................55
SSAH / SSAL : Starting address of waveform data .....................................................................................................56
LSAXH / LSAXL : Address of loop point ...................................................................................................................57
NAXH / NAXL : Address of waveform data to be read next...................................................................................58
ESAH / ESAL : Starting address in the work area for effect processing .................................................................59
EEAH : End address in the work area for effect processing......................................................................................60
ENDX0 / ENDX1 : Endpoint passing flag .................................................................................................................61
MVOLL / MVOLR : Master volume ............................................................................................................................62
EVOLL / EVOLR : Return volume of effect ..............................................................................................................64
AVOLL / AVOLR : Volume for external input ..........................................................................................................65
BVOLL / BVOLR : Volume for sound data input......................................................................................................66
MVOLXL / MVOLXR : Current value of master volume.........................................................................................67
4. Appendix.................................................................................................................................................................................69
4.1. Rate Parameter Table.....................................................................................................................................................70
4.1.1. +Lin Mode...............................................................................................................................................................71
4.1.2. –Lin Mode ...............................................................................................................................................................72
4.1.3. +Exp Mode (Normal phase).................................................................................................................................73
4.1.4. +Exp Mode (Reverse phase).................................................................................................................................74
4.1.5. –Exp Mode ..............................................................................................................................................................75
4.1.6. Decay Rate (DR) .....................................................................................................................................................76
4.1.7. Sustain Level (SL) ...................................................................................................................................................77
4.1.8. –Lin Mode for Release Rate (RR).........................................................................................................................78
4.1.9. –Exp Mode for Release Rate (RR) .......................................................................................................................79

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1. Overview of SPU2
This chapter provides an overview of the SPU2.

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1.1. Features of SPU2
The SPU2 is a sound synthesis processor, which is composed of two cores. The SPU2 also contains local
memory and external I/O.
The two cores have the ability to:
• Reproduce sound data input successively from the host.
• Process voices.
• Output voice-processed sound data to the host successively.
• Perform digital effect processing.
The following sections describe the SPU2 components and core functions.

1.1.1. Core
The cores (CORE0 and CORE1) are the basic components of the SPU2, each having a sound generation
function with 24 voices. They operate at a frequency of 36.864 MHz, and have a sound generation resolution of
48 kHz. The unit of processing, 1/48000 second, is represented as 1Ts.
When setting the same register successively (e.g. when varying the pitch of a sound consecutively to realize a
portamento), write operations to the register must be at least 1Ts apart. (Write operations to some registers
must be at least 2 Ts apart. For details, refer to the Description for each register in "3. Register List".) If the
register is written in less than the specified time interval (less than 1 Ts when not specified), the SPU2 operations
become indeterminate, and expected results cannot be obtained. This produces serious effects, particularly on
registers working as a switch, such as key-on or key-off.
CORE0 and CORE1 are functionally equal and operate independently. They are connected in such a way that
the output from CORE0 is input to CORE1 and the final mixed sound is output from CORE1.

1.1.2. Sound Data Input Function
The sound data input function processes 16-bit or 32-bit data strings transferred successively from the host to
the SPU2 as sound data, and outputs them by mixing with the voice-processed output. CORE0 and CORE1
each have one stereo input channel.
The input buffer is a reserved area in the local memory. To transfer data smoothly, it uses a double buffer
function, which requests a data transfer when half of the area is processed.
For details, refer to "2.2. Sound Data Input Processing".

1.1.3. Voice Processing Function
Sound in the SPU2 is generated in units of voices. Each core has 24 voices, so the whole SPU2 can generate 48
voices.
Each voice has waveform data compressed by ADPCM as a sound source. After pitch transformation, pitch
modulation and envelope processing, the outputs of each voice are mixed and become the final sound output.

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Sound Source
The sound source is waveform data that has been compressed by ADPCM, and is decoded (decompressed)
by hardware at a sampling rate of 48 kHz. The noise generator of each core can be used as a sound source as
well.
Pitch Transformation
Sound can be generated by varying the pitch of the sound source within the range of -12 octaves to +2
octaves.
Pitch Modulation
The pitch of the sound source can be modulated by using the crest value of another voice.
Envelope Processing
The envelope, which controls volume variation from key-on to key-off, is specified with five parameters:
Attack Rate, Decay Rate, Sustain Rate, Sustain Level and Release Rate. For Attack Rate, Sustain Rate and
Release Rate, non-linear variation can be specified.
Voice Volume
Volume can be set for the L channel and R channel of each voice. Constant, linear and exponential variation
curves can be selected.
Mixing/Switching
24 voices/stereo output (48 channels in total) are synthesized into 2 stereo units in each core. Each voice
can be added to the output or not.
Refer to "2.1. Voice Processing" for details of voice processing.

1.1.4. Sound Data Output Function
Mixed sounds (2 stereo units per core) and a specified two-channel voice can be output to the host successively.
This allows the sound data generated by the SPU2 to be processed by the host processor.
An output buffer is reserved in the local memory. In order to transfer data smoothly, it uses a double buffer
function, which requests a data transfer when half of the area is processed.
Refer to “2.3. Sound Data Output Processing for details.

1.1.5. Digital Effect Processing
Digital effects such as reverb, echo and delay can be applied to the mixed sounds.
Although digital effects can be processed independently in each core, the effects in CORE1 can be reapplied to
the final output from CORE0.
The work area for digital effect processing is in the local memory.
Refer to "2.5. Digital Effect Processing" for details.

1.1.6. Local Memory
The SPU2 has 2 MBytes (16 Mbits) of local memory for its exclusive use. This memory is used as a buffer for
sound data I/O, a waveform data area for voice processing, and a work area for digital effect processing. The
remaining memory can be used freely.

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It is possible to access the local memory from the host via DMA transfer or single transfer. Sound generation
never stops when transferring data, but it might not be correctly executed when overwriting waveform data
being used by the SPU2. To avoid this, an interrupt can be generated for the host when each core accesses a
specific address in the local memory.
Refer to "1.2. Local Memory" for details.

1.1.7. External Output
The SPU2 adopts the following functions as methods of outputting final sounds.
• Digital output through S/PDIF (Sony/Philips Digital Interface)
• Analog output through D/A converter

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1.2. Local Memory
The local memory is memory for the SPU2’s exclusive use; it is used as a data I/O buffer with the host and as a
work area of the SPU2.

1.2.1. Data Allocated in Local Memory
The local memory is divided into the following four areas.

Host
Memory

Host

SPU2

Local
Memory

Sound Data
Output Area
Sound Data
Input Area

Address
(in short-word units)
00 0000
00 1FFF
00 2000
00 27FF
00 2800

Waveform
Data Area

Work Area for
Digital Effect
Delay
Processing

0X XXXX
0? FFFF
0y yyyy
0F FFFF (2 MB)

Figure 1-1 Memory Allocation and Addressing in Local Memory

Sound Data Input Area
This is the sound data input buffer from the host; its address is fixed.
Sound data is successively written from the host, and the written data is sequentially read via hardware and
processed as sound data by the SPU2.
Sound Data Output Area
This is the sound data output buffer from the SPU2 to the host; its address is fixed.
Sound data generated in the SPU2 is written successively, and is readable from the host sequentially.

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Digital Effect Work Areas
The work areas used by the cores for digital effect delay processing are in 2 locations. The start address of
each location can be set freely, but the end address has restrictions on alignment.

1.2.2. Addressing in Local Memory
The local memory is configured in 16-bit units; addresses are allocated every 16 bits (short word). Each address
is specified with a 32-bit value, of which 22 bits are enabled. The lower 20 bits of the 22 bits show a range of 2
Mbytes, and the upper 2 bits are set to 00.
Since the SPU2 registers are configured in 16-bit units, each register which performs addressing is a pair of high
and low registers.
16 bits

00 0000
15

Address H

5

0

128 KB

XX

Higher Address Register

XX 0000

XX YYYY

128 KB
XX FFFF

2 MB
15

Address L

Lower Address Register

0

YYYY

0F FFFF

Figure 1-2 Addressing

1.2.3. Interrupt by Access
When one of the cores accesses a specific address in the local memory, an interrupt can be generated for the
host. The address for generating an interrupt can be set, one per core, with the IRQAH and IRQAL registers.
Interrupts generated by both cores are detected at the same time on the host. A function provided by the sound
library represents which core has generated the interrupt.
CORE0
[IRQAH/L]

Local Memory

Interrupt to Host

Arbitrary
Processing

Figure 1-3 Interrupt by Process Access
(Example: Specification in CORE0)
For details, refer to "2.7. Interrupt Processing".
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1.3. Waveform Data Format
The waveform data that becomes the sound source of each voice is in a format unique to the SPU2, by adopting
ADPCM as a compression method.

1.3.1. Waveform Data Block
Waveform data is configured in units of 16-byte blocks, each of which includes a 16-bit header and 28 4-bit
samples. The following attributes are included in the header.
Field
LOOP/START
LOOP
LOOP/END
DECODE

Bit Position
10
9
8
7:0

15

11

Header

7

Loop Flag
SD3
SD7
SD11
SD15
SD19
SD23
SD27

Sound
Sample
Data
7 short
words

Loop Flag

Contents
Loop point information
Loop existence/non-existence
Endpoint information
Parameter for decoding

15

SD2
SD6
SD10
SD14
SD18
SD22
SD26
11

(reserved)

10
L
O
O
P
/
S
T
A
R
T

3

0

Decode Parameter
SD1
SD0
SD5
SD4
SD9
SD8
SD13
SD12
SD17
SD16
SD21
SD20
SD25
SD24
9
L
O
O
P

8
L
O
O
P
/
E
N
D

Figure 1-4 1 Block of Waveform Data

1.3.2. Endpoint
The number of blocks of waveform data is arbitrary. By setting the LOOP/END bit of the header to 1, the
endpoint is specified, showing the position where the waveform data ends.
When sound generation reaches the block specified as the endpoint, the last sample data of the block is
processed, and then sound generation moves to the block which has the loop point specification immediately
before (i.e. the block shown by the LSAXH/L register). When no loop is specified, the last sample data of the
block is processed, and then muting is applied to the voice in process by hardware. As a result, sound
generation of the voice stops.

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1.3.3. Loop Processing
By setting the LOOP/START bit of the header to 1, the loop point is specified. The header address is
maintained in the LSAXH/L register when sound generation moves to this block, and sound generation moves
to the first sample data of this block after processing the endpoint block.
Only 1 loop point specification can be in effect in a set of waveform data. If there are two or more loop point
blocks, the block closest to the endpoint becomes the loop point when sound is actually generated.
If an address is set in the LSAXH/L register after sound generation has started, the loop point specification in
the waveform data is disregarded until the next time the voice is keyed on, and the set address becomes the loop
point.
For waveform data with a loop point set, the LOOP bit of the header must be set to 1 in all blocks.
[SSAH / L]

LOOP=1

Start Block
[LSAXH / L]

LOOP=1, LOOP/START=1

Loop Point Block

LOOP=1, LOOP/END=1

Endpoint Block

Figure 1-5 Loop Processing

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1.4. Reset
The sound library provides a resetting feature. In resetting, neither register values nor data in the local memory
is guaranteed.

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2. Sound Generation
This chapter describes sound generation in each core.

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2.1. Voice Processing
Voice processing generates sound primarily by decoding waveform data and varying the decoded sound data by
time.
The generated sound is transferable to the host as data, and can also be processed on the host.
The entire flow of voice processing is shown as follows:
OUTX(i-1)

Local Memory

[PITCH]
Pitch
Modulation

[SSAH/L]
[LSAXH/L]

VOL(L)
Control

[ADSR1]
[ADSR2]

[VMIXL]

Envelope
Control

Local Memory
Waveform
data

Sound
Data
Output

[VOLL]
[VOLXL]

[PMON]

ADPCM
Decode

Pitch
Control

Dry L

ƒ°

Wet L

ƒ°

Dry R

[VMIXEL]
[VMIXR]

[NON]

Noise
Generator

ƒ°

Wet R

ƒ°

[VMIXER]

[MMIX]

VOL(R)
Control
[VOLR]
[VOLXR]

OUTX(i)

Figure 2-1 Voice Processing

2.1.1. Sound Sources
Waveform data stored in the local memory or the noise generator (each core has 1 unit) can be used as a sound
source for each voice. This selection is specified by the NON0/1 register.
[PMON0/1]
[PITCH]
[SSAH / L]

Waveform Data

ADPCM
Decoding

Pitch
Processing

Local Memory

[NON0/1]
Noise Generator

Figure 2-2 Switching between Waveform Data and Noise Generator

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When waveform data is the sound source, the address in the local memory where the waveform data is located is
specified by the SSAH/L register of the voice attribute. Specify the location of the header in the waveform data
block to the SSAH/L register.
Since each voice generates a single tone, it is necessary to vary the pitch of the same sound in two or more
voices to generate a chord. In this case, however, the same waveform data address is specified to the SSAH/L
register in each voice.
The waveform data is decoded by hardware. The user can know the decoding progress from each of the
following registers:
• Address of the waveform data to be read next (NAXH/L register)
• Header address in the loop point block (LSAXH/L register: after passing the loop point)
• Endpoint block passing flag (ENDX0/1 register)
The NAXH/L register is incremented as decoding advances and shows up to which sample data the sound
generation has been completed. That is, sound processing has been completed up to the address immediately
preceding the one indicated by the NAXH/L register.
Since the waveform data includes the header, however, the above does not mean all the addresses before the one
indicated by the NAXH/L register have been processed. When replacing the sound-generated waveform data,
replacements can be made in block units up to the block immediately before the one having the address
specified by the NAXH/L register. (However, if a replacement is made at a place between the loop point and
endpoint in waveform data including loop processing, decoding becomes discontinuous and might cause a
noise.)
When decoding advances to the loop point block, the header address in the block is written to the LSAXH/L
register. The loop point can be changed by rewriting the value of this register while sound is being generated 4
Ts after the key-on. (Rewriting within 4 Ts is disregarded.) When rewriting, specify the location of the header in
the waveform data block in the LSAXH/L register. After the change, the address in this LSAXH/L register is
used as a loop point, and the loop point information in the header of the waveform data is disregarded until the
next time the voice is keyed on.
When decoding of the endpoint block is finished, regardless of the presence of the loop, the bit corresponding
to the voice is set to 1 in the ENDX register and kept until the next key-on.

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SSAH/L

LSAXH/L
LOOP/START=1

NAXH/L

ENDX0/1
1

LOOP/END=1

Figure 2-3 Sound Generation Status

2.1.2. Pitch Transformation
Sound can be generated from waveform data by varying the pitch within the range of -12 to +2 octaves. The
pitch transformation is specified by the PITCH register of voice attribute.
Assuming the original pitch of the sound source is f0, the value of the PITCH register is [PITCH], and the
finally generated sound is f, the following expression is met:
f=

[PITCH] f0
212

That is, sound is generated to the pitch of the original sound by specifying 0x1000(=212) in the PITCH register.
The above relationship is met only when the waveform data is sampled at 48 kHz. The sound from waveform
data sampled at a rate other than 48 kHz (24 kHz, for example) is generated one octave higher than the original
sound when specifying 0x1000 in the PITCH register to generate sound.
Assuming the sampling rate to be s kHz, the above-mentioned expression is expanded as follows.
48 [PITCH ]
f0
s
212
If an appropriate value is specified to the PITCH register according to this expression, sound can be generated
to the pitch of the original sound even from the waveform data whose sampling rate is not 48 kHz. However,
the acoustic characteristic varies along with pitch transformation processing.
f=

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-2 octaves

-1 octave

Pitch of
Original Sound

+1 octave

+2 octaves

0x400

0x800

0x1000

0x2000

0x3fff

[PITCH]

Figure 2-4 Pitch Transformation of Waveform Data Sampled at 48 kHz
-1 octave

Pitch of
Original Sound

+1 octave

0x400

0x800

0x1000

[PITCH]

Figure 2-5 Pitch Transformation of Waveform Data Sampled at 24 kHz
When the sound source is the noise generator, the acoustic pitch can be specified in each core by using the
sound library. When there are two or more voices allocated to the noise generator in each core, their sound will
be all generated at the same acoustic pitch.
The speed of sound generation advance changes with the specification of the pitch. The lower the pitch is set,
the slower the advance in the transition of the waveform data address shown by the NAXH/L register becomes.

2.1.3. Pitch Modulation
In two voices with consecutive voice numbers, voice n can be modulated by using the output value from voice
n-1.
The value used for modulation is the product of the crest value immediately after decoding and the envelope
value in the waveform data for voice n-1, which is 1Ts before in terms of time. This is called the OUTX of
voice n-1. OUTX is not reflected in the register.
[PITCH]

Voice n-1

Waveform Data
Decoding
Processing
1Ts before

Voice n

Waveform Data
Decoding

Pitch
Transformation

Envelope
Processing
(OUTX)

[PITCH]

[PMON0/1.Vn]

Pitch
Transformation

Envelope
Processing

Figure 2-6 Pitch Modulation

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Assuming the crest value of voice n-1 used for modulation of voice n to be OUTX and the pitch of voice n to
be P, then P', the value to be used for pitch transformation of voice n, is decided by the following expression.
P' = P (1 + OUTX)
Whether pitch modulation is performed or not can be specified with the PMON0/1 register. When not
performed, the result becomes the same as the case for OUTX=0.

2.1.4. Envelope
The envelope specifies the volume variation by time from key-on to key-off according to the following five
parameters.
Parameter
Attack Rate
Decay Rate
Sustain Level
Sustain Rate

Code
AR
DR
SL
SR

Release Rate

RR

Description
Rising immediately after key-on
Attenuation from the maximum value
Transition point from Decay to Sustain
Attenuation (or increment) from Sustain Level
to key-off
Attenuation after key-off

For Attack Rate, Sustain Rate and Release Rate, curves of variation by time can be selected. Attack Rate and
Release Rate can use two kinds and Sustain Rate can use four kinds of curves as shown in the table below.
Decay Rate is fixed to an exponential decrement curve.
Parameter
Attack Rate
Sustain Rate

Release Rate

Selection
Linear increment (+lin)
Pseudo exponential increment (+exp)
Linear increment (+lin)
Linear decrement(-lin)
Pseudo exponential increment (+exp)
Exponential decrement (-exp)
Linear decrement (-lin)
Exponential decrement (-exp)

Set Value
ADSR1.X=0
ADSR1.X=1
ADSR2.Y=000
ADSR2.Y=010
ADSR2.Y=100
ADSR2.Y=110
ADSR2.Z=0
ADSR2.Z=1

The "pseudo exponential increment" is a variation in line, in which linear volume increment is lowered in
increment rate when 75% of the maximum value (0x6000) is exceeded.

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1
SR(+exp)
DR(-exp)
0.75

SR(+lin)

RR(-lin)

SL
AR(+exp)

SR(-lin)
RR(-exp)

AR(+lin)
SR(-exp)

RR(-lin)
RR(-exp)
0

key-off

key-on

t

Figure 2-7 Parameters for Envelope and Their Curves
The value of the envelope varies successively, but the value is reflected in the ENVX register and can be referred
to. When sound is generated from loop-less waveform data, ENVX is set to 0 regardless of the envelope status,
at the moment the ENDX register bit corresponding to the voice is set to 1.

2.1.5. Volume
In each voice, the volume for the L channel and R channel can be set independently. By setting different values,
the panpot can be configured.
The volume settings are made in the VOLL and VOLR registers.
[VOLL]
Volume(L)
Control

Envelope
Control

Volume(R)
Control
[VOLR]

Figure 2-8 Volume Processing

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The mode specification, by which the volume varies over time, can be set for the L channel and R channel
independently, as in the case of the Sustain Rate of the envelope.
Mode
Direct
+lin
-lin
+exp
-exp

VOLL/R Register Setting
Bit 15=0
Bit 15:13=100
Bit 15:13=101
Bit 15:13=110
Bit 15:13=111

Volume Variation
Constant (No variation)
Linear increment
Linear decrement
Pseudo exponential increment
Exponential decrement

First specify the standard volume in direct mode and start sound generation, even when specifying a mode other
than Direct mode. If a mode other than Direct mode is specified again later with a variation rate, variation of
the volume starts instantly.
The phase can be reversed by setting a negative value in Direct mode.
1
+exp

+lin

0.75
Direct

-exp

0

Key on

-lin

VOLL/R
Register Setting

t

Figure 2-9 Volume Variation by Time
The volume varies successively in modes other than Direct mode, but the value is reflected in the VOLX register
and can be referred to.

2.1.6. Key-On/Key-Off
Key-on (starting sound generation) and key-off (stopping sound generation) can be controlled by the KON0/1
and KOF0/1 registers, respectively, for each voice.
At key-on, sound generation of the waveform data indicated by the SSAH/L register is started according to the
parameters of pitch, envelope, volume, etc.
At key-off, the envelope enters the Release phase and sound generation stops according to the Release Rate.
If there is no loop specification in the waveform data, sound generation of the voice ends when reaching the
endpoint block of waveform data even before key-off, and muting is applied by hardware.

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2.1.7. Mixing Switch
The output from each voice is mixed into four channels of Dry L, Wet L, Dry R and Wet R in each core
through the control of the mixing switch.
For the mixing switch, on/off of each voice’s output to the corresponding channels is specified in the
VMIXL0/1, VMIXR0/1, VMIXEL0/1 and VMIXER0/1 registers. When a voice’s output to all the channels is
off, it is equivalent to a voice to which muting is applied.
The mixing results are successively stored in the local memory sound data output area, and become the final
output from the core through switching by the MMIX register at the same time.
For the final output, on/off can be specified for Dry L, Wet L, Dry R and Wet R independently. Turning all the
MMIX switches off is equivalent to applying muting to all the voice outputs.
Channel
Dry L (Voice direct output)
Dry R (Voice direct output)
Wet L (Voice effect output)
Wet R (Voice effect output)

Mixing Switch
VMIXL0/1
VMIXR0/1
VMIXEL0/1
VMIXER0/1

Output Switch
MMIX.MSNDL
MMIX.MSNDR
MMIX.MSNDEL
MMIX.MSNDER

Volume(L)
Control
Dry L
Wet L
Dry R
Wet R
Volume(R)
Control

Mixing
Mixing of
Switches for All Voices
Each voice
to 4 Channels
[VMIXL]
[VMIXEL]
[VMIXR]
[VMIXER]

Switches for
To Sound Data
Mixing Results
Output Area
in Local Memory [MMIX]

Figure 2-10 Voice Mixing

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2.2. Sound Data Input Processing
Successive 16-bit data (little endian) transfer to the local memory sound data input area by the host enables the
SPU2 to apply volume processing to the data as sound data, mix it with the output from voice processing, and
then apply digital effects to it. It is also possible to output the sound data to the output block directly by
bypassing the internal processing in the SPU2.

2.2.1. Sound Data Input Area
Each core is provided with one stereo unit as the sound data input. The addresses in the input area are as
follows. These areas are reserved areas, and other data cannot be placed there.
Address
2000-21FF
2200-23FF
2400-25FF
2600-27FF

Area
CORE0 MEMIN(L)
CORE0 MEMIN(R)
CORE1 MEMIN(L)
CORE1 MEMIN(R)

Description
CORE0 L channel sound data input area
CORE0 R channel sound data input area
CORE1 L channel sound data input area
CORE1 R channel sound data input area

The sound data input area is 512 short words (1024 bytes) in size and is composed of double buffers of 256
short words.
Data transfer to the sound data input area can be realized easily by using the Auto DMA write transfer. For
details, refer to the appropriate sound library document.
Local Memory

Host
[MINL/R]
[MINEL/ER]

Volume
[BVOL]

Voice
Processing

Figure 2-11 Sound Data Input

2.2.2. Volume Processing
The volume can be set to the sound obtained from the sound data input with the BVOLL and BVOLR registers.
However, the mode of variation by time cannot be specified and the constant mode is always set.

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2.2.3. Mixing with Voice Output
The sound obtained from the sound data input can be mixed with the Dry L/Wet L/Dry R/Wet R channel of
the voice output. This is controlled by the flags of the MMIX register.
Sound Data Input
MEMIN(L)
MEMIN(R)
MEMIN(EL)
MEMIN(ER)

Voice Output
Dry L
Dry R
Wet L
Wet R

Switch
MMIX.MINL
MMIX.MINR
MMIX.MINEL
MMIX.MINER

2.2.4. Bypass Processing (CORE0)
It is possible to specify a mode that connects directly to the S/PDIF digital output of the output block by
bypassing internal processing, for sound data input to CORE0. Since volume processing is not performed, the
encoded data, which is not ordinary 16-bit digital data, can be directly output from the host.
In this mode, however, CORE1 output, the final output from the core, is not connected to the S/PDIF digital
output. Moreover, this switching is performed only for the S/PDIF digital output and sound data input to
CORE0 cannot be directly connected to the D/A converter output. For details, refer to the appropriate sound
library document.

2.2.5. 32-bit Sound Data Input (CORE1)
It is possible to specify a mode that connects directly to the output block by bypassing the internal processing,
for sound data input to CORE1. In this mode, the sound data input is processed in 32-bit units (24 bits enabled
and lower 8 bits disabled). It can mix the 32-bit data (little endian) transferred from the host as higher quality
digital data with the D/A converter output or the S/PDIF digital output.
The sound data input area is processed in 32-bit units in this mode. Since the unit of data volume doubles, the
speed of data reading also doubles.
For details, refer to the appropriate sound library document.

2.2.6. Monaural Output
The SPU2 does not have the ability to generate monaural sound from the sound obtained from the sound data
input. If monaural output is required, prepare monaural sound data at the authoring level.

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2.3. Sound Data Output Processing
The SPU2 can write the generated 16-bit sound data to the local memory sound data output area at any time.
Various processes can be applied to the sound data being generated by the SPU2 by reading the data successively
on the host.
The contents of the sound data to be output and the output area are fixed as shown in the table. This area is a
reserved area, and cannot be used for other purposes.
Core
CORE0

Channel
Voice1
Voice3

CORE1

MEMOUT(L)
MEMOUT(R)
MEMOUT(EL)
MEMOUT(ER)
SIN(L)
SIN(R)
Voice1
Voice3
MEMOUT(L)
MEMOUT(R)
MEMOUT(EL)
MEMOUT(ER)

Contents
Crest value after multiplication of
envelope in voice1
Crest value after multiplication of
envelope in voice3
Dry L after mixing 24 voices
Dry R after mixing 24 voices
Wet L after mixing 24 voices
Wet R after mixing 24 voices
CORE0 output L
CORE0 output R
Crest value after multiplication of
envelope in voice1
Crest value after multiplication of
envelope in voice3
Dry L after mixing 24 voices
Dry R after mixing 24 voices
Wet L after mixing 24 voices
Wet R after mixing 24 voices

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Output Area
000400 – 0005FF
000600 – 0007FF
001000 – 0011FF
001200 – 0013FF
001400 – 0015FF
001600 – 0017FF
000800 – 0009FF
000A00 – 000BFF
000C00 – 000DFF
000E00 – 000FFF
001800 – 0019FF
001A00 – 001BFF
001C00 – 001DFF
001E00 – 001FFF

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Local Memory
Host 00 0000
00 0400

00 1FFF

(Reserved)

Voice
Processing

CORE0 Voice1
CORE0 Voice3
CORE1 SIN(L)
CORE1 SIN(R)
CORE1 Voice1
CORE1 Voice3
CORE0 MEMOUT(L)
CORE0 MEMOUT(R)
CORE0 MEMOUT(EL)
CORE0 MEMOUT(ER)
CORE1 MEMOUT(L)
CORE1 MEMOUT(R)
CORE1 MEMOUT(EL)
CORE1 MEMOUT(ER)

Mixing

Voice
Processing

Mixing
Output Block

Figure 2-12 Sound Data Output
The output area is 512 short words (1024 bytes) in size for each channel, and is composed of double buffers of
256 short words each.
Data can be read easily from the sound data output area by using the Auto DMA read transfer. For details, refer
to the appropriate sound library document.

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2.4. Mixing
Mixing performs volume processing and switching to voice output, sound data input and external input, and
distributes the data to direct output and digital effects.
Each core has the following four sources:
Source
Voice Direct Output
(Dry L/R)
Voice Effect Output
(Wet L/R)
Sound Data Input
External Input
(Final Output from CORE0)

Volume
-

Switch
MMIX.MSNDL/R

Destination
Direct Output

-

MMIX.MSNDEL/ER

Digital Effect

BVOLL/R

MMIX.MINL/R
MMIX.MINEL/ER
MMIX.SINL/R
MMIX.SINEL/ER

Direct Output
Digital Effect
Direct Output
Digital Effect

AVOLL/R

* External input is performed only to CORE1.
Dry L/R
Voice
Processing

[MSNDL/R]

Wet L/R [MSNDEL/ER]

To Direct
Output

[MINL/R]

Sound Data
Input

[MINEL/ER]
Volume
[BVOL]
[SINL/R]

External
Input

[SINEL/ER]
Volume

To Digital
Effect

[AVOL]

Figure 2-13 Mixing
For sound data input and external input, only the constant mode is set for volume variation with time.

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2.5. Digital Effect Processing
Various sound effects such as reverb, echo and delay can be added by performing digital effect processing on the
sounds generated by each core and input from the sound data input.
For other digital effect procedures, refer to the sound library document.

2.5.1. Signal Flow for Digital Effect Processing
The input to digital effect processing is the mixture of the following sound sources as described in "2.4. Mixing".
• Voice Effect Output (Wet L/R)
• Sound Data Input
• External Input *CORE1 only
However, various connection forms can be taken by passing through the host with switch on/off setting and
sound data output function.
CORE0

CORE1
Voice
Processing

Voice
Processing
Mixing

Effect
Volume

Sound
Data Input

Sound
Data Input

Mixing

Effect
Volume

[EVOL]
Digital
Effect

To
Output
Block

[EVOL]
External
Input

Digital
Effect

Local Memory

Figure 2-14 Signal Flow of Digital Effects

2.5.2. Work Area for Digital Effect Processing
When performing digital effect processing, it is necessary to reserve a work area in the local memory.
The start address of the work area is specified with the ESAH/L register and the end address is specified with
the EEAH register.
Decide the start address by totaling the size required by each delay block for digital effects.
The end address is specified in the upper 6 bits only, and it is assumed that the lower 16 bits are 0xFFFF. That
is, the end address in the work area is always on a 64K short-word (128 KB) boundary in the local memory.

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CORE0
[ESAH / L]

CORE1
[ESAH / L]

CORE0
[EEAH]

Digital Effect
Work Area
for CORE0

0? FFFF

CORE1
[EEAH]

Digital Effect
Work Area
for CORE1

0? FFFF

Figure 2-15 Work Area for Digital Effects

2.5.3. Effect Volume
When the output from a digital effect is mixed with the direct output, volume control can be performed to the
output from the digital effect.
The effect volume is set with the EVOLL/R register. The panpot of the effect can be decided by setting the L
channel and R channel independently. Only the constant mode is set for the variation with time.
The volume set by the EVOLL/R register corresponds to the return volume of the effect. The following
volume settings of each source correspond to the send volume respectively.
Source
Voice Output
Sound Data Input
External Input

Send Volume
VOLL/R
BVOLL/R
AVOLL/R

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Remarks
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2.6. Master Volume
The final volume is determined by adding the master volume to the mixing result of the output from the digital
effect and direct output (Dry L/R). The master volume of the L channel and R channel can be set
independently by the MVOLL and MVOLR register. By setting the values, the whole panpot is decided.
To
Output

Mixing
Effect
Volume
[EVOLL/R]

Master
Volume
[MVOLL/R]

Digital
Effect

Figure 2-16 Master Volume Processing
The mode of varying the master volume with time can be specified as follows, as well as the voice volume:
Mode
Direct
+lin
-lin
+exp
-exp

MVOLL/R Register Setting
Bit 15=0
Bit 15:13=100
Bit 15:13=101
Bit 15:13=110
Bit 15:13=111

Volume Variation
Constant (no variation with time)
Linear increment
Linear decrement
Pseudo exponential increment
Exponential decrement

The L channel and R channel can be specified independently for the volume mode as well.
When specifying a mode other than "Direct", first specify the standard volume value in Direct mode. Then, the
volume variation starts when other volume mode variation rates are re-specified. Moreover, the phase can be
reversed by specifying a negative value as a variation rate.
The current value of the master volume can be read from the MVOLXL/MVOLXR register.

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2.7. Interrupt Processing
In most SPU2 processing, when each core accesses a specific address in the local memory, an interrupt can be
generated to the host. The address where an interrupt is generated is set by the IRQAH and IRQAL registers.
CORE 0
[IRQAH / L]

Local Memory

Interrupt to Host

Arbitrary
Processing

CORE 1
[IRQAH / L]

Figure 2-17 Interrupt Processing
No matter which core accesses this address, an interrupt is generated. Interrupts generated by both cores are
detected at the same time on the host. An interface provided by the sound library represents which core has
generated the interrupt.
In the following situations, there are limitations and warnings applied to the relationship between each core's
access and interrupts.
Initial state and waveform data without a loop
Voices without key-on after resetting the SPU2, and voices generated after decoding the LOOP/END block
of loop-less waveform data, access the local memory unnecessarily (free-run the entire local memory area) as
an internal operation of the SPU2. This may cause an unexpected interrupt.
Therefore, when applying an interrupt to loop-less waveform data, suppress unnecessary accesses from a
voice not in process, by adding a soundless block whose LOOP/START, LOOP, and LOOP/END bits are
set to 1 to the end of the data. (For waveform data format, refer to "1.3. Waveform Data Format".) Actions
for the voices to which key-on has not been applied after resetting are handled via the sound library.
Position of waveform data which sets interrupt generation address
If an address between the starting and end addresses in waveform data is specified to the SSAH/L or
LSAXH/L register by mistake and the IRQA/H register is specified to the same address, an interrupt does
not occur.
Local memory data transfer
When local memory data transfer is performed, the internal pointer stays at the following addresses at the
end of the transfer:
Transfer from host to local memory: TSAH/L + Data Size + 1
Transfer from local memory to host: TSAH/L + Data Size + 0 x 20
(Both are in short-word units)

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Therefore, if the IRQAH/L register has been set at these positions, an interrupt occurs after the transfer has
been ended.
Digital effect processing
When digital effect processing is disabled, interrupts by digital effect processing are not generated even if the
interrupt generation address is specified to the digital effect work area.

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3. Register List

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3.1. Classification of Registers
The registers of the SPU2 are classified as follows:
Voice basic parameter registers
These registers show the basic parameters of each voice. Each voice in each core has a set of registers.
Voice control parameter registers
These registers control on/off of each function in voice processing. Each core has a set of registers.
Addressing registers
These registers perform address specification in the local memory. The registers, which show the upper 6
bits and the lower 16 bits in the address, are paired. Each core has a set of registers.
Digital effect addressing registers
These registers perform addressing related to digital effects. The registers, which show the upper 6 bits and
the lower 16 bits in the address, are paired. Each core has a set of registers.
Volume registers
These registers specify the mixing volume of each voice. Each core has a set of registers.

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3.2. Registers in Pairs
The SPU2 registers include registers to be used in pairs.
Addresses in the local memory are specified by a pair of registers showing the upper 6 bits and the lower 16 bits
of one address. For example, the starting address of the waveform data for each voice is maintained in the
SSAH register (the upper 6 bits) and the SSAL register (the lower 16 bits). Therefore, SSAH and SSAL are
treated as a pair and written as the SSAH/L register.
The EEAH register is an exception to the addressing registers, and does not include a register which shows the
lower 16 bits.
Registers that specify the switching for each voice are composed of a pair of registers corresponding to Voice 015 and Voice 16-23. As for the specification of the voice output to the Dry L channel, for example, Voice0-15
and Voice16-23 are specified by the VMIXL0 register and VMIXL1 register respectively. These two registers
are treated as a pair and written as the VMIXL0/1 register.

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VOLL / VOLR : Voice volume

Constant specification mode (direct mode)
15

12

8

4

0

VALUE

0
Name
VALUE

Pos.
14:0

Format
int 1:0:14

Contents
Constant volume value
The phase reverses for a negative value.

Linear increment mode (+lin mode)
15

1

12

0

Name
VALUE
X

0

X

Pos.
6:0
12

8

4

(reserved)

Format
int 0:7:0
int 0:1:0

0

VALUE

Contents
Addition constant per Ts
Polarity specification
0 Normal phase (specifiable when the current
value is positive.)
Linear increment to +1.0
1 Reverse phase (specifiable when the current
value is negative.)
Linear decrement to –1.0

Linear decrement mode (-lin mode)
15

1

12

0

Name
VALUE
X

1

X

Pos.
6:0
12

8

(reserved)

Format
int 0:7:0
int 0:1:0

4

0

0

VALUE

Contents
Subtraction constant per Ts
Polarity specification
0 Normal phase (specifiable when the current
value is positive.)
Linear decrement to 0
1 Reverse phase (specifiable when the current
value is negative.)
Linear increment to 0

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Pseudo inverse-exponential increment mode (+exp mode)
15

1

12

1

Name
VALUE
X

0

X

Pos.
6:0
12

8

(reserved)

Format
int 0:7:0
int 0:1:0

4

0

0

VALUE

Contents
Addition constant per Ts
Polarity specification
0 Normal phase (specifiable when the current
value is positive.)
Increment to +1.0 in a line
1 Reverse phase (specifiable when the current
value is negative.)
Decrement to –1.0 in a line

Exponential decrement mode (-exp mode)
15

1

12

1

Name
VALUE

1
Pos.
6:0

8

(reserved)

Format
int 0:7:0

4

0

0

VALUE

Contents
Multiplication constant per Ts

Description
These registers specify the volume for each voice.
The values of the upper three bits specify the pattern of the volume variation with time. When specifying a
mode other than constant mode, the volume value varies with time, because the value corresponding to the
value of the VALUE field is added to, subtracted from or multiplied by the volume value per Ts.
For the relationship between the VALUE field value and actual volume duration, refer to "4.1. Rate
Parameter Table".

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PITCH : Pitch when sound is generated
15

0

12

8

0

Name
VALUE

4

0

VALUE

Pos.
13:0

Format
int 0:14:0

Contents
Pitch specification value

Description
This register specifies the pitch (degree of highness or lowness of sound) of each voice.
Assuming the pitch of the original sound (waveform data) to be f0, the relationship between the VALUE, or
the pitch specification, and the pitch f, from which sound is generated, is as follows:

VALUE
f0
4096
When the sound source is a noise generator, there is no acoustic variation even though the pitch
specification is changed. The pitch of the noise can be specified for each core by using the sound library.
f =

Notes
Pitch specification affects the progressing speed of sound generation. The lower the pitch is specified, the
slower the sound generation proceeds.

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ADSR1 / ADSR2 : Envelope

ADSR1
15

12

X

8

4

Name
SL
DR
AR
X

Pos.
3:0
7:4
14:8
15

SL

DR

AR

Format
int 0:4:0
int 0:4:0
int 0:7:0
int 0:1:0

0

Contents
Sustain Level
Decay Rate
Attack Rate
Mode specification for Attack Rate
0 Linear increment mode (+lin mode)
1 Pseudo exponential increment mode
(+exp mode)

ADSR2
15

12

8

4

Z

SR

Y

Name
RR
Z

Pos.
4:0
5

Format
int 0:5:0
int 0:1:0

SR
Y

12:6
15:13

int 0:7:0
int 0:3:0

0

RR

Contents
Release Rate
Mode specification for Release Rate
0 Linear decrement mode (-lin mode)
1 Exponential decrement mode (-exp mode)
Sustain Rate
Mode specification for Sustain Rate
000 Linear increment mode (+lin mode)
010 Linear decrement mode (-lin mode)
100 Pseudo exponential increment mode
(+exp mode)
110 Exponential decrement mode
(-exp mode)

Description
These registers specify each parameter for the envelope.
For the relationship between the Rate/Level field values and actual envelope duration, refer to "4.1. Rate
Parameter Table".

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SPU2 Overview Version 6.0

ENVX : Current value of envelope
15

12

8

4

0

VALUE

Name
VALUE

Pos.
15:0

Format
int 1:0:15

Contents
Current value of envelope

Description
This register indicates the current value of the envelope.
When SR and RR for the envelope specify linear decrement, a negative value is set only for 1 Ts.
When sound is generated from loop-less waveform data, ENVX is set to 0 regardless of the envelope status,
at the moment the ENDX register bit corresponding to the voice is set to 1.

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SPU2 Overview Version 6.0

VOLXL / VOLXR : Current value of volume
15

12

8

4

0

VALUE

Name
VALUE

Pos.
15:0

Format
int 1:0:15

Contents
Current value of voice volume

Description
These registers indicate the current volume of each voice.
When VOL is in a mode other than constant specification mode, the value varies per Ts according to the
volume variation.

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SPU2 Overview Version 6.0

PMON0 / PMON1 : Pitch modulation specification

PMON0
15

V
15

12

V
14

Name
V1

V
13

8

V
12

Pos.
1

(Omitted)
V15
15

V
11

V
10

V
9

V
8

4

V
7

V
6

V
5

V
4

0

V
3

V
2

V
1

-

V
17

V
16

Format
int 0:1:0

Contents
Pitch modulation specification for Voice1
0 Pitch modulation off
1 Pitch modulation by Voice0 output

int 0:1:0

Pitch modulation specification for Voice15
0 Pitch modulation off
1 Pitch modulation by Voice14 output

PMON1
15

12

(reserved)
Name
V16

Pos.
0

(Omitted)
V23
7

8

4

V
23

V
22

V
21

V
20

0

V
19

V
18

Format
int 0:1:0

Contents
Pitch modulation specification for Voice16
0 Pitch modulation off
1 Pitch modulation by Voice15 output

int 0:1:0

Pitch modulation specification for Voice23
0 Pitch modulation off
1 Pitch modulation by Voice22 output

Description
These registers specify whether to apply the pitch modulation to each voice by using the crest value of the
voice of a number lower.
Voice0 is disabled.

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SPU2 Overview Version 6.0

NON0 / NON1 : Voice allocation to noise generator

NON0
15

V
15

12

V
14

Name
V0

V
13

V
12

Pos.
0

(Omitted)
V15
15

8

V
11

V
10

V
9

V
8

4

V
7

V
6

V
5

V
4

0

V
3

V
2

Format
int 0:1:0

Contents
Sound source specification for Voice0
0 Waveform data
1 Noise generator

int 0:1:0

Sound source specification for Voice15
0 Waveform data
1 Noise generator

V
1

V
0

V
17

V
16

NON1
15

12

8

(reserved)
Name
V16

Pos.
0

(Omitted)
V23
7

4

V
23

V
22

V
21

V
20

0

V
19

V
18

Format
int 0:1:0

Contents
Sound source specification for Voice16
0 Waveform data
1 Noise generator

int 0:1:0

Sound source specification for Voice23
0 Waveform data
1 Noise generator

Description
These registers specify whether to allocate each voice to the noise generator as a sound source.

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SPU2 Overview Version 6.0

VMIX* : Mixing specification of voice output

VMIXL0, VMIXEL0, VMIXR0, VMIXER0
15

V
15

12

V
14

Name
V0

V
13

V
12

Pos.
0

(Omitted)
V15
15

8

V
11

V
10

V
9

V
8

4

V
7

V
6

V
5

V
4

0

V
3

V
2

Format
int 0:1:0

Contents
Output switch for Voice0
0 No output to applicable channel.
1 Output to applicable channel.

int 0:1:0

Output switch for Voice15
0 No output to applicable channel.
1 Output to applicable channel.

V
1

V
0

V
17

V
16

VMIXL1, VMIXEL1, VMIXR1, VMIXER1
15

12

8

(reserved)
Name
V16

Pos.
0

(Omitted)
V23
7

4

V
23

V
22

V
21

V
20

0

V
19

V
18

Format
int 0:1:0

Contents
Output switch for Voice16
0 No output to applicable channel.
1 Output to applicable channel.

int 0:1:0

Output switch for Voice23
0 No output to applicable channel.
1 Output to applicable channel.

Description
These registers specify whether to output the output from each voice to each channel of Dry L/Wet L/Dry
R/Wet R. Each register corresponds to each channel as shown below.
Register
VMIXL0
VMIXL1
VMIXEL0
VMIXEL1
VMIXR0
VMIXR1
VMIXER0
VMIXER1

Channel
Dry L (Direct output (L))
Dry L (Direct output (L))
Wet L (Effect output (L))
Wet L (Effect output (L))
Dry R (Direct output (R))
Dry R (Direct output (R))
Wet R (Effect output (R))
Wet R (Effect output (R))

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SPU2 Overview Version 6.0

MMIX : Output specification after voice mixing
15

12

(reserved)

Name
SINER
SINEL
SINR
SINL
MINER
MINEL
MINR
MINL
MSNDER
MSNDEL
MSNDR
MSNDL

Pos.
0
1
2
3
4
5
6
7
8
9
10
11

M
S
N
D
L

M
S
N
D
R

Format
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0
int 0:1:0

M
S
N
D
E
L

8

M
S
N
D
E
R

M
I
N
L

M
I
N
R

M
I
N
E
L

4

M
I
N
E
R

S
I
N
L

S
I
N
R

S
I
N
E
L

0

S
I
N
E
R

Contents
External input (R) ! Effect output
External input (L) ! Effect output
External input (R) ! Direct output
External input (L) ! Direct output
Sound data input (R) ! Effect output
Sound data input (L) ! Effect output
Sound data input (R) ! Direct output
Sound data input (L) ! Direct output
Voice output Wet R ! Effect output
Voice output Wet L ! Effect output
Voice output Dry R ! Direct output
Voice output Dry L ! Direct output

Description
This is a switching specification register, which divides the voice, sound data input and external input into
direct output and digital effect. When each bit is 0, the output is off. When 1, the output is on.
For SINL/R and SINEL/ER, specify 0 in CORE0 at all times.

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SPU2 Overview Version 6.0

IRQAH / IRQAL : Interrupt address specification

IRQAH
15

12

8

4

ADDRH

(reserved)

Name
ADDRH

Pos.
5:0

Format
int 0:6:0

0

Contents
Local memory address where an interrupt is
generated (upper 6 bits)

IRQAL
15

12

8

4

0

ADDRL

Name
ADDRL

Pos.
15:0

Format
int 0:16:0

Contents
Local memory address where an interrupt is
generated (lower 16 bits)

Description
When each core accesses a specific address in the local memory, an interrupt can be generated for the host.
The above registers specify the address.
For details, refer to "2.7. Interrupt Processing".

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SPU2 Overview Version 6.0

KON0 / KON1 : Key-on specification

KON0
15

V
15

12

V
14

V
13

V
12

Name
Pos.
V0
0
(Omitted)
V15
15

8

V
11

V
10

V
9

V
8

4

V
7

V
6

V
5

V
4

Format
int 0:1:0

Contents
Key-on switch of Voice0

int 0:1:0

Key-on switch of Voice15

0

V
3

V
2

V
1

V
0

V
19

V
18

V
17

V
16

KON1
15

12

8

(reserved)

Name
Pos.
V16
0
(Omitted)
V23
7

4

V
23

V
22

V
21

V
20

Format
int 0:1:0

Contents
Key-on switch of Voice16

int 0:1:0

Key-on switch of Voice23

0

Description
These registers specify key-on (start of sound generation) of each voice. When writing these registers, the
sound generation of the voice, which corresponds to the bit set to 1 among the written values, is started.
Notes
The value read from this register does not reflect the voice that has actually been generated.
Do not write to any bits of the same register (KON0 or KON1) twice within 2 Ts. The period of time
between commands may not be sufficient for the commands to execute properly.
Do not specify key-on and key-off of the same voice within 2 Ts. If specified, the voice which actually starts
/ ends sound generation is indeterminate.
Key-on can be specified for the voice in the process of sound generation, by writing 1 to the bit again
without specifying key-off.

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SPU2 Overview Version 6.0

KOF0 / KOF1 : Key-off specification

KOF0
15

V
15

12

V
14

V
13

V
12

Name
Pos.
V0
0
(Omitted)
V15
15

8

V
11

V
10

V
9

V
8

4

V
7

V
6

V
5

V
4

Format
int 0:1:0

Contents
Key-off switch of Voice0

int 0:1:0

Key-off switch of Voice15

0

V
3

V
2

V
1

V
0

V
19

V
18

V
17

V
16

KOF1
15

12

8

(reserved)
Name
Pos.
V16
0
(Omitted)
V23
7

4

V
23

V
22

V
21

V
20

Format
int 0:1:0

Contents
Key-off switch of Voice16

int 0:1:0

Key-off switch of Voice23

0

Description
These registers specify key-off (end of sound generation) of each voice. When writing these registers, the
envelope of the voice, which corresponds to the bit set to 1 among the written values, goes to the release
phase.
Notes
Do not write to any bits of the same register (KOF0 or KOF1) twice within 2 Ts. The period of time
between commands may not be sufficient for the commands to execute properly.
Do not specify key-on and key-off of the same voice within 2 Ts. If specified, the voice which actually starts
/ ends sound generation is indeterminate.

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SPU2 Overview Version 6.0

TSAH / TSAL : Transfer start address

TSAH
15

12

8

4

(reserved)

Name
ADDRH

Pos.
5:0

Format
int 0:6:0

0

ADDRH

Contents
The starting address of the transfer area in the
local memory (upper 6 bits)

TSAL
15

12

8

4

0

ADDRL

Name
ADDRL

Pos.
15:0

Format
int 0:16:0

Contents
The starting address of the transfer area in the
local memory (lower 16 bits)

Description
These registers specify the starting address in the local memory area, which becomes the source/destination
in DMA read transfer, DMA write transfer, Auto DMA read transfer and single write transfer.
In the SSAL, which specifies the starting address of the waveform data (lower 16 bits) to the voice, the lower
3 bits must be specified to 0 when transferring the waveform data to the local memory. Therefore, in the
case of the TSAL, it is also necessary to transfer data to the address whose lower 3 bits are set to 0.
Notes
The value is invariant regardless of the transfer execution status.
If the value is changed during data transfer, operation and transferred data become indeterminate.

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SPU2 Overview Version 6.0

SSAH / SSAL : Starting address of waveform data

SSAH
15

12

8

4

(reserved)

Name
ADDRH

Pos.
5:0

0

ADDRH

Format
int 0:6:0

Contents
Starting address of waveform data (upper 6
bits)

SSAL
15

12

8

4

0

ADDRL

Name
ADDRL

Pos.
15:0

Format
int 0:16:0

0

0

0

Contents
Starting address of waveform data (lower 16
bits; 0 is specified to lower 3 bits)

Description
These registers specify the starting address of the waveform data, which becomes the sound source of each
voice.

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SPU2 Overview Version 6.0

LSAXH / LSAXL : Address of loop point

LSAXH
15

12

8

4

ADDRH

(reserved)

Name
ADDRH

Pos.
5:0

Format
int 0:6:0

0

Contents
Loop point address (upper 6 bits)

LSAXL
15

12

8

4

0

ADDRL

Name
ADDRL

Pos.
15:0

Format
int 0:16:0

0

0

0

Contents
Loop point address (lower 16 bits; when
writing, 0 is specified to lower 3 bits)

Description
These registers show the starting address of the block specified as a loop point (the block whose
LOOP/START bit of the header is set to 1) in the waveform data. These are set when the loop point block
is passed through with the advance of sound generation.
The loop point can be set or changed by writing the address of an appropriate block header to this register
during sound generation (4 Ts after the key-on). (Rewriting within 4 Ts is disregarded.) In this case, the
loop point specification of the waveform data is disregarded temporarily until the next time the voice is
keyed on.

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SPU2 Overview Version 6.0

NAXH / NAXL : Address of waveform data to be read next

NAXH
15

12

8

4

ADDRH

(reserved)

Name
ADDRH

Pos.
5:0

Format
int 0:6:0

0

Contents
Address of the waveform data to be read next
(upper 6 bits)

NAXL
15

12

8

4

0

ADDRL

Name
ADDRL

Pos.
15:0

Format
int 0:16:0

Contents
Address of the waveform data to be read next
(lower 16 bits)

Description
These registers show the address of the waveform data to be read next. They are updated automatically with
the advance of sound generation.

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SPU2 Overview Version 6.0

ESAH / ESAL : Starting address in the work area for effect processing

ESAH
15

12

8

4

ADDRH

(reserved)

Name
ADDRH

Pos.
5:0

Format
int 0:6:0

0

Contents
Starting address in the work area for effect
(upper 6 bits)

ESAL
15

12

8

4

0

ADDRL

Name
ADDRL

Pos.
15:0

Format
int 0:16:0

Contents
Starting address in the work area for effect
(lower 16 bits)

Description
These registers specify the starting address in the work area to be used for digital effect processing.

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SPU2 Overview Version 6.0

EEAH : End address in the work area for effect processing

EEAH
15

12

8

4

(reserved)

Name
ADDRH

Pos.
5:0

Format
int 0:6:0

0

ADDRH

Contents
End address in the work area for effect
processing (upper 6 bits)

Description
This register specifies the end address in the work area to be used for digital effect processing. Unlike other
addressing registers, this register, which specifies the upper 6 bits only, is not paired with a register, which
specifies the lower 16 bits. Because of this, the end address in the work area can only be specified on the
64K short-word (128 KB) boundary.

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SPU2 Overview Version 6.0

ENDX0 / ENDX1 : Endpoint passing flag

ENDX0
15

V
15

12

V
14

Name
V0

V
13

V
12

Pos.
0

(Omitted)
V15
15

8

V
11

V
10

V
9

V
8

4

V
7

V
6

V
5

V
4

0

V
3

Format
int 0:1:0

Contents
Endpoint passing flag for Voice0
0 Has not been passed.
1 Has been passed.

int 0:1:0

Endpoint passing flag for Voice15
0 Has not been passed.
1 Has been passed.

V
2

V
1

V
0

V
18

V
17

V
16

ENDX1
15

12

8

(reserved)
Name
V16

Pos.
0

(Omitted)
V23
7

4

V
23

V
22

V
21

V
20

0

V
19

Format
int 0:1:0

Contents
Endpoint passing flag for Voice16
0 Has not been passed.
1 Has been passsed.

int 0:1:0

Endpoint passing flag for Voice23
0 Has not been passed.
1 Has been passed.

Description
These registers show whether or not the endpoint block has been reached with the advance of sound
generation of each voice.
The bit corresponding to the voice is set to 0 by specifying key-on.
All the bits are cleared to 0 by writing an arbitrary value (including a value other than 0) to these registers.

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SPU2 Overview Version 6.0

MVOLL / MVOLR : Master volume

Constant specification mode (direct mode)
15

12

8

0

4

0

VALUE

Name
VALUE

Pos.
14:0

Format
int 1:0:14

Contents
Volume value
The phase reverses for a negative value.

Linear increment mode (+lin mode)
15

1

12

0

0

Name
VALUE
X

X
Pos.
6:0
12

8

0

(reserved)

Format
int 0:7:0
int 0:1:0

4

0

VALUE

Contents
Addition constant per Ts
Polarity specification
0 Normal phase (specifiable when the
current value is positive.)
Linear increment to +1.0
1 Reverse phase (specifiable when the
current value is negative.)
Linear decrement to –1.0

Linear decrement mode (-lin mode)
15

1

12

0

Name
VALUE
X

1

X
Pos.
6:0
12

8

(reserved)

Format
int 0:7:0
int 0:1:0

4

0

0

VALUE

Contents
Subtraction constant per Ts
Polarity specification
0 Normal phase (specifiable when the
current value is positive.)
Linear decrement to 0
1 Reverse phase (specifiable when the
current value is negative.)
Linear increment to 0

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SPU2 Overview Version 6.0

Pseudo inverse-exponential increment mode (+exp mode)
15

1

12

1

0

Name
VALUE
X

X
Pos.
6:0
12

8

0

(reserved)

Format
int 0:7:0
int 0:1:0

4

0

VALUE

Contents
Addition constant per Ts
Polarity specification
0 Normal phase (specifiable when the
current value is positive.)
Increment to +1.0 in a line.
1 Reverse phase (specifiable when the
current value is negative.)
Decrement to –1.0 in a line.

Exponential decrement mode (-exp mode)
15

1

12

1

Name
VALUE

1

8

(reserved)

Pos.
6:0

Format
int 0:7:0

4

0

0

VALUE

Contents
Multiplication constant

Description
These registers specify the master volume for each core.
The values of the upper three bits specify the pattern of the volume variation with time. When specifying a
mode excluding the constant mode, the master volume value varies with time, because the value
corresponding to the value of the VALUE field is added to, subtracted from or multiplied by the master
volume value per Ts.
For the relationship between the VALUE field value and actual volume duration, refer to "4.1. Rate
Parameter Table".

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SPU2 Overview Version 6.0

EVOLL / EVOLR : Return volume of effect
15

12

8

4

0

VALUE

Name
VALUE

Pos.
15:0

Format
int 1:0:15

Contents
Return volume of effect
The phase reverses for a negative value.

Description
These registers specify the volume when mixing the output from digital effect processing with the Dry
L/Dry R channel.

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SPU2 Overview Version 6.0

AVOLL / AVOLR : Volume for external input
15

12

8

4

0

VALUE

Name
VALUE

Pos.
15:0

Format
int 1:0:15

Contents
Volume for external input
The phase reverses for a negative value.

Description
These registers specify the volume for the external input.
They are disabled in CORE0.

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SPU2 Overview Version 6.0

BVOLL / BVOLR : Volume for sound data input
15

12

8

4

VALUE

Name
VALUE

Pos.
15:0

Format
int 1:0:15

Contents
Volume for sound data input
The phase reverses for a negative value.

Description
These registers specify the volume for sound data input.

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SPU2 Overview Version 6.0

MVOLXL / MVOLXR : Current value of master volume
15

12

8

4

0

VALUE

Name
VALUE

Pos.
15:0

Format
int 1:0:15

Contents
Current value of master volume

Description
These registers indicate the current value of the master volume.
When MVOL is in a mode other than constant specification mode, the value varies per Ts according to the
volume variation.

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SPU2 Overview Version 6.0

(This page is left blank intentionally)

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SPU2 Overview Version 6.0

4. Appendix

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SPU2 Overview Version 6.0

4.1. Rate Parameter Table
The following tables show the volume variation rate for values of the envelope rate/level parameters (AR, DR,
SL, SR and RR) and the parameters to specify volume variation with time. The variation rate is shown with the
time required for the volume to vary from 0 to 1 (1 to 0, or 1 to 0.1). For SL, the variation rate is shown with
level.

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SPU2 Overview Version 6.0

4.1.1. +Lin Mode
The variation is shown in linear increment for normal phase and in linear decrement for reverse phase.
Set Value
000 0000
000 0001
000 0010
000 0011
000 0100
000 0101
000 0110
000 0111
000 1000
000 1001
000 1010
000 1011
000 1100
000 1101
000 1110
000 1111
001 0000
001 0001
001 0010
001 0011
001 0100
001 0101
001 0110
001 0111
001 1000
001 1001
001 1010
001 1011
001 1100
001 1101
001 1110
001 1111
010 0000
010 0001
010 0010
010 0011
010 0100
010 0101
010 0110

0 -> 1 Time
0.05 (msec)
0.06
0.07
0.09
0.10
0.12
0.15
0.18
0.21
0.24
0.29
0.36
0.41
0.48
0.58
0.73
0.83
0.97
1.2
1.5
1.7
1.9
2.3
2.9
3.3
3.9
4.6
5.8
6.6
7.7
9.3
12
13
15
19
23
27
31
37

Set Value
010 0111
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
010 1110
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
011 1100
011 1101
011 1110
011 1111
100 0000
100 0001
100 0010
100 0011
100 0100
100 0101
100 0110
100 0111
100 1000
100 1001
100 1010
100 1011
100 1100
100 1101

0 -> 1 Time
46 (msec)
53
62
74
93
0.11 (sec)
0.12
0.15
0.19
0.21
0.25
0.30
0.37
0.42
0.50
0.59
0.74
0.85
0.99
1.2
1.5
1.7
2.0
2.4
3.0
3.4
4.0
4.8
5.9
6.8
7.9
9.5
12
14
16
19
24
27
32

Set Value
100 1110
100 1111
101 0000
101 0001
101 0010
101 0011
101 0100
101 0101
101 0110
101 0111
101 1000
101 1001
101 1010
101 1011
101 1100
101 1101
101 1110
101 1111
110 0000
110 0001
110 0010
110 0011
110 0100
110 0101
110 0110
110 0111
110 1000
110 1001
110 1010
110 1011
110 1100
:
111 1110

0 -> 1 Time
38 (sec)
48
54
63
76
95
109
127
152
190
218
254
304
380
436
508
608
760
872
1016
1216
1520
1744
2032
2432
3040
3488
4064
4864
6080
(reserved)

111 1111

infinity

© SCEI
-71-

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.2. –Lin Mode
The variation is shown in linear decrement for normal phase and in linear increment for reverse phase.
-Lin Value
000 0000
000 0001
000 0010
000 0011
000 0100
000 0101
000 0110
000 0111
000 1000
000 1001
000 1010
000 1011
000 1100
000 1101
000 1110
000 1111
001 0000
001 0001
001 0010
001 0011
001 0100
001 0101
001 0110
001 0111
001 1000
001 1001
001 1010
001 1011
001 1100
001 1101
001 1110
001 1111
010 0000
010 0001
010 0010
010 0011
010 0100
010 0101
010 0110

1 –> 0 Time
0.04 (msec)
0.05
0.06
0.07
0.09
0.10
0.12
0.15
0.18
0.21
0.24
0.29
0.36
0.41
0.48
0.58
0.73
0.83
0.97
1.2
1.5
1.7
1.9
2.3
2.9
3.3
3.9
4.6
5.8
6.6
7.7
9.3
12
13
15
19
23
27
31

-Lin Value
010 0111
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
010 1110
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
011 1100
011 1101
011 1110
011 1111
100 0000
100 0001
100 0010
100 0011
100 0100
100 0101
100 0110
100 0111
100 1000
100 1001
100 1010
100 1011
100 1100
100 1101

1 –> 0 Time
37 (msec)
46
53
62
74
93
0.11 (sec)
0.12
0.15
0.19
0.21
0.25
0.30
0.37
0.42
0.50
0.59
0.74
0.85
0.99
1.2
1.5
1.7
2.0
2.4
3.0
3.4
4.0
4.8
5.9
6.8
7.9
9.5
12
14
16
19
24
27

© SCEI
-72-

-Lin Value
100 1110
100 1111
101 0000
101 0001
101 0010
101 0011
101 0100
101 0101
101 0110
101 0111
101 1000
101 1001
101 1010
101 1011
101 1100
101 1101
101 1110
101 1111
110 0000
110 0001
110 0010
110 0011
110 0100
110 0101
110 0110
110 0111
110 1000
110 1001
110 1010
110 1011
110 1100
:
111 1110

1 –> 0 Time
32 (sec)
38
48
54
63
76
95
109
127
152
190
218
254
304
380
436
508
608
760
872
1016
1216
1520
1744
2032
2432
3040
3488
4064
4864
(reserved)

111 1111

infinity

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.3. +Exp Mode (Normal phase)
Pseudo Inverse-Exponential Increment Mode
+Exp Set
Value
000 0000
000 0001
000 0010
000 0011
000 0100
000 0101
000 0110
000 0111
000 1000
000 1001
000 1010
000 1011
000 1100
000 1101
000 1110
000 1111
001 0000
001 0001
001 0010
001 0011
001 0100
001 0101
001 0110
001 0111
001 1000
001 1001
001 1010
001 1011
001 1100
001 1101
001 1110
001 1111
010 0000
010 0001
010 0010
010 0011

1 –> 0 Time
0.09 (msec)
0.11
0.13
0.16
0.18
0.21
0.25
0.32
0.36
0.42
0.51
0.64
0.73
0.85
1.0
1.3
1.5
1.7
2.0
2.5
2.9
3.4
4.1
5.1
5.8
6.8
8.1
10
12
14
16
20
23
27
33
41

+Exp Set
Value
010 0100
010 0101
010 0110
010 0111
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
010 1110
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
011 1100
011 1101
011 1110
011 1111
100 0000
100 0001
100 0010
100 0011
100 0100
100 0101
100 0110
100 0111

1 –> 0 Time
46 (msec)
54
65
81
93
0.11 (sec)
0.13
0.16
0.19
0.22
0.26
0.33
0.37
0.43
0.52
0.65
0.74
0.87
1.0
1.3
1.5
1.7
2.1
2.6
3.0
3.5
4.2
5.2
5.9
6.9
8.3
10
12
14
17
21

+Exp Set
Value
100 1000
100 1001
100 1010
100 1011
100 1100
100 1101
100 1110
100 1111
101 0000
101 0001
101 0010
101 0011
101 0100
101 0101
101 0110
101 0111
101 1000
101 1001
101 1010
101 1011
101 1100
101 1101
101 1110
101 1111
110 0000
110 0001
110 0010
110 0011
110 1100
:
111 1110
111 1111

1 –> 0 Time
24 (sec)
28
33
42
48
55
67
83
95
111
133
166
190
222
266
333
380
444
532
666
760
888
1064
1332
1520
1776
2128
2664
(reserved)
infinity

© SCEI
-73-

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.4. +Exp Mode (Reverse phase)
Pseudo Inverse-Exponential Mode with Negative Volume Value
+Exp Set
Value
000 0000
000 0001
000 0010
000 0011
000 0100
000 0101
000 0110
000 0111
000 1000
000 1001
000 1010
000 1011
000 1100
000 1101
000 1110
000 1111
001 0000
001 0001
001 0010
001 0011
001 0100
001 0101
001 0110
001 0111
001 1000
001 1001
001 1010
001 1011
001 1100
001 1101
001 1110
001 1111
010 0000
010 0001
010 0010
010 0011

1 -> 0 Time
0.08 (msec)
0.09
0.11
0.13
0.16
0.18
0.21
0.25
0.32
0.36
0.42
0.51
0.64
0.73
0.85
1.0
1.3
1.5
1.7
2.0
2.5
2.9
3.4
4.1
5.1
5.8
6.8
8.1
10
12
14
16
20
23
27
33

+Exp Set
Value
010 0100
010 0101
010 0110
010 0111
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
010 1110
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
011 1100
011 1101
011 1110
011 1111
100 0000
100 0001
100 0010
100 0011
100 0100
100 0101
100 0110
100 0111

1 -> 0 Time
41 (msec)
46
54
64
81
93
0.11 (sec)
0.13
0.16
0.19
0.22
0.26
0.33
0.37
0.43
0.52
0.65
0.74
0.87
1.0
1.3
1.5
1.7
2.1
2.6
3.0
3.5
4.2
5.2
5.9
6.9
8.3
10
12
14
17

© SCEI
-74-

+Exp Set
Value
100 1000
100 1001
100 1010
100 1011
100 1100
100 1101
100 1110
100 1111
101 0000
101 0001
101 0010
101 0011
101 0100
101 0101
101 0110
101 0111
101 1000
101 1001
101 1010
101 1011
101 1100
101 1101
101 1110
101 1111
110 0000
110 0001
110 0010
110 0011
110 1100
:
111 1110

1 -> 0 Time

111 1111

infinity

21 (sec)
24
28
33
42
48
55
67
83
95
111
133
166
190
222
266
333
380
444
532
666
760
888
1064
1332
1520
1776
2128
(reserved)

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.5. –Exp Mode
Exponential Decrement Mode
-Exp Set
Value
000 0000
000 0001
000 0010
000 0011
000 0100
000 0101
000 0110
000 0111
000 1000
000 1001
000 1010
000 1011
000 1100
000 1101
000 1110
000 1111
001 0000
001 0001
001 0010
001 0011
001 0100
001 0101
001 0110
001 0111
001 1000
001 1001
001 1010
001 1011
001 1100
001 1101
001 1110
001 1111
010 0000
010 0001
010 0010
010 0011
010 0100
010 0101
010 0110

1 –> 0.1
Time
0.07 (msec)
0.09
0.11
0.14
0.18
0.21
0.25
0.31
0.39
0.45
0.53
0.64
0.81
0.93
1.1
1.3
1.6
1.9
2.2
2.6
3.3
3.8
4.4
5.3
6.7
7.6
8.9
11
13
15
18
21
27
31
36
43
53
61
71

-Exp Set
Value
010 0111
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
010 1110
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
011 1100
011 1101
011 1110
011 1111
100 0000
100 0001
100 0010
100 0011
100 0100
100 0101
100 0110
100 0111
100 1000
100 1001
100 1010
100 1011
100 1100
100 1101

1 –> 0.1
Time
86 (msec)
0.11 (sec)
0.12
0.14
0.17
0.21
0.24
0.29
0.34
0.43
0.49
0.57
0.68
0.86
0.98
1.1
1.4
1.7
2.0
2.3
2.7
3.4
3.9
4.6
5.5
6.8
7.8
9.1
11
14
16
18
22
27
31
36
44
55
63

-Exp Set
Value
100 1110
100 1111
101 0000
101 0001
101 0010
101 0011
101 0100
101 0101
101 0110
101 0111
101 1000
101 1001
101 1010
101 1011
101 1100
101 1101
101 1110
101 1111
110 0000
110 0001
110 0010
110 0011
110 0100
110 0101
110 0110
110 0111
110 1000
110 1001
110 1010
110 1011
110 1100
:
111 1110

1 –> 0.1
Time
73 (sec)
88
109
125
146
175
219
250
292
350
438
500
584
700
876
1000
1168
1400
1752
2000
2336
2800
3504
4000
4672
5600
7008
8000
9344
11200
(reserved)

111 1111

infinity

© SCEI
-75-

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.6. Decay Rate (DR)
Exponential Decrement Mode
-Exp Set
Value
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

1 –> 0.10
Time
0.07 (msec)
0.18
0.39
0.81
1.6
3.3
6.7
13
27
53
0.11 (sec)
0.21
0.43
0.86
1.7
3.4

© SCEI
-76-

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.7. Sustain Level (SL)
Set Value

Envelope
Level
0000
1/16
0001
2/16
0010
3/16
0011
4/16
0100
5/16
0101
6/16
0110
7/16
0111
8/16
1000
9/16
1001
10/16
1010
11/16
1011
12/16
1100
13/16
1101
14/16
1110
15/16
1111
1
Note: when the set value is 1111, the Decay section immediately before is processed only for 1 Ts.

© SCEI
-77-

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.8. –Lin Mode for Release Rate (RR)
Linear Decrement Mode
-Lin Set
Value
0 0000
0 0001
0 0010
0 0011
0 0100
0 0101
0 0110
0 0111
0 1000
0 1001
0 1010
0 1011
0 1100
0 1101
0 1110
0 1111
1 0000
1 0001
1 0010
1 0011
1 0100
1 0101
1 0110
1 0111
1 1000
1 1001
1 1010
1 1011
:
1 1110
1 1111

1 –> 0 Time
0.04 (msec)
0.09
0.18
0.36
0.73
1.5
2.9
5.8
12
23
46
93
0.19 (sec)
0.37
0.74
1.5
3.0
5.9
12
24
48
95
190
380
760
1520
3040
(reserved)
infinity

© SCEI
-78-

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

4.1.9. –Exp Mode for Release Rate (RR)
Exponential Decrement Mode
-Exp Set
Value
0 0000
0 0001
0 0010
0 0011
0 0100
0 0101
0 0110
0 0111
0 1000
0 1001
0 1010
0 1011
0 1100
0 1101
0 1110
0 1111
1 0000
1 0001
1 0010
1 0011
1 0100
1 0101
1 0110
1 0111
1 1000
1 1001
1 1010
1 1011
:
1 1110
1 1111

1 –> 0.1
Time
0.07 (msec)
0.18
0.39
0.81
1.6
3.3
6.7
13
27
53
0.11 (sec)
0.21
0.43
0.86
1.7
3.4
6.8
14
27
55
109
219
438
876
1752
3504
7008
(reserved)
infinity

© SCEI
-79-

SCE CONFIDENTIAL

SPU2 Overview Version 6.0

(This page is left blank intentionally)

© SCEI
-80-



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Encryption                      : Standard V1.2 (40-bit)
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Producer                        : Acrobat Distiller 5.0.5 (Windows)
Author                          : Sony Computer Entertainment
Metadata Date                   : 2002:06:10 14:26:20-07:00
Creator                         : Sony Computer Entertainment
Title                           : SPU2 Overview
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