Gb Cpu Manual
User Manual: Pdf
Open the PDF directly: View PDF 
.
Page Count: 139
| Download | |
| Open PDF In Browser | View PDF |
Game BoyTM CPU Manual Sources by: Pan of Anthrox, GABY, Marat Fayzullin, Pascal Felber, Paul Robson, Martin Korth, kOOPa, Bowser Contents: Assembly Language Commands, Timings and Opcodes, and everything you always wanted to know about GB but were afraid to ask. THIS DOCUMENT IS PRINTED ON DIN A5 SIZE PAPER (148mm x 210mm)! Note: Game BoyTM, Game Boy PocketTM, Super Game BoyTM and Game Boy ColorTM are registered trademarks of Nintendo CO., LTD. © 1989 to 1999 by Nintendo CO., LTD. Version: 1.01 by DP 1. Foreword Game BoyTM CPU Manual Table of Contents 1. For e wor d. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2. Har dwar e s pe c i f i c at i ons . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2. 1. For war d: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2. 2. Te r ms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2. 3. Game Boy Spe c s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2. 4. Pr oc e s s or . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2. 5. Me mor y Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2. 5. 1. Ge ne r a l me mor y ma p. . . . . . . . . . . . . . . . . . . . . . . . . 8 2. 5. 2. Ec ho of 8kB I nt e r na l RAM. . . . . . . . . . . . . . . . . . . 9 2. 5. 3. Us e r I / O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2. 5. 4. Re s e r ve d Me mor y Loc a t i ons . . . . . . . . . . . . . . . . . 10 2. 6. Car t r i dge Ty pe s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2. 7. Spe c i al modi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2. 7. 1. Powe r Up Se que nc e . . . . . . . . . . . . . . . . . . . . . . . . . 17 2. 7. 2. St op Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2. 7. 3. Low- Powe r Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2. 8. Vi de o. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2. 8. 1. Ti l e s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2. 8. 2. Spr i t e s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2. 8. 3. Spr i t e RAM Bug. . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2. 9. Sound. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2. 10. Ti me r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2. 11. Se r i al I / O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2. 12. I nt e r r upt s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2. 12. 1. I nt e r r upt Pr oc e dur e . . . . . . . . . . . . . . . . . . . . . . 32 2. 12. 2. I nt e r r upt De s c r i pt i ons . . . . . . . . . . . . . . . . . . . 34 2. 13. Spe c i al Re gi s t e r s . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 2. 13. 1. I / O Re gi s t e r s . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Page 2 V 1.01 Game BoyTM CPU Manual 1. Foreword 3. Game Boy c ommand ove r vi e w. . . . . . . . . . . . . . . . . . . . . . . . . 61 3. 1. For e wor d. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 3. 2. CPU Re gi s t e r s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 3. 2. 1. Ge ne r a l l y. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 3. 2. 2. Fl a g Re gi s t e r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 3. 2. 3. Pr ogr a m Count e r . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 3. 2. 4. St a c k Poi nt e r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 3. 3. Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3. 3. 1. 8- Bi t Loa ds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3. 3. 2. 16- Bi t Loa ds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 3. 3. 3. 8- Bi t ALU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 3. 3. 4. 16- Bi t Ar i t hme t i c . . . . . . . . . . . . . . . . . . . . . . . . . 90 3. 3. 5. Mi s c e l l a ne ous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 3. 3. 6. Rot a t e s & Shi f t s . . . . . . . . . . . . . . . . . . . . . . . . . . 99 3. 3. 7. Bi t Opc ode s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 3. 3. 8. J umps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 3. 3. 9. Ca l l s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 3. 3. 10. Re s t a r t s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 3. 3. 11. Re t ur ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 4. Supe r Game Boy c ommands . . . . . . . . . . . . . . . . 4. 1. For e wor d. . . . . . . . . . . . . . . . . . . . . . . . . . . 4. 2. Pal e t t e s . . . . . . . . . . . . . . . . . . . . . . . . . . . 4. 3. SGB Bor de r . . . . . . . . . . . . . . . . . . . . . . . . . 4. 4. Mai n Ac t i on Wi ndow. . . . . . . . . . . . . . . . . 4. 5. Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 . . . 119 . . . 119 . . . 120 . . . 121 . . . 122 5. Appe ndi x A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 5. 1. Emul at or Not e s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 5. 2. Ty pi c al t i mi ng di agr am. . . . . . . . . . . . . . . . . . . . . . . 137 by DP Page 3 1. Foreword Game BoyTM CPU Manual 1. Foreword Thi s Doc ume nt wa s de s i gne d t o he l p you pr ogr a mmi ng t he Game Boy TM Cl as s i c , Game Boy TM Poc k e t , Supe r Game Boy TM a nd Game Boy TM Col or ( ba s i c s - you wi l l ne e d a ddi t i ona l doc ume nt s f or GBC s pe c i f i c pr ogr a mmi ng) . I t wa s me nt t o be a c ompl e t e ha ndbook t o s t a r t r i ght of f c odi ng f or t he ha r dwa r e . The doc ume nt s c ons i s t s of t hr e e ma j or pa r t s . The f i r s t i s t he ' GBSpe c . t xt ' ( a l s o known a s t he Pa n Doc ume nt ) by Pan of Ant hr ox , Mar at Fay z ul l i n, Pas c al Fe l be r , Paul Robs on, Mar t i n Kor t h, k OOPa. Thi s wi l l be f ound i n pa r a gr a ph 1. The s e c ond i s a mi xt ur e of s e ve r a l doc ume nt s f r om ' Ga me Boy As s e mbl y La ngua ge Pr i me r ( GALP) V1. 0' by GABY ( GAme BoY) . I t c ont a i ns opc ode s , t i me dur a t i on a nd t he a f f e c t e d f l a gs pe r ASM c omma nd a nd t he . Thi s c a n be f ound i n pa r a gr a ph 2. The t hi r d i s a s umma r y of s pe c i f i c a t i ons a nd c omma nds f or Ni nt e ndo Supe r Ga me Boy s pe c i f f i c pr ogr a mmi ng by k OOPa a nd Bows e r . Se e pa r a gr a ph 3. I nf or ma t i on on how t o ge t your e mul a t or pr ove d pr ogr a ms r un on a r e a l Ga me Boy c a n be f ound i n t he Appe ndi x ( t ha nks t o kOOPa ) . Al s o, a t i mi ng di a gr a m of a t ypi c a l r e a d a nd wr i t e ope r a t i on on t he c l a s s i c GB bus c a n be f ound he r e ( t ha nks t o Phi l i ppe Poul i que n) . On t he l a s t pa ge a qui c k r e f e r e nc e of ASM c omma nds i s i nc l ude d. Hav e f un! DP Page 4 V 1.01 Game BoyTM CPU Manual 2. Hardware specifications 2. Hardware specifications 2.1. Forward: The f ol l owi ng wa s t ype d up f or i nf or ma t i ona l pur pos e s r e ga r di ng t he i nne r wor ki ngs on t he ha nd- he l d ga me ma c hi ne known a s Ga me Boy, ma nuf a c t ur e d a nd de s i gne d by Ni nt e ndo Co. , LTD. Thi s i nf o i s pr e s e nt e d t o i nf or m a us e r on how t he i r Ga me Boy wor ks a nd wha t ma ke s i t " t i c k" . Ga me Boy i s c opyr i ght e d by Ni nt e ndo Co. , LTD. Any r e f e r e nc e t o c opyr i ght e d ma t e r i a l i s not pr e s e nt e d f or mone t a r y ga i n, but f or e duc a t i ona l pur pos e s a nd hi ghe r l e a r ni ng. 2.2. Terms GB = Or i gi na l Ga me Boy ( Ga me Boy Cl a s s i c ) GBP = Ga me Boy Poc ke t / Ga me Boy Li ght GBC = Ga me Boy Col or SGB = Supe r Ga me Boy by DP Page 5 Game BoyTM CPU Manual 2.3. Game Boy Specs 2.3. Game Boy Specs • • • • • • • • • • • • • • CPU: 8- bi t ( Si mi l a r t o t he Z80 pr oc e s s or . ) Ma i n RAM: 8K Byt e Vi de o RAM: 8K Byt e Sc r e e n Si z e 2. 6" Re s ol ut i on: 160x144 ( 20x18 t i l e s ) Ma x # of s pr i t e s : 40 Ma x # s pr i t e s / l i ne : 10 Ma x s pr i t e s i z e : 8x16 Mi n s pr i t e s i z e : 8x8 Cl oc k Spe e d: 4. 194304 MHz ( 4. 295454 SGB, 4. 194/ 8. 388MHz GBC) Hor i z Sync : 9198 KHz ( 9420 KHz f or SGB) Ve r t Sync : 59. 73 Hz ( 61. 17 Hz f or SGB) Sound: 4 c ha nne l s wi t h s t e r e o s ound Powe r : DC6V 0. 7W ( DC3V 0. 7W f or GB Poc ke t ) Ni nt e ndo doc ume nt s de s c r i be t he CPU & i ns t r uc t i ons s pe e d i n ma c hi ne c yc l e s whi l e t hi s doc ume nt de s c r i be s t he m i n c l oc k c yc l e s . He r e i s t he t r a ns l a t i on: 1 ma c hi ne c yc l e = 4 c l oc k c yc l e s Ma c hi ne Cyc l e s Cl oc k Cyc l e s GB CPU Spe e d 1. 05MHz 4. 19MHz NOP I ns t r uc t i on 1 c yc l e 4 c yc l e s 2.4. Processor The Ga me Boy us e s a c omput e r c hi p s i mi l 8080. I t c ont a i ns a l l of t he i ns t r uc t i e xc e pt t he r e a r e no e xc ha nge i ns t r uc t i wa ys t he pr oc e s s or i s mor e s i mi l a r t o pr oc e s s or . Compa r e d t o t he Z80, s ome i Page 6 a r t o a n I nt e l ons of a n 8080 ons . I n ma ny t he Zi l og Z80 ns t r uc t i ons V 1.01 Game BoyTM CPU Manual 2.4. Processor ha ve be e n a dde d a nd s ome ha ve be e n t a ke n a wa y. The f ol l owi ng ar e adde d i ns t r uc t i ons : ADD SP, nn LDI ( HL) , A LDD ( HL) , A LDI A, ( HL) LDD A, ( HL) LD A, ( $FF00+nn) LD A, ( $FF00+C) LD ( $FF00+nn) , A LD ( $FF00+C) , A LD ( nnnn) , SP LD HL, SP+nn STOP SWAP r ; ; ; ; ; nn Wr i Wr i Wr i Wr i = s i gne d byt e t e A t o ( HL) a nd t e A t o ( HL) a nd t e ( HL) t o A a nd t e ( HL) t o A a nd i nc r e me nt de c r e me nt i nc r e me nt de c r e me nt HL HL HL HL ; nn = s i gne d byt e ; St op pr oc e s s or & s c r e e n unt i l but t on pr e s s ; Swa p hi gh & l ow ni bbl e s of r The f ol l owi ng i ns t r uc t i ons have be e n r e move d: Any Al l Al l Al l Al l a nd c omma nd t ha t us e s t he I X or I Y r e gi s t e r s . I N/ OUT i ns t r uc t i ons . e xc ha nge i ns t r uc t i ons . c omma nds pr e f i xe d by ED ( e xc e pt r e ma ppe d RETI ) . c ondi t i ona l j umps / c a l l s / r e t s on pa r i t y/ ove r f l ow s i gn f l a g. The f ol l owi ng i ns t r uc t i ons have di f f e r e nt opc ode s : LD A, [ nnnn] LD [ nnnn] , A RETI by DP Page 7 Game BoyTM CPU Manual 2.5. Memory Map 2.5. Memory Map 2.5.1. General memory map I nt e r r upt Ena bl e Re gi s t e r --------------------------I nt e r na l RAM --------------------------Empt y but unus a bl e f or I / O --------------------------I / O por t s --------------------------Empt y but unus a bl e f or I / O --------------------------Spr i t e At t r i b Me mor y ( OAM) --------------------------Ec ho of 8kB I nt e r na l RAM --------------------------8kB I nt e r na l RAM --------------------------8kB s wi t c ha bl e RAM ba nk --------------------------8kB Vi de o RAM --------------------------16kB s wi t c ha bl e ROM ba nk --------------------------16kB ROM ba nk #0 --------------------------- FFFF FF80 FF4C FF00 FEA0 FE00 E000 C000 A000 8000 - | 4000 | = 32kB Ca r t r i gbe | 0000 - - * NOTE: b = bi t , B = byt e Page 8 V 1.01 Game BoyTM CPU Manual 2.5.2. Echo of 8kB Internal RAM 2.5.2. Echo of 8kB Internal RAM The a ddr e s s e s E000- FE00 a ppe a r t o a c c e s s t he i nt e r na l RAM t he s a me a s C000- DE00. ( i . e . I f you wr i t e a byt e t o a ddr e s s E000 i t wi l l a ppe a r a t C000 a nd E000. Si mi l a r l y, wr i t i ng a byt e t o C000 wi l l a ppe a r a t C000 a nd E000. ) 2.5.3. User I/O The r e a r e no e mpt y s pa c e s i n t he me mor y ma p f or i mpl e me nt i ng i nput por t s e xc e pt t he s wi t c ha bl e RAM ba nk a r e a ( not a n opt i on on t he Supe r Sma r t Ca r d s i nc e i t ' s RAM ba nk i s a l wa ys e na bl e d) . An out put onl y por t ma y be i mpl e me nt e d a nywhe r e be t we e n A000- FDFF. I f i mpl e me nt e d i n a RAM a r e a c a r e s houl d be t a ke n t o us e a n a r e a of RAM not us e d f or a nyt hi ng e l s e . ( FE00 a nd a bove c a n' t be us e d be c a us e t he CPU doe s n' t ge ne r a t e a n e xt e r na l / WR f or t he s e l oc a t i ons . ) I f you ha ve a c a r t wi t h a n MBC1, a ROM 4Mbi t or s ma l l e r , a nd a RAM 8Kbyt e or s ma l l e r ( or no RAM) t he n you c a n us e pi ns 6 & 7 of t he MBC1 f or 2 di gi t a l out put pi ns f or wha t e ve r pur pos e you wi s h. To us e t he m you mus t f i r s t put t he MBC1 i nt o 4Mbi t ROM/ 32Kbyt e RAM mode by wr i t i ng 01 t o 6000. The t wo l e a s t s i gni f i c a nt bi t s you wr i t e t o 4000 wi l l t he n be out put t o t he s e pi ns . by DP Page 9 2.5.4. Reserved Memory Locations Game BoyTM CPU Manual 2.5.4. Reserved Memory Locations 0000 0040 Re s t a r t $00 Addr e s s ( RST $00 c a l l s t hi s a ddr e s s . ) Re s t a r t $08 Addr e s s ( RST $08 c a l l s t hi s a ddr e s s . ) Re s t a r t $10 Addr e s s ( RST $10 c a l l s t hi s a ddr e s s . ) Re s t a r t $18 Addr e s s ( RST $18 c a l l s t hi s a ddr e s s . ) Re s t a r t $20 Addr e s s ( RST $20 c a l l s t hi s a ddr e s s . ) Re s t a r t $28 Addr e s s ( RST $28 c a l l s t hi s a ddr e s s . ) Re s t a r t $30 Addr e s s ( RST $30 c a l l s t hi s a ddr e s s . ) Re s t a r t $38 Addr e s s ( RST $38 c a l l s t hi s a ddr e s s . ) Ve r t i c a l Bl a nk I nt e r r upt St a r t Addr e s s 0048 LCDC St a t us I nt e r r upt St a r t Addr e s s 0050 Ti me r Ove r f l ow I nt e r r upt St a r t Addr e s s 0058 Se r i a l St a r t Hi gh- t St a r t 0008 0010 0018 0020 0028 0030 0038 0060 Tr a ns f e r Compl e t i on I nt e r r upt Addr e s s o- Low of P10- P13 I nt e r r upt Addr e s s An i nt e r na l i nf or ma t i on a r e a i s l oc a t e d a t 0100- 014F i n e a c h c a r t r i dge . I t c ont a i ns t he f ol l owi ng va l ue s : 0100- 0103 Page 10 Thi s i s t he be gi n c ode e xe c ut i on poi nt i n a c a r t . Us ua l l y t he r e i s a NOP a nd a J P i ns t r uc t i on he r e but not a l wa ys . V 1.01 Game BoyTM CPU Manual Locations 2.5.4. Reserved Memory 0104- 0133 CE 00 BB Sc r ol l i ng Ni nt e ndo gr a phi c : ED 66 66 CC 0D 00 0B 03 73 00 83 00 0C 00 0D 08 11 1F 88 89 00 0E DC CC 6E E6 DD DD D9 99 BB 67 63 6E 0E EC CC DD DC 99 9F BB B9 33 3E ( PROGRAM WON' T RUN I F CHANGED! ! ! ) 0134- 0142 Ti t l e of t he ga me i n UPPER CASE ASCI I . I f i t i s l e s s t ha n 16 c ha r a c t e r s t he n t he r e ma i ni ng byt e s a r e f i l l e d wi t h 00' s . 0143 $80 = Col or GB, $00 or ot he r = not Col or GB 0144 As c i i he x di gi t , hi gh ni bbl e of l i c e ns e e c ode ( ne w) . 0145 As c i i he x di gi t , l ow ni bbl e of l i c e ns e e c ode ( ne w) . ( The s e a r e nor ma l l y $00 i f [ $014B] <> $33. ) 0146 GB/ SGB I ndi c a t or ( 00 = Ga me Boy, 03 = Supe r Ga me Boy f unc t i ons ) ( Supe r Ga me Boy f unc t i ons won' t wor k i f <> $03. ) 0147 Ca r t r i dge t ype : 0- ROM ONLY 12- ROM+MBC3+RAM 1- ROM+MBC1 13- ROM+MBC3+RAM+BATT 2- ROM+MBC1+RAM 19- ROM+MBC5 3- ROM+MBC1+RAM+BATT 1A- ROM+MBC5+RAM 5- ROM+MBC2 1B- ROM+MBC5+RAM+BATT 6- ROM+MBC2+BATTERY 1C- ROM+MBC5+RUMBLE 8- ROM+RAM 1D- ROM+MBC5+RUMBLE+SRAM 9- ROM+RAM+BATTERY 1E- ROM+MBC5+RUMBLE+SRAM+BATT B- ROM+MMM01 1F- Poc ke t Ca me r a C- ROM+MMM01+SRAM FD- Ba nda i TAMA5 D- ROM+MMM01+SRAM+BATT FE - Huds on HuC- 3 by DP Page 11 Game BoyTM CPU Manual 2.5.4. Reserved Memory Locations F- ROM+MBC3+TI MER+BATT FF - Huds on HuC- 1 10- ROM+MBC3+TI MER+RAM+BATT 11- ROM+MBC3 0148 0149 ROM 0 1 2 3 4 5 6 $52 $53 $54 si - ze: 256Kbi 512Kbi 1Mbi 2Mbi 4Mbi 8Mbi 16Mbi 9Mbi 10Mbi 12Mbi RAM 0 1 2 3 4 - s i ze: None 16kBi 64kBi 256kBi 1MBi t t t t t t t t t t t t t t = = = = = = = = = = 32KByt 64KByt 128KByt 256KByt 512KByt 1MByt 2MByt 1. 1MByt 1. 2MByt 1. 5MByt = 2kB = 8kB = 32kB =128kB = 1 = 1 = 4 =16 e e e e e e e e e e = 2 ba nks = 4 ba nks = 8 ba nks = 16 ba nks = 32 ba nks = 64 ba nks = 128 ba nks = 72 ba nks = 80 ba nks = 96 ba nks ba nk ba nk ba nks ba nks 014A De s t i na t i on c ode : 0 - J a pa ne s e 1 - Non- J a pa ne s e 014B Li c e ns e e c ode ( ol d) : 33 - Che c k 0144/ 0145 f or Li c e ns e e c ode . 79 - Ac c ol a de A4 - Kona mi ( Supe r Ga me Boy f unc t i on won' t wor k i f <> $33. ) 014C Ma s k ROM Ve r s i on numbe r ( Us ua l l y $00) Page 12 V 1.01 Game BoyTM CPU Manual Locations 2.5.4. Reserved Memory 014D Compl e me nt c he c k ( PROGRAM WON' T RUN ON GB I F NOT CORRECT! ! ! ) ( I t wi l l r un on Supe r GB, howe ve r , i f i nc or r e c t . ) 014E- 014F Che c ks um ( hi ghe r byt e f i r s t ) pr oduc e d by a ddi ng a l l byt e s of a c a r t r i dge e xc e pt f or t wo c he c ks um byt e s a nd t a ki ng t wo l owe r byt e s of t he r e s ul t . ( Ga me Boy i gnor e s t hi s va l ue . ) 2.6. Cartridge Types The f ol l owi ng de f i ne t he byt e a t c a r t l oc a t i on 0147: • ROM ONLY Thi s i s a 32kB ( 256kb) ROM a nd oc c upi e s 0000- 7FFF. • MBC1 ( Me mor y Ba nk Cont r ol l e r 1) MBC1 ha s t wo di f f e r e nt ma xi mum me mor y mode s : 16Mbi t ROM/ 8KByt e RAM or 4Mbi t ROM/ 32KByt e RAM. The MBC1 de f a ul t s t o 16Mbi t ROM/ 8KByt e RAM mode on powe r up. Wr i t i ng a va l ue ( XXXXXXXS - X = Don' t c a r e , S = Me mor y mode l s e l e c t ) i nt o 6000- 7FFF a r e a wi l l s e l e c t t he me mor y mode l t o us e . S = 0 s e l e c t s 16/ 8 mode . S = 1 s e l e c t s 4/ 32 mode . Wr i t i ng a va l ue ( XXXBBBBB - X = Don' t c a r e s , B = ba nk s e l e c t bi t s ) i nt o 2000- 3FFF a r e a wi l l s e l e c t a n a ppr opr i a t e ROM ba nk a t 4000- 7FFF. Va l ue s of 0 a nd 1 do t he s a me t hi ng a nd poi nt t o ROM ba nk 1. by DP Page 13 2.6. Cartridge Types Game BoyTM CPU Manual Rom ba nk 0 i s not a c c e s s i bl e f r om 4000- 7FFF a nd c a n onl y be r e a d f r om 0000- 3FFF. I f me mor y mode l i s s e t t o 4/ 32: Wr i t i ng a va l ue ( XXXXXXBB - X = Don' t c a r e , B = ba nk s e l e c t bi t s ) i nt o 4000- 5FFF a r e a wi l l s e l e c t a n a ppr opr i a t e RAM ba nk a t A000- C000. Be f or e you c a n r e a d or wr i t e t o a RAM ba nk you ha ve t o e na bl e i t by wr i t i ng a XXXX1010 i nt o 0000- 1FFF a r e a *. To di s a bl e RAM ba nk ope r a t i ons wr i t e a ny va l ue but XXXX1010 i nt o 0000- 1FFF a r e a . Di s a bl i ng a RAM ba nk pr oba bl y pr ot e c t s t ha t ba nk f r om f a l s e wr i t e s dur i ng powe r down of t he Ga me Boy. ( NOTE: Ni nt e ndo s ugge s t s va l ue s $0A t o e na bl e a nd $00 t o di s a bl e RAM ba nk! ! ) I f me mor y mode l i s s e t t o 16/ 8 mode : Wr i t i ng a va l ue ( XXXXXXBB - X = Don' t c a r e , B = ba nk s e l e c t bi t s ) i nt o 4000- 5FFF a r e a wi l l s e t t he t wo mos t s i gni f i c a nt ROM a ddr e s s l i ne s . * NOTE: The Supe r Sma r t Ca r d doe s n' t r e qui r e t hi s ope r a t i on be c a us e i t ' s RAM ba nk i s ALWAYS e na bl e d. I nc l ude t hi s ope r a t i on a nywa y t o a l l ow your c ode t o wor k wi t h bot h. • MBC2 ( Me mor y Ba nk Cont r ol l e r 2) : Thi s me mor y c ont r ol l e r wor ks muc h l i ke t he MBC1 c ont r ol l e r wi t h t he f ol l owi ng e xc e pt i ons : MBC2 wi l l wor k wi t h ROM s i z e s up t o 2Mbi t . Wr i t i ng a va l ue ( XXXXBBBB - X = Don' t c a r e s , B = ba nk s e l e c t bi t s ) i nt o 2000- 3FFF a r e a wi l l s e l e c t a n a ppr opr i a t e ROM ba nk a t 4000- 7FFF. RAM s wi t c hi ng i s not pr ovi de d. Unl i ke t he MBC1 whi c h us e s e xt e r na l RAM, MBC2 ha s 512 x 4 bi t s of Page 14 V 1.01 Game BoyTM CPU Manual 2.6. Cartridge Types RAM whi c h i s i n t he c ont r ol l e r i t s e l f . I t s t i l l r e qui r e s a n e xt e r na l ba t t e r y t o s a ve da t a dur i ng powe r - of f t hough. The l e a s t s i gni f i c a nt bi t of t he uppe r a ddr e s s byt e mus t be z e r o t o e na bl e / di s a bl e c a r t RAM. For e xa mpl e t he f ol l owi ng a ddr e s s e s c a n be us e d t o e na bl e / di s a bl e c a r t RAM: 0000- 00FF, 0200- 02FF, 0400- 04FF, . . . , 1E00- 1EFF. e na bl e / di s a bl e i s 0000- 00FF. The s ugge s t e d a ddr e s s r a nge t o us e f or MBC2 r a m The l e a s t s i gni f i c a nt bi t of t he uppe r a ddr e s s byt e mus t be one t o s e l e c t a ROM ba nk. For e xa mpl e t he f ol l owi ng a ddr e s s e s c a n be us e d t o s e l e c t a ROM ba nk: 2100- 21FF, 2300- 23FF, 2500- 25FF, . . . , 3F003FFF. The s ugge s t e d a ddr e s s r a nge t o us e f or MBC2 r om ba nk s e l e c t i on i s 2100- 21FF. • MBC3 ( Me mor y Ba nk Cont r ol l e r 3) : Thi s c ont r ol l e r i s s i mi l a r t o MBC1 e xc e pt i t a c c e s s e s a l l 16mbi t s of ROM wi t hout r e qui r i ng a ny wr i t e s t o t he 4000- 5FFF a r e a . Wr i t i ng a va l ue ( XBBBBBBB - X = Don' t c a r e , B = ba nk s e l e c t bi t s ) i nt o 2000- 3FFF a r e a wi l l s e l e c t a n a ppr opr i a t e ROM ba nk a t 4000- 7FFF. Al s o, t hi s MBC ha s a bui l t - i n ba t t e r y- ba c ke d Re a l Ti me Cl oc k ( RTC) not f ound i n a ny ot he r MBC. Some MBC3 c a r t s do not s uppor t i t ( Wa r i oLa nd I I non c ol or ve r s i on) but s ome do ( Ha r ve s t Moon/ J a pa ne s e ve r s i on. ) • MBC5 ( Me mor y Ba nk Cont r ol l e r 5) : Thi s c ont r ol l e r i s t he f i r s t MBC t ha t i s gua r a nt e e d t o r un i n Ga me Boy Col or doubl e - s pe e d mode but i t a ppe a r s t he ot he r MBC' s r un f i ne i n GBC doubl e s pe e d mode a s we l l . by DP Page 15 2.6. Cartridge Types Game BoyTM CPU Manual I t i s s i mi l a r t o t he MBC3 ( but no RTC) but c a n a c c e s s up t o 64mbi t s of ROM a nd up t o 1mbi t of RAM. The l owe r 8 bi t s of t he 9- bi t r om ba nk s e l e c t i s wr i t t e n t o t he 2000- 2FFF a r e a whi l e t he uppe r bi t i s wr i t t e n t o t he l e a s t s i gni f i c a nt bi t of t he 3000- 3FFF a r e a . Wr i t i ng a va l ue ( XXXXBBBB - X = Don' t c a r e , B = ba nk s e l e c t bi t s ) i nt o 4000- 5FFF a r e a wi l l s e l e c t a n a ppr opr i a t e RAM ba nk a t A000- BFFF i f t he c a r t c ont a i ns RAM. Ra m s i z e s a r e 64kbi t , 256kbi t , & 1mbi t . Al s o, t hi s i s t he f i r s t MBC t ha t a l l ows r om ba nk 0 t o a ppe a r i n t he 4000- 7FFF r a nge by wr i t i ng $000 t o t he r om ba nk s e l e c t . • Rumbl e Car t s : Rumbl e c a r t s us e a n MBC5 me mor y ba nk c ont r ol l e r . Rumbl e c a r t s c a n onl y ha ve up t o 256kbi t s of RAM. The hi ghe s t RAM a ddr e s s l i ne t ha t a l l ows 1mbi t of RAM on MBC5 non- r umbl e c a r t s i s us e d a s t he mot or on/ of f f or t he r umbl e c a r t . Wr i t i ng a va l ue ( XXXXMBBB - X = Don' t c a r e , M = mot or , B = ba nk s e l e c t bi t s ) i nt o 4000- 5FFF a r e a wi l l s e l e c t a n a ppr opr i a t e RAM ba nk a t A000- BFFF i f t he c a r t c ont a i ns RAM. RAM s i z e s a r e 64kbi t or 256kbi t s . To t ur n t he r umbl e mot or on s e t M = 1, M = 0 t ur ns i t of f . • HuC1 ( Me mor y Ba nk / I nf r a r e d Cont r ol l e r ) : Thi s c ont r ol l e r ma de by Huds on Sof t a ppe a r s t o be ve r y s i mi l a r t o a n MBC1 wi t h t he ma i n di f f e r e nc e be i ng t ha t i t s uppor t s i nf r a r e d LED i nput / out put . The J a pa ne s e c a r t " Fi ght i ng Phoe ni x" ( i nt e r na l c a r t na me : SUPER B DAMAN) i s known t o c ont a i n t hi s c hi p. Page 16 V 1.01 Game BoyTM CPU Manual 2.7. Special modi 2.7. Special modi 2.7.1. Power Up Sequence Whe n t he Ga me Boy i s powe r e d up, a 256 byt e pr ogr a m s t a r t i ng a t me mor y l oc a t i on 0 i s e xe c ut e d. Thi s pr ogr a m i s l oc a t e d i n a ROM i ns i de t he Ga me Boy. The f i r s t t hi ng t he pr ogr a m doe s i s r e a d t he c a r t r i dge l oc a t i ons f r om $104 t o $133 a nd pl a c e t hi s gr a phi c of a Ni nt e ndo l ogo on t he s c r e e n a t t he t op. Thi s i ma ge i s t he n s c r ol l e d unt i l i t i s i n t he mi ddl e of t he s c r e e n. Two mus i c a l not e s a r e t he n pl a ye d on t he i nt e r na l s pe a ke r . Aga i n, t he c a r t r i dge l oc a t i ons $104 t o $133 a r e r e a d but t hi s t i me t he y a r e c ompa r e d wi t h a t a bl e i n t he i nt e r na l r om. I f a ny byt e f a i l s t o c ompa r e , t he n t he Ga me Boy s t ops c ompa r i ng byt e s a nd s i mpl y ha l t s a l l ope r a t i ons . GB & GB Poc ke t : Ne xt , t he Ga me Boy s t a r t s a ddi ng a l l of t he byt e s i n t he c a r t r i dge f r om $134 t o $14d. A va l ue of 25 de c i ma l i s a dde d t o t hi s t ot a l . I f t he l e a s t s i gni f i c a nt byt e of t he r e s ul t i s a not a z e r o, t he n t he Ga me Boy wi l l s t op doi ng a nyt hi ng. Supe r GB: Eve n t hough t he GB & GBP c he c k t he me mor y l oc a t i ons f r om $134 t o $14d, t he SGB doe s n' t . I f t he a bove c he c ks pa s s t he n t he i nt e r na l ROM i s di s a bl e d a nd c a r t r i dge pr ogr a m e xe c ut i on be gi ns a t l oc a t i on $100 wi t h t he f ol l owi ng r e gi s t e r va l ue s : AF=$01- GB/ SGB, $FF- GBP, $11- GBC F =$B0 by DP Page 17 2.7.1. Power Up Sequence Game BoyTM CPU Manual BC=$0013 DE=$00D8 HL=$014D St a c k Poi nt e r =$FFFE [ $FF05] = $00 ; TI MA [ $FF06] = $00 ; TMA [ $FF07] = $00 ; TAC [ $FF10] = $80 ; NR10 [ $FF11] = $BF ; NR11 [ $FF12] = $F3 ; NR12 [ $FF14] = $BF ; NR14 [ $FF16] = $3F ; NR21 [ $FF17] = $00 ; NR22 [ $FF19] = $BF ; NR24 [ $FF1A] = $7F ; NR30 [ $FF1B] = $FF ; NR31 [ $FF1C] = $9F ; NR32 [ $FF1E] = $BF ; NR33 [ $FF20] = $FF ; NR41 [ $FF21] = $00 ; NR42 [ $FF22] = $00 ; NR43 [ $FF23] = $BF ; NR30 [ $FF24] = $77 ; NR50 [ $FF25] = $F3 ; NR51 [ $FF26] = $F1- GB, $F0- SGB ; NR52 [ $FF40] = $91 ; LCDC [ $FF42] = $00 ; SCY [ $FF43] = $00 ; SCX [ $FF45] = $00 ; LYC [ $FF47] = $FC ; BGP [ $FF48] = $FF ; OBP0 [ $FF49] = $FF ; OBP1 [ $FF4A] = $00 ; WY [ $FF4B] = $00 ; WX [ $FFFF] = $00 ; IE Page 18 V 1.01 Game BoyTM CPU Manual 2.7.1. Power Up Sequence I t i s not a good i de a t o a s s ume t he a bove va l ue s wi l l a l wa ys e xi s t . A l a t e r ve r s i on Ga me Boy c oul d c ont a i n di f f e r e nt va l ue s t ha n t he s e a t r e s e t . Al wa ys s e t t he s e r e gi s t e r s on r e s e t r a t he r t ha n a s s ume t he y a r e a s a bove . Pl e a s e not e t ha t Ga me Boy i nt e r na l RAM on powe r up c ont a i ns r a ndom da t a . Al l of t he Ga me Boy e mul a t or s t e nd t o s e t a l l RAM t o va l ue $00 on e nt r y. Ca r t RAM t he f i r s t t i me i t i s a c c e s s e d on a r e a l Ga me Boy c ont a i ns r a ndom da t a . I t wi l l onl y c ont a i n known da t a i f t he Ga me Boy c ode i ni t i a l i z e s i t t o s ome va l ue . 2.7.2. Stop Mode The a nd a nd hor i STOP c omma nd ha l t s t he Ga me Boy pr oc e s s or s c r e e n unt i l a ny but t on i s pr e s s e d. The GB GBP s c r e e n goe s whi t e wi t h a s i ngl e da r k z ont a l l i ne . The GBC s c r e e n goe s bl a c k. 2.7.3. Low-Power Mode I t i s r e c omme nde d t whe ne ve r pos s i bl e t t he l i f e of t he ba t s ys t e m c l oc k r e duc i t he CPU a nd ROM. ha t t he HALT i ns t r uc t i on be us e d o r e duc e powe r c ons umpt i on & e xt e nd t e r i e s . Thi s c omma nd s t ops t he ng t he powe r c ons umpt i on of bot h The CPU wi l l r e ma i n s us pe nde d unt i l a n i nt e r r upt oc c ur s a t whi c h poi nt t he i nt e r r upt i s s e r vi c e d a nd t he n t he i ns t r uc t i on i mme di a t e l y f ol l owi ng t he HALT by DP Page 19 Game BoyTM CPU Manual 2.7.3. Low-Power Mode i s e xe c ut e d. ha l t doe s n' t t he pr ogr a m i ns t r uc t i on I f i nt e r r upt s a r e di s a bl e d ( DI ) t he n s us pe nd ope r a t i on but i t doe s c a us e c ount e r t o s t op c ount i ng f or one on t he GB, GBP, a nd SGB a s me nt i one d be l ow. De pe ndi ng on how muc h CPU t i me i s r e qui r e d by a ga me , t he HALT i ns t r uc t i on c a n e xt e nd ba t t e r y l i f e a nywhe r e f r om 5 t o 50% or pos s i bl y mor e . WARNI NG: The i ns t r uc t i on i mme di a t e l y f ol l owi ng t he HALT i ns t r uc t i on i s " s ki ppe d" whe n i nt e r r upt s a r e di s a bl e d ( DI ) on t he GB, GBP, a nd SGB. As a r e s ul t , a l wa ys put a NOP a f t e r t he HALT i ns t r uc t i on. Thi s i ns t r uc t i on s ki ppi ng doe s n' t oc c ur whe n i nt e r r upt s a r e e na bl e d ( EI ) . Thi s " s ki ppi ng" doe s not s e e m t o oc c ur on t he Ga me Boy Col or e ve n i n r e gul a r GB mode . ( $143=$00) EXAMPLES f r om Ma r t i n Kor t h who doc ume nt e d t hi s pr obl e m: ( a s s umi ng i nt e r r upt s di s a bl e d f or a l l e xa mpl e s ) 1) Thi s c ode c a us e s t he ' a ' i nc r e me nt e d TWI CE. 76 ha l t 3C i nc a r e gi s t e r t o be 2) The ne xt e xa mpl e i s a bi t mor e di f f i c ul t . The f ol l owi ng c ode 76 ha l t FA 34 12 ld a , ( 1234) i s e f f e c t i ve l y e xe c ut e d a s 76 Page 20 ha l t V 1.01 Game BoyTM CPU Manual FA FA 34 12 ld ld 2.7.3. Low-Power Mode a , ( 34FA) ( de ) , a 3) Fi na l l y a n i nt e r e s t i ng s i de e f f e c t 76 ha l t 76 ha l t Thi s c ombi na t i on ha ngs t he c pu. The f i r s t HALT c a us e s t he s e c ond HALT t o be r e pe a t e d, whi c h t he r e f or e c a us e s t he f ol l owi ng c omma nd ( =i t s e l f ) t o be r e pe a t e d - a ga i n a nd a ga i n. Pl a c i ng a NOP be t we e n t he t wo ha l t s woul d c a us e t he NOP t o be r e pe a t e d onc e , t he s e c ond HALT woul dn' t l oc k t he c pu. Be l ow i s s ugge s t e d c ode f or Ga me Boy pr ogr a ms : ; **** Ma i n Ga me Loop **** Ma i n: ha l t ; s t op s ys t e m c l oc k ; r e t ur n f r om ha l t whe n ; i nt e r r upt e d nop ; ( Se e WARNI NG a bove . ) by DP ld or jr a , ( Vbl nkFl a g) a z , Ma i n xor ld a ( Vbl nkFl a g) , a ; Cl e a r V- Bl a nk f l a g cal l cal l Cont r ol s Ga me ; but t on i nput s ; ga me ope r a t i on jr Ma i n ; V- Bl a nk i nt e r r upt ? ; No, s ome ot he r ; i nt e r r upt Page 21 2.7.3. Low-Power Mode Game BoyTM CPU Manual ; **** V- Bl a nk I nt e r r upt Rout i ne **** Vbl nk: pus h af pus h bc pus h de pus h hl cal l Spr i t e Dma ld ld a, 1 ( Vbl nkFl a g) , a pop pop pop pop r et i hl de bc af ; Do s pr i t e upda t e s 2.8. Video 2.8.1. Tiles The ma i n Ga me Boy s c r e e n buf f e r ( ba c kgr ound) c ons i s t s of 256x256 pi xe l s or 32x32 t i l e s ( 8x8 pi xe l s e a c h) . Onl y 160x144 pi xe l s c a n be di s pl a ye d on t he s c r e e n. Re gi s t e r s SCROLLX a nd SCROLLY hol d t he c oor di na t e s of ba c kgr ound t o be di s pl a ye d i n t he l e f t uppe r c or ne r of t he s c r e e n. Ba c kgr ound wr a ps a r ound t he s c r e e n ( i . e . whe n pa r t of i t goe s of f t he s c r e e n, i t a ppe a r s on t he oppos i t e s i de . ) An a r e a of VRAM known a s Ba c kgr ound Ti l e Ma p c ont a i ns t he numbe r s of t i l e s t o be di s pl a ye d. I t i s or ga ni z e d a s 32 r ows of 32 byt e s e a c h. Ea c h byt e c ont a i ns a Page 22 V 1.01 Game BoyTM CPU Manual 2.8.1. Tiles numbe r of a t i l e t o be di s pl a ye d. Ti l e pa t t e r ns a r e t a ke n f r om t he Ti l e Da t a Ta bl e l oc a t e d e i t he r a t $8000- 8FFF or $8800- 97FF. I n t he f i r s t c a s e , pa t t e r ns a r e numbe r e d wi t h uns i gne d numbe r s f r om 0 t o 255 ( i . e . pa t t e r n #0 l i e s a t a ddr e s s $8000) . I n t he s e c ond c a s e , pa t t e r ns ha ve s i gne d numbe r s f r om - 128 t o 127 ( i . e . pa t t e r n #0 l i e s a t a ddr e s s $9000) . The Ti l e Da t a Ta bl e a ddr e s s f or t he ba c kgr ound c a n be s e l e c t e d vi a LCDC r e gi s t e r . Be s i de s ba c kgr ound, t he r e i s a l s o a " wi ndow" ove r l a yi ng t he ba c kgr ound. The wi ndow i s not s c r ol l a bl e i . e . i t i s a l wa ys di s pl a ye d s t a r t i ng f r om i t s l e f t uppe r c or ne r . The l oc a t i on of a wi ndow on t he s c r e e n c a n be a dj us t e d vi a WNDPOSX a nd WNDPOSY r e gi s t e r s . Sc r e e n c oor di na t e s of t he t op l e f t c or ne r of a wi ndow a r e WNDPOSX- 7, WNDPOSY. The t i l e numbe r s f or t he wi ndow a r e s t or e d i n t he Ti l e Da t a Ta bl e . None of t he wi ndows t i l e s a r e e ve r t r a ns pa r e nt . Bot h t he Ba c kgr ound a nd t he wi ndow s ha r e t he s a me Ti l e Da t a Ta bl e . Bot h ba c kgr ound a nd wi ndow c a n be di s a bl e d or e na bl e d s e pa r a t e l y vi a bi t s i n t he LCDC r e gi s t e r . I f t he wi ndow i s us e d a nd a s c a n l i ne i nt e r r upt di s a bl e s i t ( e i t he r by wr i t i ng t o LCDC or by s e t t i ng WX > 166) a nd a s c a n l i ne i nt e r r upt a l i t t l e l a t e r on e na bl e s i t t he n t he wi ndow wi l l r e s ume a ppe a r i ng on t he s c r e e n a t t he e xa c t pos i t i on of t he wi ndow whe r e i t l e f t of f e a r l i e r . Thi s wa y, e ve n i f t he r e a r e onl y 16 l i ne s of us e f ul gr a phi c s i n t he wi ndow, you c oul d di s pl a y t he f i r s t 8 l i ne s a t t he t op of t he s c r e e n a nd t he ne xt 8 l i ne s a t t he bot t om i f you wa nt e d t o do s o. by DP Page 23 Game BoyTM CPU Manual 2.8.1. Tiles WX ma y be c ha nge d dur i ng a s c a n l i ne i nt e r r upt ( t o e i t he r c a us e a gr a phi c di s t or t i on e f f e c t or t o di s a bl e t he wi ndow ( WX>166) ) but c ha nge s t o WY a r e not dyna mi c a nd won' t be not i c e d unt i l t he ne xt s c r e e n r e dr a w. The t i l e i ma ge s a r e s t or e d i n t he Ti l e Pa t t e r n Ta bl e s . Ea c h 8x8 i ma ge oc c upi e s 16 byt e s , whe r e e a c h 2 byt e s r e pr e s e nt a l i ne : Ti l e : . 33333. . 22. . . 22. 11. . . 11. 2222222. <- 33. . . 33. 22. . . 22. 11. . . 11. ........ I mage : di gi t s r e pr e s e nt c ol or numbe r s . 33333. . - > 01111100 01111100 22. . . 22. - > 00000000 11000110 11. . . 11. - > 11000110 00000000 2222222. - > 00000000 11111110 33. . . 33. - > 11000110 11000110 22. . . 22. - > 00000000 11000110 11. . . 11. - > 11000110 00000000 . . . . . . . . - > 00000000 00000000 -> -> -> -> -> -> -> -> -> -> -> -> -> -> -> -> $7C $7C $00 $C6 $C6 $00 $00 $FE $C6 $C6 $00 $C6 $C6 $00 $00 $00 As i t wa s s a i d be f or e , t he r e a r e t wo Ti l e Pa t t e r n Ta bl e s a t $8000- 8FFF a nd a t $8800- 97FF. The f i r s t one c a n be us e d f or s pr i t e s , t he ba c kgr ound, a nd t he wi ndow di s pl a y. I t s t i l e s a r e numbe r e d f r om 0 t o 255. The s e c ond t a bl e c a n be us e d f or t he ba c kgr ound a nd t he wi ndow di s pl a y a nd i t s t i l e s a r e numbe r e d f r om - 128 t o 127. Page 24 V 1.01 Game BoyTM CPU Manual 2.8.2. Sprites 2.8.2. Sprites Ga me Boy vi de o c ont r ol l e r c a n di s pl a y up t o 40 s pr i t e s e i t he r i n 8x8 or i n 8x16 pi xe l s . Be c a us e of a l i mi t a t i on of ha r dwa r e , onl y t e n s pr i t e s c a n be di s pl a ye d pe r s c a n l i ne . Spr i t e pa t t e r ns ha ve t he s a me f or ma t a s t i l e s , but t he y a r e t a ke n f r om t he Spr i t e Pa t t e r n Ta bl e l oc a t e d a t $8000- 8FFF a nd ha ve uns i gne d numbe r i ng. Spr i t e a t t r i but e s r e s i de i n t he Spr i t e At t r i but e Ta bl e ( OAM - Obj e c t At t r i but e Me mor y) a t $FE00- FE9F. OAM i s di vi de d i nt o 40 4- byt e bl oc ks e a c h of whi c h c or r e s ponds t o a s pr i t e . I n 8x16 s pr i t e mode , t he l e a s t s i gni f i c a nt bi t of t he s pr i t e pa t t e r n numbe r i s i gnor e d a nd t r e a t e d a s 0. Whe n s pr i t e s wi t h di f f e r e nt x c oor di na t e va l ue s ove r l a p, t he one wi t h t he s ma l l e r x c oor di na t e ( c l os e r t o t he l e f t ) wi l l ha ve pr i or i t y a nd a ppe a r a bove a ny ot he r s . Whe n s pr i t e s wi t h t he s a me x c oor di na t e va l ue s ove r l a p, t he y ha ve pr i or i t y a c c or di ng t o t a bl e or de r i ng. ( i . e . $FE00 - hi ghe s t , $FE04 - ne xt hi ghe s t , et c. ) Pl e a s e not e t ha t Spr i t e X=0, Y=0 hi de s a s pr i t e . To di s pl a y a s pr i t e us e t he f ol l owi ng f or mul a s : Spr i t e Sc r e e nPos i t i onX ( Uppe r l e f t c or ne r of s pr i t e ) = Spr i t e X - 8 Spr i t e Sc r e e nPos i t i onY ( Uppe r l e f t c or ne r of s pr i t e ) = Spr i t e Y - 16 by DP Page 25 Game BoyTM CPU Manual 2.8.2. Sprites To di s pl a y a s pr i t e i n t he uppe r l e f t c or ne r of t he s c r e e n s e t s pr i t e X=8, Y=16. Onl y 10 s pr i t e s c a n be di s pl a ye d on a ny one l i ne . Whe n t hi s l i mi t i s e xc e e de d, t he l owe r pr i or i t y s pr i t e s ( pr i or i t i e s l i s t e d a bove ) won' t be di s pl a ye d. To ke e p unus e d s pr i t e s f r om a f f e c t i ng ons c r e e n s pr i t e s s e t t he i r Y c oor di na t e t o Y=0 or Y=>144+16. J us t s e t t i ng t he X c oor di na t e t o X=0 or X=>160+8 on a s pr i t e wi l l hi de i t but i t wi l l s t i l l a f f e c t ot he r s pr i t e s s ha r i ng t he s a me l i ne s . Bl oc ks ha ve t he f ol l owi ng f or ma t : Byt e 0 Byt e 1 Byt e 2 Byt e 3 Y pos i t i X pos i t i Pa t t e r n numbe r s , LSB i s i Fl a gs : Bi t 7 Bi t 6 Bi t 5 Page 26 on on t he s c r e e n on on t he s c r e e n numbe r 0- 255 ( Unl i ke s ome t i l e s pr i t e pa t t e r n numbe r s a r e uns i gne d. gnor e d ( t r e a t e d a s 0) i n 8x16 mode . ) Pr i or i t y I f t hi s bi t i s s e t t o 0, s pr i t e i s di s pl a ye d on t op of ba c kgr ound & wi ndow. I f t hi s bi t i s s e t t o 1, t he n s pr i t e wi l l be hi dde n be hi nd c ol or s 1, 2, a nd 3 of t he ba c kgr ound & wi ndow. ( Spr i t e onl y pr e va i l s ove r c ol or 0 of BG & wi n. ) Y flip Spr i t e pa t t e r n i s f l i ppe d ve r t i c a l l y i f t hi s bi t i s s e t t o 1. X flip Spr i t e pa t t e r n i s f l i ppe d hor i z ont a l l y i f t hi s bi t i s s e t t o 1. V 1.01 Game BoyTM CPU Manual Bi t 4 2.8.2. Sprites Pa l e t t e numbe r Spr i t e c ol or s a r e t a ke n f r om OBJ 1PAL i f t hi s bi t i s s e t t o 1 a nd f r om OBJ 0PAL ot he r wi s e . 2.8.3. Sprite RAM Bug The r e i s t r as h t o c omma nds r a nge of a f l a w i n t he Ga me Boy ha r dwa r e t ha t c a us e s be wr i t t e n t o OAM RAM i f t he f ol l owi ng a r e us e d whi l e t he i r 16- bi t c ont e nt i s i n t he $FE00 t o $FEFF: i nc xx de c xx ( xx = bc , de , or hl ) l di a , ( hl ) l dd a , ( hl ) l di ( hl ) , a l dd ( hl ) , a Onl y s pr i t e s 1 & 2 ( $FE00 & $FE04) a r e not a f f e c t e d by t he s e i ns t r uc t i ons . by DP Page 27 2.9. Sound Game BoyTM CPU Manual 2.9. Sound The r e a r e t wo s ound c ha nne l s c onne c t e d t o t he out put t e r mi na l s SO1 a nd SO2. The r e i s a l s o a i nput t e r mi na l Vi n c onne c t e d t o t he c a r t r i dge . I t c a n be r out e d t o e i t he r of bot h out put t e r mi na l s . Ga me Boy c i r c ui t r y a l l ows pr oduc i ng s ound i n f our di f f e r e nt wa ys : Qua dr a ngul a r wa ve pa t t e r ns wi f unc t i ons . Qua dr a ngul a r wa ve f unc t i ons . Vol unt a r y wa ve pa t Whi t e noi s e wi t h a n e nve l ope t h s we e p a nd e nve l ope pa t t e r ns wi t h e nve l ope t e r ns f r om wa ve RAM. f unc t i on. The s e f our s ounds c a n be c ont r ol l e d i nde pe nda nt l y a nd t he n mi xe d s e pa r a t e l y f or e a c h of t he out put t e r mi na l s . Sound r e gi s t e r s ma y be s e t a t a l l t i me s whi l e pr oduc i ng s ound. Whe n s e t t i ng t he i ni t i a l va l ue of t he e nve l ope a nd r e s t a r t i ng t he l e ngt h c ount e r , s e t t he i ni t i a l f l a g t o 1 a nd i ni t i a l i z e t he da t a . Unde r t he f ol l owi ng s i t ua t i ons t he Sound ON f l a g i s r e s e t a nd t he s ound out put s t ops : 1. Whe n t he s ound out put i s s t oppe d by t he l e ngt h c ount e r . 2. Whe n ove r f l ow oc c ur s a t t he a ddi t i on mode whi l e s we e p i s ope r a t i ng a t s ound 1. Whe n t he Sound OFF f l a g f or s ound 3 ( bi t 7 of NR30) i s s e t a t 0, t he c a nc e l l a t i on of t he OFF mode mus t be done by s e t t i ng t he s ound OFF f l a g t o 1. By i ni t i a l i z i ng s ound 3, i t s t a r t s i t ' s f unc t i on. Page 28 V 1.01 Game BoyTM CPU Manual 2.9. Sound Whe n t he Al l Sound OFF f l a g ( bi t 7 of NR52) i s s e t t o 0, t he mode r e gi s t e r s f or s ounds 1, 2, 3, a nd 4 a r e r e s e t a nd t he s ound out put s t ops . ( NOTE: The s e t t i ng of e a c h s ounds mode r e gi s t e r mus t be done a f t e r t he Al l Sound OFF mode i s c a nc e l l e d. Dur i ng t he Al l Sound OFF mode , e a c h s ound mode r e gi s t e r c a nnot be s e t . ) NOTE: DURI NG THE ALL SOUND OFF MODE, GB POWER CONSUMPTI ON DROPS BY 16% OR MORE! WHI LE YOUR PROGRAMS AREN' T USI NG SOUND THEN SET THE ALL SOUND OFF FLAG TO 0. I T DEFAULTS TO 1 ON RESET. The s e t e nd t o be t he t wo mos t i mpor t a nt e qua t i ons i n c onve r t i ng be t we e n He r t z a nd GB f r e que nc y r e gi s t e r s : ( Sounds wi l l ha ve a 2. 4% hi ghe r f r e que nc y on Supe r GB. ) gb Hz by DP = 2048 - ( 131072 / Hz ) = 131072 / ( 2048 - gb) Page 29 Game BoyTM CPU Manual 2.10. Timer 2.10. Timer Some t i me s i t ' s us e f ul t o ha ve a t i me r t ha t i nt e r r upt s a t r e gul a r i nt e r va l s f or r out i ne s t ha t r e qui r e pe r i odi c or pe r c i s e upda t e s . The t i me r i n t he Ga me Boy ha s a s e l e c t a bl e f r e que nc y of 4096, 16384, 65536, or 262144 He r t z . Thi s f r e que nc y i nc r e me nt s t he Ti me r Count e r ( TI MA) . Whe n i t ove r f l ows , i t ge ne r a t e s a n i nt e r r upt . I t i s t he n l oa de d wi t h t he c ont e nt s of Ti me r Modul o ( TMA) . The f ol l owi ng a r e e xa mpl e s : ; Thi s i nt e r va l t i me r i nt e r r upt s 4096 t i me s pe r s e c ond l l l l d d d d a, - 1 ( $FF06) , a a, 4 ( $FF07) , a ; Se t TMA t o di vi de c l oc k by 1 ; Se t c l oc k t o 4096 He r t z ; Thi s i nt e r va l t i me r i nt e r r upt s 65536 t i me s pe r s e c ond l l l l d d d d Page 30 a, - 4 ( $FF06) , a a, 5 ( $FF07) , a ; Se t TMA t o di vi de c l oc k by 4 ; Se t c l oc k t o 262144 He r t z V 1.01 Game BoyTM CPU Manual 2.11. Serial I/O 2.11. Serial I/O The s e r i a l I / O por t on t he Ga me boy i s a ve r y s i mpl e s e t up a nd i s c r ude c ompa r e d t o s t a nda r d RS- 232 ( I BMPC) or RS- 485 ( Ma c i nt os h) s e r i a l por t s . The r e a r e no s t a r t or s t op bi t s s o t he pr ogr a mme r mus t be mor e c r e a t i ve whe n us i ng t hi s por t . Dur i ng a t r a ns f e r , a byt e i s s hi f t e d i n a t t he s a me t i me t ha t a byt e i s s hi f t e d out . The r a t e of t he s hi f t i s de t e r - mi ne d by whe t he r t he c l oc k s our c e i s i nt e r na l or e xt e r na l . I f i nt e r na l , t he bi t s a r e s hi f t e d out a t a r a t e of 8192Hz ( 122 mi c r os e c onds ) pe r bi t . The mos t s i gni f i c a nt bi t i s s hi f t e d i n a nd out fi rst . Whe n t he i c l oc k pi n not us e d. t o c l oc k i nt e r na l c l oc k i s s e l e c t e d, i t dr i ve s t he on t he ga me l i nk por t a nd i t s t a ys hi gh whe n Dur i ng a t r a ns f e r i t wi l l go l ow e i ght t i me s n/ out e a c h bi t . A pr ogr a mme r i ni t a t e s a s e r i a l t r a ns f e r by s e t t i ng bi t 7 of $FF02. Thi s bi t ma y be r e a d a nd i s a ut oma t i c a l l y s e t t o 0 a t t he c ompl e t i on of t r a ns f e r . Af t e r t hi s bi t i s s e t , a n i nt e r r upt wi l l t he n oc c ur e i ght bi t c l oc ks l a t e r i f t he s e r i a l i nt e r r upt i s e na bl e d. I f i nt e r na l c l oc k i s s e l e c t e d a nd s e r i a l i nt e r r upt i s e na bl e d, t hi s i nt e r r upt oc c ur s 122*8 mi c r os e c onds l at er . I f e xt e r na l c l oc k i s s e l e c t e d a nd s e r i a l i nt e r r upt i s e na bl e d, a n i nt e r r upt wi l l oc c ur e i ght bi t c l oc ks l at er . I ni t i a t i ng a s e r i a l t r a ns f e r wi t h e xt e r na l c l oc k wi l l wa i t f or e ve r i f no e xt e r na l c l oc k i s pr e s e nt . Thi s by DP Page 31 2.11. Serial I/O Game BoyTM CPU Manual a l l ows a c e r t a i n a mount of s ync hr oni z a t i on wi t h e a c h s e r i a l por t . The s t a t e of t he l a s t bi t s t a t e of t he out put l i ne pl a c e . I f a s e r i a l t r a ns f e r wi t a nd no e xt e r na l Ga me Boy i wi l l be r e c e i ve d i n t he t s hi f t e d out de t e r mi ne s t he unt i l a not he r t r a ns f e r t a ke s h i nt e r na l c l oc k i s pe r f or me d s pr e s e nt , a va l ue of $FF r a ns f e r . The f ol l owi ng c ode c a us e s $75 t o be s hi f t e d out t he s e r i a l por t a nd a byt e t o be s hi f t e d i nt o $FF01: l l l l d d d d a , $75 ( $FF01) , a a , $81 ( $FF02) , a 2.12. Interrupts 2.12.1. Interrupt Procedure The I ME ( i nt e r r upt ma s t e r e na bl e ) f l a g i s r e s e t by DI a nd pr ohi bi t s a l l i nt e r r upt s . I t i s s e t by EI a nd a c knowl e dge s t he i nt e r r upt s e t t i ng by t he I E r e gi s t e r . 1. Whe n a n i nt e r r upt i s ge ne r a t e d, t he I F f l a g wi l l be s et . 2. I f t he I ME f l a g i s s e t & t he c or r e s pondi ng I E f l a g i s s e t , t he f ol l owi ng 3 s t e ps a r e pe r f or me d. 3. Re s e t t he I ME f l a g a nd pr e ve nt a l l i nt e r r upt s . 4. The PC ( pr ogr a m c ount e r ) i s pus he d ont o t he s t a c k. 5. J ump t o t he s t a r t i ng a ddr e s s of t he i nt e r r upt . Page 32 V 1.01 Game BoyTM CPU Manual 2.12.1. Interrupt Procedure Re s e t t i ng of t he I F r e gi s t e r , whi c h wa s t he c a us e of t he i nt e r r upt , i s done by ha r dwa r e . Dur i ng t he i nt e r r upt , pus hi ng of r e gi s t e r s t o be us e d s houl d be pe r f or me d by t he i nt e r r upt r out i ne . Onc e t he i nt e r r upt f l a g a nd i nt e r r upt i nt e r r upt s e r vi c e i s i n pr ogr e s s , a l l t he s wi l l be pr ohi bi t e d. Howe ve r , i f t he I ME t he I E f l a g a r e c ont r ol l e d, a numbe r of s e r vi c e s c a n be ma de pos s i bl e by ne s t i ng. Re t ur n f r om a n i nt e r r upt r out i ne c a n be pe r f or me d by e i t he r RETI or RET i ns t r uc t i on. The RETI i ns t r uc t i on e na bl e s i nt e r r upt s a f t e r doi ng a r e t ur n ope r a t i on. I f a RET i s us e d a s t he f i na l i ns t r uc t i on i n a n i nt e r r upt r out i ne , i nt e r r upt s wi l l r e ma i n di s a bl e d unl e s s a EI wa s us e d i n t he i nt e r r upt r out i ne or i s us e d a t a l a t e r t i me . The i nt e r r upt wi l l be a c knowl e dge d dur i ng opc ode f e t c h pe r i od of e a c h i ns t r uc t i on. by DP Page 33 2.12.2. Interrupt Descriptions Game BoyTM CPU Manual 2.12.2. Interrupt Descriptions The f ol l owi ng i nt e r r upt s onl y oc c ur i f t he y ha ve be e n e na bl e d i n t he I nt e r r upt Ena bl e r e gi s t e r ( $FFFF) a nd i f t he i nt e r r upt s ha ve a c t ua l l y be e n e na bl e d us i ng t he EI i ns t r uc t i on. 1. V-Blank The V- Bl a nk i nt e r r upt oc c ur s ~59. 7 t i me s a s e c ond on a r e gul a r GB a nd ~61. 1 t i me s a s e c ond on a Supe r GB ( SGB) . Thi s i nt e r r upt oc c ur s a t t he be gi nni ng of t he V- Bl a nk pe r i od. Dur i ng t hi s pe r i od vi de o ha r dwa r e i s not us i ng vi de o r a m s o i t ma y be f r e e l y a c c e s s e d. Thi s pe r i od l a s t s a ppr oxi ma t e l y 1. 1 ms . 2. LCDC Status The r e a r e va r i ous r e a s ons f or t hi s i nt e r r upt t o oc c ur a s de s c r i be d by t he STAT r e gi s t e r ( $FF40) . One ve r y popul a r r e a s on i s t o i ndi c a t e t o t he us e r whe n t he vi de o ha r dwa r e i s a bout t o r e dr a w a gi ve n LCD l i ne . Thi s c a n be us e f ul f or dyna mi c a l l y c ont r ol l i ng t he SCX/ SCY r e gi s t e r s ( $FF43/ $FF42) t o pe r f or m s pe c i a l vi de o e f f e c t s . 3. Timer Overflow Thi s i nt e r r upt oc c ur s whe n t he TI MA r e gi s t e r ( $FF05) c ha nge s f r om $FF t o $00. 4. Serial Transfer Completion Thi s i nt e r r upt oc c ur s whe n a s e r i a l t r a ns f e r ha s c ompl e t e d on t he ga me l i nk por t . Page 34 V 1.01 Game BoyTM CPU Manual 2.12.2. Interrupt Descriptions 5. High-to-Low of P10-P13 Thi s i nt e r r upt oc c ur s on a t r a ns i t i on of a ny of t he ke ypa d i nput l i ne s f r om hi gh t o l ow. Due t o t he f a c t t ha t ke ypa d " bounc e " * i s vi r t ua l l y a l wa ys pr e s e nt , s of t wa r e s houl d e xpe c t t hi s i nt e r r upt t o oc c ur one or mor e t i me s f or e ve r y but t on pr e s s a nd one or mor e t i me s f or e ve r y but t on r e l e a s e . * - Bounc e t e nds t o be a s i de e f f e c t ma ki ng or br e a ki ng a c onne c t i on. pe r i ods , i t i s ve r y c ommon f or a os c i l l a t i on be t we e n hi gh & l ow s t pl a c e . of a ny but t on Dur i ng t he s e s ma l l a mount of a t e s t o t a ke 2.13. Special Registers 2.13.1. I/O Registers 1. FF00 (P1) Na me - P1 Cont e nt s - Re gi s t e r f or r e a di ng j oy pa d i nf o a nd de t e r mi ni ng s ys t e m t ype . ( R/ W) Bi Bi Bi Bi Bi Bi Bi Bi by DP t t t t t t t t 7 6 5 4 3 2 1 0 - Not Not P15 P14 P13 P12 P11 P10 us e d us e d out por t out por t i n por t i n por t i n por t i n por t Page 35 Game BoyTM CPU Manual 2.13.1. I/O Registers Thi s i s t he ma t r i x l a yout f or r e gi s t e r $FF00: P14 P15 | | P10- - - - - - - O- Ri ght - - - - O- A | | P11- - - - - - - O- Le f t - - - - - O- B | | P12- - - - - - - O- Up- - - - - - - O- Se l e c t | | P13- - - - - - - O- Down- - - - - O- St a r t | | Exa mpl e c ode : Ga me : Ms . Pa c ma n Addr e s s : $3b1 LD A, $20 LD ( $FF00) , A LD A, ( $FF00) LD A, ( $FF00) CPL AND $0F SWAP A LD B, A LD A, $10 LD ( $FF00) , A LD A, ( $FF00) LD A, ( $FF00) LD A, ( $FF00) LD A, ( $FF00) LD A, ( $FF00) LD A, ( $FF00) Page 36 <- bi t 5 = $20 <- s e l e c t P14 by s e t t i ng i t l ow <<<<<- wa i t a f e w c ompl e me nt ge t onl y f i s wa p i t s t or e A i n c yc l e s A r s t 4 bi t s B <- s e l e c t P15 by s e t t i ng i t l ow <- Wa i t a f e w MORE c yc l e s V 1.01 Game BoyTM CPU Manual CPL AND $0F OR B LD B, A LD A, ( $FF8B) XOR B AND B LD ( $FF8C) , A LD A, B LD ( $FF8B) , A LD A, $30 LD ( $FF00) , A RET The but s uc h: $80 $40 $20 $10 2.13.1. I/O Registers <<<<<<<<<<<<<- c ompl e me nt ( i nve r t ) ge t f i r s t 4 bi t s put A a nd B t oge t he r s t or e A i n D r e a d ol d j oy da t a f r om r a m t oggl e w/ c ur r e nt but t on bi t ge t c ur r e nt but t on bi t ba c k s a ve i n ne w J oyda t a s t or a ge put or i gi na l va l ue i n A s t or e i t a s ol d j oy da t a de s e l e c t P14 a nd P15 RESET J oypa d Re t ur n f r om Subr out i ne t on va l ue s us i ng t he a bove me t hod a r e - St a r t Se l e c t B A $8 $4 $2 $1 - Down Up Le f t Ri ght Le t ' s s a y we he l d down A, St a r t , a nd Up. The va l ue r e t ur ne d i n a c c umul a t or A woul d be $94. 2. FF01 (SB) Na me - SB Cont e nt s - Se r i a l t r a ns f e r da t a ( R/ W) 8 Bi t s of da t a t o be r e a d/ wr i t t e n 3. FF02 (SC) Na me - SC Cont e nt s - SI O c ont r ol by DP ( R/ W) Page 37 2.13.1. I/O Registers Game BoyTM CPU Manual Bi t 7 - Tr a ns f e r St a r t Fl a g 0: Non t r a ns f e r 1: St a r t t r a ns f e r Bi t 0 - Shi f t Cl oc k 0: Ext e r na l Cl oc k ( 500KHz Ma x. ) 1: I nt e r na l Cl oc k ( 8192Hz ) Tr a ns f e r i s i ni t i a t e d by s e t t i ng t he Tr a ns f e r St a r t Fl a g. Thi s bi t ma y be r e a d a nd i s a ut oma t i c a l l y s e t t o 0 a t t he e nd of Tr a ns f e r . Tr a ns mi t t i ng a nd r e c e i vi ng s e r i a l da t a i s done s i mul t a ne ous l y. The r e c e i ve d da t a i s a ut oma t i c a l l y s t or e d i n SB. 4. FF04 (DIV) Na me - DI V Cont e nt s - Di vi de r Re gi s t e r ( R/ W) Thi s r e gi s t e r i s i nc r e me nt e d 16384 ( ~16779 on SGB) t i me s a s e c ond. Wr i t i ng a ny va l ue s e t s i t t o $00. 5. FF05 (TIMA) Na me - TI MA Cont e nt s - Ti me r c ount e r ( R/ W) Thi s t i me r i s i nc r e me nt e d by a c l oc k f r e que nc y s pe c i f i e d by t he TAC r e gi s t e r ( $FF07) . The t i me r ge ne r a t e s a n i nt e r r upt whe n i t ove r f l ows . Page 38 V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers 6. FF06 (TMA) Na me - TMA Cont e nt s - Ti me r Modul o ( R/ W) Whe n t he TI MA ove r f l ows , t hi s da t a wi l l be l oa de d. 7. FF07 (TAC) Na me - TAC Cont e nt s - Ti me r Cont r ol ( R/ W) Bi t 2 - Ti me r St op 0: St op Ti me r 1: St a r t Ti me r Bi t s 1+0 00: 01: 10: 11: I nput Cl oc k Se l e c t 4. 096 KHz ( ~4. 194 262. 144 Khz ( ~268. 4 65. 536 KHz ( ~67. 11 16. 384 KHz ( ~16. 78 KHz KHz KHz KHz SGB) SGB) SGB) SGB) 8. FF0F (IF) Na me - IF Cont e nt s - I nt e r r upt Fl a g ( R/ W) Bi t 4: Tr a ns i t i on f r om Hi gh t o Low of Pi n numbe r P10- P13 Bi t 3: Se r i a l I / O t r a ns f e r c ompl e t e Bi t 2: Ti me r Ove r f l ow Bi t 1: LCDC ( s e e STAT) Bi t 0: V- Bl a nk The pr i or i t y a nd j ump a ddr e s s f or t he a bove 5 by DP Page 39 Game BoyTM CPU Manual 2.13.1. I/O Registers i nt e r r upt s a r e : I nt e r r upt V- Bl a nk LCDC St a t us Pr i or i t y 1 2 Ti me r Ove r f l ow Se r i a l Tr a ns f e r 3 4 Hi - Lo of P10- P13 5 St a r t Addr e s s $0040 $0048 - Mode s 0, 1, 2 LYC=LY c oi nc i de ( s e l e c t a bl e ) $0050 $0058 - whe n t r a ns f e r i s c ompl e t e $0060 * Whe n mor e t ha n 1 i nt e r r upt s oc c ur a t t t i me onl y t he i nt e r r upt wi t h t he hi ghe s t c a n be a c knowl e dge d. Whe n a n i nt e r r upt i ' 0' s houl d be s t or e d i n t he I F r e gi s t e r I E r e gi s t e r i s s e t . he s a me pr i or i t y s us e d a be f or e t he 9. FF10 (NR 10) Na me - NR 10 Cont e nt s - Sound Mode 1 r e gi s t e r , Swe e p r e gi s t e r ( R/ W) Bi t 6- 4 - Swe e p Ti me Bi t 3 - Swe e p I nc r e a s e / De c r e a s e 0: Addi t i on ( f r e que nc y i nc r e a s e s ) 1: Subt r a c t i on ( f r e que nc y de c r e a s e s ) Bi t 2- 0 - Numbe r of s we e p s hi f t ( n: 0- 7) Swe e p Ti me : 000: s we e p of f - no f r e q c ha nge 001: 7. 8 ms ( 1/ 128Hz ) 010: 15. 6 ms ( 2/ 128Hz ) 011: 23. 4 ms ( 3/ 128Hz ) Page 40 V 1.01 Game BoyTM CPU Manual 100: 101: 110: 111: 2.13.1. I/O Registers 31. 39. 46. 54. 3 1 9 7 ms ms ms ms ( 4/ ( 5/ ( 6/ ( 7/ 128Hz ) 128Hz ) 128Hz ) 128Hz ) The c ha nge of f r e que nc y ( NR13, NR14) a t e a c h s hi f t i s c a l c ul a t e d by t he f ol l owi ng f or mul a whe r e X( 0) i s i ni t i a l f r e q & X( t 1) i s l a s t f r e q: X( t ) = X( t - 1) +/ - X( t - 1) / 2^ n 10. FF11 (NR 11) Na me - NR 11 Cont e nt s - Sound Mode 1 r e gi s t e r , Sound l e ngt h/ Wa ve pa t t e r n dut y ( R/ W) Onl y Bi t s 7- 6 c a n be r e a d. Bi t 7- 6 - Wa ve Pa t t e r n Dut y Bi t 5- 0 - Sound l e ngt h da t a ( t 1: 0- 63) Wa ve Dut y: ( de f a ul t : 00: 12. 5% 01: 25% 10: 50% 11: 75% 10) ( _- - - - - - - - _- - - - - - - - _- - - - - - - ( __- - - - - - - __- - - - - - - __- - - - - - ( ____- - - - - ____- - - - - ____- - - - ( ______- - - ______- - - ______- - - ) ) ) ) Sound Le ngt h = ( 64- t 1) *( 1/ 256) s e c onds by DP Page 41 2.13.1. I/O Registers Game BoyTM CPU Manual 11. FF12 (NR12) Na me - NR 12 Cont e nt s - Sound Mode 1 r e gi s t e r , Enve l ope ( R/ W) Bi t 7- 4 - I ni t i a l vol ume of e nve l ope Bi t 3 Enve l ope UP/ DOWN 0: At t e nua t e 1: Ampl i f y Bi t 2- 0 - Numbe r of e nve l ope s we e p ( n: 0- 7) ( I f z e r o, s t op e nve l ope ope r a t i on. ) I ni t i a l vol ume of e nve l ope i s f r om 0 t o $F. Ze r o be i ng no s ound. Le ngt h of 1 s t e p = n*( 1/ 64) s e c onds 12. FF13 (NR 13) Na me - NR 13 Cont e nt s - Sound Mode 1 r e gi s t e r , Fr e que nc y l o ( W) Lowe r 8 bi t s of 11 bi t f r e que nc y ( x) . Ne xt 3 bi t a r e i n NR 14 ( $FF14) 13. FF14 (NR 14) Na me - NR 14 Cont e nt s - Sound Mode 1 r e gi s t e r , Fr e que nc y hi ( R/ W) Onl y Bi t 6 c a n be r e a d. Bi t 7 - I ni t i a l ( whe n s e t , s ound r es t ar t s ) Bi t 6 - Count e r / c ons e c ut i ve s e l e c t i on Page 42 V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers Bi t 2- 0 - Fr e que nc y' s hi ghe r 3 bi t s ( x) Fr e que nc y = 4194304/ ( 32*( 2048- x) ) Hz = 131072/ ( 2048- x) Hz Count e r / c ons e c ut i ve Se l e c t i on 0 = Re ga r dl e s s of t he l e ngt h da t a i n NR11 s ound c a n be pr oduc e d c ons e c ut i ve l y. 1 = Sound i s ge ne r a t e d dur i ng t he t i me pe r i od s e t by t he l e ngt h da t a i n NR11. Af t e r t hi s pe r i od t he s ound 1 ON f l a g ( bi t 0 of NR52) i s r e s e t . 14. FF16 (NR 21) Na me - NR 21 Cont e nt s - Sound Mode 2 r e gi s t e r , Sound Le ngt h; Wa ve Pa t t e r n Dut y ( R/ W) Onl y bi t s 7- 6 c a n be r e a d. Bi t 7- 6 - Wa ve pa t t e r n dut y Bi t 5- 0 - Sound l e ngt h da t a ( t 1: 0- 63) Wa ve Dut y: ( de f a ul t : 00: 12. 5% 01: 25% 10: 50% 11: 75% 10) ( _- - - - - - - - _- - - - - - - - _- - - - - - - ( __- - - - - - - __- - - - - - - __- - - - - - ( ____- - - - - ____- - - - - ____- - - - ( ______- - - ______- - - ______- - - ) ) ) ) Sound Le ngt h = ( 64- t 1) *( 1/ 256) s e c onds by DP Page 43 2.13.1. I/O Registers Game BoyTM CPU Manual 15. FF17 (NR 22) Na me - NR 22 Cont e nt s - Sound Mode 2 r e gi s t e r , e nve l ope ( R/ W) Bi t 7- 4 - I ni t i a l vol ume of e nve l ope Bi t 3 Enve l ope UP/ DOWN 0: At t e nua t e 1: Ampl i f y Bi t 2- 0 - Numbe r of e nve l ope s we e p ( n: 0- 7) ( I f z e r o, s t op e nve l ope ope r a t i on. ) I ni t i a l vol ume of e nve l ope i s f r om 0 t o $F. Ze r o be i ng no s ound. Le ngt h of 1 s t e p = n*( 1/ 64) s e c onds 16. FF18 (NR 23) Na me - NR 23 Cont e nt s - Sound Mode 2 r e gi s t e r , f r e que nc y l o da t a ( W) Fr e que nc y' s l owe r 8 bi t s of 11 bi t da t a ( x) . Ne xt 3 bi t s a r e i n NR 14 ( $FF19) . 17. FF19 (NR 24) Na me - NR 24 Cont e nt s - Sound Mode 2 r e gi s t e r , f r e que nc y hi da t a ( R/ W) Onl y bi t 6 c a n be r e a d. Bi t 7 - I ni t i a l ( whe n s e t , s ound Page 44 V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers r es t ar t s ) Bi t 6 - Count e r / c ons e c ut i ve s e l e c t i on Bi t 2- 0 - Fr e que nc y' s hi ghe r 3 bi t s ( x) Fr e que nc y = 4194304/ ( 32*( 2048- x) ) Hz = 131072/ ( 2048- x) Hz Count e r / c ons e c ut i ve Se l e c t i on 0 = Re ga r dl e s s of t he l e ngt h da t a i n NR21 s ound c a n be pr oduc e d c ons e c ut i ve l y. 1 = Sound i s ge ne r a t e d dur i ng t he t i me pe r i od s e t by t he l e ngt h da t a i n NR21. Af t e r t hi s pe r i od t he s ound 2 ON f l a g ( bi t 1 of NR52) i s r e s e t . 18. FF1A (NR 30) Na me - NR 30 Cont e nt s - Sound Mode 3 r e gi s t e r , Sound on/ of f ( R/ W) Onl y bi t 7 c a n be r e a d Bi t 7 - Sound OFF 0: Sound 3 out put s t op 1: Sound 3 out put OK 19. FF1B (NR 31) Na me - NR 31 Cont e nt s - Sound Mode 3 r e gi s t e r , s ound l e ngt h ( R/ W) Bi t 7- 0 - Sound l e ngt h ( t 1: 0 - 255) Sound Le ngt h = ( 256- t 1) *( 1/ 2) s e c onds by DP Page 45 2.13.1. I/O Registers Game BoyTM CPU Manual 20. FF1C (NR 32) Na me - NR 32 Cont e nt s - Sound Mode 3 r e gi s t e r , Se l e c t out put l e ve l ( R/ W) Onl y bi t s 6- 5 c a n be r e a d Bi t 6- 5 - Se l e c t out put l e ve l 00: Mut e 01: Pr oduc e Wa ve Pa t t e r n RAM Da t a a s i t i s ( 4 bi t l e ngt h) 10: Pr oduc e Wa ve Pa t t e r n RAM da t a s hi f t e d onc e t o t he RI GHT ( 1/ 2) ( 4 bi t l e ngt h) 11: Pr oduc e Wa ve Pa t t e r n RAM da t a s hi f t e d t wi c e t o t he RI GHT ( 1/ 4) ( 4 bi t l e ngt h) * - Wa ve Pa t t e r n RAM i s l oc a t e d f r om $FF30- $FF3f . 21. FF1D (NR 33) Na me - NR 33 Cont e nt s - Sound Mode 3 r e gi s t e r , f r e que nc y' s l owe r da t a ( W) Lowe r 8 bi t s of a n 11 bi t f r e que nc y ( x) . 22. FF1E (NR 34) Na me - NR 34 Cont e nt s - Sound Mode 3 r e gi s t e r , f r e que nc y' s hi ghe r da t a ( R/ W) Onl y bi t 6 c a n be r e a d. Page 46 V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers Bi t 7 - I ni t i a l ( whe n s e t , s ound r e s t a r t s ) Bi t 6 - Count e r / c ons e c ut i ve f l a g Bi t 2- 0 - Fr e que nc y' s hi ghe r 3 bi t s ( x) . Fr e que nc y = 4194304/ ( 64*( 2048- x) ) Hz = 65536/ ( 2048- x) Hz Count e r / c ons e c ut i ve Se l e c t i on 0 = Re ga r dl e s s of t he l e ngt h da t a i n NR31 s ound c a n be pr oduc e d c ons e c ut i ve l y. 1 = Sound i s ge ne r a t e d dur i ng t he t i me pe r i od s e t by t he l e ngt h da t a i n NR31. Af t e r t hi s pe r i od t he s ound 3 ON f l a g ( bi t 2 of NR52) i s r e s e t . 23. FF20 (NR 41) Na me - NR 41 Cont e nt s - Sound Mode 4 r e gi s t e r , s ound l e ngt h ( R/ W) Bi t 5- 0 - Sound l e ngt h da t a ( t 1: 0- 63) Sound Le ngt h = ( 64- t 1) *( 1/ 256) s e c onds 24. FF21 (NR 42) Na me - NR 42 Cont e nt s - Sound Mode 4 r e gi s t e r , e nve l ope ( R/ W) Bi t 7- 4 - I ni t i a l vol ume of e nve l ope Bi t 3 Enve l ope UP/ DOWN 0: At t e nua t e 1: Ampl i f y by DP Page 47 2.13.1. I/O Registers Game BoyTM CPU Manual Bi t 2- 0 - Numbe r of e nve l ope s we e p ( n: 0- 7) ( I f z e r o, s t op e nve l ope ope r a t i on. ) I ni t i a l vol ume of e nve l ope i s f r om 0 t o $F. Ze r o be i ng no s ound. Le ngt h of 1 s t e p = n*( 1/ 64) s e c onds 25. FF22 (NR 43) Na me - NR 43 Cont e nt s - Sound Mode 4 r e gi s t e r , pol ynomi a l c ount e r ( R/ W) Bi t 7- 4 - Se l e c t i on of t he s hi f t c l oc k f r e que nc y of t he pol ynomi a l c ount e r Bi t 3 - Se l e c t i on of t he pol ynomi a l c ount e r ' s s t e p Bi t 2- 0 - Se l e c t i on of t he di vi di ng r a t i o of f r e que nc i e s : 000: f * 1/ 2^ 3 * 2 001: f * 1/ 2^ 3 * 1 010: f * 1/ 2^ 3 * 1/ 2 011: f * 1/ 2^ 3 * 1/ 3 100: f * 1/ 2^ 3 * 1/ 4 101: f * 1/ 2^ 3 * 1/ 5 110: f * 1/ 2^ 3 * 1/ 6 111: f * 1/ 2^ 3 * 1/ 7 f = 4. 194304 Mhz Se l e c t i on of t he pol ynomi a l c ount e r s t e p: 0: 15 s t e ps 1: 7 s t e ps Page 48 V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers Se l e c t i on of t he s hi f t c l oc k f r e que nc y of t he pol ynomi a l c ount e r : 0000: 0001: 0010: 0011: di di di di vi di ng r a t i o of vi di ng r a t i o of vi di ng r a t i o of vi di ng r a t i o of : : : 0101: di vi di ng r a t i o of 1110: pr ohi bi t e d c ode 1111: pr ohi bi t e d c ode f r e que nc i f r e que nc i f r e que nc i f r e que nc i es es es es * * * * : : : f r e que nc i e s * 1/ 1/ 1/ 1/ 2 2^ 2 2^ 3 2^ 4 1/ 2^ 14 26. FF23 (NR 44) Na me - NR 44 Cont e nt s - Sound Mode 4 r e gi s t e r , c ount e r / c ons e c ut i ve ; i ni t a l ( R/ W) Onl y bi t 6 c a n be r e a d. Bi t 7 - I ni t i a l ( whe n s e t , s ound r e s t a r t s ) Bi t 6 - Count e r / c ons e c ut i ve s e l e c t i on Count e r / c ons e c ut i ve Se l e c t i on 0 = Re ga r dl e s s of t he l e ngt h da t a s ound c a n be pr oduc e d c ons e c ut 1 = Sound i s ge ne r a t e d dur i ng t he pe r i od s e t by t he l e ngt h da t a Af t e r t hi s pe r i od t he s ound 4 ( bi t 3 of NR52) i s r e s e t . by DP i n NR41 i ve l y. t i me i n NR41. ON f l a g Page 49 Game BoyTM CPU Manual 2.13.1. I/O Registers 27. FF24 (NR 50) Na me - NR 50 Cont e nt s - Cha nne l c ont r ol / ON- OFF / Vol ume ( R/ W) Bi Bi Bi Bi t t t t 7 6- 4 3 2- 0 Vi Vi - n- >SO2 SO2 out n- >SO1 SO1 out ON/ put ON/ put OFF l e ve l ( vol ume ) ( # 0- 7) OFF l e ve l ( vol ume ) ( # 0- 7) Vi n- >SO1 ( Vi n- >SO2) By s ynt he s i z i ng t he s ound f r om s ound 1 t hr ough 4, t he voi c e i nput f r om Vi n t e r mi na l i s put out . 0: no out put 1: out put OK 28. FF25 (NR 51) Na me - NR 51 Cont e nt s - Se l e c t i on of Sound out put t e r mi na l ( R/ W) Bi Bi Bi Bi Bi Bi Bi Bi Page 50 t t t t t t t t 7 6 5 4 3 2 1 0 - Out Out Out Out Out Out Out Out put put put put put put put put s ound s ound s ound s ound s ound s ound s ound s ound 4 3 2 1 4 3 2 1 t t t t t t t t o o o o o o o o SO2 SO2 SO2 SO2 SO1 SO1 SO1 SO1 t t t t t t t t e r mi e r mi e r mi e r mi e r mi e r mi e r mi e r mi na l na l na l na l na l na l na l na l V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers 29. FF26 (NR 52) Na me - NR 52 ( Va l ue a t r e s e t : $F1- GB, $F0- SGB) Cont e nt s - Sound on/ of f ( R/ W) Bi t 7 - Al l s ound on/ of f 0: s t op a l l s ound c i r c ui t s 1: ope r a t e a l l s ound c i r c ui t s Bi t 3 - Sound 4 ON f l a g Bi t 2 - Sound 3 ON f l a g Bi t 1 - Sound 2 ON f l a g Bi t 0 - Sound 1 ON f l a g Bi t s 0 - 3 of t hi s r e gi s t e r a r e me a nt t o be s t a t us bi t s t o be r e a d. Wr i t i ng t o t he s e bi t s doe s NOT e na bl e / di s a bl e s ound. I f your GB pr ogr a ms don' t us e s ound t he n wr i t e $00 t o t hi s r e gi s t e r t o s a ve 16% or mor e on GB powe r c ons umpt i on. 30. FF30 - FF3F (Wave Pattern RAM) Na me - Wa ve Pa t t e r n RAM Cont e nt s - Wa ve f or m s t or a ge f or a r bi t r a r y s ound da t a Thi s s t or a ge a r e a hol ds 32 4- bi t s a mpl e s t ha t a r e pl a ye d ba c k uppe r 4 bi t s f i r s t . 31. FF40 (LCDC) Na me - LCDC ( va l ue $91 a t r e s e t ) Cont e nt s - LCD Cont r ol ( R/ W) Bi t 7 - LCD Cont r ol Ope r a t i on * by DP Page 51 Game BoyTM CPU Manual 2.13.1. I/O Registers Bi t 6 - Bi t 5 - Bi t 4 - Bi t 3 - Bi t 2 - Bi t 1 - Bi t 0 - 0: St op c ompl e t e l y ( no pi c t ur e on s c r e e n) 1: ope r a t i on Wi ndow Ti l e Ma p Di s pl a y Se l e c t 0: $9800- $9BFF 1: $9C00- $9FFF Wi ndow Di s pl a y 0: of f 1: on BG & Wi ndow Ti l e Da t a Se l e c t 0: $8800- $97FF 1: $8000- $8FFF <- Sa me a r e a a s OBJ BG Ti l e Ma p Di s pl a y Se l e c t 0: $9800- $9BFF 1: $9C00- $9FFF OBJ ( Spr i t e ) Si z e 0: 8*8 1: 8*16 ( wi dt h*he i ght ) OBJ ( Spr i t e ) Di s pl a y 0: of f 1: on BG & Wi ndow Di s pl a y 0: of f 1: on * - St oppi ng be pe r f or me d bl a nk c a n be gr e a t e r t ha n LCD ope r a t i on ( bi t 7 f r om 1 t o 0) mus t dur i ng V- bl a nk t o wor k pr ope r l y. Vc onf i r me d whe n t he va l ue of LY i s or e qua l t o 144. 32. FF41 (STAT) Na me - STAT Cont e nt s - LCDC St a t us ( R/ W) Bi t s 6- 3 - I nt e r r upt Se l e c t i on By LCDC St a t us Page 52 V 1.01 Game BoyTM CPU Manual Bi Bi Bi Bi t t t t 6 5 4 3 2.13.1. I/O Registers - LYC=LY Coi nc i de nc e ( Se l e c t a bl e ) Mode 10 Mode 01 Mode 00 0: Non Se l e c t i on 1: Se l e c t i on Bi t 2 - Coi nc i de nc e Fl a g 0: LYC not e qua l t o LCDC LY 1: LYC = LCDC LY Bi t 1- 0 - Mode Fl a g 00: Dur i ng H- Bl a nk 01: Dur i ng V- Bl a nk 10: Dur i ng Se a r c hi ng OAM- RAM 11: Dur i ng Tr a ns f e r i ng Da t a t o LCD Dr i ve r STAT s hows t he c ur r e nt s t a t us of t he LCD c ont r ol l e r . Mode 00: Whe n t he f l a g i s 00 i t i s t he H- Bl a nk pe r i od a nd t he CPU c a n a c c e s s t he di s pl a y RAM ( $8000- $9FFF) . Mode 01: Whe n t he f l a g i s 01 i t i s t he V- Bl a nk pe r i od a nd t he CPU c a n a c c e s s t he di s pl a y RAM ( $8000- $9FFF) . Mode 10: Whe n t he f l a g i s 10 t he n t he OAM i s be i ng us e d ( $FE00- $FE9F) . The CPU c a nnot a c c e s s t he OAM dur i ng t hi s pe r i od Mode 11: Whe n t he f l a g i s 11 bot h t he OAM a nd di s pl a y RAM a r e be i ng us e d. The CPU c a nnot a c c e s s e i t he r dur i ng t hi s pe r i od. The f ol l owi ng a r e t ypi c a l whe n t he di s pl a y i s e na bl e d: by DP Page 53 Game BoyTM CPU Manual 2.13.1. I/O Registers Mode 0: 000___000___000___000___000___000___000________________ Mode 1: _______________________________________11111111111111__ Mode 2: ___2_____2_____2_____2_____2_____2___________________2_ Mode 3: ____33____33____33____33____33____33__________________3 The Mode Fl a g goe s t hr ough t he va l ue s 0, 2, a nd 3 a t a c yc l e of a bout 109uS. 0 i s pr e s e nt a bout 48. 6uS, 2 a bout 19uS, a nd 3 a bout 41uS. Thi s i s i nt e r r upt e d e ve r y 16. 6ms by t he VBl a nk ( 1) . The mode f l a g s t a ys s e t a t 1 f or a bout 1. 08 ms . ( Mode 0 i s pr e s e nt be t we e n 201- 207 c l ks , 2 a bout 77- 83 c l ks , a nd 3 a bout 169- 175 c l ks . A c ompl e t e c yc l e t hr ough t he s e s t a t e s t a ke s 456 c l ks . VBl a nk l a s t s 4560 c l ks . A c ompl e t e s c r e e n r e f r e s h oc c ur s e ve r y 70224 c l ks . ) 33. FF42 (SCY) Na me - SCY Cont e nt s - Sc r ol l Y ( R/ W) 8 Bi t va l ue $00- $FF t o s c r ol l BG Y s c r e e n pos i t i on. Page 54 V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers 34. FF43 (SCX) Na me - SCX Cont e nt s - Sc r ol l X ( R/ W) 8 Bi t va l ue $00- $FF t o s c r ol l BG X s c r e e n pos i t i on. 35. FF44 (LY) Na me - LY Cont e nt s - LCDC Y- Coor di na t e ( R) The LY i ndi c a t e s t he ve r t i c a l l i ne t o whi c h t he pr e s e nt da t a i s t r a ns f e r r e d t o t he LCD Dr i ve r . The LY c a n t a ke on a ny va l ue be t we e n 0 t hr ough 153. The va l ue s be t we e n 144 a nd 153 i ndi c a t e t he V- Bl a nk pe r i od. Wr i t i ng wi l l r e s e t t he c ount e r . 36. FF45 (LYC) Na me - LYC Cont e nt s - LY Compa r e ( R/ W) The LYC c ompa r e s i t s e l f wi t h t he LY. I f t he va l ue s a r e t he s a me i t c a us e s t he STAT t o s e t t he c oi nc i de nt f l a g. 37. FF46 (DMA) Na me - DMA Cont e nt s - DMA Tr a ns f e r a nd St a r t Addr e s s ( W) The DMA Tr a ns f e r ( 40*28 bi t ) f r om i nt e r na l ROM or RAM ( $0000- $F19F) t o t he OAM ( a ddr e s s $FE00- $FE9F) by DP Page 55 2.13.1. I/O Registers Game BoyTM CPU Manual c a n be pe r f or me d. I t t a ke s 160 mi c r os e c onds f or t he t r a ns f e r . 40*28 bi t = #140 or #$8C. As you c a n s e e , i t onl y t r a ns f e r s $8C byt e s of da t a . OAM da t a i s $A0 byt e s l ong, f r om $0- $9F. But i f you e xa mi ne t he OAM da t a you s e e t ha t 4 bi t s a r e not i n us e . 40*32 bi t = #$A0, but s i nc e 4 bi t s f or e a c h OAM i s not us e d i t ' s 40*28 bi t . I t t r a ns f e r s a l l t he OAM da t a t o OAM RAM. The DMA t r a ns f e r s t a r t a ddr e s s c a n be de s i gna t e d e ve r y $100 f r om a ddr e s s $0000- $F100. Tha t me a ns $0000, $0100, $0200, $0300. . . . As c a n be s e e n by l ooki ng a t r e gi s t e r $FF41 Spr i t e RAM ( $FE00 - $FE9F) i s not a l wa ys a va i l a bl e . A s i mpl e r out i ne t ha t ma ny ga me s us e t o wr i t e da t a t o Spr i t e me mor y i s s hown be l ow. Si nc e i t c opi e s da t a t o t he s pr i t e RAM a t t he a ppr opr i a t e t i me s i t r e move s t ha t r e s pons i bi l i t y f r om t he ma i n pr ogr a m. Al l of t he me mor y s pa c e , e xc e pt hi gh RAM ( $FF80- $FFFE) , i s not a c c e s s i bl e dur i ng DMA. Be c a us e of t hi s , t he r out i ne be l ow mus t be c opi e d & e xe c ut e d i n hi gh r a m. I t i s us ua l l y c a l l e d f r om a V- bl a nk I nt e r r upt . Exa mpl e pr ogr a m: or g $40 j p VBl a nk Page 56 V 1.01 Game BoyTM CPU Manual or g $f f 80 VBl a nk: pus h a f l d a , BASE_ADRS l d ( $f f 46) , a l d a , 28h Wa i t : de c a j r nz , Wa i t t o Wa i t pop a f r et i 2.13.1. I/O Registers <<<<<<<- Sa ve A r e g & f l a gs t r a ns f e r da t a f r om BASE_ADRS put A i nt o DMA r e gi s t e r s l oop l e ngt h We ne e d t o wa i t 160 ms . 4 c yc l e s - de c r e a s e A by 1 12 c yc l e s - br a nc h i f Not Ze r o <- Re s t or e A r e g & f l a gs <- Re t ur n f r om i nt e r r upt 38. FF47 (BGP) Na me - BGP Cont e nt s - BG & Wi ndow Pa l e t t e Da t a ( R/ W) Bi t 7- 6 - Da t a f or Dot Da t a ( Nor ma l l y da r ke s t Bi t 5- 4 - Da t a f or Dot Da t a Bi t 3- 2 - Da t a f or Dot Da t a Bi t 1- 0 - Da t a f or Dot Da t a ( Nor ma l l y l i ght e s t 11 c ol or ) 10 01 00 c ol or ) Thi s s e l e c t s t he s ha de of gr a ys t o us e f or t he ba c kgr ound ( BG) & wi ndow pi xe l s . Si nc e e a c h pi xe l us e s 2 bi t s , t he c or r e s pondi ng s ha de wi l l be s e l e c t e d f r om he r e . by DP Page 57 Game BoyTM CPU Manual 2.13.1. I/O Registers 39. FF48 (OBP0) Na me - OBP0 Cont e nt s - Obj e c t Pa l e t t e 0 Da t a ( R/ W) Thi s s e l e c t s t he c ol or s f or s pr i t e pa l e t t e 0. I t wor ks e xa c t l y a s BGP ( $FF47) e xc e pt e a c h e a c h va l ue of 0 i s t r a ns pa r e nt . 40. FF49 (OBP1) Na me - OBP1 Cont e nt s - Obj e c t Pa l e t t e 1 Da t a ( R/ W) Thi s Se l e c t s t he c ol or s f or s pr i t e pa l e t t e 1. I t wor ks e xa c t l y a s OBP0 ( $FF48) . Se e BGP f or de t a i l s . 41. FF4A (WY) Na me - WY Cont e nt s - Wi ndow Y Pos i t i on 0 <= WY WY mus t mus t be wi ndow t ( R/ W) <= 143 be gr e a t e r t ha n or e qua l t o 0 a nd l e s s t ha n or e qua l t o 143 f or o be vi s i bl e . 42. FF4B (WX) Na me - WX Cont e nt s - Wi ndow X Pos i t i on ( R/ W) 0 <= WX <= 166 WX mus t be gr e a t e r t ha n or e qua l t o 0 a nd Page 58 V 1.01 Game BoyTM CPU Manual 2.13.1. I/O Registers mus t be l e s s t ha n or e qua l t o 166 f or wi ndow t o be vi s i bl e . WX i s of f s e t f r om a bs ol ut e s c r e e n c oor di na t e s by 7. Se t t i ng t he wi ndow t o WX=7, WY=0 wi l l put t he uppe r l e f t c or ne r of t he wi ndow a t a bs ol ut e s c r e e n c oor di na t e s 0, 0. Le t s s a y WY = 70 a nd WX = 87. The wi ndow woul d be pos i t i one d a s s o: 0 | | | | | | | 70 | | | | | | | 143 | 0 80 159 ______________________________________ | | | | Ba c kgr ound Di s pl a y | He r e | | | +- - - - - - - - - - - - - - - - - - | | 80, 70 | | | | Wi ndow Di s pl a y | | He r e | | | | | ___________________| __________________| OBJ Cha r a c t e r s ( Spr i t e s ) c a n s t i l l e nt e r t he wi ndow. None of t he wi ndow c ol or s a r e t r a ns pa r e nt s o a ny ba c kgr ound t i l e s unde r t he wi ndow a r e hi dde n. by DP Page 59 2.13.1. I/O Registers Game BoyTM CPU Manual 43. FFFF (IE) Na me - IE Cont e nt s - I nt e r r upt Ena bl e ( R/ W) Bi t 4: Tr a ns i t i on f r om Hi gh t o Low of Pi n numbe r P10- P13. Bi t 3: Se r i a l I / O t r a ns f e r c ompl e t e Bi t 2: Ti me r Ove r f l ow Bi t 1: LCDC ( s e e STAT) Bi t 0: V- Bl a nk 0: di s a bl e 1: e na bl e Page 60 V 1.01 Game BoyTM CPU Manual 3. Game Boy command overview 3. Game Boy command overview 3.1. Foreword Si nc e books on t he Z80 a r e ge t t i ng ha r de r & ha r de r t o f i nd, hope f ul l y t he i nf or ma t i on he r e mi ght be he l pf ul t o t hos e t r yi ng t o unde r s t a nd a s s e mbl y l a ngua ge s pe c i f i c t o Ga me Boy. 3.2. CPU Registers 3.2.1. Generally The Ga me Boy ha s i ns t r uc t i ons & r e gi s t e r s s i mi l a r t o t he I nt e l 8080, I nt e l 8085, & Zi l og Z80 mi c r opr oc e s s or s . I t ha s e i ght 8- bi t r e gi s t e r s A, B, C, D, E, F, H, L a nd t wo 16bi t r e gi s t e r s SP & PC: 15. . 8 A B D H 7. . 0 F C E L SP PC Some i ns t r uc t i ons , howe ve r , a l r e gi s t e r s A, B, C, D, E, H, & L a s pa i r i ng t he m up i n t he f ol l owi HL. The F r e gi s t e r i s i ndi r e c t by DP l ow you t o us e t he 16- bi t r e gi s t e r s by ng ma nne r : AF, BC, DE, & l y a c c e s s i bl e by t he Page 61 Game BoyTM CPU Manual 3.2.1. Generally pr ogr a mme r a nd i s us e d t o s t ma t h ope r a t i ons . The PC, or poi nt s t o t he ne xt i ns t r uc t i Ga me Boy me mor y. The SP, or poi nt s t o t he c ur r e nt s t a c k or e t he r e s ul t s of va r i ous Pr ogr a m Count e r , r e gi s t e r on t o be e xe c ut e d i n t he St a c k Poi nt e r , r e gi s t e r pos i t i on. 3.2.2. Flag Register The Fl e g Re gi s t e r c ons i s t s of t he f ol l owi ng bi t s : 7 Z 6 N 5 H 4 C 3 0 2 0 1 0 0 0 • Ze r o Fl ag ( Z) : Thi s bi t i s s e t whe n t he r e s ul t of a ma t h ope r a t i on i s z e r o or t wo va l ue s ma t c h whe n us i ng t he CP i ns t r uc t i on. • Subt r ac t Fl ag ( N) : Thi s bi t i s s e t i f a s ubt r a c t i on wa s pe r f or me d i n t he l a s t ma t h i ns t r uc t i on. • Hal f Car r y Fl ag ( H) : Thi s bi t i s s e t i f a c a r r y oc c ur r e d f r om t he l owe r ni bbl e i n t he l a s t ma t h ope r a t i on. • Car r y Fl ag ( C) : Thi s bi t i s s e t i f a c a r r y oc c ur r e d f r om t he l a s t ma t h ope r a t i on or i f r e gi s t e r A i s t he s ma l l e r va l ue whe n e xe c ut i ng t he CP i ns t r uc t i on. Page 62 V 1.01 Game BoyTM CPU Manual 3.2.3. Program Counter 3.2.3. Program Counter On powe r up, t he Ga me Boy Pr ogr a m Count e r i s i ni t i a l i z e d t o $100 ( 100 he x) a nd t he i ns t r uc t i on f ound a t t hi s l oc a t i on i n ROM i s e xe c ut e d. The Pr ogr a m Count e r f r om t hi s poi nt on i s c ont r ol l e d, i ndi r e c t l y, by t he pr ogr a m i ns t r uc t i ons t he ms e l ve s t ha t we r e ge ne r a t e d by t he pr ogr a mme r of t he ROM c a r t . 3.2.4. Stack Pointer A bi g ke y t o unde r s t a ndi l a ngua ge on t he Ga me Boy a s t a c k poi nt e r . A f a mi l f or ot he r pr oc e s s or s he l t he s a me . ng pr ogr a mmi ng i n a s s e mbl y i s unde r s t a ndi ng t he c onc e pt of i a r i t y wi t h a s s e mbl y l a ngua ge ps gr e a t l y a s t he c onc e pt s a r e The Ga me Boy St a c k Poi nt e r i s us e d t o ke e p t r a c k of t he t op of t he " s t a c k" . The s t a c k i s us e d f or s a vi ng va r i a bl e s , s a vi ng r e t ur n a ddr e s s e s , pa s s i ng a r gume nt s t o s ubr out i ne s , a nd va r i ous ot he r us e s t ha t mi ght be c onc e i ve d by t he i ndi vi dua l pr ogr a mme r . The i ns t r uc t i ons CALL, PUSH, a nd RST a l l put i nf or ma t i on ont o t he s t a c k. The i ns t r uc t i ons POP, RET, a nd RETI a l l t a ke i nf or ma t i on of f of t he s t a c k. ( I nt e r r upt s put a r e t ur n a ddr e s s on t he s t a c k a nd r e move i t a t t he i r c ompl e t i on a s we l l . ) As i nf or ma t i on i s put ont o t he s t a c k, t he s t a c k gr ows downwa r d i n RAM me mor y. As a r e s ul t , t he St a c k Poi nt e r s houl d a l wa ys be i ni t i a l i z e d a t t he hi ghe s t l oc a t i on of RAM s pa c e t ha t ha s be e n a l l oc a t e d f or us e by t he s t a c k. For i ns t a nc e , i f a pr ogr a mme r wi s he s t o l oc a t e t he St a c k Poi nt e r a t t he t op of l ow RAM s pa c e ( $C000- $DFFF) he woul d s e t t he St a c k Poi nt e r t o $E000 us i ng t he by DP Page 63 3.2.4. Stack Pointer Game BoyTM CPU Manual c omma nd LD SP, $E000. ( The St a c k Poi nt e r a ut oma t i c a l l y de c r e me nt s be f or e i t put s s ome t hi ng ont o t he s t a c k s o i t i s pe r f e c t l y a c c e pt a bl e t o a s s i gn i t a va l ue whi c h poi nt s t o a me mor y a ddr e s s whi c h i s one l oc a t i on pa s t t he e nd of a va i l a bl e RAM. ) The Ga me Boy s t a c k poi nt e r i s i ni t i a l i z e d t o $FFFE on powe r up but a pr ogr a mme r s houl d not r e l y on t hi s s e t t i ng a nd r a t he r s houl d e xpl i c i t l y s e t i t s va l ue . Page 64 V 1.01 Game BoyTM CPU Manual 3.3. Commands 3.3. Commands The Ga me Boy CPU i s ba s e d on a s ubs e t of t he Z80 mi c r opr oc e s s or . A s umma r y of t he s e c omma nds i s gi ve n be l ow. I f ' Fl a gs a f f e c t e d' i s not gi ve n f or a c omma nd t he n none a r e a f f e c t e d. 3.3.1. 8-Bit Loads 1. LD nn,n De s c r i pt i on: Put va l ue nn i nt o n. Us e wi t h: nn = B, C, D, E, H, L, BC, DE, HL, SP n = 8 bi t i mme di a t e va l ue Opc ode s : I ns t r uc t i on LD LD LD LD LD LD by DP Pa r a me t e r s B, n C, n D, n E, n H, n L, n Opc ode 06 0E 16 1E 26 2E Cyc l e s 8 8 8 8 8 8 Page 65 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 2. LD r1,r2 De s c r i pt i on: Put va l ue r 2 i nt o r 1. Us e wi t h: r 1, r 2 = A, B, C, D, E, H, L, ( HL) Opc ode s : I ns t r uc t i on LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD Page 66 Pa r a me t e r s A, A A, B A, C A, D A, E A, H A, L A, ( HL) B, B B, C B, D B, E B, H B, L B, ( HL) C, B C, C C, D C, E C, H C, L C, ( HL) D, B D, C Opc ode 7F 78 79 7A 7B 7C 7D 7E 40 41 42 43 44 45 46 48 49 4A 4B 4C 4D 4E 50 51 Cyc l e s 4 4 4 4 4 4 4 8 4 4 4 4 4 4 8 4 4 4 4 4 4 8 4 4 V 1.01 Game BoyTM CPU Manual LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD LD by DP D, D D, E D, H D, L D, ( HL) E, B E, C E, D E, E E, H E, L E, ( HL) H, B H, C H, D H, E H, H H, L H, ( HL) L, B L, C L, D L, E L, H L, L L, ( HL) ( HL) , B ( HL) , C ( HL) , D ( HL) , E ( HL) , H ( HL) , L ( HL) , n 3.3.1. 8-Bit Loads 52 53 54 55 56 58 59 5A 5B 5C 5D 5E 60 61 62 63 64 65 66 68 69 6A 6B 6C 6D 6E 70 71 72 73 74 75 36 4 4 4 4 8 4 4 4 4 4 4 8 4 4 4 4 4 4 8 4 4 4 4 4 4 8 8 8 8 8 8 8 12 Page 67 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 3. LD A,n De s c r i pt i on: Put va l ue n i nt o A. Us e wi t h: n = A, B, C, D, E, H, L, ( BC) , ( DE) , ( HL) , ( nn) , # nn = t wo byt e i mme di a t e va l ue . ( LS byt e f i r s t . ) Opc ode s : I ns t r uc t i on LD LD LD LD LD LD LD LD LD LD LD LD Page 68 Pa r a me t e r s A, A A, B A, C A, D A, E A, H A, L A, ( BC) A, ( DE) A, ( HL) A, ( nn) A, # Opc ode 7F 78 79 7A 7B 7C 7D 0A 1A 7E FA 3E Cyc l e s 4 4 4 4 4 4 4 8 8 8 16 8 V 1.01 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 4. LD n,A De s c r i pt i on: Put va l ue A i nt o n. Us e wi t h: n = A, B, C, D, E, H, L, ( BC) , ( DE) , ( HL) , ( nn) nn = t wo byt e i mme di a t e va l ue . ( LS byt e f i r s t . ) Opc ode s : I ns t r uc t i on LD LD LD LD LD LD LD LD LD LD LD by DP Pa r a me t e r s A, A B, A C, A D, A E, A H, A L, A ( BC) , A ( DE) , A ( HL) , A ( nn) , A Opc ode 7F 47 4F 57 5F 67 6F 02 12 77 EA Cyc l e s 4 4 4 4 4 4 4 8 8 8 16 Page 69 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 5. LD A,(C) De s c r i pt i on: Put va l ue a t a ddr e s s $FF00 + r e gi s t e r C i nt o A. Sa me a s : LD A, ( $FF00+C) Opc ode s : I ns t r uc t i on LD Pa r a me t e r s A, ( C) Opc ode F2 Cyc l e s 8 6. LD (C),A De s c r i pt i on: Put A i nt o a ddr e s s $FF00 + r e gi s t e r C. Opc ode s : I ns t r uc t i on LD Page 70 Pa r a me t e r s ( $FF00+C) , A Opc ode E2 Cyc l e s 8 V 1.01 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 7. LD A,(HLD) De s c r i pt i on: Sa me a s : LDD A, ( HL) 8. LD A,(HL-) De s c r i pt i on: Sa me a s : LDD A, ( HL) 9. LDD A,(HL) De s c r i pt i on: Put va l ue a t a ddr e s s HL i nt o A. De c r e me nt HL. Sa me a s : LD A, ( HL) - DEC HL Opc ode s : I ns t r uc t i on LD LD LDD by DP Pa r a me t e r s A, ( HLD) A, ( HL- ) A, ( HL) Opc ode 3A 3A 3A Cyc l e s 8 8 8 Page 71 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 10. LD (HLD),A De s c r i pt i on: Sa me a s : LDD ( HL) , A 11. LD (HL-),A De s c r i pt i on: Sa me a s : LDD ( HL) , A 12. LDD (HL),A De s c r i pt i on: Put A i nt o me mor y a ddr e s s HL. De c r e me nt HL. Sa me a s : LD ( HL) , A - DEC HL Opc ode s : I ns t r uc t i on LD LD LDD Page 72 Pa r a me t e r s ( HLD) , A ( HL- ) , A ( HL) , A Opc ode 32 32 32 Cyc l e s 8 8 8 V 1.01 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 13. LD A,(HLI) De s c r i pt i on: Sa me a s : LDI A, ( HL) 14. LD A,(HL+) De s c r i pt i on: Sa me a s : LDI A, ( HL) 15. LDI A,(HL) De s c r i pt i on: Put va l ue a t a ddr e s s HL i nt o A. I nc r e me nt HL. Sa me a s : LD A, ( HL) - I NC HL Opc ode s : I ns t r uc t i on LD LD LDI by DP Pa r a me t e r s A, ( HLI ) A, ( HL+) A, ( HL) Opc ode 2A 2A 2A Cyc l e s 8 8 8 Page 73 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 16. LD (HLI),A De s c r i pt i on: Sa me a s : LDI ( HL) , A 17. LD (HL+),A De s c r i pt i on: Sa me a s : LDI ( HL) , A 18. LDI (HL),A De s c r i pt i on: Put A i nt o me mor y a ddr e s s HL. I nc r e me nt HL. Sa me a s : LD ( HL) , A - I NC HL Opc ode s : I ns t r uc t i on LD LD LDI Page 74 Pa r a me t e r s ( HLI ) , A ( HL+) , A ( HL) , A Opc ode 22 22 22 Cyc l e s 8 8 8 V 1.01 Game BoyTM CPU Manual 3.3.1. 8-Bit Loads 19. LDH (n),A De s c r i pt i on: Put A i nt o me mor y a ddr e s s $FF00+n. Us e wi t h: n = one byt e i mme di a t e va l ue . Opc ode s : I ns t r uc t i on LD Pa r a me t e r s ( $FF00+n) , A Opc ode E0 Cyc l e s 12 20. LDH A,(n) De s c r i pt i on: Put me mor y a ddr e s s $FF00+n i nt o A. Us e wi t h: n = one byt e i mme di a t e va l ue . Opc ode s : I ns t r uc t i on LD by DP Pa r a me t e r s A, ( $FF00+n) Opc ode F0 Cyc l e s 12 Page 75 Game BoyTM CPU Manual 3.3.2. 16-Bit Loads 3.3.2. 16-Bit Loads 1. LD n,nn De s c r i pt i on: Put va l ue nn i nt o n. Us e wi t h: n = BC, DE, HL, SP nn = 16 bi t i mme di a t e va l ue Opc ode s : I ns t r uc t i on LD LD LD LD Pa r a me t e r s BC, nn DE, nn HL, nn SP, nn Opc ode 01 11 21 31 Cyc l e s 12 12 12 12 2. LD SP,HL De s c r i pt i on: Put HL i nt o St a c k Poi nt e r ( SP) . Opc ode s : I ns t r uc t i on LD Page 76 Pa r a me t e r s SP, HL Opc ode F9 Cyc l e s 8 V 1.01 Game BoyTM CPU Manual 3.3.2. 16-Bit Loads 3. LD HL,SP+n De s c r i pt i on: Sa me a s : LDHL SP, n. 4. LDHL SP,n De s c r i pt i on: Put SP + n e f f e c t i ve a ddr e s s i nt o HL. Us e wi t h: n = one byt e s i gne d i mme di a t e va l ue . Fl a gs a f f e c t e d: Z - Re s e t . N - Re s e t . H - Se t or r e s e t a c c or di ng t o ope r a t i on. C - Se t or r e s e t a c c or di ng t o ope r a t i on. Opc ode s : I ns t r uc t i on LDHL by DP Pa r a me t e r s SP, n Opc ode F8 Cyc l e s 12 Page 77 Game BoyTM CPU Manual 3.3.2. 16-Bit Loads 5. LD (nn),SP De s c r i pt i on: Put St a c k Poi nt e r ( SP) a t a ddr e s s n. Us e wi t h: nn = t wo byt e i mme di a t e a ddr e s s . Opc ode s : I ns t r uc t i on LD Pa r a me t e r s ( nn) , SP Opc ode 08 Cyc l e s 20 6. PUSH nn De s c r i pt i on: Pus h r e gi s t e r pa i r nn ont o s t a c k. De c r e me nt St a c k Poi nt e r ( SP) t wi c e . Us e wi t h: nn = AF, BC, DE, HL Opc ode s : I ns t r uc t i on PUSH PUSH PUSH PUSH Page 78 Pa r a me t e r s AF BC DE HL Opc ode F5 C5 D5 E5 Cyc l e s 16 16 16 16 V 1.01 Game BoyTM CPU Manual 3.3.2. 16-Bit Loads 7. POP nn De s c r i pt i on: Pop t wo byt e s of f s t a c k i nt o r e gi s t e r pa i r nn. I nc r e me nt St a c k Poi nt e r ( SP) t wi c e . Us e wi t h: nn = AF, BC, DE, HL Opc ode s : I ns t r uc t i on POP POP POP POP by DP Pa r a me t e r s AF BC DE HL Opc ode F1 C1 D1 E1 Cyc l e s 12 12 12 12 Page 79 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 3.3.3. 8-Bit ALU 1. ADD A,n De s c r i pt i on: Add n t o A. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs a f f e c t Z - Se t i f N - Re s e t . H - Se t i f C - Se t i f e d: r e s ul t i s z e r o. c a r r y f r om bi t 3. c a r r y f r om bi t 7. Opc ode s : I ns t r uc t i on ADD ADD ADD ADD ADD ADD ADD ADD ADD Page 80 Pa r a me t e r s A, A A, B A, C A, D A, E A, H A, L A, ( HL) A, # Opc ode 87 80 81 82 83 84 85 86 C6 Cyc l e s 4 4 4 4 4 4 4 8 8 V 1.01 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 2. ADC A,n De s c r i pt i on: Add n + Ca r r y f l a g t o A. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs Z N H C - a f f e c t e d: Se t i f r e s ul t i s z e r o. Re s e t . Se t i f c a r r y f r om bi t 3. Se t i f c a r r y f r om bi t 7. Opc ode s : I ns t r uc t i on ADC ADC ADC ADC ADC ADC ADC ADC ADC by DP Pa r a me t e r s A, A A, B A, C A, D A, E A, H A, L A, ( HL) A, # Opc ode 8F 88 89 8A 8B 8C 8D 8E CE Cyc l e s 4 4 4 4 4 4 4 8 8 Page 81 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 3. SUB n De s c r i pt i on: Subt r a c t n f r om A. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs a f f e c t Z - Se t i f N - Se t . H - Se t i f C - Se t i f e d: r e s ul t i s z e r o. no bor r ow f r om bi t 4. no bor r ow. Opc ode s : I ns t r uc t i on SUB SUB SUB SUB SUB SUB SUB SUB SUB Page 82 Pa r a me t e r s A B C D E H L ( HL) # Opc ode 97 90 91 92 93 94 95 96 D6 Cyc l e s 4 4 4 4 4 4 4 8 8 V 1.01 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 4. SBC A,n De s c r i pt i on: Subt r a c t n + Ca r r y f l a g f r om A. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs a f f e c t Z - Se t i f N - Se t . H - Se t i f C - Se t i f e d: r e s ul t i s z e r o. no bor r ow f r om bi t 4. no bor r ow. Opc ode s : I ns t r uc t i on SBC SBC SBC SBC SBC SBC SBC SBC SBC by DP Pa r a me t e r s A, A A, B A, C A, D A, E A, H A, L A, ( HL) A, # Opc ode 9F 98 99 9A 9B 9C 9D 9E ?? Cyc l e s 4 4 4 4 4 4 4 8 ? Page 83 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 5. AND n De s c r i pt i on: Logi c a l l y AND n wi t h A, r e s ul t i n A. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Se t . C - Re s e t . Opc ode s : I ns t r uc t i on AND AND AND AND AND AND AND AND AND Page 84 Pa r a me t e r s A B C D E H L ( HL) # Opc ode A7 A0 A1 A2 A3 A4 A5 A6 E6 Cyc l e s 4 4 4 4 4 4 4 8 8 V 1.01 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 6. OR n De s c r i pt i on: Logi c a l OR n wi t h r e gi s t e r A, r e s ul t i n A. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Re s e t . Opc ode s : I ns t r uc t i on OR OR OR OR OR OR OR OR OR by DP Pa r a me t e r s A B C D E H L ( HL) # Opc ode B7 B0 B1 B2 B3 B4 B5 B6 F6 Cyc l e s 4 4 4 4 4 4 4 8 8 Page 85 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 7. XOR n De s c r i pt i on: Logi c a l e xc l us i ve OR n wi t h r e gi s t e r A, r e s ul t i n A. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Re s e t . Opc ode s : I ns t r uc t i on XOR XOR XOR XOR XOR XOR XOR XOR XOR Page 86 Pa r a me t e r s A B C D E H L ( HL) * Opc ode AF A8 A9 AA AB AC AD AE EE Cyc l e s 4 4 4 4 4 4 4 8 8 V 1.01 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 8. CP n De s c r i pt i on: Compa r e A wi t h n. Thi s i s ba s i c a l l y a n A - n s ubt r a c t i on i ns t r uc t i on but t he r e s ul t s a r e t hr own a wa y. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) , # Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. ( Se t i f A = n. ) N - Se t . H - Se t i f no bor r ow f r om bi t 4. C - Se t f or no bor r ow. ( Se t i f A < n. ) Opc ode s : I ns t r uc t i on CP CP CP CP CP CP CP CP CP by DP Pa r a me t e r s A B C D E H L ( HL) # Opc ode BF B8 B9 BA BB BC BD BE FE Cyc l e s 4 4 4 4 4 4 4 8 8 Page 87 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 9. INC n De s c r i pt i on: I nc r e me nt r e gi s t e r n. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Se t i f c a r r y f r om bi t 3. C - Not a f f e c t e d. Opc ode s : I ns t r uc t i on I NC I NC I NC I NC I NC I NC I NC I NC Page 88 Pa r a me t e r s A B C D E H L ( HL) Opc ode 3C 04 0C 14 1C 24 2C 34 Cyc l e s 4 4 4 4 4 4 4 12 V 1.01 Game BoyTM CPU Manual 3.3.3. 8-Bit ALU 10. DEC n De s c r i pt i on: De c r e me nt r e gi s t e r n. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s e l t i s z e r o. N - Se t . H - Se t i f no bor r ow f r om bi t 4. C - Not a f f e c t e d. Opc ode s : I ns t r uc t i on DEC DEC DEC DEC DEC DEC DEC DEC by DP Pa r a me t e r s A B C D E H L ( HL) Opc ode 3D 05 0D 15 1D 25 2D 35 Cyc l e s 4 4 4 4 4 4 4 12 Page 89 3.3.4. 16-Bit Arithmetic Game BoyTM CPU Manual 3.3.4. 16-Bit Arithmetic 1. ADD HL,n De s c r i pt i on: Add n t o HL. Us e wi t h: n = BC, DE, HL, SP Fl a gs a f f e c t e d: Z - Not a f f e c t e d. N - Re s e t . H - Se t i f c a r r y f r om bi t 11. C - Se t i f c a r r y f r om bi t 15. Opc ode s : I ns t r uc t i on ADD ADD ADD ADD Page 90 Pa r a me t e r s HL, BC HL, DE HL, HL HL, SP Opc ode 09 19 29 39 Cyc l e s 8 8 8 8 V 1.01 Game BoyTM CPU Manual 3.3.4. 16-Bit Arithmetic 2. ADD SP,n De s c r i pt i on: Add n t o St a c k Poi nt e r ( SP) . Us e wi t h: n = one byt e s i gne d i mme di a t e va l ue ( #) . Fl a gs a f f e c t e d: Z - Re s e t . N - Re s e t . H - Se t or r e s e t a c c or di ng t o ope r a t i on. C - Se t or r e s e t a c c or di ng t o ope r a t i on. Opc ode s : I ns t r uc t i on ADD by DP Pa r a me t e r s SP, # Opc ode E8 Cyc l e s 16 Page 91 3.3.4. 16-Bit Arithmetic Game BoyTM CPU Manual 3. INC nn De s c r i pt i on: I nc r e me nt r e gi s t e r nn. Us e wi t h: nn = BC, DE, HL, SP Fl a gs a f f e c t e d: None . Opc ode s : I ns t r uc t i on I NC I NC I NC I NC Page 92 Pa r a me t e r s BC DE HL SP Opc ode 03 13 23 33 Cyc l e s 8 8 8 8 V 1.01 Game BoyTM CPU Manual 3.3.4. 16-Bit Arithmetic 4. DEC nn De s c r i pt i on: De c r e me nt r e gi s t e r nn. Us e wi t h: nn = BC, DE, HL, SP Fl a gs a f f e c t e d: None . Opc ode s : I ns t r uc t i on DEC DEC DEC DEC by DP Pa r a me t e r s BC DE HL SP Opc ode 0B 1B 2B 3B Cyc l e s 8 8 8 8 Page 93 Game BoyTM CPU Manual 3.3.5. Miscellaneous 3.3.5. Miscellaneous 1. SWAP n De s c r i pt i on: Swa p uppe r & l owe r ni bl e s of n. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Re s e t . Opc ode s : I ns t r uc t i on SWAP SWAP SWAP SWAP SWAP SWAP SWAP SWAP Page 94 Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 37 CB 30 CB 31 CB 32 CB 33 CB 34 CB 35 CB 36 Cyc l e s 8 8 8 8 8 8 8 16 V 1.01 Game BoyTM CPU Manual 3.3.5. Miscellaneous 2. DAA De s c r i pt i on: De c i ma l a dj us t r e gi s t e r A. Thi s i ns t r uc t i on a dj us t s r e gi s t e r A s o t ha t t he c or r e c t r e pr e s e nt a t i on of Bi na r y Code d De c i ma l ( BCD) i s obt a i ne d. Fl a gs a f f e c t e d: Z - Se t i f r e gi s t e r A i s z e r o. N - Not a f f e c t e d. H - Re s e t . C - Se t or r e s e t a c c or di ng t o ope r a t i on. Opc ode s : I ns t r uc t i on DAA Pa r a me t e r s -/- Opc ode 27 Cyc l e s 4 3. CPL De s c r i pt i on: Compl e me nt A r e gi s t e r . ( Fl i p a l l bi t s . ) Fl a gs a f f e c t e d: Z - Not a f f e c t e d. N - Se t . H - Se t . C - Not a f f e c t e d. Opc ode s : I ns t r uc t i on CPL by DP Pa r a me t e r s -/- Opc ode 2F Cyc l e s 4 Page 95 Game BoyTM CPU Manual 3.3.5. Miscellaneous 4. CCF De s c r i Compl If C If C pt i on: e me nt c a r r y f l a g. f l a g i s s e t , t he n r e s e t i t . f l a g i s r e s e t , t he n s e t i t . Fl a gs a f f e c t e d: Z - Not a f f e c t e d. N - Re s e t . H - Re s e t . C - Compl e me nt e d. Opc ode s : I ns t r uc t i on CCF Pa r a me t e r s -/- Opc ode 3F Cyc l e s 4 Opc ode 37 Cyc l e s 4 5. SCF De s c r i pt i on: Se t Ca r r y f l a g. Fl a gs a f f e c t e d: Z - Not a f f e c t e d. N - Re s e t . H - Re s e t . C - Se t . Opc ode s : I ns t r uc t i on SCF Page 96 Pa r a me t e r s -/- V 1.01 Game BoyTM CPU Manual 3.3.5. Miscellaneous 6. NOP De s c r i pt i on: No ope r a t i on. Opc ode s : I ns t r uc t i on NOP Pa r a me t e r s -/- Opc ode 00 Cyc l e s 4 7. HALT De s c r i pt i on: Powe r down CPU unt i l a n i nt e r r upt oc c ur s . Us e t hi s whe n e ve r pos s i bl e t o r e duc e e ne r gy c ons umpt i on. Opc ode s : I ns t r uc t i on HALT Pa r a me t e r s -/- Opc ode 76 Cyc l e s 4 8. STOP De s c r i pt i on: Ha l t CPU & LCD di s pl a y unt i l but t on pr e s s e d. Opc ode s : I ns t r uc t i on STOP by DP Pa r a me t e r s -/- Opc ode 10 00 Cyc l e s 4 Page 97 3.3.5. Miscellaneous Game BoyTM CPU Manual 9. DI De s c r i pt i on: Thi s i ns t r uc t i on di s a bl e s i nt e r r upt s but not i mme di a t e l y. I nt e r r upt s a r e di s a bl e d a f t e r i ns t r uc t i on a f t e r DI i s e xe c ut e d. Fl a gs a f f e c t e d: None . Opc ode s : I ns t r uc t i on DI Pa r a me t e r s -/- Opc ode F3 Cyc l e s 4 10. EI De s c r i pt i Ena bl e i but not i ns t r uc t on: nt e r r upt s . Thi s i nt r uc t i on e na bl e s i nt e r r upt s i mme di a t e l y. I nt e r r upt s a r e e na bl e d a f t e r i on a f t e r EI i s e xe c ut e d. Fl a gs a f f e c t e d: None . Opc ode s : I ns t r uc t i on EI Page 98 Pa r a me t e r s -/- Opc ode FB Cyc l e s 4 V 1.01 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 3.3.6. Rotates & Shifts 1. RLCA De s c r i pt i on: Rot a t e A l e f t . Ol d bi t 7 t o Ca r r y f l a g. Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 7 da t a . Opc ode s : I ns t r uc t i on RLCA Pa r a me t e r s -/- Opc ode 07 Cyc l e s 4 2. RLA De s c r i pt i on: Rot a t e A l e f t t hr ough Ca r r y f l a g. Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 7 da t a . Opc ode s : I ns t r uc t i on RLA by DP Pa r a me t e r s -/- Opc ode 17 Cyc l e s 4 Page 99 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 3. RRCA De s c r i pt i on: Rot a t e A r i ght . Ol d bi t 0 t o Ca r r y f l a g. Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 0 da t a . Opc ode s : I ns t r uc t i on RRCA Pa r a me t e r s -/- Opc ode 0F Cyc l e s 4 4. RRA De s c r i pt i on: Rot a t e A r i ght t hr ough Ca r r y f l a g. Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 0 da t a . Opc ode s : I ns t r uc t i on RRA Page 100 Pa r a me t e r s -/- Opc ode 1F Cyc l e s 4 V 1.01 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 5. RLC n De s c r i pt i on: Rot a t e n l e f t . Ol d bi t 7 t o Ca r r y f l a g. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 7 da t a . Opc ode s : I ns t r uc t i on RLC RLC RLC RLC RLC RLC RLC RLC by DP Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 07 CB 00 CB 01 CB 02 CB 03 CB 04 CB 05 CB 06 Cyc l e s 8 8 8 8 8 8 8 16 Page 101 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 6. RL n De s c r i pt i on: Rot a t e n l e f t t hr ough Ca r r y f l a g. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 7 da t a . Opc ode s : I ns t r uc t i on RL RL RL RL RL RL RL RL Page 102 Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 17 CB 10 CB 11 CB 12 CB 13 CB 14 CB 15 CB 16 Cyc l e s 8 8 8 8 8 8 8 16 V 1.01 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 7. RRC n De s c r i pt i on: Rot a t e n r i ght . Ol d bi t 0 t o Ca r r y f l a g. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 0 da t a . Opc ode s : I ns t r uc t i on RRC RRC RRC RRC RRC RRC RRC RRC by DP Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 0F CB 08 CB 09 CB 0A CB 0B CB 0C CB 0D CB 0E Cyc l e s 8 8 8 8 8 8 8 16 Page 103 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 8. RR n De s c r i pt i on: Rot a t e n r i ght t hr ough Ca r r y f l a g. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 0 da t a . Opc ode s : I ns t r uc t i on RR RR RR RR RR RR RR RR Page 104 Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 1F CB 18 CB 19 CB 1A CB 1B CB 1C CB 1D CB 1E Cyc l e s 8 8 8 8 8 8 8 16 V 1.01 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 9. SLA n De s c r i pt i on: Shi f t n l e f t i nt o Ca r r y. LSB of n s e t t o 0. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 7 da t a . Opc ode s : I ns t r uc t i on SLA SLA SLA SLA SLA SLA SLA SLA by DP Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 27 CB 20 CB 21 CB 22 CB 23 CB 24 CB 25 CB 26 Cyc l e s 8 8 8 8 8 8 8 16 Page 105 3.3.6. Rotates & Shifts Game BoyTM CPU Manual 10. SRA n De s c r i pt i on: Shi f t n r i ght i nt o Ca r r y. MSB doe s n' t c ha nge . Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 0 da t a . Opc ode s : I ns t r uc t i on SRA SRA SRA SRA SRA SRA SRA SRA Page 106 Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 2F CB 28 CB 29 CB 2A CB 2B CB 2C CB 2D CB 2E Cyc l e s 8 8 8 8 8 8 8 16 V 1.01 Game BoyTM CPU Manual 3.3.6. Rotates & Shifts 11. SRL n De s c r i pt i on: Shi f t n r i ght i nt o Ca r r y. MSB s e t t o 0. Us e wi t h: n = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f r e s ul t i s z e r o. N - Re s e t . H - Re s e t . C - Cont a i ns ol d bi t 0 da t a . Opc ode s : I ns t r uc t i on SRL SRL SRL SRL SRL SRL SRL SRL by DP Pa r a me t e r s A B C D E H L ( HL) Opc ode CB 3F CB 38 CB 39 CB 3A CB 3B CB 3C CB 3D CB 3E Cyc l e s 8 8 8 8 8 8 8 16 Page 107 Game BoyTM CPU Manual 3.3.7. Bit Opcodes 3.3.7. Bit Opcodes 1. BIT b,r De s c r i pt i on: Te s t bi t b i n r e gi s t e r r . Us e wi t h: b = 0 - 7, r = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: Z - Se t i f bi t b of r e gi s t e r r i s 0. N - Re s e t . H - Se t . C - Not a f f e c t e d. Opc ode s : I ns t r uc t i on BI T BI T BI T BI T BI T BI T BI T BI T Page 108 Pa r a me t e r s b, A b, B b, C b, D b, E b, H b, L b, ( HL) Opc ode CB 47 CB 40 CB 41 CB 42 CB 43 CB 44 CB 45 CB 46 Cyc l e s 8 8 8 8 8 8 8 16 V 1.01 Game BoyTM CPU Manual 3.3.7. Bit Opcodes 2. SET b,r De s c r i pt i on: Se t bi t b i n r e gi s t e r r . Us e wi t h: b = 0 - 7, r = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: None . Opc ode s : I ns t r uc t i on SET SET SET SET SET SET SET SET by DP Pa r a me t e r s b, A b, B b, C b, D b, E b, H b, L b, ( HL) Opc ode CB C7 CB C0 CB C1 CB C2 CB C3 CB C4 CB C5 CB C6 Cyc l e s 8 8 8 8 8 8 8 16 Page 109 Game BoyTM CPU Manual 3.3.7. Bit Opcodes 3. RES b,r De s c r i pt i on: Re s e t bi t b i n r e gi s t e r r . Us e wi t h: b = 0 - 7, r = A, B, C, D, E, H, L, ( HL) Fl a gs a f f e c t e d: None . Opc ode s : I ns t r uc t i on RES RES RES RES RES RES RES RES Page 110 Pa r a me t e r s b, A b, B b, C b, D b, E b, H b, L b, ( HL) Opc ode CB 87 CB 80 CB 81 CB 82 CB 83 CB 84 CB 85 CB 86 Cyc l e s 8 8 8 8 8 8 8 16 V 1.01 Game BoyTM CPU Manual 3.3.8. Jumps 3.3.8. Jumps 1. JP nn De s c r i pt i on: J ump t o a ddr e s s nn. Us e wi t h: nn = t wo byt e i mme di a t e va l ue . ( LS byt e f i r s t . ) Opc ode s : I ns t r uc t i on JP Pa r a me t e r s nn Opc ode C3 Cyc l e s 12 2. JP cc,nn De s c r i pt i on: J ump t o a ddr e s s c c = NZ, J ump i c c = Z, J ump i c c = NC, J ump i c c = C, J ump i n f f f f i f f ol l Z f l ag Z f l ag C f l ag C f l ag owi is is is is ng c ondi t i on i s t r ue : r es et . s et . r es et . s et . Us e wi t h: nn = t wo byt e i mme di a t e va l ue . ( LS byt e f i r s t . ) Opc ode s : I ns t r uc t i on JP JP JP JP by DP Pa r a me t e r s NZ, nn Z, nn NC, nn C, nn Opc ode C2 CA D2 DA Cyc l e s 12 12 12 12 Page 111 Game BoyTM CPU Manual 3.3.8. Jumps 3. JP (HL) De s c r i pt i on: J ump t o a ddr e s s c ont a i ne d i n HL. Opc ode s : I ns t r uc t i on JP Pa r a me t e r s ( HL) Opc ode E9 Cyc l e s 4 4. JR n De s c r i pt i on: Add n t o c ur r e nt a ddr e s s a nd j ump t o i t . Us e wi t h: n = one byt e s i gne d i mme di a t e va l ue Opc ode s : I ns t r uc t i on JR Page 112 Pa r a me t e r s n Opc ode 18 Cyc l e s 8 V 1.01 Game BoyTM CPU Manual 3.3.8. Jumps 5. JR cc,n De s c r i pt i on: I f f ol l owi ng c ondi t i on i s t r ue t he n a dd n t o c ur r e nt a ddr e s s a nd j ump t o i t : Us e wi t h: n = one byt e s i c c = NZ, J ump c c = Z, J ump c c = NC, J ump c c = C, J ump gne d if Z if Z if C if C i mme di f l ag i f l ag i f l ag i f l ag i at s s s s e va l ue r es et . s et . r es et . s et . Opc ode s : I ns t r uc t i on JR JR JR JR by DP Pa r a me t e r s NZ, * Z, * NC, * C, * Opc ode 20 28 30 38 Cyc l e s 8 8 8 8 Page 113 Game BoyTM CPU Manual 3.3.9. Calls 3.3.9. Calls 1. CALL nn De s c r i pt i on: Pus h a ddr e s s of ne xt i ns t r uc t i on ont o s t a c k a nd t he n j ump t o a ddr e s s nn. Us e wi t h: nn = t wo byt e i mme di a t e va l ue . ( LS byt e f i r s t . ) Opc ode s : I ns t r uc t i on CALL Page 114 Pa r a me t e r s nn Opc ode CD Cyc l e s 12 V 1.01 Game BoyTM CPU Manual 3.3.9. Calls 2. CALL cc,nn De s c r i pt i on: Ca l l a ddr e s s c c = NZ, Ca l c c = Z, Ca l c c = NC, Ca l c c = C, Ca l n l l l l i i i i i f f f f f f ol l Z fl Z fl C fl C fl owi ag ag ag ag ng is is is is c ondi t i on i s t r ue : r es et . s et . r es et . s et . Us e wi t h: nn = t wo byt e i mme di a t e va l ue . ( LS byt e f i r s t . ) Opc ode s : I ns t r uc t i on CALL CALL CALL CALL by DP Pa r a me t e r s NZ, nn Z, nn NC, nn C, nn Opc ode C4 CC D4 DC Cyc l e s 12 12 12 12 Page 115 Game BoyTM CPU Manual 3.3.10. Restarts 3.3.10. Restarts 1. RST n De s c r i pt i on: Pus h pr e s e nt a ddr e s s ont o s t a c k. J ump t o a ddr e s s $0000 + n. Us e wi t h: n = $00, $08, $10, $18, $20, $28, $30, $38 Opc ode s : I ns t r uc t i on RST RST RST RST RST RST RST RST Page 116 Pa r a me t e r s 00H 08H 10H 18H 20H 28H 30H 38H Opc ode C7 CF D7 DF E7 EF F7 FF Cyc l e s 32 32 32 32 32 32 32 32 V 1.01 Game BoyTM CPU Manual 3.3.11. Returns 3.3.11. Returns 1. RET De s c r i pt i on: Pop t wo byt e s f r om s t a c k & j ump t o t ha t a ddr e s s . Opc ode s : I ns t r uc t i on RET Pa r a me t e r s -/- Opc ode C9 Cyc l e s 8 2. RET cc De s c r i pt i on: Re t ur n i f f ol l owi ng c ondi t i on i s t r ue : Us e cc cc cc cc wi = = = = t h: NZ, Z, NC, C, Re t Re t Re t Re t ur n ur n ur n ur n i i i i f f f f Z Z C C fl fl fl fl ag ag ag ag i i i i s s s s r es et . s et . r es et . s et . Opc ode s : I ns t r uc t i on RET RET RET RET by DP Pa r a me t e r s NZ Z NC C Opc ode C0 C8 D0 D8 Cyc l e s 8 8 8 8 Page 117 Game BoyTM CPU Manual 3.3.11. Returns 3. RETI De s c r i pt i on: Pop t wo byt e s f r om s t a c k & j ump t o t ha t a ddr e s s t he n e na bl e i nt e r r upt s . Opc ode s : I ns t r uc t i on RETI Page 118 Pa r a me t e r s -/- Opc ode D9 Cyc l e s 8 V 1.01 Game BoyTM CPU Manual 4. Super Game Boy commands 4. Super Game Boy commands 4.1. Foreword Supe r Game Boy Commands , Ex t r ac t e d by k OOPa, 15- Fe b- 98 ----------------------------------------------------Las t updat e d by : Bows e r , 13- J une - 98 Upda t e s : Bl oc k Ar e a mode ( $04) c ont r ol c ode s upda t e d Li ne mode ( $05) wr i t t e n Di vi de mode ( $06) wr i t t e n 1CHR mode ( $07) wr i t t e n A SGB c omma nd t r a ns f e r i s 128 bi t s + a z e r o bi t . The f i r s t f i ve bi t s of t he f i r s t byt e i s t he c omma nd byt e . The l a s t 3 bi t s of t he f i r s t byt e r e pr e s e nt t he numbe r of 128 bi t pa c ka ge s t o be s e nt . Unus e d bi t s i n a SGB c omma nd t r a ns f e r s houl d be s e t t o 0. Mos t of t he c omma nds l i s t e d be l ow onl y t r a ns f e r one pa c ka ge . The c omma nd byt e s be l ow a r e pr e c e de d by t he # c ha r a c t e r t o r e mi nd you t ha t t he y ha ve t o be s hi f t e d l e f t t hr e e t i me s be f or e us e d. 4.2. Palettes The r e a r e s e ve r a l di f f e r e nt t ype s of pa l e t t e s i n t he SGB. One t ype i s t he Sys t e m c ol or pa l e t t e . I t i s a vi r t ua l pa l e t t e r a t he r t ha n a ha r dwa r e pa l e t t e . The ha r dwa r e c ol or pa l e t t e i s s hown a t t he bot t om of t hi s doc ume nt a nd c ont a i ns wha t a r e c a l l e d t he SGB c ol or pa l e t t e s a nd a l s o hol ds t he SGB Bor de r pa l e t t e . As f a r a s SGB ons c r e e n c ol or s a r e c onc e r ne d t he r e a r e onl y r e a l l y t wo pa l e t t e t ype s : SGB c ol or pa l e t t e s a nd by DP Page 119 4.2. Palettes Game BoyTM CPU Manual t he SGB bor de r pa l e t t e . The SGB bor de r pa l e t t e i s s e t up us i ng c omma nd $14. The r e a r e 64 c ol or s i n t hi s pa l e t t e . The SGB c ol or pa l e t t e s ma y be c omma nds $00- $03. The r e a r e a t t he s e pa l e t t e s a nd t he y de t e r mi us e d i n t he ma i n ga me a c t i on wi bi t 00 wi l l be t he s a me f or a l l The c ol or mos t r e c e nt l y s t or e d s e t di r e c t l y us i ng ot a l of f our of ne whi c h c ol or s a r e ndow. The c ol or f or SGB c ol or pa l e t t e s . i n bi t 00 wi l l be us e d. The SGB c ol or pa l e t t e s ma y be s e t i ndi r e c t l y us i ng t he Sys t e m c ol or pa l e t t e s us i ng c omma nds $0a - $0b. The r e a r e a t ot a l of 512 of t he s e pa l e t t e s . 4.3. SGB Border The SGB bor de r i s of t e n s hown a s c ol or f ul gr a phi c s t ha t s ur r ound t he ma i n ga me a c t i on wi ndow. The t r ut h i s t ha t t he SGB bor de r a c t ua l l y c ove r s t he whol e vi e wi ng s c r e e n a nd ha s t he hi ghe s t vi e wi ng pr i or i t y. The r e a s on i t a ppe a r s be j us t a " bor de r " a r ound mos t ga me s i s due t o t he f a c t t ha t us ua l l y a 160x144 pi xe l wi de box i s dr a wn i n t he c e nt e r of t he SGB " bor de r " us i ng c ol or 0. Si nc e t hi s c ol or i s t r a ns pa r e nt , t he ma i n ga me a c t i on wi ndow unde r i t i s vi s i bl e . Cr e a t i ng a pr ogr a m t o c onve r t a 16- c ol or GI F t o a SGB bor de r i s r e l a t i ve l y e a s y a nd ha s be e n done f or DOS. ( i . e . gi f 2s opt . e xe ) Wha t i s not s o e a s y i s c onve r t i ng a 64- c ol or GI F t o a SGB bor de r be c a us e e a c h t i l e onl y ha s a c c e s s t o 16- c ol or s . The 16- c ol or pa l e t t e t ha t t he t i l e ha s a c c e s s t o i s de t e r mi ne d by t he t i l e a t t r i but e byt e . The t i l e a t t r i but e byt e i s de s c r i be d i n t he ' Pi c t ur e Tr a ns f e r ' c omma nd ( $14) be l ow. Page 120 V 1.01 Game BoyTM CPU Manual 4.4. Main Action Window 4.4. Main Action Window The SGB c a r t r i dge t ha t pl ugs i nt o t he SNES c ont a i ns a GB CPU. The SNES i s a bl e t o vi de o c a pt ur e t he vi de o out put of t hi s GB CPU a nd di s pl a y i t on t he s c r e e n a s t he ma i n ga me a c t i on wi ndow. Si nc e t he SNES i s onl y doi ng a r a w vi de o c a pt ur e i t onl y knows a bout 4 l e ve l s of gr e y c omi ng f r om t he GB CPU. I n or de r t o a dd mor e t ha n 4 c ol or s t o t he ma i n ga me a c t i on wi ndow, t he SGB s of t wa r e a l l ows you t o a s s i gn 1 of t he 4 SGB c ol or pa l e t t e s f or e a c h 8x8 t i l e pos i t i on i n t hi s wi ndow. " Bl oc k" ( $4) , " Li ne " ( $5) , " Di vi de " ( $6) , " 1Chr " ( $7) , a nd " Se t At t r f r om ATF" ( $15) a l l a r e di f f e r e nt me a ns f or s e t t i ng t he pa l e t t e s f or e a c h 8x8 t i l e l oc a t i on. On r e s e t , e a c h 8x8 t i l e pos i t i on de f a ul t s t o SGB c ol or pa l e t t e 0. Comma nds $4- $7 a r e va r i ous me t hods f or bl oc k- s e t t i ng t he 8x8 t i l e c ol or pa l e t t e s . The " Se t At t r f r om ATF" ( $15) a l l ows you t o s e l e c t 1 of 45 " ATt r i but e Fi l e s " . Ea c h " ATt r i but e Fi l e " c ont a i ns 90 byt e s ( 20x18x2 bi t s ) . By s e l e c t i ng a n " ATt r i but e Fi l e " , you c a n e xa c t l y s e l e c t 1 of 4 SGB c ol or pa l e t t e s f or e a c h 8x8 t i l e l oc a t i on due t o t he f a c t t ha t t he s e f i l e s c ont a i n 2 bi t s of i nf or ma t i on f or e a c h 8x8 t i l e l oc a t i on. by DP Page 121 Game BoyTM CPU Manual 4.5. Commands 4.5. Commands 1. Set SGB color Palettes 0 & 1 ( $00, da t a ) - Downl oa d c ol or pa l e t t e s 0 & 1 2 & 3 ( $01, da t a ) - Downl oa d c ol or pa l e t t e s 2 & 3 0 & 3 ( $02, da t a ) - Downl oa d c ol or pa l e t t e s 0 & 3 1 & 2 ( $03, da t a ) - Downl oa d c ol or pa l e t t e s 1 & 2 -------------------------------------------------He r e i s e xa mpl e da t a f or s e t t i ng SGB c ol or pa l e t t e s 0 & 1: DW $7f f f ; whi t e ; bi t 00 c ol or ; Pa l l e t e 0 DW DW DW $7c 00 $03e 0 $0000 ; bl ue ; gr e e n ; bl a c k ; bi t 01 c ol or ; bi t 10 c ol or ; bi t 11 c ol or ; Pa l e t t e 1 DW DW DW $03f f $001f $0000 ; ye l l ow ; r ed ; bl a c k ; bi t 01 c ol or ; bi t 10 c ol or ; bi t 11 c ol or Pl e a s e not e t ha t a l l f our SGB c ol or pa l e t t e s s ha r e t he s a me bi t 00 c ol or . The c ol or mos t r e c e nt l y s t or e d i n bi t 00 wi l l be us e d. I nf or ma t i on f or c a l c ul a t i ng t he DW c ol or va l ue i s gi ve n l a t e r i n t hi s t e xt . Whe n us i ng t he f ol l owi ng f our Pa l e t t e Di r e c t Se t c omma nds , t he Ga me Boy i ma ge wi l l be a l t e r e d ( c ol or s c ha nge d) e ve n i f you us e d t he Ga me Boy Wi ndow Ma s k c omma nd t o f r e e z e t he s c r e e n. The r e f or e us e a r gume nt s Page 122 V 1.01 Game BoyTM CPU Manual 4.5. Commands Bl a c k or Whi t e wi t h t he Wi ndow Ma s k c omma nd be f or e us i ng t he f ol l owi ng f our c omma nds . I f you wa nt t o f r e e z e t he s c r e e n, s e nd pa l e t t e da t a wi t h t he At t r i but e Fi l e ATF0- ATF44. I n t he e ve nt you a r e c ha ngi ng t he s c r e e n by s e ndi ng a t t r i but e da t a a nd c ol or da t a a t t he s a me t i me , us e Se t SGB Pa l e t t e I ndi r e c t c omma nd. 2. "Block" Area Designation Mode ($04) ( ot he r da t a s hown be l ow) $00 - %00100xxx xxx = # of pa c ke t s $01 - %/ / / xxxxx xxxxx = # of da t a s e t s - One da t a s e t i s c ont r ol c ode , c ol or pa l e t t e de s i gna t i on, & t he c oor ds . $02 - %/ / / / / xxx = Cont 000 001 010 011 100 101 110 111 by DP xxx r ol c ode = don' t c a r e = s e t pa l ( i ns i de bl oc k + s ur r oundi ng bl oc k l i ne ) t o ' z z ' of $03 = s e t pa l of s ur r oundi ng bl oc k l i ne t o ' yy' of $03 = s e t pa l i ns i de bl oc k t o ' yy' & s ur r oundi ng bl oc k l i ne t o ' yy' = s e t pa l out s i de t he bl oc k t o ' xx' = s e t pa l i ns i de t o ' z z ' & out s i de t he bl oc k t o ' xx' = s e t pa l out s i de t he bl oc k t o ' xx' = s e t pa l i ns i de bl oc k t p ' z z ' + s ur r oundi ng l i ne t o ' yy' + out s i de bl oc k t o ' xx' Page 123 Game BoyTM CPU Manual 4.5. Commands $03 - %/ / xxyyz z Col or Pa l e t t e De s i gna t i on xx = c ol or pa l e t t e out s i de s ur r ounde d a r e a yy = c ol or pa l e t t e on s ur r oundi ng bl oc k l i ne z z = c ol or pa l e t t e i ns i de s ur r ounde d a r e a $04 $05 $06 $07 - %/ / %/ / %/ / %/ / / / / / xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx xxxxx = = = = s t a r t poi s t a r t poi e nd poi nt e nd poi nt nt H nt V H V $08- $0d Re pe a t of $02- $07 da t a i f # of da t a s e t s > 1. I f numbe r of pa c ke t s i s 1, s e t $0e & $0f t o $00. 3. "Line" Area Designation Mode ($05) $00 - %00101xxx xxx = # pa c ke t s $01 - %xxxxxxxx numbe r of da t a s e t s ( $1 - $6E) , one da t a s e t c ont r ol s : c ode , c ol our s pa l e t t e de s i gna t i on, a nd c oor ds . $02 - %xyyz z z z z c ont r ol c ode 1' s t da t a s e t x = Mode ( 0 = Hor i z ont a l l i ne , 1 = Ve r t i c a l l i ne ) yy = Pa l e t t e numbe r z z z z z = Li ne numbe r One da t a s e t i s 1 byt e j us t a s $02. I f # da t a s e t s = 1, f i l l wi t h 0' s up t o $0F. Page 124 V 1.01 Game BoyTM CPU Manual 4.5. Commands 4. "Divide" Area Designation Mode ($06) $00 - %00101001 ( numbe r of pa c ke t s mus t be 1) $01 - %/ vxxyyz z c ont r ol c ode v = Mode ( 0 = 1 = xx = Col our pa l yy = Col our pa l zz = c ol our pa l di Di et et et vi de hor i z ont a l l y, vi de ve r t i c a l ) t e ON di vi s i on l i ne t e ABOVE & LEFT of di vi s i on t e BELOW & RI GHT of di vi s i on $02 - %/ / / xxxxx xxxxx = Cha r a c t e r l i ne numbe r t o di vi de a t f i l l wi t h 0' s t o $0F 5. "1CHR" Area Designation Mode ($07) $00 - %00111xxx xxx = numbe r of pa c ke t s ( $01 - $06) $01 - %/ / / xxxxx Be gi nni ng X c oor di na t e $02 - %/ / / yyyyy Be gi nni ng Y c oor di na t e $03 - %xxxxxxxx Numbe r of da t a s e t s , 2 bi t s = 1 da t a s e t $04 - %/ / / / / / / x MSB of da t a i n $03. Ma x numbe r = 360. $05 - %/ / / / / / / x by DP Page 125 Game BoyTM CPU Manual 4.5. Commands Wr i t i ng s t yl e ( 0 = Le f t - > r i ght , 1 = up - > down) $06 - %vvxxyyz z da t a vv = pa l f or xx = pa l f or yy = pa l f or z z = pa l f or da t da t da t da t as et as et as et as et 1 2 3 4 $07 - %vvxxyyz z da t a et c. . . 6. Sound On/Off ($08) 7. Transfer Sound PRG/DATA ($09) Thi s t r a ns f e r s your s c or e ( i n . GAK f or ma t ) da t a . Se t SGB Pa l e t t e I ndi r e c t ( $0a ) Page 126 V 1.01 Game BoyTM CPU Manual 4.5. Commands 8. Set System Color Palette Data ($0b) 9. Enable/Disable Attraction Mode ($0c) 10. Speed Function ($0d) 11. SGB Function ($0e) 12. Super NES WRAM Transfer 1 ($0f) 13. Super NES WRAM Transfer 2 ($10) 14. Controller 2 Request (#11) ($00) - Request 1 play 15. Controller 2 Request (#11) ($01) - Request 2 play I s us e d t o de t e r mi ne i f s ys t e m i s SGB or r e gul a r GB. 16. Set Program Counter ($12) 17. CharSet Transfer ($13) ( %00000xyy) ( x=Cha r Type : 0=BG, 1=OBJ Ra nge : 0=00- 7f , 1=80- f f ) y=Cha r Se t The t i l e s t ha t a r e downl oa de d t o t he SNES f or t he bor de r a r e r e gul a r GB t i l e s t ha t ha ve be e n modi f i e d f or e xt r a c ol or s . Eve r y t i l e c ons i s t s of 32 byt e s . The f or ma t i s : 16 byt e s - St a nda r d 4 c ol or GB c ha r a c t e r s e t 16 byt e s - Ext e nde d c ol or i nf or ma t i on The s a me wa y GB us e s t wo byt e s t o c onve y 8 pi xe l s a nd t he 4 c ol or s f or e a c h pi xe l , t he e xt e nde d c ol or by DP Page 127 4.5. Commands Game BoyTM CPU Manual i nf o us e s t he s a me t e c hni que f or de t e r mi ni ng e xt e nde d c ol or s . Thi s t e l l s t he SNES whi c h c ol or pa l e t t e t o us e t o di s pl a y e a c h pi xe l . Thi s a l l ows a t ot a l of 16 c ol or s pe r t i l e . Si nc e SGB bor de r s s uppor t up t o 64 c ol or s , a c c e s s t o t he ot he r c ol or s a r e a c hi e ve d by c ha ngi ng t he Ma j or pa l e t t e numbe r i n t he pi c t ur e t r a ns f e r t i l e ma p. Page 128 V 1.01 Game BoyTM CPU Manual 4.5. Commands 18. Picture Transfer ($14) - Download border to SNES. The bor de r ( or t i l e ma p) t ha t i s downl oa de d i s 32x28 t i l e s or 256x224 pi xe l s . The r e gul a r GB s c r e e n f i t s r i ght i n t he mi ddl e l i ke t hi s : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXX. . . . . . . . . . . . . . . . . . . . XXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX by DP Page 129 4.5. Commands Game BoyTM CPU Manual The t i l e ma p c ons i s t s of a t i l e numbe r byt e & a t i l e a t t r i but e byt e a t e a c h pos i t i on on t he ma p. A t ot a l of 32 l i ne s a r e downl oa de d e ve n t hough t he l a s t 4 l i ne s a r e not vi s i bl e . Thi s woul d e qua l 64 byt e s pe r l i ne a nd a t ot a l of 2048 byt e s pe r ma p. Ne xt , a 64 x 2 byt e c ol or pa l e t t e f or t he ma p i s downl oa de d. The f i r s t pa l e t t e e nt r y c ol or i s t r a ns pa r e nt . Us e t hi s c ol or t o di s pl a y r e gul a r GB s c r e e n unde r ne a t h. The t i l e numbe r c ome s be f or e t e a c h pos i t i on. The r e c a n be up t o s e l e c t . The SGB onl y s uppor t t he t i l e a t t r i but e mus t be s e t a t t r i but e s I unde r s t a nd s o f a r : Bi Bi Bi Bi Bi Bi Bi Bi t t t t t t t t 7 6 5 4 3 2 1 0 - he t i l e a t t t o 1024 t i l s 256 s o bi t o 0. He r e r i but e of e s f r om whi c h t s 0 & 1 of a r e t he t i l e Ve r t i c a l f l i p t i l e Hor i z ont a l f l i p t i l e Doe s not hi ng ( Se t t o 0. ) Se l e c t Ma j or Pa l e t t e MSB ( Us ua l l y s e t t o 1. ) Se l e c t Ma j or Pa l e t t e Se l e c t Ma j or Pa l e t t e LSB Ti l e # MSB ( Mos t s i gni f i c a nt bi t ) ( Se t t o 0. ) Ti l e # NSB ( Ne xt mos t s i gni f i c a nt bi t ) ( Se t t o 0. ) Thi s i s of t e n c a l l e d t he SGB bor de r but i n f a c t i t c ove r s t he whol e SNES s c r e e n. The Ma j or Pa l e t t e s e l e c t ha s 8 di f f e r e nt s e t t i ngs . Onl y t he l a s t 4 - 7 a r e nor ma l l y us e d t hought t o a c c e s s a l l 64 c ol or s t r a ns f e r e d wi t h c md ( #14) . ( NOTE: I f us i ng ' gi f 2s opt . e xe ' t o ge ne r a t e a bor de r , t he r a nge of t he pa l e t t e s e l e c t i ons i s 1- 8 s o s e l e c t pa l e t t e 5 s i nc e t ha t pr ogr a m onl y a l l ows up t o 16 c ol or s . ) Page 130 V 1.01 Game BoyTM CPU Manual 4.5. Commands 19. Set Attribute from ATF ($15) The da t a f or 45 At t r i but e f i l e s i s t r a ns f e r e d wi t h t hi s c omma nd. Ea c h ATt r i but e Fi l e i s 90 byt e s s o 90x45 or 4050 byt e s of da t a a r e t r a ns f e r e d. Ea c h a t t r i but e f i l e us e s 5 byt e s pe r 8x8 hor i z ont a l l i ne ( 20 x 4 c ha r / byt e x 2 bi t s / pa l e t t e ) t o de s c r i be t he c ol or pa l e t t e s of a l i ne . Exa mpl e ATF da t a : DB DB DB ... DB $f f , $f f , $f f , .. $f f , $00, $00, $00, $02 $00, $00, $00, $02 $00, $00, $00, $02 ; Li ne #1 ; Li ne #2 ; Li ne #3 $00, $00, $00, $02 ; Li ne #18 The a bove ATt r i but e Fi l e woul d pa l e t t e s e l e c t i on t o 3 f or t he of t he ma i n ga me a c t i on wi ndow. woul d ha ve SGB c ol or pa l e t t e 2 ot he r c ol umns woul d ha ve pa l e t t s e t t he SGB c ol or f i r s t 4 c ol umns The l a s t c ol umn s e l e c t e d. Al l t he e 0 s e l e c t e d. 20. Set Data from ATF ($16) (data) Tr a ns f e r s pe c i f i e d ATt r i but e Fi l e t o Ga me Boy wi ndow. da t a : %/ xyyyyyy x - 0 = No Cha nge , 1 = Ca nc e l ma s k a f t e r xf e r ATF yyyyyy = ATt r i but e Fi l e numbe r ( $00- $2c ) 21. GameBoy Window Mask ($17) (data) da t a : $00 = Of f $01 = Tr a ns f e r s VRAM t o SNES unt i l c a nc e l l e d. by DP Page 131 Game BoyTM CPU Manual 4.5. Commands $02 = Ma s k s o t c ol or pa l $03 = Ma s k s o t c ol or pa l ha t et t ha t et t a l l c ol or c ode s i n SGB e a r e bl a c k. a l l c ol or c ode s i n SBG e a r e whi t e . 22. Super NES OBJ Mode ($18) 23. SNES Color Palette Info The Ni nt e ndo Supe r Fa mi c om i s c a pa bl e of di s pl a yi ng 256 c ol or s f r om a pa l e t t e of 32, 768. The s e 256 c ol or s a r e s pl i t i nt o 16 pa l e t t e s of 16 c ol or s e a c h. Onl y 8 of t he s e pa l e t t e s a r e a c c e s s i bl e by t he SGB. Col or da t a i s ma de up of 3 c ompone nt s ( Re d, Gr e e n, Bl ue ) e a c h of 5 bi t s ( The Ami ga us e s e xa c t l y t he s a me s ys t e m, but onl y us i ng 4 bi t s pe r c ompone nt ) . 00000 00000 00000 \ / \ / \ / \ / \ / \ / B G R Exampl e s : 00000 11111 00000 00000 00000 11111 Page 132 10111 00000 11111 00000 00000 11111 11100 00000 00000 11111 00000 11111 = = = = = $7C00 $03E0 $001F $0000 $7FFF ( Br i ght Bl ue ) ( Br i ght Gr e e n) ( Br i ght Re d) ( Bl a c k) ( Whi t e ) V 1.01 Game BoyTM CPU Manual 4.5. Commands 24. SGB Palette Selection The r e i s a c t ua l l y onl y one c ol or pa l e t t e i n t he SNES but i t i s di vi de d up i nt o s e ve r a l s e c t i ons f or di f f e r e nt SGB f unc t i ons . The s e s e c t i ons a r e r e f e r r e d t o a s Ma j or ( M) s e c t i ons 0- 7. Some SGB f unc t i ons e ve n di vi de d s ome of t he s e s e c t i ons i nt o s e c t i ons . The s e s e c t i ons a r e r e f e r r e d t o a s mi nor ( m) s e c t i ons . The l a r ge bl oc ks be l ow r e pr e s e nt Ma j or s e c t i ons or pa l e t t e s a nd s ma l l e r one s be l ow t he m r e pr e s e nt mi nor pa l e t t e s . The r e a r e 4 c ol or s pe r mi nor pa l e t t e a nd 16 c ol or s pe r Ma j or pa l e t t e : +- - - - +- - - - +- - - - +- - - - +- - - - +- - - - +- - - - +- - - - + | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | +- - - - +- - - - +- - - - +- - - - +- - - - +- - - - +- - - - +- - - - + | 0123| ^ ^ +- - - - + | | ^ ^ +- - - - - - - - +- - - - - - - - + +- - +- + | | | Se t wi t h Comma nds Se t wi t h 64 c ol or s i n Pi c t ur e #00, #01, #02, & #03 Tr a ns f e r ( #14) ( hol ds SGB Bor de r c ol or s ) by DP Page 133 5. Appendix A Game BoyTM CPU Manual 5. Appendix A 5.1. Emulator Notes Not e s f or ge t t i ng a s s e mbl y l a ngua ge pr ogr a ms t ha t r un on a n e mul a t or t o r un on a r e a l GB ( by kOOPa , 2- J a n- 98) 1. Emul a t or s t e nd t o s e t a l l of RAM t o $00 on powe r up. Re a l GBs do NOT i ni t i a l i z e RAM on powe r up. RAM i s f i l l e d wi t h r a ndom va l ue s on powe r up. You mus t c l e a r i t your s e l f i f you wi s h i t t o be s e t t o s ome known va l ue . 2. The r e a l ha r dwa r e c oul d c a r e l e s s a bout t he ROM c he c ks um ( $14e , $14f ) but t he c ompl e me nt c he c k ( $14d) MUST be c or r e c t or pr ogr a ms wi l l " l oc k up" a f t e r s c r ol l i ng t he Ni nt e ndo l ogo. Us e RGBFI X - V i n t he RGBDS de ve l opme nt s ys t e m t o s e t t he c he c ks um a nd t he c ompl e me nt byt e a f t e r e a c h s our c e c ode c ompi l e . I t doe s n' t ma t t e r whe t he r you pr ogr a m i n C or a s s e mbl y, t hi s pr ogr a m wi l l f i x i t . 3. The Ni nt e ndo s c r ol l i ng gr a phi c f r om $104 - $133 mus t be a c c ur a t e . I f one byt e of i t i s c ha nge d t he n your pr ogr a ms wi l l " l oc k up" a f t e r s c r ol l i ng t hi s gr a phi c l ogo. 4. Whe n t he LCD di s pl a y i s of f ( bi t 7 of $f f 40 s e t t o 0) you c a n wr i t e t o vi de o me mor y a t a ny t i me wi t h out r e s t r i c t i ons . Whi l e i t i s on you c a n onl y wr i t e t o vi de o me mor y dur i ng H- Bl a nk a nd V- Bl a nk. Code s i mi l a r t o t hi s wi l l wor k: ; Wr i t e B t o Vi de o RAM l oc a t i on HL Wr i t e VRAM: di ; t ur n of f i nt e r r upt s Page 134 V 1.01 Game BoyTM CPU Manual 5.1. Emulator Notes Wr i t e 1: l dh a , [ $41] ; r e a d $f f 41 a nd 2 j r nz , Wr i t e 1 l d [ hl ] , b ei ; t ur n on i nt e r r upt s r et The r e s houl d not nz " a nd wr i t e t o 64 CPU c l oc k c yc l vi de o me mor y ( not c omma nd. The " di " a nd " e i i f you a r e us i ng i nt e r r upt s . 5. The bi t be t wa y be ma ny i ns t r uc t i ons be t we e n t he " j r me mor y " l d [ hl ] , b" . A wor s t c a s e of e s a r e a va i l a bl e t o a c c e s s ma i n OAM! ) f ol l owi ng t he " j r nz " " c omma nds a bove a r e onl y r e qui r e d Se r i a l , Ti me r , or Hi - 2- Lo LCD di s pl a y i s on 7 of $f f 40 s e t t o ur ne d of f you mus t of doi ng t hi s i s t a t r e s e t ( bi t 7 of $f f 40 s e t t o 1) . Be f or e t he LCD di s pl a y c a n wa i t f or V- Bl a nk. One popul a r he f ol l owi ng: ; Tur n of f LCD di s pl a y LCDOf f : l dh a , [ $44h] ; $f f 44=LCDC Y- Pos c p $90 ; $90 a nd bi gge r = i n VBL j r nz , LCDOf f ; Loop unt i l = $90 xor a l dh [ $41] , a ; Tur n of f LCD di s pl a y r et Not e you s houl d di s a bl e i nt e r r upt s , i f t he y a r e e na bl e d, be f or e e xe c ut i ng t he a bove c ode or e l s e t he t e s t of $f f 44 c oul d pr ove i nva l i d. Tur ni ng t he LCD di s pl a y on c a n be done a t a ny t i me . by DP Page 135 5.1. Emulator Notes Game BoyTM CPU Manual 6. I f you a r e us i ng s pr i t e s t he n you s houl d not us e t he f ol l owi ng c omma nds whe n t he i r r e gi s t e r c ont e nt s a r e i n t he r a nge $f e 00- $f e f f . i nc i nc i nc de c de c de c bc de hl bc de hl I f you don' t f ol l ow t hi s r ul e , s pr i t e t r a s h i n t he f or m of s pr i t e " bl i nk" wi l l r a ndoml y a f f e c t your s pr i t e s . 7. Nor ma l l y you s houl d onl y ma ke c ha nge s t o Spr i t e RAM dur i ng V- Bl a nk unl e s s you a r e a n e xpe r t a nd know e xa c t l y wha t you a r e doi ng. The c ommon wa y t o do t hi s i s t o us e t he GB DMA r e gi s t e r ( $f f 46) t o do a f a s t c opy f r om your s pr i t e t a bl e i n RAM t o $f E00- $f e 9f . A. You ne e d a s pr i t e t a bl e i n RAM wi t h a s t a r t i ng a ddr e s s of $XX00 a nd wi t h a l e ngt h of 160 ( $a 0) . Ma ny of t e n us e $c 000- $c 09f f or t hi s pur pos e but a nywhe r e i n RAM s t a r t i ng wi t h $XX00 i s f i ne . B. You ne e d t o c r e a t e a VBl a nk i nt e r r upt r out i ne t ha t c ont a i ns t he DMA c omma nd, f ol l owe d by a s hor t de l a y t o a l l ow t he DMA t o c ompl e t e , a nd c opy t hi s r out i ne t o hi gh RAM ( $f f 00- $f f f e ) . The DMA c omma nd WI LL NOT WORK i n ROM or l ow RAM be c a us e t he s e a r e di s a bl e d dur i ng DMA. C. Af t e r c opyi ng t hi s r out i ne t o hi gh RAM you t he n ne e d t o e na bl e t he VBLANK i nt e r r upt a nd t he n e na bl e i nt e r r upt s . Page 136 V 1.01 Game BoyTM CPU Manual 5.2. Typical timing diagram 5.2. Typical timing diagram ( Ba s e d o n a n e ma i l f r o m Ph i l i p p e Po u l i q u e n ) The gr a phi c s hows a wr i t e f ol l owe d by t wo r e a ds ( me a s ur e d on a r e gul a r Ga me Boy) : _________ CLK: _ _ _ _ / \ _________/ _________________ _________ _________ \ _________/ ___ \ _________/ / RD: _ _ _ _ _ _ _ / \ __________________________________________ ______________ _____________________________________________ / WR: \ _______/ __________ _____ _____ ___ / CS: \ _____________/ \ _____________/ \ _____________/ Adr : _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Bus : _ _ _ _ _ _ _ X_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ X_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ X_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ X_ Dt a : _________ _________ _________ Bus : - - - - - - - - - - - - - - <_ _ _ _ _ _ _ _ _ >- - - - - - - - - <_ _ _ _ _ _ _ _ _ >- - - - - - - - - <_ _ _ _ _ _ _ _ _ >- - ^ ^ ^ ^ ^ ^^ Ti me : a b c d e fg Ti mi ng: a : 0ns t hi s i s t he poi nt a t whi c h CLK goe s hi gh, f r om whi c h t he ot he r t i me s a r e me a s ur e d. b: 140ns poi nt a t whi c h / RD wi l l r i s e be f or e a wr i t e . Thi s i s a l s o t he poi nt a t whi c h t he a ddr e s s on t he a ddr e s s bus c ha nge s . c : 240ns poi nt a t whi c h / CS goe s l ow ( t hi s i s pi n 5 of t he c onne c t or ) d: 480ns poi nt a t whi c h CLK goe s l ow. Thi s i s a l s o t he poi nt a t whi c h / WR goe s l ow f or a wr i t e a nd t he Ga me Boy s t a r t s dr i vi ng t he da t a bus . e : 840ns by DP Page 137 5.2. Typical timing diagram poi nt a t f : 960ns poi nt a t a t whi c h dr i vi ng t g: 990ns poi nt a t CLK goe s Game BoyTM CPU Manual whi c h / WR goe s hi gh a f t e r a wr i t e . whi c h CLK goe s hi gh. Thi s i s a l s o t he poi nt / CS goe s hi gh a nd t he Ga me Boy s t ops he da t a bus . whi c h / RD goe s l ow f or a r e a d ( 30ns a f t e r hi gh) . ( Me a s ur e me nt s r ounde t t o t he ne a r e s t 10ns ) " Some de vi c e s ( l i ke di s k c ont r ol l e r c hi ps ) r e qui r e t ha t t he a ddr e s s be va l i d be f or e you a c c e s s t he m ( wi t h a r e a d or wr i t e pul s e ) . The pr obl e m i s t ha t / RD doe s n' t go hi gh be t we e n c ons e c ut i ve r e a ds , a nd t he s e c ond pr obl e m i s t ha t whe n / RD t r a ns i t i ons , i t doe s s o a t t he s a me t i me ( or be f or e ) t he a ddr e s s c ha nge s . The r e s ul t i s t ha t f r om t he de vi c e ' s pe r s pe c t i ve , a n a ddr e s s t r a ns i t i on l ooks l i ke a bunc h of r e a ds f r om r a ndom a ddr e s s e s . The s e s pur i ous r e a ds a r e ok f or RAM a nd ROM, but c a n r e a l l y s c r e w t hi ngs up f or de vi c e s wi t h i nt e r na l buf f e r s , be c a us e t he y ma y be f ool e d i nt o t hi nki ng t ha t you ha ve r e a d mor e da t a f r om t he m t ha n you a c t ua l l y ha ve . The wa y t o s ol ve t hi s pr obl e m i s t o f e e d CLK a nd / RD t hr ough a OR ga t e . The downs i de i s t ha t i t ma ke s your a l l owa bl e r e a d t i me s hor t e r . Page 138 V 1.01 COMMAND INDEX Command ADC A, n ADD A, n ADD HL, n ADD SP, n AND n BI T b, r CALL c c , nn CALL nn CCF CPL CP n DAA DEC n DEC nn DI EI HALT I NC n I NC nn J P ( HL) J P c c , nn J P nn J R cc, n JR n LD ( C) , A LD ( HL+) , A by DP Page 81 80 90 91 84 108 115 114 96 95 87 95 89 93 98 98 97 88 92 112 111 111 113 112 70 74 Command LD ( HL- ) , A LD ( HLD) , A LD ( HLI ) , A LD ( nn) , SP LD A, ( C) LD A, ( HL+) LD A, ( HL- ) LD A, ( HLD) LD A, ( HLI ) LD A, n LDD ( HL) , A LDD A, ( HL) LDH ( n) , A LDH A, ( n) LDI ( HL) , A LDI A, ( HL) LD n, A LD n, nn LD nn, n LD r 1, r 2 LD SP, HL NOP OR n POP nn PUSH nn RES b, r Game BoyTM CPU Manual Page 72 72 74 78 70 73 71 71 73 68 72 71 75 75 74 73 69 76 65 66 76 97 85 79 78 110 Command RET RET c c RETI RLA RLCA RLC n RL n RRA RRCA RRC n RR n RST n SBC A, n SCF SET b, r SLA n SRA n SRL n STOP SUB n SWAP n XOR n LD HL, SP+n LDHL SP, n Page 117 117 118 99 99 101 102 100 100 103 104 116 83 96 109 105 106 107 97 82 94 86 77 77 Page 139
Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.3 Linearized : No XMP Toolkit : XMP Core 5.4.0 Bookmarks Page Index : 101 Bookmarks Uuid : 8EC0947E-64A3-4213-8BC9-2DA6AC048E26 Page Count : 139 Title : GameBoy CPU Manual Author : DP & Others Subject : A complete programming manual for GB's Producer : Mac OS X 10.11.1 Quartz PDFContext Creator : gbcpuman.sdw Create Date : 2016:01:11 17:32:59Z Modify Date : 2016:01:11 17:32:59ZEXIF Metadata provided by EXIF.tools