User manual
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| Document ID | 2746543 |
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| Document Description | User manual |
| Short Term Confidential | No |
| Permanent Confidential | No |
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| Document Type | User Manual |
| Display Format | Adobe Acrobat PDF - pdf |
| Filesize | 58.65kB (733166 bits) |
| Date Submitted | 2015-09-14 00:00:00 |
| Date Available | 2015-09-14 00:00:00 |
| Creation Date | 2015-08-13 09:49:23 |
| Producing Software | Acrobat Distiller 11.0 (Windows) |
| Document Lastmod | 2015-09-11 14:26:06 |
| Document Title | Microsoft Word - PHORUS-CAP-TSD-0010(2L)-Caprica2L-Design-Guide.docx |
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| Document Author: | cluo |
Caprica 2L Play-FiTM Wireless Module Design Guide PHORUS-CAP-TSD- 0010 (2L) April 20, 2015 Revision 1 DTS Confidential Revision 1 Page 1 of 24 Document Change Summary Date: 4/20/2015 DTS Confidential Revision: X1 Changes: Initial Release Revision 1 Author: AK Approver: MC Page 2 of 24 Contents 1 Document Scope .............................................................................................................................................................. 5 2 Definitions .......................................................................................................................................................................... 5 2.1 Host ............................................................................................................................................................................. 5 2.2 Play-Fi Wireless Module .......................................................................................................................................... 5 3 Applicable Documents ..................................................................................................................................................... 5 3.1 Reference Design Documents ................................................................................................................................ 5 4 Features ............................................................................................................................................................................. 6 4.1 800MHz ARM-based Processor ............................................................................................................................. 6 4.2 wMMX2 DSP Support .............................................................................................................................................. 6 4.3 802.11a/b/g/n 1x1 Wi-Fi ........................................................................................................................................... 6 4.3.1 20MHz and 40MHz Channels.......................................................................................................................... 6 4.3.2 Diversity Antenna Support ............................................................................................................................... 6 4.4 128MB DDR3 Memory ............................................................................................................................................. 6 4.5 128MB SLC Flash Memory ..................................................................................................................................... 6 4.6 I2C ............................................................................................................................................................................... 6 4.7 I2S Output .................................................................................................................................................................. 7 4.8 I2S Input ..................................................................................................................................................................... 7 4.9 USB 2.0HS OTG ....................................................................................................................................................... 7 4.10 Wi-Fi LED Control ................................................................................................................................................... 7 5 Radio Frequency Performance ...................................................................................................................................... 7 5.1 RF Interface ............................................................................................................................................................... 7 5.2 Antenna Placement .................................................................................................................................................. 7 6 Caprica Module Electrical Interface Definition ............................................................................................................. 8 6.1 Caprica Module Pin Definitions 80-pin Connector ............................................................................................... 8 6.2 Pin Description, Electrical Characteristics ........................................................................................................... 10 6.3 Interface Connector Information, Mechanical ..................................................................................................... 12 6.3.1 80-pin Board-to-Board Connector ................................................................................................................. 12 6.3.2 Wired Ethernet Connectivity .......................................................................................................................... 12 6.3.3 Apple Authentication Coprocessor Integration............................................................................................ 14 7 Electrical Characteristics ............................................................................................................................................... 14 7.1 I2S Output Format Reference Diagram ............................................................................................................... 14 7.2 Operating Voltages ................................................................................................................................................. 14 DTS Confidential Revision 1 Page 3 of 24 7.3 Power Consumption ............................................................................................................................................... 15 7.4 Power Up Sequencing............................................................................................................................................ 15 7.4.1 Power up timing specifications ...................................................................................................................... 15 7.5 Power Down Sequencing ...................................................................................................................................... 16 7.5.1 Power down timing specifications ................................................................................................................. 16 8 Caprica2L Software Architecture (for reference only) ............................................................................................... 17 8.1 Base Linux OS ........................................................................................................................................................ 17 8.2 System Update ........................................................................................................................................................ 17 9 Host Control Communication........................................................................................................................................ 18 10 Mechanical Interfaces .................................................................................................................................................. 18 11 Mechanical Outline ....................................................................................................................................................... 19 12 Certification Requirements ......................................................................................................................................... 21 12.1 User Interface ........................................................................................................................................................ 21 12.1.1 User Input ....................................................................................................................................................... 21 12.1.2 Play-Fi to other System Controls ................................................................................................................ 22 12.1.3 Visual Feedback ............................................................................................................................................ 22 12.1.4 Audible Feedback.......................................................................................................................................... 23 12.2 Wi-Fi Performance ................................................................................................................................................ 23 12.3 Branding Requirements ....................................................................................................................................... 23 12.3.1 Product Industrial Design ............................................................................................................................. 23 12.3.2 Product Packaging ........................................................................................................................................ 23 12.3.3 Module Identification ..................................................................................................................................... 24 13 MCU Controlled Audio Feedbacks ............................................................................................................................ 24 DTS Confidential Revision 1 Page 4 of 24 1 Document Scope This document describes interface requirements for the second-generation Play-Fi Wireless Module, also known as Caprica2L. Caprica2L is a WiFi audio module designed for wireless, multi-room audio distribution. Caprica2L streams with 16 bit resolution and 44.1 KHz sampling rate. The module may be utilized in speakers, stand-alone receivers or incorporated into other products like AVRs. This document provides guidelines for the inclusion of this module into such products. 2 Definitions 2.1 Host Host refers to the off board MCU that processes user interactions and controls audio processing. 2.2 Play-Fi Wireless Module Play-Fi Wireless Module refers to the Caprica2L module with integrated Wi-Fi radio. 3 Applicable Documents 3.1 Reference Design Documents The following documents form a part of this specification. Each utilized and referenced document shall be the most recent released issue. Phorus Reference Documentation PHORUS-CAP-TSD-0004-Caprica-Host-Communication-Protocol BTB Connector datasheet (88079-0800A1_88079-xxxxAx-aces_rev-U.pdf) BTB Connector Specification (88079_SPEC-88069-xxxx_rev-L.pdf) Play-Fi Module Outline and Mounting Drawings (Caprica_2L_PCB_RevA.DWG, Caprica_2L_PCB_RevA.pdf) 3D design file, outline and mounting (Caprica_2L_PCB_RevA.stp) DTS Confidential Revision 1 Page 5 of 24 4 Features BT Disable The Caprica2L Play-Fi Wireless module is a programmable, high-performance, encapsulated design that enables manufacturers to wirelessly distribute audio to multiple devices. Sources can include PlayFi Applications, Play-Fi Drivers, or other sources of a manufacturer's choice, such as Bluetooth, via a I2S input. The design supports a number of interfaces that enable easy integration of the module to traditional consumer electronic designs. Caprica2L features include: 4.1 800MHz ARM-based Processor Marvell PXA166 ARM v6/v7-compatible core: Up to 1848 DMIPS 16K/16K L1 I/D Caches 64K L2 Cache 5-8 Stage Variable Pipeline Retire up to 2 Instructions per Cycle Out-of-Order Execution Three-level Branch Prediction 4.2 wMMX2 DSP Support Up to 1600 MMACS per second. Supports complex Digital Signal Processing with little CPU overhead. Audio CODECs including MP3, WMA and AAC utilize the wMMX2 engine. 4.3 802.11a/b/g/n 1x1 Wi-Fi Dual-band design with 2.4GHz and 5GHz support. Supports transmit modes up to 150mbps. 4.3.1 20MHz and 40MHz Channels Supported in both 2.4 and 5 GHz bands 4.3.2 Diversity Antenna Support Caprica2L supports two antenna connections in a diversity antenna configuration (using orthogonal mounting). 4.4 128MB DDR3 Memory High-performance memory for maximum processor and network performance. 4.5 128MB SLC Flash Memory 4.6 I2C The I2C Interface is the port which Caprica2L communicates with the external system. The communication protocol "Play-Fi Host Communication Protocol" is described in a separate document (PHORUS-CAP- TSD-0004-Caprica-Host-Communication-Protocol). The Caprica2L Module is configured as a I2C slave with address 0x52. DTS Confidential Revision 1 Page 6 of 24 4.7 I2S Output Caprica2L outputs digital audio via an I2S port. Caprica acts as the master device. The format is MSB Left Justified. LRCLK- 44.1 KHz BITCLK- 2.8224 MHz (64 * Fs) Data – 16 bits of data followed by 16 bits forced 0 on each rising/falling edge of LRCLK This format cannot be changed. 4.8 I2S Input Caprica2L can accept auxiliary inputs via I2S. Caprica is the slave here. The format is MSB Left Justified. LRCLK- 8KHz, 16KHz, 22.05KHz, 32KHz, 44.1KHz, 48KHz, 96Khz. (PIN 67) BITCLK- 2.8224 MHz (64 * Fs) (PIN 65) Data – 16 bits of data followed by 16 bits forced 0 on each rising/falling edge of LRCLK This format cannot be changed. (PIN 69) 4.9 USB 2.0HS OTG Configured as a Host in standard configurations. All Play-Fi devices require a USB Host is required for Factory USB updates. 4.10 Wi-Fi LED Control Caprica2L controls a consumer-facing LED that gives indication as to Wi-Fi status. 5 Radio Frequency Performance 5.1 RF Interface Wi-Fi RF connectivity is provided by 2 dual-band antennas, connected via miniature RF cables. These antennas are tuned for both 2.4GHz and 5GHz operation. 5.2 Antenna Placement For optimal RF coverage, antennas should be mounted orthogonally to each other. Each antenna should be at least 35mm away from any other metal object in 3D space. The antennas should be mounted as high on the vertical axis as possible while maintaining 35mm distance from other metal objects. The farther apart the antennas are mounted from each other the better, however, the feed line from antenna to Wi-Fi Module connection should not exceed 150mm to minimize RF losses through wire. Figure 5.2.1 DTS Confidential Revision 1 Page 7 of 24 6 Caprica Module Electrical Interface Definition 6.1 Caprica Module Pin Definitions 80-pin Connector Net BTB Conn. Name DTS Confidential Function V1_1 CAPRICA 2L Power (3.3V) V5_2 Power (1.8V) V1_1 Power (3.3V) V5_2 Power (1.8V) V1_1 Power (3.3V) V2_2 Power (1.8V) V3_3 Power (1.1V) V2_2 Power (1.8V) V3_3 Power (1.1V) 10 3V3_RTC RTC (3.3V) 11 V3_3 Power (1.1V) 12 GND 13 DC_5V Power (5V) 14 USB_OTG_ID Reserved 15 GND 16 GND 17 TDI JTAG 18 USB_OTG_DM USB_OTG 19 TMS JTAG 20 USB_OTG_DP USB_OTG 21 TCK JTAG 22 GND 23 TDO JTAG 24 USB_HOST_DM Reserved 25 TRST JTAG 26 USB_HOST_DP Reserved 27 UART3_TXD Reserved 28 GND 29 UART3_RXD Reserved 30 RJ_TX+ Reserved 31 UART3_CTS Reserved 32 RJ_TX- Reserved 33 UART3_RTS Reserved 34 RJ_RX+ Reserved 35 SCL I2C 36 RJ_RX- Reserved 37 SDA I2C Revision 1 Page 8 of 24 DTS Confidential 38 39 40 GND GND LED[0] Reserved 41 MMC1_CLK Reserved 42 LED[1] Reserved 43 MMC1_CMD/XD_CLE Reserved 44 GND 45 MMC1_D0/XD_D3 Reserved 46 SCL1 I2C1 47 MMC1_D1/XD_D4 Reserved 48 SDA1 I2C1 49 MMC1_D2/XD_nRE Reserved 50 GND 51 MMC1_D3/XD_nCE Reserved 52 SSP2_CLK Reserved 53 GND 54 SSP2_FRM Reserved 55 I2S_MCLK I2S 56 SSP2_TXD Reserved 57 I2S_BCLK I2S 58 SSP2_RXD Reserved 59 I2S_LRCK I2S 60 GND 61 I2S_SDOUT 62 GND 63 I2S_SDIN I2S I2S 64 GPIO0 Reserved 65 I2S1_BCLK/AC97_BCLK I2S1 66 GPIO1 Apple Auth 67 I2S1_LRCK/AC97_DIN0 I2S1 68 GPIO2 Reserved 69 I2S1_SDOUT/AC97_DOUT I2S1 70 GPIO3 Reserved 71 GND 72 GPIO4 Reserved 73 RSR_IN# Reserved 74 GPIO5 Reserved 75 WIFI_LED_G WIFI_LED 76 GPIO6 Reserved 77 INT_TO_MCU INT 78 GPIO7 Reserved 79 I2C_ADDR ADDR 80 EXT_WAKEUP Reserved Revision 1 Page 9 of 24 6.2 Pin Description, Electrical Characteristics Net/ Signal (s) Type I/O Descriptions of CAPRICA Level (V) Description POWER Power supply input: 5V; AVDD5_USB; USB VBUS, analog input for monitoring USB type A connector power. DC_5 V1_1 3.3 Power supply input: 3.3V V5_2 1.8 Power supply input: 1.8V V2_2 1.8 Power supply input: 1.8V_DDR V3_3 1.1 Power supply input: 1.1V Power On Last GND Ground for power, signal and shielding. RTC (Reserved function) 3V3_RT 3.3 Real Time Clock (RTC) power supply input; 3.3V SDIO (Reserved Function) MMC1_D3/XD_nCE I/O 3.3 Reserved MMC1_D2/XD_nRE I/O 3.3 Reserved MMC1_D1/XD_D4 I/O 3.3 Reserved MMC1_D0/XD_D3 I/O 3.3 Reserved MMC1_CLK 3.3 Reserved MMC1_CMD/XD_CLE I/O 3.3 Reserved SPI (Reserved Function) SSP2_RXD DTS Confidential 3.3 Reserved Revision 1 Page 10 of 24 SSP2_TXD 3.3 Reserved SSP2_CLK 3.3 Reserved SSP2_FRM 3.3 Reserved JTAG (Optional) TDI 3.3 JTAG data input Required TMS 3.3 JTAG mode select Required TCK 3.3 JTAG clock Required TDO 3.3 JTAG data output Required TRS 3.3 JTAG reset Required UART UART3_RXD 3.3 Reserved UART3_TXD 3.3 Reserved UART3_RTS 3.3 Reserved UART3_CTS 3.3 Reserved I2C SC 3.3 I2C_SCL; Connect to MCU. Caprica is slave device. SDA I/O 3.3 I2C_SDA; Connect to MCU. Caprica is slave device. SCL I/O 3.3 I2C_SCL; Airplay Certification SDA1 I/O 3.3 I2C_SDA; Airplay Certification AUDIO I2S_MCLK 3.3 MCLK, audio master clock output from CAPRICA I2S_LRCK 3.3 LRCK, audio word clock output from CAPRICA. 44.1KHz I2S_BCLK 3.3 BCLK, audio bit clock output from CAPRICA. 2.82 MHz I2S_SDI 3.3 DATA, audio data input to CAPRICA. I2S_SDOUT 3.3 DATA, audio data output from CAPRICA. I2S1_BCLK/AC97_BC 3.3 BCLK, BT audio bit clock input to CAPRICA. BT Disable I2S1_LRCK/AC97_DI 3.3 LRCK, BT audio word clock input to CAPRICA.BT Disable I2S1_SDOUT/AC97_D OUT 3.3 DATA, BT audio data input to CAPRICA. BT Disable RJ_RX -- Reserved RJ_RX -- Reserved RJ_TX -- Reserved RJ_TX -- Reserved LED[0] 3.3 Reserved LED[1] 3.3 Reserved ETHERNET (RESERVED - DO NOT USE) USB USB_OTG_DM I/O -- USB OTG data signal. As host mode only. USB_OTG_DP I/O -- USB OTG data signal. As host mode only. DTS Confidential Revision 1 Page 11 of 24 USB_OTG_ID 3.3 USB OTG ID signal. Leave open. USB HOST (RESERVED - DO NOT USE) USB_HOST_DM I/O -- Reserved USB_HOST_DP I/O -- Reserved CONTROL INT_TO_MCU 3.3 Interrupt signal from CAPRICA (module) to MCU (system). I2C_ADDR 3.3 I2C address pin. Leave open. 3.3 Reserved WIFI_LED_G 3.3 WIFI indicate LED. EXT_WAKEUP 3.3 External wakeup pin. RST_IN GPIO GPIO I/O 3.3 Reserved GPIO I/O 3.3 Airplay Certification- Reset GPIO I/O 3.3 Reserved GPIO I/O 3.3 Reserved GPIO I/O 3.3 Reserved GPIO I/O 3.3 Reserved GPIO I/O 3.3 Reserved GPIO I/O 3.3 Reserved 6.3 Interface Connector Information, Mechanical 6.3.1 80-pin Board-to-Board Connector The Caprica2L utilizes a 0.5mm BTB SMT Female type, P/N: 8396-8041 (See 880790800A1_88079-xxxxAx-aces_rev-U.pdf) for Board to Board (BTB) connection. 6.3.2 Wired Ethernet Connectivity The Caprica2L has the capability to be connected to a network via Ethernet cable. To implement this functionality, USB to Ethernet part ASIX AX88772C and a USB HUB device are required. USB HUB Device should be a 4-port device. Use port configuration shown in image below. DTS Confidential Revision 1 Page 12 of 24 Caprica 2L Module (GL850G) USB HUB DEVICE Port 3 Optional Port 1 Port 2 USB to ETHERNET (ASIX AX88772C) PROCESSOR DTS Confidential USB to Ethernet (ASIX AS88772C) USB Type A Receptacle RJ45 Receptacle Revision 1 Page 13 of 24 6.3.3 Apple Authentication Coprocessor Integration Caprica2L supports integration of Apple Authentication Coprocessor. This is required for builds which wish to certify Apple AirPlay. The interface between Caprica2L and Apple Coprocessor requires three connections, 2 connections for I2C and one for Reset. The Caprica2L pins designated for this are pin 46 (SCL1), pin 48 (SDA1), and pin 66 (GPIO1) for reset. The GPIO1 connection is a jumper while SCL1 and SDA1 require external pullup resistors. Apple MFi Accessory Interface Specification recommends using 2.2k Ohm resistors for pullup to Vcc used to power Coprocessor. 7 Electrical Characteristics This section describes the electrical characteristics of the module including power consumption power sequencing, and timing diagrams 7.1 I2S Output Format Reference Diagram This diagram displays the Left Justified (MSB) output format of Caprica2L I2S bus. 7.2 Operating Voltages Symbol DC_5V (5V) V1_1 (3.3V) V2_2 (1.8V_DDR) V5_2 (1.8V) V3_3 (1.1V) DTS Confidential Min 4.75 2.97 1.7 1.7 1.05 Typical 5.0 3.3 1.8 1.8 1.10 Revision 1 Max 5.25 3.6 1.9 1.9 1.155 Units Page 14 of 24 7.3 Power Consumption Symbol Voltages Test Point V3 1.1V R219 Test Mode Normal (connect AP) Play Music 1K Tone Avg. 409.8 412.8 V5 1.8V R218 Max. 477.1 439 Avg. 5.5 5.6 V2 1.8V R217 Max. 5.8 5.8 Avg. 199.6 201.2 Average Power 0.9698 W Max Power 1.2675 W In Rush 2.5350 W Max. 386.7 254 V1 3.3V R215 Avg. 13.3 15.1 Max. 16.9 14.9 5V 5V R216 Avg. Max. 116.4 140.5 117 131 Unit : mA 7.4 Power Up Sequencing 5V 80% 3.3V 1.8V DDR t1 80% 1.8V t3 t2 1.1V 7.4.1 Power up timing specifications Symbol t1 t2 t3 DTS Confidential Min Unit ms ms ms Revision 1 Page 15 of 24 7.5 Power Down Sequencing 5V 3.3V 1.8V DDR 1.8V 1.1V t1 7.5.1 Power down timing specifications Symbol t1 DTS Confidential Max 10 Unit ms Revision 1 Page 16 of 24 8 Caprica2L Software Architecture (for reference only) The Caprica2L Software Architecture allows for Over the Air (OTA) reprogramming as well as factory updates using a built in USB port. 8.1 Base Linux OS The Base Linux OS (“OS”) includes the following sub-components: Power management Network connectivity Dual-Band WiFi support Notes: Supports the WiFi standards 802.11a/b/g/n protocol Supports all popular non-enterprise WiFi security scheme: WEP (64 and 128bit), WPA PreShared Key (WPA-PSK, TKIP + AES), and WPA2-PSK TKIP + AES Supports WiFi Protected Setup (WPS) with Push Button Configuration (PBC) option 8.2 System Update System update monitor automatically checks for software update availability System update download and installation Update via Network (OTA) Factory Update via USB DTS Confidential Revision 1 Page 17 of 24 9 Host Control Communication The following describes initialization between Microprocessor (“Aspen”) inside Caprica2L Module and Microcontroller. Please refer to PHORUS-CAP-TSD-0004-Caprica-Host-Communication-Protocol. System Initialization Sequence MCU Caprica Power-on WI-FI_STATUS INIITIALIZING (0x12) WI-FI_STATUS READY GET_POWER_DOWN_DELAY_TIME (0x13) GET_POWER_DOWN_DELAY_TIME (0x14) SET_VOLUME_VALUE (0x08) RET_AUX_STATE (0x30) REPORT_BT_STATE (0x06) BT Disable REPORT_MCU_READY_DSP_PARAMETER (0x16) 10 Mechanical Interfaces The Caprica2L is physically mounted to the host with the 80-pin connector and 3 mounting fasteners. The dimensions for these mounting points, as well as general keep out areas are detailed in Play-Fi Module Outline and Mounting Drawings (Caprica_2L_PCB_RevA.DWG, Caprica_2L_PCB_RevA.pdf). 3D model information is included in both STEP format in Caprica_2L_PCB_RevA.stp DTS Confidential Revision 1 Page 18 of 24 11 Mechanical Outline All measurements in millimeters DTS Confidential Revision 1 Page 19 of 24 DTS Confidential Revision 1 Page 20 of 24 12 Certification Requirements 12.1 User Interface 12.1.1 User Input The device shall have the following user inputs: Required Implementation Requirement Feature Confirm 30 volume states can be accessed via all user interface Volume Up methods Volume Down Mute1 Wi-Fi Set-Up Factory Reset Power USB Type A Plug Confirm 30 volume states can be accessed via all user interface methods. Must return to the “FF” as a mute state. If a separate WiFi set up button is used (as opposed to using Factory Reset) the button must support WiFi Setup and WPS modes (WPS mode requires the Wi-Fi setup button. A single user accessible button shall provide the factory reset feature. This shall return all other system functions to the factory new state, as well as cycling power. Provides a user command to turn the unit from off state to on state and vice versa. Type A plug is used for Caprica Firmware update, using a USB memory “stick” type device Additional Notes These apply to hardware and application interfaces An indicator (LED) must be used to reflect WiFi state. Can provide WiFi reset functionality if required. A mute button is option on the industrial design. If it is not included the simultaneous press of volume up and volume down will operate the mute function. DTS Confidential Revision 1 Page 21 of 24 12.1.2 Play-Fi to other System Controls Play-Fi module to system controls: Implementation Requirement Device restarts as expected after USB update of Caprica The unit cycles power in the same manner as a user commanded power cycle. Criteria Re-Start after USB update Reboot all Notes 12.1.3 Visual Feedback BT Disable The device shall have visual indicators for Wi-Fi Set-Up, Bluetooth Set-Up (if included), and Mute. A WiFi light shall indicate the following states: Required Implementation Notes Feature Requirement Pulsing Blink Wi-Fi Set-up Ramp from Off to On for 750 msec, mode Ramp On to Off for 750 msec WPS Mode Double Blink On for 100 msec, Off for 100 msec, On for 100 msec, Off for 750, repeat Connected, Searching Connected Powering Down Blinking 250 msec on, 250 msec off Solid (LED on) Blinking There shall be a visual way the user can recognize the device is in a Mute state: Required Feature Mute Visual Feedback DTS Confidential Implementation Requirement Provide a visual feedback to user indicating mute state Revision 1 Notes Result Page 22 of 24 12.1.4 Audible Feedback The system shall provide the following audible feedback to the user as noted: Implementation Notes Required Feature Requirement Wi-Fi set-up mode is active WPS mode is active Each feature requires WPS set-up mode is no longer unique audible active feedback which can Reset initiated be a combination of Factory reset initiated audio cues 12.2 Wi-Fi Performance The Play-Fi module requires a minimum level of Wi-Fi performance. Implementation Functional Criteria Notes Requirement Validates UDP WiFi Performance at -72 dBm performance, transfer RSSI 90% of 1 second samples at 5.5 Mbps 12.3 Branding Requirements 12.3.1 Product Industrial Design The Play-Fi logo shall be visible to the end consumer. These requirements are documented in the Play-Fi Branding Guidelines Criteria Implementation Requirement Notes Play-Fi Logo meets requirements 12.3.2 Product Packaging BT Disable The Play-Fi logo shall be printed on the product's packaging in close proximity to other wireless certification logos (i.e. Bluetooth, Wi-Fi, etc.). If the packaging is full color then the full color version of the logo shall be used, otherwise the monochromatic version shall be used. Packaging requirements: Criteria Inspection Results Notes Play-Fi is Logo properly placed Play-Fi is Logo properly sized Play-Fi is Logo colored properly DTS Confidential Revision 1 Page 23 of 24 12.3.3 Module Identification The Wi-Fi MAC ID of Play-Fi Module shall be displayed somewhere on the product. Criteria Implementation Requirement Notes Wi-Fi Mac ID is displayed on product MAC ID displayed on product matches MAC ID of Play-Fi module inside product. 13 MCU Controlled Audio Feedbacks Caprica is not involved in producing audio feedbacks for any of below mentioned cases. Power ON Bluetooth connect/disconnect BT Disable Factory reset MCU sends commands to the DSP to render stored sounds in these 3 cases. When the device is put in WPS/Access point modes, MCU informs the Caprica of the event. Caprica then informs MCU to send commands to the DSP to render adequate sound for the event. DTS Confidential Revision 1 Page 24 of 24 FCC Warning Information to user Any changes or modifications not expressly approved by the party responsible for compliance could void your authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: —Reorient or relocate the receiving antenna. —Increase the separation between the equipment and receiver. —Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. —Consult the dealer or an experienced radio/TV technician for help. Labelling requirements This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference and (2) this device must accept any interference received, including interference that may cause undesired operation. RF Radiation Exposure Statement: 1. This Transmitter must not be colocated or operating in conjunction with any other antenna or transmitter. 2. This equipment complies with FCC RF radiation exposure limits set forth for an uncontrolled environment. This equipment should be installed and operated with a minimum distance of 20 centimeters between the radiator and your body. IC Warning This device complies with Industry Canada license‐exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. *The device for the band 5150‐5250 MHz is only for indoor use. OEM Statement: Labelling Requirements for the Host device The host device shall be properly labelled to identify the modules within the host device. The certification label of the module shall be clearly visible at all times when installed in the host device, otherwise the host device must be labelled to display the FCC ID and IC of the module, preceded by the words "Contains transmitter module", or the word "Contains", or similar wording expressing the same meaning, as follows: Contains FCC ID: 2AAWQ‐CAPRICA2L Contains IC: 11138A‐CAPRICA2L This module is intended for OEM integrator. The OEM integrator is still responsible for the FCC compliance requirement of the end product which integrates this module. 20cm minimum distance has to be able to be maintained between the antenna and the users for the host this module is integrated into. Under such configuration, the FCC radiation exposure limits set forth for an population/uncontrolled environment can be satisfied.
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