Qisda GW52 MOD-SM QIS BT/WLAN CWM-02B-BT2-SP D5 User Manual

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 Product System (PS)
GW52 Datasheet
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
Revision History
Version
History




Initial Version
Add Electrical Characteristics
Add Reset timing and Power on /off
sequence
Modify :
a. Block Diagram
b. Wording
c. Module PCB Pad & Stencil design
recommendation
d. Reflow Profile

Technical change:
a. Change BT output power: -3.3dBm to
-2.5dBm

Add part:
a. Bluetooth power class : Class 2
b. Module Label Content
c. Packing Drawing
d. Packing Label Drawing
e. Floor Life and Shelf Life (IPC
J-STD-033B)
Add 1.1 Ordering Information
Modify : Wording


Date
Author
2016/01/06
2016/01/20
Kuo Fang
Kuo Fang
2016/01/26
Kuo Fang
2016/03/08 Joseph Lin
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
Table of Contents
1. INTRODUCTION...................................................................................................................................5
1.1 Ordering Information .........................................................................................................5
2. REFERENCE DOCUMENT ...................................................................................................................5
3. REQUIREMENT ...................................................................................................................................6
3.1 H/W Requirement................................................................................................................6
3.1.3 Host Interface - SDIO Interface ............................................................................8
3.1.4 UART Interface .........................................................................................................8
3.1.5 WLAN_RF ..................................................................................................................8
3.1.6 BT_RF.........................................................................................................................8
3.1.7 Digital Audio Interface ...........................................................................................9
3.1.8 Sleep_CLK ................................................................................................................9
3.1.9 Joint Test Action Group (JTAG) and Test Interface ......................................9
3.1.10 Antenna Diagnosis ...............................................................................................9
3.1.11 Antenna Select ....................................................................................................10
3.1.12 VCC_VIO ................................................................................................................11
3.1.13 VCC_3V3 ...............................................................................................................11
3.1.14 RF Subsystem Requirement ............................................................................11
3.1.14.1 Radio Specification 802.11B/G WLAN ...............................................11
3.1.14.2 Radio Specification 802.15 Bluetooth ................................................12
3.1.15 BB Subsystem Requirement ...........................................................................13
3.1.15.1 PIN Assignment .......................................................................................13
3.1.16 Critical Component Lists ..................................................................................14
3.1.17 Reset Timing and Power on /off Sequence .................................................14
3.2 Electrical Characteristics ...............................................................................................16
3.3 S/W Requirement ..............................................................................................................17
3.4 Mechanical Requirement ................................................................................................17
3.4.1 Form factor .............................................................................................................17
3.4.2 Dimension ...............................................................................................................17
3.4.3 Weight ......................................................................................................................17
3.4.4 Drawing ....................................................................................................................18
3.4.5 PCB Pad & Stencil Design Recommendation ...............................................19
4. MAINTAINABILITY & QUALITY .........................................................................................................20
4.1 Maintainability ...................................................................................................................20
4.2 Quality Target ....................................................................................................................20
5. ENVIRONMENTAL REQUIREMENTS ..................................................................................................20
5.1 Operating and Storage Requirements ........................................................................20
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
5.1.1 Temperature ...........................................................................................................20
5.1.2 Floor Life .................................................................................................................20
5.1.3 Shelf Life..................................................................................................................20
6. HANDLING REQUIREMENTS.............................................................................................................20
7. REFLOW PROFILE ............................................................................................................................21
8. MODULE LABEL CONTENT .............................................................................................................22
9. PACKING DRAWING .........................................................................................................................23
10. PACKING LABEL DRAWING ..........................................................................................................24
11. CERTIFICATIONS ............................................................................................................................25
11.1. FCC Regulations: ..........................................................................................................25
12. CONTACT .......................................................................................................................................26
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
1. INTRODUCTION
GW52 is built on the Marvell® 88W8787 low-cost highly-integrated IEEE
802.11b/g/n MAC/Baseband/RF WLAN and Bluetooth Baseband/RF system-on-chip
(SoC).The module supports IEEE 802.11n with maximum data rates up to 72Mbps
(20 MHz channel) and 150 Mbps (40MHz), 802.11g payload data rates of 6, 9, 12, 18,
24, 36, 48, and 54 Mbps, as well as 802.11b data rates of 1, 2, 5.5 and 11 Mbps for
WLAN operation.
For Bluetooth operation, the module supports Bluetooth 3.0 + High Speed (HS)
(also compliant with Bluetooth 2.1 + EDR).
For security, the 88W8787 supports the IEEE 802.11i security standard through
implementation of the Advanced Encryption Standard (AES)/Counter Mode
CBC-MAC Protocol (CCMP), and Wired Equivalent Privacy (WEP) with Temporal Key
Integrity Protocol (TKIP) security mechanisms.
The module also supports Internet Protocol Security (IPsec) with DES/3DES/AES
encryption and MD5/SHA-1 authentication as well as 802.11e Quality of Service
(QoS). The module supports dual SDIO host interface for connecting the WLAN and
Bluetooth to the host processor. For Bluetooth application the high-speed UART (up
to 4MB/s, PCM/Inter-IC Sound (I2S), are supported too.
For better throughput of WLAN/BT the module provide different RF paths for WLAN
and Bluetooth for two antennas. By using of two antennas with enough decoupling it
enables to do without coexistence.
1.1 Ordering Information
Harman P/N
Qisda P/N
Descriptions
02932261
9J.35R02.001
D5 variant, Dual Antenna 802.11b/g/n + Bluetooth
3.0 Module
2. REFERENCE DOCUMENT
IEEE Std 802.11b-1999 (Supplement to ANSI/IEEE Std 802.11, 1999 Edition)
IEEE Std 802.11g.-2003 (Amendment to IEEE Std 802.11, 1999 Edition)
IEEE Std 802.11n -2009 (Amendment 5: Enhancements for Higher Throughput)
SIG Std Master Table of Contents & Compliance Requirements
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3. REQUIREMENT
3.1 H/W Requirement
3.1.1 H/W Block Diagram
VCC_3.3V
Pin 23
Pin 24
Module
EEPROM
WLAN
Antenna
25AA080CT-I/MS
TLV70030QDCKRQ1
Pin 32
LDO
3.3V to 3V
WLAN TX
VCC_3V3
Pin 33
AS179-92LF
88W8787
WLAN/BT
LDO
3.3V to 1.8V
SP2T
Switch
PA
Pin 17
Band pass filter
DEA162450BT-1260B2
BT
Antenna
LX5511LQ-TR
WLAN RX
MAX4835ETT18BD2V+T
BT TX/RX
88W8787-A1-BRD2A000-P123
Pin 2
Band pass filter
DEA162450BT-1260B2
Crystal
EXS00A-CS05684
UART
SDIO
PCM
Crystal Frequency: 38.4 MHz
WLAN frequency:
Features
Frequency Band
Number of selectable Sub channels
Description
2.401 – 2.473GHz
11channels
(f=2412+n*5MHz,n=1,…,11)
Channel 12 and 13 of WiFi 2.4G band are permanently disabled
Bluetooth frequency:
Features
Description
Frequency Band
Number of selectable Sub
2.401 – 2.480GHz
79 channels
channels
(f=2402+k MHz, k=0,…,78)
3.1.2 System Interface
The form factor of GW52 module is 54 pins stamp hole.
The pin define of GW52 is shown in Figure 3-1 System Interface.
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
Figure 3-1 System Interface
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3.1.3 Host Interface - SDIO Interface
The GW52 with SDIO interface which comply with the high speed mode of SDIO
1.2 specification. The host controller could use the SDIO bus to access data from
the WLAN and/or Bluetooth device. There are two independent client drivers for
WLAN and/or Bluetooth inside the host software. Due to both of WLAN and BT
device share the same SDIO interface, the SDIO bus driver inside host software
contain an arbitration scheme.
The SDIO interface supports 4-bit SDIO transfer modes at the full clock range
of 0 to 50MHz.
Pin #
Signal Name
I/O
36
SD_CLK
37
SD_CMD
39
Signal Description
Supply
SDIO clock
VCC_VIO
I/O
SDIO command line
VCC_VIO
SD_DAT_0
I/O
SDIO data line bit 0
VCC_VIO
38
SD_DAT_1
I/O
SDIO data line bit 1
VCC_VIO
41
SD_DAT_2
I/O
SDIO data line bit 2
VCC_VIO
40
SD_DAT_3
I/O
SDIO data line bit 3
VCC_VIO
3.1.4 UART Interface
The GW52 module supports a high speed UART interface, compliant to the
industry standard 16550 specification. (For debug only)
Pin #
Signal Name
I/O
Signal Description
Supply
45
UART_TX
UART serial data output
VCC_VIO
44
UART_RX
UART serial data input
VCC_VIO
46
UART_CTS
UART Clear to send signal
VCC_VIO
43
UART_RTS
UART Ready to send signal
VCC_VIO
3.1.5 WLAN_RF
WLAN antenna input/output. The pin is connected to WLAN antenna. The
impedance of trace or antenna should be designed to 50 ohm.
3.1.6 BT_RF
Bluetooth antenna input/output. The pin is connected to BT antenna. The
impedance of trace or antenna should be designed to 50 ohm.
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3.1.7 Digital Audio Interface
PCM interface supports continual transmission and reception of PCM data
without processor overhead. The PCM support data rates from 64 KHz to
2.048MHz with multi-slot handshake and synchronization PCM encoding/decoding
with A-law, μ-law, and linear voice.
Pin #
Signal Name
I/O
Signal Description
Supply
BT_PCM_CLK
I/O
PCM clock
VCC_VIO
BT_PCM_SYNC
I/O
PCM sync pulse
VCC_VIO
BT_PCM_DIN
PCM data input
VCC_VIO
BT_PCM_DOUT
PCM data output
VCC_VIO
3.1.8 Sleep_CLK
The sleep clock can be providing from external clock source.
Symbol
External Sleep Clock Timing:
Parameter
Min.
Typ.
32 or 32.768
-50ppm
32 or
32.768
Max
Units
32 or 32.768
+50ppm
KHz
CLK
Clock Frequency
THIGH
Clock high time
40
ns
TLOW
Clock low time
40
ns
TRISE
Clock rising time
ns
TFALL
Clock falling time
ns
3.1.9 Joint Test Action Group (JTAG) and Test Interface
JTAG is reserved for SW debug and failure analysis.
3.1.10 Antenna Diagnosis
Antenna Diagnosis circuit is used to detect the connection status between
external antenna and GW52 RF ports. The reference schematics for antenna
diagnosis circuit are shown in Figure 3-2. The RAntenna is embedded in the external
antenna and cross between signal line and ground. RAntenna and R2 act as a voltage
divider.
There are three kinds of antenna connection status can be detected:
- Antenna port is open
- Antenna port is connected correctly
- Antenna port is short-circuited to GND.
The relationship between supply voltage of antenna diagnosis circuit and
measured voltage at point A are listed in Table 3-1.
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
VCC_WLAN_ANT_DIAG=V1 WLAN_ANT_DIAG=V2
Antenna
connection status
VCC_BT_ANT_DIAG
BT_ANT_DIAG
connected correctly
Open
Short-circuited to
Ground
V1/2
V2/2
V1
V2
0V
0V
Table 3-1
R1 and C act as a low pass filter for removing all frequencies above the Nyquist
frequency. The resistor R1 can limit the current flowing into ADC if antenna
connector is short-circuited to battery voltage. The recommended value for RAntenna ,
R1 and C are listed in Table 3-2 Antenna interface.
Figure 3-2 Antenna interface
Antenna Diagnosis
Min
Typ
Max
Unit
RAntenna
51
K ohm
Proposal low pass filter R1
51
K ohm
Proposal low pass filter C
220
nF
Table 3-2 Recommendation for R1 & C
3.1.11 Antenna Select
ANT_SEL_P & ANT_SELN are differential control signals.
ANT_SEL_N
ANT_SEL_P
Antenna
0 (default)
1 (default)
Antenna 1
Antenna 0
10
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3.1.12 VCC_VIO
VCC_VIO is an external power supply for interface. (3.3V or 1.8V)
VIO pin should be connected to the same supply.
3.1.13 VCC_3V3
The module draws all its power from the 3.3V supply.
3.1.14 RF Subsystem Requirement
3.1.14.1 Radio Specification 802.11B/G WLAN
Features
Description
Frequency Band
2.4000 – 2.4835 GHz (2.4 GHz ISM Band)
Number of selectable Sub
11 channels
Channels
(f=2412+n*5MHz,n=0,…,12)
Modulation
OFDM,DSSS (Direct Sequence Spread Spectrum), DBPSK,DQPSK,
CCK ,16QAM, 64QAM
Supported rates
1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 Mbps
Maximum receive level
-10dBm (with PER < 8%)
b Mode : 15±1.5 dBm @ 1, 2, 5.5, and 11Mbps
Output Power
g Mode : 15±1.5 dBm @ 6, 9, 12, 18, 24, 36, 48 and 54Mbps
n mode : 15±1.5 dBm @ MCS0~7 HT20 & HT40
Carrier Frequency Accuracy
-2ppm~+2ppm in 25℃
Data Rate
Sensitivity
Minimum
Typical
802.11b @ 1Mbps
-94dBm
802.11b @ 2Mbps
-91dBm
802.11b @ 5.5Mbps
-89dBm
802.11b @ 11Mbps
-86dBm
802.11g @ 6Mbps
-88dBm
802.11g @ 9Mbps
-87dBm
802.11g @ 12Mbps
-85dBm
802.11g @ 18Mbps
-84dBm
802.11g @ 24Mbps
-80dBm
802.11g @ 36Mbps
-77dBm
802.11g @ 48Mbps
-73dBm
802.11g @ 54Mbps
-72dBm
802.11n @HT20 MCS0
-82dBm
802.11n @HT20 MCS1
-79dBm
802.11n @HT20 MCS2
-77dBm
802.11n @HT20 MCS3
-74dBm
802.11n @HT20 MCS4
-70dBm
Maximum
11
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
802.11n @HT20 MCS5
-66dBm
802.11n @HT20 MCS6
-65dBm
802.11n @HT20 MCS7
-64dBm
802.11n @HT40 MCS0
-79dBm
802.11n @HT40 MCS1
-76dBm
802.11n @HT40 MCS2
-74dBm
802.11n @HT40 MCS3
-71dBm
802.11n @HT40 MCS4
-67dBm
802.11n @HT40 MCS5
-63dBm
802.11n @HT40 MCS6
-62dBm
802.11n @HT40 MCS7
-61dBm
3.1.14.2 Radio Specification 802.15 Bluetooth
Features
Description
Frequency Band
2.4 GHz ISM Band
Number of selectable Sub
79 channels
Channels
(f=2402+k MHz, k=0,…,78)
FHSS (Frequency Hopping Spread
Spectrum)
Modulation
GFSK, π/4-DQPSK, 8DPSK
Supported rates
1, 2, 3 Mbps
Maximum receive level
-10dBm (with PER < 8%)
Power Class
Class 2
Channel 2402 :-2.5dBm~1dBm
Output Power
Channel 2441 :-2.5dBm~1dBm
Channel 2479: -2.5dBm~1dBm
1Mbps: -80dBm @ 0.1% BER
Sensitivity
2Mbps: -77dBm @ 0.01% BER
3Mbps: -80dBm @ 0.01% BER
12
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3.1.15 BB Subsystem Requirement
3.1.15.1 PIN Assignment
Pin #
36
37
39
38
41
40
45
44
46
43
17
52
47
50
48
51
53
54
20
19
11
12
13
15
23,24,
32,33
29
34
9,26
1,3,8,
10,16,
18,21,
22,25,
27,28,
30,31,
35,42,
14, 49
Su p p ly
Sig n al Descrip tio n
SDIO In terface
VCC_VIO
SDIO clock
SD_CLK
VCC_VIO
I/O SDIO command line
SD_CMD
VCC_VIO
I/O SDIO data line bit 0
SD_DAT_0
VCC_VIO
I/O SDIO data line bit 1
SD_DAT_1
VCC_VIO
I/O SDIO data line bit 2
SD_DAT_2
VCC_VIO
I/O SDIO data line bit 3
SD_DAT_3
UART In terface
VCC_VIO
O UART serial data output
UART_TX
VCC_VIO
UART serial data input
UART_RX
VCC_VIO
UART Clear to send signal
UART_CTS
VCC_VIO
O UART Ready to send signal
UART_RTS
WLAN an d Blu eto o th RF In terface
in/out
I/O WLAN antenna
WLAN_RF
in/out
I/O Bluetooth antenna
BT_RF
Au d io In terface – PCM
VCC_VIO
I/O PCM clock
BT_PCM_CLK
VCC_VIO
I/O PCM sync pulse
BT_PCM_SYNC
VCC_VIO
PCM data input
BT_PCM_DIN
VCC_VIO
O PCM data output
BT_PCM_DOUT
Co n tro l & Po wer In terface
VCC_VIO
Reset signal
RESETn
VCC_VIO
Sleep clock
SLEEP_CLK
VCC_VIO
I Full power down
PDn
An ten n a Select
VCC_3V0
O Differential Antenna Select Positive output
ANT_SEL_P
VCC_3V0
O Differential Antenna Select Negative output
ANT_SEL_N
An ten n a Diag n o sis
External power for BT antenna diagnosis
VCC_BT_ANT_DIAG
O BT antenna diagnosis output
BT_ANT_DIAG
External power for WLAN antenna diagnosis
VCC_WLAN_ANT_DIAG
O WLAN antenna diagnosis output
WLAN_ANT_DIAG
Jo in t Test Actio n Gro u p (JTAG) an d Test In terface
VCC_VIO
I JTAG Tset Clock
JTAG_TCK
VCC_VIO
I JTAG Tset Data Input
JTAG_TDI
VCC_VIO
O JTAG Test Data Output
JTAG_TDO
JTAG Test Mode Select
VCC_VIO
JTAG_TMS_SYS
(Selects theSystem JTAG controller)
Po wer & Gro u n d
Sig n al Name
I/O
PI
VCC_3V0
VCC_1V8
VCC_VIO
PO 3.0V monitoring output
PO 1.8V monitoring output
PI 1.8/3.3V Host Interface Supply
NC
Active low
Active low
3.3V power input
VCC_3V3
GND
Remark
Leave unconnected.
Leave unconnected.
Ground
Not connected
Leave unconnected.
13
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3.1.16 Critical Component Lists
Components
Product Name
BT/WIFI PROCESSOR SOC
Marvell -88W8787-A1-BRD2A000-P123
LDO REGULATOR IC
MAXIM - MAX4835ETT18BD2+T
POWER AMPLIFIER
MICROSEMI - LX5511LQ-TR
ANALOG SWITCH
SKYWORKS - AS179-92LF
EEPROM
MICROCHIP – 25AA080CT-I/MS
BANDPASS FILTER
TDK - DEA162450BT-1260B2
QUARTZ CRYSTAL
NDK - EXS00A-CS05684
3.1.17 Reset Timing and Power on /off Sequence
RESETn & PDn
The module can be reset anytime by pulling down the RESETn for at least 5ms. It
is also possible to reset the module by PDn-RESETn sequence, the low duration
for PDn should be at least 700ms.
Reset by RESETn
tRST
PDn
RESETn
RESET timing
min
tRST
typ
max
unit
ms
14
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
Reset by RESETn & PDn
tPD
tRST
PD
PDn
LL
RESET
EESETn
LL
RESET timing
min
typ
max
unit
tPD
700
ms
tRST
ms
Power on sequence
When power on the module, the external powers and PDn and RESETn have to
meet the power sequence requirement, then the module can be powered on
successfully and function well. The VCC_VIO can be rise before VCC_3V3 but the
rising of VCC_VIO should not be later than VCC_3V3.
tPD tRST
VCC_VIO
VCC_3V3
PDn
RESETn
15
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
RESET timing
min
RESETn to VCC_3V3,
RESETn to PDn ,
tPD
tRST
typ
max
unit
700
ms
ms
Power off sequence
In order to power off the module, PDn and RESETn have to meet the power off
sequence.
tRST
tPD
VCC_VIO
VCC_3V3
RESETn
PDn
RESETn and PDn timing
min
tPD
RESETn to VCC_3V3, tRST
PDn to VCC_3V3,
typ
max
unit
ms
500
us
3.2 Electrical Characteristics
Absolute maximum ratings
Parameter
Min.
Symbol
Max.
Units
VCC_VIO
Power supply voltage
with respect to VSS
4.2
VCC_3V3
Power supply voltage
with respect to VSS
3.45
Tstg
Storage Temperature
-40
90
℃
Ta
Ambient Temperature
-40
90
℃
16
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
Recommended operating conditions
Parameter
Min.
Typ.
Symbol
VCC_VIO Digital I/O power supply
VCC_3V3 Main power supply
I_VIO
Current Supply VCC_VIO
I_3V3
Current Supply 3V3
Symbol
Input High Voltage
VIL
Input Low Voltage
VHYS
Input hysteresis
VOH
Output High Voltage
VOL
Output Low Voltage
PDn
Units
1.62
1.8
1.98
2.97
3.3
3.63
3.15
3.3
3.45
205
mA
400
mA
285
DC Characteristics
Parameters
Mode
Min.
VIH
Max
Typ.
Max
Units
1.8V
1.2
2.1
3.3V
2.3
3.6
1.8V
-0.3
0.6
3.3V
-0.3
1.1
1.8V
250
mV
3.3V
400
mV
1.8V
1.22
3.3V
2.57
1.8V
0.4
3.3V
0.4
PDn input, High level
1.4
5.5
PDn input, Low level
-0.3
0.5
3.3 S/W Requirement
MFG Test SW: MFG-8787-WIFI-SD-BT-SD-WIN-X86-1.2.7.23-14.0.11.p57
(Software of GW52 is design and will managed by customer)
3.4 Mechanical Requirement
3.4.1 Form factor
54 Pins LGA, 1.6mm Pitch
3.4.2 Dimension
21mm (L) x 30mm (W) x 4mm (H)
3.4.3 Weight
Typ: 3.67 (g)
17
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3.4.4 Drawing
Parameter
Description
Min.
Typ.
Max.
Units
Length
20.85
21
21.15
mm.
Width
29.85
30
30.15
mm.
Height
3.78
4.22
mm.
Pin To Pin Pitch
1.55
1.6
1.65
mm.
Edge To Pin Center
1.25
1.4
1.55
mm.
Edge To Pin Center
3.95
4.1
4.25
mm.
Pin Width
0.8
1.2
mm.
Weight
Weight
3.49
3.67
3.85
18
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
3.4.5 PCB Pad & Stencil Design Recommendation
WiFi + BT PCB PAD Design
WiFi + BT Stencil Design
19
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
4. MAINTAINABILITY & QUALITY
4.1 Maintainability
Module cannot be reworked.
Qisda will analyze failures and update report to customer by 8D format.
4.2 Quality Target
The quality target for the delivered quality (0 Km-line failures) is zero defects.
Quality target is complaint rate at delivery <50ppm.
5. ENVIRONMENTAL REQUIREMENTS
5.1 Operating and Storage Requirements
5.1.1 Temperature
Operating: - 40 to 90 °C
Storage: - 40 to 90 °C
5.1.2 Floor Life
Ambient Condition: ≦30 °C/60% RH
Maximum Floor time: 168 hour (MSL 3)
5.1.3 Shelf Life
When stored in a noncondensing atmospheric environment of < 40°C/90%
RH. (Moisture Barrier Bag)
6. HANDLING REQUIREMENTS
Do not touch any pin of module while assembling.
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Form No: QTY0-0B-008-05(120104)
 Product System (PS)
7. REFLOW PROFILE
Temperature setting (°C) Conveyor speed : 110cm/1minute
Temperature region
The temperature zone
Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 Z9 Z10 Z11
135 145 155 170 190 200 210 240 250 255 240
21
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
8. MODULE LABEL CONTENT
2D Barcode Definition
Digits
242
200000
001
01
01
029322
YYYYMM
LICHRG#
DD,
61,
8+1
8+1
PC#
GW52,
SN#
9J35R02001
A00,
4+1
10
3+1
Harman
Qisda Harman
Harman
Fixed
Supplier Fixed
EC
PCBA
Desc. supplier Serial
Module
Specified Productio Specified
Level
Part.
Code
No.
No.
Key
n Date,
Key
No.
Qisda
Fixed
Qisda
Internal
Specified Internal Part
Project
Key
No.
No.
MAC-AD XXXXXX BLUE-TO XXXXXX
XXXXXX,
XXXXXX,
R#
OTH#
12+1
Qisda
Fxed
Internal
WiFi
Specified
MAC,
Version
Key
No.
11
12+1
Fixed
Specified BT MAC,
Key
Label Location
A:3.35mm, B:8.25mm
22
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
9. PACKING DRAWING
No.
Item
Spec.
Qisda P/N
10
11
12
Carton
OOB Label
Carton Label
Caution Label
Taping Reel
Cover Tap
Carrier Tap
Module
Aluminum Bag
Humidity Indicator
Pizza Box
Desiccant Bag
L355*W340*T386mm (pizza box * 5)
80 * 40 mm
80 * 40 mm
55 mm* 55mm Label Attention 56M31
PLATE Taping reel 13IN.
COVER TAPE
CARRIER TAPE
GW52
L460*W410*T0.15mm ALUMINUM BAG
CARD HUMINITY INDICATOR GP
L356*W344*T61 mm
Desiccant Bag 68 * 89
4D.1HR02.001
4E.1HR03.001
4E.1HR03.001
4E.G3503.001
4B.1HR02.001
4B.1HR01.001
4B.1HR03.001
9J.35R02.001
4G.1HR01.001
4J.G3501.002
4D.1HR01.001
3H.09005.001
23
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
10. PACKING LABEL DRAWING
Item
Content
Remark
Reel ID
X code (R/A/B/C) + Year + Month + SN
R = Reel
A = Aluminum bag
B = Pizza box
C = Carton
SN is from 0001 ~ 9999
Ex: R2016120001
P/O No
Defined by Harman
(a) 5 pizza boxes are in 1 Lot.
(b) SN is from 0001 ~ 9999
Ex: L2016120001
Qisda Model No.
Defined by Harman
Qisda Part No.
Lot No
L + Year + Month + SN
Model No
Harman P/N
Part No
General
Desc.
GW52
02932261
9J.35R02.001
MOD-SM QIS BT/WLAN CWM-02B-BT2-SP
D5
400 pcs for each Reel
400 pcs for each Aluminum bag
Quantity depend on real
400 pcs for each Pizza box
shipment quantity
2000 pcs for each Carton
01
Started at 01
Level 3
Quantity
EC
MSL
24
Form No: QTY0-0B-008-05(120104)
 Product System (PS)
11. CERTIFICATIONS
11.1. FCC Regulations:
This device complies with part 15 of the FCC Rules. Operation is subject to the
following two conditions: (1) This device may not cause harmful interference, and
(2) this device must accept any interference received, including interference that
may cause undesired operation.
This device has been tested and found to comply with the limits for a Class B digital
device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference in a residential installation. This
equipment generates uses and can radiate radio frequency energy and, if not
installed and used in accordance with the instructions, may cause harmful
interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation If this equipment does
cause harmful interference to radio or television reception, which can be
determined by turning the equipment off and on, the user is encouraged to try to
correct the interference by one or more of the following measures:
-Reorient or relocate the receiving antenna.
-Increase the separation between the equipment and receiver.
-Connect the equipment into an outlet on a circuit different from that to which the
receiver is connected.
-Consult the dealer or an experienced radio/TV technician for help.
Changes or modifications not expressly approved by the party responsible for
compliance could void the user‘s authority to operate the equipment.
RF Exposure Information
This Modular Approval is limited to OEM installation for mobile and fixed
applications only. The antenna installation and operating configurations of this
transmitter, including any applicable source-based time-averaging duty factor,
antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements
of §2.1091.
The antenna(s) used for this transmitter must be installed to provide a separation
distance of at least 20 cm from all persons, must not be collocated or operating in
conjunction with any other antenna or transmitter, except in accordance with FCC
multi-transmitter product procedures.
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Form No: QTY0-0B-008-05(120104)
 Product System (PS)
The end user has no manual instructions to remove or install the device and a
separate approval is required for all other operating configurations, including
portable configurations with respect to 2.1093 and different antenna configurations.
This project uses monopole antenna for testing only, so the antenna type limitation.
The antenna gain limits 2dBi. When the module is installed in the host device, the
FCC ID label must be visible through a window on the final device or it must be
visible when an access panel, door or cover is easily re-moved. If not, a second
label must be placed on the outside of the final device that contains the following
text: “Contains FCC ID: VRSGW52”.
12. CONTACT
Qisda Corporation
No.157,Shanying Rd., Gueishan Dist.,
Taoyuan City 333, Taiwan
Tel: +886 3 359 5000-2987
Fax: +886 3 359 3387
Website: Qisda.com
26
Form No: QTY0-0B-008-05(120104)

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