Qisda M27 GSM/GPRS MODULE User Manual USERS MANUAL

Qisda Corporation GSM/GPRS MODULE USERS MANUAL

USERS MANUAL

©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 1 M27 GSM GPRS Wireless Module User Manual Rev. 0.1 30, July 2007 COPYRIGHT BENQ Corporation This document contains proprietary technical information which is the property of BenQ Corporation and is issued in strict confidential and shall not be disclosed to others parties in whole or in parts without written permission of BenQ Corporation The documents contain information on a product, which is under development and is issued for customer evaluation purposes only. BENQ may make changes to product specifications at any time, without notice. BenQ Corporation Networking & Communications BG 18 JiHu Road, Nei-Hu, Taipei 114, Taiwan, R.O.C. Tel: +886-2-2799-8800 Fax: +886-2-2656-6399 http://www.benq.com
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 2 1. OVERVIEW ...........................................................................................................................................................................................................4 2. M27 KEY FEATURES AT A GLANCE .............................................................................................................................................................5 3. DESIGN GUIDE ORGANIZATION..................................................................................................................................................................7 4. PIN ASSIGNMENT OF M27 MODULE ...........................................................................................................................................................8 4.1. M27 MODULE PLACEMENT...............................................................................................................................................................9 4.2. GROUND PIN.......................................................................................................................................................................................9 4.3. VBATRF PIN (PIN 2, PIN 4, PIN 6, PIN 8) / VBATBB PIN (PIN 1) ...................................................................................................9 4.4. PWON PIN .......................................................................................................................................................................................10 4.5. VBACKUP PIN ...............................................................................................................................................................................10 4.5.1 VBACKUP MAIN FEATURE..................................................................................................................................................................10 4.5.2 FUNCTIONAL DESCRIPTION...................................................................................................................................................................10 4.5.3ELECTRICAL SPECIFICATION...................................................................................................................................................................11 Γ Power ON / Power OFF and Backup Conditions......................................................................................................11 Γ Backup Battery Charger Interface.............................................................................................................................11 Γ Current consumption in BACKUP mode ................................................................................................................... 11 4.5.4GENERAL CHARGING CIRCUIT...............................................................................................................................................................11 4.5.5 VBACKUP CHARGING..........................................................................................................................................................................12 4.6. ONNOFF PIN ...................................................................................................................................................................................12 4.7. ADCIN PIN ......................................................................................................................................................................................13 4.8. 3.3 EXT PIN .....................................................................................................................................................................................13 4.9. VRIO PIN .........................................................................................................................................................................................14 5 PERIPHERALS ...................................................................................................................................................................................................15 5.1. SIM ...................................................................................................................................................................................................15 5.2. AUDIO...............................................................................................................................................................................................15 5.3. KEYBOARD....................................................................................................................................................................................17 5.4. LCM..................................................................................................................................................................................................19 5.5. PAGING INDICATOR...........................................................................................................................................................................21 5.6. CAMERA INTERFACE.........................................................................................................................................................................26 5.7. NAND FLASH INTERFACE................................................................................................................................................................28 5.8. MICRO SD INTERFACE......................................................................................................................................................................30 6 UART INTERFACE............................................................................................................................................................................................31 6.1 DUAL EXTERNAL UART SOLUTION.................................................................................................................................................35 6.2 SINGLE EXTERNAL UART SOLUTION..............................................................................................................................................38 6.2.1 SINGLE EXTERNAL UART SOLUTION: NXP SC16C850LIET........................................................................................................38
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 3 6.2.2 SINGLE EXTERNAL UART SOLUTION: EXAR XR16L570IL24 .....................................................................................................40 7 USB INTERFACE ...............................................................................................................................................................................................41 7.1 USB CHARGER SOLUTION................................................................................................................................................................42 8 GPIO MAPPING .................................................................................................................................................................................................43 9 LEVEL SHIFTER DESIGN ..............................................................................................................................................................................44 10. LAYOUT NOTICE..............................................................................................................................................................................................45 11. ANTENNA INTERFACE ..................................................................................................................................................................................46
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 4 1. Overview This design guide is based mainly on the M27 evaluation board (EVB). The M27 EVB enables you to evaluate the M27 module and peripheral design. In addition, it provides sample firmware that you can use as a starting point to develop code. To give the users the system concept of the interconnections between the host and M27 module, a system block diagram is provided as the following: The reference schematics for M27 peripherals will be given in details in this design guide. Since the interconnections between the host and M27 vary by application, we tend to give only reference designs of general functions, such as AT command by RS232, re-download mechanisms, and flow control of USB, etc.
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 5 2. M27 Key Features at a glance M27 provides basic features (see in the following table) for our customers, and provide compile tool to our customers, it will gives you maximum flexibility for easy integration with the Man-Machine Interface (MMI). Feature Implementation Power supply Single supply voltage 3.3V- 4.5V Power saving Minimizes power consumption in SLEEP mode to 3mA Charging Supports charging monitoring Frequency bands  Quad-band GSM850/EGSM900/DCS1800/PCS1900  Compliant to GSM/GPRS Phase 2/2+ , GPRS class 10 GSM class Small MS Transmit power  Class 4 (2W) at GSM850  Class 4 (2W) at EGSM900  Class 1 (1W) at DCS1800  Class 1 (1W) at PCS1900 Audio interfaces Two analog audio interfaces. Audio features Speech codec modes: ♦ Half Rate (ETS 06.20) ♦ Full Rate (ETS 06.10) ♦ Enhanced Full Rate (ETS 06.50 / 06.60 / 06.80) ♦ Adaptive Multi Rate (AMR) Serial interfaces: UART  1.8V Bi-directional bus for AT commands and data UART.  6-wire serial interface. Supports RTS/CTS Hardware handshake and software XON/XOFF flow control.  Auto baud rate detects 1200 to 115200 bps  UART can be used for CSD service and send AT command of controlling module.  UART can be multiplexing function, you can use USB at the same time LCM interface  Support 1.8V SPI interface(CS, SDO,D/Cn, CLK, RST) Phonebook management Supported phonebook types: SM, FD,LD, ME SIM Application Toolkit Supports SAT class 3, GSM 11.14 Release 98 Ringing tones Offers a choice of different ringing tones / melodies, easily selectable with AT commands Temperature range  Operational temperature : -20 ~ +к80 к  Functional temperature : -30 ~ +к85 к
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 6  Storage temperature : -40 ~ +85 к к SMS  MT, MO, CB, Text and PDU mode SIM interface  Supported SIM card: 1.8V/3V  External SIM card holder has to be connected via interface connector (note that card holder is not part of M27) External antenna Connected via 50 Ohm antenna connector or antenna pad Real time clock Implemented Physical characteristics Size: 45.7 x 43 x 6.8 mm Weight: 11.0g
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 7 3. Design Guide Organization The rest of the manual is organized as follows: Section 4 Pin out definition of M27 module is given along with the RF antenna placement and trace guidelines. In addition, the recommended power on; and handshaking sequences are shown. Section 5 Reference schematics for M27 peripheral, i.e., SIM, Audio, Keyboard, LCM, Paging indicator, Camera, NAND flash, and Micro SD. Section 6 The UART interface. Section 7 The USB interface and USB charger solution.. Section 8 GPIO mapping. Section 9 Level shifter design. Section 10 Layout notice Section 11 Antenna Interface
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 8 4. Pin Assignment of M27 module The following is the pin out definition of the M27 module NAND flash interface (14 pin assignment) Note: For pin 97, 98, 99,100- MCSI and GPIO muxed pins, they have different functions depending on the MODE field of the pin configuration register. Mode 0GPIO function, Mode 1MCSI function
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 9 4.1. M27 Module Placement In M27 module, we have one 50ohm antenna port (interfaced by Antenna pad and grounding) for signal transfer. In addition, the RF signal will be impacted by high frequency noise interference. We strongly suggest the audio trace and SIM signal trace to be as short as possible and as far away as possible from the RF trace and power line to prevent cross coupling. The M27 offer one approach to connecting the antenna shown in the Figure:  Antenna pad and grounding plane placed on the bottom side. 4.2. Ground Pin There are 12 ground pins in M27 module, they should be connected to the PCB ground plane (The ground plane in PCB should be as large as possible). 4.3. VBATRF Pin (Pin 2, Pin 4, Pin 6, Pin 8) / VBATBB Pin (Pin 1) The “Power amplifier” is supplied by the VBATRF pins. During transmitting mode, high output power will draw a large amount of current. The width of this power trace that is connected to the VBATRF pins could not be less than 80mils. In addition, it is better to shunt a 100uF (low ESR) bypass capacitor on VBATRF pins to prevent voltage drop and to reduce ripple. Furthermore, another chip in the module is supplied by the VBATBB pin. The width of this trace that connected to this pin should also be wider.
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 10 4.4. PWON PIN The pin POWON is dedicated to powering on the M27 module. The pin is initially HIGH when power is applied to the M27 module. Once the pin is pulled low for more than 120 ms. M27 will power on. 4.5. VBACKUP PIN 4.5.1 VBACKUP Main Feature When main battery power (VBAT) is low or removed, real time information would be lost. For some purposes, customers would like to keep some data (e.g. RTC) in above conditions that the data can be accessed when main battery power is fed again. For example, customers need RTC continuously running while main battery is removed. To achieve this function, M27 provides VBACKUP Pin for backup battery connection. Backup battery would supply backup power to keep M27 RTC running. 4.5.2 Functional Description To keep real time data for system application during low power or no power condition, M27 allows external battery to provide power to module built-in RTC circuit via “VBACKUP” Pin. The battery can be charged by M27 “VBACKUP” Pin as proposed in section 4.5.4. Customers could choose rechargeable battery which meets the M27 electrical specification show in next section. If customers would like to keep real time information alive longer than an hour, Li-ion battery would be a better choice. Pin Name Pin Out Pull Reset Config Description PWON 14 PU Input Power On 120ms
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 11 4.5.3Electrical Specification  Power ON / Power OFF and Backup Conditions PARAMETER TEST CONDITIONS MIN TYP Max UNIT Battery voltage to enter ACTIV mode from OFF mode Measured on the VBAT terminal 3.3 V Battery voltage to enter BACKUP mode from ACTIV mode VBACKUP 3.2, measured on the VBAT terminal, monitored on the ONnOFF terminal 2.6 2.75 2.9 V  Backup Battery Charger Interface PARAMETER TEST CONDITIONS MIN TYP Max UNIT Backup battery charging current VBACKUP = 2.8 V 350 500 900 µA End backup battery charging voltage: IVBACKUP = −10 µA, 2.9 3.1 3.3 V  Current consumption in BACKUP mode PARAMETER TEST CONDITIONS MIN TYP Max UNIT VBACKUP OFF mode VBAT=3.6V, Ck=32KHz Clock ON 43 65 µA VBACKUP=3.2V, VBAT=0V, Ck=32KHz Clock ON 8.6 12 BACKUP on backup battery mode VBACKUP=0V, VBAT=2.4V, Ck=32KHz Clock ON 16 22 µA 4.5.4General Charging Circuit “VBACKUP” Pin is the in M27 to connect external Li-ion battery. This reference circuit is our recommendation.
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 12 4.5.5 VBACKUP Charging The backup battery can be charged by an external circuit or by M27 module itself via the pad “VBACKUP”. An external circuit with a programmable voltage regulator allows recharging the backup battery. The backup battery charge starts when the following conditions are met: Backup battery charge is enabled by a control bit Charging power supply (main battery) voltage > Backup Battery voltage Charging power supply (main battery) voltage > 2.8V 4.6. ONnOFF PIN This provide Digital Baseband Rest Pin Name Pin Out Pull Reset Config Description ON n OFF 13 PD Output Output Hardware Reset
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 13 4.7. ADCIN PIN Battery monitoring is performed by the multiplexed 10–channel 10–bit ADC MADC used to measure the battery voltage, battery temperature, battery type, battery charge current, battery charger input voltage and the backup battery voltage. The signals are converted into digital 10– bit words, stored in auxiliary ADC output registers and transmitted to an external C.Γ This reference circuit is our recommendation. 4.8. 3.3 EXT PIN Pin Name Pin Out Pull Reset Config Description 3.3V_EXT 61 3.3V Power Supply for LCM & Back light LED and UART in M27 EVB Pin Name Pin Out Pull Reset Config Description ADCIN 5 Input Main Battery Voltage detection ADCIN2 22 Input A/D converter
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 14 4.9. VRIO PIN Power supply for external level shifters Note: Level shifter: PMGD280UN for UART, ADG3308BRUZ-REEL for NAND flash, Add/data bus, SN74LVCH162244AGR, PCA9306DCTR and SN74AVC1T45YZPR for Camera Pin Name Pin Out Pull Reset Config Description VRIO 7 1.8V output voltage for external level shifters(Note)
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 15 5 Peripherals 5.1. SIM The SIM Card digital interface in the M27 ensures the translation of logic levels between M27 and the SIM Card, for the transmission of 3 different signals: SIM_CLK; a reset signal from M27 to the SIM Card (SIM_RST); and serial data from M27 to the SIM Card (SIM_IO). The SIM card interface can be programmed to drive a 1.8V SIM Card. 6 Pin SIM Socket 5.2. Audio There are 2 embedded audio drivers built in the BenQ M27 module. The 2 drivers can drive different kinds of audio load (such as Handheld, or hands free).  Handheld  Microphone 2
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 16  Ear output  Hand free  Microphone 1  Speaker output
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 17 Audio Path Selection AT Commands The M27 module provides the switching of audio paths using AT commands (In connection status): Default value: case (1) (1) AT$HANDHELD (EARN, EARP, MICIN2, MICIP2) (2) AT$HANDFREE (SPKPA, SPKNA, MICIN1, MICIP1) 5.3. KEYBOARD 5.3.1 Keyboard Controller Overview The keyboard controller can handle up to 5*5 keyboards, operates on a 32-kHz clock, and can generate wake-up events when the device is in sleep mode, and this reference circuit is our recommendation. Pin Name Pin Out Pull Reset Config Description KBR0 46 PU Input high Keypad matrix 4 Row access KBR1 48 PU Input high Keypad matrix 4 Row access KBR2 50 PU Input high Keypad matrix 4 Row access KBR3 52 PU Input high Keypad matrix 4 Row access KBR4 54 PU Input high Keypad matrix 4 Row access KBC0 36 Output Keypad matrix 4 column access KBC1 38 Output Keypad matrix 4 column access KBC2 40 Output Keypad matrix 4 column access KBC3 44 Output Keypad matrix 4 column access KBC4 46 Output Keypad matrix 4 column access 5.3.2 Reference circuit 5.3.3 Main Features ROW4C37 22P JC38 22P JC39 22P JC40 22P JC41 22P JROW0ROW2ROW4 ROW3ROW1T3 15V 150PF.1.2T2 15V 150PF.1.2T4 15V 150PF.1.2T5 15V 150PF.1.2T6 15V 150PF.1.2KBC0KBC2KBC4KBC1KBC3KBR0KBC0Close to the Key PadconnectorKBC2KBC1KBC3 KBC4J8KB connector11223344556677889910 10ROW4ROW2ROW0KBC1ROW3KBC0ROW1KBC2KBC3 KBC4R31100 JR32100 JR33100 JR34100 JR35100 JKBR1KBR3KBR2KBR4ROW0ROW1ROW2ROW3
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 18 The keyboard controller includes the following main features: - Support of multi-configuration keyboards up to 5 rows x 5 columns - Integrated programmable timer - Programmable interrupt (IT) generation on key events - Event detection on both key press and key release - Multi-key press detection and decoding - Long key detection on prolonged key press - Programmable time-out on permanent key press or after keyboard release 5.3.4 Signals and I/O Description Figure shows a typical 5*5 keyboard connection to the M27 keyboard controller. 5.3.5 Key Mapping C0 C1 C2 C3 C4 R0 Select Up Down Dial Return R1 Vol+ 1 2 3 SMS R2 Vol- 4 5 6 ESC R3 Re-Dial 7 8 9 Del R4 Handfree * 0 # Set Matrix Keyboard M27 Module KBR0 KBR1 KBR2 KBR3 KBR4 KBC0 KBC1 KBC2 KBC3 KBC4
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 19 5.4. LCM (SPI interface) M27 Provides SPI LCM interface for customer application, it gives you the flexibility to develop customized application, and this reference circuit is our recommendation. Pin Name Pin Out Pull Reset Config Description 3.3_EXT 61 Power Supply for LCM & Back light LED LCM_CS 49 Chip Select \ Chip Select A LCM_SDO 51 Serial input data \ Serial Input Data LCM_D/Cn 53 Register select Input pin (Data/Instruction) \ Read signal LCM_CLK 55 Serial Input clock \ Write signal LCM_RST 57 Reset Input Pin \ Chip Select B LEDB 11 Back light LED Sink 5.4.1 Reference schematics 5.4.2 Dot Matrix LCM spec
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 20 Dot Matrix LCM specSHENZHEN WELLST WGM12864COG-21General specificationsDisplay format: 128 * 64 dot matrix graphic Microprocessor interface: SerialPower level: 3.3VModule size: 92 x 57X8 mmDefinition of TerminalsPower supply for LED3VLED+9Power supply for LED0VLED-8Ground0VGND7Power supply for lcm3.0VVCC6Serial input dataH/LSDA5Serial input clockH/LSCK4Register select input pin (Data/Instruction )H/LD/C3Reset input pin LRES1B2Chip selectLCS1B1FunctionLevelSymbolPin No.0. 4 50. 47 50.490.5 1 5DOTS: 1 2 8 *6 46 5 . 5V . A3 8 .0V .A5 2 .0± 0. 21 . 6MAX 8.0MAX 12.07 1 . 11 9. 03 0. 08 . 02 0. 048 . 39 2 . 08 6 . 05 7 .01 0.52 6 .043 . 03 . 03 5 .01 1 .56 4 . 01 4 . 0113092 . 5 4 X 7 = 2 0 . 3 2196 . 08 . 0է ڬ 5.4.2 7 Segment LCM spec 7 segment LCM spec෡څતᔲຏ ˪ ˦ ˠ ˀˉ ˋ ˉ ˄ ˔General specificationsDefinition of TerminalsDisplay format: 29 Digit(7 segment)+24 PromptMicroprocessor interface: SerialPower level: 3.3VModule size: 115.5 x 48X12 mmsink pin for LED0VLED-9Power supply for LED3.3VLED+8Chip Select BCMOS (In) (Pull up)/CSB7Chip Select ACMOS (In) (Pull up)/CSA6Read signal (Rising edge trigger)CMOS (In) (Pull up)/RD5Write signal (Rising edge trigger)CMOS (In) (Pull up)/WR4Serial input dataCMOS (In) (Pull up)DATA3Ground0VGND2Main Power3.3VVDD1FunctionLevelSymbolPin No.
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 21 5.5. LCM (parallel bus interface) M27 provides parallel bus (8 bit) LCM interfaces for customer application. It gives you the flexibility to develop customized application, and a reference circuit is provided here. LCM parallel bus signal pins of M27 module Pin Name Pin Out Pull Reset Config Description DATA/ADD0 64 Bit 0 for Data bus DATA/ADD1 66 Bit 1 for Data bus DATA/ADD2 68 Bit 2 for Data bus DATA/ADD3 70 Bit 3 for Data bus DATA/ADD4 72 Bit 4 for Data bus DATA/ADD5 74 Bit 5 for Data bus DATA/ADD6 76 Bit 6 for Data bus DATA/ADD7 78 Bit 7 for Data bus RnW 80 Write signal nMOE 62 Read signal GPIO37 32 A0==>Command/Data GPIO14 34 Reset 3.3V_EXT 61 3.3V power supply 5.5.1 Reference schematics (LCM connector pins on M27 EVB) P18VVBATX1X2 Y1Y2GNDVBATGPIO14ResetC1500.1U KGNDA0==>Command/DataP18VDATA_ADD6_PAD3.3V_EXTJ404LCD 8bit connector1110 103312 125514 147716 16991919 1717 15151111131318 1820 2022 2224 242323 212188664422DATA_ADD4_PADDATA_ADD0_PADRnW_PADDATA_ADD2_PADDATA_ADD5_PADGNDDATA_ADD7_PADDATA_ADD3_PADnCS1_PADGPIO37nMOE_PADDATA_ADD1_PAD
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 22 Level shifters between M27 pins and LCM connector 3.3V_EXTP1V8_M27U4ADG3308BRUZ-REELVCCA1A23A45A34A12A56A67A78A89EN10 GND 11VCCY 20Y1 19Y2 18Y3 17Y4 16Y5 15Y6 14Y7 13Y8 123.3V_EXTGNDDATA_ADD73 DATA_ADD63 DATA_ADD53 DATA_ADD43 DATA_ADD33 DATA_ADD23 DATA_ADD13 DATA_ADD03DATA_ADD7_PADDATA_ADD6_PADDATA_ADD5_PADDATA_ADD4_PADDATA_ADD3_PADDATA_ADD2_PADDATA_ADD1_PADDATA_ADD0_PAD RnW_PADADD16_PADADD17_PADADD18_PADADD19_PADnCS1_PADnCS2_PADnMOE_PADRnW3 ADD163 ADD173 ADD183 ADD193 nCS13 nCS23 nMOE3U3ADG3308BRUZ-REELVCCA1A23A45A34A12A56A67A78A89EN10 GND 11VCCY 20Y1 19Y2 18Y3 17Y4 16Y5 15Y6 14Y7 13Y8 123.3V_EXTP1V8_M273.3V_EXTGND
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 23 5.5.2 Dimension and Pin assignment for parallel bus type LCM (YMC240160-04AAAYDGL)
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 24 Pin assignment of parallel bus type LCM (YMC240160-04AAAYDGL) 5.6. Touch screen controller For USB charger application, there are two choices for the touch screen controller with SPI interface or I2C interface. 5.6.1 SPI type touch screen controller(MTK MT6301) 3.3V_EXT C1460.1U KLCM_CS 5LCM_CLK 5LCM_SDO 5R1670 0402R1680 0402R1690 0402R1710 0402LCM_SDIGNDR17347K J3.3V_EXTGNDC1470.1U KX1U25MT6301+Vcc5Y+7Y-9X-8X+6GND10VBAT11AUX12 Vref 13IOVdd 14PenIRQ 15Dout 16Busy 1Din 2nCS 3DCLK 4GND17Y1X2Y2 PenIRQGND
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 25 LCM_SDI_CON3LCM_SDILCM_CLK 5U15PMGD280UNS11D23G2 5S2 4G12D1 63.3V_EXTLCM_CLKR7610K JR7710K JLCM_CLK_CON3P1V8_M27R7810K JR7910K J LCM_CS_CON3 LCM_CS 5LCM_SDO_CON3LCM_SDO 5U13PMGD280UNS11D23G2 5S2 4G12D1 6LCM_SDO3.3V_EXTLCM_CSP1V8_M27 R6810K JR6910K JR7010K JR7110K J 5.6.2 I2C type touch screen controller(TI TSC2003) U28 TSC2003+Vdd1Y+3Y-5X-4X+2GND6Vbat17Vbat28Vref 9PENIRQ 10SDA 11SCL 12A1 13A0 14IN2 15IN1 16X1Y1Y2X23.3V_EXT C1490.1U KGNDR17247K JPenIRQ3.3V_EXTGNDGNDI2C_SCL_PADI2C_SDA_PADC1480.1U KGND C1440.1U KC1450.1U KGNDGNDP1V8_M27GNDR164150K3.3V_EXTR16510K JR16610K JU22PCA9306DCTRGND 1SCL1 3SDA25SDA1 4Vref1 2SCL26Vref 27EN8I2C_SCL 3I2C_SDA 3I2C_SCL_PADI2C_SDA_PAD
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 26 5.7. Paging Indicator LEDA is dedicated for paging indication. The application circuit is shows as below. The diagram below illustrates the application schematic for LED driver inputs LEDA. In each case the current limiter resistor R has to be selected in order to be compliant with maximum current drive capability of each input. Name Pin Max drive current Highest level voltage Lowest level voltage supply Description LEDA 9 20mA VBATBB 2.4 VBATBB paging indicator LEDA is controlled through software program using a dedicated GPIO, which is built in the M27 module, it can write program to control the LED pin state. 5.8. Camera interface The camera interface supports data in ITU-R BT.656 format. The ITU-R BT.656 Standard specifies a method for transferring YUV422 data over an 8-bit interface. The Parallel Camera module can provide a Camera Reference clock (CAM_XCLK) to the camera sensor based on on-chip APLL (48MHz) clock sources CAM_PWDN_PADnCAM_RST_PAD3.3V_EXTCAM_PWDN3nCAM_RST3P1V8_M27U20PMGD280UNS11D23G2 5S2 4G12D1 63.3V_EXT 3,5,7,8R16210K JR16010K JR16110K JR16310K J 560Ө
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 27 C1440.1U KC1450.1U KGNDGNDP1V8_M27GNDR164150K3.3V_EXTR16510K JR16610K JU22PCA9306DCTRGND 1SCL1 3SDA25SDA1 4Vref1 2SCL26Vref 27EN8I2C_SCL 3I2C_SDA 3I2C_SCL_PADI2C_SDA_PAD CAM_DB4_PADCAM_DB3_PADCAM_DB2_PADCAM_DB1_PADCAM_DB0_PADCAM_PWDN_PADC1400.1U KC1410.1U KC1420.1U KC1430.1U KGNDU21SN74LVCH162244AGRGnd14Gnd210Gnd315Gnd421Gnd528Gnd634Gnd739Gnd845Vcc1 7Vcc2 18Vcc3 31Vcc4 421Y0 21Y1 31Y2 51Y3 62Y0 82Y1 92Y2 112Y3 123Y0 133Y1 143Y2 163Y3 174Y0 194Y1 204Y2 224Y3 231A0471A1461A2441A3431OE12A0412A1402A2382A3372OE483A0363A1353A2333A3323OE254A0304A1294A2274A3264OE24GNDGNDCAM_DB0 3CAM_DB1 3CAM_DB3_CAM_VS 3CAM_DB2 3CAM_DB5 3CAM_DB4 3CAM_DB7 3CAM_DB6 3CAM_HS 3CAM_LCLK 3P1V8_M27CAM_HS_PADCAM_LCLK_PADCAM_DB7_PADCAM_DB6_PADCAM_DB5_PAD
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 28 C700.1U KC710.1U KP1V8_M27CAM_XCLK3 CAM_XCLK_PADP1V8_M27 3.3V_EXTU27SN74AVC1T45YZPRA3GND2VCCA1VCCB 6B4DIR 5GNDGNDCAM_DB7_PADCAM_DB0_PADCAM_DB1_PADCAM_DB2_PADCAM_DB3_PADGNDCAM_HS_PADJ403DSC connector1120 202219 193318 184417 17551010 9988667716 1615 1514 1413 1312 1211 11CAM_PWDN_PADCAM_LCLK_PADGNDP2V5C1590.1U KI2C_SDA_PADCAM_XCLK_PADI2C_SCL_PADnCAM_RST_PADCAM_DB6_PADCAM_DB5_PADCAM_DB4_PADGNDCAM_VSYNCP1V8_M27 5.9. NAND flash interface The aim of this NAND flash controller is to have a fully automatic transfer process from/to the NAND flash port. The interface implements an 8-bit parallel data bus (commands, addresses, and data are multiplexed) in addition to the control signals for selecting chip, writing/reading, command and address latching, and ready/busy status. The NAND flash chip used in M27 EVB is Samsung K9F5608U0D-JIB0 FBGA (32M x 8 Bit Memory).It is necessary to add 2 pcs of bi-directional level shifter to interface the M27 and the NAND flash chip. NDF_2 3NDF_1 3NDF_0 3NDF_5 3NDF_4 3NDF_3 3NDF_7 3NDF_6 3NDF_1_M253 NDF_0_M253NDF_2_M253NDF_4_M253 NDF_3_M253NDF_6_M253 NDF_5_M253NDF_7_M253U31ADG3308BRUZ-REELVCCA1A23A45A34A12A56A67A78A89EN10 GND 11VCCY 20Y1 19Y2 18Y3 17Y4 16Y5 15Y6 14Y7 13Y8 12P1V8_M27 3.3V_EXTGND3.3V_EXT
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 29 ND_ALE 3ND_CLE 3ND_RE 3ND_CE1 3ND_RDY 3ND_WE 3ND_CLE_M253 ND_RE_M253ND_CE1_M253ND_RDY_M253 ND_ALE_M253ND_WE_M253P1V8_M27 3.3V_EXTU32ADG3308BRUZ-REELVCCA1A23A45A34A12A56A67A78A89EN10 GND 11VCCY 20Y1 19Y2 18Y3 17Y4 16Y5 15Y6 14Y7 13Y8 12GND3.3V_EXT U2K9F5608U0D-JIB0IO0 F2IO1 G2IO2 H2IO3 H3IO4 H4IO5 G5IO6 H5IO7 G6/CEA4/REB2/WEA5ALEA2CLEB3VCC F6VSSA3VSSH1/WPA1R/BA6LOCKPRE E6VCCQ G4VSSH63.3V_EXTNDF_2NDF_4NDF_0NDF_3NAND_PRENDF_7NDF_5NDF_6ND_CE1ND_REND_CLENDF_1ND_RDYND_WEND_ALE32MX8bit, 1.8V interface3.3V_EXTR7040 0402NDF_0 9NDF_4 9NDF_3 9NDF_2 9NDF_1 9NDF_7 9NDF_5 9NDF_6 9ND_RE9ND_CLE9ND_RDY9ND_ALE9 ND_WE9ND_CE19
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 30 5.10. Micro SD interface The micro-SD card SPI interface is compatible with SPI hosts available on the market. As any other SPI device the micro-SD card SPI channel consists of the following 4 signals: CS, CLK, DI, DO U9SN74LVC2T45DCURA12A23GND4VCCA1VCCB 8B2 6B1 7DIR 5U8SN74LVC2T45DCURA12A23GND4VCCA1VCCB 8B2 6B1 7DIR 5J1GND1CS2DI/CMD3VDD4CLK5VSS6DO/DATA7GND8GND9GND10CARD DETECT12R22DNI_10K121.8VP1V81.8V3.3V3.3VCARD DETECTDATACSC100.1U KC110.1U KC120.1U KC130.1U KVRIOCLKBGNDC80.1uFC90.1uF3.3VBGND1.8VU7SN74AVC1T45YZPRA3GND2VCCA1VCCB 6B4DIR 5CLKDATACARD DETECTCSCMD CMD3.3VTrans Flash card connector
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 31 6 UART Interface  UART/RS232 The UART includes the following additional features - Hardware flow control (such as RTS/CTS) consists of two control signal lines between the Host (DTE) and Client (DCE) that are used to control the flow of data between the devices. - Auto-baud rate with the possibility of baud-rates ranging from 1200 to 115.2K bits. Pin Name Pin Out Pull Reset Config Description TX 24 Output / 1 UART-Transmit Data(M27 side) RX 26 PU Input UART-Receive Data(M27 side) RTS 28 1 UART-Request To Send(M27 side) CTS 30 PD Input UART-Clear To Send(M27 side) Note: The difference between Reset and Config in the pin definition table M27 only provide 1.8V UART interface. If the host (DTE) is 3.3V system, it needs additional Level shifter circuit on EVB. UART Interfaces ٛTX RX RTS CTS DCD RI GND DSR DTR RX TX CTS RTS DCD RI GND  Client Device M27 (DCE)  HOST Device (DTE) VDD2=3.3V VDD1=1.8V Level shift 10K 10K
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 32 UART interface on M27 1.8V-3.3V level shifter for UART interface
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 33 UART transceiver ICL3237A  HW flow control When the hardware flow control type is recommended for communication between the Host(DTE) and client(DCE). Regarding the hardware flow control mechanism between the system (host side) and module (client side). The GSM engine is designed for use as a DCE. Based on the conventions for DCE-DTE Connections it communicates with the customer application (DTE) using the following signals: ♦ Port/TX @ Host Device sends data to the module’s /RX signal line ♦ Port/RX @ Host Device receives data from the module’s /TX signal line ♦ Port/RTS @ Host Device sends data to the module’s /CTS signal line ♦ Port/CTS @ Host Device receives data from the module’s /RTS signal line
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 34  Auto baud Rate Mechanism The M27 module UART is set at Auto-baud rate. This means when the M27 is powered on, it automatically detects the baud rate after the first AT command sent by the host Device. The baud rate is locked at the initially detected rate unless the following conditions:  Client Device  HOST Device TX RX RTS CTS DCD RI GND DSR DTR TX RX RTS CTS DCD RI GND
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 35 6.1 Dual external UART solution M27 support 1 UART interface. M27 module support 4 bit address and 8 bit data bus with some associated control lines. The memory bus is Intel interface with 2 independent Read/Write control lines. For dual external UART port, there are 2 chips which are pin-to-pin compatible, except the ground plane. The one is the NXP SC16C852L, the other is EXAR XR16M2550. The function blocks and reference schematics are shown below. For single external UART solution, please refer to section 6.2. Dual UART interface NXP SC16C852L 1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, parallel bus interface Package HVQFN32(5x5mm), LQFP48(9x9mm)
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 36 U5PMGD280UNS11D23G2 5S2 4G12D1 6UART_RXBUART_TXB3.3V1.8V R1310K JR1210K JR1410K JR1510K JUART_CTSBU6PMGD280UNS11D23G2 5S2 4G12D1 63.3VUART_RSTB1.8V R1910K JR1710K JR2010K JR2110K JU1EXAR XR16M2550 / NXP SC16C852LD330D027D229 D128D532RTSA# 23RXA 4TXA 5VCC 26D431CTSA# 25D61D72A020A119A218IOR#14IOW#12UART_CSA#7UART_CSB#8UART_INTA22UART_INTB21UART_RESET24TXB 6RXB 3RTSB# 15GND13XTAL110XTAL211GND33NC9NC17 CTSB# 16D0D1D4D3D2D6D5D7A0A2A1D[0..7]A[0..2] A[0..2]UART_CSA#IOW#IOR#UART_INTAUART_RESETUART_CSB#UART_INTBR8 0 ohmX124MHz21C722P JC622P JR11576K JD[0..7] 1.8V U2PMGD280UNS11D23G2 5S2 4G12D1 6UART_RXA3.3VUART_TXA1.8V R210K JR110K JR410K JR510K JUART_CTSAU4PMGD280UNS11D23G2 5S2 4G12D1 6UART_RSTA3.3V1.8V R710K JR610K JR910K JR1010K JLevel shifter Dual UART interface EXAR XR16M2550 HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO Package 32 PIN QFN(5x5mm), 48 PIN TQFP (9x9mm)
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 37 RS232_TX2RS232_RX2CTSUART_TXAUART_RXAUART_RSTAUART_TXBR180 J 0603RXDCTSDCDDSRRIPC SIDE(DTE)RXDRTSPC SIDE(DTE)RTSTXDTXDDCDRIGNDDTR3.3V_EXT 3,5,7,9C110U 6.3V3.3VR30 J 0603UART_CTSAU3ICL3237CAVCC26GND2MBAUD15EN13T1IN24T2IN23T3IN22R1OUT21R2OUT20R3OUT18T4IN19T5IN17R1OUTB16SHDN14C1+ 28C1- 25C2+ 1C2- 3V+ 27V- 4T1OUT 5T2OUT 6T3OUT 7R1IN 8R2IN 9R3IN 11T4OUT 10T5OUT 12PORT1D-SUB9 FEMALE 594837261C2 0.47U MUART_RXBC3 0.47U MC4 0.47U MC5 0.47U MM27 SIDE(DCE)RS232_RX23.3V_EXTR16N/ARS232_TX2PORT2D-SUB9 FEMALE 594837261UARTUARTUARTUART
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 38 6.2 Single external UART solution For single external UART solution, there are two options: the one is NXP SC16C850LIET, the other is EXAR XR16L570IL24. The function block and reference schematics are shown below: 6.2.1 Single external UART solution: NXP SC16C850LIET Single UART interface NXP SC16C850LIET 1.8 V single UART, 5 Mbit/s (max.) with 128-byte FIFOs parallel bus interface Package TFBGA36(3.5x3.5mm), HVQFN32( 5x5mm)
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 39 U16SC16C850LIETVDD A1N.C. A2IORA3N.C. A4XTAL2A5XTAL1A6A2B1N.C. B2N.C. B3IOWB4LOWPWRB5CSB6A0C1VSSC2A1C3VSSC4TX C5RX C6INTD1RTS D2VDD D4D7D5 D6D6DSR F2N.C. E2CD E3D1E4D3E5D5E6RESETF1DTR E1RI F3D0F4D2F5D4F6CTS D3D0D1D3D2D4D5D7D6A0A1A2D[0..7]A[0..2] A[0..2]D[0..7]IOW#IOR#UART_RESETNote : UART_TXA, UART_RXA, UART_RSTA, UART_CTSA are from M27X324MHz21C2822P JC2722P JR58576K JR57 0 ohmUART_CSA#UART_INTAUART_LOWPWRC220.1U K1.8VUART_RXBU18PMGD280UNS11D23G2 5S2 4G12D1 63.3VUART_TXB1.8V R5210K JR5110K JR5310K JR5410K J
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 40 6.2.2 Single external UART solution: EXAR XR16L570IL24 UART_INTA1.8VUART_RXBU14PMGD280UNS11D23G2 5S2 4G12D1 63.3VUART_TXB1.8V R4510K JR4410K JR4610K JR4710K JC200.047U KY124MHZCont 1GND2OUT 3VDD4U13 XR16L570IL24D323D020D222 D121D51RXA 4TXA 5VCC 19D424CTS# 18D62D73A014A113A212IOR#11IOW#9UART_CS#6UART_INT15UART_RESET17PwrSave7CLK8GND10RTS# 163.3VD0D1D4D3D2D6D5D7A0A2A1D[0..7]IOR#A[0..2] A[0..2]D[0..7]IOW#UART_CSA#UART_RESETSingle UART interface EXAR XR16L570IL24 SMALLEST 1.62V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE Package 24 PIN QFN(4x4mm), 32 PIN QFN(5x5mm)
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 41 7 USB Interface USB signals are transmitted on a twisted pair of data cables, labeled D+ and D−. These collectively use half-duplex differential signaling to combat the effects of electromagnetic noise on longer lines. D+ and D− usually operate together; They are not separate simplex connections. Transmitted signal levels are 0.0–0.3 volts for low and 2.8–3.6 volts for high. The USB supports three data rates - Low Speed rate of 1.5 M bit/s (183 KiB/s). - Full Speed rate of 12 M bit/s (1.5 MiB/s). USB connector pin out Pin Mini Function M27 1 VBUS (4.4–5.25 V) VBUS (2.7–5.25 V) 2 D− USB_DM 3 D+ USB_DP 4 ID 5 Ground Ground Pin Name Pin Out Pull Reset Config Description VBUS 16 PD Power Supply VBUS line USB_DP 18 USB data bus (positive terminal) USB_DM 20 USB data bus (negative terminal) Note: The difference between Reset and Config in the pin definition table M27 Host Device EVB VBUS USB_DM USB_DP ID GND VBUS USB_DM USB_DP GND VBUS USB_DM USB_DP ID GND
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 42 7.1 USB charger solution For USB charger application, our suggestion is to use the Linear Technology LTC4067 as the Li-ion battery charger. This chip manages the power supplies that would be typical for a USB powered device or from an adaptor to an intermediate voltage bus. The battery charger is a CC/CV timer terminated type capable of charge currents up to 1.25A. The adaptor input has over-voltage protection to 13V. An external MOSFET will disconnect the adaptor if the voltage exceeds 6V; protecting the input against damage in case an unregulated adaptor is accidentally plugged in. U8 LTC4067EDEILIM04CHRG2NTC3IN12CLPROG1GND13PROG 8OVI6BAT 10GATE 9OUT 11ILIM15OVP7TR1TR_10K(0402)R2610K J12GSM/GPRS module1 Cell Li-ion batteryC1250.01U KC1080.47U KQ2 SI2343DSR282K JILIM0ILIM1Wall input4.35V~6VC1410U 6.3VD1C192TBKT-B12 R25100 JR272K JC1310U 6.3VVBUSNote : ILIM0,ILIM1 are 1.8V interface Actual charge current Ibat=Vprog/2kӨ
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 43 8 GPIO MAPPING The module provides 4 independent GPIO pins configurable in read or write mode. The function for these I/O pins is List below. Pin Name Pin No I/O PU Reset Config Description GPIO 1 87 I/O PU Input Low General purpose I/O 1 GPIO 10 60 I/O PU Input Low General purpose I/O 10 GPIO 14 34 I/O PD Input Low General purpose I/O 14 GPIO 37 32 I/O Input Float General purpose I/O 37
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 44 9 Level Shifter Design 9.1 Introduction The bi-directional level shifter circuit described in this application note consists of one discrete MOS-FET for each bus line. In spite of its surprising simplicity, it not only fulfils the requirement of bi-directional level shifting without a direction control signal, but it also has the next additional features: - Isolating of a powered-down bus section from the rest of the bus system, - Protection of the “Lower voltage” side against high voltage spikes at the ‘Higher voltage” side. The bi-directional level shifter can be used in standard mode (0 to 100 kbit/s) or in fast mode (0 to 400 kbit/s) I2C-bus systems, without any change. The following descriptions apply for both modes.
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 45 10. Layout notice 10.1 THT hole and pad size for 2x7 connector
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 46 11. Antenna Interface 11.1 Antenna Installation & Consideration M27 is capable of sustaining a total mismatch at the antenna pad without any damage, even when transmitting at maximum RF power. The RF interface has an impedance of 50Ω. M27 must be applied to 50 ohm load/ antenna, or else the output power will degrade seriously. Antenna supplier needs to ensure that the impedance of the operating frequency range is closed to 50Ω. The external antenna must be matched properly to achieve best performance regarding radiated power, DC-power consumption, modulation accuracy and harmonic suppression. Antenna matching networks are not included on the M27 PCB and should be placed in the host application. Due to the Antenna selection is more important for the wireless performance, this application will provide the Antenna requirements for mobile quad-band modules (GSM850. EGSM, DCS and PCS) (Table11.1~Table11.4). Table11.1. Frequency Bands Item Description Requirement 1 Transmit Bands (TX) GSM850: 869 ~ 894 MHz EGSM: 880 ~ 915 MHz DCS: 1710 ~ 1785 MHz PCS: 1850 ~ 1910 MHz 2 Receive Bands (RX) GSM850: 824 ~ 849 MHz EGSM: 925 ~ 960 MHz DCS: 1805 ~ 1880 MHz PCS: 1930 ~ 1990 MHz Table11.2. VSWR Item Description Requirement 1 VSWR ЉЉЉЉʳʳʳʳ2 : 1 2 Measurement Network analyzer is used to measure VSWR, and the result must be measured with the matching circuit provided by Antenna vendor.
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 47 Table11.3. Gain Item Description Requirement 1 Average gain ЊЊЊЊ 0 dBi 2 Peak gain ЊЊЊЊ 0.5 dBi The gain deviation (Peak gain – minimum gain) of all angles in H-plane should be less than 4dB in low, middle and high channels. The higher gain in DCS/PCS band would be preferred. 3 Measurement The same as the Table11.2 item2. measure the radiation pattern at the lowest, middle and highest frequency for each band. And it must be measured in Chamber, including XY, XZ and YZ planes. Table11.4. Power Rating Item Description Requirement 1 .Maximum Value: 2W(CW) 2 Measuring Method A 50Ө coaxial cable is connected to the 50Ө feeding point on the PCB. The power is applied for 10 minutes at the middle frequency of each Tx band. After the test then measure the VSWR. 3 Criteria The antenna shall satisfy the VSWR as described in Table11.2. No visual deteriora- tion shall occur during or after the test.
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 48 11.2 Antenna Pad & Cable Soldering The antenna can be soldered to the antenna pad. For proper grounding connect the antenna to the ground plane on the bottom of M27 which must be connected to the ground plane of the application.(Fig.11.1) Notes on soldering:  To prevent damage to the module and to obtain long-term solder joint properties you are advised to maintain the standards of good engineering practice for soldering.  Be sure to solder the antenna core to the pad and the shielding of the coax cable to the ground plane of the module next to the antenna pad. The direction of the cable is not relevant from the electrical point of view. M27 material properties:  M27 PCB: FR4  Antenna pad: Gold plated pad Fig.11.1 Antenna Pad & Cable Soldering  Antenna Pad Antenna Cable
©2007 B e n Q C o r p o r a t i o n C o n f i d e n t i a l P r o p e r t y M 27 U s e r M a n u a l V e r s i o n : 0. 1 - 2007/ J u l / 3 0 49 ˙ ˖ ˖ ʳ˜ ˗ ˍ ʳ˩ ˥ ˦ ˠ ˅ ˊ˙ ˖ ˖ ʳ˜ ˗ ˍ ʳ˩ ˥ ˦ ˠ ˅ ˊ˙ ˖ ˖ ʳ˜ ˗ ˍ ʳ˩ ˥ ˦ ˠ ˅ ˊ˙ ˖ ˖ ʳ˜ ˗ ˍ ʳ˩ ˥ ˦ ˠ ˅ ˊ ʳʳʳʳ˧ ˻ ˼ ̆ ʳ˷ ˸ ̉ ˼ ˶ ˸ ʳ˶ ̂ ̀ ̃ ˿ ˼ ˸ ̆ ʳ̊ ˼ ̇ ˻ ʳˣ ˴ ̅ ̇ ʳ˄ ˈ ʳ̂ ˹ ʳ̇ ˻ ˸ ʳ˙ ˖ ˖ ʳ˥ ̈ ˿ ˸ ̆ ˁʳˢ ̃ ˸ ̅ ˴ ̇ ˼ ̂ ́ ʳ˼ ̆ ʳ̆ ̈ ˵ ˽ ˸ ˶ ̇ ʳ̇ ̂ ʳ̇ ˻ ˸ ʳ˹ ̂ ˿ ˿ ̂ ̊ ˼ ́ ˺ ʳ̇ ̊ ̂ ʳ˶ ̂ ́ ˷ ˼ ̇ ˼ ̂ ́ ̆ ˍ ʳ˄ ˁ̇ ˻ ˼ ̆ ʳ˷ ˸ ̉ ˼ ˶ ˸ ʳ̀ ˴ ̌ ʳ́ ̂ ̇ ʳ˶ ˴ ̈ ̆ ˸ ʳ˻ ˴ ̅ ̀ ˹ ̈ ˿ ʳ˼ ́ ̇ ˸ ̅ ˹ ˸ ̅ ˸ ́ ˶ ˸ ʿ ʳ˴ ́ ˷ ʳ˅ ˁ̇ ˻ ˼ ̆ ʳ˷ ˸ ̉ ˼ ˶ ˸ ʳ̀ ̈ ̆ ̇ ʳ˴ ˶ ˶ ˸ ̃ ̇ ʳ˴ ́ ̌ ʳ˼ ́ ̇ ˸ ̅ ˹ ˸ ̅ ˸ ́ ˶ ˸ ʳ̅ ˸ ˶ ˸ ˼ ̉ ˸ ˷ ʿ ʳ˼ ́ ˶ ˿ ̈ ˷ ˼ ́ ˺ ʳ˼ ́ ̇ ˸ ̅ ˹ ˸ ̅ ˸ ́ ˶ ˸ ʳ̇ ˻ ˴ ̇ ʳ̀ ˴ ̌ ʳ˶ ˴ ̈ ̆ ˸ ʳ̈ ́ ˷ ˸ ̆ ˼ ̅ ˸ ˷ ʳ̂ ̃ ˸ ̅ ˴ ̇ ˼ ̂ ́ ˁʳ˖ ˻ ˴ ́ ˺ ˸ ̆ ʳ̂ ̅ ʳ̀ ̂ ˷ ˼ ˹ ˼ ˶ ˴ ̇ ˼ ̂ ́ ̆ ʳ́ ̂ ̇ ʳ˸ ̋ ̃ ̅ ˸ ̆ ̆ ˿ ̌ ʳ˴ ̃ ̃ ̅ ̂ ̉ ˸ ˷ ʳ˵ ̌ ʳ̇ ˻ ˸ ʳ̃ ˴ ̅ ̇ ̌ ʳ̅ ˸ ̆ ̃ ̂ ́ ̆ ˼ ˵ ˿ ˸ ʳ˹ ̂ ̅ ʳ˶ ̂ ̀ ̃ ˿ ˼ ˴ ́ ˶ ˸ ʳ˶ ̂ ̈ ˿ ˷ ʳ̉ ̂ ˼ ˷ ʳ̇ ˻ ˸ ʳ̈ ̆ ˸ ̅ ʺ ̆ ʳ˴ ̈ ̇ ˻ ̂ ̅ ˼ ̇ ̌ ʳ̇ ̂ ʳ̂ ̃ ˸ ̅ ˴ ̇ ˸ ʳ̇ ˻ ˸ ʳ˸ ̄ ̈ ˼ ̃ ̀ ˸ ́ ̇ ˁʳ ˠ ˴ ̋ ˼ ̀ ̈ ̀ ʳ˴ ́ ̇ ˸ ́ ́ ˴ ʳ˺ ˴ ˼ ́ ʳ˴ ˿ ˿ ̂ ̊ ˸ ˷ ʳ˹ ̂ ̅ ʳ̈ ̆ ˸ ʳ̊ ˼ ̇ ˻ ʳ̇ ˻ ˼ ̆ ʳ˷ ˸ ̉ ˼ ˶ ˸ ʳ˼ ̆ ʳ˃ ˷ ˕ ˼ ˁʳ˪ ˻ ˸ ́ ʳ̇ ˻ ˸ ʳ̀ ̂ ˷ ̈ ˿ ˸ ʳ˼ ̆ ʳ˼ ́ ̆ ̇ ˴ ˿ ˿ ˸ ˷ ʳ˼ ́ ʳ̇ ˻ ˸ ʳ˻ ̂ ̆ ̇ ʳ˷ ˸ ̉ ˼ ˶ ˸ ʿ ʳ̇ ˻ ˸ ʳ˙ ˖ ˖ ʳ˜ ˗ ʳ˿ ˴ ˵ ˸ ˿ ʳ̀ ̈ ̆ ̇ ʳ˵ ˸ ʳ̉ ˼ ̆ ˼ ˵ ˿ ˸ ʳ̇ ˻ ̅ ̂ ̈ ˺ ˻ ʳ˴ ʳ̊ ˼ ́ ˷ ̂ ̊ ʳ̂ ́ ʳ̇ ˻ ˸ ʳ˹ ˼ ́ ˴ ˿ ʳ˷ ˸ ̉ ˼ ˶ ˸ ʳ̂ ̅ ʳ˼ ̇ ʳ̀ ̈ ̆ ̇ ʳ˵ ˸ ʳ̉ ˼ ̆ ˼ ˵ ˿ ˸ ʳ̊ ˻ ˸ ́ ʳ˴ ́ ʳ˴ ˶ ˶ ˸ ̆ ̆ ʳ̃ ˴ ́ ˸ ˿ ʿ ʳ˷ ̂ ̂ ̅ ʳ̂ ̅ ʳ˶ ̂ ̉ ˸ ̅ ʳ˼ ̆ ʳ˸ ˴ ̆ ˼ ˿ ̌ ʳ̅ ˸ ˀ̀ ̂ ̉ ˸ ˷ ˁʳ˜ ˹ ʳ́ ̂ ̇ ʿ ʳ˴ ʳ̆ ˸ ˶ ̂ ́ ˷ ʳ˿ ˴ ˵ ˸ ˿ ʳ̀ ̈ ̆ ̇ ʳ˵ ˸ ʳ̃ ˿ ˴ ˶ ˸ ˷ ʳ̂ ́ ʳ̇ ˻ ˸ ʳ̂ ̈ ̇ ̆ ˼ ˷ ˸ ʳ̂ ˹ ʳ̇ ˻ ˸ ʳ˹ ˼ ́ ˴ ˿ ʳ˷ ˸ ̉ ˼ ˶ ˸ ʳ̇ ˻ ˴ ̇ ʳ˶ ̂ ́ ̇ ˴ ˼ ́ ̆ ʳ̇ ˻ ˸ ʳ˹ ̂ ˿ ˿ ̂ ̊ ˼ ́ ˺ ʳ̇ ˸ ̆ ̇ ˍ ʳϘ˖ ̂ ́ ̇ ˴ ˼ ́ ̆ ʳ˙ ˖ ˖ ʳ˜ ˗ ˍ ʳ˩ ˥ ˦ ˠ ˅ ˊ ϙˁʳ

Navigation menu